./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/systemc/token_ring.01.cil-2.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version b2eff8ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f0ee92a1-f009-47e8-a776-2e8e24cf5373/bin/uautomizer-UnR33cPsHg/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f0ee92a1-f009-47e8-a776-2e8e24cf5373/bin/uautomizer-UnR33cPsHg/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f0ee92a1-f009-47e8-a776-2e8e24cf5373/bin/uautomizer-UnR33cPsHg/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f0ee92a1-f009-47e8-a776-2e8e24cf5373/bin/uautomizer-UnR33cPsHg/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/systemc/token_ring.01.cil-2.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f0ee92a1-f009-47e8-a776-2e8e24cf5373/bin/uautomizer-UnR33cPsHg/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f0ee92a1-f009-47e8-a776-2e8e24cf5373/bin/uautomizer-UnR33cPsHg --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 7039989391e70a09ea57155dc830398095342b5276a6311b81eee6000f87563d ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM) --- Real Ultimate output --- This is Ultimate 0.2.1-dev-b2eff8b [2021-10-28 09:04:35,342 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-28 09:04:35,344 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-28 09:04:35,377 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-28 09:04:35,378 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-28 09:04:35,380 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-28 09:04:35,381 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-28 09:04:35,384 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-28 09:04:35,387 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-28 09:04:35,388 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-28 09:04:35,389 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-28 09:04:35,391 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-28 09:04:35,392 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-28 09:04:35,393 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-28 09:04:35,395 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-28 09:04:35,397 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-28 09:04:35,398 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-28 09:04:35,400 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-28 09:04:35,402 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-28 09:04:35,405 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-28 09:04:35,407 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-28 09:04:35,409 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-28 09:04:35,411 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-28 09:04:35,422 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-28 09:04:35,427 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-28 09:04:35,429 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-28 09:04:35,430 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-28 09:04:35,431 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-28 09:04:35,433 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-28 09:04:35,435 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-28 09:04:35,436 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-28 09:04:35,437 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-28 09:04:35,440 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-28 09:04:35,442 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-28 09:04:35,446 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-28 09:04:35,446 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-28 09:04:35,447 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-28 09:04:35,448 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-28 09:04:35,448 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-28 09:04:35,449 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-28 09:04:35,450 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-28 09:04:35,451 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f0ee92a1-f009-47e8-a776-2e8e24cf5373/bin/uautomizer-UnR33cPsHg/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-10-28 09:04:35,495 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-28 09:04:35,502 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-28 09:04:35,502 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-28 09:04:35,503 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-28 09:04:35,504 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-28 09:04:35,505 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-28 09:04:35,505 INFO L138 SettingsManager]: * Use SBE=true [2021-10-28 09:04:35,505 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-10-28 09:04:35,505 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-10-28 09:04:35,506 INFO L138 SettingsManager]: * Use old map elimination=false [2021-10-28 09:04:35,507 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-10-28 09:04:35,507 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-10-28 09:04:35,507 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-10-28 09:04:35,507 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-28 09:04:35,508 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-28 09:04:35,508 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-10-28 09:04:35,508 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-28 09:04:35,508 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-28 09:04:35,509 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-28 09:04:35,509 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-10-28 09:04:35,509 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-10-28 09:04:35,509 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-10-28 09:04:35,509 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-28 09:04:35,510 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-28 09:04:35,510 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-10-28 09:04:35,510 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-28 09:04:35,512 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-10-28 09:04:35,512 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-28 09:04:35,512 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-28 09:04:35,513 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-28 09:04:35,513 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-28 09:04:35,513 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-28 09:04:35,515 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-10-28 09:04:35,515 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f0ee92a1-f009-47e8-a776-2e8e24cf5373/bin/uautomizer-UnR33cPsHg/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f0ee92a1-f009-47e8-a776-2e8e24cf5373/bin/uautomizer-UnR33cPsHg Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 7039989391e70a09ea57155dc830398095342b5276a6311b81eee6000f87563d [2021-10-28 09:04:35,897 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-28 09:04:35,921 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-28 09:04:35,923 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-28 09:04:35,925 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-28 09:04:35,926 INFO L275 PluginConnector]: CDTParser initialized [2021-10-28 09:04:35,927 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f0ee92a1-f009-47e8-a776-2e8e24cf5373/bin/uautomizer-UnR33cPsHg/../../sv-benchmarks/c/systemc/token_ring.01.cil-2.c [2021-10-28 09:04:36,003 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f0ee92a1-f009-47e8-a776-2e8e24cf5373/bin/uautomizer-UnR33cPsHg/data/148eae6fd/2418926120e94478a793bbc7ef99a459/FLAG746f77f3b [2021-10-28 09:04:36,574 INFO L306 CDTParser]: Found 1 translation units. [2021-10-28 09:04:36,574 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f0ee92a1-f009-47e8-a776-2e8e24cf5373/sv-benchmarks/c/systemc/token_ring.01.cil-2.c [2021-10-28 09:04:36,591 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f0ee92a1-f009-47e8-a776-2e8e24cf5373/bin/uautomizer-UnR33cPsHg/data/148eae6fd/2418926120e94478a793bbc7ef99a459/FLAG746f77f3b [2021-10-28 09:04:36,890 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f0ee92a1-f009-47e8-a776-2e8e24cf5373/bin/uautomizer-UnR33cPsHg/data/148eae6fd/2418926120e94478a793bbc7ef99a459 [2021-10-28 09:04:36,892 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-28 09:04:36,894 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-28 09:04:36,903 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-28 09:04:36,903 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-28 09:04:36,907 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-28 09:04:36,908 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 09:04:36" (1/1) ... [2021-10-28 09:04:36,909 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@15977072 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:36, skipping insertion in model container [2021-10-28 09:04:36,909 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 09:04:36" (1/1) ... [2021-10-28 09:04:36,919 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-28 09:04:36,971 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-28 09:04:37,205 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f0ee92a1-f009-47e8-a776-2e8e24cf5373/sv-benchmarks/c/systemc/token_ring.01.cil-2.c[366,379] [2021-10-28 09:04:37,277 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 09:04:37,296 INFO L203 MainTranslator]: Completed pre-run [2021-10-28 09:04:37,312 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f0ee92a1-f009-47e8-a776-2e8e24cf5373/sv-benchmarks/c/systemc/token_ring.01.cil-2.c[366,379] [2021-10-28 09:04:37,351 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 09:04:37,375 INFO L208 MainTranslator]: Completed translation [2021-10-28 09:04:37,376 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:37 WrapperNode [2021-10-28 09:04:37,376 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-28 09:04:37,378 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-28 09:04:37,378 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-28 09:04:37,379 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-28 09:04:37,386 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:37" (1/1) ... [2021-10-28 09:04:37,408 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:37" (1/1) ... [2021-10-28 09:04:37,465 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-28 09:04:37,469 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-28 09:04:37,469 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-28 09:04:37,469 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-28 09:04:37,479 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:37" (1/1) ... [2021-10-28 09:04:37,479 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:37" (1/1) ... [2021-10-28 09:04:37,494 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:37" (1/1) ... [2021-10-28 09:04:37,497 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:37" (1/1) ... [2021-10-28 09:04:37,505 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:37" (1/1) ... [2021-10-28 09:04:37,527 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:37" (1/1) ... [2021-10-28 09:04:37,531 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:37" (1/1) ... [2021-10-28 09:04:37,540 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-28 09:04:37,541 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-28 09:04:37,541 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-28 09:04:37,541 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-28 09:04:37,542 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:37" (1/1) ... [2021-10-28 09:04:37,550 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 09:04:37,561 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f0ee92a1-f009-47e8-a776-2e8e24cf5373/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:04:37,574 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f0ee92a1-f009-47e8-a776-2e8e24cf5373/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 09:04:37,596 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f0ee92a1-f009-47e8-a776-2e8e24cf5373/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-10-28 09:04:37,624 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-28 09:04:37,625 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-28 09:04:37,625 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-28 09:04:37,625 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-28 09:04:38,385 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-28 09:04:38,385 INFO L299 CfgBuilder]: Removed 82 assume(true) statements. [2021-10-28 09:04:38,388 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 09:04:38 BoogieIcfgContainer [2021-10-28 09:04:38,388 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-28 09:04:38,389 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-10-28 09:04:38,389 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-10-28 09:04:38,404 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-10-28 09:04:38,405 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-28 09:04:38,406 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 28.10 09:04:36" (1/3) ... [2021-10-28 09:04:38,408 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@683c4c71 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.10 09:04:38, skipping insertion in model container [2021-10-28 09:04:38,408 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-28 09:04:38,408 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:37" (2/3) ... [2021-10-28 09:04:38,409 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@683c4c71 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.10 09:04:38, skipping insertion in model container [2021-10-28 09:04:38,409 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-28 09:04:38,409 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 09:04:38" (3/3) ... [2021-10-28 09:04:38,410 INFO L389 chiAutomizerObserver]: Analyzing ICFG token_ring.01.cil-2.c [2021-10-28 09:04:38,474 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-10-28 09:04:38,475 INFO L360 BuchiCegarLoop]: Hoare is false [2021-10-28 09:04:38,475 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-10-28 09:04:38,475 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-10-28 09:04:38,475 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-10-28 09:04:38,475 INFO L364 BuchiCegarLoop]: Difference is false [2021-10-28 09:04:38,476 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-10-28 09:04:38,476 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-10-28 09:04:38,506 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 146 states, 145 states have (on average 1.5793103448275863) internal successors, (229), 145 states have internal predecessors, (229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:38,554 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 115 [2021-10-28 09:04:38,554 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:04:38,555 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:04:38,567 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:38,567 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:38,567 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-10-28 09:04:38,570 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 146 states, 145 states have (on average 1.5793103448275863) internal successors, (229), 145 states have internal predecessors, (229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:38,587 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 115 [2021-10-28 09:04:38,588 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:04:38,588 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:04:38,590 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:38,590 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:38,602 INFO L791 eck$LassoCheckResult]: Stem: 132#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 37#L-1true havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 86#L395true havoc start_simulation_#t~ret15, start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 19#L167true assume !(1 == ~m_i~0);~m_st~0 := 2; 100#L174-1true assume 1 == ~t1_i~0;~t1_st~0 := 0; 79#L179-1true assume !(0 == ~M_E~0); 144#L263-1true assume !(0 == ~T1_E~0); 70#L268-1true assume !(0 == ~E_M~0); 56#L273-1true assume !(0 == ~E_1~0); 103#L278-1true havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 51#L128true assume !(1 == ~m_pc~0); 147#L128-2true is_master_triggered_~__retres1~0 := 0; 24#L139true is_master_triggered_#res := is_master_triggered_~__retres1~0; 52#L140true activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 5#L323true assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 55#L323-2true havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 129#L147true assume 1 == ~t1_pc~0; 25#L148true assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 14#L158true is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 77#L159true activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 8#L331true assume !(0 != activate_threads_~tmp___0~0); 133#L331-2true assume !(1 == ~M_E~0); 46#L291-1true assume !(1 == ~T1_E~0); 74#L296-1true assume !(1 == ~E_M~0); 102#L301-1true assume 1 == ~E_1~0;~E_1~0 := 2; 76#L432-1true [2021-10-28 09:04:38,607 INFO L793 eck$LassoCheckResult]: Loop: 76#L432-1true assume !false; 71#L433true start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret9, eval_#t~nondet10, eval_~tmp_ndt_1~0, eval_#t~nondet11, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 22#L238true assume !true; 89#L253true start_simulation_~kernel_st~0 := 2; 127#L167-1true start_simulation_~kernel_st~0 := 3; 99#L263-2true assume 0 == ~M_E~0;~M_E~0 := 1; 58#L263-4true assume 0 == ~T1_E~0;~T1_E~0 := 1; 83#L268-3true assume 0 == ~E_M~0;~E_M~0 := 1; 136#L273-3true assume !(0 == ~E_1~0); 28#L278-3true havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 69#L128-9true assume 1 == ~m_pc~0; 113#L129-3true assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 92#L139-3true is_master_triggered_#res := is_master_triggered_~__retres1~0; 126#L140-3true activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 30#L323-9true assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 17#L323-11true havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 128#L147-9true assume !(1 == ~t1_pc~0); 34#L147-11true is_transmit1_triggered_~__retres1~1 := 0; 41#L158-3true is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 122#L159-3true activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 57#L331-9true assume !(0 != activate_threads_~tmp___0~0); 114#L331-11true assume 1 == ~M_E~0;~M_E~0 := 2; 12#L291-3true assume 1 == ~T1_E~0;~T1_E~0 := 2; 4#L296-3true assume 1 == ~E_M~0;~E_M~0 := 2; 42#L301-3true assume 1 == ~E_1~0;~E_1~0 := 2; 10#L306-3true havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 140#L192-1true assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 54#L204-1true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 49#L205-1true start_simulation_#t~ret15 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 148#L451true assume !(0 == start_simulation_~tmp~3); 73#L451-1true havoc stop_simulation_#res;havoc stop_simulation_#t~ret14, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 96#L192-2true assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 104#L204-2true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 116#L205-2true stop_simulation_#t~ret14 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret14;havoc stop_simulation_#t~ret14; 36#L406true assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 138#L413true stop_simulation_#res := stop_simulation_~__retres2~0; 134#L414true start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 120#L464true assume !(0 != start_simulation_~tmp___0~1); 76#L432-1true [2021-10-28 09:04:38,613 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:38,613 INFO L85 PathProgramCache]: Analyzing trace with hash 22332154, now seen corresponding path program 1 times [2021-10-28 09:04:38,623 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:38,624 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [164762946] [2021-10-28 09:04:38,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:38,625 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:38,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:38,889 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:38,890 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:38,890 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [164762946] [2021-10-28 09:04:38,892 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [164762946] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:38,893 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:38,893 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:04:38,896 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [914232402] [2021-10-28 09:04:38,901 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:04:38,904 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:38,905 INFO L85 PathProgramCache]: Analyzing trace with hash -1826512428, now seen corresponding path program 1 times [2021-10-28 09:04:38,905 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:38,906 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [449766123] [2021-10-28 09:04:38,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:38,907 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:38,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:38,958 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:38,958 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:38,959 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [449766123] [2021-10-28 09:04:38,959 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [449766123] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:38,959 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:38,959 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-28 09:04:38,960 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [859278190] [2021-10-28 09:04:38,961 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:04:38,962 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:38,977 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:04:38,978 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:38,981 INFO L87 Difference]: Start difference. First operand has 146 states, 145 states have (on average 1.5793103448275863) internal successors, (229), 145 states have internal predecessors, (229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 8.333333333333334) internal successors, (25), 3 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:39,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:39,028 INFO L93 Difference]: Finished difference Result 146 states and 218 transitions. [2021-10-28 09:04:39,029 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:04:39,031 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 146 states and 218 transitions. [2021-10-28 09:04:39,035 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 113 [2021-10-28 09:04:39,041 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 146 states to 140 states and 212 transitions. [2021-10-28 09:04:39,042 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 140 [2021-10-28 09:04:39,043 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 140 [2021-10-28 09:04:39,044 INFO L73 IsDeterministic]: Start isDeterministic. Operand 140 states and 212 transitions. [2021-10-28 09:04:39,046 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:04:39,046 INFO L681 BuchiCegarLoop]: Abstraction has 140 states and 212 transitions. [2021-10-28 09:04:39,065 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states and 212 transitions. [2021-10-28 09:04:39,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2021-10-28 09:04:39,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 140 states, 140 states have (on average 1.5142857142857142) internal successors, (212), 139 states have internal predecessors, (212), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:39,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 212 transitions. [2021-10-28 09:04:39,087 INFO L704 BuchiCegarLoop]: Abstraction has 140 states and 212 transitions. [2021-10-28 09:04:39,087 INFO L587 BuchiCegarLoop]: Abstraction has 140 states and 212 transitions. [2021-10-28 09:04:39,087 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-10-28 09:04:39,087 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 140 states and 212 transitions. [2021-10-28 09:04:39,090 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 113 [2021-10-28 09:04:39,090 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:04:39,091 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:04:39,093 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:39,093 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:39,093 INFO L791 eck$LassoCheckResult]: Stem: 439#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 358#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 359#L395 havoc start_simulation_#t~ret15, start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 331#L167 assume 1 == ~m_i~0;~m_st~0 := 0; 332#L174-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 410#L179-1 assume !(0 == ~M_E~0); 411#L263-1 assume !(0 == ~T1_E~0); 401#L268-1 assume !(0 == ~E_M~0); 387#L273-1 assume !(0 == ~E_1~0); 388#L278-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 378#L128 assume !(1 == ~m_pc~0); 379#L128-2 is_master_triggered_~__retres1~0 := 0; 338#L139 is_master_triggered_#res := is_master_triggered_~__retres1~0; 339#L140 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 303#L323 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 304#L323-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 384#L147 assume 1 == ~t1_pc~0; 340#L148 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 320#L158 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 321#L159 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 309#L331 assume !(0 != activate_threads_~tmp___0~0); 310#L331-2 assume !(1 == ~M_E~0); 370#L291-1 assume !(1 == ~T1_E~0); 371#L296-1 assume !(1 == ~E_M~0); 405#L301-1 assume 1 == ~E_1~0;~E_1~0 := 2; 407#L432-1 [2021-10-28 09:04:39,094 INFO L793 eck$LassoCheckResult]: Loop: 407#L432-1 assume !false; 402#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret9, eval_#t~nondet10, eval_~tmp_ndt_1~0, eval_#t~nondet11, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 324#L238 assume !false; 335#L215 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 429#L192 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 395#L204 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 408#L205 eval_#t~ret9 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret9;havoc eval_#t~ret9; 409#L219 assume !(0 != eval_~tmp~0); 415#L253 start_simulation_~kernel_st~0 := 2; 416#L167-1 start_simulation_~kernel_st~0 := 3; 430#L263-2 assume 0 == ~M_E~0;~M_E~0 := 1; 390#L263-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 391#L268-3 assume 0 == ~E_M~0;~E_M~0 := 1; 412#L273-3 assume !(0 == ~E_1~0); 346#L278-3 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 347#L128-9 assume !(1 == ~m_pc~0); 400#L128-11 is_master_triggered_~__retres1~0 := 0; 420#L139-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 421#L140-3 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 348#L323-9 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 325#L323-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 326#L147-9 assume !(1 == ~t1_pc~0); 352#L147-11 is_transmit1_triggered_~__retres1~1 := 0; 353#L158-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 365#L159-3 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 385#L331-9 assume !(0 != activate_threads_~tmp___0~0); 386#L331-11 assume 1 == ~M_E~0;~M_E~0 := 2; 318#L291-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 301#L296-3 assume 1 == ~E_M~0;~E_M~0 := 2; 302#L301-3 assume 1 == ~E_1~0;~E_1~0 := 2; 311#L306-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 312#L192-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 383#L204-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 373#L205-1 start_simulation_#t~ret15 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 374#L451 assume !(0 == start_simulation_~tmp~3); 403#L451-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret14, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 404#L192-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 427#L204-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 432#L205-2 stop_simulation_#t~ret14 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret14;havoc stop_simulation_#t~ret14; 356#L406 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 357#L413 stop_simulation_#res := stop_simulation_~__retres2~0; 440#L414 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 437#L464 assume !(0 != start_simulation_~tmp___0~1); 407#L432-1 [2021-10-28 09:04:39,097 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:39,097 INFO L85 PathProgramCache]: Analyzing trace with hash -196522564, now seen corresponding path program 1 times [2021-10-28 09:04:39,098 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:39,098 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1094292175] [2021-10-28 09:04:39,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:39,099 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:39,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:39,189 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:39,189 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:39,190 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1094292175] [2021-10-28 09:04:39,190 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1094292175] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:39,190 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:39,190 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:04:39,190 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [905551225] [2021-10-28 09:04:39,191 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:04:39,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:39,192 INFO L85 PathProgramCache]: Analyzing trace with hash -1056018990, now seen corresponding path program 1 times [2021-10-28 09:04:39,192 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:39,192 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1337757100] [2021-10-28 09:04:39,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:39,193 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:39,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:39,261 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:39,262 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:39,263 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1337757100] [2021-10-28 09:04:39,264 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1337757100] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:39,264 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:39,265 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:04:39,265 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1907917068] [2021-10-28 09:04:39,266 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:04:39,266 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:39,267 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 09:04:39,268 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:04:39,268 INFO L87 Difference]: Start difference. First operand 140 states and 212 transitions. cyclomatic complexity: 73 Second operand has 5 states, 5 states have (on average 5.0) internal successors, (25), 5 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:39,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:39,502 INFO L93 Difference]: Finished difference Result 355 states and 531 transitions. [2021-10-28 09:04:39,504 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 09:04:39,505 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 355 states and 531 transitions. [2021-10-28 09:04:39,511 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 303 [2021-10-28 09:04:39,516 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 355 states to 355 states and 531 transitions. [2021-10-28 09:04:39,517 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 355 [2021-10-28 09:04:39,518 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 355 [2021-10-28 09:04:39,519 INFO L73 IsDeterministic]: Start isDeterministic. Operand 355 states and 531 transitions. [2021-10-28 09:04:39,533 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:04:39,533 INFO L681 BuchiCegarLoop]: Abstraction has 355 states and 531 transitions. [2021-10-28 09:04:39,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 355 states and 531 transitions. [2021-10-28 09:04:39,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 355 to 155. [2021-10-28 09:04:39,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 155 states, 155 states have (on average 1.4645161290322581) internal successors, (227), 154 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:39,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 227 transitions. [2021-10-28 09:04:39,562 INFO L704 BuchiCegarLoop]: Abstraction has 155 states and 227 transitions. [2021-10-28 09:04:39,563 INFO L587 BuchiCegarLoop]: Abstraction has 155 states and 227 transitions. [2021-10-28 09:04:39,563 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-10-28 09:04:39,563 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 155 states and 227 transitions. [2021-10-28 09:04:39,565 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 125 [2021-10-28 09:04:39,565 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:04:39,565 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:04:39,568 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:39,568 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:39,568 INFO L791 eck$LassoCheckResult]: Stem: 961#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 869#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 870#L395 havoc start_simulation_#t~ret15, start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 842#L167 assume 1 == ~m_i~0;~m_st~0 := 0; 843#L174-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 928#L179-1 assume !(0 == ~M_E~0); 929#L263-1 assume !(0 == ~T1_E~0); 920#L268-1 assume !(0 == ~E_M~0); 903#L273-1 assume !(0 == ~E_1~0); 904#L278-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 893#L128 assume !(1 == ~m_pc~0); 894#L128-2 is_master_triggered_~__retres1~0 := 0; 964#L139 is_master_triggered_#res := is_master_triggered_~__retres1~0; 965#L140 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 813#L323 assume !(0 != activate_threads_~tmp~1); 814#L323-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 900#L147 assume 1 == ~t1_pc~0; 851#L148 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 830#L158 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 831#L159 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 819#L331 assume !(0 != activate_threads_~tmp___0~0); 820#L331-2 assume !(1 == ~M_E~0); 884#L291-1 assume !(1 == ~T1_E~0); 885#L296-1 assume !(1 == ~E_M~0); 923#L301-1 assume 1 == ~E_1~0;~E_1~0 := 2; 925#L432-1 [2021-10-28 09:04:39,569 INFO L793 eck$LassoCheckResult]: Loop: 925#L432-1 assume !false; 919#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret9, eval_#t~nondet10, eval_~tmp_ndt_1~0, eval_#t~nondet11, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 835#L238 assume !false; 846#L215 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 947#L192 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 913#L204 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 926#L205 eval_#t~ret9 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret9;havoc eval_#t~ret9; 927#L219 assume !(0 != eval_~tmp~0); 933#L253 start_simulation_~kernel_st~0 := 2; 934#L167-1 start_simulation_~kernel_st~0 := 3; 948#L263-2 assume 0 == ~M_E~0;~M_E~0 := 1; 905#L263-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 906#L268-3 assume 0 == ~E_M~0;~E_M~0 := 1; 930#L273-3 assume !(0 == ~E_1~0); 856#L278-3 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 857#L128-9 assume 1 == ~m_pc~0; 917#L129-3 assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 955#L139-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 958#L140-3 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 959#L323-9 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 836#L323-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 837#L147-9 assume 1 == ~t1_pc~0; 956#L148-3 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 864#L158-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 878#L159-3 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 901#L331-9 assume !(0 != activate_threads_~tmp___0~0); 902#L331-11 assume 1 == ~M_E~0;~M_E~0 := 2; 828#L291-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 811#L296-3 assume 1 == ~E_M~0;~E_M~0 := 2; 812#L301-3 assume 1 == ~E_1~0;~E_1~0 := 2; 824#L306-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 825#L192-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 899#L204-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 889#L205-1 start_simulation_#t~ret15 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 890#L451 assume !(0 == start_simulation_~tmp~3); 921#L451-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret14, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 922#L192-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 945#L204-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 950#L205-2 stop_simulation_#t~ret14 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret14;havoc stop_simulation_#t~ret14; 867#L406 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 868#L413 stop_simulation_#res := stop_simulation_~__retres2~0; 962#L414 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 957#L464 assume !(0 != start_simulation_~tmp___0~1); 925#L432-1 [2021-10-28 09:04:39,569 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:39,570 INFO L85 PathProgramCache]: Analyzing trace with hash 504542014, now seen corresponding path program 1 times [2021-10-28 09:04:39,570 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:39,570 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [744341131] [2021-10-28 09:04:39,570 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:39,571 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:39,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:39,645 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:39,646 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:39,646 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [744341131] [2021-10-28 09:04:39,647 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [744341131] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:39,647 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:39,647 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:04:39,647 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1037128575] [2021-10-28 09:04:39,648 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:04:39,648 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:39,648 INFO L85 PathProgramCache]: Analyzing trace with hash -634193324, now seen corresponding path program 1 times [2021-10-28 09:04:39,649 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:39,649 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1668852508] [2021-10-28 09:04:39,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:39,650 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:39,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:39,739 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:39,740 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:39,741 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1668852508] [2021-10-28 09:04:39,741 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1668852508] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:39,741 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:39,741 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:04:39,742 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1699318698] [2021-10-28 09:04:39,742 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:04:39,743 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:39,743 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:04:39,743 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:04:39,744 INFO L87 Difference]: Start difference. First operand 155 states and 227 transitions. cyclomatic complexity: 73 Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:39,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:39,881 INFO L93 Difference]: Finished difference Result 345 states and 487 transitions. [2021-10-28 09:04:39,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 09:04:39,882 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 345 states and 487 transitions. [2021-10-28 09:04:39,887 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 300 [2021-10-28 09:04:39,892 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 345 states to 345 states and 487 transitions. [2021-10-28 09:04:39,892 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 345 [2021-10-28 09:04:39,893 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 345 [2021-10-28 09:04:39,893 INFO L73 IsDeterministic]: Start isDeterministic. Operand 345 states and 487 transitions. [2021-10-28 09:04:39,894 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:04:39,895 INFO L681 BuchiCegarLoop]: Abstraction has 345 states and 487 transitions. [2021-10-28 09:04:39,895 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 345 states and 487 transitions. [2021-10-28 09:04:39,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 345 to 323. [2021-10-28 09:04:39,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 323 states, 323 states have (on average 1.4303405572755419) internal successors, (462), 322 states have internal predecessors, (462), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:39,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 323 states to 323 states and 462 transitions. [2021-10-28 09:04:39,914 INFO L704 BuchiCegarLoop]: Abstraction has 323 states and 462 transitions. [2021-10-28 09:04:39,915 INFO L587 BuchiCegarLoop]: Abstraction has 323 states and 462 transitions. [2021-10-28 09:04:39,915 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-10-28 09:04:39,915 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 323 states and 462 transitions. [2021-10-28 09:04:39,918 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 293 [2021-10-28 09:04:39,918 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:04:39,918 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:04:39,923 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:39,924 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:39,924 INFO L791 eck$LassoCheckResult]: Stem: 1482#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 1381#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 1382#L395 havoc start_simulation_#t~ret15, start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 1354#L167 assume 1 == ~m_i~0;~m_st~0 := 0; 1355#L174-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 1439#L179-1 assume !(0 == ~M_E~0); 1440#L263-1 assume !(0 == ~T1_E~0); 1430#L268-1 assume !(0 == ~E_M~0); 1413#L273-1 assume !(0 == ~E_1~0); 1414#L278-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 1404#L128 assume !(1 == ~m_pc~0); 1405#L128-2 is_master_triggered_~__retres1~0 := 0; 1362#L139 is_master_triggered_#res := is_master_triggered_~__retres1~0; 1363#L140 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 1325#L323 assume !(0 != activate_threads_~tmp~1); 1326#L323-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 1410#L147 assume !(1 == ~t1_pc~0); 1451#L147-2 is_transmit1_triggered_~__retres1~1 := 0; 1342#L158 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 1343#L159 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 1331#L331 assume !(0 != activate_threads_~tmp___0~0); 1332#L331-2 assume !(1 == ~M_E~0); 1396#L291-1 assume !(1 == ~T1_E~0); 1397#L296-1 assume !(1 == ~E_M~0); 1434#L301-1 assume 1 == ~E_1~0;~E_1~0 := 2; 1464#L432-1 [2021-10-28 09:04:39,924 INFO L793 eck$LassoCheckResult]: Loop: 1464#L432-1 assume !false; 1579#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret9, eval_#t~nondet10, eval_~tmp_ndt_1~0, eval_#t~nondet11, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 1577#L238 assume !false; 1576#L215 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 1461#L192 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 1422#L204 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 1437#L205 eval_#t~ret9 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret9;havoc eval_#t~ret9; 1438#L219 assume !(0 != eval_~tmp~0); 1449#L253 start_simulation_~kernel_st~0 := 2; 1450#L167-1 start_simulation_~kernel_st~0 := 3; 1462#L263-2 assume 0 == ~M_E~0;~M_E~0 := 1; 1415#L263-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 1416#L268-3 assume 0 == ~E_M~0;~E_M~0 := 1; 1442#L273-3 assume !(0 == ~E_1~0); 1367#L278-3 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 1368#L128-9 assume !(1 == ~m_pc~0); 1428#L128-11 is_master_triggered_~__retres1~0 := 0; 1645#L139-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 1643#L140-3 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 1641#L323-9 assume !(0 != activate_threads_~tmp~1); 1640#L323-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 1639#L147-9 assume !(1 == ~t1_pc~0); 1638#L147-11 is_transmit1_triggered_~__retres1~1 := 0; 1389#L158-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 1390#L159-3 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 1411#L331-9 assume !(0 != activate_threads_~tmp___0~0); 1412#L331-11 assume 1 == ~M_E~0;~M_E~0 := 2; 1340#L291-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 1323#L296-3 assume 1 == ~E_M~0;~E_M~0 := 2; 1324#L301-3 assume 1 == ~E_1~0;~E_1~0 := 2; 1336#L306-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 1337#L192-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 1408#L204-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 1409#L205-1 start_simulation_#t~ret15 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 1590#L451 assume !(0 == start_simulation_~tmp~3); 1588#L451-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret14, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 1587#L192-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 1585#L204-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 1584#L205-2 stop_simulation_#t~ret14 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret14;havoc stop_simulation_#t~ret14; 1583#L406 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1582#L413 stop_simulation_#res := stop_simulation_~__retres2~0; 1581#L414 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 1580#L464 assume !(0 != start_simulation_~tmp___0~1); 1464#L432-1 [2021-10-28 09:04:39,925 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:39,925 INFO L85 PathProgramCache]: Analyzing trace with hash -1690777217, now seen corresponding path program 1 times [2021-10-28 09:04:39,925 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:39,926 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [332406954] [2021-10-28 09:04:39,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:39,926 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:39,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:40,023 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:40,023 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:40,024 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [332406954] [2021-10-28 09:04:40,024 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [332406954] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:40,024 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:40,024 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-28 09:04:40,025 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1165862775] [2021-10-28 09:04:40,025 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:04:40,025 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:40,026 INFO L85 PathProgramCache]: Analyzing trace with hash -1190032496, now seen corresponding path program 1 times [2021-10-28 09:04:40,026 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:40,026 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1613019475] [2021-10-28 09:04:40,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:40,027 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:40,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:40,113 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:40,113 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:40,114 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1613019475] [2021-10-28 09:04:40,114 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1613019475] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:40,114 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:40,114 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:04:40,114 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [302798160] [2021-10-28 09:04:40,115 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:04:40,115 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:40,116 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:04:40,116 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:04:40,116 INFO L87 Difference]: Start difference. First operand 323 states and 462 transitions. cyclomatic complexity: 141 Second operand has 4 states, 3 states have (on average 8.333333333333334) internal successors, (25), 3 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:40,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:40,384 INFO L93 Difference]: Finished difference Result 651 states and 904 transitions. [2021-10-28 09:04:40,385 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 09:04:40,385 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 651 states and 904 transitions. [2021-10-28 09:04:40,394 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 563 [2021-10-28 09:04:40,402 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 651 states to 651 states and 904 transitions. [2021-10-28 09:04:40,402 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 651 [2021-10-28 09:04:40,404 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 651 [2021-10-28 09:04:40,405 INFO L73 IsDeterministic]: Start isDeterministic. Operand 651 states and 904 transitions. [2021-10-28 09:04:40,406 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:04:40,406 INFO L681 BuchiCegarLoop]: Abstraction has 651 states and 904 transitions. [2021-10-28 09:04:40,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 651 states and 904 transitions. [2021-10-28 09:04:40,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 651 to 622. [2021-10-28 09:04:40,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 622 states, 622 states have (on average 1.3842443729903537) internal successors, (861), 621 states have internal predecessors, (861), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:40,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 622 states to 622 states and 861 transitions. [2021-10-28 09:04:40,438 INFO L704 BuchiCegarLoop]: Abstraction has 622 states and 861 transitions. [2021-10-28 09:04:40,438 INFO L587 BuchiCegarLoop]: Abstraction has 622 states and 861 transitions. [2021-10-28 09:04:40,438 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-10-28 09:04:40,438 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 622 states and 861 transitions. [2021-10-28 09:04:40,445 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 559 [2021-10-28 09:04:40,445 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:04:40,445 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:04:40,451 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:40,451 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:40,452 INFO L791 eck$LassoCheckResult]: Stem: 2471#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 2366#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 2367#L395 havoc start_simulation_#t~ret15, start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 2339#L167 assume 1 == ~m_i~0;~m_st~0 := 0; 2340#L174-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 2429#L179-1 assume !(0 == ~M_E~0); 2430#L263-1 assume !(0 == ~T1_E~0); 2418#L268-1 assume 0 == ~E_M~0;~E_M~0 := 1; 2395#L273-1 assume 0 == ~E_1~0;~E_1~0 := 1; 2396#L278-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 2389#L128 assume !(1 == ~m_pc~0); 2390#L128-2 is_master_triggered_~__retres1~0 := 0; 2348#L139 is_master_triggered_#res := is_master_triggered_~__retres1~0; 2349#L140 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 2311#L323 assume !(0 != activate_threads_~tmp~1); 2312#L323-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 2394#L147 assume !(1 == ~t1_pc~0); 2748#L147-2 is_transmit1_triggered_~__retres1~1 := 0; 2328#L158 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 2329#L159 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 2317#L331 assume !(0 != activate_threads_~tmp___0~0); 2318#L331-2 assume !(1 == ~M_E~0); 2473#L291-1 assume !(1 == ~T1_E~0); 2719#L296-1 assume !(1 == ~E_M~0); 2718#L301-1 assume 1 == ~E_1~0;~E_1~0 := 2; 2713#L432-1 [2021-10-28 09:04:40,455 INFO L793 eck$LassoCheckResult]: Loop: 2713#L432-1 assume !false; 2710#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret9, eval_#t~nondet10, eval_~tmp_ndt_1~0, eval_#t~nondet11, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 2616#L238 assume !false; 2706#L215 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 2704#L192 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 2700#L204 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 2427#L205 eval_#t~ret9 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret9;havoc eval_#t~ret9; 2428#L219 assume !(0 != eval_~tmp~0); 2478#L253 start_simulation_~kernel_st~0 := 2; 2847#L167-1 start_simulation_~kernel_st~0 := 3; 2846#L263-2 assume 0 == ~M_E~0;~M_E~0 := 1; 2845#L263-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 2844#L268-3 assume 0 == ~E_M~0;~E_M~0 := 1; 2840#L273-3 assume !(0 == ~E_1~0); 2839#L278-3 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 2836#L128-9 assume !(1 == ~m_pc~0); 2834#L128-11 is_master_triggered_~__retres1~0 := 0; 2772#L139-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 2768#L140-3 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 2766#L323-9 assume !(0 != activate_threads_~tmp~1); 2763#L323-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 2761#L147-9 assume !(1 == ~t1_pc~0); 2759#L147-11 is_transmit1_triggered_~__retres1~1 := 0; 2757#L158-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 2755#L159-3 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 2753#L331-9 assume !(0 != activate_threads_~tmp___0~0); 2751#L331-11 assume 1 == ~M_E~0;~M_E~0 := 2; 2750#L291-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 2749#L296-3 assume 1 == ~E_M~0;~E_M~0 := 2; 2747#L301-3 assume !(1 == ~E_1~0); 2745#L306-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 2744#L192-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 2742#L204-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 2740#L205-1 start_simulation_#t~ret15 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 2737#L451 assume !(0 == start_simulation_~tmp~3); 2735#L451-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret14, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 2734#L192-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 2732#L204-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 2730#L205-2 stop_simulation_#t~ret14 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret14;havoc stop_simulation_#t~ret14; 2728#L406 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 2726#L413 stop_simulation_#res := stop_simulation_~__retres2~0; 2722#L414 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 2717#L464 assume !(0 != start_simulation_~tmp___0~1); 2713#L432-1 [2021-10-28 09:04:40,455 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:40,456 INFO L85 PathProgramCache]: Analyzing trace with hash 1891715391, now seen corresponding path program 1 times [2021-10-28 09:04:40,456 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:40,456 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [274014847] [2021-10-28 09:04:40,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:40,456 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:40,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:40,491 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:40,491 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:40,491 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [274014847] [2021-10-28 09:04:40,491 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [274014847] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:40,492 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:40,492 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-28 09:04:40,492 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [512261851] [2021-10-28 09:04:40,492 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:04:40,493 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:40,493 INFO L85 PathProgramCache]: Analyzing trace with hash 2093817550, now seen corresponding path program 1 times [2021-10-28 09:04:40,493 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:40,493 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [860183340] [2021-10-28 09:04:40,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:40,494 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:40,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:40,533 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:40,533 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:40,533 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [860183340] [2021-10-28 09:04:40,533 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [860183340] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:40,534 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:40,534 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:04:40,534 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [371555381] [2021-10-28 09:04:40,534 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:04:40,535 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:40,535 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:04:40,535 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:40,536 INFO L87 Difference]: Start difference. First operand 622 states and 861 transitions. cyclomatic complexity: 243 Second operand has 3 states, 3 states have (on average 8.333333333333334) internal successors, (25), 2 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:40,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:40,569 INFO L93 Difference]: Finished difference Result 581 states and 782 transitions. [2021-10-28 09:04:40,570 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:04:40,570 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 581 states and 782 transitions. [2021-10-28 09:04:40,577 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 535 [2021-10-28 09:04:40,584 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 581 states to 581 states and 782 transitions. [2021-10-28 09:04:40,584 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 581 [2021-10-28 09:04:40,585 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 581 [2021-10-28 09:04:40,585 INFO L73 IsDeterministic]: Start isDeterministic. Operand 581 states and 782 transitions. [2021-10-28 09:04:40,586 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:04:40,587 INFO L681 BuchiCegarLoop]: Abstraction has 581 states and 782 transitions. [2021-10-28 09:04:40,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 581 states and 782 transitions. [2021-10-28 09:04:40,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 581 to 371. [2021-10-28 09:04:40,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 371 states, 371 states have (on average 1.3396226415094339) internal successors, (497), 370 states have internal predecessors, (497), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:40,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 371 states to 371 states and 497 transitions. [2021-10-28 09:04:40,599 INFO L704 BuchiCegarLoop]: Abstraction has 371 states and 497 transitions. [2021-10-28 09:04:40,599 INFO L587 BuchiCegarLoop]: Abstraction has 371 states and 497 transitions. [2021-10-28 09:04:40,599 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-10-28 09:04:40,599 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 371 states and 497 transitions. [2021-10-28 09:04:40,604 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 325 [2021-10-28 09:04:40,605 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:04:40,605 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:04:40,607 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:40,607 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:40,607 INFO L791 eck$LassoCheckResult]: Stem: 3675#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 3577#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 3578#L395 havoc start_simulation_#t~ret15, start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 3551#L167 assume 1 == ~m_i~0;~m_st~0 := 0; 3552#L174-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 3635#L179-1 assume !(0 == ~M_E~0); 3636#L263-1 assume !(0 == ~T1_E~0); 3623#L268-1 assume !(0 == ~E_M~0); 3606#L273-1 assume 0 == ~E_1~0;~E_1~0 := 1; 3607#L278-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 3597#L128 assume !(1 == ~m_pc~0); 3598#L128-2 is_master_triggered_~__retres1~0 := 0; 3559#L139 is_master_triggered_#res := is_master_triggered_~__retres1~0; 3560#L140 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 3523#L323 assume !(0 != activate_threads_~tmp~1); 3524#L323-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 3603#L147 assume !(1 == ~t1_pc~0); 3673#L147-2 is_transmit1_triggered_~__retres1~1 := 0; 3540#L158 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 3541#L159 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 3529#L331 assume !(0 != activate_threads_~tmp___0~0); 3530#L331-2 assume !(1 == ~M_E~0); 3677#L291-1 assume !(1 == ~T1_E~0); 3627#L296-1 assume !(1 == ~E_M~0); 3628#L301-1 assume 1 == ~E_1~0;~E_1~0 := 2; 3630#L432-1 [2021-10-28 09:04:40,615 INFO L793 eck$LassoCheckResult]: Loop: 3630#L432-1 assume !false; 3622#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret9, eval_#t~nondet10, eval_~tmp_ndt_1~0, eval_#t~nondet11, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 3555#L238 assume !false; 3556#L215 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 3656#L192 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 3615#L204 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 3633#L205 eval_#t~ret9 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret9;havoc eval_#t~ret9; 3634#L219 assume !(0 != eval_~tmp~0); 3642#L253 start_simulation_~kernel_st~0 := 2; 3643#L167-1 start_simulation_~kernel_st~0 := 3; 3657#L263-2 assume 0 == ~M_E~0;~M_E~0 := 1; 3609#L263-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 3610#L268-3 assume !(0 == ~E_M~0); 3639#L273-3 assume !(0 == ~E_1~0); 3564#L278-3 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 3565#L128-9 assume !(1 == ~m_pc~0); 3621#L128-11 is_master_triggered_~__retres1~0 := 0; 3648#L139-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 3649#L140-3 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 3567#L323-9 assume !(0 != activate_threads_~tmp~1); 3546#L323-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 3547#L147-9 assume !(1 == ~t1_pc~0); 3571#L147-11 is_transmit1_triggered_~__retres1~1 := 0; 3572#L158-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 3584#L159-3 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 3604#L331-9 assume !(0 != activate_threads_~tmp___0~0); 3605#L331-11 assume 1 == ~M_E~0;~M_E~0 := 2; 3538#L291-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 3521#L296-3 assume !(1 == ~E_M~0); 3522#L301-3 assume !(1 == ~E_1~0); 3534#L306-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 3535#L192-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 3798#L204-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 3594#L205-1 start_simulation_#t~ret15 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 3595#L451 assume !(0 == start_simulation_~tmp~3); 3625#L451-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret14, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 3626#L192-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 3654#L204-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 3660#L205-2 stop_simulation_#t~ret14 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret14;havoc stop_simulation_#t~ret14; 3575#L406 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 3576#L413 stop_simulation_#res := stop_simulation_~__retres2~0; 3676#L414 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 3671#L464 assume !(0 != start_simulation_~tmp___0~1); 3630#L432-1 [2021-10-28 09:04:40,615 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:40,615 INFO L85 PathProgramCache]: Analyzing trace with hash -102429315, now seen corresponding path program 1 times [2021-10-28 09:04:40,616 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:40,616 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [598728193] [2021-10-28 09:04:40,616 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:40,616 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:40,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:40,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:40,685 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:40,685 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [598728193] [2021-10-28 09:04:40,686 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [598728193] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:40,686 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:40,686 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:04:40,686 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1026268145] [2021-10-28 09:04:40,688 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:04:40,689 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:40,689 INFO L85 PathProgramCache]: Analyzing trace with hash 1515553746, now seen corresponding path program 1 times [2021-10-28 09:04:40,690 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:40,690 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [584134100] [2021-10-28 09:04:40,691 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:40,691 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:40,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:40,768 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:40,768 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:40,769 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [584134100] [2021-10-28 09:04:40,769 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [584134100] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:40,769 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:40,770 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:04:40,770 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2019375060] [2021-10-28 09:04:40,770 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:04:40,771 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:40,771 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:04:40,772 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:04:40,778 INFO L87 Difference]: Start difference. First operand 371 states and 497 transitions. cyclomatic complexity: 128 Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:40,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:40,848 INFO L93 Difference]: Finished difference Result 470 states and 635 transitions. [2021-10-28 09:04:40,849 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 09:04:40,849 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 470 states and 635 transitions. [2021-10-28 09:04:40,855 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 419 [2021-10-28 09:04:40,862 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 470 states to 470 states and 635 transitions. [2021-10-28 09:04:40,869 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 470 [2021-10-28 09:04:40,871 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 470 [2021-10-28 09:04:40,872 INFO L73 IsDeterministic]: Start isDeterministic. Operand 470 states and 635 transitions. [2021-10-28 09:04:40,873 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:04:40,873 INFO L681 BuchiCegarLoop]: Abstraction has 470 states and 635 transitions. [2021-10-28 09:04:40,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 470 states and 635 transitions. [2021-10-28 09:04:40,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 470 to 305. [2021-10-28 09:04:40,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 305 states, 305 states have (on average 1.3344262295081968) internal successors, (407), 304 states have internal predecessors, (407), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:40,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 305 states to 305 states and 407 transitions. [2021-10-28 09:04:40,885 INFO L704 BuchiCegarLoop]: Abstraction has 305 states and 407 transitions. [2021-10-28 09:04:40,885 INFO L587 BuchiCegarLoop]: Abstraction has 305 states and 407 transitions. [2021-10-28 09:04:40,885 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-10-28 09:04:40,885 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 305 states and 407 transitions. [2021-10-28 09:04:40,888 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 275 [2021-10-28 09:04:40,889 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:04:40,889 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:04:40,890 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:40,890 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:40,890 INFO L791 eck$LassoCheckResult]: Stem: 4522#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 4430#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 4431#L395 havoc start_simulation_#t~ret15, start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 4404#L167 assume 1 == ~m_i~0;~m_st~0 := 0; 4405#L174-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 4482#L179-1 assume !(0 == ~M_E~0); 4483#L263-1 assume !(0 == ~T1_E~0); 4474#L268-1 assume !(0 == ~E_M~0); 4458#L273-1 assume !(0 == ~E_1~0); 4459#L278-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 4450#L128 assume !(1 == ~m_pc~0); 4451#L128-2 is_master_triggered_~__retres1~0 := 0; 4412#L139 is_master_triggered_#res := is_master_triggered_~__retres1~0; 4413#L140 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 4376#L323 assume !(0 != activate_threads_~tmp~1); 4377#L323-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 4455#L147 assume !(1 == ~t1_pc~0); 4493#L147-2 is_transmit1_triggered_~__retres1~1 := 0; 4393#L158 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 4394#L159 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 4382#L331 assume !(0 != activate_threads_~tmp___0~0); 4383#L331-2 assume !(1 == ~M_E~0); 4442#L291-1 assume !(1 == ~T1_E~0); 4443#L296-1 assume !(1 == ~E_M~0); 4477#L301-1 assume !(1 == ~E_1~0); 4505#L432-1 [2021-10-28 09:04:40,890 INFO L793 eck$LassoCheckResult]: Loop: 4505#L432-1 assume !false; 4573#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret9, eval_#t~nondet10, eval_~tmp_ndt_1~0, eval_#t~nondet11, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 4571#L238 assume !false; 4570#L215 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 4502#L192 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 4466#L204 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 4480#L205 eval_#t~ret9 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret9;havoc eval_#t~ret9; 4481#L219 assume !(0 != eval_~tmp~0); 4527#L253 start_simulation_~kernel_st~0 := 2; 4625#L167-1 start_simulation_~kernel_st~0 := 3; 4624#L263-2 assume 0 == ~M_E~0;~M_E~0 := 1; 4623#L263-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 4622#L268-3 assume !(0 == ~E_M~0); 4621#L273-3 assume !(0 == ~E_1~0); 4620#L278-3 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 4619#L128-9 assume !(1 == ~m_pc~0); 4618#L128-11 is_master_triggered_~__retres1~0 := 0; 4617#L139-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 4616#L140-3 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 4615#L323-9 assume !(0 != activate_threads_~tmp~1); 4614#L323-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 4612#L147-9 assume !(1 == ~t1_pc~0); 4610#L147-11 is_transmit1_triggered_~__retres1~1 := 0; 4608#L158-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 4606#L159-3 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 4604#L331-9 assume !(0 != activate_threads_~tmp___0~0); 4602#L331-11 assume 1 == ~M_E~0;~M_E~0 := 2; 4600#L291-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 4598#L296-3 assume !(1 == ~E_M~0); 4596#L301-3 assume !(1 == ~E_1~0); 4594#L306-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 4592#L192-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 4589#L204-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 4587#L205-1 start_simulation_#t~ret15 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 4584#L451 assume !(0 == start_simulation_~tmp~3); 4582#L451-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret14, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 4581#L192-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 4579#L204-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 4578#L205-2 stop_simulation_#t~ret14 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret14;havoc stop_simulation_#t~ret14; 4577#L406 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 4576#L413 stop_simulation_#res := stop_simulation_~__retres2~0; 4575#L414 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 4574#L464 assume !(0 != start_simulation_~tmp___0~1); 4505#L432-1 [2021-10-28 09:04:40,891 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:40,891 INFO L85 PathProgramCache]: Analyzing trace with hash -1690777215, now seen corresponding path program 1 times [2021-10-28 09:04:40,891 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:40,893 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [769378584] [2021-10-28 09:04:40,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:40,893 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:40,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:04:40,913 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:04:40,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:04:40,965 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:04:40,966 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:40,967 INFO L85 PathProgramCache]: Analyzing trace with hash 1515553746, now seen corresponding path program 2 times [2021-10-28 09:04:40,967 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:40,967 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [887409815] [2021-10-28 09:04:40,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:40,968 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:40,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:41,008 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:41,008 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:41,009 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [887409815] [2021-10-28 09:04:41,009 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [887409815] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:41,009 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:41,009 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:04:41,010 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1766606220] [2021-10-28 09:04:41,010 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:04:41,010 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:41,011 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 09:04:41,011 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:04:41,012 INFO L87 Difference]: Start difference. First operand 305 states and 407 transitions. cyclomatic complexity: 104 Second operand has 5 states, 5 states have (on average 8.6) internal successors, (43), 5 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:41,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:41,127 INFO L93 Difference]: Finished difference Result 519 states and 684 transitions. [2021-10-28 09:04:41,127 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-28 09:04:41,128 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 519 states and 684 transitions. [2021-10-28 09:04:41,134 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 484 [2021-10-28 09:04:41,140 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 519 states to 519 states and 684 transitions. [2021-10-28 09:04:41,141 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 519 [2021-10-28 09:04:41,142 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 519 [2021-10-28 09:04:41,142 INFO L73 IsDeterministic]: Start isDeterministic. Operand 519 states and 684 transitions. [2021-10-28 09:04:41,143 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:04:41,143 INFO L681 BuchiCegarLoop]: Abstraction has 519 states and 684 transitions. [2021-10-28 09:04:41,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states and 684 transitions. [2021-10-28 09:04:41,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 314. [2021-10-28 09:04:41,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 314 states, 314 states have (on average 1.3248407643312101) internal successors, (416), 313 states have internal predecessors, (416), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:41,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 314 states to 314 states and 416 transitions. [2021-10-28 09:04:41,156 INFO L704 BuchiCegarLoop]: Abstraction has 314 states and 416 transitions. [2021-10-28 09:04:41,156 INFO L587 BuchiCegarLoop]: Abstraction has 314 states and 416 transitions. [2021-10-28 09:04:41,156 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-10-28 09:04:41,156 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 314 states and 416 transitions. [2021-10-28 09:04:41,159 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 284 [2021-10-28 09:04:41,159 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:04:41,160 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:04:41,160 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:41,161 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:41,161 INFO L791 eck$LassoCheckResult]: Stem: 5379#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 5272#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 5273#L395 havoc start_simulation_#t~ret15, start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 5245#L167 assume 1 == ~m_i~0;~m_st~0 := 0; 5246#L174-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 5327#L179-1 assume !(0 == ~M_E~0); 5328#L263-1 assume !(0 == ~T1_E~0); 5319#L268-1 assume !(0 == ~E_M~0); 5301#L273-1 assume !(0 == ~E_1~0); 5302#L278-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 5295#L128 assume !(1 == ~m_pc~0); 5296#L128-2 is_master_triggered_~__retres1~0 := 0; 5253#L139 is_master_triggered_#res := is_master_triggered_~__retres1~0; 5254#L140 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 5216#L323 assume !(0 != activate_threads_~tmp~1); 5217#L323-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 5300#L147 assume !(1 == ~t1_pc~0); 5338#L147-2 is_transmit1_triggered_~__retres1~1 := 0; 5234#L158 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 5235#L159 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 5222#L331 assume !(0 != activate_threads_~tmp___0~0); 5223#L331-2 assume !(1 == ~M_E~0); 5287#L291-1 assume !(1 == ~T1_E~0); 5288#L296-1 assume !(1 == ~E_M~0); 5322#L301-1 assume !(1 == ~E_1~0); 5352#L432-1 [2021-10-28 09:04:41,161 INFO L793 eck$LassoCheckResult]: Loop: 5352#L432-1 assume !false; 5491#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret9, eval_#t~nondet10, eval_~tmp_ndt_1~0, eval_#t~nondet11, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 5486#L238 assume !false; 5386#L215 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 5348#L192 assume !(0 == ~m_st~0); 5310#L196 assume !(0 == ~t1_st~0);exists_runnable_thread_~__retres1~2 := 0; 5312#L204 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 5430#L205 eval_#t~ret9 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret9;havoc eval_#t~ret9; 5429#L219 assume !(0 != eval_~tmp~0); 5334#L253 start_simulation_~kernel_st~0 := 2; 5335#L167-1 start_simulation_~kernel_st~0 := 3; 5374#L263-2 assume 0 == ~M_E~0;~M_E~0 := 1; 5305#L263-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 5306#L268-3 assume !(0 == ~E_M~0); 5330#L273-3 assume !(0 == ~E_1~0); 5259#L278-3 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 5260#L128-9 assume !(1 == ~m_pc~0); 5317#L128-11 is_master_triggered_~__retres1~0 := 0; 5357#L139-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 5372#L140-3 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 5373#L323-9 assume !(0 != activate_threads_~tmp~1); 5240#L323-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 5241#L147-9 assume !(1 == ~t1_pc~0); 5266#L147-11 is_transmit1_triggered_~__retres1~1 := 0; 5267#L158-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 5369#L159-3 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 5370#L331-9 assume !(0 != activate_threads_~tmp___0~0); 5361#L331-11 assume 1 == ~M_E~0;~M_E~0 := 2; 5362#L291-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 5214#L296-3 assume !(1 == ~E_M~0); 5215#L301-3 assume !(1 == ~E_1~0); 5227#L306-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 5228#L192-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 5488#L204-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 5487#L205-1 start_simulation_#t~ret15 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 5387#L451 assume !(0 == start_simulation_~tmp~3); 5320#L451-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret14, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 5321#L192-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 5513#L204-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 5511#L205-2 stop_simulation_#t~ret14 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret14;havoc stop_simulation_#t~ret14; 5509#L406 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 5507#L413 stop_simulation_#res := stop_simulation_~__retres2~0; 5505#L414 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 5496#L464 assume !(0 != start_simulation_~tmp___0~1); 5352#L432-1 [2021-10-28 09:04:41,162 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:41,162 INFO L85 PathProgramCache]: Analyzing trace with hash -1690777215, now seen corresponding path program 2 times [2021-10-28 09:04:41,162 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:41,163 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [544594375] [2021-10-28 09:04:41,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:41,163 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:41,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:04:41,173 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:04:41,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:04:41,199 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:04:41,200 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:41,200 INFO L85 PathProgramCache]: Analyzing trace with hash -176459851, now seen corresponding path program 1 times [2021-10-28 09:04:41,200 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:41,201 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [527829530] [2021-10-28 09:04:41,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:41,201 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:41,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:41,239 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:41,240 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:41,240 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [527829530] [2021-10-28 09:04:41,240 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [527829530] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:41,240 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:41,241 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:04:41,241 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1909587657] [2021-10-28 09:04:41,241 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 09:04:41,241 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:41,242 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:04:41,242 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:41,243 INFO L87 Difference]: Start difference. First operand 314 states and 416 transitions. cyclomatic complexity: 104 Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:41,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:41,269 INFO L93 Difference]: Finished difference Result 345 states and 443 transitions. [2021-10-28 09:04:41,269 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:04:41,270 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 345 states and 443 transitions. [2021-10-28 09:04:41,274 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 305 [2021-10-28 09:04:41,277 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 345 states to 345 states and 443 transitions. [2021-10-28 09:04:41,278 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 345 [2021-10-28 09:04:41,278 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 345 [2021-10-28 09:04:41,278 INFO L73 IsDeterministic]: Start isDeterministic. Operand 345 states and 443 transitions. [2021-10-28 09:04:41,279 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:04:41,279 INFO L681 BuchiCegarLoop]: Abstraction has 345 states and 443 transitions. [2021-10-28 09:04:41,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 345 states and 443 transitions. [2021-10-28 09:04:41,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 345 to 345. [2021-10-28 09:04:41,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 345 states, 345 states have (on average 1.2840579710144928) internal successors, (443), 344 states have internal predecessors, (443), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:41,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 345 states to 345 states and 443 transitions. [2021-10-28 09:04:41,290 INFO L704 BuchiCegarLoop]: Abstraction has 345 states and 443 transitions. [2021-10-28 09:04:41,290 INFO L587 BuchiCegarLoop]: Abstraction has 345 states and 443 transitions. [2021-10-28 09:04:41,290 INFO L425 BuchiCegarLoop]: ======== Iteration 9============ [2021-10-28 09:04:41,290 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 345 states and 443 transitions. [2021-10-28 09:04:41,293 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 305 [2021-10-28 09:04:41,293 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:04:41,293 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:04:41,294 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:41,294 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:41,294 INFO L791 eck$LassoCheckResult]: Stem: 6045#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 5938#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 5939#L395 havoc start_simulation_#t~ret15, start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 5909#L167 assume 1 == ~m_i~0;~m_st~0 := 0; 5910#L174-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 5999#L179-1 assume !(0 == ~M_E~0); 6000#L263-1 assume !(0 == ~T1_E~0); 5991#L268-1 assume !(0 == ~E_M~0); 5971#L273-1 assume !(0 == ~E_1~0); 5972#L278-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 5963#L128 assume !(1 == ~m_pc~0); 5964#L128-2 is_master_triggered_~__retres1~0 := 0; 5917#L139 is_master_triggered_#res := is_master_triggered_~__retres1~0; 5918#L140 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 5881#L323 assume !(0 != activate_threads_~tmp~1); 5882#L323-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 5968#L147 assume !(1 == ~t1_pc~0); 6008#L147-2 is_transmit1_triggered_~__retres1~1 := 0; 5898#L158 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 5899#L159 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 5887#L331 assume !(0 != activate_threads_~tmp___0~0); 5888#L331-2 assume !(1 == ~M_E~0); 5953#L291-1 assume !(1 == ~T1_E~0); 5954#L296-1 assume !(1 == ~E_M~0); 5994#L301-1 assume !(1 == ~E_1~0); 6022#L432-1 assume !false; 6142#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret9, eval_#t~nondet10, eval_~tmp_ndt_1~0, eval_#t~nondet11, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 6139#L238 [2021-10-28 09:04:41,295 INFO L793 eck$LassoCheckResult]: Loop: 6139#L238 assume !false; 6137#L215 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 6134#L192 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 6132#L204 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 6129#L205 eval_#t~ret9 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret9;havoc eval_#t~ret9; 6127#L219 assume 0 != eval_~tmp~0; 6071#L219-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet10;havoc eval_#t~nondet10; 6066#L227 assume !(0 != eval_~tmp_ndt_1~0); 6067#L224 assume !(0 == ~t1_st~0); 6139#L238 [2021-10-28 09:04:41,295 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:41,295 INFO L85 PathProgramCache]: Analyzing trace with hash -1339261757, now seen corresponding path program 1 times [2021-10-28 09:04:41,295 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:41,296 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [487832477] [2021-10-28 09:04:41,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:41,296 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:41,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:04:41,306 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:04:41,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:04:41,323 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:04:41,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:41,324 INFO L85 PathProgramCache]: Analyzing trace with hash -1331440565, now seen corresponding path program 1 times [2021-10-28 09:04:41,324 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:41,325 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [303082974] [2021-10-28 09:04:41,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:41,325 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:41,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:04:41,329 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:04:41,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:04:41,334 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:04:41,335 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:41,335 INFO L85 PathProgramCache]: Analyzing trace with hash 610963913, now seen corresponding path program 1 times [2021-10-28 09:04:41,335 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:41,336 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [577017946] [2021-10-28 09:04:41,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:41,336 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:41,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:41,364 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:41,364 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:41,365 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [577017946] [2021-10-28 09:04:41,365 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [577017946] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:41,365 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:41,365 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-28 09:04:41,365 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1710221042] [2021-10-28 09:04:41,442 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:41,443 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:04:41,443 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:41,444 INFO L87 Difference]: Start difference. First operand 345 states and 443 transitions. cyclomatic complexity: 101 Second operand has 3 states, 2 states have (on average 18.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:41,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:41,485 INFO L93 Difference]: Finished difference Result 563 states and 708 transitions. [2021-10-28 09:04:41,486 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:04:41,486 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 563 states and 708 transitions. [2021-10-28 09:04:41,492 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 453 [2021-10-28 09:04:41,499 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 563 states to 563 states and 708 transitions. [2021-10-28 09:04:41,499 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 563 [2021-10-28 09:04:41,500 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 563 [2021-10-28 09:04:41,500 INFO L73 IsDeterministic]: Start isDeterministic. Operand 563 states and 708 transitions. [2021-10-28 09:04:41,501 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:04:41,501 INFO L681 BuchiCegarLoop]: Abstraction has 563 states and 708 transitions. [2021-10-28 09:04:41,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 563 states and 708 transitions. [2021-10-28 09:04:41,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 563 to 522. [2021-10-28 09:04:41,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 522 states, 522 states have (on average 1.2681992337164751) internal successors, (662), 521 states have internal predecessors, (662), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:41,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 522 states to 522 states and 662 transitions. [2021-10-28 09:04:41,517 INFO L704 BuchiCegarLoop]: Abstraction has 522 states and 662 transitions. [2021-10-28 09:04:41,517 INFO L587 BuchiCegarLoop]: Abstraction has 522 states and 662 transitions. [2021-10-28 09:04:41,517 INFO L425 BuchiCegarLoop]: ======== Iteration 10============ [2021-10-28 09:04:41,517 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 522 states and 662 transitions. [2021-10-28 09:04:41,521 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 437 [2021-10-28 09:04:41,522 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:04:41,522 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:04:41,522 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:41,523 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:41,523 INFO L791 eck$LassoCheckResult]: Stem: 6954#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 6853#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 6854#L395 havoc start_simulation_#t~ret15, start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 6824#L167 assume 1 == ~m_i~0;~m_st~0 := 0; 6825#L174-1 assume !(1 == ~t1_i~0);~t1_st~0 := 2; 6911#L179-1 assume !(0 == ~M_E~0); 6912#L263-1 assume !(0 == ~T1_E~0); 6899#L268-1 assume !(0 == ~E_M~0); 6881#L273-1 assume !(0 == ~E_1~0); 6882#L278-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 6875#L128 assume !(1 == ~m_pc~0); 6876#L128-2 is_master_triggered_~__retres1~0 := 0; 6834#L139 is_master_triggered_#res := is_master_triggered_~__retres1~0; 6835#L140 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 6797#L323 assume !(0 != activate_threads_~tmp~1); 6798#L323-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 6880#L147 assume !(1 == ~t1_pc~0); 6921#L147-2 is_transmit1_triggered_~__retres1~1 := 0; 6815#L158 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 6816#L159 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 6803#L331 assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 6804#L331-2 assume !(1 == ~M_E~0); 6955#L291-1 assume !(1 == ~T1_E~0); 6903#L296-1 assume !(1 == ~E_M~0); 6904#L301-1 assume !(1 == ~E_1~0); 6935#L432-1 assume !false; 7133#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret9, eval_#t~nondet10, eval_~tmp_ndt_1~0, eval_#t~nondet11, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 7131#L238 [2021-10-28 09:04:41,523 INFO L793 eck$LassoCheckResult]: Loop: 7131#L238 assume !false; 7129#L215 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 7127#L192 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 7125#L204 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 7123#L205 eval_#t~ret9 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret9;havoc eval_#t~ret9; 7120#L219 assume 0 != eval_~tmp~0; 7117#L219-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet10;havoc eval_#t~nondet10; 7115#L227 assume !(0 != eval_~tmp_ndt_1~0); 7116#L224 assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet11;havoc eval_#t~nondet11; 7134#L241 assume !(0 != eval_~tmp_ndt_2~0); 7131#L238 [2021-10-28 09:04:41,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:41,524 INFO L85 PathProgramCache]: Analyzing trace with hash -624740157, now seen corresponding path program 1 times [2021-10-28 09:04:41,524 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:41,524 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [213689402] [2021-10-28 09:04:41,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:41,524 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:41,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:41,545 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:41,545 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:41,546 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [213689402] [2021-10-28 09:04:41,546 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [213689402] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:41,546 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:41,546 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:04:41,546 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1527643887] [2021-10-28 09:04:41,547 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 09:04:41,547 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:41,547 INFO L85 PathProgramCache]: Analyzing trace with hash 1675013239, now seen corresponding path program 1 times [2021-10-28 09:04:41,547 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:41,548 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [245798035] [2021-10-28 09:04:41,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:41,548 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:41,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:04:41,552 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:04:41,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:04:41,557 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:04:41,636 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:41,637 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:04:41,637 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:41,637 INFO L87 Difference]: Start difference. First operand 522 states and 662 transitions. cyclomatic complexity: 144 Second operand has 3 states, 3 states have (on average 9.0) internal successors, (27), 3 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:41,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:41,646 INFO L93 Difference]: Finished difference Result 404 states and 515 transitions. [2021-10-28 09:04:41,647 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:04:41,647 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 404 states and 515 transitions. [2021-10-28 09:04:41,652 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 364 [2021-10-28 09:04:41,656 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 404 states to 404 states and 515 transitions. [2021-10-28 09:04:41,656 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 404 [2021-10-28 09:04:41,657 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 404 [2021-10-28 09:04:41,657 INFO L73 IsDeterministic]: Start isDeterministic. Operand 404 states and 515 transitions. [2021-10-28 09:04:41,658 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 09:04:41,658 INFO L681 BuchiCegarLoop]: Abstraction has 404 states and 515 transitions. [2021-10-28 09:04:41,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 404 states and 515 transitions. [2021-10-28 09:04:41,666 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 404 to 404. [2021-10-28 09:04:41,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 404 states, 404 states have (on average 1.2747524752475248) internal successors, (515), 403 states have internal predecessors, (515), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:41,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 404 states to 404 states and 515 transitions. [2021-10-28 09:04:41,670 INFO L704 BuchiCegarLoop]: Abstraction has 404 states and 515 transitions. [2021-10-28 09:04:41,670 INFO L587 BuchiCegarLoop]: Abstraction has 404 states and 515 transitions. [2021-10-28 09:04:41,670 INFO L425 BuchiCegarLoop]: ======== Iteration 11============ [2021-10-28 09:04:41,670 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 404 states and 515 transitions. [2021-10-28 09:04:41,673 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 364 [2021-10-28 09:04:41,674 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 09:04:41,674 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 09:04:41,674 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:41,675 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:41,675 INFO L791 eck$LassoCheckResult]: Stem: 7896#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 7788#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 7789#L395 havoc start_simulation_#t~ret15, start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 7755#L167 assume 1 == ~m_i~0;~m_st~0 := 0; 7756#L174-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 7850#L179-1 assume !(0 == ~M_E~0); 7851#L263-1 assume !(0 == ~T1_E~0); 7840#L268-1 assume !(0 == ~E_M~0); 7817#L273-1 assume !(0 == ~E_1~0); 7818#L278-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 7811#L128 assume !(1 == ~m_pc~0); 7812#L128-2 is_master_triggered_~__retres1~0 := 0; 7767#L139 is_master_triggered_#res := is_master_triggered_~__retres1~0; 7768#L140 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 7729#L323 assume !(0 != activate_threads_~tmp~1); 7730#L323-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 7816#L147 assume !(1 == ~t1_pc~0); 7861#L147-2 is_transmit1_triggered_~__retres1~1 := 0; 7746#L158 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 7747#L159 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 7735#L331 assume !(0 != activate_threads_~tmp___0~0); 7736#L331-2 assume !(1 == ~M_E~0); 7801#L291-1 assume !(1 == ~T1_E~0); 7802#L296-1 assume !(1 == ~E_M~0); 7844#L301-1 assume !(1 == ~E_1~0); 7875#L432-1 assume !false; 7960#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret9, eval_#t~nondet10, eval_~tmp_ndt_1~0, eval_#t~nondet11, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 7959#L238 [2021-10-28 09:04:41,675 INFO L793 eck$LassoCheckResult]: Loop: 7959#L238 assume !false; 7958#L215 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 7957#L192 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 7956#L204 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 7955#L205 eval_#t~ret9 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret9;havoc eval_#t~ret9; 7954#L219 assume 0 != eval_~tmp~0; 7953#L219-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet10;havoc eval_#t~nondet10; 7872#L227 assume !(0 != eval_~tmp_ndt_1~0); 7874#L224 assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet11;havoc eval_#t~nondet11; 7961#L241 assume !(0 != eval_~tmp_ndt_2~0); 7959#L238 [2021-10-28 09:04:41,675 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:41,675 INFO L85 PathProgramCache]: Analyzing trace with hash -1339261757, now seen corresponding path program 2 times [2021-10-28 09:04:41,676 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:41,676 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1972734123] [2021-10-28 09:04:41,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:41,676 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:41,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:04:41,684 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:04:41,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:04:41,698 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:04:41,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:41,699 INFO L85 PathProgramCache]: Analyzing trace with hash 1675013239, now seen corresponding path program 2 times [2021-10-28 09:04:41,699 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:41,699 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1775079266] [2021-10-28 09:04:41,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:41,700 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:41,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:04:41,703 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:04:41,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:04:41,708 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:04:41,709 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:41,709 INFO L85 PathProgramCache]: Analyzing trace with hash 1760009913, now seen corresponding path program 1 times [2021-10-28 09:04:41,709 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:41,709 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [181247292] [2021-10-28 09:04:41,709 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:41,710 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:41,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:04:41,723 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:04:41,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:04:41,751 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:04:42,872 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 28.10 09:04:42 BoogieIcfgContainer [2021-10-28 09:04:42,872 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2021-10-28 09:04:42,873 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-28 09:04:42,873 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-28 09:04:42,873 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-28 09:04:42,874 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 09:04:38" (3/4) ... [2021-10-28 09:04:42,877 INFO L134 WitnessPrinter]: Generating witness for non-termination counterexample [2021-10-28 09:04:42,932 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f0ee92a1-f009-47e8-a776-2e8e24cf5373/bin/uautomizer-UnR33cPsHg/witness.graphml [2021-10-28 09:04:42,932 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-28 09:04:42,934 INFO L168 Benchmark]: Toolchain (without parser) took 6038.89 ms. Allocated memory was 98.6 MB in the beginning and 159.4 MB in the end (delta: 60.8 MB). Free memory was 56.6 MB in the beginning and 93.5 MB in the end (delta: -36.9 MB). Peak memory consumption was 24.2 MB. Max. memory is 16.1 GB. [2021-10-28 09:04:42,935 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 98.6 MB. Free memory was 72.9 MB in the beginning and 72.9 MB in the end (delta: 55.8 kB). There was no memory consumed. Max. memory is 16.1 GB. [2021-10-28 09:04:42,935 INFO L168 Benchmark]: CACSL2BoogieTranslator took 473.63 ms. Allocated memory is still 98.6 MB. Free memory was 56.4 MB in the beginning and 71.2 MB in the end (delta: -14.8 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. [2021-10-28 09:04:42,936 INFO L168 Benchmark]: Boogie Procedure Inliner took 89.71 ms. Allocated memory is still 98.6 MB. Free memory was 71.2 MB in the beginning and 68.7 MB in the end (delta: 2.5 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 09:04:42,936 INFO L168 Benchmark]: Boogie Preprocessor took 71.03 ms. Allocated memory is still 98.6 MB. Free memory was 68.7 MB in the beginning and 66.8 MB in the end (delta: 1.9 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 09:04:42,937 INFO L168 Benchmark]: RCFGBuilder took 847.50 ms. Allocated memory is still 98.6 MB. Free memory was 66.5 MB in the beginning and 47.6 MB in the end (delta: 19.0 MB). Peak memory consumption was 18.9 MB. Max. memory is 16.1 GB. [2021-10-28 09:04:42,937 INFO L168 Benchmark]: BuchiAutomizer took 4483.35 ms. Allocated memory was 98.6 MB in the beginning and 159.4 MB in the end (delta: 60.8 MB). Free memory was 47.3 MB in the beginning and 95.6 MB in the end (delta: -48.4 MB). Peak memory consumption was 49.4 MB. Max. memory is 16.1 GB. [2021-10-28 09:04:42,938 INFO L168 Benchmark]: Witness Printer took 59.38 ms. Allocated memory is still 159.4 MB. Free memory was 95.6 MB in the beginning and 93.5 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 09:04:42,941 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 98.6 MB. Free memory was 72.9 MB in the beginning and 72.9 MB in the end (delta: 55.8 kB). There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 473.63 ms. Allocated memory is still 98.6 MB. Free memory was 56.4 MB in the beginning and 71.2 MB in the end (delta: -14.8 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 89.71 ms. Allocated memory is still 98.6 MB. Free memory was 71.2 MB in the beginning and 68.7 MB in the end (delta: 2.5 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 71.03 ms. Allocated memory is still 98.6 MB. Free memory was 68.7 MB in the beginning and 66.8 MB in the end (delta: 1.9 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 847.50 ms. Allocated memory is still 98.6 MB. Free memory was 66.5 MB in the beginning and 47.6 MB in the end (delta: 19.0 MB). Peak memory consumption was 18.9 MB. Max. memory is 16.1 GB. * BuchiAutomizer took 4483.35 ms. Allocated memory was 98.6 MB in the beginning and 159.4 MB in the end (delta: 60.8 MB). Free memory was 47.3 MB in the beginning and 95.6 MB in the end (delta: -48.4 MB). Peak memory consumption was 49.4 MB. Max. memory is 16.1 GB. * Witness Printer took 59.38 ms. Allocated memory is still 159.4 MB. Free memory was 95.6 MB in the beginning and 93.5 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 10 terminating modules (10 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.10 modules have a trivial ranking function, the largest among these consists of 5 locations. The remainder module has 404 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 4.3s and 11 iterations. TraceHistogramMax:1. Analysis of lassos took 2.7s. Construction of modules took 0.5s. Büchi inclusion checks took 0.4s. Highest rank in rank-based complementation 0. Minimization of det autom 10. Minimization of nondet autom 0. Automata minimization 0.1s AutomataMinimizationTime, 10 MinimizatonAttempts, 872 StatesRemovedByMinimization, 7 NontrivialMinimizations. Non-live state removal took 0.1s Buchi closure took 0.0s. Biggest automaton had 622 states and ocurred in iteration 4. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 2228 SDtfs, 2786 SDslu, 2253 SDs, 0 SdLazy, 329 SolverSat, 102 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.5s Time LassoAnalysisResults: nont1 unkn0 SFLI2 SFLT0 conc1 concLT0 SILN1 SILU0 SILI6 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 214]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {NULL=2} State at position 1 is {NULL=5, NULL=0, \result=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@c89c0d6=0, token=0, __retres1=0, NULL=2, tmp=1, \result=0, kernel_st=1, __retres1=0, tmp___0=0, t1_pc=0, __retres1=1, T1_E=2, NULL=4, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@73e04d7b=0, \result=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@2673227d=0, E_1=2, NULL=0, tmp_ndt_1=0, NULL=0, NULL=0, M_E=2, tmp_ndt_2=0, tmp=0, NULL=3, m_i=1, t1_st=0, local=0, m_st=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@70bd43c8=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@3b842a0=0, E_M=2, NULL=0, tmp___0=0, tmp=0, __retres1=0, t1_i=1, m_pc=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@1e1d036d=0, \result=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@e5dc452=0} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 214]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L16] int m_pc = 0; [L17] int t1_pc = 0; [L18] int m_st ; [L19] int t1_st ; [L20] int m_i ; [L21] int t1_i ; [L22] int M_E = 2; [L23] int T1_E = 2; [L24] int E_M = 2; [L25] int E_1 = 2; [L29] int token ; [L31] int local ; [L477] int __retres1 ; [L392] m_i = 1 [L393] t1_i = 1 [L418] int kernel_st ; [L419] int tmp ; [L420] int tmp___0 ; [L424] kernel_st = 0 [L174] COND TRUE m_i == 1 [L175] m_st = 0 [L179] COND TRUE t1_i == 1 [L180] t1_st = 0 [L263] COND FALSE !(M_E == 0) [L268] COND FALSE !(T1_E == 0) [L273] COND FALSE !(E_M == 0) [L278] COND FALSE !(E_1 == 0) [L316] int tmp ; [L317] int tmp___0 ; [L125] int __retres1 ; [L128] COND FALSE !(m_pc == 1) [L138] __retres1 = 0 [L140] return (__retres1); [L321] tmp = is_master_triggered() [L323] COND FALSE !(\read(tmp)) [L144] int __retres1 ; [L147] COND FALSE !(t1_pc == 1) [L157] __retres1 = 0 [L159] return (__retres1); [L329] tmp___0 = is_transmit1_triggered() [L331] COND FALSE !(\read(tmp___0)) [L291] COND FALSE !(M_E == 1) [L296] COND FALSE !(T1_E == 1) [L301] COND FALSE !(E_M == 1) [L306] COND FALSE !(E_1 == 1) [L432] COND TRUE 1 [L435] kernel_st = 1 [L210] int tmp ; Loop: [L214] COND TRUE 1 [L189] int __retres1 ; [L192] COND TRUE m_st == 0 [L193] __retres1 = 1 [L205] return (__retres1); [L217] tmp = exists_runnable_thread() [L219] COND TRUE \read(tmp) [L224] COND TRUE m_st == 0 [L225] int tmp_ndt_1; [L226] tmp_ndt_1 = __VERIFIER_nondet_int() [L227] COND FALSE !(\read(tmp_ndt_1)) [L238] COND TRUE t1_st == 0 [L239] int tmp_ndt_2; [L240] tmp_ndt_2 = __VERIFIER_nondet_int() [L241] COND FALSE !(\read(tmp_ndt_2)) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2021-10-28 09:04:43,017 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_f0ee92a1-f009-47e8-a776-2e8e24cf5373/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...