./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/systemc/kundu1.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version b2eff8ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/config/AutomizerReach.xml -i ../../sv-benchmarks/c/systemc/kundu1.cil.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 6883d2b914af80a56a19e9a300f45f4d4f22580418e1399c45e995dc6afd242a .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.1-dev-b2eff8b [2021-10-28 08:53:53,583 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-28 08:53:53,585 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-28 08:53:53,634 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-28 08:53:53,635 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-28 08:53:53,641 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-28 08:53:53,643 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-28 08:53:53,647 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-28 08:53:53,650 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-28 08:53:53,658 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-28 08:53:53,659 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-28 08:53:53,661 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-28 08:53:53,661 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-28 08:53:53,664 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-28 08:53:53,667 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-28 08:53:53,672 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-28 08:53:53,675 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-28 08:53:53,676 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-28 08:53:53,679 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-28 08:53:53,693 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-28 08:53:53,695 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-28 08:53:53,696 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-28 08:53:53,700 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-28 08:53:53,701 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-28 08:53:53,705 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-28 08:53:53,705 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-28 08:53:53,706 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-28 08:53:53,708 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-28 08:53:53,709 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-28 08:53:53,711 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-28 08:53:53,712 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-28 08:53:53,713 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-28 08:53:53,715 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-28 08:53:53,716 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-28 08:53:53,718 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-28 08:53:53,718 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-28 08:53:53,719 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-28 08:53:53,719 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-28 08:53:53,720 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-28 08:53:53,721 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-28 08:53:53,722 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-28 08:53:53,723 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/config/svcomp-Reach-32bit-Automizer_Default.epf [2021-10-28 08:53:53,768 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-28 08:53:53,768 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-28 08:53:53,769 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-28 08:53:53,769 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-28 08:53:53,776 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-28 08:53:53,777 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-28 08:53:53,777 INFO L138 SettingsManager]: * Use SBE=true [2021-10-28 08:53:53,778 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-28 08:53:53,778 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-28 08:53:53,778 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-28 08:53:53,779 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-28 08:53:53,780 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-28 08:53:53,780 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-10-28 08:53:53,780 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-10-28 08:53:53,780 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-10-28 08:53:53,781 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-28 08:53:53,781 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-28 08:53:53,781 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-28 08:53:53,781 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-10-28 08:53:53,782 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-28 08:53:53,782 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-28 08:53:53,782 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-10-28 08:53:53,782 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-28 08:53:53,783 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-28 08:53:53,783 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-10-28 08:53:53,783 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-10-28 08:53:53,783 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-28 08:53:53,784 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-10-28 08:53:53,784 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-10-28 08:53:53,785 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2021-10-28 08:53:53,786 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-10-28 08:53:53,786 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-28 08:53:53,786 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6883d2b914af80a56a19e9a300f45f4d4f22580418e1399c45e995dc6afd242a [2021-10-28 08:53:54,047 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-28 08:53:54,081 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-28 08:53:54,083 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-28 08:53:54,085 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-28 08:53:54,085 INFO L275 PluginConnector]: CDTParser initialized [2021-10-28 08:53:54,086 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/../../sv-benchmarks/c/systemc/kundu1.cil.c [2021-10-28 08:53:54,170 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/data/6bc1990e9/10ccd748c13b49049bda0a493fc636b4/FLAG252bd405d [2021-10-28 08:53:54,636 INFO L306 CDTParser]: Found 1 translation units. [2021-10-28 08:53:54,637 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/sv-benchmarks/c/systemc/kundu1.cil.c [2021-10-28 08:53:54,646 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/data/6bc1990e9/10ccd748c13b49049bda0a493fc636b4/FLAG252bd405d [2021-10-28 08:53:54,993 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/data/6bc1990e9/10ccd748c13b49049bda0a493fc636b4 [2021-10-28 08:53:54,995 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-28 08:53:54,997 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-28 08:53:54,998 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-28 08:53:54,999 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-28 08:53:55,002 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-28 08:53:55,003 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 08:53:54" (1/1) ... [2021-10-28 08:53:55,004 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1534fc28 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:53:55, skipping insertion in model container [2021-10-28 08:53:55,004 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 08:53:54" (1/1) ... [2021-10-28 08:53:55,011 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-28 08:53:55,040 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-28 08:53:55,206 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/sv-benchmarks/c/systemc/kundu1.cil.c[331,344] [2021-10-28 08:53:55,260 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 08:53:55,271 INFO L203 MainTranslator]: Completed pre-run [2021-10-28 08:53:55,281 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/sv-benchmarks/c/systemc/kundu1.cil.c[331,344] [2021-10-28 08:53:55,310 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 08:53:55,324 INFO L208 MainTranslator]: Completed translation [2021-10-28 08:53:55,324 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:53:55 WrapperNode [2021-10-28 08:53:55,324 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-28 08:53:55,326 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-28 08:53:55,326 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-28 08:53:55,326 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-28 08:53:55,331 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:53:55" (1/1) ... [2021-10-28 08:53:55,339 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:53:55" (1/1) ... [2021-10-28 08:53:55,371 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-28 08:53:55,372 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-28 08:53:55,372 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-28 08:53:55,372 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-28 08:53:55,380 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:53:55" (1/1) ... [2021-10-28 08:53:55,380 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:53:55" (1/1) ... [2021-10-28 08:53:55,384 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:53:55" (1/1) ... [2021-10-28 08:53:55,385 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:53:55" (1/1) ... [2021-10-28 08:53:55,393 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:53:55" (1/1) ... [2021-10-28 08:53:55,400 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:53:55" (1/1) ... [2021-10-28 08:53:55,402 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:53:55" (1/1) ... [2021-10-28 08:53:55,407 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-28 08:53:55,408 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-28 08:53:55,408 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-28 08:53:55,409 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-28 08:53:55,409 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:53:55" (1/1) ... [2021-10-28 08:53:55,417 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-28 08:53:55,431 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:53:55,446 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-10-28 08:53:55,473 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-10-28 08:53:55,487 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-28 08:53:55,488 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-28 08:53:55,488 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-28 08:53:55,488 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-28 08:53:55,985 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-28 08:53:55,985 INFO L299 CfgBuilder]: Removed 72 assume(true) statements. [2021-10-28 08:53:55,987 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 08:53:55 BoogieIcfgContainer [2021-10-28 08:53:55,987 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-28 08:53:56,005 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-10-28 08:53:56,005 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-10-28 08:53:56,009 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-10-28 08:53:56,038 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.10 08:53:54" (1/3) ... [2021-10-28 08:53:56,038 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2e996ced and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.10 08:53:56, skipping insertion in model container [2021-10-28 08:53:56,039 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:53:55" (2/3) ... [2021-10-28 08:53:56,039 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2e996ced and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.10 08:53:56, skipping insertion in model container [2021-10-28 08:53:56,039 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 08:53:55" (3/3) ... [2021-10-28 08:53:56,041 INFO L111 eAbstractionObserver]: Analyzing ICFG kundu1.cil.c [2021-10-28 08:53:56,055 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-10-28 08:53:56,069 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 3 error locations. [2021-10-28 08:53:56,142 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-10-28 08:53:56,151 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-10-28 08:53:56,151 INFO L340 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2021-10-28 08:53:56,174 INFO L276 IsEmpty]: Start isEmpty. Operand has 117 states, 113 states have (on average 1.5663716814159292) internal successors, (177), 116 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:56,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-28 08:53:56,184 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:53:56,184 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:53:56,185 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:53:56,191 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:53:56,191 INFO L85 PathProgramCache]: Analyzing trace with hash 1913091172, now seen corresponding path program 1 times [2021-10-28 08:53:56,200 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:53:56,200 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1474857717] [2021-10-28 08:53:56,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:53:56,202 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:53:56,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:53:56,441 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:53:56,442 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:53:56,443 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1474857717] [2021-10-28 08:53:56,444 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1474857717] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:53:56,444 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:53:56,444 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:53:56,449 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1015232695] [2021-10-28 08:53:56,466 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 08:53:56,467 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:53:56,485 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:53:56,486 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:53:56,489 INFO L87 Difference]: Start difference. First operand has 117 states, 113 states have (on average 1.5663716814159292) internal successors, (177), 116 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:56,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:53:56,573 INFO L93 Difference]: Finished difference Result 228 states and 346 transitions. [2021-10-28 08:53:56,573 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:53:56,575 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-28 08:53:56,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:53:56,591 INFO L225 Difference]: With dead ends: 228 [2021-10-28 08:53:56,592 INFO L226 Difference]: Without dead ends: 112 [2021-10-28 08:53:56,596 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:53:56,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2021-10-28 08:53:56,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2021-10-28 08:53:56,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 112 states, 109 states have (on average 1.4862385321100917) internal successors, (162), 111 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:56,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 162 transitions. [2021-10-28 08:53:56,662 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 162 transitions. Word has length 33 [2021-10-28 08:53:56,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:53:56,664 INFO L470 AbstractCegarLoop]: Abstraction has 112 states and 162 transitions. [2021-10-28 08:53:56,664 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:56,665 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 162 transitions. [2021-10-28 08:53:56,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-28 08:53:56,668 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:53:56,669 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:53:56,669 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-10-28 08:53:56,669 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:53:56,672 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:53:56,673 INFO L85 PathProgramCache]: Analyzing trace with hash 526887778, now seen corresponding path program 1 times [2021-10-28 08:53:56,673 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:53:56,673 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1768309428] [2021-10-28 08:53:56,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:53:56,674 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:53:56,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:53:56,756 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:53:56,756 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:53:56,757 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1768309428] [2021-10-28 08:53:56,757 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1768309428] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:53:56,757 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:53:56,758 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:53:56,758 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1475651966] [2021-10-28 08:53:56,759 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 08:53:56,759 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:53:56,760 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:53:56,760 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:53:56,761 INFO L87 Difference]: Start difference. First operand 112 states and 162 transitions. Second operand has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:56,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:53:56,812 INFO L93 Difference]: Finished difference Result 304 states and 439 transitions. [2021-10-28 08:53:56,812 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:53:56,813 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-28 08:53:56,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:53:56,815 INFO L225 Difference]: With dead ends: 304 [2021-10-28 08:53:56,815 INFO L226 Difference]: Without dead ends: 199 [2021-10-28 08:53:56,816 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:53:56,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199 states. [2021-10-28 08:53:56,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199 to 189. [2021-10-28 08:53:56,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 189 states, 186 states have (on average 1.467741935483871) internal successors, (273), 188 states have internal predecessors, (273), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:56,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 273 transitions. [2021-10-28 08:53:56,839 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 273 transitions. Word has length 33 [2021-10-28 08:53:56,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:53:56,840 INFO L470 AbstractCegarLoop]: Abstraction has 189 states and 273 transitions. [2021-10-28 08:53:56,840 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:56,840 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 273 transitions. [2021-10-28 08:53:56,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-28 08:53:56,842 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:53:56,842 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:53:56,842 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-10-28 08:53:56,843 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:53:56,843 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:53:56,843 INFO L85 PathProgramCache]: Analyzing trace with hash -1145629853, now seen corresponding path program 1 times [2021-10-28 08:53:56,844 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:53:56,844 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1446584179] [2021-10-28 08:53:56,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:53:56,844 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:53:56,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:53:56,942 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:53:56,943 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:53:56,944 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1446584179] [2021-10-28 08:53:56,946 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1446584179] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:53:56,947 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:53:56,947 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 08:53:56,948 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1775123725] [2021-10-28 08:53:56,949 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 08:53:56,950 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:53:56,950 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 08:53:56,951 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:53:56,951 INFO L87 Difference]: Start difference. First operand 189 states and 273 transitions. Second operand has 5 states, 5 states have (on average 6.6) internal successors, (33), 5 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:57,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:53:57,115 INFO L93 Difference]: Finished difference Result 591 states and 861 transitions. [2021-10-28 08:53:57,115 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 08:53:57,116 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 5 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-28 08:53:57,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:53:57,119 INFO L225 Difference]: With dead ends: 591 [2021-10-28 08:53:57,120 INFO L226 Difference]: Without dead ends: 413 [2021-10-28 08:53:57,121 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-10-28 08:53:57,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 413 states. [2021-10-28 08:53:57,165 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 413 to 195. [2021-10-28 08:53:57,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 195 states, 192 states have (on average 1.4375) internal successors, (276), 194 states have internal predecessors, (276), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:57,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 276 transitions. [2021-10-28 08:53:57,170 INFO L78 Accepts]: Start accepts. Automaton has 195 states and 276 transitions. Word has length 33 [2021-10-28 08:53:57,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:53:57,171 INFO L470 AbstractCegarLoop]: Abstraction has 195 states and 276 transitions. [2021-10-28 08:53:57,171 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 5 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:57,171 INFO L276 IsEmpty]: Start isEmpty. Operand 195 states and 276 transitions. [2021-10-28 08:53:57,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-28 08:53:57,179 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:53:57,179 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:53:57,179 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-10-28 08:53:57,179 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:53:57,180 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:53:57,180 INFO L85 PathProgramCache]: Analyzing trace with hash 1343899109, now seen corresponding path program 1 times [2021-10-28 08:53:57,181 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:53:57,181 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [647689035] [2021-10-28 08:53:57,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:53:57,181 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:53:57,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:53:57,261 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:53:57,262 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:53:57,262 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [647689035] [2021-10-28 08:53:57,265 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [647689035] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:53:57,266 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:53:57,266 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 08:53:57,266 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [191983925] [2021-10-28 08:53:57,267 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 08:53:57,267 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:53:57,268 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 08:53:57,268 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 08:53:57,269 INFO L87 Difference]: Start difference. First operand 195 states and 276 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:57,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:53:57,425 INFO L93 Difference]: Finished difference Result 621 states and 872 transitions. [2021-10-28 08:53:57,425 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 08:53:57,426 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-28 08:53:57,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:53:57,430 INFO L225 Difference]: With dead ends: 621 [2021-10-28 08:53:57,431 INFO L226 Difference]: Without dead ends: 439 [2021-10-28 08:53:57,435 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:53:57,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 439 states. [2021-10-28 08:53:57,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 439 to 333. [2021-10-28 08:53:57,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 333 states, 330 states have (on average 1.406060606060606) internal successors, (464), 332 states have internal predecessors, (464), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:57,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 333 states to 333 states and 464 transitions. [2021-10-28 08:53:57,492 INFO L78 Accepts]: Start accepts. Automaton has 333 states and 464 transitions. Word has length 33 [2021-10-28 08:53:57,492 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:53:57,492 INFO L470 AbstractCegarLoop]: Abstraction has 333 states and 464 transitions. [2021-10-28 08:53:57,492 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:57,493 INFO L276 IsEmpty]: Start isEmpty. Operand 333 states and 464 transitions. [2021-10-28 08:53:57,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2021-10-28 08:53:57,494 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:53:57,494 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:53:57,495 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-10-28 08:53:57,495 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:53:57,495 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:53:57,497 INFO L85 PathProgramCache]: Analyzing trace with hash -1179728243, now seen corresponding path program 1 times [2021-10-28 08:53:57,497 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:53:57,498 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [239364022] [2021-10-28 08:53:57,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:53:57,498 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:53:57,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:53:57,589 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:53:57,590 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:53:57,591 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [239364022] [2021-10-28 08:53:57,591 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [239364022] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:53:57,591 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:53:57,591 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 08:53:57,592 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1424004419] [2021-10-28 08:53:57,592 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 08:53:57,592 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:53:57,593 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 08:53:57,593 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:53:57,593 INFO L87 Difference]: Start difference. First operand 333 states and 464 transitions. Second operand has 5 states, 5 states have (on average 6.8) internal successors, (34), 5 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:57,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:53:57,742 INFO L93 Difference]: Finished difference Result 1126 states and 1579 transitions. [2021-10-28 08:53:57,742 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 08:53:57,742 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 6.8) internal successors, (34), 5 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 34 [2021-10-28 08:53:57,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:53:57,749 INFO L225 Difference]: With dead ends: 1126 [2021-10-28 08:53:57,749 INFO L226 Difference]: Without dead ends: 812 [2021-10-28 08:53:57,750 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-10-28 08:53:57,751 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 812 states. [2021-10-28 08:53:57,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 812 to 360. [2021-10-28 08:53:57,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 360 states, 357 states have (on average 1.3753501400560224) internal successors, (491), 359 states have internal predecessors, (491), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:57,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 360 states to 360 states and 491 transitions. [2021-10-28 08:53:57,797 INFO L78 Accepts]: Start accepts. Automaton has 360 states and 491 transitions. Word has length 34 [2021-10-28 08:53:57,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:53:57,798 INFO L470 AbstractCegarLoop]: Abstraction has 360 states and 491 transitions. [2021-10-28 08:53:57,799 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.8) internal successors, (34), 5 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:57,799 INFO L276 IsEmpty]: Start isEmpty. Operand 360 states and 491 transitions. [2021-10-28 08:53:57,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2021-10-28 08:53:57,802 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:53:57,802 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:53:57,802 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-10-28 08:53:57,803 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:53:57,803 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:53:57,803 INFO L85 PathProgramCache]: Analyzing trace with hash 1526891151, now seen corresponding path program 1 times [2021-10-28 08:53:57,803 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:53:57,804 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [970324888] [2021-10-28 08:53:57,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:53:57,804 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:53:57,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:53:57,881 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:53:57,881 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:53:57,881 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [970324888] [2021-10-28 08:53:57,882 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [970324888] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:53:57,882 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:53:57,882 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 08:53:57,883 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1461409077] [2021-10-28 08:53:57,887 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 08:53:57,887 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:53:57,888 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 08:53:57,888 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 08:53:57,889 INFO L87 Difference]: Start difference. First operand 360 states and 491 transitions. Second operand has 4 states, 4 states have (on average 8.5) internal successors, (34), 4 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:58,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:53:58,037 INFO L93 Difference]: Finished difference Result 1662 states and 2286 transitions. [2021-10-28 08:53:58,037 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 08:53:58,038 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.5) internal successors, (34), 4 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 34 [2021-10-28 08:53:58,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:53:58,055 INFO L225 Difference]: With dead ends: 1662 [2021-10-28 08:53:58,055 INFO L226 Difference]: Without dead ends: 1324 [2021-10-28 08:53:58,057 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:53:58,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1324 states. [2021-10-28 08:53:58,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1324 to 674. [2021-10-28 08:53:58,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 674 states, 671 states have (on average 1.375558867362146) internal successors, (923), 673 states have internal predecessors, (923), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:58,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 674 states to 674 states and 923 transitions. [2021-10-28 08:53:58,142 INFO L78 Accepts]: Start accepts. Automaton has 674 states and 923 transitions. Word has length 34 [2021-10-28 08:53:58,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:53:58,144 INFO L470 AbstractCegarLoop]: Abstraction has 674 states and 923 transitions. [2021-10-28 08:53:58,144 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.5) internal successors, (34), 4 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:58,145 INFO L276 IsEmpty]: Start isEmpty. Operand 674 states and 923 transitions. [2021-10-28 08:53:58,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2021-10-28 08:53:58,145 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:53:58,146 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:53:58,146 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-10-28 08:53:58,146 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:53:58,147 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:53:58,147 INFO L85 PathProgramCache]: Analyzing trace with hash -1026068075, now seen corresponding path program 1 times [2021-10-28 08:53:58,147 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:53:58,151 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [976190182] [2021-10-28 08:53:58,152 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:53:58,152 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:53:58,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:53:58,247 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:53:58,248 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:53:58,248 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [976190182] [2021-10-28 08:53:58,248 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [976190182] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:53:58,248 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:53:58,249 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 08:53:58,249 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [109566845] [2021-10-28 08:53:58,249 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 08:53:58,249 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:53:58,250 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 08:53:58,250 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:53:58,251 INFO L87 Difference]: Start difference. First operand 674 states and 923 transitions. Second operand has 5 states, 5 states have (on average 8.2) internal successors, (41), 5 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:58,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:53:58,402 INFO L93 Difference]: Finished difference Result 1497 states and 2054 transitions. [2021-10-28 08:53:58,403 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 08:53:58,403 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.2) internal successors, (41), 5 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 41 [2021-10-28 08:53:58,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:53:58,409 INFO L225 Difference]: With dead ends: 1497 [2021-10-28 08:53:58,409 INFO L226 Difference]: Without dead ends: 845 [2021-10-28 08:53:58,411 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:53:58,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 845 states. [2021-10-28 08:53:58,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 845 to 837. [2021-10-28 08:53:58,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 837 states, 834 states have (on average 1.3717026378896882) internal successors, (1144), 836 states have internal predecessors, (1144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:58,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 837 states to 837 states and 1144 transitions. [2021-10-28 08:53:58,518 INFO L78 Accepts]: Start accepts. Automaton has 837 states and 1144 transitions. Word has length 41 [2021-10-28 08:53:58,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:53:58,518 INFO L470 AbstractCegarLoop]: Abstraction has 837 states and 1144 transitions. [2021-10-28 08:53:58,518 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 8.2) internal successors, (41), 5 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:58,519 INFO L276 IsEmpty]: Start isEmpty. Operand 837 states and 1144 transitions. [2021-10-28 08:53:58,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2021-10-28 08:53:58,521 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:53:58,521 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:53:58,521 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-10-28 08:53:58,522 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:53:58,522 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:53:58,522 INFO L85 PathProgramCache]: Analyzing trace with hash -305826283, now seen corresponding path program 1 times [2021-10-28 08:53:58,523 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:53:58,523 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [378899723] [2021-10-28 08:53:58,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:53:58,523 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:53:58,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:53:58,655 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:53:58,656 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:53:58,656 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [378899723] [2021-10-28 08:53:58,656 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [378899723] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:53:58,656 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:53:58,656 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 08:53:58,657 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [478212146] [2021-10-28 08:53:58,657 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 08:53:58,657 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:53:58,658 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 08:53:58,658 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:53:58,659 INFO L87 Difference]: Start difference. First operand 837 states and 1144 transitions. Second operand has 5 states, 5 states have (on average 8.8) internal successors, (44), 5 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:59,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:53:59,026 INFO L93 Difference]: Finished difference Result 3287 states and 4502 transitions. [2021-10-28 08:53:59,027 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-28 08:53:59,027 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.8) internal successors, (44), 5 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2021-10-28 08:53:59,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:53:59,042 INFO L225 Difference]: With dead ends: 3287 [2021-10-28 08:53:59,042 INFO L226 Difference]: Without dead ends: 2472 [2021-10-28 08:53:59,044 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2021-10-28 08:53:59,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2472 states. [2021-10-28 08:53:59,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2472 to 1321. [2021-10-28 08:53:59,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1321 states, 1318 states have (on average 1.370257966616085) internal successors, (1806), 1320 states have internal predecessors, (1806), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:59,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1321 states to 1321 states and 1806 transitions. [2021-10-28 08:53:59,189 INFO L78 Accepts]: Start accepts. Automaton has 1321 states and 1806 transitions. Word has length 44 [2021-10-28 08:53:59,189 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:53:59,189 INFO L470 AbstractCegarLoop]: Abstraction has 1321 states and 1806 transitions. [2021-10-28 08:53:59,190 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 8.8) internal successors, (44), 5 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:59,190 INFO L276 IsEmpty]: Start isEmpty. Operand 1321 states and 1806 transitions. [2021-10-28 08:53:59,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2021-10-28 08:53:59,191 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:53:59,191 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:53:59,191 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-10-28 08:53:59,191 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:53:59,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:53:59,192 INFO L85 PathProgramCache]: Analyzing trace with hash -1702134670, now seen corresponding path program 1 times [2021-10-28 08:53:59,192 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:53:59,192 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1227707148] [2021-10-28 08:53:59,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:53:59,193 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:53:59,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:53:59,229 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2021-10-28 08:53:59,229 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:53:59,229 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1227707148] [2021-10-28 08:53:59,230 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1227707148] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:53:59,230 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:53:59,230 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:53:59,230 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2137919345] [2021-10-28 08:53:59,231 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 08:53:59,231 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:53:59,231 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:53:59,232 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:53:59,232 INFO L87 Difference]: Start difference. First operand 1321 states and 1806 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:59,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:53:59,518 INFO L93 Difference]: Finished difference Result 3798 states and 5147 transitions. [2021-10-28 08:53:59,519 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:53:59,519 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 46 [2021-10-28 08:53:59,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:53:59,533 INFO L225 Difference]: With dead ends: 3798 [2021-10-28 08:53:59,533 INFO L226 Difference]: Without dead ends: 2499 [2021-10-28 08:53:59,537 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:53:59,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2499 states. [2021-10-28 08:53:59,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2499 to 2495. [2021-10-28 08:53:59,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2495 states, 2492 states have (on average 1.3246388443017656) internal successors, (3301), 2494 states have internal predecessors, (3301), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:59,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2495 states to 2495 states and 3301 transitions. [2021-10-28 08:53:59,816 INFO L78 Accepts]: Start accepts. Automaton has 2495 states and 3301 transitions. Word has length 46 [2021-10-28 08:53:59,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:53:59,817 INFO L470 AbstractCegarLoop]: Abstraction has 2495 states and 3301 transitions. [2021-10-28 08:53:59,817 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:53:59,817 INFO L276 IsEmpty]: Start isEmpty. Operand 2495 states and 3301 transitions. [2021-10-28 08:53:59,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2021-10-28 08:53:59,818 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:53:59,819 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:53:59,819 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-10-28 08:53:59,819 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:53:59,820 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:53:59,821 INFO L85 PathProgramCache]: Analyzing trace with hash 1664931104, now seen corresponding path program 1 times [2021-10-28 08:53:59,821 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:53:59,822 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1134079432] [2021-10-28 08:53:59,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:53:59,823 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:53:59,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:53:59,893 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:53:59,893 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:53:59,894 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1134079432] [2021-10-28 08:53:59,894 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1134079432] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:53:59,894 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:53:59,894 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 08:53:59,894 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1994867847] [2021-10-28 08:53:59,895 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 08:53:59,895 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:53:59,896 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 08:53:59,896 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 08:53:59,897 INFO L87 Difference]: Start difference. First operand 2495 states and 3301 transitions. Second operand has 4 states, 4 states have (on average 12.0) internal successors, (48), 4 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:00,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:54:00,640 INFO L93 Difference]: Finished difference Result 9142 states and 11944 transitions. [2021-10-28 08:54:00,641 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 08:54:00,641 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.0) internal successors, (48), 4 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 48 [2021-10-28 08:54:00,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:54:00,678 INFO L225 Difference]: With dead ends: 9142 [2021-10-28 08:54:00,678 INFO L226 Difference]: Without dead ends: 6671 [2021-10-28 08:54:00,683 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:54:00,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6671 states. [2021-10-28 08:54:01,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6671 to 5850. [2021-10-28 08:54:01,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5850 states, 5847 states have (on average 1.2825380537027535) internal successors, (7499), 5849 states have internal predecessors, (7499), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:01,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5850 states to 5850 states and 7499 transitions. [2021-10-28 08:54:01,317 INFO L78 Accepts]: Start accepts. Automaton has 5850 states and 7499 transitions. Word has length 48 [2021-10-28 08:54:01,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:54:01,317 INFO L470 AbstractCegarLoop]: Abstraction has 5850 states and 7499 transitions. [2021-10-28 08:54:01,317 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.0) internal successors, (48), 4 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:01,318 INFO L276 IsEmpty]: Start isEmpty. Operand 5850 states and 7499 transitions. [2021-10-28 08:54:01,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2021-10-28 08:54:01,319 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:54:01,319 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:54:01,319 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-10-28 08:54:01,320 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:54:01,320 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:54:01,321 INFO L85 PathProgramCache]: Analyzing trace with hash 403090641, now seen corresponding path program 1 times [2021-10-28 08:54:01,321 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:54:01,321 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [107169245] [2021-10-28 08:54:01,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:54:01,321 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:54:01,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:54:01,379 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:54:01,379 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:54:01,379 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [107169245] [2021-10-28 08:54:01,379 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [107169245] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:54:01,379 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:54:01,380 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:54:01,380 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [6606235] [2021-10-28 08:54:01,380 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 08:54:01,380 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:54:01,381 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:54:01,381 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:54:01,381 INFO L87 Difference]: Start difference. First operand 5850 states and 7499 transitions. Second operand has 3 states, 3 states have (on average 16.0) internal successors, (48), 3 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:01,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:54:01,902 INFO L93 Difference]: Finished difference Result 11044 states and 14195 transitions. [2021-10-28 08:54:01,903 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:54:01,903 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 16.0) internal successors, (48), 3 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 48 [2021-10-28 08:54:01,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:54:01,936 INFO L225 Difference]: With dead ends: 11044 [2021-10-28 08:54:01,936 INFO L226 Difference]: Without dead ends: 5852 [2021-10-28 08:54:01,944 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:54:01,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5852 states. [2021-10-28 08:54:02,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5852 to 5850. [2021-10-28 08:54:02,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5850 states, 5847 states have (on average 1.2645801265606293) internal successors, (7394), 5849 states have internal predecessors, (7394), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:02,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5850 states to 5850 states and 7394 transitions. [2021-10-28 08:54:02,507 INFO L78 Accepts]: Start accepts. Automaton has 5850 states and 7394 transitions. Word has length 48 [2021-10-28 08:54:02,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:54:02,508 INFO L470 AbstractCegarLoop]: Abstraction has 5850 states and 7394 transitions. [2021-10-28 08:54:02,508 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 16.0) internal successors, (48), 3 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:02,508 INFO L276 IsEmpty]: Start isEmpty. Operand 5850 states and 7394 transitions. [2021-10-28 08:54:02,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2021-10-28 08:54:02,510 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:54:02,510 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:54:02,510 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-10-28 08:54:02,510 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:54:02,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:54:02,511 INFO L85 PathProgramCache]: Analyzing trace with hash 57108908, now seen corresponding path program 1 times [2021-10-28 08:54:02,511 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:54:02,512 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [245709211] [2021-10-28 08:54:02,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:54:02,512 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:54:02,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:54:02,552 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:54:02,553 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:54:02,553 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [245709211] [2021-10-28 08:54:02,553 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [245709211] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:54:02,553 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:54:02,553 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 08:54:02,553 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1628623465] [2021-10-28 08:54:02,554 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 08:54:02,554 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:54:02,554 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 08:54:02,555 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 08:54:02,555 INFO L87 Difference]: Start difference. First operand 5850 states and 7394 transitions. Second operand has 4 states, 4 states have (on average 12.25) internal successors, (49), 4 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:03,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:54:03,177 INFO L93 Difference]: Finished difference Result 10959 states and 13890 transitions. [2021-10-28 08:54:03,178 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 08:54:03,178 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 4 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 49 [2021-10-28 08:54:03,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:54:03,202 INFO L225 Difference]: With dead ends: 10959 [2021-10-28 08:54:03,202 INFO L226 Difference]: Without dead ends: 5025 [2021-10-28 08:54:03,210 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:54:03,215 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5025 states. [2021-10-28 08:54:03,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5025 to 4818. [2021-10-28 08:54:03,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4818 states, 4815 states have (on average 1.2444444444444445) internal successors, (5992), 4817 states have internal predecessors, (5992), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:03,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4818 states to 4818 states and 5992 transitions. [2021-10-28 08:54:03,581 INFO L78 Accepts]: Start accepts. Automaton has 4818 states and 5992 transitions. Word has length 49 [2021-10-28 08:54:03,581 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:54:03,581 INFO L470 AbstractCegarLoop]: Abstraction has 4818 states and 5992 transitions. [2021-10-28 08:54:03,582 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 4 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:03,582 INFO L276 IsEmpty]: Start isEmpty. Operand 4818 states and 5992 transitions. [2021-10-28 08:54:03,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2021-10-28 08:54:03,585 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:54:03,585 INFO L513 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:54:03,585 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-10-28 08:54:03,586 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:54:03,586 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:54:03,586 INFO L85 PathProgramCache]: Analyzing trace with hash 652914839, now seen corresponding path program 1 times [2021-10-28 08:54:03,586 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:54:03,587 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1446016953] [2021-10-28 08:54:03,587 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:54:03,587 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:54:03,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:54:03,623 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2021-10-28 08:54:03,624 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:54:03,624 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1446016953] [2021-10-28 08:54:03,624 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1446016953] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:54:03,624 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:54:03,625 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 08:54:03,625 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [683409248] [2021-10-28 08:54:03,625 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 08:54:03,625 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:54:03,626 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 08:54:03,626 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:54:03,626 INFO L87 Difference]: Start difference. First operand 4818 states and 5992 transitions. Second operand has 5 states, 5 states have (on average 16.2) internal successors, (81), 5 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:03,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:54:03,991 INFO L93 Difference]: Finished difference Result 8530 states and 10636 transitions. [2021-10-28 08:54:03,991 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-28 08:54:03,992 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 16.2) internal successors, (81), 5 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 83 [2021-10-28 08:54:03,992 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:54:04,001 INFO L225 Difference]: With dead ends: 8530 [2021-10-28 08:54:04,001 INFO L226 Difference]: Without dead ends: 3744 [2021-10-28 08:54:04,008 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-28 08:54:04,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3744 states. [2021-10-28 08:54:04,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3744 to 3233. [2021-10-28 08:54:04,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3233 states, 3230 states have (on average 1.2492260061919505) internal successors, (4035), 3232 states have internal predecessors, (4035), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:04,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3233 states to 3233 states and 4035 transitions. [2021-10-28 08:54:04,277 INFO L78 Accepts]: Start accepts. Automaton has 3233 states and 4035 transitions. Word has length 83 [2021-10-28 08:54:04,277 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:54:04,278 INFO L470 AbstractCegarLoop]: Abstraction has 3233 states and 4035 transitions. [2021-10-28 08:54:04,278 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 16.2) internal successors, (81), 5 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:04,278 INFO L276 IsEmpty]: Start isEmpty. Operand 3233 states and 4035 transitions. [2021-10-28 08:54:04,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2021-10-28 08:54:04,281 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:54:04,281 INFO L513 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:54:04,281 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-10-28 08:54:04,281 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:54:04,281 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:54:04,282 INFO L85 PathProgramCache]: Analyzing trace with hash 994874622, now seen corresponding path program 1 times [2021-10-28 08:54:04,282 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:54:04,282 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1676282739] [2021-10-28 08:54:04,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:54:04,282 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:54:04,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:54:04,303 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2021-10-28 08:54:04,303 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:54:04,303 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1676282739] [2021-10-28 08:54:04,303 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1676282739] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:54:04,304 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:54:04,304 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:54:04,304 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [656343603] [2021-10-28 08:54:04,304 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 08:54:04,305 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:54:04,305 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:54:04,305 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:54:04,305 INFO L87 Difference]: Start difference. First operand 3233 states and 4035 transitions. Second operand has 3 states, 3 states have (on average 23.0) internal successors, (69), 3 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:04,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:54:04,535 INFO L93 Difference]: Finished difference Result 3603 states and 4476 transitions. [2021-10-28 08:54:04,536 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:54:04,536 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.0) internal successors, (69), 3 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 86 [2021-10-28 08:54:04,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:54:04,544 INFO L225 Difference]: With dead ends: 3603 [2021-10-28 08:54:04,544 INFO L226 Difference]: Without dead ends: 3217 [2021-10-28 08:54:04,546 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:54:04,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3217 states. [2021-10-28 08:54:04,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3217 to 3217. [2021-10-28 08:54:04,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3217 states, 3214 states have (on average 1.2501555693839452) internal successors, (4018), 3216 states have internal predecessors, (4018), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:04,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3217 states to 3217 states and 4018 transitions. [2021-10-28 08:54:04,768 INFO L78 Accepts]: Start accepts. Automaton has 3217 states and 4018 transitions. Word has length 86 [2021-10-28 08:54:04,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:54:04,768 INFO L470 AbstractCegarLoop]: Abstraction has 3217 states and 4018 transitions. [2021-10-28 08:54:04,768 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.0) internal successors, (69), 3 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:04,769 INFO L276 IsEmpty]: Start isEmpty. Operand 3217 states and 4018 transitions. [2021-10-28 08:54:04,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2021-10-28 08:54:04,771 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:54:04,772 INFO L513 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:54:04,772 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-10-28 08:54:04,772 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:54:04,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:54:04,773 INFO L85 PathProgramCache]: Analyzing trace with hash -684103662, now seen corresponding path program 1 times [2021-10-28 08:54:04,773 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:54:04,773 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1939983449] [2021-10-28 08:54:04,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:54:04,773 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:54:04,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:54:04,830 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-10-28 08:54:04,831 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:54:04,831 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1939983449] [2021-10-28 08:54:04,831 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1939983449] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:54:04,831 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:54:04,831 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:54:04,832 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1828603590] [2021-10-28 08:54:04,832 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 08:54:04,832 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:54:04,833 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:54:04,833 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:54:04,833 INFO L87 Difference]: Start difference. First operand 3217 states and 4018 transitions. Second operand has 3 states, 3 states have (on average 28.333333333333332) internal successors, (85), 3 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:05,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:54:05,062 INFO L93 Difference]: Finished difference Result 3713 states and 4608 transitions. [2021-10-28 08:54:05,063 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:54:05,063 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 28.333333333333332) internal successors, (85), 3 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 89 [2021-10-28 08:54:05,063 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:54:05,070 INFO L225 Difference]: With dead ends: 3713 [2021-10-28 08:54:05,071 INFO L226 Difference]: Without dead ends: 3202 [2021-10-28 08:54:05,072 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:54:05,077 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3202 states. [2021-10-28 08:54:05,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3202 to 3195. [2021-10-28 08:54:05,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3195 states, 3192 states have (on average 1.25062656641604) internal successors, (3992), 3194 states have internal predecessors, (3992), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:05,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3195 states to 3195 states and 3992 transitions. [2021-10-28 08:54:05,358 INFO L78 Accepts]: Start accepts. Automaton has 3195 states and 3992 transitions. Word has length 89 [2021-10-28 08:54:05,359 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:54:05,359 INFO L470 AbstractCegarLoop]: Abstraction has 3195 states and 3992 transitions. [2021-10-28 08:54:05,359 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 28.333333333333332) internal successors, (85), 3 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:05,359 INFO L276 IsEmpty]: Start isEmpty. Operand 3195 states and 3992 transitions. [2021-10-28 08:54:05,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2021-10-28 08:54:05,363 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:54:05,363 INFO L513 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:54:05,363 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-10-28 08:54:05,363 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:54:05,364 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:54:05,364 INFO L85 PathProgramCache]: Analyzing trace with hash -1261043826, now seen corresponding path program 1 times [2021-10-28 08:54:05,364 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:54:05,364 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1054489431] [2021-10-28 08:54:05,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:54:05,365 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:54:05,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:54:05,409 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-10-28 08:54:05,409 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:54:05,409 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1054489431] [2021-10-28 08:54:05,410 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1054489431] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:54:05,410 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:54:05,410 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 08:54:05,410 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1863886986] [2021-10-28 08:54:05,411 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 08:54:05,411 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:54:05,411 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 08:54:05,411 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:54:05,412 INFO L87 Difference]: Start difference. First operand 3195 states and 3992 transitions. Second operand has 5 states, 5 states have (on average 18.2) internal successors, (91), 4 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:05,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:54:05,849 INFO L93 Difference]: Finished difference Result 7032 states and 8724 transitions. [2021-10-28 08:54:05,849 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 08:54:05,849 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 18.2) internal successors, (91), 4 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 95 [2021-10-28 08:54:05,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:54:05,858 INFO L225 Difference]: With dead ends: 7032 [2021-10-28 08:54:05,859 INFO L226 Difference]: Without dead ends: 3897 [2021-10-28 08:54:05,864 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2021-10-28 08:54:05,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3897 states. [2021-10-28 08:54:06,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3897 to 3073. [2021-10-28 08:54:06,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3073 states, 3070 states have (on average 1.239413680781759) internal successors, (3805), 3072 states have internal predecessors, (3805), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:06,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3073 states to 3073 states and 3805 transitions. [2021-10-28 08:54:06,154 INFO L78 Accepts]: Start accepts. Automaton has 3073 states and 3805 transitions. Word has length 95 [2021-10-28 08:54:06,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:54:06,155 INFO L470 AbstractCegarLoop]: Abstraction has 3073 states and 3805 transitions. [2021-10-28 08:54:06,156 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 18.2) internal successors, (91), 4 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:06,156 INFO L276 IsEmpty]: Start isEmpty. Operand 3073 states and 3805 transitions. [2021-10-28 08:54:06,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2021-10-28 08:54:06,159 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:54:06,159 INFO L513 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:54:06,159 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-10-28 08:54:06,159 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:54:06,160 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:54:06,160 INFO L85 PathProgramCache]: Analyzing trace with hash -666432318, now seen corresponding path program 1 times [2021-10-28 08:54:06,160 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:54:06,160 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [946965954] [2021-10-28 08:54:06,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:54:06,160 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:54:06,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:54:06,202 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2021-10-28 08:54:06,202 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:54:06,202 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [946965954] [2021-10-28 08:54:06,202 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [946965954] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:54:06,202 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:54:06,203 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 08:54:06,203 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [92222631] [2021-10-28 08:54:06,203 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 08:54:06,203 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:54:06,204 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 08:54:06,204 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:54:06,204 INFO L87 Difference]: Start difference. First operand 3073 states and 3805 transitions. Second operand has 5 states, 5 states have (on average 17.4) internal successors, (87), 4 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:06,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:54:06,539 INFO L93 Difference]: Finished difference Result 5583 states and 6899 transitions. [2021-10-28 08:54:06,539 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 08:54:06,540 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 17.4) internal successors, (87), 4 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 98 [2021-10-28 08:54:06,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:54:06,544 INFO L225 Difference]: With dead ends: 5583 [2021-10-28 08:54:06,544 INFO L226 Difference]: Without dead ends: 2208 [2021-10-28 08:54:06,548 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2021-10-28 08:54:06,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2208 states. [2021-10-28 08:54:06,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2208 to 2050. [2021-10-28 08:54:06,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2050 states, 2048 states have (on average 1.22802734375) internal successors, (2515), 2049 states have internal predecessors, (2515), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:06,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2050 states to 2050 states and 2515 transitions. [2021-10-28 08:54:06,768 INFO L78 Accepts]: Start accepts. Automaton has 2050 states and 2515 transitions. Word has length 98 [2021-10-28 08:54:06,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:54:06,768 INFO L470 AbstractCegarLoop]: Abstraction has 2050 states and 2515 transitions. [2021-10-28 08:54:06,768 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 17.4) internal successors, (87), 4 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:06,769 INFO L276 IsEmpty]: Start isEmpty. Operand 2050 states and 2515 transitions. [2021-10-28 08:54:06,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2021-10-28 08:54:06,771 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:54:06,771 INFO L513 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:54:06,771 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-10-28 08:54:06,772 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:54:06,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:54:06,772 INFO L85 PathProgramCache]: Analyzing trace with hash -165994237, now seen corresponding path program 1 times [2021-10-28 08:54:06,772 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:54:06,773 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [379179943] [2021-10-28 08:54:06,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:54:06,773 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:54:06,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:54:06,805 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:54:06,805 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:54:06,805 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [379179943] [2021-10-28 08:54:06,805 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [379179943] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:54:06,806 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:54:06,806 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:54:06,806 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1363483628] [2021-10-28 08:54:06,806 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 08:54:06,807 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:54:06,807 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:54:06,807 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:54:06,808 INFO L87 Difference]: Start difference. First operand 2050 states and 2515 transitions. Second operand has 3 states, 3 states have (on average 37.0) internal successors, (111), 3 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:07,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:54:07,011 INFO L93 Difference]: Finished difference Result 3786 states and 4676 transitions. [2021-10-28 08:54:07,011 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:54:07,012 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 37.0) internal successors, (111), 3 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 111 [2021-10-28 08:54:07,012 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:54:07,016 INFO L225 Difference]: With dead ends: 3786 [2021-10-28 08:54:07,016 INFO L226 Difference]: Without dead ends: 1796 [2021-10-28 08:54:07,019 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:54:07,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1796 states. [2021-10-28 08:54:07,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1796 to 1793. [2021-10-28 08:54:07,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1793 states, 1791 states have (on average 1.2099385817978783) internal successors, (2167), 1792 states have internal predecessors, (2167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:07,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1793 states to 1793 states and 2167 transitions. [2021-10-28 08:54:07,170 INFO L78 Accepts]: Start accepts. Automaton has 1793 states and 2167 transitions. Word has length 111 [2021-10-28 08:54:07,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:54:07,170 INFO L470 AbstractCegarLoop]: Abstraction has 1793 states and 2167 transitions. [2021-10-28 08:54:07,170 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 37.0) internal successors, (111), 3 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:07,170 INFO L276 IsEmpty]: Start isEmpty. Operand 1793 states and 2167 transitions. [2021-10-28 08:54:07,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2021-10-28 08:54:07,173 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:54:07,173 INFO L513 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:54:07,173 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-10-28 08:54:07,174 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:54:07,174 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:54:07,174 INFO L85 PathProgramCache]: Analyzing trace with hash -896834660, now seen corresponding path program 1 times [2021-10-28 08:54:07,174 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:54:07,175 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1861263545] [2021-10-28 08:54:07,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:54:07,175 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:54:07,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:54:07,222 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-10-28 08:54:07,222 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:54:07,222 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1861263545] [2021-10-28 08:54:07,222 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1861263545] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:54:07,223 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:54:07,223 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 08:54:07,223 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [470295994] [2021-10-28 08:54:07,223 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 08:54:07,224 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:54:07,224 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 08:54:07,224 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:54:07,224 INFO L87 Difference]: Start difference. First operand 1793 states and 2167 transitions. Second operand has 5 states, 5 states have (on average 21.8) internal successors, (109), 4 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:07,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:54:07,408 INFO L93 Difference]: Finished difference Result 3489 states and 4203 transitions. [2021-10-28 08:54:07,408 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 08:54:07,409 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.8) internal successors, (109), 4 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 113 [2021-10-28 08:54:07,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:54:07,412 INFO L225 Difference]: With dead ends: 3489 [2021-10-28 08:54:07,413 INFO L226 Difference]: Without dead ends: 1757 [2021-10-28 08:54:07,415 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2021-10-28 08:54:07,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1757 states. [2021-10-28 08:54:07,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1757 to 1618. [2021-10-28 08:54:07,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1618 states, 1616 states have (on average 1.1955445544554455) internal successors, (1932), 1617 states have internal predecessors, (1932), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:07,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1618 states to 1618 states and 1932 transitions. [2021-10-28 08:54:07,562 INFO L78 Accepts]: Start accepts. Automaton has 1618 states and 1932 transitions. Word has length 113 [2021-10-28 08:54:07,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:54:07,562 INFO L470 AbstractCegarLoop]: Abstraction has 1618 states and 1932 transitions. [2021-10-28 08:54:07,563 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 21.8) internal successors, (109), 4 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:07,563 INFO L276 IsEmpty]: Start isEmpty. Operand 1618 states and 1932 transitions. [2021-10-28 08:54:07,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2021-10-28 08:54:07,565 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:54:07,565 INFO L513 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:54:07,565 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-10-28 08:54:07,566 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:54:07,566 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:54:07,566 INFO L85 PathProgramCache]: Analyzing trace with hash -1105184803, now seen corresponding path program 1 times [2021-10-28 08:54:07,566 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:54:07,566 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [631817676] [2021-10-28 08:54:07,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:54:07,567 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:54:07,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:54:07,594 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:54:07,594 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:54:07,594 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [631817676] [2021-10-28 08:54:07,595 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [631817676] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:54:07,595 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:54:07,595 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:54:07,595 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1716745828] [2021-10-28 08:54:07,596 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 08:54:07,596 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:54:07,596 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:54:07,596 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:54:07,597 INFO L87 Difference]: Start difference. First operand 1618 states and 1932 transitions. Second operand has 3 states, 3 states have (on average 37.666666666666664) internal successors, (113), 3 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:07,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:54:07,762 INFO L93 Difference]: Finished difference Result 3212 states and 3849 transitions. [2021-10-28 08:54:07,763 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:54:07,763 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 37.666666666666664) internal successors, (113), 3 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 113 [2021-10-28 08:54:07,763 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:54:07,766 INFO L225 Difference]: With dead ends: 3212 [2021-10-28 08:54:07,766 INFO L226 Difference]: Without dead ends: 1655 [2021-10-28 08:54:07,769 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:54:07,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1655 states. [2021-10-28 08:54:07,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1655 to 1646. [2021-10-28 08:54:07,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1646 states, 1644 states have (on average 1.1763990267639903) internal successors, (1934), 1645 states have internal predecessors, (1934), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:07,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1646 states to 1646 states and 1934 transitions. [2021-10-28 08:54:07,936 INFO L78 Accepts]: Start accepts. Automaton has 1646 states and 1934 transitions. Word has length 113 [2021-10-28 08:54:07,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:54:07,937 INFO L470 AbstractCegarLoop]: Abstraction has 1646 states and 1934 transitions. [2021-10-28 08:54:07,937 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 37.666666666666664) internal successors, (113), 3 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:07,937 INFO L276 IsEmpty]: Start isEmpty. Operand 1646 states and 1934 transitions. [2021-10-28 08:54:07,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2021-10-28 08:54:07,939 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:54:07,940 INFO L513 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:54:07,940 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-10-28 08:54:07,940 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:54:07,940 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:54:07,941 INFO L85 PathProgramCache]: Analyzing trace with hash 1508765653, now seen corresponding path program 1 times [2021-10-28 08:54:07,941 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:54:07,941 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1111720015] [2021-10-28 08:54:07,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:54:07,941 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:54:07,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:54:07,995 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-10-28 08:54:07,995 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:54:07,995 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1111720015] [2021-10-28 08:54:07,995 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1111720015] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:54:07,995 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:54:07,996 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 08:54:07,996 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2145220919] [2021-10-28 08:54:07,996 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 08:54:07,997 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:54:07,997 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 08:54:07,997 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 08:54:07,997 INFO L87 Difference]: Start difference. First operand 1646 states and 1934 transitions. Second operand has 6 states, 6 states have (on average 18.333333333333332) internal successors, (110), 6 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:08,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:54:08,204 INFO L93 Difference]: Finished difference Result 3442 states and 4016 transitions. [2021-10-28 08:54:08,205 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 08:54:08,205 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 18.333333333333332) internal successors, (110), 6 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 114 [2021-10-28 08:54:08,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:54:08,209 INFO L225 Difference]: With dead ends: 3442 [2021-10-28 08:54:08,209 INFO L226 Difference]: Without dead ends: 1857 [2021-10-28 08:54:08,211 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2021-10-28 08:54:08,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1857 states. [2021-10-28 08:54:08,358 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1857 to 1621. [2021-10-28 08:54:08,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1621 states, 1619 states have (on average 1.1575046324891909) internal successors, (1874), 1620 states have internal predecessors, (1874), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:08,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1621 states to 1621 states and 1874 transitions. [2021-10-28 08:54:08,362 INFO L78 Accepts]: Start accepts. Automaton has 1621 states and 1874 transitions. Word has length 114 [2021-10-28 08:54:08,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:54:08,363 INFO L470 AbstractCegarLoop]: Abstraction has 1621 states and 1874 transitions. [2021-10-28 08:54:08,363 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 18.333333333333332) internal successors, (110), 6 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:08,363 INFO L276 IsEmpty]: Start isEmpty. Operand 1621 states and 1874 transitions. [2021-10-28 08:54:08,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2021-10-28 08:54:08,365 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:54:08,366 INFO L513 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:54:08,366 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-10-28 08:54:08,366 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:54:08,366 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:54:08,366 INFO L85 PathProgramCache]: Analyzing trace with hash 2018238743, now seen corresponding path program 1 times [2021-10-28 08:54:08,366 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:54:08,367 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [831971664] [2021-10-28 08:54:08,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:54:08,367 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:54:08,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:54:08,434 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-10-28 08:54:08,434 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:54:08,434 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [831971664] [2021-10-28 08:54:08,434 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [831971664] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:54:08,434 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1345327907] [2021-10-28 08:54:08,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:54:08,435 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:54:08,435 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:54:08,437 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:54:08,473 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-10-28 08:54:08,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:54:08,566 INFO L263 TraceCheckSpWp]: Trace formula consists of 367 conjuncts, 10 conjunts are in the unsatisfiable core [2021-10-28 08:54:08,575 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:54:08,987 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 19 proven. 1 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-10-28 08:54:08,988 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1345327907] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:54:08,988 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 08:54:08,988 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2021-10-28 08:54:08,988 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1022939519] [2021-10-28 08:54:08,989 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 08:54:08,989 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:54:08,989 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 08:54:08,989 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2021-10-28 08:54:08,990 INFO L87 Difference]: Start difference. First operand 1621 states and 1874 transitions. Second operand has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:09,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:54:09,380 INFO L93 Difference]: Finished difference Result 4169 states and 4828 transitions. [2021-10-28 08:54:09,381 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2021-10-28 08:54:09,381 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 114 [2021-10-28 08:54:09,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:54:09,387 INFO L225 Difference]: With dead ends: 4169 [2021-10-28 08:54:09,387 INFO L226 Difference]: Without dead ends: 2609 [2021-10-28 08:54:09,389 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 115 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2021-10-28 08:54:09,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2609 states. [2021-10-28 08:54:09,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2609 to 1441. [2021-10-28 08:54:09,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1441 states, 1439 states have (on average 1.1570535093815149) internal successors, (1665), 1440 states have internal predecessors, (1665), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:09,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1441 states to 1441 states and 1665 transitions. [2021-10-28 08:54:09,560 INFO L78 Accepts]: Start accepts. Automaton has 1441 states and 1665 transitions. Word has length 114 [2021-10-28 08:54:09,560 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:54:09,560 INFO L470 AbstractCegarLoop]: Abstraction has 1441 states and 1665 transitions. [2021-10-28 08:54:09,561 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:09,561 INFO L276 IsEmpty]: Start isEmpty. Operand 1441 states and 1665 transitions. [2021-10-28 08:54:09,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2021-10-28 08:54:09,563 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:54:09,563 INFO L513 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:54:09,602 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-10-28 08:54:09,776 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:54:09,777 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:54:09,777 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:54:09,777 INFO L85 PathProgramCache]: Analyzing trace with hash -29964582, now seen corresponding path program 1 times [2021-10-28 08:54:09,777 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:54:09,777 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1169910203] [2021-10-28 08:54:09,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:54:09,778 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:54:09,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:54:09,816 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-10-28 08:54:09,816 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:54:09,817 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1169910203] [2021-10-28 08:54:09,817 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1169910203] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:54:09,817 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:54:09,817 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:54:09,817 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [912791515] [2021-10-28 08:54:09,817 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 08:54:09,818 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:54:09,818 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:54:09,818 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:54:09,818 INFO L87 Difference]: Start difference. First operand 1441 states and 1665 transitions. Second operand has 3 states, 3 states have (on average 37.333333333333336) internal successors, (112), 3 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:09,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:54:09,977 INFO L93 Difference]: Finished difference Result 2513 states and 2906 transitions. [2021-10-28 08:54:09,977 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:54:09,977 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 37.333333333333336) internal successors, (112), 3 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 116 [2021-10-28 08:54:09,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:54:09,979 INFO L225 Difference]: With dead ends: 2513 [2021-10-28 08:54:09,980 INFO L226 Difference]: Without dead ends: 1133 [2021-10-28 08:54:09,981 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:54:09,982 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1133 states. [2021-10-28 08:54:10,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1133 to 1025. [2021-10-28 08:54:10,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1025 states, 1023 states have (on average 1.1368523949169111) internal successors, (1163), 1024 states have internal predecessors, (1163), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:10,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1025 states to 1025 states and 1163 transitions. [2021-10-28 08:54:10,091 INFO L78 Accepts]: Start accepts. Automaton has 1025 states and 1163 transitions. Word has length 116 [2021-10-28 08:54:10,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:54:10,092 INFO L470 AbstractCegarLoop]: Abstraction has 1025 states and 1163 transitions. [2021-10-28 08:54:10,092 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 37.333333333333336) internal successors, (112), 3 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:10,092 INFO L276 IsEmpty]: Start isEmpty. Operand 1025 states and 1163 transitions. [2021-10-28 08:54:10,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2021-10-28 08:54:10,094 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:54:10,094 INFO L513 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:54:10,094 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-10-28 08:54:10,094 INFO L402 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:54:10,097 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:54:10,098 INFO L85 PathProgramCache]: Analyzing trace with hash -1919382230, now seen corresponding path program 1 times [2021-10-28 08:54:10,098 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:54:10,098 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1728003720] [2021-10-28 08:54:10,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:54:10,098 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:54:10,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:54:10,189 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2021-10-28 08:54:10,189 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:54:10,189 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1728003720] [2021-10-28 08:54:10,189 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1728003720] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:54:10,190 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2051888933] [2021-10-28 08:54:10,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:54:10,190 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:54:10,190 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:54:10,193 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:54:10,216 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-10-28 08:54:10,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:54:10,338 INFO L263 TraceCheckSpWp]: Trace formula consists of 373 conjuncts, 9 conjunts are in the unsatisfiable core [2021-10-28 08:54:10,346 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:54:10,659 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2021-10-28 08:54:10,660 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2051888933] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:54:10,660 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 08:54:10,660 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2021-10-28 08:54:10,660 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [352311623] [2021-10-28 08:54:10,661 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 08:54:10,661 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:54:10,662 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 08:54:10,662 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:54:10,662 INFO L87 Difference]: Start difference. First operand 1025 states and 1163 transitions. Second operand has 5 states, 5 states have (on average 21.4) internal successors, (107), 5 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:10,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:54:10,920 INFO L93 Difference]: Finished difference Result 2322 states and 2641 transitions. [2021-10-28 08:54:10,920 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-28 08:54:10,920 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.4) internal successors, (107), 5 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 118 [2021-10-28 08:54:10,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:54:10,924 INFO L225 Difference]: With dead ends: 2322 [2021-10-28 08:54:10,924 INFO L226 Difference]: Without dead ends: 1728 [2021-10-28 08:54:10,925 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 119 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2021-10-28 08:54:10,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1728 states. [2021-10-28 08:54:11,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1728 to 1140. [2021-10-28 08:54:11,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1140 states, 1138 states have (on average 1.133567662565905) internal successors, (1290), 1139 states have internal predecessors, (1290), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:11,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1140 states to 1140 states and 1290 transitions. [2021-10-28 08:54:11,069 INFO L78 Accepts]: Start accepts. Automaton has 1140 states and 1290 transitions. Word has length 118 [2021-10-28 08:54:11,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:54:11,069 INFO L470 AbstractCegarLoop]: Abstraction has 1140 states and 1290 transitions. [2021-10-28 08:54:11,069 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 21.4) internal successors, (107), 5 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:54:11,070 INFO L276 IsEmpty]: Start isEmpty. Operand 1140 states and 1290 transitions. [2021-10-28 08:54:11,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2021-10-28 08:54:11,073 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:54:11,073 INFO L513 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:54:11,109 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2021-10-28 08:54:11,289 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:54:11,289 INFO L402 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 08:54:11,289 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:54:11,289 INFO L85 PathProgramCache]: Analyzing trace with hash 1404970223, now seen corresponding path program 1 times [2021-10-28 08:54:11,290 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:54:11,290 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1512060600] [2021-10-28 08:54:11,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:54:11,290 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:54:11,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:54:11,323 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:54:11,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:54:11,454 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:54:11,454 INFO L627 BasicCegarLoop]: Counterexample is feasible [2021-10-28 08:54:11,455 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:54:11,457 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:54:11,457 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:54:11,457 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-10-28 08:54:11,465 INFO L731 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:54:11,468 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-10-28 08:54:11,643 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.10 08:54:11 BoogieIcfgContainer [2021-10-28 08:54:11,643 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-10-28 08:54:11,643 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-28 08:54:11,643 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-28 08:54:11,644 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-28 08:54:11,651 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 08:53:55" (3/4) ... [2021-10-28 08:54:11,653 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-10-28 08:54:11,801 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/witness.graphml [2021-10-28 08:54:11,802 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-28 08:54:11,803 INFO L168 Benchmark]: Toolchain (without parser) took 16805.52 ms. Allocated memory was 98.6 MB in the beginning and 1.1 GB in the end (delta: 971.0 MB). Free memory was 64.3 MB in the beginning and 636.1 MB in the end (delta: -571.8 MB). Peak memory consumption was 399.7 MB. Max. memory is 16.1 GB. [2021-10-28 08:54:11,803 INFO L168 Benchmark]: CDTParser took 0.23 ms. Allocated memory is still 98.6 MB. Free memory is still 53.5 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-10-28 08:54:11,804 INFO L168 Benchmark]: CACSL2BoogieTranslator took 326.37 ms. Allocated memory is still 98.6 MB. Free memory was 64.1 MB in the beginning and 70.3 MB in the end (delta: -6.2 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. [2021-10-28 08:54:11,804 INFO L168 Benchmark]: Boogie Procedure Inliner took 45.89 ms. Allocated memory is still 98.6 MB. Free memory was 70.3 MB in the beginning and 67.8 MB in the end (delta: 2.4 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 08:54:11,805 INFO L168 Benchmark]: Boogie Preprocessor took 35.35 ms. Allocated memory is still 98.6 MB. Free memory was 67.8 MB in the beginning and 66.1 MB in the end (delta: 1.8 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 08:54:11,805 INFO L168 Benchmark]: RCFGBuilder took 579.25 ms. Allocated memory is still 98.6 MB. Free memory was 66.1 MB in the beginning and 48.3 MB in the end (delta: 17.8 MB). Peak memory consumption was 16.8 MB. Max. memory is 16.1 GB. [2021-10-28 08:54:11,805 INFO L168 Benchmark]: TraceAbstraction took 15637.68 ms. Allocated memory was 98.6 MB in the beginning and 1.1 GB in the end (delta: 971.0 MB). Free memory was 47.9 MB in the beginning and 664.4 MB in the end (delta: -616.5 MB). Peak memory consumption was 356.5 MB. Max. memory is 16.1 GB. [2021-10-28 08:54:11,806 INFO L168 Benchmark]: Witness Printer took 158.45 ms. Allocated memory is still 1.1 GB. Free memory was 664.4 MB in the beginning and 636.1 MB in the end (delta: 28.3 MB). Peak memory consumption was 29.4 MB. Max. memory is 16.1 GB. [2021-10-28 08:54:11,808 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.23 ms. Allocated memory is still 98.6 MB. Free memory is still 53.5 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 326.37 ms. Allocated memory is still 98.6 MB. Free memory was 64.1 MB in the beginning and 70.3 MB in the end (delta: -6.2 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 45.89 ms. Allocated memory is still 98.6 MB. Free memory was 70.3 MB in the beginning and 67.8 MB in the end (delta: 2.4 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 35.35 ms. Allocated memory is still 98.6 MB. Free memory was 67.8 MB in the beginning and 66.1 MB in the end (delta: 1.8 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 579.25 ms. Allocated memory is still 98.6 MB. Free memory was 66.1 MB in the beginning and 48.3 MB in the end (delta: 17.8 MB). Peak memory consumption was 16.8 MB. Max. memory is 16.1 GB. * TraceAbstraction took 15637.68 ms. Allocated memory was 98.6 MB in the beginning and 1.1 GB in the end (delta: 971.0 MB). Free memory was 47.9 MB in the beginning and 664.4 MB in the end (delta: -616.5 MB). Peak memory consumption was 356.5 MB. Max. memory is 16.1 GB. * Witness Printer took 158.45 ms. Allocated memory is still 1.1 GB. Free memory was 664.4 MB in the beginning and 636.1 MB in the end (delta: 28.3 MB). Peak memory consumption was 29.4 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 11]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L17] int max_loop ; [L18] int num ; [L19] int i ; [L20] int e ; [L21] int timer ; [L22] char data_0 ; [L23] char data_1 ; [L66] int P_1_pc; [L67] int P_1_st ; [L68] int P_1_i ; [L69] int P_1_ev ; [L124] int C_1_pc ; [L125] int C_1_st ; [L126] int C_1_i ; [L127] int C_1_ev ; [L128] int C_1_pr ; VAL [C_1_ev=0, C_1_i=0, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=0, num=0, P_1_ev=0, P_1_i=0, P_1_pc=0, P_1_st=0, timer=0] [L492] int count ; [L493] int __retres2 ; [L497] num = 0 [L498] i = 0 [L499] max_loop = 2 [L501] timer = 0 [L502] P_1_pc = 0 [L503] C_1_pc = 0 [L505] count = 0 [L485] P_1_i = 1 [L486] C_1_i = 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L423] int kernel_st ; [L424] int tmp ; [L425] int tmp___0 ; [L429] kernel_st = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L228] COND TRUE (int )P_1_i == 1 [L229] P_1_st = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L233] COND TRUE (int )C_1_i == 1 [L234] C_1_st = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L367] int tmp ; [L368] int tmp___0 ; [L369] int tmp___1 ; [L106] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L109] COND FALSE !((int )P_1_pc == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L119] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L121] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L373] tmp = is_P_1_triggered() [L375] COND FALSE !(\read(tmp)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L188] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L191] COND FALSE !((int )C_1_pc == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L201] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L211] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L213] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L381] tmp___1 = is_C_1_triggered() [L383] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L437] COND TRUE 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L440] kernel_st = 1 [L264] int tmp ; [L265] int tmp___0 ; [L266] int tmp___1 ; [L267] int tmp___2 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L271] COND TRUE 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L243] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L246] COND TRUE (int )P_1_st == 0 [L247] __retres1 = 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L260] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L274] tmp___2 = exists_runnable_thread() [L276] COND TRUE \read(tmp___2) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L281] COND TRUE (int )P_1_st == 0 [L283] tmp = __VERIFIER_nondet_int() [L285] COND FALSE !(\read(tmp)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=0, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L296] COND TRUE (int )C_1_st == 0 [L298] tmp___1 = __VERIFIER_nondet_int() [L300] COND TRUE \read(tmp___1) [L302] C_1_st = 1 [L130] char c ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L133] COND TRUE (int )C_1_pc == 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L148] COND TRUE i < max_loop VAL [C_1_ev=0, C_1_i=1, C_1_pc=0, C_1_pr=0, C_1_st=1, data_0=0, data_1=0, e=0, i=0, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=0] [L150] COND TRUE num == 0 [L151] timer = 1 [L152] i += 1 [L153] C_1_pc = 1 [L154] C_1_st = 2 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L271] COND TRUE 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L243] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L246] COND TRUE (int )P_1_st == 0 [L247] __retres1 = 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L260] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L274] tmp___2 = exists_runnable_thread() [L276] COND TRUE \read(tmp___2) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=0, timer=1] [L281] COND TRUE (int )P_1_st == 0 [L283] tmp = __VERIFIER_nondet_int() [L285] COND TRUE \read(tmp) [L287] P_1_st = 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L74] COND TRUE (int )P_1_pc == 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L85] COND TRUE i < max_loop VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=0, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L51] COND TRUE i___0 == 0 [L52] data_0 = c VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=0, P_1_ev=0, P_1_i=1, P_1_pc=0, P_1_st=1, timer=1] [L89] num += 1 [L90] P_1_pc = 1 [L91] P_1_st = 2 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L296] COND FALSE !((int )C_1_st == 0) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L271] COND TRUE 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L243] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L246] COND FALSE !((int )P_1_st == 0) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L250] COND FALSE !((int )C_1_st == 0) [L258] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L260] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L274] tmp___2 = exists_runnable_thread() [L276] COND FALSE !(\read(tmp___2)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L444] kernel_st = 2 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L448] kernel_st = 3 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L367] int tmp ; [L368] int tmp___0 ; [L369] int tmp___1 ; [L106] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L109] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L110] COND FALSE !((int )P_1_ev == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L119] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L121] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L373] tmp = is_P_1_triggered() [L375] COND FALSE !(\read(tmp)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L188] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L191] COND TRUE (int )C_1_pc == 1 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L192] COND FALSE !((int )e == 1) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L201] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L211] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L213] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L381] tmp___1 = is_C_1_triggered() [L383] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L243] int __retres1 ; VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L246] COND FALSE !((int )P_1_st == 0) VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L250] COND FALSE !((int )C_1_st == 0) [L258] __retres1 = 0 VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L260] return (__retres1); VAL [C_1_ev=0, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=0, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L454] tmp = exists_runnable_thread() [L456] COND TRUE tmp == 0 [L458] kernel_st = 4 [L338] C_1_ev = 1 [L340] P_1_ev = 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L367] int tmp ; [L368] int tmp___0 ; [L369] int tmp___1 ; [L106] int __retres1 ; VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L109] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L110] COND TRUE (int )P_1_ev == 1 [L111] __retres1 = 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L121] return (__retres1); VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L373] tmp = is_P_1_triggered() [L375] COND TRUE \read(tmp) [L376] P_1_st = 0 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L188] int __retres1 ; VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L191] COND TRUE (int )C_1_pc == 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L192] COND FALSE !((int )e == 1) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L201] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L211] __retres1 = 0 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L213] return (__retres1); VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L381] tmp___1 = is_C_1_triggered() [L383] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L352] COND TRUE (int )P_1_ev == 1 [L353] P_1_ev = 2 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L357] COND TRUE (int )C_1_ev == 1 [L358] C_1_ev = 2 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L404] int tmp ; [L405] int __retres2 ; [L243] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L246] COND TRUE (int )P_1_st == 0 [L247] __retres1 = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L260] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L409] tmp = exists_runnable_thread() [L411] COND TRUE \read(tmp) [L412] __retres2 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L419] return (__retres2); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L467] tmp___0 = stop_simulation() [L469] COND FALSE !(\read(tmp___0)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L437] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L440] kernel_st = 1 [L264] int tmp ; [L265] int tmp___0 ; [L266] int tmp___1 ; [L267] int tmp___2 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L271] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L243] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L246] COND TRUE (int )P_1_st == 0 [L247] __retres1 = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L260] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L274] tmp___2 = exists_runnable_thread() [L276] COND TRUE \read(tmp___2) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L281] COND TRUE (int )P_1_st == 0 [L283] tmp = __VERIFIER_nondet_int() [L285] COND TRUE \read(tmp) [L287] P_1_st = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L74] COND FALSE !((int )P_1_pc == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L77] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L85] COND TRUE i < max_loop VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L51] COND FALSE !(i___0 == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=0, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L54] COND TRUE i___0 == 1 [L55] data_1 = c VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=1, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L89] num += 1 [L90] P_1_pc = 1 [L91] P_1_st = 2 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L296] COND FALSE !((int )C_1_st == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L271] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L243] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L246] COND FALSE !((int )P_1_st == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L250] COND FALSE !((int )C_1_st == 0) [L258] __retres1 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L260] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L274] tmp___2 = exists_runnable_thread() [L276] COND FALSE !(\read(tmp___2)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L444] kernel_st = 2 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L448] kernel_st = 3 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L367] int tmp ; [L368] int tmp___0 ; [L369] int tmp___1 ; [L106] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L109] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L110] COND FALSE !((int )P_1_ev == 1) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L119] __retres1 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L121] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L373] tmp = is_P_1_triggered() [L375] COND FALSE !(\read(tmp)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L188] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L191] COND TRUE (int )C_1_pc == 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L192] COND FALSE !((int )e == 1) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L201] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L211] __retres1 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L213] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L381] tmp___1 = is_C_1_triggered() [L383] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L243] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L246] COND FALSE !((int )P_1_st == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L250] COND FALSE !((int )C_1_st == 0) [L258] __retres1 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L260] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L454] tmp = exists_runnable_thread() [L456] COND TRUE tmp == 0 [L458] kernel_st = 4 [L338] C_1_ev = 1 [L340] P_1_ev = 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L367] int tmp ; [L368] int tmp___0 ; [L369] int tmp___1 ; [L106] int __retres1 ; VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L109] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L110] COND TRUE (int )P_1_ev == 1 [L111] __retres1 = 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L121] return (__retres1); VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=2, timer=1] [L373] tmp = is_P_1_triggered() [L375] COND TRUE \read(tmp) [L376] P_1_st = 0 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L188] int __retres1 ; VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L191] COND TRUE (int )C_1_pc == 1 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L192] COND FALSE !((int )e == 1) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L201] COND FALSE !((int )C_1_pc == 2) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L211] __retres1 = 0 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L213] return (__retres1); VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L381] tmp___1 = is_C_1_triggered() [L383] COND FALSE !(\read(tmp___1)) VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=1, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L352] COND TRUE (int )P_1_ev == 1 [L353] P_1_ev = 2 VAL [C_1_ev=1, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L357] COND TRUE (int )C_1_ev == 1 [L358] C_1_ev = 2 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L404] int tmp ; [L405] int __retres2 ; [L243] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L246] COND TRUE (int )P_1_st == 0 [L247] __retres1 = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L260] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L409] tmp = exists_runnable_thread() [L411] COND TRUE \read(tmp) [L412] __retres2 = 0 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L419] return (__retres2); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L467] tmp___0 = stop_simulation() [L469] COND FALSE !(\read(tmp___0)) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L437] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L440] kernel_st = 1 [L264] int tmp ; [L265] int tmp___0 ; [L266] int tmp___1 ; [L267] int tmp___2 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L271] COND TRUE 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L243] int __retres1 ; VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L246] COND TRUE (int )P_1_st == 0 [L247] __retres1 = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L260] return (__retres1); VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L274] tmp___2 = exists_runnable_thread() [L276] COND TRUE \read(tmp___2) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=0, timer=1] [L281] COND TRUE (int )P_1_st == 0 [L283] tmp = __VERIFIER_nondet_int() [L285] COND TRUE \read(tmp) [L287] P_1_st = 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L74] COND FALSE !((int )P_1_pc == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L77] COND TRUE (int )P_1_pc == 1 VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L85] COND TRUE i < max_loop VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L51] COND FALSE !(i___0 == 0) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L54] COND FALSE !(i___0 == 1) VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] [L11] reach_error() VAL [C_1_ev=2, C_1_i=1, C_1_pc=1, C_1_pr=0, C_1_st=2, data_0=65, data_1=65, e=0, i=1, max_loop=2, num=2, P_1_ev=2, P_1_i=1, P_1_pc=1, P_1_st=1, timer=1] - UnprovableResult [Line: 11]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 11]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 117 locations, 3 error locations. Started 1 CEGAR loops. OverallTime: 15.3s, OverallIterations: 25, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 6.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 4948 SDtfs, 6509 SDslu, 6634 SDs, 0 SdLazy, 716 SolverSat, 182 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 365 GetRequests, 288 SyntacticMatches, 2 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=5850occurred in iteration=10, InterpolantAutomatonStates: 112, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 4.7s AutomataMinimizationTime, 24 MinimizatonAttempts, 7380 StatesRemovedByMinimization, 22 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 1.8s InterpolantComputationTime, 2148 NumberOfCodeBlocks, 2148 NumberOfCodeBlocksAsserted, 27 NumberOfCheckSat, 1932 ConstructedInterpolants, 0 QuantifiedInterpolants, 4235 SizeOfPredicates, 4 NumberOfNonLiveVariables, 740 ConjunctsInSsa, 19 ConjunctsInUnsatCore, 26 InterpolantComputations, 22 PerfectInterpolantSequences, 428/500 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-10-28 08:54:11,866 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_78c3ce6d-c35d-4edd-96df-af967d3fb981/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...