./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version b2eff8ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_41a0416b-55cf-48e4-b7f0-10ab1d27ea5c/bin/uautomizer-UnR33cPsHg/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_41a0416b-55cf-48e4-b7f0-10ab1d27ea5c/bin/uautomizer-UnR33cPsHg/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_41a0416b-55cf-48e4-b7f0-10ab1d27ea5c/bin/uautomizer-UnR33cPsHg/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_41a0416b-55cf-48e4-b7f0-10ab1d27ea5c/bin/uautomizer-UnR33cPsHg/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_41a0416b-55cf-48e4-b7f0-10ab1d27ea5c/bin/uautomizer-UnR33cPsHg/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_41a0416b-55cf-48e4-b7f0-10ab1d27ea5c/bin/uautomizer-UnR33cPsHg --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2354c4d30c0335eb0a6c6e03cf8d087a440768412264986840e048ded8afea74 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.1-dev-b2eff8b [2021-10-28 09:33:44,800 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-28 09:33:44,803 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-28 09:33:44,844 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-28 09:33:44,845 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-28 09:33:44,847 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-28 09:33:44,849 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-28 09:33:44,852 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-28 09:33:44,855 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-28 09:33:44,857 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-28 09:33:44,859 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-28 09:33:44,861 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-28 09:33:44,861 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-28 09:33:44,863 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-28 09:33:44,865 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-28 09:33:44,867 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-28 09:33:44,869 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-28 09:33:44,870 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-28 09:33:44,874 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-28 09:33:44,877 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-28 09:33:44,880 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-28 09:33:44,882 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-28 09:33:44,884 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-28 09:33:44,885 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-28 09:33:44,890 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-28 09:33:44,891 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-28 09:33:44,892 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-28 09:33:44,893 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-28 09:33:44,894 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-28 09:33:44,899 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-28 09:33:44,900 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-28 09:33:44,901 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-28 09:33:44,903 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-28 09:33:44,904 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-28 09:33:44,905 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-28 09:33:44,906 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-28 09:33:44,907 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-28 09:33:44,908 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-28 09:33:44,908 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-28 09:33:44,910 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-28 09:33:44,911 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-28 09:33:44,915 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_41a0416b-55cf-48e4-b7f0-10ab1d27ea5c/bin/uautomizer-UnR33cPsHg/config/svcomp-Reach-32bit-Automizer_Default.epf [2021-10-28 09:33:44,966 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-28 09:33:44,966 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-28 09:33:44,967 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-28 09:33:44,967 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-28 09:33:44,968 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-28 09:33:44,969 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-28 09:33:44,969 INFO L138 SettingsManager]: * Use SBE=true [2021-10-28 09:33:44,969 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-28 09:33:44,970 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-28 09:33:44,970 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-28 09:33:44,970 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-28 09:33:44,971 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-28 09:33:44,971 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-10-28 09:33:44,971 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-10-28 09:33:44,971 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-10-28 09:33:44,972 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-28 09:33:44,972 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-28 09:33:44,972 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-28 09:33:44,973 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-10-28 09:33:44,973 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-28 09:33:44,973 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-28 09:33:44,973 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-10-28 09:33:44,974 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-28 09:33:44,974 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-28 09:33:44,974 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-10-28 09:33:44,975 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-10-28 09:33:44,975 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-28 09:33:44,975 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-10-28 09:33:44,976 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-10-28 09:33:44,976 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2021-10-28 09:33:44,976 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-10-28 09:33:44,976 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-28 09:33:44,977 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_41a0416b-55cf-48e4-b7f0-10ab1d27ea5c/bin/uautomizer-UnR33cPsHg/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_41a0416b-55cf-48e4-b7f0-10ab1d27ea5c/bin/uautomizer-UnR33cPsHg Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2354c4d30c0335eb0a6c6e03cf8d087a440768412264986840e048ded8afea74 [2021-10-28 09:33:45,263 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-28 09:33:45,291 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-28 09:33:45,296 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-28 09:33:45,297 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-28 09:33:45,298 INFO L275 PluginConnector]: CDTParser initialized [2021-10-28 09:33:45,300 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_41a0416b-55cf-48e4-b7f0-10ab1d27ea5c/bin/uautomizer-UnR33cPsHg/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c [2021-10-28 09:33:45,402 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_41a0416b-55cf-48e4-b7f0-10ab1d27ea5c/bin/uautomizer-UnR33cPsHg/data/9a8b8e6e8/dd509b9f6bda40c29eab2f75b82fde93/FLAG1949638fb [2021-10-28 09:33:45,975 INFO L306 CDTParser]: Found 1 translation units. [2021-10-28 09:33:45,976 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_41a0416b-55cf-48e4-b7f0-10ab1d27ea5c/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c [2021-10-28 09:33:45,988 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_41a0416b-55cf-48e4-b7f0-10ab1d27ea5c/bin/uautomizer-UnR33cPsHg/data/9a8b8e6e8/dd509b9f6bda40c29eab2f75b82fde93/FLAG1949638fb [2021-10-28 09:33:46,262 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_41a0416b-55cf-48e4-b7f0-10ab1d27ea5c/bin/uautomizer-UnR33cPsHg/data/9a8b8e6e8/dd509b9f6bda40c29eab2f75b82fde93 [2021-10-28 09:33:46,266 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-28 09:33:46,275 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-28 09:33:46,277 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-28 09:33:46,278 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-28 09:33:46,282 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-28 09:33:46,284 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 09:33:46" (1/1) ... [2021-10-28 09:33:46,299 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@62c185c8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:33:46, skipping insertion in model container [2021-10-28 09:33:46,302 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 09:33:46" (1/1) ... [2021-10-28 09:33:46,310 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-28 09:33:46,385 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-28 09:33:46,676 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_41a0416b-55cf-48e4-b7f0-10ab1d27ea5c/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c[14700,14713] [2021-10-28 09:33:46,679 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 09:33:46,690 INFO L203 MainTranslator]: Completed pre-run [2021-10-28 09:33:46,786 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_41a0416b-55cf-48e4-b7f0-10ab1d27ea5c/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c[14700,14713] [2021-10-28 09:33:46,787 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 09:33:46,805 INFO L208 MainTranslator]: Completed translation [2021-10-28 09:33:46,805 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:33:46 WrapperNode [2021-10-28 09:33:46,805 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-28 09:33:46,807 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-28 09:33:46,807 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-28 09:33:46,807 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-28 09:33:46,816 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:33:46" (1/1) ... [2021-10-28 09:33:46,832 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:33:46" (1/1) ... [2021-10-28 09:33:46,923 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-28 09:33:46,929 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-28 09:33:46,929 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-28 09:33:46,929 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-28 09:33:46,940 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:33:46" (1/1) ... [2021-10-28 09:33:46,940 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:33:46" (1/1) ... [2021-10-28 09:33:46,949 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:33:46" (1/1) ... [2021-10-28 09:33:46,949 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:33:46" (1/1) ... [2021-10-28 09:33:46,971 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:33:46" (1/1) ... [2021-10-28 09:33:46,986 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:33:46" (1/1) ... [2021-10-28 09:33:46,989 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:33:46" (1/1) ... [2021-10-28 09:33:46,997 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-28 09:33:46,998 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-28 09:33:46,998 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-28 09:33:46,998 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-28 09:33:46,999 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:33:46" (1/1) ... [2021-10-28 09:33:47,027 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-28 09:33:47,041 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_41a0416b-55cf-48e4-b7f0-10ab1d27ea5c/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:33:47,053 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_41a0416b-55cf-48e4-b7f0-10ab1d27ea5c/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-10-28 09:33:47,067 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_41a0416b-55cf-48e4-b7f0-10ab1d27ea5c/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-10-28 09:33:47,097 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-28 09:33:47,098 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-28 09:33:47,098 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-28 09:33:47,098 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-28 09:33:48,469 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-28 09:33:48,470 INFO L299 CfgBuilder]: Removed 123 assume(true) statements. [2021-10-28 09:33:48,474 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 09:33:48 BoogieIcfgContainer [2021-10-28 09:33:48,475 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-28 09:33:48,478 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-10-28 09:33:48,478 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-10-28 09:33:48,482 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-10-28 09:33:48,483 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.10 09:33:46" (1/3) ... [2021-10-28 09:33:48,484 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@cbbf61 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.10 09:33:48, skipping insertion in model container [2021-10-28 09:33:48,484 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:33:46" (2/3) ... [2021-10-28 09:33:48,485 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@cbbf61 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.10 09:33:48, skipping insertion in model container [2021-10-28 09:33:48,485 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 09:33:48" (3/3) ... [2021-10-28 09:33:48,487 INFO L111 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.1.ufo.BOUNDED-10.pals.c [2021-10-28 09:33:48,493 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-10-28 09:33:48,494 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 23 error locations. [2021-10-28 09:33:48,551 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-10-28 09:33:48,557 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-10-28 09:33:48,557 INFO L340 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2021-10-28 09:33:48,581 INFO L276 IsEmpty]: Start isEmpty. Operand has 297 states, 273 states have (on average 1.7032967032967032) internal successors, (465), 296 states have internal predecessors, (465), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:48,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-28 09:33:48,589 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:48,590 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:48,591 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:48,597 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:48,597 INFO L85 PathProgramCache]: Analyzing trace with hash 349506240, now seen corresponding path program 1 times [2021-10-28 09:33:48,607 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:48,608 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [407559888] [2021-10-28 09:33:48,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:48,609 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:48,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:33:48,820 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:33:48,821 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:33:48,821 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [407559888] [2021-10-28 09:33:48,822 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [407559888] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:33:48,822 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:33:48,823 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-28 09:33:48,825 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1522263834] [2021-10-28 09:33:48,830 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2021-10-28 09:33:48,831 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:33:48,852 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-10-28 09:33:48,853 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-28 09:33:48,859 INFO L87 Difference]: Start difference. First operand has 297 states, 273 states have (on average 1.7032967032967032) internal successors, (465), 296 states have internal predecessors, (465), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:48,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:33:48,941 INFO L93 Difference]: Finished difference Result 578 states and 901 transitions. [2021-10-28 09:33:48,942 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-10-28 09:33:48,943 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-28 09:33:48,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:33:48,975 INFO L225 Difference]: With dead ends: 578 [2021-10-28 09:33:48,976 INFO L226 Difference]: Without dead ends: 293 [2021-10-28 09:33:48,985 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-28 09:33:49,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 293 states. [2021-10-28 09:33:49,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 293 to 293. [2021-10-28 09:33:49,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 293 states, 270 states have (on average 1.5888888888888888) internal successors, (429), 292 states have internal predecessors, (429), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:49,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 293 states to 293 states and 429 transitions. [2021-10-28 09:33:49,102 INFO L78 Accepts]: Start accepts. Automaton has 293 states and 429 transitions. Word has length 33 [2021-10-28 09:33:49,103 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:33:49,103 INFO L470 AbstractCegarLoop]: Abstraction has 293 states and 429 transitions. [2021-10-28 09:33:49,103 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:49,104 INFO L276 IsEmpty]: Start isEmpty. Operand 293 states and 429 transitions. [2021-10-28 09:33:49,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-28 09:33:49,106 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:49,106 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:49,106 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-10-28 09:33:49,107 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:49,108 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:49,108 INFO L85 PathProgramCache]: Analyzing trace with hash -1047215368, now seen corresponding path program 1 times [2021-10-28 09:33:49,108 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:49,109 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [182780733] [2021-10-28 09:33:49,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:49,109 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:49,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:33:49,282 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:33:49,282 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:33:49,283 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [182780733] [2021-10-28 09:33:49,284 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [182780733] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:33:49,284 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:33:49,284 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:33:49,285 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1239104571] [2021-10-28 09:33:49,287 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:33:49,288 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:33:49,290 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:33:49,290 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:33:49,291 INFO L87 Difference]: Start difference. First operand 293 states and 429 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:49,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:33:49,387 INFO L93 Difference]: Finished difference Result 572 states and 832 transitions. [2021-10-28 09:33:49,387 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 09:33:49,387 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-28 09:33:49,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:33:49,392 INFO L225 Difference]: With dead ends: 572 [2021-10-28 09:33:49,392 INFO L226 Difference]: Without dead ends: 293 [2021-10-28 09:33:49,396 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:33:49,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 293 states. [2021-10-28 09:33:49,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 293 to 293. [2021-10-28 09:33:49,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 293 states, 270 states have (on average 1.5444444444444445) internal successors, (417), 292 states have internal predecessors, (417), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:49,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 293 states to 293 states and 417 transitions. [2021-10-28 09:33:49,442 INFO L78 Accepts]: Start accepts. Automaton has 293 states and 417 transitions. Word has length 33 [2021-10-28 09:33:49,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:33:49,443 INFO L470 AbstractCegarLoop]: Abstraction has 293 states and 417 transitions. [2021-10-28 09:33:49,443 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:49,443 INFO L276 IsEmpty]: Start isEmpty. Operand 293 states and 417 transitions. [2021-10-28 09:33:49,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2021-10-28 09:33:49,451 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:49,451 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:49,452 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-10-28 09:33:49,452 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:49,452 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:49,452 INFO L85 PathProgramCache]: Analyzing trace with hash -600938825, now seen corresponding path program 1 times [2021-10-28 09:33:49,453 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:49,453 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1211939579] [2021-10-28 09:33:49,453 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:49,453 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:49,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:33:49,689 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:33:49,689 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:33:49,690 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1211939579] [2021-10-28 09:33:49,692 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1211939579] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:33:49,692 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:33:49,693 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:33:49,693 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [161275939] [2021-10-28 09:33:49,694 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:33:49,694 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:33:49,696 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:33:49,697 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:33:49,705 INFO L87 Difference]: Start difference. First operand 293 states and 417 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:49,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:33:49,767 INFO L93 Difference]: Finished difference Result 603 states and 867 transitions. [2021-10-28 09:33:49,768 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:33:49,768 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2021-10-28 09:33:49,769 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:33:49,772 INFO L225 Difference]: With dead ends: 603 [2021-10-28 09:33:49,773 INFO L226 Difference]: Without dead ends: 327 [2021-10-28 09:33:49,774 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:33:49,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 327 states. [2021-10-28 09:33:49,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 327 to 269. [2021-10-28 09:33:49,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 269 states, 250 states have (on average 1.524) internal successors, (381), 268 states have internal predecessors, (381), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:49,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 269 states and 381 transitions. [2021-10-28 09:33:49,812 INFO L78 Accepts]: Start accepts. Automaton has 269 states and 381 transitions. Word has length 44 [2021-10-28 09:33:49,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:33:49,813 INFO L470 AbstractCegarLoop]: Abstraction has 269 states and 381 transitions. [2021-10-28 09:33:49,813 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:49,814 INFO L276 IsEmpty]: Start isEmpty. Operand 269 states and 381 transitions. [2021-10-28 09:33:49,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-10-28 09:33:49,819 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:49,819 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:49,820 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-10-28 09:33:49,820 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:49,822 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:49,822 INFO L85 PathProgramCache]: Analyzing trace with hash -1585020226, now seen corresponding path program 1 times [2021-10-28 09:33:49,823 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:49,823 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [179520649] [2021-10-28 09:33:49,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:49,824 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:49,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:33:50,013 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:33:50,014 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:33:50,014 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [179520649] [2021-10-28 09:33:50,019 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [179520649] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:33:50,021 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:33:50,021 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:33:50,021 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1010168366] [2021-10-28 09:33:50,022 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:33:50,022 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:33:50,023 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:33:50,024 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:33:50,024 INFO L87 Difference]: Start difference. First operand 269 states and 381 transitions. Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:50,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:33:50,068 INFO L93 Difference]: Finished difference Result 750 states and 1074 transitions. [2021-10-28 09:33:50,069 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:33:50,069 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 53 [2021-10-28 09:33:50,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:33:50,073 INFO L225 Difference]: With dead ends: 750 [2021-10-28 09:33:50,073 INFO L226 Difference]: Without dead ends: 498 [2021-10-28 09:33:50,074 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:33:50,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 498 states. [2021-10-28 09:33:50,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 498 to 304. [2021-10-28 09:33:50,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 304 states, 285 states have (on average 1.5192982456140351) internal successors, (433), 303 states have internal predecessors, (433), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:50,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 304 states to 304 states and 433 transitions. [2021-10-28 09:33:50,096 INFO L78 Accepts]: Start accepts. Automaton has 304 states and 433 transitions. Word has length 53 [2021-10-28 09:33:50,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:33:50,099 INFO L470 AbstractCegarLoop]: Abstraction has 304 states and 433 transitions. [2021-10-28 09:33:50,099 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:50,099 INFO L276 IsEmpty]: Start isEmpty. Operand 304 states and 433 transitions. [2021-10-28 09:33:50,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-28 09:33:50,100 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:50,101 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:50,101 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-10-28 09:33:50,101 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:50,102 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:50,102 INFO L85 PathProgramCache]: Analyzing trace with hash -1396202520, now seen corresponding path program 1 times [2021-10-28 09:33:50,102 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:50,103 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [777329475] [2021-10-28 09:33:50,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:50,103 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:50,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:33:50,191 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:33:50,191 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:33:50,192 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [777329475] [2021-10-28 09:33:50,192 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [777329475] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:33:50,192 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:33:50,192 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:33:50,193 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [392947369] [2021-10-28 09:33:50,193 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:33:50,194 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:33:50,194 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:33:50,194 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:33:50,195 INFO L87 Difference]: Start difference. First operand 304 states and 433 transitions. Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:50,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:33:50,235 INFO L93 Difference]: Finished difference Result 834 states and 1199 transitions. [2021-10-28 09:33:50,236 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:33:50,236 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-28 09:33:50,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:33:50,240 INFO L225 Difference]: With dead ends: 834 [2021-10-28 09:33:50,240 INFO L226 Difference]: Without dead ends: 547 [2021-10-28 09:33:50,241 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:33:50,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 547 states. [2021-10-28 09:33:50,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 547 to 329. [2021-10-28 09:33:50,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 329 states, 310 states have (on average 1.5193548387096774) internal successors, (471), 328 states have internal predecessors, (471), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:50,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 471 transitions. [2021-10-28 09:33:50,258 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 471 transitions. Word has length 54 [2021-10-28 09:33:50,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:33:50,259 INFO L470 AbstractCegarLoop]: Abstraction has 329 states and 471 transitions. [2021-10-28 09:33:50,259 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:50,259 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 471 transitions. [2021-10-28 09:33:50,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-28 09:33:50,260 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:50,261 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:50,261 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-10-28 09:33:50,261 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:50,262 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:50,262 INFO L85 PathProgramCache]: Analyzing trace with hash -716144150, now seen corresponding path program 1 times [2021-10-28 09:33:50,262 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:50,262 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2024459627] [2021-10-28 09:33:50,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:50,263 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:50,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:33:50,358 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:33:50,358 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:33:50,358 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2024459627] [2021-10-28 09:33:50,359 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2024459627] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:33:50,359 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:33:50,359 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:33:50,359 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [204975848] [2021-10-28 09:33:50,360 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 09:33:50,360 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:33:50,360 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 09:33:50,361 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:33:50,361 INFO L87 Difference]: Start difference. First operand 329 states and 471 transitions. Second operand has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:50,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:33:50,622 INFO L93 Difference]: Finished difference Result 1023 states and 1476 transitions. [2021-10-28 09:33:50,623 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 09:33:50,623 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-28 09:33:50,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:33:50,638 INFO L225 Difference]: With dead ends: 1023 [2021-10-28 09:33:50,639 INFO L226 Difference]: Without dead ends: 711 [2021-10-28 09:33:50,640 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-28 09:33:50,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2021-10-28 09:33:50,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 427. [2021-10-28 09:33:50,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 427 states, 408 states have (on average 1.4901960784313726) internal successors, (608), 426 states have internal predecessors, (608), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:50,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 427 states to 427 states and 608 transitions. [2021-10-28 09:33:50,675 INFO L78 Accepts]: Start accepts. Automaton has 427 states and 608 transitions. Word has length 54 [2021-10-28 09:33:50,676 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:33:50,676 INFO L470 AbstractCegarLoop]: Abstraction has 427 states and 608 transitions. [2021-10-28 09:33:50,676 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:50,676 INFO L276 IsEmpty]: Start isEmpty. Operand 427 states and 608 transitions. [2021-10-28 09:33:50,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2021-10-28 09:33:50,678 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:50,678 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:50,678 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-10-28 09:33:50,678 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:50,679 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:50,679 INFO L85 PathProgramCache]: Analyzing trace with hash 153208358, now seen corresponding path program 1 times [2021-10-28 09:33:50,679 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:50,684 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [428377924] [2021-10-28 09:33:50,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:50,684 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:50,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:33:50,806 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:33:50,806 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:33:50,807 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [428377924] [2021-10-28 09:33:50,807 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [428377924] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:33:50,808 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:33:50,808 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:33:50,808 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1947809158] [2021-10-28 09:33:50,808 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 09:33:50,809 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:33:50,809 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 09:33:50,809 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:33:50,810 INFO L87 Difference]: Start difference. First operand 427 states and 608 transitions. Second operand has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:51,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:33:51,025 INFO L93 Difference]: Finished difference Result 1027 states and 1476 transitions. [2021-10-28 09:33:51,025 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 09:33:51,025 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 55 [2021-10-28 09:33:51,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:33:51,030 INFO L225 Difference]: With dead ends: 1027 [2021-10-28 09:33:51,030 INFO L226 Difference]: Without dead ends: 715 [2021-10-28 09:33:51,032 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-28 09:33:51,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 715 states. [2021-10-28 09:33:51,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 715 to 435. [2021-10-28 09:33:51,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 435 states, 416 states have (on average 1.4807692307692308) internal successors, (616), 434 states have internal predecessors, (616), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:51,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 435 states to 435 states and 616 transitions. [2021-10-28 09:33:51,073 INFO L78 Accepts]: Start accepts. Automaton has 435 states and 616 transitions. Word has length 55 [2021-10-28 09:33:51,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:33:51,073 INFO L470 AbstractCegarLoop]: Abstraction has 435 states and 616 transitions. [2021-10-28 09:33:51,073 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:51,074 INFO L276 IsEmpty]: Start isEmpty. Operand 435 states and 616 transitions. [2021-10-28 09:33:51,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2021-10-28 09:33:51,075 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:51,075 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:51,075 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-10-28 09:33:51,075 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:51,076 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:51,076 INFO L85 PathProgramCache]: Analyzing trace with hash -748848364, now seen corresponding path program 1 times [2021-10-28 09:33:51,076 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:51,077 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [750956400] [2021-10-28 09:33:51,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:51,077 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:51,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:33:51,212 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:33:51,213 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:33:51,213 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [750956400] [2021-10-28 09:33:51,213 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [750956400] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:33:51,213 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:33:51,213 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:33:51,214 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [458053988] [2021-10-28 09:33:51,215 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:33:51,215 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:33:51,216 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:33:51,216 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:33:51,216 INFO L87 Difference]: Start difference. First operand 435 states and 616 transitions. Second operand has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:51,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:33:51,438 INFO L93 Difference]: Finished difference Result 1027 states and 1468 transitions. [2021-10-28 09:33:51,438 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:33:51,439 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 57 [2021-10-28 09:33:51,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:33:51,444 INFO L225 Difference]: With dead ends: 1027 [2021-10-28 09:33:51,444 INFO L226 Difference]: Without dead ends: 715 [2021-10-28 09:33:51,445 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:33:51,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 715 states. [2021-10-28 09:33:51,473 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 715 to 435. [2021-10-28 09:33:51,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 435 states, 416 states have (on average 1.4711538461538463) internal successors, (612), 434 states have internal predecessors, (612), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:51,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 435 states to 435 states and 612 transitions. [2021-10-28 09:33:51,477 INFO L78 Accepts]: Start accepts. Automaton has 435 states and 612 transitions. Word has length 57 [2021-10-28 09:33:51,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:33:51,478 INFO L470 AbstractCegarLoop]: Abstraction has 435 states and 612 transitions. [2021-10-28 09:33:51,478 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:51,478 INFO L276 IsEmpty]: Start isEmpty. Operand 435 states and 612 transitions. [2021-10-28 09:33:51,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2021-10-28 09:33:51,479 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:51,480 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:51,480 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-10-28 09:33:51,480 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:51,481 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:51,481 INFO L85 PathProgramCache]: Analyzing trace with hash 2035065116, now seen corresponding path program 1 times [2021-10-28 09:33:51,481 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:51,482 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2133671103] [2021-10-28 09:33:51,482 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:51,482 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:51,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:33:51,566 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:33:51,566 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:33:51,566 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2133671103] [2021-10-28 09:33:51,567 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2133671103] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:33:51,567 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:33:51,567 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:33:51,567 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1018872926] [2021-10-28 09:33:51,568 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:33:51,568 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:33:51,569 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:33:51,569 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:33:51,569 INFO L87 Difference]: Start difference. First operand 435 states and 612 transitions. Second operand has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:51,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:33:51,615 INFO L93 Difference]: Finished difference Result 875 states and 1255 transitions. [2021-10-28 09:33:51,616 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:33:51,616 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 58 [2021-10-28 09:33:51,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:33:51,620 INFO L225 Difference]: With dead ends: 875 [2021-10-28 09:33:51,620 INFO L226 Difference]: Without dead ends: 563 [2021-10-28 09:33:51,621 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:33:51,623 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 563 states. [2021-10-28 09:33:51,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 563 to 430. [2021-10-28 09:33:51,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 430 states, 412 states have (on average 1.4660194174757282) internal successors, (604), 429 states have internal predecessors, (604), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:51,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 430 states to 430 states and 604 transitions. [2021-10-28 09:33:51,675 INFO L78 Accepts]: Start accepts. Automaton has 430 states and 604 transitions. Word has length 58 [2021-10-28 09:33:51,675 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:33:51,675 INFO L470 AbstractCegarLoop]: Abstraction has 430 states and 604 transitions. [2021-10-28 09:33:51,676 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:51,676 INFO L276 IsEmpty]: Start isEmpty. Operand 430 states and 604 transitions. [2021-10-28 09:33:51,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2021-10-28 09:33:51,677 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:51,677 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:51,677 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-10-28 09:33:51,678 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:51,678 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:51,678 INFO L85 PathProgramCache]: Analyzing trace with hash -1833641356, now seen corresponding path program 1 times [2021-10-28 09:33:51,679 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:51,679 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1819408140] [2021-10-28 09:33:51,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:51,679 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:51,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:33:51,783 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:33:51,784 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:33:51,784 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1819408140] [2021-10-28 09:33:51,784 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1819408140] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:33:51,784 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:33:51,785 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:33:51,786 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [919083647] [2021-10-28 09:33:51,787 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:33:51,787 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:33:51,788 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:33:51,788 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:33:51,788 INFO L87 Difference]: Start difference. First operand 430 states and 604 transitions. Second operand has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:51,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:33:51,878 INFO L93 Difference]: Finished difference Result 874 states and 1254 transitions. [2021-10-28 09:33:51,878 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:33:51,879 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 62 [2021-10-28 09:33:51,879 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:33:51,882 INFO L225 Difference]: With dead ends: 874 [2021-10-28 09:33:51,883 INFO L226 Difference]: Without dead ends: 567 [2021-10-28 09:33:51,884 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:33:51,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 567 states. [2021-10-28 09:33:51,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 567 to 410. [2021-10-28 09:33:51,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 410 states, 396 states have (on average 1.4444444444444444) internal successors, (572), 409 states have internal predecessors, (572), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:51,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 410 states to 410 states and 572 transitions. [2021-10-28 09:33:51,910 INFO L78 Accepts]: Start accepts. Automaton has 410 states and 572 transitions. Word has length 62 [2021-10-28 09:33:51,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:33:51,911 INFO L470 AbstractCegarLoop]: Abstraction has 410 states and 572 transitions. [2021-10-28 09:33:51,911 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:51,911 INFO L276 IsEmpty]: Start isEmpty. Operand 410 states and 572 transitions. [2021-10-28 09:33:51,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2021-10-28 09:33:51,912 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:51,912 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:51,912 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-10-28 09:33:51,913 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:51,913 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:51,913 INFO L85 PathProgramCache]: Analyzing trace with hash -532758708, now seen corresponding path program 1 times [2021-10-28 09:33:51,913 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:51,914 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [544702277] [2021-10-28 09:33:51,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:51,914 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:51,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:33:51,977 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:33:51,978 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:33:51,978 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [544702277] [2021-10-28 09:33:51,978 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [544702277] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:33:51,978 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:33:51,979 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:33:51,979 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [721452277] [2021-10-28 09:33:51,979 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:33:51,979 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:33:51,980 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:33:51,980 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:33:51,980 INFO L87 Difference]: Start difference. First operand 410 states and 572 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:52,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:33:52,046 INFO L93 Difference]: Finished difference Result 842 states and 1198 transitions. [2021-10-28 09:33:52,047 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:33:52,047 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2021-10-28 09:33:52,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:33:52,050 INFO L225 Difference]: With dead ends: 842 [2021-10-28 09:33:52,051 INFO L226 Difference]: Without dead ends: 555 [2021-10-28 09:33:52,052 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:33:52,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2021-10-28 09:33:52,077 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 398. [2021-10-28 09:33:52,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 398 states, 386 states have (on average 1.4352331606217616) internal successors, (554), 397 states have internal predecessors, (554), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:52,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 398 states to 398 states and 554 transitions. [2021-10-28 09:33:52,080 INFO L78 Accepts]: Start accepts. Automaton has 398 states and 554 transitions. Word has length 66 [2021-10-28 09:33:52,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:33:52,080 INFO L470 AbstractCegarLoop]: Abstraction has 398 states and 554 transitions. [2021-10-28 09:33:52,081 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:52,081 INFO L276 IsEmpty]: Start isEmpty. Operand 398 states and 554 transitions. [2021-10-28 09:33:52,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-10-28 09:33:52,082 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:52,082 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:52,082 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-10-28 09:33:52,082 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:52,083 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:52,083 INFO L85 PathProgramCache]: Analyzing trace with hash 949999250, now seen corresponding path program 1 times [2021-10-28 09:33:52,083 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:52,083 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [226519628] [2021-10-28 09:33:52,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:52,084 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:52,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:33:52,169 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:33:52,170 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:33:52,170 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [226519628] [2021-10-28 09:33:52,170 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [226519628] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:33:52,170 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:33:52,170 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:33:52,170 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [14061770] [2021-10-28 09:33:52,171 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:33:52,171 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:33:52,172 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:33:52,172 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:33:52,172 INFO L87 Difference]: Start difference. First operand 398 states and 554 transitions. Second operand has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:52,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:33:52,289 INFO L93 Difference]: Finished difference Result 838 states and 1190 transitions. [2021-10-28 09:33:52,289 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:33:52,289 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 67 [2021-10-28 09:33:52,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:33:52,293 INFO L225 Difference]: With dead ends: 838 [2021-10-28 09:33:52,294 INFO L226 Difference]: Without dead ends: 563 [2021-10-28 09:33:52,295 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:33:52,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 563 states. [2021-10-28 09:33:52,325 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 563 to 378. [2021-10-28 09:33:52,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 378 states, 370 states have (on average 1.4108108108108108) internal successors, (522), 377 states have internal predecessors, (522), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:52,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 378 states to 378 states and 522 transitions. [2021-10-28 09:33:52,329 INFO L78 Accepts]: Start accepts. Automaton has 378 states and 522 transitions. Word has length 67 [2021-10-28 09:33:52,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:33:52,329 INFO L470 AbstractCegarLoop]: Abstraction has 378 states and 522 transitions. [2021-10-28 09:33:52,330 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:52,330 INFO L276 IsEmpty]: Start isEmpty. Operand 378 states and 522 transitions. [2021-10-28 09:33:52,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2021-10-28 09:33:52,331 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:52,331 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:52,332 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-10-28 09:33:52,332 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:52,332 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:52,332 INFO L85 PathProgramCache]: Analyzing trace with hash -448644128, now seen corresponding path program 1 times [2021-10-28 09:33:52,333 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:52,333 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [628055158] [2021-10-28 09:33:52,333 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:52,333 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:52,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:33:52,490 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:33:52,490 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:33:52,491 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [628055158] [2021-10-28 09:33:52,491 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [628055158] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:33:52,491 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:33:52,491 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 09:33:52,491 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [532270213] [2021-10-28 09:33:52,492 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:33:52,492 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:33:52,493 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:33:52,493 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 09:33:52,493 INFO L87 Difference]: Start difference. First operand 378 states and 522 transitions. Second operand has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:52,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:33:52,733 INFO L93 Difference]: Finished difference Result 1133 states and 1588 transitions. [2021-10-28 09:33:52,733 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 09:33:52,734 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 72 [2021-10-28 09:33:52,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:33:52,739 INFO L225 Difference]: With dead ends: 1133 [2021-10-28 09:33:52,739 INFO L226 Difference]: Without dead ends: 878 [2021-10-28 09:33:52,741 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-28 09:33:52,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 878 states. [2021-10-28 09:33:52,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 878 to 428. [2021-10-28 09:33:52,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 428 states, 420 states have (on average 1.4047619047619047) internal successors, (590), 427 states have internal predecessors, (590), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:52,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 428 states to 428 states and 590 transitions. [2021-10-28 09:33:52,784 INFO L78 Accepts]: Start accepts. Automaton has 428 states and 590 transitions. Word has length 72 [2021-10-28 09:33:52,785 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:33:52,785 INFO L470 AbstractCegarLoop]: Abstraction has 428 states and 590 transitions. [2021-10-28 09:33:52,785 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:52,785 INFO L276 IsEmpty]: Start isEmpty. Operand 428 states and 590 transitions. [2021-10-28 09:33:52,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2021-10-28 09:33:52,786 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:52,786 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:52,787 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-10-28 09:33:52,787 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:52,787 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:52,787 INFO L85 PathProgramCache]: Analyzing trace with hash 534764451, now seen corresponding path program 1 times [2021-10-28 09:33:52,788 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:52,788 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031713063] [2021-10-28 09:33:52,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:52,788 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:52,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:33:52,902 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:33:52,902 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:33:52,902 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2031713063] [2021-10-28 09:33:52,902 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2031713063] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:33:52,902 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:33:52,903 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:33:52,903 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [213801506] [2021-10-28 09:33:52,903 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:33:52,903 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:33:52,904 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:33:52,904 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:33:52,904 INFO L87 Difference]: Start difference. First operand 428 states and 590 transitions. Second operand has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:52,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:33:52,986 INFO L93 Difference]: Finished difference Result 763 states and 1069 transitions. [2021-10-28 09:33:52,986 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:33:52,987 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 73 [2021-10-28 09:33:52,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:33:52,990 INFO L225 Difference]: With dead ends: 763 [2021-10-28 09:33:52,990 INFO L226 Difference]: Without dead ends: 508 [2021-10-28 09:33:52,992 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:33:52,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 508 states. [2021-10-28 09:33:53,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 508 to 424. [2021-10-28 09:33:53,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 424 states, 417 states have (on average 1.3980815347721822) internal successors, (583), 423 states have internal predecessors, (583), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:53,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 424 states to 424 states and 583 transitions. [2021-10-28 09:33:53,041 INFO L78 Accepts]: Start accepts. Automaton has 424 states and 583 transitions. Word has length 73 [2021-10-28 09:33:53,042 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:33:53,042 INFO L470 AbstractCegarLoop]: Abstraction has 424 states and 583 transitions. [2021-10-28 09:33:53,042 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:53,042 INFO L276 IsEmpty]: Start isEmpty. Operand 424 states and 583 transitions. [2021-10-28 09:33:53,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2021-10-28 09:33:53,043 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:53,043 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:53,044 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-10-28 09:33:53,044 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:53,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:53,045 INFO L85 PathProgramCache]: Analyzing trace with hash -344815767, now seen corresponding path program 1 times [2021-10-28 09:33:53,045 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:53,045 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [760760024] [2021-10-28 09:33:53,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:53,045 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:53,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:33:53,161 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:33:53,161 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:33:53,161 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [760760024] [2021-10-28 09:33:53,161 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [760760024] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:33:53,161 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:33:53,162 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:33:53,162 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1636453291] [2021-10-28 09:33:53,162 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:33:53,162 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:33:53,163 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:33:53,163 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:33:53,163 INFO L87 Difference]: Start difference. First operand 424 states and 583 transitions. Second operand has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:53,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:33:53,250 INFO L93 Difference]: Finished difference Result 862 states and 1206 transitions. [2021-10-28 09:33:53,251 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:33:53,251 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 73 [2021-10-28 09:33:53,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:33:53,255 INFO L225 Difference]: With dead ends: 862 [2021-10-28 09:33:53,255 INFO L226 Difference]: Without dead ends: 594 [2021-10-28 09:33:53,260 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:33:53,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 594 states. [2021-10-28 09:33:53,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 594 to 408. [2021-10-28 09:33:53,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 408 states, 403 states have (on average 1.382133995037221) internal successors, (557), 407 states have internal predecessors, (557), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:53,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 408 states to 408 states and 557 transitions. [2021-10-28 09:33:53,300 INFO L78 Accepts]: Start accepts. Automaton has 408 states and 557 transitions. Word has length 73 [2021-10-28 09:33:53,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:33:53,301 INFO L470 AbstractCegarLoop]: Abstraction has 408 states and 557 transitions. [2021-10-28 09:33:53,301 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:53,301 INFO L276 IsEmpty]: Start isEmpty. Operand 408 states and 557 transitions. [2021-10-28 09:33:53,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-28 09:33:53,302 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:53,303 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:53,303 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-10-28 09:33:53,303 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:53,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:53,303 INFO L85 PathProgramCache]: Analyzing trace with hash 317146558, now seen corresponding path program 1 times [2021-10-28 09:33:53,304 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:53,304 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1460625043] [2021-10-28 09:33:53,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:53,304 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:53,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:33:53,448 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:33:53,450 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:33:53,450 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1460625043] [2021-10-28 09:33:53,453 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1460625043] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:33:53,453 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:33:53,453 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-28 09:33:53,453 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1031675469] [2021-10-28 09:33:53,454 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-28 09:33:53,454 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:33:53,454 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 09:33:53,454 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2021-10-28 09:33:53,455 INFO L87 Difference]: Start difference. First operand 408 states and 557 transitions. Second operand has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:53,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:33:53,833 INFO L93 Difference]: Finished difference Result 1404 states and 1944 transitions. [2021-10-28 09:33:53,833 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 09:33:53,834 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-28 09:33:53,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:33:53,840 INFO L225 Difference]: With dead ends: 1404 [2021-10-28 09:33:53,840 INFO L226 Difference]: Without dead ends: 1147 [2021-10-28 09:33:53,841 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-28 09:33:53,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1147 states. [2021-10-28 09:33:53,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1147 to 436. [2021-10-28 09:33:53,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 436 states, 431 states have (on average 1.3665893271461718) internal successors, (589), 435 states have internal predecessors, (589), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:53,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 436 states to 436 states and 589 transitions. [2021-10-28 09:33:53,888 INFO L78 Accepts]: Start accepts. Automaton has 436 states and 589 transitions. Word has length 76 [2021-10-28 09:33:53,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:33:53,888 INFO L470 AbstractCegarLoop]: Abstraction has 436 states and 589 transitions. [2021-10-28 09:33:53,889 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:53,889 INFO L276 IsEmpty]: Start isEmpty. Operand 436 states and 589 transitions. [2021-10-28 09:33:53,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-28 09:33:53,890 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:53,890 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:53,890 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-10-28 09:33:53,890 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:53,891 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:53,891 INFO L85 PathProgramCache]: Analyzing trace with hash 917353494, now seen corresponding path program 1 times [2021-10-28 09:33:53,891 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:53,891 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [773016619] [2021-10-28 09:33:53,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:53,892 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:53,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:33:53,962 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:33:53,962 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:33:53,962 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [773016619] [2021-10-28 09:33:53,963 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [773016619] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:33:53,963 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:33:53,963 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:33:53,963 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [67136119] [2021-10-28 09:33:53,964 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:33:53,964 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:33:53,965 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:33:53,965 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:33:53,965 INFO L87 Difference]: Start difference. First operand 436 states and 589 transitions. Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:54,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:33:54,115 INFO L93 Difference]: Finished difference Result 1115 states and 1519 transitions. [2021-10-28 09:33:54,116 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:33:54,116 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-28 09:33:54,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:33:54,121 INFO L225 Difference]: With dead ends: 1115 [2021-10-28 09:33:54,121 INFO L226 Difference]: Without dead ends: 852 [2021-10-28 09:33:54,122 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:33:54,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 852 states. [2021-10-28 09:33:54,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 852 to 657. [2021-10-28 09:33:54,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 657 states, 652 states have (on average 1.348159509202454) internal successors, (879), 656 states have internal predecessors, (879), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:54,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 657 states to 657 states and 879 transitions. [2021-10-28 09:33:54,204 INFO L78 Accepts]: Start accepts. Automaton has 657 states and 879 transitions. Word has length 76 [2021-10-28 09:33:54,204 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:33:54,204 INFO L470 AbstractCegarLoop]: Abstraction has 657 states and 879 transitions. [2021-10-28 09:33:54,204 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:54,205 INFO L276 IsEmpty]: Start isEmpty. Operand 657 states and 879 transitions. [2021-10-28 09:33:54,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-10-28 09:33:54,206 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:54,206 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:54,206 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-10-28 09:33:54,207 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:54,208 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:54,208 INFO L85 PathProgramCache]: Analyzing trace with hash -480894404, now seen corresponding path program 1 times [2021-10-28 09:33:54,208 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:54,208 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1658276319] [2021-10-28 09:33:54,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:54,209 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:54,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:33:54,307 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:33:54,307 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:33:54,308 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1658276319] [2021-10-28 09:33:54,308 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1658276319] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:33:54,308 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:33:54,308 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 09:33:54,308 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [990131135] [2021-10-28 09:33:54,310 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:33:54,310 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:33:54,311 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:33:54,311 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 09:33:54,311 INFO L87 Difference]: Start difference. First operand 657 states and 879 transitions. Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:54,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:33:54,526 INFO L93 Difference]: Finished difference Result 1021 states and 1390 transitions. [2021-10-28 09:33:54,527 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-28 09:33:54,527 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-10-28 09:33:54,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:33:54,534 INFO L225 Difference]: With dead ends: 1021 [2021-10-28 09:33:54,535 INFO L226 Difference]: Without dead ends: 1019 [2021-10-28 09:33:54,536 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-28 09:33:54,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1019 states. [2021-10-28 09:33:54,607 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1019 to 659. [2021-10-28 09:33:54,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 659 states, 654 states have (on average 1.3470948012232415) internal successors, (881), 658 states have internal predecessors, (881), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:54,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 659 states to 659 states and 881 transitions. [2021-10-28 09:33:54,611 INFO L78 Accepts]: Start accepts. Automaton has 659 states and 881 transitions. Word has length 77 [2021-10-28 09:33:54,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:33:54,611 INFO L470 AbstractCegarLoop]: Abstraction has 659 states and 881 transitions. [2021-10-28 09:33:54,612 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:54,612 INFO L276 IsEmpty]: Start isEmpty. Operand 659 states and 881 transitions. [2021-10-28 09:33:54,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-10-28 09:33:54,613 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:54,613 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:54,614 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-10-28 09:33:54,615 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:54,615 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:54,615 INFO L85 PathProgramCache]: Analyzing trace with hash 1699767669, now seen corresponding path program 1 times [2021-10-28 09:33:54,615 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:54,616 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [275855113] [2021-10-28 09:33:54,616 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:54,616 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:54,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:33:54,784 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:33:54,784 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:33:54,785 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [275855113] [2021-10-28 09:33:54,785 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [275855113] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:33:54,785 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:33:54,785 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 09:33:54,786 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1072329346] [2021-10-28 09:33:54,786 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:33:54,786 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:33:54,787 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:33:54,787 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 09:33:54,787 INFO L87 Difference]: Start difference. First operand 659 states and 881 transitions. Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:55,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:33:55,134 INFO L93 Difference]: Finished difference Result 1988 states and 2739 transitions. [2021-10-28 09:33:55,134 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 09:33:55,135 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-10-28 09:33:55,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:33:55,145 INFO L225 Difference]: With dead ends: 1988 [2021-10-28 09:33:55,145 INFO L226 Difference]: Without dead ends: 1608 [2021-10-28 09:33:55,147 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-28 09:33:55,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1608 states. [2021-10-28 09:33:55,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1608 to 647. [2021-10-28 09:33:55,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 647 states, 642 states have (on average 1.3504672897196262) internal successors, (867), 646 states have internal predecessors, (867), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:55,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 647 states to 647 states and 867 transitions. [2021-10-28 09:33:55,227 INFO L78 Accepts]: Start accepts. Automaton has 647 states and 867 transitions. Word has length 77 [2021-10-28 09:33:55,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:33:55,227 INFO L470 AbstractCegarLoop]: Abstraction has 647 states and 867 transitions. [2021-10-28 09:33:55,227 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:55,228 INFO L276 IsEmpty]: Start isEmpty. Operand 647 states and 867 transitions. [2021-10-28 09:33:55,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-28 09:33:55,229 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:55,229 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:55,229 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-10-28 09:33:55,230 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:55,230 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:55,230 INFO L85 PathProgramCache]: Analyzing trace with hash 239208754, now seen corresponding path program 1 times [2021-10-28 09:33:55,231 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:55,231 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2020433858] [2021-10-28 09:33:55,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:55,231 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:55,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:33:55,312 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:33:55,312 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:33:55,312 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2020433858] [2021-10-28 09:33:55,313 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2020433858] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:33:55,313 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:33:55,313 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 09:33:55,313 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [20273067] [2021-10-28 09:33:55,314 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:33:55,314 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:33:55,315 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:33:55,315 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 09:33:55,315 INFO L87 Difference]: Start difference. First operand 647 states and 867 transitions. Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:55,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:33:55,588 INFO L93 Difference]: Finished difference Result 1542 states and 2165 transitions. [2021-10-28 09:33:55,588 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 09:33:55,589 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-28 09:33:55,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:33:55,596 INFO L225 Difference]: With dead ends: 1542 [2021-10-28 09:33:55,597 INFO L226 Difference]: Without dead ends: 1162 [2021-10-28 09:33:55,598 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-28 09:33:55,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1162 states. [2021-10-28 09:33:55,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1162 to 653. [2021-10-28 09:33:55,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 653 states, 648 states have (on average 1.3472222222222223) internal successors, (873), 652 states have internal predecessors, (873), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:55,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 653 states to 653 states and 873 transitions. [2021-10-28 09:33:55,673 INFO L78 Accepts]: Start accepts. Automaton has 653 states and 873 transitions. Word has length 78 [2021-10-28 09:33:55,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:33:55,674 INFO L470 AbstractCegarLoop]: Abstraction has 653 states and 873 transitions. [2021-10-28 09:33:55,674 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:55,675 INFO L276 IsEmpty]: Start isEmpty. Operand 653 states and 873 transitions. [2021-10-28 09:33:55,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-28 09:33:55,676 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:55,676 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:55,677 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-10-28 09:33:55,677 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:55,677 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:55,678 INFO L85 PathProgramCache]: Analyzing trace with hash 341178161, now seen corresponding path program 1 times [2021-10-28 09:33:55,678 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:55,678 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [747546401] [2021-10-28 09:33:55,678 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:55,678 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:55,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:33:55,741 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:33:55,742 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:33:55,742 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [747546401] [2021-10-28 09:33:55,742 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [747546401] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:33:55,742 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:33:55,743 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:33:55,743 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [111156244] [2021-10-28 09:33:55,743 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:33:55,743 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:33:55,744 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:33:55,744 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:33:55,745 INFO L87 Difference]: Start difference. First operand 653 states and 873 transitions. Second operand has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:55,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:33:55,962 INFO L93 Difference]: Finished difference Result 1511 states and 2028 transitions. [2021-10-28 09:33:55,962 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:33:55,963 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-28 09:33:55,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:33:55,970 INFO L225 Difference]: With dead ends: 1511 [2021-10-28 09:33:55,970 INFO L226 Difference]: Without dead ends: 1107 [2021-10-28 09:33:55,971 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:33:55,973 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1107 states. [2021-10-28 09:33:56,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1107 to 851. [2021-10-28 09:33:56,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 851 states, 846 states have (on average 1.339243498817967) internal successors, (1133), 850 states have internal predecessors, (1133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:56,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 851 states to 851 states and 1133 transitions. [2021-10-28 09:33:56,064 INFO L78 Accepts]: Start accepts. Automaton has 851 states and 1133 transitions. Word has length 78 [2021-10-28 09:33:56,064 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:33:56,064 INFO L470 AbstractCegarLoop]: Abstraction has 851 states and 1133 transitions. [2021-10-28 09:33:56,065 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:56,065 INFO L276 IsEmpty]: Start isEmpty. Operand 851 states and 1133 transitions. [2021-10-28 09:33:56,066 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-28 09:33:56,067 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:56,067 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:56,067 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-10-28 09:33:56,067 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:56,068 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:56,068 INFO L85 PathProgramCache]: Analyzing trace with hash -1360037685, now seen corresponding path program 1 times [2021-10-28 09:33:56,068 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:56,069 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [700962165] [2021-10-28 09:33:56,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:56,069 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:56,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:33:56,197 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:33:56,198 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:33:56,198 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [700962165] [2021-10-28 09:33:56,198 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [700962165] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:33:56,198 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:33:56,198 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 09:33:56,199 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1222722172] [2021-10-28 09:33:56,199 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:33:56,199 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:33:56,200 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:33:56,200 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 09:33:56,201 INFO L87 Difference]: Start difference. First operand 851 states and 1133 transitions. Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:56,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:33:56,826 INFO L93 Difference]: Finished difference Result 3248 states and 4372 transitions. [2021-10-28 09:33:56,826 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 09:33:56,827 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-28 09:33:56,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:33:56,846 INFO L225 Difference]: With dead ends: 3248 [2021-10-28 09:33:56,846 INFO L226 Difference]: Without dead ends: 2713 [2021-10-28 09:33:56,849 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-28 09:33:56,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2713 states. [2021-10-28 09:33:56,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2713 to 901. [2021-10-28 09:33:56,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 901 states, 896 states have (on average 1.3359375) internal successors, (1197), 900 states have internal predecessors, (1197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:56,981 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 901 states to 901 states and 1197 transitions. [2021-10-28 09:33:56,982 INFO L78 Accepts]: Start accepts. Automaton has 901 states and 1197 transitions. Word has length 78 [2021-10-28 09:33:56,982 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:33:56,982 INFO L470 AbstractCegarLoop]: Abstraction has 901 states and 1197 transitions. [2021-10-28 09:33:56,983 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:33:56,983 INFO L276 IsEmpty]: Start isEmpty. Operand 901 states and 1197 transitions. [2021-10-28 09:33:56,984 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2021-10-28 09:33:56,984 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:33:56,985 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:56,985 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-10-28 09:33:56,985 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:33:56,986 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:33:56,986 INFO L85 PathProgramCache]: Analyzing trace with hash -504696615, now seen corresponding path program 1 times [2021-10-28 09:33:56,986 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:33:56,986 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2128734019] [2021-10-28 09:33:56,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:33:56,987 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:33:57,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:33:57,049 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:33:57,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:33:57,226 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:33:57,227 INFO L627 BasicCegarLoop]: Counterexample is feasible [2021-10-28 09:33:57,228 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,231 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,231 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,232 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,232 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,232 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,232 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,233 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,233 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,233 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,233 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,234 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,234 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,234 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,234 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,235 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,235 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,235 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,235 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,236 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,236 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,236 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,236 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:33:57,237 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-10-28 09:33:57,241 INFO L731 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:33:57,245 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-10-28 09:33:57,491 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.10 09:33:57 BoogieIcfgContainer [2021-10-28 09:33:57,491 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-10-28 09:33:57,492 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-28 09:33:57,492 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-28 09:33:57,492 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-28 09:33:57,493 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 09:33:48" (3/4) ... [2021-10-28 09:33:57,495 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-10-28 09:33:57,668 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_41a0416b-55cf-48e4-b7f0-10ab1d27ea5c/bin/uautomizer-UnR33cPsHg/witness.graphml [2021-10-28 09:33:57,668 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-28 09:33:57,671 INFO L168 Benchmark]: Toolchain (without parser) took 11394.64 ms. Allocated memory was 96.5 MB in the beginning and 224.4 MB in the end (delta: 127.9 MB). Free memory was 59.9 MB in the beginning and 144.7 MB in the end (delta: -84.8 MB). Peak memory consumption was 43.0 MB. Max. memory is 16.1 GB. [2021-10-28 09:33:57,671 INFO L168 Benchmark]: CDTParser took 0.30 ms. Allocated memory is still 96.5 MB. Free memory was 67.1 MB in the beginning and 67.0 MB in the end (delta: 21.2 kB). There was no memory consumed. Max. memory is 16.1 GB. [2021-10-28 09:33:57,672 INFO L168 Benchmark]: CACSL2BoogieTranslator took 528.67 ms. Allocated memory is still 96.5 MB. Free memory was 59.9 MB in the beginning and 64.7 MB in the end (delta: -4.8 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. [2021-10-28 09:33:57,673 INFO L168 Benchmark]: Boogie Procedure Inliner took 121.41 ms. Allocated memory is still 96.5 MB. Free memory was 64.7 MB in the beginning and 60.1 MB in the end (delta: 4.6 MB). Peak memory consumption was 6.3 MB. Max. memory is 16.1 GB. [2021-10-28 09:33:57,673 INFO L168 Benchmark]: Boogie Preprocessor took 68.06 ms. Allocated memory is still 96.5 MB. Free memory was 60.1 MB in the beginning and 56.3 MB in the end (delta: 3.7 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 09:33:57,674 INFO L168 Benchmark]: RCFGBuilder took 1477.42 ms. Allocated memory was 96.5 MB in the beginning and 117.4 MB in the end (delta: 21.0 MB). Free memory was 56.3 MB in the beginning and 73.4 MB in the end (delta: -17.1 MB). Peak memory consumption was 33.3 MB. Max. memory is 16.1 GB. [2021-10-28 09:33:57,674 INFO L168 Benchmark]: TraceAbstraction took 9014.03 ms. Allocated memory was 117.4 MB in the beginning and 224.4 MB in the end (delta: 107.0 MB). Free memory was 73.4 MB in the beginning and 171.9 MB in the end (delta: -98.6 MB). Peak memory consumption was 117.2 MB. Max. memory is 16.1 GB. [2021-10-28 09:33:57,675 INFO L168 Benchmark]: Witness Printer took 176.56 ms. Allocated memory is still 224.4 MB. Free memory was 171.9 MB in the beginning and 144.7 MB in the end (delta: 27.3 MB). Peak memory consumption was 27.3 MB. Max. memory is 16.1 GB. [2021-10-28 09:33:57,678 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.30 ms. Allocated memory is still 96.5 MB. Free memory was 67.1 MB in the beginning and 67.0 MB in the end (delta: 21.2 kB). There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 528.67 ms. Allocated memory is still 96.5 MB. Free memory was 59.9 MB in the beginning and 64.7 MB in the end (delta: -4.8 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 121.41 ms. Allocated memory is still 96.5 MB. Free memory was 64.7 MB in the beginning and 60.1 MB in the end (delta: 4.6 MB). Peak memory consumption was 6.3 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 68.06 ms. Allocated memory is still 96.5 MB. Free memory was 60.1 MB in the beginning and 56.3 MB in the end (delta: 3.7 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 1477.42 ms. Allocated memory was 96.5 MB in the beginning and 117.4 MB in the end (delta: 21.0 MB). Free memory was 56.3 MB in the beginning and 73.4 MB in the end (delta: -17.1 MB). Peak memory consumption was 33.3 MB. Max. memory is 16.1 GB. * TraceAbstraction took 9014.03 ms. Allocated memory was 117.4 MB in the beginning and 224.4 MB in the end (delta: 107.0 MB). Free memory was 73.4 MB in the beginning and 171.9 MB in the end (delta: -98.6 MB). Peak memory consumption was 117.2 MB. Max. memory is 16.1 GB. * Witness Printer took 176.56 ms. Allocated memory is still 224.4 MB. Free memory was 171.9 MB in the beginning and 144.7 MB in the end (delta: 27.3 MB). Peak memory consumption was 27.3 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 619]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L542] int c1 ; [L543] int i2 ; [L546] c1 = 0 [L547] side1Failed = __VERIFIER_nondet_bool() [L548] side2Failed = __VERIFIER_nondet_bool() [L549] side1_written = __VERIFIER_nondet_char() [L550] side2_written = __VERIFIER_nondet_char() [L551] side1Failed_History_0 = __VERIFIER_nondet_bool() [L552] side1Failed_History_1 = __VERIFIER_nondet_bool() [L553] side1Failed_History_2 = __VERIFIER_nondet_bool() [L554] side2Failed_History_0 = __VERIFIER_nondet_bool() [L555] side2Failed_History_1 = __VERIFIER_nondet_bool() [L556] side2Failed_History_2 = __VERIFIER_nondet_bool() [L557] active_side_History_0 = __VERIFIER_nondet_char() [L558] active_side_History_1 = __VERIFIER_nondet_char() [L559] active_side_History_2 = __VERIFIER_nondet_char() [L560] manual_selection_History_0 = __VERIFIER_nondet_char() [L561] manual_selection_History_1 = __VERIFIER_nondet_char() [L562] manual_selection_History_2 = __VERIFIER_nondet_char() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=55, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=55, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=55, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=55, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=55, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=55, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=55, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=55, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=55, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=55, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=55, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=55, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L563] i2 = init() [L58] COND FALSE !(!cond) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=55, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L565] cs1_old = nomsg [L566] cs1_new = nomsg [L567] cs2_old = nomsg [L568] cs2_new = nomsg [L569] s1s2_old = nomsg [L570] s1s2_new = nomsg [L571] s1s1_old = nomsg [L572] s1s1_new = nomsg [L573] s2s1_old = nomsg [L574] s2s1_new = nomsg [L575] s2s2_old = nomsg [L576] s2s2_new = nomsg [L577] s1p_old = nomsg [L578] s1p_new = nomsg [L579] s2p_old = nomsg [L580] s2p_new = nomsg [L581] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=55, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L582] COND TRUE i2 < 10 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=55, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=55, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=55, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=55, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND FALSE !(\read(side1Failed)) [L284] side1 = s1s1_old [L285] s1s1_old = nomsg [L286] side2 = s2s1_old [L287] s2s1_old = nomsg [L288] manual_selection = cs1_old [L289] cs1_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L290] COND TRUE (int )side1 == (int )side2 [L291] next_state = (int8_t )1 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L314] EXPR next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L314] s1s1_new = next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new [L315] EXPR next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L315] s1s2_new = next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new [L316] EXPR next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L316] s1p_new = next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new [L317] side1_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=54, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )1 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L409] COND FALSE !((int )side2 == 0) [L412] active_side = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L447] COND TRUE ! side1Failed [L448] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND TRUE ! tmp___0 [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L458] tmp___1 = read_side1_failed_history((unsigned char)1) [L459] COND TRUE ! tmp___1 [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L460] tmp___2 = read_side1_failed_history((unsigned char)0) [L461] COND TRUE ! tmp___2 [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L462] tmp___3 = read_side2_failed_history((unsigned char)1) [L463] COND TRUE ! tmp___3 [L118] COND TRUE (int )index == 0 [L119] return (side2Failed_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L464] tmp___4 = read_side2_failed_history((unsigned char)0) [L465] COND TRUE ! tmp___4 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L466] COND FALSE !(! ((int )side1_written == 1)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L471] COND FALSE !(! (! ((int )side1_written == 0))) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L476] COND TRUE ! (! ((int )side1_written == 1)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L477] COND TRUE ! ((int )side2_written == 0) [L478] return (0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L604] c1 = check() [L617] COND TRUE ! arg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L619] reach_error() VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1_written=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 297 locations, 23 error locations. Started 1 CEGAR loops. OverallTime: 8.6s, OverallIterations: 23, TraceHistogramMax: 1, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 4.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 9704 SDtfs, 12304 SDslu, 14701 SDs, 0 SdLazy, 1333 SolverSat, 141 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 162 GetRequests, 73 SyntacticMatches, 0 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=901occurred in iteration=22, InterpolantAutomatonStates: 119, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.1s AutomataMinimizationTime, 22 MinimizatonAttempts, 7470 StatesRemovedByMinimization, 20 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.8s SatisfiabilityAnalysisTime, 1.6s InterpolantComputationTime, 1473 NumberOfCodeBlocks, 1473 NumberOfCodeBlocksAsserted, 23 NumberOfCheckSat, 1372 ConstructedInterpolants, 0 QuantifiedInterpolants, 4150 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 22 InterpolantComputations, 22 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-10-28 09:33:57,750 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_41a0416b-55cf-48e4-b7f0-10ab1d27ea5c/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...