./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version b2eff8ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a30aa210ed4a7c8ee647a70aef136aef282e5eccb07388ecda6495e33bc30b6d .......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.1-dev-b2eff8b [2021-10-28 08:46:22,678 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-28 08:46:22,681 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-28 08:46:22,720 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-28 08:46:22,721 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-28 08:46:22,723 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-28 08:46:22,726 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-28 08:46:22,729 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-28 08:46:22,736 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-28 08:46:22,738 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-28 08:46:22,741 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-28 08:46:22,745 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-28 08:46:22,746 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-28 08:46:22,756 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-28 08:46:22,759 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-28 08:46:22,761 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-28 08:46:22,762 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-28 08:46:22,764 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-28 08:46:22,767 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-28 08:46:22,771 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-28 08:46:22,774 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-28 08:46:22,777 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-28 08:46:22,779 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-28 08:46:22,781 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-28 08:46:22,786 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-28 08:46:22,787 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-28 08:46:22,787 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-28 08:46:22,789 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-28 08:46:22,790 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-28 08:46:22,792 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-28 08:46:22,793 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-28 08:46:22,798 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-28 08:46:22,800 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-28 08:46:22,803 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-28 08:46:22,805 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-28 08:46:22,806 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-28 08:46:22,808 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-28 08:46:22,808 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-28 08:46:22,809 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-28 08:46:22,810 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-28 08:46:22,812 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-28 08:46:22,813 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/config/svcomp-Reach-32bit-Automizer_Default.epf [2021-10-28 08:46:22,882 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-28 08:46:22,882 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-28 08:46:22,883 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-28 08:46:22,883 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-28 08:46:22,885 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-28 08:46:22,886 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-28 08:46:22,886 INFO L138 SettingsManager]: * Use SBE=true [2021-10-28 08:46:22,887 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-28 08:46:22,887 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-28 08:46:22,887 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-28 08:46:22,889 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-28 08:46:22,889 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-28 08:46:22,890 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-10-28 08:46:22,890 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-10-28 08:46:22,890 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-10-28 08:46:22,891 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-28 08:46:22,891 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-28 08:46:22,892 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-28 08:46:22,892 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-10-28 08:46:22,892 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-28 08:46:22,893 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-28 08:46:22,893 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-10-28 08:46:22,893 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-28 08:46:22,894 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-28 08:46:22,894 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-10-28 08:46:22,894 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-10-28 08:46:22,895 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-28 08:46:22,895 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-10-28 08:46:22,895 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-10-28 08:46:22,898 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2021-10-28 08:46:22,898 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-10-28 08:46:22,898 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-28 08:46:22,899 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a30aa210ed4a7c8ee647a70aef136aef282e5eccb07388ecda6495e33bc30b6d [2021-10-28 08:46:23,300 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-28 08:46:23,335 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-28 08:46:23,339 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-28 08:46:23,341 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-28 08:46:23,342 INFO L275 PluginConnector]: CDTParser initialized [2021-10-28 08:46:23,343 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2021-10-28 08:46:23,456 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/data/7f6207105/456e84327dcb4ffe9504d256ea218ed1/FLAGc8be9b89d [2021-10-28 08:46:24,148 INFO L306 CDTParser]: Found 1 translation units. [2021-10-28 08:46:24,149 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2021-10-28 08:46:24,163 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/data/7f6207105/456e84327dcb4ffe9504d256ea218ed1/FLAGc8be9b89d [2021-10-28 08:46:24,427 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/data/7f6207105/456e84327dcb4ffe9504d256ea218ed1 [2021-10-28 08:46:24,437 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-28 08:46:24,438 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-28 08:46:24,441 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-28 08:46:24,441 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-28 08:46:24,446 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-28 08:46:24,447 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 08:46:24" (1/1) ... [2021-10-28 08:46:24,449 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@9a0bbf1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:46:24, skipping insertion in model container [2021-10-28 08:46:24,449 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 08:46:24" (1/1) ... [2021-10-28 08:46:24,458 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-28 08:46:24,506 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-28 08:46:24,858 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c[14540,14553] [2021-10-28 08:46:24,861 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 08:46:24,874 INFO L203 MainTranslator]: Completed pre-run [2021-10-28 08:46:24,984 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c[14540,14553] [2021-10-28 08:46:24,995 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 08:46:25,031 INFO L208 MainTranslator]: Completed translation [2021-10-28 08:46:25,032 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:46:25 WrapperNode [2021-10-28 08:46:25,032 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-28 08:46:25,034 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-28 08:46:25,034 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-28 08:46:25,034 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-28 08:46:25,043 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:46:25" (1/1) ... [2021-10-28 08:46:25,072 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:46:25" (1/1) ... [2021-10-28 08:46:25,213 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-28 08:46:25,215 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-28 08:46:25,215 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-28 08:46:25,215 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-28 08:46:25,226 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:46:25" (1/1) ... [2021-10-28 08:46:25,226 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:46:25" (1/1) ... [2021-10-28 08:46:25,232 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:46:25" (1/1) ... [2021-10-28 08:46:25,233 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:46:25" (1/1) ... [2021-10-28 08:46:25,259 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:46:25" (1/1) ... [2021-10-28 08:46:25,292 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:46:25" (1/1) ... [2021-10-28 08:46:25,309 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:46:25" (1/1) ... [2021-10-28 08:46:25,318 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-28 08:46:25,332 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-28 08:46:25,332 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-28 08:46:25,332 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-28 08:46:25,334 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:46:25" (1/1) ... [2021-10-28 08:46:25,344 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-28 08:46:25,360 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:46:25,383 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-10-28 08:46:25,401 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-10-28 08:46:25,438 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-28 08:46:25,438 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-28 08:46:25,438 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-28 08:46:25,439 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-28 08:46:26,781 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-28 08:46:26,781 INFO L299 CfgBuilder]: Removed 123 assume(true) statements. [2021-10-28 08:46:26,786 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 08:46:26 BoogieIcfgContainer [2021-10-28 08:46:26,786 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-28 08:46:26,789 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-10-28 08:46:26,789 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-10-28 08:46:26,793 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-10-28 08:46:26,794 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.10 08:46:24" (1/3) ... [2021-10-28 08:46:26,796 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@967606e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.10 08:46:26, skipping insertion in model container [2021-10-28 08:46:26,796 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 08:46:25" (2/3) ... [2021-10-28 08:46:26,798 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@967606e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.10 08:46:26, skipping insertion in model container [2021-10-28 08:46:26,798 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 08:46:26" (3/3) ... [2021-10-28 08:46:26,800 INFO L111 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2021-10-28 08:46:26,810 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-10-28 08:46:26,810 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 23 error locations. [2021-10-28 08:46:26,868 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-10-28 08:46:26,876 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-10-28 08:46:26,877 INFO L340 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2021-10-28 08:46:26,905 INFO L276 IsEmpty]: Start isEmpty. Operand has 295 states, 271 states have (on average 1.7011070110701108) internal successors, (461), 294 states have internal predecessors, (461), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:26,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-28 08:46:26,913 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:26,914 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:26,914 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:26,921 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:26,922 INFO L85 PathProgramCache]: Analyzing trace with hash 349506240, now seen corresponding path program 1 times [2021-10-28 08:46:26,934 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:26,934 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [327886195] [2021-10-28 08:46:26,935 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:26,936 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:27,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:27,193 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:27,194 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:27,194 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [327886195] [2021-10-28 08:46:27,195 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [327886195] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:27,196 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:27,196 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-28 08:46:27,199 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2066894220] [2021-10-28 08:46:27,205 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2021-10-28 08:46:27,206 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:27,227 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-10-28 08:46:27,229 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-28 08:46:27,234 INFO L87 Difference]: Start difference. First operand has 295 states, 271 states have (on average 1.7011070110701108) internal successors, (461), 294 states have internal predecessors, (461), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:27,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:27,351 INFO L93 Difference]: Finished difference Result 574 states and 893 transitions. [2021-10-28 08:46:27,352 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-10-28 08:46:27,353 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-28 08:46:27,354 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:27,382 INFO L225 Difference]: With dead ends: 574 [2021-10-28 08:46:27,382 INFO L226 Difference]: Without dead ends: 291 [2021-10-28 08:46:27,392 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-28 08:46:27,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 291 states. [2021-10-28 08:46:27,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 291 to 291. [2021-10-28 08:46:27,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 291 states, 268 states have (on average 1.585820895522388) internal successors, (425), 290 states have internal predecessors, (425), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:27,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291 states to 291 states and 425 transitions. [2021-10-28 08:46:27,501 INFO L78 Accepts]: Start accepts. Automaton has 291 states and 425 transitions. Word has length 33 [2021-10-28 08:46:27,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:27,503 INFO L470 AbstractCegarLoop]: Abstraction has 291 states and 425 transitions. [2021-10-28 08:46:27,504 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:27,504 INFO L276 IsEmpty]: Start isEmpty. Operand 291 states and 425 transitions. [2021-10-28 08:46:27,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-28 08:46:27,507 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:27,508 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:27,508 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-10-28 08:46:27,509 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:27,513 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:27,513 INFO L85 PathProgramCache]: Analyzing trace with hash -1047215368, now seen corresponding path program 1 times [2021-10-28 08:46:27,513 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:27,514 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [824144083] [2021-10-28 08:46:27,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:27,514 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:27,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:27,718 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:27,719 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:27,720 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [824144083] [2021-10-28 08:46:27,720 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [824144083] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:27,720 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:27,721 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 08:46:27,721 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1688716047] [2021-10-28 08:46:27,723 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 08:46:27,724 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:27,726 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 08:46:27,726 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 08:46:27,727 INFO L87 Difference]: Start difference. First operand 291 states and 425 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:27,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:27,832 INFO L93 Difference]: Finished difference Result 568 states and 824 transitions. [2021-10-28 08:46:27,833 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 08:46:27,833 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-28 08:46:27,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:27,836 INFO L225 Difference]: With dead ends: 568 [2021-10-28 08:46:27,837 INFO L226 Difference]: Without dead ends: 291 [2021-10-28 08:46:27,840 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:46:27,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 291 states. [2021-10-28 08:46:27,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 291 to 291. [2021-10-28 08:46:27,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 291 states, 268 states have (on average 1.541044776119403) internal successors, (413), 290 states have internal predecessors, (413), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:27,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291 states to 291 states and 413 transitions. [2021-10-28 08:46:27,872 INFO L78 Accepts]: Start accepts. Automaton has 291 states and 413 transitions. Word has length 33 [2021-10-28 08:46:27,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:27,873 INFO L470 AbstractCegarLoop]: Abstraction has 291 states and 413 transitions. [2021-10-28 08:46:27,873 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:27,874 INFO L276 IsEmpty]: Start isEmpty. Operand 291 states and 413 transitions. [2021-10-28 08:46:27,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2021-10-28 08:46:27,879 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:27,880 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:27,880 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-10-28 08:46:27,881 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:27,885 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:27,885 INFO L85 PathProgramCache]: Analyzing trace with hash -600938825, now seen corresponding path program 1 times [2021-10-28 08:46:27,886 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:27,886 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1084917349] [2021-10-28 08:46:27,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:27,888 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:28,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:28,180 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:28,181 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:28,182 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1084917349] [2021-10-28 08:46:28,186 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1084917349] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:28,186 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:28,187 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:46:28,187 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [555716250] [2021-10-28 08:46:28,189 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 08:46:28,189 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:28,191 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:46:28,192 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:46:28,193 INFO L87 Difference]: Start difference. First operand 291 states and 413 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:28,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:28,268 INFO L93 Difference]: Finished difference Result 599 states and 859 transitions. [2021-10-28 08:46:28,269 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:46:28,269 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2021-10-28 08:46:28,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:28,273 INFO L225 Difference]: With dead ends: 599 [2021-10-28 08:46:28,273 INFO L226 Difference]: Without dead ends: 325 [2021-10-28 08:46:28,274 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:46:28,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 325 states. [2021-10-28 08:46:28,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 325 to 267. [2021-10-28 08:46:28,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 267 states, 248 states have (on average 1.5201612903225807) internal successors, (377), 266 states have internal predecessors, (377), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:28,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 267 states to 267 states and 377 transitions. [2021-10-28 08:46:28,292 INFO L78 Accepts]: Start accepts. Automaton has 267 states and 377 transitions. Word has length 44 [2021-10-28 08:46:28,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:28,292 INFO L470 AbstractCegarLoop]: Abstraction has 267 states and 377 transitions. [2021-10-28 08:46:28,293 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:28,293 INFO L276 IsEmpty]: Start isEmpty. Operand 267 states and 377 transitions. [2021-10-28 08:46:28,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-10-28 08:46:28,299 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:28,300 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:28,300 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-10-28 08:46:28,300 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:28,301 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:28,302 INFO L85 PathProgramCache]: Analyzing trace with hash -777659854, now seen corresponding path program 1 times [2021-10-28 08:46:28,302 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:28,302 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [987320275] [2021-10-28 08:46:28,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:28,303 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:28,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:28,460 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:28,461 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:28,461 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [987320275] [2021-10-28 08:46:28,461 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [987320275] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:28,462 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:28,462 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:46:28,462 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1688141598] [2021-10-28 08:46:28,463 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 08:46:28,463 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:28,464 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:46:28,464 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:46:28,464 INFO L87 Difference]: Start difference. First operand 267 states and 377 transitions. Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:28,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:28,502 INFO L93 Difference]: Finished difference Result 744 states and 1062 transitions. [2021-10-28 08:46:28,503 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:46:28,504 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 53 [2021-10-28 08:46:28,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:28,508 INFO L225 Difference]: With dead ends: 744 [2021-10-28 08:46:28,509 INFO L226 Difference]: Without dead ends: 494 [2021-10-28 08:46:28,510 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:46:28,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 494 states. [2021-10-28 08:46:28,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 494 to 300. [2021-10-28 08:46:28,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 300 states, 281 states have (on average 1.5124555160142348) internal successors, (425), 299 states have internal predecessors, (425), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:28,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 300 states to 300 states and 425 transitions. [2021-10-28 08:46:28,528 INFO L78 Accepts]: Start accepts. Automaton has 300 states and 425 transitions. Word has length 53 [2021-10-28 08:46:28,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:28,528 INFO L470 AbstractCegarLoop]: Abstraction has 300 states and 425 transitions. [2021-10-28 08:46:28,529 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:28,529 INFO L276 IsEmpty]: Start isEmpty. Operand 300 states and 425 transitions. [2021-10-28 08:46:28,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-28 08:46:28,531 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:28,531 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:28,531 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-10-28 08:46:28,532 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:28,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:28,533 INFO L85 PathProgramCache]: Analyzing trace with hash -2137834776, now seen corresponding path program 1 times [2021-10-28 08:46:28,533 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:28,533 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [897203969] [2021-10-28 08:46:28,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:28,534 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:28,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:28,610 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:28,610 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:28,610 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [897203969] [2021-10-28 08:46:28,611 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [897203969] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:28,611 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:28,611 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:46:28,612 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1641604883] [2021-10-28 08:46:28,612 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 08:46:28,613 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:28,613 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:46:28,614 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:46:28,614 INFO L87 Difference]: Start difference. First operand 300 states and 425 transitions. Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:28,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:28,657 INFO L93 Difference]: Finished difference Result 822 states and 1175 transitions. [2021-10-28 08:46:28,657 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:46:28,658 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-28 08:46:28,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:28,663 INFO L225 Difference]: With dead ends: 822 [2021-10-28 08:46:28,663 INFO L226 Difference]: Without dead ends: 539 [2021-10-28 08:46:28,664 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:46:28,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2021-10-28 08:46:28,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 321. [2021-10-28 08:46:28,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 321 states, 302 states have (on average 1.5066225165562914) internal successors, (455), 320 states have internal predecessors, (455), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:28,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 321 states to 321 states and 455 transitions. [2021-10-28 08:46:28,682 INFO L78 Accepts]: Start accepts. Automaton has 321 states and 455 transitions. Word has length 54 [2021-10-28 08:46:28,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:28,683 INFO L470 AbstractCegarLoop]: Abstraction has 321 states and 455 transitions. [2021-10-28 08:46:28,683 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:28,683 INFO L276 IsEmpty]: Start isEmpty. Operand 321 states and 455 transitions. [2021-10-28 08:46:28,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-28 08:46:28,684 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:28,685 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:28,685 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-10-28 08:46:28,685 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:28,686 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:28,686 INFO L85 PathProgramCache]: Analyzing trace with hash -1457776406, now seen corresponding path program 1 times [2021-10-28 08:46:28,687 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:28,687 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1673923291] [2021-10-28 08:46:28,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:28,688 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:28,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:28,803 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:28,804 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:28,804 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1673923291] [2021-10-28 08:46:28,805 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1673923291] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:28,805 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:28,805 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 08:46:28,806 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1632520676] [2021-10-28 08:46:28,812 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 08:46:28,812 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:28,813 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 08:46:28,815 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:46:28,816 INFO L87 Difference]: Start difference. First operand 321 states and 455 transitions. Second operand has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:29,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:29,152 INFO L93 Difference]: Finished difference Result 1003 states and 1436 transitions. [2021-10-28 08:46:29,153 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 08:46:29,153 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-28 08:46:29,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:29,165 INFO L225 Difference]: With dead ends: 1003 [2021-10-28 08:46:29,165 INFO L226 Difference]: Without dead ends: 699 [2021-10-28 08:46:29,167 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-28 08:46:29,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 699 states. [2021-10-28 08:46:29,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 699 to 419. [2021-10-28 08:46:29,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 419 states, 400 states have (on average 1.48) internal successors, (592), 418 states have internal predecessors, (592), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:29,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 419 states to 419 states and 592 transitions. [2021-10-28 08:46:29,201 INFO L78 Accepts]: Start accepts. Automaton has 419 states and 592 transitions. Word has length 54 [2021-10-28 08:46:29,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:29,202 INFO L470 AbstractCegarLoop]: Abstraction has 419 states and 592 transitions. [2021-10-28 08:46:29,203 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:29,203 INFO L276 IsEmpty]: Start isEmpty. Operand 419 states and 592 transitions. [2021-10-28 08:46:29,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2021-10-28 08:46:29,204 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:29,205 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:29,205 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-10-28 08:46:29,206 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:29,206 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:29,206 INFO L85 PathProgramCache]: Analyzing trace with hash -588423898, now seen corresponding path program 1 times [2021-10-28 08:46:29,207 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:29,213 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1788827792] [2021-10-28 08:46:29,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:29,213 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:29,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:29,379 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:29,379 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:29,380 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1788827792] [2021-10-28 08:46:29,380 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1788827792] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:29,380 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:29,380 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 08:46:29,381 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [351262790] [2021-10-28 08:46:29,382 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 08:46:29,382 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:29,383 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 08:46:29,383 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:46:29,384 INFO L87 Difference]: Start difference. First operand 419 states and 592 transitions. Second operand has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:29,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:29,663 INFO L93 Difference]: Finished difference Result 1003 states and 1428 transitions. [2021-10-28 08:46:29,663 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 08:46:29,663 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 55 [2021-10-28 08:46:29,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:29,669 INFO L225 Difference]: With dead ends: 1003 [2021-10-28 08:46:29,669 INFO L226 Difference]: Without dead ends: 699 [2021-10-28 08:46:29,670 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-28 08:46:29,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 699 states. [2021-10-28 08:46:29,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 699 to 419. [2021-10-28 08:46:29,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 419 states, 400 states have (on average 1.47) internal successors, (588), 418 states have internal predecessors, (588), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:29,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 419 states to 419 states and 588 transitions. [2021-10-28 08:46:29,697 INFO L78 Accepts]: Start accepts. Automaton has 419 states and 588 transitions. Word has length 55 [2021-10-28 08:46:29,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:29,697 INFO L470 AbstractCegarLoop]: Abstraction has 419 states and 588 transitions. [2021-10-28 08:46:29,698 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:29,698 INFO L276 IsEmpty]: Start isEmpty. Operand 419 states and 588 transitions. [2021-10-28 08:46:29,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2021-10-28 08:46:29,699 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:29,699 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:29,699 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-10-28 08:46:29,699 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:29,700 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:29,700 INFO L85 PathProgramCache]: Analyzing trace with hash 1072428279, now seen corresponding path program 1 times [2021-10-28 08:46:29,700 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:29,700 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1322438806] [2021-10-28 08:46:29,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:29,701 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:29,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:29,801 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:29,801 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:29,801 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1322438806] [2021-10-28 08:46:29,802 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1322438806] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:29,802 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:29,802 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:46:29,802 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1116328489] [2021-10-28 08:46:29,803 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 08:46:29,803 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:29,803 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:46:29,804 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:46:29,804 INFO L87 Difference]: Start difference. First operand 419 states and 588 transitions. Second operand has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:29,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:29,848 INFO L93 Difference]: Finished difference Result 843 states and 1199 transitions. [2021-10-28 08:46:29,849 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:46:29,849 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 56 [2021-10-28 08:46:29,849 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:29,853 INFO L225 Difference]: With dead ends: 843 [2021-10-28 08:46:29,854 INFO L226 Difference]: Without dead ends: 539 [2021-10-28 08:46:29,854 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:46:29,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2021-10-28 08:46:29,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 414. [2021-10-28 08:46:29,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 414 states, 396 states have (on average 1.4646464646464648) internal successors, (580), 413 states have internal predecessors, (580), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:29,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 414 states to 414 states and 580 transitions. [2021-10-28 08:46:29,881 INFO L78 Accepts]: Start accepts. Automaton has 414 states and 580 transitions. Word has length 56 [2021-10-28 08:46:29,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:29,882 INFO L470 AbstractCegarLoop]: Abstraction has 414 states and 580 transitions. [2021-10-28 08:46:29,882 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:29,882 INFO L276 IsEmpty]: Start isEmpty. Operand 414 states and 580 transitions. [2021-10-28 08:46:29,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2021-10-28 08:46:29,883 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:29,883 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:29,883 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-10-28 08:46:29,884 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:29,884 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:29,884 INFO L85 PathProgramCache]: Analyzing trace with hash -1887754801, now seen corresponding path program 1 times [2021-10-28 08:46:29,885 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:29,885 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [887535158] [2021-10-28 08:46:29,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:29,885 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:29,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:29,991 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:29,991 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:29,991 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [887535158] [2021-10-28 08:46:29,991 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [887535158] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:29,992 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:29,992 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:46:29,992 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1837455840] [2021-10-28 08:46:29,992 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 08:46:29,993 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:29,993 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:46:29,993 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:46:29,994 INFO L87 Difference]: Start difference. First operand 414 states and 580 transitions. Second operand has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:30,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:30,095 INFO L93 Difference]: Finished difference Result 842 states and 1198 transitions. [2021-10-28 08:46:30,096 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:46:30,096 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 60 [2021-10-28 08:46:30,097 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:30,101 INFO L225 Difference]: With dead ends: 842 [2021-10-28 08:46:30,101 INFO L226 Difference]: Without dead ends: 543 [2021-10-28 08:46:30,102 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:46:30,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 543 states. [2021-10-28 08:46:30,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 543 to 394. [2021-10-28 08:46:30,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 394 states, 380 states have (on average 1.4421052631578948) internal successors, (548), 393 states have internal predecessors, (548), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:30,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 394 states to 394 states and 548 transitions. [2021-10-28 08:46:30,130 INFO L78 Accepts]: Start accepts. Automaton has 394 states and 548 transitions. Word has length 60 [2021-10-28 08:46:30,131 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:30,131 INFO L470 AbstractCegarLoop]: Abstraction has 394 states and 548 transitions. [2021-10-28 08:46:30,131 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:30,131 INFO L276 IsEmpty]: Start isEmpty. Operand 394 states and 548 transitions. [2021-10-28 08:46:30,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2021-10-28 08:46:30,132 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:30,133 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:30,133 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-10-28 08:46:30,133 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:30,134 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:30,134 INFO L85 PathProgramCache]: Analyzing trace with hash 803488295, now seen corresponding path program 1 times [2021-10-28 08:46:30,134 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:30,135 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [486924800] [2021-10-28 08:46:30,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:30,135 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:30,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:30,222 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:30,222 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:30,222 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [486924800] [2021-10-28 08:46:30,223 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [486924800] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:30,223 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:30,223 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:46:30,223 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [921909152] [2021-10-28 08:46:30,224 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 08:46:30,224 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:30,225 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:46:30,225 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:46:30,225 INFO L87 Difference]: Start difference. First operand 394 states and 548 transitions. Second operand has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:30,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:30,295 INFO L93 Difference]: Finished difference Result 810 states and 1142 transitions. [2021-10-28 08:46:30,295 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:46:30,296 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 64 [2021-10-28 08:46:30,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:30,300 INFO L225 Difference]: With dead ends: 810 [2021-10-28 08:46:30,300 INFO L226 Difference]: Without dead ends: 531 [2021-10-28 08:46:30,302 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:46:30,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 531 states. [2021-10-28 08:46:30,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 531 to 382. [2021-10-28 08:46:30,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 382 states, 370 states have (on average 1.4324324324324325) internal successors, (530), 381 states have internal predecessors, (530), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:30,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 382 states to 382 states and 530 transitions. [2021-10-28 08:46:30,331 INFO L78 Accepts]: Start accepts. Automaton has 382 states and 530 transitions. Word has length 64 [2021-10-28 08:46:30,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:30,331 INFO L470 AbstractCegarLoop]: Abstraction has 382 states and 530 transitions. [2021-10-28 08:46:30,332 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:30,332 INFO L276 IsEmpty]: Start isEmpty. Operand 382 states and 530 transitions. [2021-10-28 08:46:30,333 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2021-10-28 08:46:30,333 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:30,333 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:30,334 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-10-28 08:46:30,334 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:30,334 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:30,334 INFO L85 PathProgramCache]: Analyzing trace with hash -576016629, now seen corresponding path program 1 times [2021-10-28 08:46:30,335 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:30,338 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2064742195] [2021-10-28 08:46:30,338 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:30,338 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:30,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:30,490 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:30,491 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:30,491 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2064742195] [2021-10-28 08:46:30,491 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2064742195] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:30,491 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:30,492 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:46:30,492 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [508880730] [2021-10-28 08:46:30,492 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 08:46:30,493 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:30,493 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:46:30,494 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:46:30,494 INFO L87 Difference]: Start difference. First operand 382 states and 530 transitions. Second operand has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:30,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:30,597 INFO L93 Difference]: Finished difference Result 806 states and 1134 transitions. [2021-10-28 08:46:30,598 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:46:30,598 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 65 [2021-10-28 08:46:30,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:30,602 INFO L225 Difference]: With dead ends: 806 [2021-10-28 08:46:30,603 INFO L226 Difference]: Without dead ends: 539 [2021-10-28 08:46:30,604 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:46:30,605 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2021-10-28 08:46:30,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 362. [2021-10-28 08:46:30,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 362 states, 354 states have (on average 1.4067796610169492) internal successors, (498), 361 states have internal predecessors, (498), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:30,634 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 362 states to 362 states and 498 transitions. [2021-10-28 08:46:30,634 INFO L78 Accepts]: Start accepts. Automaton has 362 states and 498 transitions. Word has length 65 [2021-10-28 08:46:30,634 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:30,635 INFO L470 AbstractCegarLoop]: Abstraction has 362 states and 498 transitions. [2021-10-28 08:46:30,635 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:30,635 INFO L276 IsEmpty]: Start isEmpty. Operand 362 states and 498 transitions. [2021-10-28 08:46:30,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2021-10-28 08:46:30,644 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:30,644 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:30,645 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-10-28 08:46:30,645 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:30,645 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:30,646 INFO L85 PathProgramCache]: Analyzing trace with hash 990513659, now seen corresponding path program 1 times [2021-10-28 08:46:30,646 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:30,646 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [689730413] [2021-10-28 08:46:30,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:30,647 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:30,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:30,896 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:30,896 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:30,897 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [689730413] [2021-10-28 08:46:30,899 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [689730413] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:30,899 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:30,900 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 08:46:30,900 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2112725198] [2021-10-28 08:46:30,900 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 08:46:30,901 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:30,901 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 08:46:30,901 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 08:46:30,902 INFO L87 Difference]: Start difference. First operand 362 states and 498 transitions. Second operand has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:31,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:31,173 INFO L93 Difference]: Finished difference Result 1093 states and 1516 transitions. [2021-10-28 08:46:31,174 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 08:46:31,174 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 70 [2021-10-28 08:46:31,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:31,181 INFO L225 Difference]: With dead ends: 1093 [2021-10-28 08:46:31,181 INFO L226 Difference]: Without dead ends: 846 [2021-10-28 08:46:31,182 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-28 08:46:31,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 846 states. [2021-10-28 08:46:31,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 846 to 412. [2021-10-28 08:46:31,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 412 states, 404 states have (on average 1.400990099009901) internal successors, (566), 411 states have internal predecessors, (566), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:31,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 412 states to 412 states and 566 transitions. [2021-10-28 08:46:31,224 INFO L78 Accepts]: Start accepts. Automaton has 412 states and 566 transitions. Word has length 70 [2021-10-28 08:46:31,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:31,224 INFO L470 AbstractCegarLoop]: Abstraction has 412 states and 566 transitions. [2021-10-28 08:46:31,224 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:31,225 INFO L276 IsEmpty]: Start isEmpty. Operand 412 states and 566 transitions. [2021-10-28 08:46:31,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2021-10-28 08:46:31,226 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:31,226 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:31,226 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-10-28 08:46:31,227 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:31,227 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:31,227 INFO L85 PathProgramCache]: Analyzing trace with hash 1319402658, now seen corresponding path program 1 times [2021-10-28 08:46:31,227 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:31,228 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [401243150] [2021-10-28 08:46:31,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:31,228 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:31,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:31,330 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:31,331 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:31,331 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [401243150] [2021-10-28 08:46:31,331 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [401243150] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:31,331 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:31,331 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:46:31,332 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1985655220] [2021-10-28 08:46:31,332 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 08:46:31,332 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:31,333 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:46:31,333 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:46:31,334 INFO L87 Difference]: Start difference. First operand 412 states and 566 transitions. Second operand has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:31,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:31,440 INFO L93 Difference]: Finished difference Result 842 states and 1171 transitions. [2021-10-28 08:46:31,441 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:46:31,441 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2021-10-28 08:46:31,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:31,446 INFO L225 Difference]: With dead ends: 842 [2021-10-28 08:46:31,446 INFO L226 Difference]: Without dead ends: 578 [2021-10-28 08:46:31,447 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:46:31,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 578 states. [2021-10-28 08:46:31,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 578 to 396. [2021-10-28 08:46:31,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 396 states, 390 states have (on average 1.3846153846153846) internal successors, (540), 395 states have internal predecessors, (540), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:31,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 396 states to 396 states and 540 transitions. [2021-10-28 08:46:31,487 INFO L78 Accepts]: Start accepts. Automaton has 396 states and 540 transitions. Word has length 71 [2021-10-28 08:46:31,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:31,488 INFO L470 AbstractCegarLoop]: Abstraction has 396 states and 540 transitions. [2021-10-28 08:46:31,488 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:31,488 INFO L276 IsEmpty]: Start isEmpty. Operand 396 states and 540 transitions. [2021-10-28 08:46:31,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2021-10-28 08:46:31,489 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:31,490 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:31,490 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-10-28 08:46:31,490 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:31,491 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:31,491 INFO L85 PathProgramCache]: Analyzing trace with hash -2095984420, now seen corresponding path program 1 times [2021-10-28 08:46:31,491 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:31,491 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [332670017] [2021-10-28 08:46:31,491 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:31,491 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:31,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:31,630 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:31,630 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:31,631 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [332670017] [2021-10-28 08:46:31,631 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [332670017] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:31,631 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:31,631 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:46:31,631 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1281174469] [2021-10-28 08:46:31,632 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 08:46:31,632 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:31,632 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:46:31,633 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:46:31,633 INFO L87 Difference]: Start difference. First operand 396 states and 540 transitions. Second operand has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:31,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:31,707 INFO L93 Difference]: Finished difference Result 711 states and 985 transitions. [2021-10-28 08:46:31,708 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:46:31,708 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2021-10-28 08:46:31,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:31,711 INFO L225 Difference]: With dead ends: 711 [2021-10-28 08:46:31,712 INFO L226 Difference]: Without dead ends: 476 [2021-10-28 08:46:31,713 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:46:31,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 476 states. [2021-10-28 08:46:31,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 476 to 392. [2021-10-28 08:46:31,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 392 states, 387 states have (on average 1.3772609819121446) internal successors, (533), 391 states have internal predecessors, (533), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:31,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 533 transitions. [2021-10-28 08:46:31,755 INFO L78 Accepts]: Start accepts. Automaton has 392 states and 533 transitions. Word has length 71 [2021-10-28 08:46:31,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:31,756 INFO L470 AbstractCegarLoop]: Abstraction has 392 states and 533 transitions. [2021-10-28 08:46:31,756 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:31,756 INFO L276 IsEmpty]: Start isEmpty. Operand 392 states and 533 transitions. [2021-10-28 08:46:31,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2021-10-28 08:46:31,757 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:31,757 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:31,758 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-10-28 08:46:31,758 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:31,758 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:31,759 INFO L85 PathProgramCache]: Analyzing trace with hash -2054231207, now seen corresponding path program 1 times [2021-10-28 08:46:31,759 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:31,759 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [886278191] [2021-10-28 08:46:31,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:31,759 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:31,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:31,935 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:31,935 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:31,935 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [886278191] [2021-10-28 08:46:31,936 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [886278191] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:31,936 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:31,936 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-28 08:46:31,936 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [657194708] [2021-10-28 08:46:31,937 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-28 08:46:31,937 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:31,937 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 08:46:31,937 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2021-10-28 08:46:31,938 INFO L87 Difference]: Start difference. First operand 392 states and 533 transitions. Second operand has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:32,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:32,423 INFO L93 Difference]: Finished difference Result 1356 states and 1856 transitions. [2021-10-28 08:46:32,424 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 08:46:32,424 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2021-10-28 08:46:32,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:32,433 INFO L225 Difference]: With dead ends: 1356 [2021-10-28 08:46:32,433 INFO L226 Difference]: Without dead ends: 1107 [2021-10-28 08:46:32,439 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-28 08:46:32,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1107 states. [2021-10-28 08:46:32,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1107 to 420. [2021-10-28 08:46:32,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 420 states, 415 states have (on average 1.3614457831325302) internal successors, (565), 419 states have internal predecessors, (565), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:32,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 420 states to 420 states and 565 transitions. [2021-10-28 08:46:32,503 INFO L78 Accepts]: Start accepts. Automaton has 420 states and 565 transitions. Word has length 74 [2021-10-28 08:46:32,504 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:32,504 INFO L470 AbstractCegarLoop]: Abstraction has 420 states and 565 transitions. [2021-10-28 08:46:32,504 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:32,504 INFO L276 IsEmpty]: Start isEmpty. Operand 420 states and 565 transitions. [2021-10-28 08:46:32,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2021-10-28 08:46:32,506 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:32,506 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:32,506 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-10-28 08:46:32,507 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:32,509 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:32,510 INFO L85 PathProgramCache]: Analyzing trace with hash 1972545423, now seen corresponding path program 1 times [2021-10-28 08:46:32,510 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:32,510 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1608341538] [2021-10-28 08:46:32,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:32,511 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:32,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:32,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:32,596 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:32,597 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1608341538] [2021-10-28 08:46:32,599 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1608341538] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:32,600 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:32,600 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 08:46:32,600 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [520002778] [2021-10-28 08:46:32,601 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 08:46:32,601 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:32,601 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 08:46:32,602 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 08:46:32,602 INFO L87 Difference]: Start difference. First operand 420 states and 565 transitions. Second operand has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:32,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:32,799 INFO L93 Difference]: Finished difference Result 1083 states and 1467 transitions. [2021-10-28 08:46:32,800 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 08:46:32,800 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2021-10-28 08:46:32,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:32,806 INFO L225 Difference]: With dead ends: 1083 [2021-10-28 08:46:32,807 INFO L226 Difference]: Without dead ends: 828 [2021-10-28 08:46:32,808 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:46:32,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 828 states. [2021-10-28 08:46:32,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 828 to 633. [2021-10-28 08:46:32,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 633 states, 628 states have (on average 1.3423566878980893) internal successors, (843), 632 states have internal predecessors, (843), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:32,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 633 states to 633 states and 843 transitions. [2021-10-28 08:46:32,888 INFO L78 Accepts]: Start accepts. Automaton has 633 states and 843 transitions. Word has length 74 [2021-10-28 08:46:32,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:32,888 INFO L470 AbstractCegarLoop]: Abstraction has 633 states and 843 transitions. [2021-10-28 08:46:32,889 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:32,889 INFO L276 IsEmpty]: Start isEmpty. Operand 633 states and 843 transitions. [2021-10-28 08:46:32,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-10-28 08:46:32,891 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:32,891 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:32,892 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-10-28 08:46:32,892 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:32,892 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:32,893 INFO L85 PathProgramCache]: Analyzing trace with hash 1201500974, now seen corresponding path program 1 times [2021-10-28 08:46:32,893 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:32,893 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1152021315] [2021-10-28 08:46:32,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:32,894 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:32,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:33,114 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:33,115 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:33,115 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1152021315] [2021-10-28 08:46:33,115 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1152021315] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:33,116 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:33,116 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 08:46:33,116 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [915380811] [2021-10-28 08:46:33,117 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 08:46:33,117 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:33,118 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 08:46:33,118 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 08:46:33,119 INFO L87 Difference]: Start difference. First operand 633 states and 843 transitions. Second operand has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:33,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:33,552 INFO L93 Difference]: Finished difference Result 1906 states and 2597 transitions. [2021-10-28 08:46:33,553 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 08:46:33,553 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2021-10-28 08:46:33,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:33,564 INFO L225 Difference]: With dead ends: 1906 [2021-10-28 08:46:33,565 INFO L226 Difference]: Without dead ends: 1540 [2021-10-28 08:46:33,567 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-28 08:46:33,569 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1540 states. [2021-10-28 08:46:33,649 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1540 to 621. [2021-10-28 08:46:33,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 621 states, 616 states have (on average 1.3457792207792207) internal successors, (829), 620 states have internal predecessors, (829), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:33,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 621 states to 621 states and 829 transitions. [2021-10-28 08:46:33,655 INFO L78 Accepts]: Start accepts. Automaton has 621 states and 829 transitions. Word has length 75 [2021-10-28 08:46:33,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:33,656 INFO L470 AbstractCegarLoop]: Abstraction has 621 states and 829 transitions. [2021-10-28 08:46:33,656 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:33,656 INFO L276 IsEmpty]: Start isEmpty. Operand 621 states and 829 transitions. [2021-10-28 08:46:33,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-10-28 08:46:33,658 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:33,658 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:33,658 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-10-28 08:46:33,659 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:33,659 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:33,659 INFO L85 PathProgramCache]: Analyzing trace with hash -979161099, now seen corresponding path program 1 times [2021-10-28 08:46:33,660 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:33,660 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1226560512] [2021-10-28 08:46:33,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:33,660 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:33,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:33,764 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:33,764 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:33,764 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1226560512] [2021-10-28 08:46:33,765 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1226560512] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:33,765 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:33,765 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 08:46:33,765 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1376896541] [2021-10-28 08:46:33,766 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 08:46:33,766 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:33,767 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 08:46:33,767 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 08:46:33,767 INFO L87 Difference]: Start difference. First operand 621 states and 829 transitions. Second operand has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:34,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:34,041 INFO L93 Difference]: Finished difference Result 973 states and 1316 transitions. [2021-10-28 08:46:34,042 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-28 08:46:34,042 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2021-10-28 08:46:34,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:34,049 INFO L225 Difference]: With dead ends: 973 [2021-10-28 08:46:34,049 INFO L226 Difference]: Without dead ends: 971 [2021-10-28 08:46:34,050 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-28 08:46:34,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 971 states. [2021-10-28 08:46:34,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 971 to 623. [2021-10-28 08:46:34,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 623 states, 618 states have (on average 1.3446601941747574) internal successors, (831), 622 states have internal predecessors, (831), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:34,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 623 states to 623 states and 831 transitions. [2021-10-28 08:46:34,151 INFO L78 Accepts]: Start accepts. Automaton has 623 states and 831 transitions. Word has length 75 [2021-10-28 08:46:34,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:34,152 INFO L470 AbstractCegarLoop]: Abstraction has 623 states and 831 transitions. [2021-10-28 08:46:34,152 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:34,153 INFO L276 IsEmpty]: Start isEmpty. Operand 623 states and 831 transitions. [2021-10-28 08:46:34,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-28 08:46:34,154 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:34,154 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:34,155 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-10-28 08:46:34,156 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:34,156 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:34,157 INFO L85 PathProgramCache]: Analyzing trace with hash 1972810381, now seen corresponding path program 1 times [2021-10-28 08:46:34,157 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:34,157 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2088789100] [2021-10-28 08:46:34,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:34,158 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:34,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:34,266 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:34,267 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:34,267 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2088789100] [2021-10-28 08:46:34,267 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2088789100] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:34,267 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:34,268 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 08:46:34,268 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2071565861] [2021-10-28 08:46:34,270 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 08:46:34,270 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:34,271 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 08:46:34,271 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 08:46:34,272 INFO L87 Difference]: Start difference. First operand 623 states and 831 transitions. Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:34,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:34,570 INFO L93 Difference]: Finished difference Result 1470 states and 2033 transitions. [2021-10-28 08:46:34,571 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 08:46:34,571 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-28 08:46:34,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:34,579 INFO L225 Difference]: With dead ends: 1470 [2021-10-28 08:46:34,579 INFO L226 Difference]: Without dead ends: 1102 [2021-10-28 08:46:34,580 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-28 08:46:34,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1102 states. [2021-10-28 08:46:34,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1102 to 629. [2021-10-28 08:46:34,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 629 states, 624 states have (on average 1.3413461538461537) internal successors, (837), 628 states have internal predecessors, (837), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:34,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 629 states to 629 states and 837 transitions. [2021-10-28 08:46:34,668 INFO L78 Accepts]: Start accepts. Automaton has 629 states and 837 transitions. Word has length 76 [2021-10-28 08:46:34,668 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:34,668 INFO L470 AbstractCegarLoop]: Abstraction has 629 states and 837 transitions. [2021-10-28 08:46:34,669 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:34,669 INFO L276 IsEmpty]: Start isEmpty. Operand 629 states and 837 transitions. [2021-10-28 08:46:34,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-28 08:46:34,670 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:34,671 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:34,671 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-10-28 08:46:34,672 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:34,672 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:34,673 INFO L85 PathProgramCache]: Analyzing trace with hash -1558776470, now seen corresponding path program 1 times [2021-10-28 08:46:34,673 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:34,673 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [498046507] [2021-10-28 08:46:34,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:34,674 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:34,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:34,797 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:34,797 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:34,797 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [498046507] [2021-10-28 08:46:34,798 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [498046507] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:34,798 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:34,798 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 08:46:34,798 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1827601311] [2021-10-28 08:46:34,799 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 08:46:34,799 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:34,799 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 08:46:34,800 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 08:46:34,800 INFO L87 Difference]: Start difference. First operand 629 states and 837 transitions. Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:35,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:35,038 INFO L93 Difference]: Finished difference Result 1467 states and 1956 transitions. [2021-10-28 08:46:35,038 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 08:46:35,039 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-28 08:46:35,039 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:35,046 INFO L225 Difference]: With dead ends: 1467 [2021-10-28 08:46:35,047 INFO L226 Difference]: Without dead ends: 1075 [2021-10-28 08:46:35,048 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:46:35,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1075 states. [2021-10-28 08:46:35,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1075 to 819. [2021-10-28 08:46:35,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 819 states, 814 states have (on average 1.3329238329238329) internal successors, (1085), 818 states have internal predecessors, (1085), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:35,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 819 states to 819 states and 1085 transitions. [2021-10-28 08:46:35,192 INFO L78 Accepts]: Start accepts. Automaton has 819 states and 1085 transitions. Word has length 76 [2021-10-28 08:46:35,192 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:35,193 INFO L470 AbstractCegarLoop]: Abstraction has 819 states and 1085 transitions. [2021-10-28 08:46:35,193 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:35,193 INFO L276 IsEmpty]: Start isEmpty. Operand 819 states and 1085 transitions. [2021-10-28 08:46:35,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-28 08:46:35,195 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:35,196 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:35,196 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-10-28 08:46:35,197 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:35,197 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:35,198 INFO L85 PathProgramCache]: Analyzing trace with hash -932876156, now seen corresponding path program 1 times [2021-10-28 08:46:35,198 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:35,198 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1164434405] [2021-10-28 08:46:35,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:35,199 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:35,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:35,339 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:35,340 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:35,340 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1164434405] [2021-10-28 08:46:35,340 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1164434405] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:35,341 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:35,341 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 08:46:35,341 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1400521018] [2021-10-28 08:46:35,342 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 08:46:35,343 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:35,344 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 08:46:35,344 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 08:46:35,345 INFO L87 Difference]: Start difference. First operand 819 states and 1085 transitions. Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:36,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:36,101 INFO L93 Difference]: Finished difference Result 3152 states and 4196 transitions. [2021-10-28 08:46:36,101 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 08:46:36,102 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-28 08:46:36,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:36,120 INFO L225 Difference]: With dead ends: 3152 [2021-10-28 08:46:36,121 INFO L226 Difference]: Without dead ends: 2633 [2021-10-28 08:46:36,122 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-28 08:46:36,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2633 states. [2021-10-28 08:46:36,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2633 to 873. [2021-10-28 08:46:36,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.3283410138248848) internal successors, (1153), 872 states have internal predecessors, (1153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:36,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1153 transitions. [2021-10-28 08:46:36,274 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1153 transitions. Word has length 76 [2021-10-28 08:46:36,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:36,275 INFO L470 AbstractCegarLoop]: Abstraction has 873 states and 1153 transitions. [2021-10-28 08:46:36,275 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:36,275 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1153 transitions. [2021-10-28 08:46:36,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-10-28 08:46:36,277 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:36,277 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:36,278 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-10-28 08:46:36,278 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:36,278 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:36,279 INFO L85 PathProgramCache]: Analyzing trace with hash 542872594, now seen corresponding path program 1 times [2021-10-28 08:46:36,279 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:36,279 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1271789402] [2021-10-28 08:46:36,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:36,280 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:36,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:36,366 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:36,366 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:36,367 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1271789402] [2021-10-28 08:46:36,367 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1271789402] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:36,367 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:36,367 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 08:46:36,368 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1989352113] [2021-10-28 08:46:36,368 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 08:46:36,368 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:36,369 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 08:46:36,369 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 08:46:36,370 INFO L87 Difference]: Start difference. First operand 873 states and 1153 transitions. Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:36,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:36,721 INFO L93 Difference]: Finished difference Result 2259 states and 2989 transitions. [2021-10-28 08:46:36,722 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 08:46:36,722 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-10-28 08:46:36,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:36,734 INFO L225 Difference]: With dead ends: 2259 [2021-10-28 08:46:36,735 INFO L226 Difference]: Without dead ends: 1687 [2021-10-28 08:46:36,737 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:46:36,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1687 states. [2021-10-28 08:46:36,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1687 to 1214. [2021-10-28 08:46:36,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1214 states, 1209 states have (on average 1.315963606286187) internal successors, (1591), 1213 states have internal predecessors, (1591), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:36,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1214 states to 1214 states and 1591 transitions. [2021-10-28 08:46:36,917 INFO L78 Accepts]: Start accepts. Automaton has 1214 states and 1591 transitions. Word has length 77 [2021-10-28 08:46:36,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:36,917 INFO L470 AbstractCegarLoop]: Abstraction has 1214 states and 1591 transitions. [2021-10-28 08:46:36,917 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:36,918 INFO L276 IsEmpty]: Start isEmpty. Operand 1214 states and 1591 transitions. [2021-10-28 08:46:36,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-28 08:46:36,920 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:36,920 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:36,921 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-10-28 08:46:36,921 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:36,921 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:36,922 INFO L85 PathProgramCache]: Analyzing trace with hash -871568132, now seen corresponding path program 1 times [2021-10-28 08:46:36,922 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:36,922 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [814080549] [2021-10-28 08:46:36,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:36,923 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:36,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:36,993 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:36,994 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:36,994 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [814080549] [2021-10-28 08:46:36,994 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [814080549] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:36,994 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:36,995 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:46:36,995 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1237161349] [2021-10-28 08:46:36,997 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 08:46:36,997 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:36,998 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:46:36,999 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:46:36,999 INFO L87 Difference]: Start difference. First operand 1214 states and 1591 transitions. Second operand has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:37,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:37,395 INFO L93 Difference]: Finished difference Result 2970 states and 3890 transitions. [2021-10-28 08:46:37,395 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:46:37,395 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-28 08:46:37,396 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:37,409 INFO L225 Difference]: With dead ends: 2970 [2021-10-28 08:46:37,409 INFO L226 Difference]: Without dead ends: 2014 [2021-10-28 08:46:37,411 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:46:37,414 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2014 states. [2021-10-28 08:46:37,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2014 to 1216. [2021-10-28 08:46:37,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1216 states, 1211 states have (on average 1.3154417836498762) internal successors, (1593), 1215 states have internal predecessors, (1593), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:37,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1216 states to 1216 states and 1593 transitions. [2021-10-28 08:46:37,627 INFO L78 Accepts]: Start accepts. Automaton has 1216 states and 1593 transitions. Word has length 78 [2021-10-28 08:46:37,630 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:37,631 INFO L470 AbstractCegarLoop]: Abstraction has 1216 states and 1593 transitions. [2021-10-28 08:46:37,631 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:37,631 INFO L276 IsEmpty]: Start isEmpty. Operand 1216 states and 1593 transitions. [2021-10-28 08:46:37,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2021-10-28 08:46:37,634 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:37,634 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:37,634 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-10-28 08:46:37,635 INFO L402 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:37,635 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:37,635 INFO L85 PathProgramCache]: Analyzing trace with hash 1856049885, now seen corresponding path program 1 times [2021-10-28 08:46:37,636 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:37,636 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1619806961] [2021-10-28 08:46:37,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:37,637 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:37,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:37,743 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:37,743 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:37,743 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1619806961] [2021-10-28 08:46:37,744 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1619806961] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:37,744 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:37,744 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 08:46:37,744 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [733684004] [2021-10-28 08:46:37,745 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 08:46:37,745 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:37,746 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 08:46:37,746 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 08:46:37,747 INFO L87 Difference]: Start difference. First operand 1216 states and 1593 transitions. Second operand has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:38,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:38,062 INFO L93 Difference]: Finished difference Result 2522 states and 3298 transitions. [2021-10-28 08:46:38,063 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 08:46:38,063 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 79 [2021-10-28 08:46:38,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:38,073 INFO L225 Difference]: With dead ends: 2522 [2021-10-28 08:46:38,074 INFO L226 Difference]: Without dead ends: 1378 [2021-10-28 08:46:38,076 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:46:38,079 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1378 states. [2021-10-28 08:46:38,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1378 to 1021. [2021-10-28 08:46:38,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1021 states, 1016 states have (on average 1.3080708661417322) internal successors, (1329), 1020 states have internal predecessors, (1329), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:38,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1021 states to 1021 states and 1329 transitions. [2021-10-28 08:46:38,260 INFO L78 Accepts]: Start accepts. Automaton has 1021 states and 1329 transitions. Word has length 79 [2021-10-28 08:46:38,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:38,261 INFO L470 AbstractCegarLoop]: Abstraction has 1021 states and 1329 transitions. [2021-10-28 08:46:38,261 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:38,261 INFO L276 IsEmpty]: Start isEmpty. Operand 1021 states and 1329 transitions. [2021-10-28 08:46:38,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-10-28 08:46:38,263 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:38,263 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:38,263 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-10-28 08:46:38,264 INFO L402 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:38,264 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:38,265 INFO L85 PathProgramCache]: Analyzing trace with hash 1593609901, now seen corresponding path program 1 times [2021-10-28 08:46:38,265 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:38,265 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [593341362] [2021-10-28 08:46:38,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:38,266 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:38,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:38,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:38,308 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:38,308 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [593341362] [2021-10-28 08:46:38,309 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [593341362] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:38,309 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:38,309 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 08:46:38,309 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1916994301] [2021-10-28 08:46:38,310 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 08:46:38,310 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:38,311 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 08:46:38,311 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:46:38,311 INFO L87 Difference]: Start difference. First operand 1021 states and 1329 transitions. Second operand has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:38,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:38,645 INFO L93 Difference]: Finished difference Result 2417 states and 3163 transitions. [2021-10-28 08:46:38,645 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 08:46:38,646 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-10-28 08:46:38,646 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:38,659 INFO L225 Difference]: With dead ends: 2417 [2021-10-28 08:46:38,660 INFO L226 Difference]: Without dead ends: 1539 [2021-10-28 08:46:38,662 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 08:46:38,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1539 states. [2021-10-28 08:46:38,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1539 to 1027. [2021-10-28 08:46:38,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1027 states, 1022 states have (on average 1.3062622309197651) internal successors, (1335), 1026 states have internal predecessors, (1335), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:38,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1027 states to 1027 states and 1335 transitions. [2021-10-28 08:46:38,851 INFO L78 Accepts]: Start accepts. Automaton has 1027 states and 1335 transitions. Word has length 80 [2021-10-28 08:46:38,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:38,851 INFO L470 AbstractCegarLoop]: Abstraction has 1027 states and 1335 transitions. [2021-10-28 08:46:38,852 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:38,852 INFO L276 IsEmpty]: Start isEmpty. Operand 1027 states and 1335 transitions. [2021-10-28 08:46:38,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-10-28 08:46:38,853 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:38,854 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:38,854 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-10-28 08:46:38,854 INFO L402 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:38,855 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:38,855 INFO L85 PathProgramCache]: Analyzing trace with hash 1333673785, now seen corresponding path program 1 times [2021-10-28 08:46:38,855 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:38,856 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2117491947] [2021-10-28 08:46:38,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:38,856 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:38,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:38,943 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:38,943 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:38,943 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2117491947] [2021-10-28 08:46:38,944 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2117491947] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:38,944 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:46:38,944 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 08:46:38,944 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1058602107] [2021-10-28 08:46:38,945 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 08:46:38,946 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:38,946 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 08:46:38,947 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 08:46:38,948 INFO L87 Difference]: Start difference. First operand 1027 states and 1335 transitions. Second operand has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:39,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:39,205 INFO L93 Difference]: Finished difference Result 2370 states and 3088 transitions. [2021-10-28 08:46:39,205 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 08:46:39,206 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-10-28 08:46:39,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:39,216 INFO L225 Difference]: With dead ends: 2370 [2021-10-28 08:46:39,216 INFO L226 Difference]: Without dead ends: 1438 [2021-10-28 08:46:39,218 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:46:39,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1438 states. [2021-10-28 08:46:39,391 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1438 to 969. [2021-10-28 08:46:39,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 969 states, 964 states have (on average 1.299792531120332) internal successors, (1253), 968 states have internal predecessors, (1253), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:39,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 969 states to 969 states and 1253 transitions. [2021-10-28 08:46:39,397 INFO L78 Accepts]: Start accepts. Automaton has 969 states and 1253 transitions. Word has length 80 [2021-10-28 08:46:39,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:39,398 INFO L470 AbstractCegarLoop]: Abstraction has 969 states and 1253 transitions. [2021-10-28 08:46:39,398 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:39,398 INFO L276 IsEmpty]: Start isEmpty. Operand 969 states and 1253 transitions. [2021-10-28 08:46:39,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2021-10-28 08:46:39,402 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:39,403 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:39,403 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-10-28 08:46:39,403 INFO L402 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:39,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:39,404 INFO L85 PathProgramCache]: Analyzing trace with hash -1625709510, now seen corresponding path program 1 times [2021-10-28 08:46:39,404 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:39,404 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [923772151] [2021-10-28 08:46:39,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:39,405 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:39,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:39,598 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:39,598 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:39,599 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [923772151] [2021-10-28 08:46:39,599 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [923772151] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:46:39,599 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [485008719] [2021-10-28 08:46:39,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:39,600 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:46:39,600 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:46:39,605 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:46:39,637 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-10-28 08:46:39,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:39,877 INFO L263 TraceCheckSpWp]: Trace formula consists of 713 conjuncts, 8 conjunts are in the unsatisfiable core [2021-10-28 08:46:39,897 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:46:40,528 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-28 08:46:40,528 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [485008719] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:46:40,529 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-28 08:46:40,529 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2021-10-28 08:46:40,529 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [259570402] [2021-10-28 08:46:40,530 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 08:46:40,530 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:40,531 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 08:46:40,531 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2021-10-28 08:46:40,531 INFO L87 Difference]: Start difference. First operand 969 states and 1253 transitions. Second operand has 6 states, 6 states have (on average 20.833333333333332) internal successors, (125), 6 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:41,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:41,098 INFO L93 Difference]: Finished difference Result 2494 states and 3326 transitions. [2021-10-28 08:46:41,098 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 08:46:41,099 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 20.833333333333332) internal successors, (125), 6 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 126 [2021-10-28 08:46:41,099 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:41,123 INFO L225 Difference]: With dead ends: 2494 [2021-10-28 08:46:41,130 INFO L226 Difference]: Without dead ends: 1704 [2021-10-28 08:46:41,132 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 123 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2021-10-28 08:46:41,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1704 states. [2021-10-28 08:46:41,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1704 to 969. [2021-10-28 08:46:41,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 969 states, 964 states have (on average 1.2987551867219918) internal successors, (1252), 968 states have internal predecessors, (1252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:41,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 969 states to 969 states and 1252 transitions. [2021-10-28 08:46:41,311 INFO L78 Accepts]: Start accepts. Automaton has 969 states and 1252 transitions. Word has length 126 [2021-10-28 08:46:41,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:41,312 INFO L470 AbstractCegarLoop]: Abstraction has 969 states and 1252 transitions. [2021-10-28 08:46:41,312 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 20.833333333333332) internal successors, (125), 6 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:41,312 INFO L276 IsEmpty]: Start isEmpty. Operand 969 states and 1252 transitions. [2021-10-28 08:46:41,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2021-10-28 08:46:41,316 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:41,316 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:41,369 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-10-28 08:46:41,530 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2021-10-28 08:46:41,530 INFO L402 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:41,531 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:41,531 INFO L85 PathProgramCache]: Analyzing trace with hash 652850677, now seen corresponding path program 1 times [2021-10-28 08:46:41,531 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:41,531 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2129916671] [2021-10-28 08:46:41,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:41,531 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:41,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:41,718 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:41,719 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:41,719 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2129916671] [2021-10-28 08:46:41,719 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2129916671] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:46:41,720 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2144166023] [2021-10-28 08:46:41,720 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:41,720 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:46:41,720 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:46:41,721 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:46:41,745 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-10-28 08:46:42,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:42,023 INFO L263 TraceCheckSpWp]: Trace formula consists of 727 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-28 08:46:42,032 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:46:42,742 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:42,743 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2144166023] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:46:42,743 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 08:46:42,743 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 13 [2021-10-28 08:46:42,743 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [283959880] [2021-10-28 08:46:42,744 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2021-10-28 08:46:42,744 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:42,744 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-10-28 08:46:42,745 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2021-10-28 08:46:42,745 INFO L87 Difference]: Start difference. First operand 969 states and 1252 transitions. Second operand has 13 states, 13 states have (on average 19.53846153846154) internal successors, (254), 13 states have internal predecessors, (254), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:55,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:55,662 INFO L93 Difference]: Finished difference Result 16611 states and 22057 transitions. [2021-10-28 08:46:55,665 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 242 states. [2021-10-28 08:46:55,665 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 19.53846153846154) internal successors, (254), 13 states have internal predecessors, (254), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 130 [2021-10-28 08:46:55,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:55,716 INFO L225 Difference]: With dead ends: 16611 [2021-10-28 08:46:55,716 INFO L226 Difference]: Without dead ends: 15827 [2021-10-28 08:46:55,744 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 473 GetRequests, 222 SyntacticMatches, 0 SemanticMatches, 251 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29009 ImplicationChecksByTransitivity, 6.8s TimeCoverageRelationStatistics Valid=8289, Invalid=55467, Unknown=0, NotChecked=0, Total=63756 [2021-10-28 08:46:55,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15827 states. [2021-10-28 08:46:56,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15827 to 2668. [2021-10-28 08:46:56,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2668 states, 2663 states have (on average 1.2996620352985355) internal successors, (3461), 2667 states have internal predecessors, (3461), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:56,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2668 states to 2668 states and 3461 transitions. [2021-10-28 08:46:56,442 INFO L78 Accepts]: Start accepts. Automaton has 2668 states and 3461 transitions. Word has length 130 [2021-10-28 08:46:56,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:46:56,442 INFO L470 AbstractCegarLoop]: Abstraction has 2668 states and 3461 transitions. [2021-10-28 08:46:56,443 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 19.53846153846154) internal successors, (254), 13 states have internal predecessors, (254), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:56,443 INFO L276 IsEmpty]: Start isEmpty. Operand 2668 states and 3461 transitions. [2021-10-28 08:46:56,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2021-10-28 08:46:56,450 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:46:56,450 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:46:56,501 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2021-10-28 08:46:56,677 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2021-10-28 08:46:56,678 INFO L402 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:46:56,678 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:46:56,679 INFO L85 PathProgramCache]: Analyzing trace with hash 1302889785, now seen corresponding path program 1 times [2021-10-28 08:46:56,679 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:46:56,679 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1512966566] [2021-10-28 08:46:56,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:56,679 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:46:56,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:56,938 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:56,939 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:46:56,939 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1512966566] [2021-10-28 08:46:56,939 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1512966566] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:46:56,939 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1007378323] [2021-10-28 08:46:56,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:46:56,940 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:46:56,940 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:46:56,941 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:46:56,961 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-10-28 08:46:57,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:46:57,310 INFO L263 TraceCheckSpWp]: Trace formula consists of 779 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-28 08:46:57,317 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:46:58,013 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:46:58,014 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1007378323] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:46:58,014 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 08:46:58,014 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 8 [2021-10-28 08:46:58,014 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [588669093] [2021-10-28 08:46:58,015 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2021-10-28 08:46:58,015 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:46:58,016 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-10-28 08:46:58,016 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2021-10-28 08:46:58,016 INFO L87 Difference]: Start difference. First operand 2668 states and 3461 transitions. Second operand has 8 states, 8 states have (on average 19.625) internal successors, (157), 8 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:46:59,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:46:59,901 INFO L93 Difference]: Finished difference Result 9437 states and 12657 transitions. [2021-10-28 08:46:59,902 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2021-10-28 08:46:59,902 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 19.625) internal successors, (157), 8 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 131 [2021-10-28 08:46:59,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:46:59,919 INFO L225 Difference]: With dead ends: 9437 [2021-10-28 08:46:59,920 INFO L226 Difference]: Without dead ends: 6988 [2021-10-28 08:46:59,925 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 141 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=146, Invalid=360, Unknown=0, NotChecked=0, Total=506 [2021-10-28 08:46:59,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6988 states. [2021-10-28 08:47:00,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6988 to 2251. [2021-10-28 08:47:00,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2251 states, 2246 states have (on average 1.2943009795191451) internal successors, (2907), 2250 states have internal predecessors, (2907), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:00,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2251 states to 2251 states and 2907 transitions. [2021-10-28 08:47:00,406 INFO L78 Accepts]: Start accepts. Automaton has 2251 states and 2907 transitions. Word has length 131 [2021-10-28 08:47:00,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:47:00,407 INFO L470 AbstractCegarLoop]: Abstraction has 2251 states and 2907 transitions. [2021-10-28 08:47:00,407 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 19.625) internal successors, (157), 8 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:00,407 INFO L276 IsEmpty]: Start isEmpty. Operand 2251 states and 2907 transitions. [2021-10-28 08:47:00,414 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2021-10-28 08:47:00,414 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:47:00,414 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:47:00,462 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2021-10-28 08:47:00,641 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2021-10-28 08:47:00,642 INFO L402 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:47:00,642 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:47:00,642 INFO L85 PathProgramCache]: Analyzing trace with hash 1342385059, now seen corresponding path program 1 times [2021-10-28 08:47:00,642 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:47:00,642 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1009477690] [2021-10-28 08:47:00,642 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:47:00,643 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:47:00,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:47:00,796 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2021-10-28 08:47:00,796 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:47:00,797 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1009477690] [2021-10-28 08:47:00,797 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1009477690] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:47:00,797 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:47:00,797 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-28 08:47:00,798 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [238929985] [2021-10-28 08:47:00,798 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-28 08:47:00,798 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:47:00,799 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 08:47:00,799 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-10-28 08:47:00,800 INFO L87 Difference]: Start difference. First operand 2251 states and 2907 transitions. Second operand has 7 states, 7 states have (on average 16.285714285714285) internal successors, (114), 7 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:02,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:47:02,934 INFO L93 Difference]: Finished difference Result 12947 states and 17105 transitions. [2021-10-28 08:47:02,934 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-10-28 08:47:02,935 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.285714285714285) internal successors, (114), 7 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 132 [2021-10-28 08:47:02,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:47:02,961 INFO L225 Difference]: With dead ends: 12947 [2021-10-28 08:47:02,961 INFO L226 Difference]: Without dead ends: 10935 [2021-10-28 08:47:02,967 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2021-10-28 08:47:02,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10935 states. [2021-10-28 08:47:03,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10935 to 2671. [2021-10-28 08:47:03,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2671 states, 2666 states have (on average 1.2768192048012004) internal successors, (3404), 2670 states have internal predecessors, (3404), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:03,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2671 states to 2671 states and 3404 transitions. [2021-10-28 08:47:03,569 INFO L78 Accepts]: Start accepts. Automaton has 2671 states and 3404 transitions. Word has length 132 [2021-10-28 08:47:03,569 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:47:03,569 INFO L470 AbstractCegarLoop]: Abstraction has 2671 states and 3404 transitions. [2021-10-28 08:47:03,569 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.285714285714285) internal successors, (114), 7 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:03,569 INFO L276 IsEmpty]: Start isEmpty. Operand 2671 states and 3404 transitions. [2021-10-28 08:47:03,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2021-10-28 08:47:03,578 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:47:03,578 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:47:03,578 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2021-10-28 08:47:03,579 INFO L402 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:47:03,579 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:47:03,580 INFO L85 PathProgramCache]: Analyzing trace with hash 2020329826, now seen corresponding path program 1 times [2021-10-28 08:47:03,580 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:47:03,580 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [760537637] [2021-10-28 08:47:03,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:47:03,581 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:47:03,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:47:03,748 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-28 08:47:03,748 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:47:03,748 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [760537637] [2021-10-28 08:47:03,749 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [760537637] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:47:03,749 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:47:03,749 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 08:47:03,749 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [290436002] [2021-10-28 08:47:03,750 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 08:47:03,750 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:47:03,751 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 08:47:03,751 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 08:47:03,751 INFO L87 Difference]: Start difference. First operand 2671 states and 3404 transitions. Second operand has 6 states, 6 states have (on average 21.333333333333332) internal successors, (128), 6 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:05,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:47:05,108 INFO L93 Difference]: Finished difference Result 8601 states and 11289 transitions. [2021-10-28 08:47:05,108 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 08:47:05,109 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.333333333333332) internal successors, (128), 6 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 133 [2021-10-28 08:47:05,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:47:05,123 INFO L225 Difference]: With dead ends: 8601 [2021-10-28 08:47:05,124 INFO L226 Difference]: Without dead ends: 6109 [2021-10-28 08:47:05,128 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-28 08:47:05,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6109 states. [2021-10-28 08:47:05,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6109 to 2671. [2021-10-28 08:47:05,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2671 states, 2666 states have (on average 1.275318829707427) internal successors, (3400), 2670 states have internal predecessors, (3400), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:05,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2671 states to 2671 states and 3400 transitions. [2021-10-28 08:47:05,714 INFO L78 Accepts]: Start accepts. Automaton has 2671 states and 3400 transitions. Word has length 133 [2021-10-28 08:47:05,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:47:05,717 INFO L470 AbstractCegarLoop]: Abstraction has 2671 states and 3400 transitions. [2021-10-28 08:47:05,717 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.333333333333332) internal successors, (128), 6 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:05,717 INFO L276 IsEmpty]: Start isEmpty. Operand 2671 states and 3400 transitions. [2021-10-28 08:47:05,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2021-10-28 08:47:05,727 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:47:05,727 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:47:05,728 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-10-28 08:47:05,728 INFO L402 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:47:05,729 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:47:05,729 INFO L85 PathProgramCache]: Analyzing trace with hash -1433899619, now seen corresponding path program 1 times [2021-10-28 08:47:05,729 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:47:05,729 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [412851261] [2021-10-28 08:47:05,730 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:47:05,730 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:47:05,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:47:05,928 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-28 08:47:05,929 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:47:05,929 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [412851261] [2021-10-28 08:47:05,929 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [412851261] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:47:05,930 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:47:05,930 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 08:47:05,930 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [612688113] [2021-10-28 08:47:05,932 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 08:47:05,932 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:47:05,933 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 08:47:05,933 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 08:47:05,933 INFO L87 Difference]: Start difference. First operand 2671 states and 3400 transitions. Second operand has 6 states, 6 states have (on average 22.0) internal successors, (132), 6 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:06,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:47:06,995 INFO L93 Difference]: Finished difference Result 7787 states and 10093 transitions. [2021-10-28 08:47:06,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 08:47:06,996 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 22.0) internal successors, (132), 6 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 137 [2021-10-28 08:47:06,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:47:07,006 INFO L225 Difference]: With dead ends: 7787 [2021-10-28 08:47:07,006 INFO L226 Difference]: Without dead ends: 5295 [2021-10-28 08:47:07,011 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-28 08:47:07,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5295 states. [2021-10-28 08:47:07,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5295 to 2671. [2021-10-28 08:47:07,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2671 states, 2666 states have (on average 1.2738184546136535) internal successors, (3396), 2670 states have internal predecessors, (3396), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:07,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2671 states to 2671 states and 3396 transitions. [2021-10-28 08:47:07,544 INFO L78 Accepts]: Start accepts. Automaton has 2671 states and 3396 transitions. Word has length 137 [2021-10-28 08:47:07,544 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:47:07,545 INFO L470 AbstractCegarLoop]: Abstraction has 2671 states and 3396 transitions. [2021-10-28 08:47:07,545 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 22.0) internal successors, (132), 6 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:07,545 INFO L276 IsEmpty]: Start isEmpty. Operand 2671 states and 3396 transitions. [2021-10-28 08:47:07,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-10-28 08:47:07,553 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:47:07,553 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:47:07,553 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2021-10-28 08:47:07,554 INFO L402 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:47:07,554 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:47:07,554 INFO L85 PathProgramCache]: Analyzing trace with hash 1119861603, now seen corresponding path program 1 times [2021-10-28 08:47:07,555 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:47:07,555 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [290245561] [2021-10-28 08:47:07,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:47:07,555 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:47:07,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:47:07,689 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-10-28 08:47:07,689 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:47:07,690 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [290245561] [2021-10-28 08:47:07,690 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [290245561] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:47:07,690 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:47:07,690 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 08:47:07,691 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1110020930] [2021-10-28 08:47:07,691 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 08:47:07,692 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:47:07,692 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 08:47:07,692 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 08:47:07,693 INFO L87 Difference]: Start difference. First operand 2671 states and 3396 transitions. Second operand has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:07,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:47:07,971 INFO L93 Difference]: Finished difference Result 4373 states and 5591 transitions. [2021-10-28 08:47:07,971 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 08:47:07,971 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-10-28 08:47:07,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:47:07,974 INFO L225 Difference]: With dead ends: 4373 [2021-10-28 08:47:07,974 INFO L226 Difference]: Without dead ends: 1843 [2021-10-28 08:47:07,977 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:47:07,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1843 states. [2021-10-28 08:47:08,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1843 to 1843. [2021-10-28 08:47:08,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1843 states, 1838 states have (on average 1.2731229597388465) internal successors, (2340), 1842 states have internal predecessors, (2340), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:08,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1843 states to 1843 states and 2340 transitions. [2021-10-28 08:47:08,279 INFO L78 Accepts]: Start accepts. Automaton has 1843 states and 2340 transitions. Word has length 140 [2021-10-28 08:47:08,280 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:47:08,280 INFO L470 AbstractCegarLoop]: Abstraction has 1843 states and 2340 transitions. [2021-10-28 08:47:08,280 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:08,280 INFO L276 IsEmpty]: Start isEmpty. Operand 1843 states and 2340 transitions. [2021-10-28 08:47:08,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-10-28 08:47:08,286 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:47:08,286 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:47:08,287 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2021-10-28 08:47:08,287 INFO L402 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:47:08,287 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:47:08,288 INFO L85 PathProgramCache]: Analyzing trace with hash 2051408537, now seen corresponding path program 1 times [2021-10-28 08:47:08,288 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:47:08,288 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1614552310] [2021-10-28 08:47:08,288 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:47:08,289 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:47:08,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:47:08,563 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 25 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:47:08,563 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:47:08,563 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1614552310] [2021-10-28 08:47:08,563 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1614552310] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:47:08,563 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1025090824] [2021-10-28 08:47:08,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:47:08,564 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:47:08,564 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:47:08,569 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:47:08,589 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-10-28 08:47:08,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:47:08,946 INFO L263 TraceCheckSpWp]: Trace formula consists of 806 conjuncts, 22 conjunts are in the unsatisfiable core [2021-10-28 08:47:08,952 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:47:10,067 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 25 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:47:10,068 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1025090824] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:47:10,068 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 08:47:10,068 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 17 [2021-10-28 08:47:10,069 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [560338106] [2021-10-28 08:47:10,069 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2021-10-28 08:47:10,069 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:47:10,070 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2021-10-28 08:47:10,071 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=257, Unknown=0, NotChecked=0, Total=306 [2021-10-28 08:47:10,071 INFO L87 Difference]: Start difference. First operand 1843 states and 2340 transitions. Second operand has 18 states, 18 states have (on average 11.666666666666666) internal successors, (210), 17 states have internal predecessors, (210), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:12,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:47:12,502 INFO L93 Difference]: Finished difference Result 5137 states and 6557 transitions. [2021-10-28 08:47:12,503 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2021-10-28 08:47:12,503 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 11.666666666666666) internal successors, (210), 17 states have internal predecessors, (210), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-10-28 08:47:12,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:47:12,510 INFO L225 Difference]: With dead ends: 5137 [2021-10-28 08:47:12,510 INFO L226 Difference]: Without dead ends: 3483 [2021-10-28 08:47:12,514 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 132 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 286 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=309, Invalid=1173, Unknown=0, NotChecked=0, Total=1482 [2021-10-28 08:47:12,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3483 states. [2021-10-28 08:47:12,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3483 to 2080. [2021-10-28 08:47:12,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2080 states, 2075 states have (on average 1.2693975903614458) internal successors, (2634), 2079 states have internal predecessors, (2634), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:12,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2080 states to 2080 states and 2634 transitions. [2021-10-28 08:47:12,946 INFO L78 Accepts]: Start accepts. Automaton has 2080 states and 2634 transitions. Word has length 140 [2021-10-28 08:47:12,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:47:12,946 INFO L470 AbstractCegarLoop]: Abstraction has 2080 states and 2634 transitions. [2021-10-28 08:47:12,947 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 11.666666666666666) internal successors, (210), 17 states have internal predecessors, (210), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:12,947 INFO L276 IsEmpty]: Start isEmpty. Operand 2080 states and 2634 transitions. [2021-10-28 08:47:12,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-10-28 08:47:12,953 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:47:12,953 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:47:13,001 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2021-10-28 08:47:13,181 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:47:13,181 INFO L402 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:47:13,182 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:47:13,182 INFO L85 PathProgramCache]: Analyzing trace with hash -90451941, now seen corresponding path program 1 times [2021-10-28 08:47:13,182 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:47:13,182 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1130383374] [2021-10-28 08:47:13,182 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:47:13,183 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:47:13,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:47:13,303 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2021-10-28 08:47:13,303 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:47:13,303 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1130383374] [2021-10-28 08:47:13,304 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1130383374] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:47:13,305 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:47:13,305 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 08:47:13,305 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2038917564] [2021-10-28 08:47:13,306 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 08:47:13,306 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:47:13,311 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 08:47:13,312 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:47:13,312 INFO L87 Difference]: Start difference. First operand 2080 states and 2634 transitions. Second operand has 5 states, 5 states have (on average 24.2) internal successors, (121), 4 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:13,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:47:13,730 INFO L93 Difference]: Finished difference Result 3905 states and 4983 transitions. [2021-10-28 08:47:13,730 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 08:47:13,730 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.2) internal successors, (121), 4 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-10-28 08:47:13,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:47:13,732 INFO L225 Difference]: With dead ends: 3905 [2021-10-28 08:47:13,733 INFO L226 Difference]: Without dead ends: 1955 [2021-10-28 08:47:13,735 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-28 08:47:13,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1955 states. [2021-10-28 08:47:14,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1955 to 1955. [2021-10-28 08:47:14,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1955 states, 1950 states have (on average 1.2728205128205128) internal successors, (2482), 1954 states have internal predecessors, (2482), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:14,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1955 states to 1955 states and 2482 transitions. [2021-10-28 08:47:14,048 INFO L78 Accepts]: Start accepts. Automaton has 1955 states and 2482 transitions. Word has length 140 [2021-10-28 08:47:14,049 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:47:14,049 INFO L470 AbstractCegarLoop]: Abstraction has 1955 states and 2482 transitions. [2021-10-28 08:47:14,049 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.2) internal successors, (121), 4 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:14,050 INFO L276 IsEmpty]: Start isEmpty. Operand 1955 states and 2482 transitions. [2021-10-28 08:47:14,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2021-10-28 08:47:14,054 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:47:14,054 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:47:14,055 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2021-10-28 08:47:14,055 INFO L402 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:47:14,055 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:47:14,056 INFO L85 PathProgramCache]: Analyzing trace with hash 1205605747, now seen corresponding path program 1 times [2021-10-28 08:47:14,056 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:47:14,056 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1723570064] [2021-10-28 08:47:14,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:47:14,057 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:47:14,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:47:14,310 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 30 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:47:14,310 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:47:14,310 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1723570064] [2021-10-28 08:47:14,311 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1723570064] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:47:14,311 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [755310328] [2021-10-28 08:47:14,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:47:14,311 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:47:14,312 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 08:47:14,314 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 08:47:14,333 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-10-28 08:47:14,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:47:14,842 INFO L263 TraceCheckSpWp]: Trace formula consists of 807 conjuncts, 24 conjunts are in the unsatisfiable core [2021-10-28 08:47:14,846 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 08:47:15,965 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 30 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 08:47:15,966 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [755310328] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 08:47:15,966 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 08:47:15,967 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 17 [2021-10-28 08:47:15,967 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [78959246] [2021-10-28 08:47:15,968 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2021-10-28 08:47:15,968 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:47:15,969 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2021-10-28 08:47:15,969 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=257, Unknown=0, NotChecked=0, Total=306 [2021-10-28 08:47:15,969 INFO L87 Difference]: Start difference. First operand 1955 states and 2482 transitions. Second operand has 18 states, 18 states have (on average 12.055555555555555) internal successors, (217), 17 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:18,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:47:18,354 INFO L93 Difference]: Finished difference Result 5727 states and 7299 transitions. [2021-10-28 08:47:18,355 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2021-10-28 08:47:18,355 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 12.055555555555555) internal successors, (217), 17 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 141 [2021-10-28 08:47:18,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:47:18,360 INFO L225 Difference]: With dead ends: 5727 [2021-10-28 08:47:18,360 INFO L226 Difference]: Without dead ends: 3961 [2021-10-28 08:47:18,363 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 177 GetRequests, 133 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 426 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=401, Invalid=1579, Unknown=0, NotChecked=0, Total=1980 [2021-10-28 08:47:18,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3961 states. [2021-10-28 08:47:18,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3961 to 2219. [2021-10-28 08:47:18,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2219 states, 2214 states have (on average 1.2687443541102077) internal successors, (2809), 2218 states have internal predecessors, (2809), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:18,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2219 states to 2219 states and 2809 transitions. [2021-10-28 08:47:18,958 INFO L78 Accepts]: Start accepts. Automaton has 2219 states and 2809 transitions. Word has length 141 [2021-10-28 08:47:18,959 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:47:18,959 INFO L470 AbstractCegarLoop]: Abstraction has 2219 states and 2809 transitions. [2021-10-28 08:47:18,959 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 12.055555555555555) internal successors, (217), 17 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:18,959 INFO L276 IsEmpty]: Start isEmpty. Operand 2219 states and 2809 transitions. [2021-10-28 08:47:18,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2021-10-28 08:47:18,964 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:47:18,965 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:47:19,013 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2021-10-28 08:47:19,193 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 08:47:19,194 INFO L402 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:47:19,194 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:47:19,194 INFO L85 PathProgramCache]: Analyzing trace with hash 582324145, now seen corresponding path program 1 times [2021-10-28 08:47:19,194 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:47:19,194 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [502480037] [2021-10-28 08:47:19,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:47:19,195 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:47:19,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 08:47:19,261 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2021-10-28 08:47:19,261 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 08:47:19,261 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [502480037] [2021-10-28 08:47:19,262 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [502480037] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 08:47:19,262 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 08:47:19,262 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 08:47:19,262 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [662644140] [2021-10-28 08:47:19,264 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 08:47:19,264 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 08:47:19,264 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 08:47:19,265 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-28 08:47:19,265 INFO L87 Difference]: Start difference. First operand 2219 states and 2809 transitions. Second operand has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:19,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 08:47:19,688 INFO L93 Difference]: Finished difference Result 4100 states and 5223 transitions. [2021-10-28 08:47:19,688 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 08:47:19,688 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 141 [2021-10-28 08:47:19,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 08:47:19,691 INFO L225 Difference]: With dead ends: 4100 [2021-10-28 08:47:19,692 INFO L226 Difference]: Without dead ends: 2013 [2021-10-28 08:47:19,695 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-28 08:47:19,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2013 states. [2021-10-28 08:47:20,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2013 to 2005. [2021-10-28 08:47:20,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2005 states, 2000 states have (on average 1.266) internal successors, (2532), 2004 states have internal predecessors, (2532), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:20,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2005 states to 2005 states and 2532 transitions. [2021-10-28 08:47:20,183 INFO L78 Accepts]: Start accepts. Automaton has 2005 states and 2532 transitions. Word has length 141 [2021-10-28 08:47:20,183 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 08:47:20,183 INFO L470 AbstractCegarLoop]: Abstraction has 2005 states and 2532 transitions. [2021-10-28 08:47:20,183 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 08:47:20,184 INFO L276 IsEmpty]: Start isEmpty. Operand 2005 states and 2532 transitions. [2021-10-28 08:47:20,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2021-10-28 08:47:20,187 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 08:47:20,187 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:47:20,188 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2021-10-28 08:47:20,188 INFO L402 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 08:47:20,188 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 08:47:20,189 INFO L85 PathProgramCache]: Analyzing trace with hash 689093620, now seen corresponding path program 1 times [2021-10-28 08:47:20,189 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 08:47:20,189 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2066499322] [2021-10-28 08:47:20,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 08:47:20,190 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 08:47:20,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:47:20,287 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 08:47:20,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 08:47:20,582 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 08:47:20,583 INFO L627 BasicCegarLoop]: Counterexample is feasible [2021-10-28 08:47:20,585 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,587 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,588 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,588 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,588 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,589 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,589 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,589 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,589 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,590 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,590 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,590 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,590 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,590 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,591 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,591 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,591 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,592 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,593 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,593 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,593 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,594 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,594 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 08:47:20,594 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2021-10-28 08:47:20,599 INFO L731 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 08:47:20,605 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-10-28 08:47:20,908 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.10 08:47:20 BoogieIcfgContainer [2021-10-28 08:47:20,908 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-10-28 08:47:20,909 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-28 08:47:20,909 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-28 08:47:20,909 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-28 08:47:20,910 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 08:46:26" (3/4) ... [2021-10-28 08:47:20,912 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-10-28 08:47:21,161 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/witness.graphml [2021-10-28 08:47:21,161 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-28 08:47:21,163 INFO L168 Benchmark]: Toolchain (without parser) took 56723.46 ms. Allocated memory was 98.6 MB in the beginning and 1.1 GB in the end (delta: 1.0 GB). Free memory was 64.3 MB in the beginning and 409.6 MB in the end (delta: -345.3 MB). Peak memory consumption was 703.7 MB. Max. memory is 16.1 GB. [2021-10-28 08:47:21,163 INFO L168 Benchmark]: CDTParser took 0.37 ms. Allocated memory is still 98.6 MB. Free memory is still 54.0 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-10-28 08:47:21,164 INFO L168 Benchmark]: CACSL2BoogieTranslator took 592.21 ms. Allocated memory is still 98.6 MB. Free memory was 64.1 MB in the beginning and 67.0 MB in the end (delta: -2.9 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. [2021-10-28 08:47:21,164 INFO L168 Benchmark]: Boogie Procedure Inliner took 180.12 ms. Allocated memory is still 98.6 MB. Free memory was 67.0 MB in the beginning and 62.1 MB in the end (delta: 5.0 MB). Peak memory consumption was 6.3 MB. Max. memory is 16.1 GB. [2021-10-28 08:47:21,164 INFO L168 Benchmark]: Boogie Preprocessor took 116.43 ms. Allocated memory is still 98.6 MB. Free memory was 62.1 MB in the beginning and 58.7 MB in the end (delta: 3.4 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 08:47:21,165 INFO L168 Benchmark]: RCFGBuilder took 1454.20 ms. Allocated memory was 98.6 MB in the beginning and 119.5 MB in the end (delta: 21.0 MB). Free memory was 58.7 MB in the beginning and 71.2 MB in the end (delta: -12.5 MB). Peak memory consumption was 23.0 MB. Max. memory is 16.1 GB. [2021-10-28 08:47:21,165 INFO L168 Benchmark]: TraceAbstraction took 54119.65 ms. Allocated memory was 119.5 MB in the beginning and 1.1 GB in the end (delta: 1.0 GB). Free memory was 70.9 MB in the beginning and 456.0 MB in the end (delta: -385.1 MB). Peak memory consumption was 643.6 MB. Max. memory is 16.1 GB. [2021-10-28 08:47:21,166 INFO L168 Benchmark]: Witness Printer took 252.36 ms. Allocated memory is still 1.1 GB. Free memory was 456.0 MB in the beginning and 409.6 MB in the end (delta: 46.4 MB). Peak memory consumption was 46.1 MB. Max. memory is 16.1 GB. [2021-10-28 08:47:21,168 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.37 ms. Allocated memory is still 98.6 MB. Free memory is still 54.0 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 592.21 ms. Allocated memory is still 98.6 MB. Free memory was 64.1 MB in the beginning and 67.0 MB in the end (delta: -2.9 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 180.12 ms. Allocated memory is still 98.6 MB. Free memory was 67.0 MB in the beginning and 62.1 MB in the end (delta: 5.0 MB). Peak memory consumption was 6.3 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 116.43 ms. Allocated memory is still 98.6 MB. Free memory was 62.1 MB in the beginning and 58.7 MB in the end (delta: 3.4 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 1454.20 ms. Allocated memory was 98.6 MB in the beginning and 119.5 MB in the end (delta: 21.0 MB). Free memory was 58.7 MB in the beginning and 71.2 MB in the end (delta: -12.5 MB). Peak memory consumption was 23.0 MB. Max. memory is 16.1 GB. * TraceAbstraction took 54119.65 ms. Allocated memory was 119.5 MB in the beginning and 1.1 GB in the end (delta: 1.0 GB). Free memory was 70.9 MB in the beginning and 456.0 MB in the end (delta: -385.1 MB). Peak memory consumption was 643.6 MB. Max. memory is 16.1 GB. * Witness Printer took 252.36 ms. Allocated memory is still 1.1 GB. Free memory was 456.0 MB in the beginning and 409.6 MB in the end (delta: 46.4 MB). Peak memory consumption was 46.1 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 611]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L534] int c1 ; [L535] int i2 ; [L538] c1 = 0 [L539] side1Failed = __VERIFIER_nondet_bool() [L540] side2Failed = __VERIFIER_nondet_bool() [L541] side1_written = __VERIFIER_nondet_char() [L542] side2_written = __VERIFIER_nondet_char() [L543] side1Failed_History_0 = __VERIFIER_nondet_bool() [L544] side1Failed_History_1 = __VERIFIER_nondet_bool() [L545] side1Failed_History_2 = __VERIFIER_nondet_bool() [L546] side2Failed_History_0 = __VERIFIER_nondet_bool() [L547] side2Failed_History_1 = __VERIFIER_nondet_bool() [L548] side2Failed_History_2 = __VERIFIER_nondet_bool() [L549] active_side_History_0 = __VERIFIER_nondet_char() [L550] active_side_History_1 = __VERIFIER_nondet_char() [L551] active_side_History_2 = __VERIFIER_nondet_char() [L552] manual_selection_History_0 = __VERIFIER_nondet_char() [L553] manual_selection_History_1 = __VERIFIER_nondet_char() [L554] manual_selection_History_2 = __VERIFIER_nondet_char() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L555] i2 = init() [L58] COND FALSE !(!cond) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L557] cs1_old = nomsg [L558] cs1_new = nomsg [L559] cs2_old = nomsg [L560] cs2_new = nomsg [L561] s1s2_old = nomsg [L562] s1s2_new = nomsg [L563] s1s1_old = nomsg [L564] s1s1_new = nomsg [L565] s2s1_old = nomsg [L566] s2s1_new = nomsg [L567] s2s2_old = nomsg [L568] s2s2_new = nomsg [L569] s1p_old = nomsg [L570] s1p_new = nomsg [L571] s2p_old = nomsg [L572] s2p_new = nomsg [L573] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L574] COND TRUE i2 < 10 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND TRUE \read(side1Failed) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L580] cs1_old = cs1_new [L581] cs1_new = nomsg [L582] cs2_old = cs2_new [L583] cs2_new = nomsg [L584] s1s2_old = s1s2_new [L585] s1s2_new = nomsg [L586] s1s1_old = s1s1_new [L587] s1s1_new = nomsg [L588] s2s1_old = s2s1_new [L589] s2s1_new = nomsg [L590] s2s2_old = s2s2_new [L591] s2s2_new = nomsg [L592] s1p_old = s1p_new [L593] s1p_new = nomsg [L594] s2p_old = s2p_new [L595] s2p_new = nomsg [L415] int tmp ; [L416] msg_t tmp___0 ; [L417] _Bool tmp___1 ; [L418] _Bool tmp___2 ; [L419] _Bool tmp___3 ; [L420] _Bool tmp___4 ; [L421] int8_t tmp___5 ; [L422] _Bool tmp___6 ; [L423] _Bool tmp___7 ; [L424] _Bool tmp___8 ; [L425] int8_t tmp___9 ; [L426] _Bool tmp___10 ; [L427] _Bool tmp___11 ; [L428] _Bool tmp___12 ; [L429] msg_t tmp___13 ; [L430] _Bool tmp___14 ; [L431] _Bool tmp___15 ; [L432] _Bool tmp___16 ; [L433] _Bool tmp___17 ; [L434] int8_t tmp___18 ; [L435] int8_t tmp___19 ; [L436] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L439] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L442] COND TRUE ! side2Failed [L443] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L448] tmp___0 = read_manual_selection_history((unsigned char)1) [L449] COND TRUE ! tmp___0 [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] tmp___1 = read_side1_failed_history((unsigned char)1) [L451] COND TRUE ! tmp___1 [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L452] tmp___2 = read_side1_failed_history((unsigned char)0) [L453] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L478] tmp___7 = read_side1_failed_history((unsigned char)1) [L479] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L494] tmp___11 = read_side1_failed_history((unsigned char)1) [L495] COND TRUE ! tmp___11 [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L496] tmp___12 = read_side2_failed_history((unsigned char)1) [L497] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L148] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L151] COND FALSE !((int )index == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L154] COND TRUE (int )index == 2 [L155] return (active_side_History_2); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L510] tmp___20 = read_active_side_history((unsigned char)2) [L511] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L529] return (1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L596] c1 = check() [L609] COND FALSE !(! arg) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L598] i2 ++ VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L574] COND TRUE i2 < 10 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND FALSE !(\read(side1Failed)) [L284] side1 = s1s1_old [L285] s1s1_old = nomsg [L286] side2 = s2s1_old [L287] s2s1_old = nomsg [L288] manual_selection = cs1_old [L289] cs1_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L290] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L293] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L294] COND TRUE (int )side2 != (int )nomsg [L295] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L314] EXPR next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L314] s1s1_new = next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new [L315] EXPR next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L315] s1s2_new = next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new [L316] EXPR next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L316] s1p_new = next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new [L317] side1_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND TRUE \read(side2Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L335] EXPR nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L335] s2s1_new = nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new [L336] EXPR nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L336] s2s2_new = nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new [L337] EXPR nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L337] s2p_new = nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new [L338] side2_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L580] cs1_old = cs1_new [L581] cs1_new = nomsg [L582] cs2_old = cs2_new [L583] cs2_new = nomsg [L584] s1s2_old = s1s2_new [L585] s1s2_new = nomsg [L586] s1s1_old = s1s1_new [L587] s1s1_new = nomsg [L588] s2s1_old = s2s1_new [L589] s2s1_new = nomsg [L590] s2s2_old = s2s2_new [L591] s2s2_new = nomsg [L592] s1p_old = s1p_new [L593] s1p_new = nomsg [L594] s2p_old = s2p_new [L595] s2p_new = nomsg [L415] int tmp ; [L416] msg_t tmp___0 ; [L417] _Bool tmp___1 ; [L418] _Bool tmp___2 ; [L419] _Bool tmp___3 ; [L420] _Bool tmp___4 ; [L421] int8_t tmp___5 ; [L422] _Bool tmp___6 ; [L423] _Bool tmp___7 ; [L424] _Bool tmp___8 ; [L425] int8_t tmp___9 ; [L426] _Bool tmp___10 ; [L427] _Bool tmp___11 ; [L428] _Bool tmp___12 ; [L429] msg_t tmp___13 ; [L430] _Bool tmp___14 ; [L431] _Bool tmp___15 ; [L432] _Bool tmp___16 ; [L433] _Bool tmp___17 ; [L434] int8_t tmp___18 ; [L435] int8_t tmp___19 ; [L436] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L439] COND TRUE ! side1Failed [L440] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L448] tmp___0 = read_manual_selection_history((unsigned char)1) [L449] COND FALSE !(! tmp___0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L478] tmp___7 = read_side1_failed_history((unsigned char)1) [L479] COND TRUE \read(tmp___7) [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L480] tmp___8 = read_side2_failed_history((unsigned char)1) [L481] COND TRUE ! tmp___8 [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L482] tmp___5 = read_active_side_history((unsigned char)0) [L483] COND TRUE ! ((int )tmp___5 == 2) [L484] return (0); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L596] c1 = check() [L609] COND TRUE ! arg VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L611] reach_error() VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 295 locations, 23 error locations. Started 1 CEGAR loops. OverallTime: 53.7s, OverallIterations: 38, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 32.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 17056 SDtfs, 37704 SDslu, 45483 SDs, 0 SdLazy, 7967 SolverSat, 565 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 6.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1365 GetRequests, 857 SyntacticMatches, 3 SemanticMatches, 505 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29978 ImplicationChecksByTransitivity, 9.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=2671occurred in iteration=30, InterpolantAutomatonStates: 514, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 7.3s AutomataMinimizationTime, 37 MinimizatonAttempts, 45687 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.5s SsaConstructionTime, 2.3s SatisfiabilityAnalysisTime, 7.7s InterpolantComputationTime, 4004 NumberOfCodeBlocks, 4004 NumberOfCodeBlocksAsserted, 43 NumberOfCheckSat, 3820 ConstructedInterpolants, 0 QuantifiedInterpolants, 13046 SizeOfPredicates, 30 NumberOfNonLiveVariables, 3832 ConjunctsInSsa, 82 ConjunctsInUnsatCore, 42 InterpolantComputations, 33 PerfectInterpolantSequences, 454/621 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-10-28 08:47:21,229 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_4a92b13c-85b9-4171-9870-fee91622524c/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request...