./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version b2eff8ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ac8e60fb32c268c01bf0cc1d1cd76454411c67e3ab15d16b4eca5e74b982e97f ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.1-dev-b2eff8b [2021-10-28 09:46:51,504 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-28 09:46:51,506 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-28 09:46:51,548 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-28 09:46:51,549 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-28 09:46:51,550 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-28 09:46:51,552 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-28 09:46:51,554 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-28 09:46:51,560 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-28 09:46:51,561 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-28 09:46:51,563 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-28 09:46:51,564 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-28 09:46:51,566 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-28 09:46:51,570 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-28 09:46:51,572 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-28 09:46:51,576 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-28 09:46:51,580 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-28 09:46:51,581 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-28 09:46:51,583 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-28 09:46:51,585 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-28 09:46:51,587 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-28 09:46:51,589 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-28 09:46:51,591 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-28 09:46:51,594 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-28 09:46:51,598 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-28 09:46:51,609 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-28 09:46:51,609 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-28 09:46:51,611 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-28 09:46:51,611 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-28 09:46:51,612 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-28 09:46:51,613 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-28 09:46:51,614 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-28 09:46:51,615 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-28 09:46:51,616 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-28 09:46:51,619 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-28 09:46:51,620 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-28 09:46:51,621 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-28 09:46:51,622 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-28 09:46:51,623 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-28 09:46:51,624 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-28 09:46:51,624 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-28 09:46:51,625 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/config/svcomp-Reach-32bit-Automizer_Default.epf [2021-10-28 09:46:51,663 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-28 09:46:51,664 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-28 09:46:51,664 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-28 09:46:51,664 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-28 09:46:51,665 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-28 09:46:51,665 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-28 09:46:51,666 INFO L138 SettingsManager]: * Use SBE=true [2021-10-28 09:46:51,666 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-28 09:46:51,666 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-28 09:46:51,666 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-28 09:46:51,666 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-28 09:46:51,667 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-28 09:46:51,667 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-10-28 09:46:51,667 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-10-28 09:46:51,667 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-10-28 09:46:51,667 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-28 09:46:51,668 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-28 09:46:51,668 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-28 09:46:51,668 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-10-28 09:46:51,668 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-28 09:46:51,668 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-28 09:46:51,669 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-10-28 09:46:51,669 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-28 09:46:51,669 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-28 09:46:51,669 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-10-28 09:46:51,669 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-10-28 09:46:51,670 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-28 09:46:51,670 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-10-28 09:46:51,670 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-10-28 09:46:51,670 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2021-10-28 09:46:51,670 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-10-28 09:46:51,670 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-28 09:46:51,671 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ac8e60fb32c268c01bf0cc1d1cd76454411c67e3ab15d16b4eca5e74b982e97f [2021-10-28 09:46:51,971 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-28 09:46:52,000 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-28 09:46:52,003 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-28 09:46:52,004 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-28 09:46:52,005 INFO L275 PluginConnector]: CDTParser initialized [2021-10-28 09:46:52,006 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c [2021-10-28 09:46:52,105 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/data/92b5161b8/94e9a0a0c5e849f7854f43f14bd278b9/FLAG8160d5ef3 [2021-10-28 09:46:52,607 INFO L306 CDTParser]: Found 1 translation units. [2021-10-28 09:46:52,607 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c [2021-10-28 09:46:52,625 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/data/92b5161b8/94e9a0a0c5e849f7854f43f14bd278b9/FLAG8160d5ef3 [2021-10-28 09:46:52,936 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/data/92b5161b8/94e9a0a0c5e849f7854f43f14bd278b9 [2021-10-28 09:46:52,938 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-28 09:46:52,940 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-28 09:46:52,944 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-28 09:46:52,944 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-28 09:46:52,948 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-28 09:46:52,949 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 09:46:52" (1/1) ... [2021-10-28 09:46:52,950 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4ac44a19 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:46:52, skipping insertion in model container [2021-10-28 09:46:52,950 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 09:46:52" (1/1) ... [2021-10-28 09:46:52,958 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-28 09:46:53,006 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-28 09:46:53,279 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c[14522,14535] [2021-10-28 09:46:53,291 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 09:46:53,300 INFO L203 MainTranslator]: Completed pre-run [2021-10-28 09:46:53,374 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c[14522,14535] [2021-10-28 09:46:53,374 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 09:46:53,390 INFO L208 MainTranslator]: Completed translation [2021-10-28 09:46:53,391 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:46:53 WrapperNode [2021-10-28 09:46:53,391 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-28 09:46:53,392 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-28 09:46:53,392 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-28 09:46:53,393 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-28 09:46:53,400 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:46:53" (1/1) ... [2021-10-28 09:46:53,412 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:46:53" (1/1) ... [2021-10-28 09:46:53,480 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-28 09:46:53,481 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-28 09:46:53,481 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-28 09:46:53,481 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-28 09:46:53,489 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:46:53" (1/1) ... [2021-10-28 09:46:53,490 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:46:53" (1/1) ... [2021-10-28 09:46:53,496 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:46:53" (1/1) ... [2021-10-28 09:46:53,496 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:46:53" (1/1) ... [2021-10-28 09:46:53,515 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:46:53" (1/1) ... [2021-10-28 09:46:53,532 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:46:53" (1/1) ... [2021-10-28 09:46:53,536 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:46:53" (1/1) ... [2021-10-28 09:46:53,544 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-28 09:46:53,545 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-28 09:46:53,545 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-28 09:46:53,545 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-28 09:46:53,546 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:46:53" (1/1) ... [2021-10-28 09:46:53,568 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-28 09:46:53,581 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:46:53,602 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-10-28 09:46:53,604 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-10-28 09:46:53,636 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-28 09:46:53,636 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-28 09:46:53,636 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-28 09:46:53,636 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-28 09:46:54,710 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-28 09:46:54,710 INFO L299 CfgBuilder]: Removed 123 assume(true) statements. [2021-10-28 09:46:54,712 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 09:46:54 BoogieIcfgContainer [2021-10-28 09:46:54,713 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-28 09:46:54,714 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-10-28 09:46:54,715 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-10-28 09:46:54,718 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-10-28 09:46:54,718 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.10 09:46:52" (1/3) ... [2021-10-28 09:46:54,719 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@351eb909 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.10 09:46:54, skipping insertion in model container [2021-10-28 09:46:54,719 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:46:53" (2/3) ... [2021-10-28 09:46:54,719 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@351eb909 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.10 09:46:54, skipping insertion in model container [2021-10-28 09:46:54,720 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 09:46:54" (3/3) ... [2021-10-28 09:46:54,721 INFO L111 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c [2021-10-28 09:46:54,726 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-10-28 09:46:54,727 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 23 error locations. [2021-10-28 09:46:54,777 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-10-28 09:46:54,783 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-10-28 09:46:54,783 INFO L340 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2021-10-28 09:46:54,805 INFO L276 IsEmpty]: Start isEmpty. Operand has 294 states, 270 states have (on average 1.7037037037037037) internal successors, (460), 293 states have internal predecessors, (460), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:54,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-28 09:46:54,812 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:46:54,813 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:46:54,813 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:46:54,818 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:46:54,819 INFO L85 PathProgramCache]: Analyzing trace with hash 349506240, now seen corresponding path program 1 times [2021-10-28 09:46:54,828 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:46:54,828 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [510844211] [2021-10-28 09:46:54,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:46:54,829 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:46:54,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:46:55,014 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:46:55,014 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:46:55,015 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [510844211] [2021-10-28 09:46:55,015 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [510844211] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:46:55,016 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:46:55,016 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-28 09:46:55,018 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1255337395] [2021-10-28 09:46:55,023 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2021-10-28 09:46:55,023 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:46:55,036 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-10-28 09:46:55,036 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-28 09:46:55,040 INFO L87 Difference]: Start difference. First operand has 294 states, 270 states have (on average 1.7037037037037037) internal successors, (460), 293 states have internal predecessors, (460), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:55,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:46:55,085 INFO L93 Difference]: Finished difference Result 568 states and 888 transitions. [2021-10-28 09:46:55,086 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-10-28 09:46:55,087 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-28 09:46:55,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:46:55,100 INFO L225 Difference]: With dead ends: 568 [2021-10-28 09:46:55,101 INFO L226 Difference]: Without dead ends: 290 [2021-10-28 09:46:55,104 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-28 09:46:55,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 290 states. [2021-10-28 09:46:55,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 290 to 290. [2021-10-28 09:46:55,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 290 states, 267 states have (on average 1.5880149812734083) internal successors, (424), 289 states have internal predecessors, (424), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:55,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290 states to 290 states and 424 transitions. [2021-10-28 09:46:55,162 INFO L78 Accepts]: Start accepts. Automaton has 290 states and 424 transitions. Word has length 33 [2021-10-28 09:46:55,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:46:55,162 INFO L470 AbstractCegarLoop]: Abstraction has 290 states and 424 transitions. [2021-10-28 09:46:55,163 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:55,163 INFO L276 IsEmpty]: Start isEmpty. Operand 290 states and 424 transitions. [2021-10-28 09:46:55,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-28 09:46:55,165 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:46:55,165 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:46:55,165 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-10-28 09:46:55,166 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:46:55,166 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:46:55,167 INFO L85 PathProgramCache]: Analyzing trace with hash -1047215368, now seen corresponding path program 1 times [2021-10-28 09:46:55,167 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:46:55,167 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2146638847] [2021-10-28 09:46:55,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:46:55,168 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:46:55,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:46:55,271 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:46:55,271 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:46:55,272 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2146638847] [2021-10-28 09:46:55,272 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2146638847] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:46:55,295 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:46:55,295 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:46:55,296 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1839045497] [2021-10-28 09:46:55,297 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:46:55,297 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:46:55,298 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:46:55,298 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:46:55,299 INFO L87 Difference]: Start difference. First operand 290 states and 424 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:55,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:46:55,390 INFO L93 Difference]: Finished difference Result 566 states and 822 transitions. [2021-10-28 09:46:55,393 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 09:46:55,393 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-28 09:46:55,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:46:55,396 INFO L225 Difference]: With dead ends: 566 [2021-10-28 09:46:55,397 INFO L226 Difference]: Without dead ends: 290 [2021-10-28 09:46:55,399 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:46:55,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 290 states. [2021-10-28 09:46:55,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 290 to 290. [2021-10-28 09:46:55,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 290 states, 267 states have (on average 1.5430711610486891) internal successors, (412), 289 states have internal predecessors, (412), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:55,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290 states to 290 states and 412 transitions. [2021-10-28 09:46:55,421 INFO L78 Accepts]: Start accepts. Automaton has 290 states and 412 transitions. Word has length 33 [2021-10-28 09:46:55,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:46:55,421 INFO L470 AbstractCegarLoop]: Abstraction has 290 states and 412 transitions. [2021-10-28 09:46:55,421 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:55,422 INFO L276 IsEmpty]: Start isEmpty. Operand 290 states and 412 transitions. [2021-10-28 09:46:55,423 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2021-10-28 09:46:55,423 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:46:55,424 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:46:55,424 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-10-28 09:46:55,424 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:46:55,425 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:46:55,425 INFO L85 PathProgramCache]: Analyzing trace with hash -600938825, now seen corresponding path program 1 times [2021-10-28 09:46:55,425 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:46:55,425 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [123901739] [2021-10-28 09:46:55,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:46:55,426 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:46:55,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:46:55,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:46:55,685 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:46:55,686 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [123901739] [2021-10-28 09:46:55,686 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [123901739] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:46:55,686 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:46:55,686 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:46:55,687 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1042505563] [2021-10-28 09:46:55,687 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:46:55,687 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:46:55,688 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:46:55,689 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:46:55,689 INFO L87 Difference]: Start difference. First operand 290 states and 412 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:55,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:46:55,763 INFO L93 Difference]: Finished difference Result 596 states and 856 transitions. [2021-10-28 09:46:55,764 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:46:55,764 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2021-10-28 09:46:55,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:46:55,770 INFO L225 Difference]: With dead ends: 596 [2021-10-28 09:46:55,770 INFO L226 Difference]: Without dead ends: 323 [2021-10-28 09:46:55,774 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:46:55,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 323 states. [2021-10-28 09:46:55,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 323 to 266. [2021-10-28 09:46:55,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 266 states, 247 states have (on average 1.5222672064777327) internal successors, (376), 265 states have internal predecessors, (376), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:55,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 266 states to 266 states and 376 transitions. [2021-10-28 09:46:55,808 INFO L78 Accepts]: Start accepts. Automaton has 266 states and 376 transitions. Word has length 44 [2021-10-28 09:46:55,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:46:55,808 INFO L470 AbstractCegarLoop]: Abstraction has 266 states and 376 transitions. [2021-10-28 09:46:55,809 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:55,809 INFO L276 IsEmpty]: Start isEmpty. Operand 266 states and 376 transitions. [2021-10-28 09:46:55,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-10-28 09:46:55,815 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:46:55,816 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:46:55,816 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-10-28 09:46:55,817 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:46:55,819 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:46:55,819 INFO L85 PathProgramCache]: Analyzing trace with hash -777659854, now seen corresponding path program 1 times [2021-10-28 09:46:55,819 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:46:55,820 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1711221866] [2021-10-28 09:46:55,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:46:55,821 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:46:55,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:46:55,930 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:46:55,930 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:46:55,930 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1711221866] [2021-10-28 09:46:55,931 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1711221866] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:46:55,931 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:46:55,931 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:46:55,931 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [125916531] [2021-10-28 09:46:55,932 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:46:55,932 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:46:55,933 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:46:55,933 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:46:55,933 INFO L87 Difference]: Start difference. First operand 266 states and 376 transitions. Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:55,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:46:55,974 INFO L93 Difference]: Finished difference Result 741 states and 1059 transitions. [2021-10-28 09:46:55,974 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:46:55,975 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 53 [2021-10-28 09:46:55,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:46:55,978 INFO L225 Difference]: With dead ends: 741 [2021-10-28 09:46:55,979 INFO L226 Difference]: Without dead ends: 492 [2021-10-28 09:46:55,979 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:46:55,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 492 states. [2021-10-28 09:46:55,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 492 to 299. [2021-10-28 09:46:55,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 299 states, 280 states have (on average 1.5142857142857142) internal successors, (424), 298 states have internal predecessors, (424), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:55,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 299 states to 299 states and 424 transitions. [2021-10-28 09:46:55,997 INFO L78 Accepts]: Start accepts. Automaton has 299 states and 424 transitions. Word has length 53 [2021-10-28 09:46:55,998 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:46:55,998 INFO L470 AbstractCegarLoop]: Abstraction has 299 states and 424 transitions. [2021-10-28 09:46:55,998 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:55,998 INFO L276 IsEmpty]: Start isEmpty. Operand 299 states and 424 transitions. [2021-10-28 09:46:55,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-28 09:46:56,000 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:46:56,000 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:46:56,000 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-10-28 09:46:56,000 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:46:56,001 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:46:56,001 INFO L85 PathProgramCache]: Analyzing trace with hash -2137834776, now seen corresponding path program 1 times [2021-10-28 09:46:56,001 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:46:56,001 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [808100715] [2021-10-28 09:46:56,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:46:56,002 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:46:56,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:46:56,118 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:46:56,120 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:46:56,120 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [808100715] [2021-10-28 09:46:56,121 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [808100715] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:46:56,121 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:46:56,121 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:46:56,121 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [536997303] [2021-10-28 09:46:56,122 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:46:56,123 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:46:56,124 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:46:56,124 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:46:56,124 INFO L87 Difference]: Start difference. First operand 299 states and 424 transitions. Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:56,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:46:56,172 INFO L93 Difference]: Finished difference Result 819 states and 1172 transitions. [2021-10-28 09:46:56,173 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:46:56,173 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-28 09:46:56,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:46:56,178 INFO L225 Difference]: With dead ends: 819 [2021-10-28 09:46:56,178 INFO L226 Difference]: Without dead ends: 537 [2021-10-28 09:46:56,179 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:46:56,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 537 states. [2021-10-28 09:46:56,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 537 to 320. [2021-10-28 09:46:56,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 320 states, 301 states have (on average 1.5083056478405317) internal successors, (454), 319 states have internal predecessors, (454), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:56,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 320 states to 320 states and 454 transitions. [2021-10-28 09:46:56,194 INFO L78 Accepts]: Start accepts. Automaton has 320 states and 454 transitions. Word has length 54 [2021-10-28 09:46:56,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:46:56,195 INFO L470 AbstractCegarLoop]: Abstraction has 320 states and 454 transitions. [2021-10-28 09:46:56,195 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:56,195 INFO L276 IsEmpty]: Start isEmpty. Operand 320 states and 454 transitions. [2021-10-28 09:46:56,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-28 09:46:56,196 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:46:56,197 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:46:56,197 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-10-28 09:46:56,197 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:46:56,198 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:46:56,198 INFO L85 PathProgramCache]: Analyzing trace with hash -1457776406, now seen corresponding path program 1 times [2021-10-28 09:46:56,198 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:46:56,198 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1401724124] [2021-10-28 09:46:56,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:46:56,199 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:46:56,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:46:56,316 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:46:56,316 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:46:56,316 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1401724124] [2021-10-28 09:46:56,316 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1401724124] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:46:56,317 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:46:56,317 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:46:56,317 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1197227329] [2021-10-28 09:46:56,318 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 09:46:56,318 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:46:56,319 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 09:46:56,319 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:46:56,319 INFO L87 Difference]: Start difference. First operand 320 states and 454 transitions. Second operand has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:56,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:46:56,505 INFO L93 Difference]: Finished difference Result 1000 states and 1433 transitions. [2021-10-28 09:46:56,505 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 09:46:56,505 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-28 09:46:56,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:46:56,510 INFO L225 Difference]: With dead ends: 1000 [2021-10-28 09:46:56,510 INFO L226 Difference]: Without dead ends: 697 [2021-10-28 09:46:56,511 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-28 09:46:56,512 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 697 states. [2021-10-28 09:46:56,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 697 to 418. [2021-10-28 09:46:56,532 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 418 states, 399 states have (on average 1.481203007518797) internal successors, (591), 417 states have internal predecessors, (591), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:56,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 418 states to 418 states and 591 transitions. [2021-10-28 09:46:56,534 INFO L78 Accepts]: Start accepts. Automaton has 418 states and 591 transitions. Word has length 54 [2021-10-28 09:46:56,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:46:56,534 INFO L470 AbstractCegarLoop]: Abstraction has 418 states and 591 transitions. [2021-10-28 09:46:56,535 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:56,535 INFO L276 IsEmpty]: Start isEmpty. Operand 418 states and 591 transitions. [2021-10-28 09:46:56,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2021-10-28 09:46:56,536 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:46:56,536 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:46:56,536 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-10-28 09:46:56,537 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:46:56,537 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:46:56,537 INFO L85 PathProgramCache]: Analyzing trace with hash -588423898, now seen corresponding path program 1 times [2021-10-28 09:46:56,537 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:46:56,538 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1920628887] [2021-10-28 09:46:56,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:46:56,538 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:46:56,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:46:56,615 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:46:56,615 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:46:56,615 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1920628887] [2021-10-28 09:46:56,616 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1920628887] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:46:56,616 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:46:56,616 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:46:56,616 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1249208801] [2021-10-28 09:46:56,617 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 09:46:56,617 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:46:56,617 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 09:46:56,618 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:46:56,618 INFO L87 Difference]: Start difference. First operand 418 states and 591 transitions. Second operand has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:56,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:46:56,803 INFO L93 Difference]: Finished difference Result 1000 states and 1425 transitions. [2021-10-28 09:46:56,804 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 09:46:56,804 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 55 [2021-10-28 09:46:56,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:46:56,809 INFO L225 Difference]: With dead ends: 1000 [2021-10-28 09:46:56,809 INFO L226 Difference]: Without dead ends: 697 [2021-10-28 09:46:56,810 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-28 09:46:56,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 697 states. [2021-10-28 09:46:56,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 697 to 418. [2021-10-28 09:46:56,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 418 states, 399 states have (on average 1.4711779448621554) internal successors, (587), 417 states have internal predecessors, (587), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:56,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 418 states to 418 states and 587 transitions. [2021-10-28 09:46:56,834 INFO L78 Accepts]: Start accepts. Automaton has 418 states and 587 transitions. Word has length 55 [2021-10-28 09:46:56,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:46:56,835 INFO L470 AbstractCegarLoop]: Abstraction has 418 states and 587 transitions. [2021-10-28 09:46:56,835 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:56,835 INFO L276 IsEmpty]: Start isEmpty. Operand 418 states and 587 transitions. [2021-10-28 09:46:56,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2021-10-28 09:46:56,836 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:46:56,836 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:46:56,836 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-10-28 09:46:56,837 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:46:56,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:46:56,837 INFO L85 PathProgramCache]: Analyzing trace with hash 1072428279, now seen corresponding path program 1 times [2021-10-28 09:46:56,837 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:46:56,838 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [707102025] [2021-10-28 09:46:56,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:46:56,838 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:46:56,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:46:56,916 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:46:56,917 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:46:56,917 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [707102025] [2021-10-28 09:46:56,917 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [707102025] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:46:56,917 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:46:56,917 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:46:56,918 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [364206337] [2021-10-28 09:46:56,918 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:46:56,918 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:46:56,919 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:46:56,919 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:46:56,919 INFO L87 Difference]: Start difference. First operand 418 states and 587 transitions. Second operand has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:56,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:46:56,955 INFO L93 Difference]: Finished difference Result 840 states and 1196 transitions. [2021-10-28 09:46:56,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:46:56,956 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 56 [2021-10-28 09:46:56,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:46:56,959 INFO L225 Difference]: With dead ends: 840 [2021-10-28 09:46:56,959 INFO L226 Difference]: Without dead ends: 537 [2021-10-28 09:46:56,960 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:46:56,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 537 states. [2021-10-28 09:46:56,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 537 to 413. [2021-10-28 09:46:56,980 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 413 states, 395 states have (on average 1.4658227848101266) internal successors, (579), 412 states have internal predecessors, (579), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:56,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 413 states to 413 states and 579 transitions. [2021-10-28 09:46:56,983 INFO L78 Accepts]: Start accepts. Automaton has 413 states and 579 transitions. Word has length 56 [2021-10-28 09:46:56,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:46:56,983 INFO L470 AbstractCegarLoop]: Abstraction has 413 states and 579 transitions. [2021-10-28 09:46:56,983 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:56,983 INFO L276 IsEmpty]: Start isEmpty. Operand 413 states and 579 transitions. [2021-10-28 09:46:56,984 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2021-10-28 09:46:56,984 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:46:56,985 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:46:56,985 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-10-28 09:46:56,985 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:46:56,986 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:46:56,986 INFO L85 PathProgramCache]: Analyzing trace with hash -1887754801, now seen corresponding path program 1 times [2021-10-28 09:46:56,986 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:46:56,986 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [962160603] [2021-10-28 09:46:56,986 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:46:56,987 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:46:57,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:46:57,069 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:46:57,069 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:46:57,070 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [962160603] [2021-10-28 09:46:57,070 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [962160603] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:46:57,070 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:46:57,070 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:46:57,070 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1817903103] [2021-10-28 09:46:57,071 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:46:57,071 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:46:57,072 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:46:57,072 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:46:57,072 INFO L87 Difference]: Start difference. First operand 413 states and 579 transitions. Second operand has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:57,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:46:57,141 INFO L93 Difference]: Finished difference Result 839 states and 1195 transitions. [2021-10-28 09:46:57,142 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:46:57,142 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 60 [2021-10-28 09:46:57,142 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:46:57,145 INFO L225 Difference]: With dead ends: 839 [2021-10-28 09:46:57,146 INFO L226 Difference]: Without dead ends: 541 [2021-10-28 09:46:57,147 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:46:57,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 541 states. [2021-10-28 09:46:57,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 541 to 393. [2021-10-28 09:46:57,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 379 states have (on average 1.4432717678100264) internal successors, (547), 392 states have internal predecessors, (547), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:57,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 547 transitions. [2021-10-28 09:46:57,171 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 547 transitions. Word has length 60 [2021-10-28 09:46:57,171 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:46:57,171 INFO L470 AbstractCegarLoop]: Abstraction has 393 states and 547 transitions. [2021-10-28 09:46:57,172 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:57,172 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 547 transitions. [2021-10-28 09:46:57,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2021-10-28 09:46:57,173 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:46:57,173 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:46:57,173 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-10-28 09:46:57,173 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:46:57,174 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:46:57,174 INFO L85 PathProgramCache]: Analyzing trace with hash 803488295, now seen corresponding path program 1 times [2021-10-28 09:46:57,174 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:46:57,174 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1109804587] [2021-10-28 09:46:57,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:46:57,175 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:46:57,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:46:57,235 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:46:57,236 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:46:57,236 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1109804587] [2021-10-28 09:46:57,236 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1109804587] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:46:57,236 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:46:57,236 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:46:57,237 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [66287343] [2021-10-28 09:46:57,237 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:46:57,237 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:46:57,238 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:46:57,238 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:46:57,238 INFO L87 Difference]: Start difference. First operand 393 states and 547 transitions. Second operand has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:57,294 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:46:57,295 INFO L93 Difference]: Finished difference Result 807 states and 1139 transitions. [2021-10-28 09:46:57,295 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:46:57,295 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 64 [2021-10-28 09:46:57,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:46:57,299 INFO L225 Difference]: With dead ends: 807 [2021-10-28 09:46:57,299 INFO L226 Difference]: Without dead ends: 529 [2021-10-28 09:46:57,300 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:46:57,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 529 states. [2021-10-28 09:46:57,329 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 529 to 381. [2021-10-28 09:46:57,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 381 states, 369 states have (on average 1.4336043360433603) internal successors, (529), 380 states have internal predecessors, (529), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:57,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 381 states to 381 states and 529 transitions. [2021-10-28 09:46:57,332 INFO L78 Accepts]: Start accepts. Automaton has 381 states and 529 transitions. Word has length 64 [2021-10-28 09:46:57,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:46:57,332 INFO L470 AbstractCegarLoop]: Abstraction has 381 states and 529 transitions. [2021-10-28 09:46:57,332 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:57,332 INFO L276 IsEmpty]: Start isEmpty. Operand 381 states and 529 transitions. [2021-10-28 09:46:57,333 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2021-10-28 09:46:57,333 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:46:57,333 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:46:57,334 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-10-28 09:46:57,334 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:46:57,334 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:46:57,335 INFO L85 PathProgramCache]: Analyzing trace with hash -576016629, now seen corresponding path program 1 times [2021-10-28 09:46:57,335 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:46:57,335 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1222010873] [2021-10-28 09:46:57,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:46:57,335 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:46:57,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:46:57,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:46:57,423 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:46:57,423 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1222010873] [2021-10-28 09:46:57,423 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1222010873] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:46:57,423 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:46:57,423 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:46:57,424 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [473456555] [2021-10-28 09:46:57,424 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:46:57,424 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:46:57,426 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:46:57,426 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:46:57,426 INFO L87 Difference]: Start difference. First operand 381 states and 529 transitions. Second operand has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:57,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:46:57,514 INFO L93 Difference]: Finished difference Result 803 states and 1131 transitions. [2021-10-28 09:46:57,515 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:46:57,515 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 65 [2021-10-28 09:46:57,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:46:57,519 INFO L225 Difference]: With dead ends: 803 [2021-10-28 09:46:57,519 INFO L226 Difference]: Without dead ends: 537 [2021-10-28 09:46:57,520 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:46:57,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 537 states. [2021-10-28 09:46:57,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 537 to 361. [2021-10-28 09:46:57,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 361 states, 353 states have (on average 1.4079320113314449) internal successors, (497), 360 states have internal predecessors, (497), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:57,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 361 states to 361 states and 497 transitions. [2021-10-28 09:46:57,548 INFO L78 Accepts]: Start accepts. Automaton has 361 states and 497 transitions. Word has length 65 [2021-10-28 09:46:57,548 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:46:57,548 INFO L470 AbstractCegarLoop]: Abstraction has 361 states and 497 transitions. [2021-10-28 09:46:57,548 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:57,549 INFO L276 IsEmpty]: Start isEmpty. Operand 361 states and 497 transitions. [2021-10-28 09:46:57,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2021-10-28 09:46:57,550 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:46:57,550 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:46:57,550 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-10-28 09:46:57,550 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:46:57,555 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:46:57,556 INFO L85 PathProgramCache]: Analyzing trace with hash 990513659, now seen corresponding path program 1 times [2021-10-28 09:46:57,556 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:46:57,556 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1528046855] [2021-10-28 09:46:57,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:46:57,556 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:46:57,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:46:57,731 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:46:57,731 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:46:57,731 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1528046855] [2021-10-28 09:46:57,733 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1528046855] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:46:57,733 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:46:57,733 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 09:46:57,734 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [219816774] [2021-10-28 09:46:57,734 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:46:57,734 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:46:57,735 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:46:57,735 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 09:46:57,735 INFO L87 Difference]: Start difference. First operand 361 states and 497 transitions. Second operand has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:57,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:46:57,925 INFO L93 Difference]: Finished difference Result 1087 states and 1510 transitions. [2021-10-28 09:46:57,926 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 09:46:57,926 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 70 [2021-10-28 09:46:57,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:46:57,931 INFO L225 Difference]: With dead ends: 1087 [2021-10-28 09:46:57,931 INFO L226 Difference]: Without dead ends: 841 [2021-10-28 09:46:57,932 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-28 09:46:57,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 841 states. [2021-10-28 09:46:57,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 841 to 411. [2021-10-28 09:46:57,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 411 states, 403 states have (on average 1.401985111662531) internal successors, (565), 410 states have internal predecessors, (565), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:57,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 411 states to 411 states and 565 transitions. [2021-10-28 09:46:57,971 INFO L78 Accepts]: Start accepts. Automaton has 411 states and 565 transitions. Word has length 70 [2021-10-28 09:46:57,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:46:57,971 INFO L470 AbstractCegarLoop]: Abstraction has 411 states and 565 transitions. [2021-10-28 09:46:57,973 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:57,973 INFO L276 IsEmpty]: Start isEmpty. Operand 411 states and 565 transitions. [2021-10-28 09:46:57,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2021-10-28 09:46:57,974 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:46:57,974 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:46:57,974 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-10-28 09:46:57,975 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:46:57,975 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:46:57,975 INFO L85 PathProgramCache]: Analyzing trace with hash 1319402658, now seen corresponding path program 1 times [2021-10-28 09:46:57,975 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:46:57,975 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1667343072] [2021-10-28 09:46:57,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:46:57,976 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:46:58,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:46:58,061 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:46:58,061 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:46:58,061 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1667343072] [2021-10-28 09:46:58,061 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1667343072] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:46:58,061 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:46:58,062 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:46:58,062 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2090266557] [2021-10-28 09:46:58,062 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:46:58,062 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:46:58,063 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:46:58,063 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:46:58,063 INFO L87 Difference]: Start difference. First operand 411 states and 565 transitions. Second operand has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:58,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:46:58,144 INFO L93 Difference]: Finished difference Result 839 states and 1168 transitions. [2021-10-28 09:46:58,144 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:46:58,145 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2021-10-28 09:46:58,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:46:58,148 INFO L225 Difference]: With dead ends: 839 [2021-10-28 09:46:58,148 INFO L226 Difference]: Without dead ends: 576 [2021-10-28 09:46:58,149 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:46:58,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 576 states. [2021-10-28 09:46:58,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 576 to 395. [2021-10-28 09:46:58,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 395 states, 389 states have (on average 1.3856041131105399) internal successors, (539), 394 states have internal predecessors, (539), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:58,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 395 states and 539 transitions. [2021-10-28 09:46:58,182 INFO L78 Accepts]: Start accepts. Automaton has 395 states and 539 transitions. Word has length 71 [2021-10-28 09:46:58,183 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:46:58,183 INFO L470 AbstractCegarLoop]: Abstraction has 395 states and 539 transitions. [2021-10-28 09:46:58,183 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:58,183 INFO L276 IsEmpty]: Start isEmpty. Operand 395 states and 539 transitions. [2021-10-28 09:46:58,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2021-10-28 09:46:58,184 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:46:58,184 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:46:58,184 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-10-28 09:46:58,185 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:46:58,185 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:46:58,185 INFO L85 PathProgramCache]: Analyzing trace with hash -2095984420, now seen corresponding path program 1 times [2021-10-28 09:46:58,185 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:46:58,185 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1822441400] [2021-10-28 09:46:58,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:46:58,186 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:46:58,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:46:58,273 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:46:58,273 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:46:58,273 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1822441400] [2021-10-28 09:46:58,273 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1822441400] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:46:58,273 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:46:58,273 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:46:58,274 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1007570004] [2021-10-28 09:46:58,274 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:46:58,274 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:46:58,275 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:46:58,275 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:46:58,275 INFO L87 Difference]: Start difference. First operand 395 states and 539 transitions. Second operand has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:58,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:46:58,336 INFO L93 Difference]: Finished difference Result 708 states and 982 transitions. [2021-10-28 09:46:58,336 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:46:58,336 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2021-10-28 09:46:58,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:46:58,339 INFO L225 Difference]: With dead ends: 708 [2021-10-28 09:46:58,339 INFO L226 Difference]: Without dead ends: 474 [2021-10-28 09:46:58,341 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:46:58,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 474 states. [2021-10-28 09:46:58,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 474 to 391. [2021-10-28 09:46:58,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 391 states, 386 states have (on average 1.378238341968912) internal successors, (532), 390 states have internal predecessors, (532), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:58,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 532 transitions. [2021-10-28 09:46:58,373 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 532 transitions. Word has length 71 [2021-10-28 09:46:58,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:46:58,373 INFO L470 AbstractCegarLoop]: Abstraction has 391 states and 532 transitions. [2021-10-28 09:46:58,373 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:58,374 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 532 transitions. [2021-10-28 09:46:58,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2021-10-28 09:46:58,374 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:46:58,375 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:46:58,375 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-10-28 09:46:58,375 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:46:58,375 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:46:58,376 INFO L85 PathProgramCache]: Analyzing trace with hash -2054231207, now seen corresponding path program 1 times [2021-10-28 09:46:58,376 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:46:58,378 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1020047185] [2021-10-28 09:46:58,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:46:58,378 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:46:58,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:46:58,525 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:46:58,525 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:46:58,525 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1020047185] [2021-10-28 09:46:58,525 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1020047185] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:46:58,525 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:46:58,525 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-28 09:46:58,526 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [676274738] [2021-10-28 09:46:58,526 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-28 09:46:58,526 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:46:58,527 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 09:46:58,527 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2021-10-28 09:46:58,527 INFO L87 Difference]: Start difference. First operand 391 states and 532 transitions. Second operand has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:58,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:46:58,863 INFO L93 Difference]: Finished difference Result 1349 states and 1849 transitions. [2021-10-28 09:46:58,863 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 09:46:58,863 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2021-10-28 09:46:58,864 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:46:58,870 INFO L225 Difference]: With dead ends: 1349 [2021-10-28 09:46:58,870 INFO L226 Difference]: Without dead ends: 1101 [2021-10-28 09:46:58,873 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-28 09:46:58,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1101 states. [2021-10-28 09:46:58,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1101 to 419. [2021-10-28 09:46:58,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 419 states, 414 states have (on average 1.3623188405797102) internal successors, (564), 418 states have internal predecessors, (564), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:58,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 419 states to 419 states and 564 transitions. [2021-10-28 09:46:58,919 INFO L78 Accepts]: Start accepts. Automaton has 419 states and 564 transitions. Word has length 74 [2021-10-28 09:46:58,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:46:58,919 INFO L470 AbstractCegarLoop]: Abstraction has 419 states and 564 transitions. [2021-10-28 09:46:58,919 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:58,919 INFO L276 IsEmpty]: Start isEmpty. Operand 419 states and 564 transitions. [2021-10-28 09:46:58,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2021-10-28 09:46:58,920 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:46:58,921 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:46:58,922 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-10-28 09:46:58,922 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:46:58,924 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:46:58,924 INFO L85 PathProgramCache]: Analyzing trace with hash 1972545423, now seen corresponding path program 1 times [2021-10-28 09:46:58,924 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:46:58,924 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [683415730] [2021-10-28 09:46:58,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:46:58,925 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:46:58,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:46:58,992 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:46:58,994 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:46:58,994 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [683415730] [2021-10-28 09:46:58,996 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [683415730] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:46:58,996 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:46:58,997 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:46:58,997 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2068349545] [2021-10-28 09:46:58,997 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:46:58,997 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:46:58,998 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:46:58,998 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:46:58,998 INFO L87 Difference]: Start difference. First operand 419 states and 564 transitions. Second operand has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:59,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:46:59,143 INFO L93 Difference]: Finished difference Result 1079 states and 1463 transitions. [2021-10-28 09:46:59,144 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:46:59,144 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2021-10-28 09:46:59,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:46:59,149 INFO L225 Difference]: With dead ends: 1079 [2021-10-28 09:46:59,149 INFO L226 Difference]: Without dead ends: 825 [2021-10-28 09:46:59,150 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:46:59,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 825 states. [2021-10-28 09:46:59,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 825 to 632. [2021-10-28 09:46:59,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 632 states, 627 states have (on average 1.342902711323764) internal successors, (842), 631 states have internal predecessors, (842), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:59,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 632 states to 632 states and 842 transitions. [2021-10-28 09:46:59,222 INFO L78 Accepts]: Start accepts. Automaton has 632 states and 842 transitions. Word has length 74 [2021-10-28 09:46:59,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:46:59,223 INFO L470 AbstractCegarLoop]: Abstraction has 632 states and 842 transitions. [2021-10-28 09:46:59,223 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:59,223 INFO L276 IsEmpty]: Start isEmpty. Operand 632 states and 842 transitions. [2021-10-28 09:46:59,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-10-28 09:46:59,224 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:46:59,225 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:46:59,225 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-10-28 09:46:59,225 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:46:59,225 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:46:59,225 INFO L85 PathProgramCache]: Analyzing trace with hash 1201500974, now seen corresponding path program 1 times [2021-10-28 09:46:59,226 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:46:59,226 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [761478607] [2021-10-28 09:46:59,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:46:59,226 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:46:59,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:46:59,354 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:46:59,355 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:46:59,355 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [761478607] [2021-10-28 09:46:59,355 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [761478607] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:46:59,355 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:46:59,355 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 09:46:59,355 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [80070577] [2021-10-28 09:46:59,356 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:46:59,356 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:46:59,357 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:46:59,357 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 09:46:59,357 INFO L87 Difference]: Start difference. First operand 632 states and 842 transitions. Second operand has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:59,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:46:59,650 INFO L93 Difference]: Finished difference Result 1899 states and 2590 transitions. [2021-10-28 09:46:59,650 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 09:46:59,650 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2021-10-28 09:46:59,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:46:59,659 INFO L225 Difference]: With dead ends: 1899 [2021-10-28 09:46:59,660 INFO L226 Difference]: Without dead ends: 1534 [2021-10-28 09:46:59,661 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-28 09:46:59,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1534 states. [2021-10-28 09:46:59,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1534 to 620. [2021-10-28 09:46:59,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 620 states, 615 states have (on average 1.3463414634146342) internal successors, (828), 619 states have internal predecessors, (828), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:59,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 620 states to 620 states and 828 transitions. [2021-10-28 09:46:59,761 INFO L78 Accepts]: Start accepts. Automaton has 620 states and 828 transitions. Word has length 75 [2021-10-28 09:46:59,762 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:46:59,762 INFO L470 AbstractCegarLoop]: Abstraction has 620 states and 828 transitions. [2021-10-28 09:46:59,762 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:46:59,762 INFO L276 IsEmpty]: Start isEmpty. Operand 620 states and 828 transitions. [2021-10-28 09:46:59,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-10-28 09:46:59,764 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:46:59,764 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:46:59,764 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-10-28 09:46:59,764 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:46:59,765 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:46:59,765 INFO L85 PathProgramCache]: Analyzing trace with hash -979161099, now seen corresponding path program 1 times [2021-10-28 09:46:59,765 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:46:59,765 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2084344662] [2021-10-28 09:46:59,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:46:59,766 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:46:59,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:46:59,867 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:46:59,867 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:46:59,867 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2084344662] [2021-10-28 09:46:59,867 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2084344662] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:46:59,868 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:46:59,868 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 09:46:59,868 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [636308750] [2021-10-28 09:46:59,870 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:46:59,870 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:46:59,871 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:46:59,871 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 09:46:59,871 INFO L87 Difference]: Start difference. First operand 620 states and 828 transitions. Second operand has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:00,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:47:00,059 INFO L93 Difference]: Finished difference Result 971 states and 1314 transitions. [2021-10-28 09:47:00,060 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-28 09:47:00,060 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2021-10-28 09:47:00,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:47:00,066 INFO L225 Difference]: With dead ends: 971 [2021-10-28 09:47:00,066 INFO L226 Difference]: Without dead ends: 969 [2021-10-28 09:47:00,067 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-28 09:47:00,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 969 states. [2021-10-28 09:47:00,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 969 to 622. [2021-10-28 09:47:00,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 622 states, 617 states have (on average 1.3452188006482981) internal successors, (830), 621 states have internal predecessors, (830), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:00,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 622 states to 622 states and 830 transitions. [2021-10-28 09:47:00,133 INFO L78 Accepts]: Start accepts. Automaton has 622 states and 830 transitions. Word has length 75 [2021-10-28 09:47:00,133 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:47:00,133 INFO L470 AbstractCegarLoop]: Abstraction has 622 states and 830 transitions. [2021-10-28 09:47:00,133 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:00,133 INFO L276 IsEmpty]: Start isEmpty. Operand 622 states and 830 transitions. [2021-10-28 09:47:00,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-28 09:47:00,134 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:47:00,135 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:47:00,135 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-10-28 09:47:00,136 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:47:00,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:47:00,136 INFO L85 PathProgramCache]: Analyzing trace with hash 1972810381, now seen corresponding path program 1 times [2021-10-28 09:47:00,136 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:47:00,137 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [934923263] [2021-10-28 09:47:00,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:00,137 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:47:00,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:00,236 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:47:00,236 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:47:00,236 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [934923263] [2021-10-28 09:47:00,236 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [934923263] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:47:00,236 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:47:00,237 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 09:47:00,237 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [946850377] [2021-10-28 09:47:00,238 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:47:00,238 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:47:00,239 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:47:00,239 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 09:47:00,239 INFO L87 Difference]: Start difference. First operand 622 states and 830 transitions. Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:00,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:47:00,449 INFO L93 Difference]: Finished difference Result 1465 states and 2028 transitions. [2021-10-28 09:47:00,450 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 09:47:00,450 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-28 09:47:00,450 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:47:00,456 INFO L225 Difference]: With dead ends: 1465 [2021-10-28 09:47:00,457 INFO L226 Difference]: Without dead ends: 1098 [2021-10-28 09:47:00,458 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-28 09:47:00,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1098 states. [2021-10-28 09:47:00,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1098 to 628. [2021-10-28 09:47:00,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 628 states, 623 states have (on average 1.3418940609951846) internal successors, (836), 627 states have internal predecessors, (836), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:00,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 628 states to 628 states and 836 transitions. [2021-10-28 09:47:00,525 INFO L78 Accepts]: Start accepts. Automaton has 628 states and 836 transitions. Word has length 76 [2021-10-28 09:47:00,525 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:47:00,525 INFO L470 AbstractCegarLoop]: Abstraction has 628 states and 836 transitions. [2021-10-28 09:47:00,526 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:00,526 INFO L276 IsEmpty]: Start isEmpty. Operand 628 states and 836 transitions. [2021-10-28 09:47:00,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-28 09:47:00,527 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:47:00,527 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:47:00,527 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-10-28 09:47:00,528 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:47:00,528 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:47:00,528 INFO L85 PathProgramCache]: Analyzing trace with hash -1558776470, now seen corresponding path program 1 times [2021-10-28 09:47:00,528 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:47:00,529 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [542335744] [2021-10-28 09:47:00,529 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:00,529 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:47:00,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:00,601 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:47:00,601 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:47:00,601 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [542335744] [2021-10-28 09:47:00,601 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [542335744] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:47:00,601 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:47:00,601 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:47:00,601 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1775428722] [2021-10-28 09:47:00,602 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:47:00,602 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:47:00,602 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:47:00,603 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:47:00,603 INFO L87 Difference]: Start difference. First operand 628 states and 836 transitions. Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:00,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:47:00,778 INFO L93 Difference]: Finished difference Result 1463 states and 1952 transitions. [2021-10-28 09:47:00,779 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:47:00,779 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-28 09:47:00,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:47:00,785 INFO L225 Difference]: With dead ends: 1463 [2021-10-28 09:47:00,785 INFO L226 Difference]: Without dead ends: 1072 [2021-10-28 09:47:00,787 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:47:00,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1072 states. [2021-10-28 09:47:00,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1072 to 818. [2021-10-28 09:47:00,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 818 states, 813 states have (on average 1.3333333333333333) internal successors, (1084), 817 states have internal predecessors, (1084), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:00,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 818 states to 818 states and 1084 transitions. [2021-10-28 09:47:00,889 INFO L78 Accepts]: Start accepts. Automaton has 818 states and 1084 transitions. Word has length 76 [2021-10-28 09:47:00,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:47:00,889 INFO L470 AbstractCegarLoop]: Abstraction has 818 states and 1084 transitions. [2021-10-28 09:47:00,889 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:00,890 INFO L276 IsEmpty]: Start isEmpty. Operand 818 states and 1084 transitions. [2021-10-28 09:47:00,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-28 09:47:00,891 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:47:00,891 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:47:00,891 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-10-28 09:47:00,892 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:47:00,892 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:47:00,892 INFO L85 PathProgramCache]: Analyzing trace with hash -932876156, now seen corresponding path program 1 times [2021-10-28 09:47:00,892 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:47:00,893 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1093115617] [2021-10-28 09:47:00,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:00,893 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:47:00,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:00,997 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:47:00,997 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:47:00,997 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1093115617] [2021-10-28 09:47:00,997 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1093115617] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:47:00,997 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:47:00,998 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 09:47:00,998 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1476115063] [2021-10-28 09:47:00,998 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:47:00,999 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:47:01,000 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:47:01,000 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 09:47:01,000 INFO L87 Difference]: Start difference. First operand 818 states and 1084 transitions. Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:01,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:47:01,559 INFO L93 Difference]: Finished difference Result 3144 states and 4188 transitions. [2021-10-28 09:47:01,560 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 09:47:01,560 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-28 09:47:01,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:47:01,574 INFO L225 Difference]: With dead ends: 3144 [2021-10-28 09:47:01,575 INFO L226 Difference]: Without dead ends: 2626 [2021-10-28 09:47:01,576 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-28 09:47:01,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2626 states. [2021-10-28 09:47:01,689 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2626 to 872. [2021-10-28 09:47:01,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 872 states, 867 states have (on average 1.328719723183391) internal successors, (1152), 871 states have internal predecessors, (1152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:01,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 872 states to 872 states and 1152 transitions. [2021-10-28 09:47:01,695 INFO L78 Accepts]: Start accepts. Automaton has 872 states and 1152 transitions. Word has length 76 [2021-10-28 09:47:01,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:47:01,696 INFO L470 AbstractCegarLoop]: Abstraction has 872 states and 1152 transitions. [2021-10-28 09:47:01,696 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:01,696 INFO L276 IsEmpty]: Start isEmpty. Operand 872 states and 1152 transitions. [2021-10-28 09:47:01,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-10-28 09:47:01,697 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:47:01,698 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:47:01,698 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-10-28 09:47:01,698 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:47:01,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:47:01,699 INFO L85 PathProgramCache]: Analyzing trace with hash 542872594, now seen corresponding path program 1 times [2021-10-28 09:47:01,699 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:47:01,699 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [105357455] [2021-10-28 09:47:01,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:01,700 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:47:01,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:01,756 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:47:01,756 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:47:01,756 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [105357455] [2021-10-28 09:47:01,757 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [105357455] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:47:01,757 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:47:01,757 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:47:01,757 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1523939584] [2021-10-28 09:47:01,757 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:47:01,758 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:47:01,758 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:47:01,758 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:47:01,759 INFO L87 Difference]: Start difference. First operand 872 states and 1152 transitions. Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:02,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:47:02,042 INFO L93 Difference]: Finished difference Result 2255 states and 2985 transitions. [2021-10-28 09:47:02,042 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:47:02,042 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-10-28 09:47:02,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:47:02,052 INFO L225 Difference]: With dead ends: 2255 [2021-10-28 09:47:02,052 INFO L226 Difference]: Without dead ends: 1684 [2021-10-28 09:47:02,054 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:47:02,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1684 states. [2021-10-28 09:47:02,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1684 to 1213. [2021-10-28 09:47:02,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1213 states, 1208 states have (on average 1.3162251655629138) internal successors, (1590), 1212 states have internal predecessors, (1590), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:02,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1213 states to 1213 states and 1590 transitions. [2021-10-28 09:47:02,188 INFO L78 Accepts]: Start accepts. Automaton has 1213 states and 1590 transitions. Word has length 77 [2021-10-28 09:47:02,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:47:02,188 INFO L470 AbstractCegarLoop]: Abstraction has 1213 states and 1590 transitions. [2021-10-28 09:47:02,189 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:02,189 INFO L276 IsEmpty]: Start isEmpty. Operand 1213 states and 1590 transitions. [2021-10-28 09:47:02,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-28 09:47:02,190 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:47:02,191 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:47:02,191 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-10-28 09:47:02,191 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:47:02,191 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:47:02,192 INFO L85 PathProgramCache]: Analyzing trace with hash -871568132, now seen corresponding path program 1 times [2021-10-28 09:47:02,192 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:47:02,192 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1140176625] [2021-10-28 09:47:02,192 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:02,192 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:47:02,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:02,228 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:47:02,229 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:47:02,229 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1140176625] [2021-10-28 09:47:02,229 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1140176625] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:47:02,229 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:47:02,229 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:47:02,230 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [333255474] [2021-10-28 09:47:02,230 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:47:02,230 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:47:02,231 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:47:02,231 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:47:02,231 INFO L87 Difference]: Start difference. First operand 1213 states and 1590 transitions. Second operand has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:02,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:47:02,536 INFO L93 Difference]: Finished difference Result 2967 states and 3887 transitions. [2021-10-28 09:47:02,536 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:47:02,537 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-28 09:47:02,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:47:02,548 INFO L225 Difference]: With dead ends: 2967 [2021-10-28 09:47:02,548 INFO L226 Difference]: Without dead ends: 2012 [2021-10-28 09:47:02,550 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:47:02,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2012 states. [2021-10-28 09:47:02,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2012 to 1215. [2021-10-28 09:47:02,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1215 states, 1210 states have (on average 1.315702479338843) internal successors, (1592), 1214 states have internal predecessors, (1592), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:02,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1215 states to 1215 states and 1592 transitions. [2021-10-28 09:47:02,684 INFO L78 Accepts]: Start accepts. Automaton has 1215 states and 1592 transitions. Word has length 78 [2021-10-28 09:47:02,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:47:02,684 INFO L470 AbstractCegarLoop]: Abstraction has 1215 states and 1592 transitions. [2021-10-28 09:47:02,684 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:02,684 INFO L276 IsEmpty]: Start isEmpty. Operand 1215 states and 1592 transitions. [2021-10-28 09:47:02,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2021-10-28 09:47:02,686 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:47:02,686 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:47:02,686 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-10-28 09:47:02,687 INFO L402 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:47:02,687 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:47:02,687 INFO L85 PathProgramCache]: Analyzing trace with hash 1856049885, now seen corresponding path program 1 times [2021-10-28 09:47:02,688 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:47:02,688 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [653939758] [2021-10-28 09:47:02,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:02,688 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:47:02,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:02,753 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:47:02,753 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:47:02,753 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [653939758] [2021-10-28 09:47:02,753 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [653939758] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:47:02,754 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:47:02,754 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:47:02,754 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [602487507] [2021-10-28 09:47:02,754 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:47:02,754 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:47:02,755 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:47:02,755 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:47:02,755 INFO L87 Difference]: Start difference. First operand 1215 states and 1592 transitions. Second operand has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:02,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:47:02,959 INFO L93 Difference]: Finished difference Result 2519 states and 3295 transitions. [2021-10-28 09:47:02,960 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:47:02,960 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 79 [2021-10-28 09:47:02,960 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:47:02,967 INFO L225 Difference]: With dead ends: 2519 [2021-10-28 09:47:02,968 INFO L226 Difference]: Without dead ends: 1376 [2021-10-28 09:47:02,969 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:47:02,971 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1376 states. [2021-10-28 09:47:03,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1376 to 1020. [2021-10-28 09:47:03,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1020 states, 1015 states have (on average 1.3083743842364532) internal successors, (1328), 1019 states have internal predecessors, (1328), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:03,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1020 states to 1020 states and 1328 transitions. [2021-10-28 09:47:03,089 INFO L78 Accepts]: Start accepts. Automaton has 1020 states and 1328 transitions. Word has length 79 [2021-10-28 09:47:03,089 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:47:03,090 INFO L470 AbstractCegarLoop]: Abstraction has 1020 states and 1328 transitions. [2021-10-28 09:47:03,090 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:03,090 INFO L276 IsEmpty]: Start isEmpty. Operand 1020 states and 1328 transitions. [2021-10-28 09:47:03,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-10-28 09:47:03,091 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:47:03,091 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:47:03,092 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-10-28 09:47:03,092 INFO L402 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:47:03,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:47:03,092 INFO L85 PathProgramCache]: Analyzing trace with hash 1593609901, now seen corresponding path program 1 times [2021-10-28 09:47:03,093 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:47:03,093 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1113164623] [2021-10-28 09:47:03,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:03,093 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:47:03,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:03,129 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:47:03,129 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:47:03,129 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1113164623] [2021-10-28 09:47:03,129 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1113164623] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:47:03,130 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:47:03,130 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:47:03,130 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1810993241] [2021-10-28 09:47:03,130 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:47:03,131 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:47:03,131 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:47:03,131 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:47:03,132 INFO L87 Difference]: Start difference. First operand 1020 states and 1328 transitions. Second operand has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:03,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:47:03,410 INFO L93 Difference]: Finished difference Result 2414 states and 3160 transitions. [2021-10-28 09:47:03,411 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:47:03,411 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-10-28 09:47:03,411 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:47:03,419 INFO L225 Difference]: With dead ends: 2414 [2021-10-28 09:47:03,420 INFO L226 Difference]: Without dead ends: 1537 [2021-10-28 09:47:03,421 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:47:03,423 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1537 states. [2021-10-28 09:47:03,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1537 to 1026. [2021-10-28 09:47:03,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1026 states, 1021 states have (on average 1.306562193927522) internal successors, (1334), 1025 states have internal predecessors, (1334), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:03,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1026 states to 1026 states and 1334 transitions. [2021-10-28 09:47:03,547 INFO L78 Accepts]: Start accepts. Automaton has 1026 states and 1334 transitions. Word has length 80 [2021-10-28 09:47:03,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:47:03,547 INFO L470 AbstractCegarLoop]: Abstraction has 1026 states and 1334 transitions. [2021-10-28 09:47:03,548 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:03,548 INFO L276 IsEmpty]: Start isEmpty. Operand 1026 states and 1334 transitions. [2021-10-28 09:47:03,549 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-10-28 09:47:03,549 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:47:03,549 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:47:03,549 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-10-28 09:47:03,550 INFO L402 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:47:03,550 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:47:03,550 INFO L85 PathProgramCache]: Analyzing trace with hash 1333673785, now seen corresponding path program 1 times [2021-10-28 09:47:03,550 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:47:03,551 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1925256609] [2021-10-28 09:47:03,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:03,551 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:47:03,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:03,616 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:47:03,616 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:47:03,617 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1925256609] [2021-10-28 09:47:03,617 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1925256609] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:47:03,617 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:47:03,617 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:47:03,617 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [362573043] [2021-10-28 09:47:03,618 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:47:03,618 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:47:03,618 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:47:03,619 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:47:03,619 INFO L87 Difference]: Start difference. First operand 1026 states and 1334 transitions. Second operand has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:03,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:47:03,852 INFO L93 Difference]: Finished difference Result 2367 states and 3085 transitions. [2021-10-28 09:47:03,852 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:47:03,853 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-10-28 09:47:03,853 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:47:03,861 INFO L225 Difference]: With dead ends: 2367 [2021-10-28 09:47:03,861 INFO L226 Difference]: Without dead ends: 1436 [2021-10-28 09:47:03,863 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:47:03,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1436 states. [2021-10-28 09:47:04,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1436 to 968. [2021-10-28 09:47:04,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 968 states, 963 states have (on average 1.300103842159917) internal successors, (1252), 967 states have internal predecessors, (1252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:04,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 968 states to 968 states and 1252 transitions. [2021-10-28 09:47:04,014 INFO L78 Accepts]: Start accepts. Automaton has 968 states and 1252 transitions. Word has length 80 [2021-10-28 09:47:04,014 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:47:04,015 INFO L470 AbstractCegarLoop]: Abstraction has 968 states and 1252 transitions. [2021-10-28 09:47:04,015 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:04,015 INFO L276 IsEmpty]: Start isEmpty. Operand 968 states and 1252 transitions. [2021-10-28 09:47:04,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2021-10-28 09:47:04,018 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:47:04,018 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:47:04,018 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-10-28 09:47:04,019 INFO L402 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:47:04,019 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:47:04,019 INFO L85 PathProgramCache]: Analyzing trace with hash -1161164796, now seen corresponding path program 1 times [2021-10-28 09:47:04,019 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:47:04,020 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1621103735] [2021-10-28 09:47:04,020 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:04,020 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:47:04,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:04,168 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:47:04,168 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:47:04,168 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1621103735] [2021-10-28 09:47:04,168 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1621103735] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:47:04,169 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [511152399] [2021-10-28 09:47:04,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:04,169 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:47:04,170 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:47:04,171 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:47:04,216 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-10-28 09:47:04,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:04,458 INFO L263 TraceCheckSpWp]: Trace formula consists of 709 conjuncts, 8 conjunts are in the unsatisfiable core [2021-10-28 09:47:04,472 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:47:04,986 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-28 09:47:04,987 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [511152399] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:47:04,987 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-28 09:47:04,987 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2021-10-28 09:47:04,987 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1540281723] [2021-10-28 09:47:04,988 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:47:04,988 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:47:04,989 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:47:04,989 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2021-10-28 09:47:04,989 INFO L87 Difference]: Start difference. First operand 968 states and 1252 transitions. Second operand has 6 states, 6 states have (on average 20.666666666666668) internal successors, (124), 6 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:05,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:47:05,418 INFO L93 Difference]: Finished difference Result 2490 states and 3322 transitions. [2021-10-28 09:47:05,419 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 09:47:05,419 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 20.666666666666668) internal successors, (124), 6 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 125 [2021-10-28 09:47:05,419 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:47:05,441 INFO L225 Difference]: With dead ends: 2490 [2021-10-28 09:47:05,448 INFO L226 Difference]: Without dead ends: 1701 [2021-10-28 09:47:05,450 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 122 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2021-10-28 09:47:05,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1701 states. [2021-10-28 09:47:05,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1701 to 968. [2021-10-28 09:47:05,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 968 states, 963 states have (on average 1.2990654205607477) internal successors, (1251), 967 states have internal predecessors, (1251), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:05,592 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 968 states to 968 states and 1251 transitions. [2021-10-28 09:47:05,592 INFO L78 Accepts]: Start accepts. Automaton has 968 states and 1251 transitions. Word has length 125 [2021-10-28 09:47:05,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:47:05,593 INFO L470 AbstractCegarLoop]: Abstraction has 968 states and 1251 transitions. [2021-10-28 09:47:05,593 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 20.666666666666668) internal successors, (124), 6 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:05,593 INFO L276 IsEmpty]: Start isEmpty. Operand 968 states and 1251 transitions. [2021-10-28 09:47:05,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2021-10-28 09:47:05,596 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:47:05,596 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:47:05,637 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-10-28 09:47:05,823 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2021-10-28 09:47:05,823 INFO L402 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:47:05,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:47:05,823 INFO L85 PathProgramCache]: Analyzing trace with hash -1641852183, now seen corresponding path program 1 times [2021-10-28 09:47:05,823 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:47:05,824 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1792574386] [2021-10-28 09:47:05,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:05,824 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:47:05,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:05,977 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:47:05,978 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:47:05,978 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1792574386] [2021-10-28 09:47:05,978 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1792574386] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:47:05,978 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [122187818] [2021-10-28 09:47:05,978 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:05,979 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:47:05,979 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:47:05,980 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:47:06,003 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-10-28 09:47:06,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:06,232 INFO L263 TraceCheckSpWp]: Trace formula consists of 723 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-28 09:47:06,237 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:47:06,720 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:47:06,720 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [122187818] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:47:06,720 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 09:47:06,721 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 13 [2021-10-28 09:47:06,721 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1168585276] [2021-10-28 09:47:06,722 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2021-10-28 09:47:06,722 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:47:06,722 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-10-28 09:47:06,722 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2021-10-28 09:47:06,723 INFO L87 Difference]: Start difference. First operand 968 states and 1251 transitions. Second operand has 13 states, 13 states have (on average 19.384615384615383) internal successors, (252), 13 states have internal predecessors, (252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:17,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:47:17,149 INFO L93 Difference]: Finished difference Result 16562 states and 22008 transitions. [2021-10-28 09:47:17,149 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 242 states. [2021-10-28 09:47:17,150 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 19.384615384615383) internal successors, (252), 13 states have internal predecessors, (252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 129 [2021-10-28 09:47:17,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:47:17,183 INFO L225 Difference]: With dead ends: 16562 [2021-10-28 09:47:17,183 INFO L226 Difference]: Without dead ends: 15779 [2021-10-28 09:47:17,215 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 472 GetRequests, 221 SyntacticMatches, 0 SemanticMatches, 251 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29009 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=8289, Invalid=55467, Unknown=0, NotChecked=0, Total=63756 [2021-10-28 09:47:17,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15779 states. [2021-10-28 09:47:17,776 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15779 to 2664. [2021-10-28 09:47:17,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2664 states, 2659 states have (on average 1.300112824370064) internal successors, (3457), 2663 states have internal predecessors, (3457), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:17,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2664 states to 2664 states and 3457 transitions. [2021-10-28 09:47:17,787 INFO L78 Accepts]: Start accepts. Automaton has 2664 states and 3457 transitions. Word has length 129 [2021-10-28 09:47:17,787 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:47:17,787 INFO L470 AbstractCegarLoop]: Abstraction has 2664 states and 3457 transitions. [2021-10-28 09:47:17,788 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 19.384615384615383) internal successors, (252), 13 states have internal predecessors, (252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:17,788 INFO L276 IsEmpty]: Start isEmpty. Operand 2664 states and 3457 transitions. [2021-10-28 09:47:17,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2021-10-28 09:47:17,794 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:47:17,794 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:47:17,834 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2021-10-28 09:47:18,007 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2021-10-28 09:47:18,007 INFO L402 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:47:18,007 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:47:18,008 INFO L85 PathProgramCache]: Analyzing trace with hash -1066693851, now seen corresponding path program 1 times [2021-10-28 09:47:18,008 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:47:18,008 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [183328003] [2021-10-28 09:47:18,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:18,008 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:47:18,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:18,219 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:47:18,219 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:47:18,220 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [183328003] [2021-10-28 09:47:18,220 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [183328003] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:47:18,220 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1306071086] [2021-10-28 09:47:18,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:18,220 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:47:18,220 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:47:18,221 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:47:18,231 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-10-28 09:47:18,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:18,494 INFO L263 TraceCheckSpWp]: Trace formula consists of 775 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-28 09:47:18,500 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:47:18,873 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:47:18,873 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1306071086] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:47:18,874 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 09:47:18,874 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 8 [2021-10-28 09:47:18,874 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1956726135] [2021-10-28 09:47:18,875 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2021-10-28 09:47:18,875 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:47:18,876 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-10-28 09:47:18,876 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2021-10-28 09:47:18,876 INFO L87 Difference]: Start difference. First operand 2664 states and 3457 transitions. Second operand has 8 states, 8 states have (on average 19.5) internal successors, (156), 8 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:20,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:47:20,254 INFO L93 Difference]: Finished difference Result 9414 states and 12634 transitions. [2021-10-28 09:47:20,254 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2021-10-28 09:47:20,254 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 19.5) internal successors, (156), 8 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 130 [2021-10-28 09:47:20,255 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:47:20,268 INFO L225 Difference]: With dead ends: 9414 [2021-10-28 09:47:20,268 INFO L226 Difference]: Without dead ends: 6969 [2021-10-28 09:47:20,274 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 140 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=146, Invalid=360, Unknown=0, NotChecked=0, Total=506 [2021-10-28 09:47:20,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6969 states. [2021-10-28 09:47:20,632 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6969 to 2248. [2021-10-28 09:47:20,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2248 states, 2243 states have (on average 1.294694605439144) internal successors, (2904), 2247 states have internal predecessors, (2904), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:20,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2248 states to 2248 states and 2904 transitions. [2021-10-28 09:47:20,640 INFO L78 Accepts]: Start accepts. Automaton has 2248 states and 2904 transitions. Word has length 130 [2021-10-28 09:47:20,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:47:20,641 INFO L470 AbstractCegarLoop]: Abstraction has 2248 states and 2904 transitions. [2021-10-28 09:47:20,641 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 19.5) internal successors, (156), 8 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:20,641 INFO L276 IsEmpty]: Start isEmpty. Operand 2248 states and 2904 transitions. [2021-10-28 09:47:20,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2021-10-28 09:47:20,647 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:47:20,647 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:47:20,739 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2021-10-28 09:47:20,863 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2021-10-28 09:47:20,863 INFO L402 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:47:20,863 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:47:20,863 INFO L85 PathProgramCache]: Analyzing trace with hash -2028457745, now seen corresponding path program 1 times [2021-10-28 09:47:20,864 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:47:20,864 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1450060673] [2021-10-28 09:47:20,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:20,864 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:47:20,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:20,988 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2021-10-28 09:47:20,989 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:47:20,989 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1450060673] [2021-10-28 09:47:20,989 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1450060673] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:47:20,989 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:47:20,989 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-28 09:47:20,989 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1330926209] [2021-10-28 09:47:20,990 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-28 09:47:20,990 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:47:20,991 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 09:47:20,991 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-10-28 09:47:20,991 INFO L87 Difference]: Start difference. First operand 2248 states and 2904 transitions. Second operand has 7 states, 7 states have (on average 16.142857142857142) internal successors, (113), 7 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:22,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:47:22,566 INFO L93 Difference]: Finished difference Result 12918 states and 17076 transitions. [2021-10-28 09:47:22,566 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-10-28 09:47:22,567 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.142857142857142) internal successors, (113), 7 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 131 [2021-10-28 09:47:22,567 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:47:22,586 INFO L225 Difference]: With dead ends: 12918 [2021-10-28 09:47:22,586 INFO L226 Difference]: Without dead ends: 10909 [2021-10-28 09:47:22,592 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2021-10-28 09:47:22,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10909 states. [2021-10-28 09:47:23,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10909 to 2668. [2021-10-28 09:47:23,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2668 states, 2663 states have (on average 1.2771310552009012) internal successors, (3401), 2667 states have internal predecessors, (3401), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:23,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2668 states to 2668 states and 3401 transitions. [2021-10-28 09:47:23,050 INFO L78 Accepts]: Start accepts. Automaton has 2668 states and 3401 transitions. Word has length 131 [2021-10-28 09:47:23,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:47:23,051 INFO L470 AbstractCegarLoop]: Abstraction has 2668 states and 3401 transitions. [2021-10-28 09:47:23,051 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.142857142857142) internal successors, (113), 7 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:23,051 INFO L276 IsEmpty]: Start isEmpty. Operand 2668 states and 3401 transitions. [2021-10-28 09:47:23,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2021-10-28 09:47:23,059 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:47:23,059 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:47:23,059 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2021-10-28 09:47:23,059 INFO L402 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:47:23,060 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:47:23,060 INFO L85 PathProgramCache]: Analyzing trace with hash 603418006, now seen corresponding path program 1 times [2021-10-28 09:47:23,060 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:47:23,060 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1347005377] [2021-10-28 09:47:23,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:23,061 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:47:23,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:23,220 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-28 09:47:23,220 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:47:23,220 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1347005377] [2021-10-28 09:47:23,220 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1347005377] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:47:23,221 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:47:23,221 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 09:47:23,221 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1635859541] [2021-10-28 09:47:23,221 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:47:23,222 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:47:23,222 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:47:23,222 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 09:47:23,223 INFO L87 Difference]: Start difference. First operand 2668 states and 3401 transitions. Second operand has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:24,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:47:24,211 INFO L93 Difference]: Finished difference Result 8583 states and 11271 transitions. [2021-10-28 09:47:24,217 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 09:47:24,217 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 132 [2021-10-28 09:47:24,218 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:47:24,228 INFO L225 Difference]: With dead ends: 8583 [2021-10-28 09:47:24,228 INFO L226 Difference]: Without dead ends: 6094 [2021-10-28 09:47:24,232 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-28 09:47:24,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6094 states. [2021-10-28 09:47:24,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6094 to 2668. [2021-10-28 09:47:24,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2668 states, 2663 states have (on average 1.2756289898610589) internal successors, (3397), 2667 states have internal predecessors, (3397), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:24,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2668 states to 2668 states and 3397 transitions. [2021-10-28 09:47:24,697 INFO L78 Accepts]: Start accepts. Automaton has 2668 states and 3397 transitions. Word has length 132 [2021-10-28 09:47:24,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:47:24,697 INFO L470 AbstractCegarLoop]: Abstraction has 2668 states and 3397 transitions. [2021-10-28 09:47:24,698 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:24,698 INFO L276 IsEmpty]: Start isEmpty. Operand 2668 states and 3397 transitions. [2021-10-28 09:47:24,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2021-10-28 09:47:24,704 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:47:24,704 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:47:24,704 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-10-28 09:47:24,705 INFO L402 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:47:24,705 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:47:24,705 INFO L85 PathProgramCache]: Analyzing trace with hash 1877464571, now seen corresponding path program 1 times [2021-10-28 09:47:24,705 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:47:24,706 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1243404867] [2021-10-28 09:47:24,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:24,706 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:47:24,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:24,856 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-28 09:47:24,857 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:47:24,857 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1243404867] [2021-10-28 09:47:24,857 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1243404867] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:47:24,857 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:47:24,857 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 09:47:24,857 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [582902692] [2021-10-28 09:47:24,859 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:47:24,859 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:47:24,859 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:47:24,860 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 09:47:24,860 INFO L87 Difference]: Start difference. First operand 2668 states and 3397 transitions. Second operand has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:25,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:47:25,636 INFO L93 Difference]: Finished difference Result 7775 states and 10081 transitions. [2021-10-28 09:47:25,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 09:47:25,636 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 136 [2021-10-28 09:47:25,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:47:25,643 INFO L225 Difference]: With dead ends: 7775 [2021-10-28 09:47:25,643 INFO L226 Difference]: Without dead ends: 5286 [2021-10-28 09:47:25,647 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-28 09:47:25,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5286 states. [2021-10-28 09:47:26,077 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5286 to 2668. [2021-10-28 09:47:26,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2668 states, 2663 states have (on average 1.2741269245212166) internal successors, (3393), 2667 states have internal predecessors, (3393), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:26,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2668 states to 2668 states and 3393 transitions. [2021-10-28 09:47:26,083 INFO L78 Accepts]: Start accepts. Automaton has 2668 states and 3393 transitions. Word has length 136 [2021-10-28 09:47:26,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:47:26,084 INFO L470 AbstractCegarLoop]: Abstraction has 2668 states and 3393 transitions. [2021-10-28 09:47:26,084 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:26,084 INFO L276 IsEmpty]: Start isEmpty. Operand 2668 states and 3393 transitions. [2021-10-28 09:47:26,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2021-10-28 09:47:26,090 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:47:26,090 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:47:26,090 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2021-10-28 09:47:26,090 INFO L402 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:47:26,091 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:47:26,091 INFO L85 PathProgramCache]: Analyzing trace with hash 1682749301, now seen corresponding path program 1 times [2021-10-28 09:47:26,091 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:47:26,091 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1922659076] [2021-10-28 09:47:26,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:26,092 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:47:26,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:26,209 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-10-28 09:47:26,209 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:47:26,209 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1922659076] [2021-10-28 09:47:26,209 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1922659076] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:47:26,210 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:47:26,210 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:47:26,210 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [766345341] [2021-10-28 09:47:26,211 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:47:26,211 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:47:26,211 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:47:26,211 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:47:26,212 INFO L87 Difference]: Start difference. First operand 2668 states and 3393 transitions. Second operand has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:26,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:47:26,563 INFO L93 Difference]: Finished difference Result 4368 states and 5586 transitions. [2021-10-28 09:47:26,563 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 09:47:26,563 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 139 [2021-10-28 09:47:26,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:47:26,566 INFO L225 Difference]: With dead ends: 4368 [2021-10-28 09:47:26,566 INFO L226 Difference]: Without dead ends: 1841 [2021-10-28 09:47:26,569 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:47:26,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1841 states. [2021-10-28 09:47:26,864 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1841 to 1841. [2021-10-28 09:47:26,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1841 states, 1836 states have (on average 1.2734204793028323) internal successors, (2338), 1840 states have internal predecessors, (2338), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:26,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1841 states to 1841 states and 2338 transitions. [2021-10-28 09:47:26,869 INFO L78 Accepts]: Start accepts. Automaton has 1841 states and 2338 transitions. Word has length 139 [2021-10-28 09:47:26,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:47:26,870 INFO L470 AbstractCegarLoop]: Abstraction has 1841 states and 2338 transitions. [2021-10-28 09:47:26,870 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:26,870 INFO L276 IsEmpty]: Start isEmpty. Operand 1841 states and 2338 transitions. [2021-10-28 09:47:26,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2021-10-28 09:47:26,874 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:47:26,874 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:47:26,874 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2021-10-28 09:47:26,875 INFO L402 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:47:26,875 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:47:26,875 INFO L85 PathProgramCache]: Analyzing trace with hash -1680671061, now seen corresponding path program 1 times [2021-10-28 09:47:26,875 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:47:26,875 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1231001052] [2021-10-28 09:47:26,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:26,876 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:47:26,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:27,083 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 25 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:47:27,083 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:47:27,084 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1231001052] [2021-10-28 09:47:27,084 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1231001052] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:47:27,084 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1130630077] [2021-10-28 09:47:27,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:27,084 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:47:27,084 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:47:27,087 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:47:27,106 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-10-28 09:47:27,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:27,403 INFO L263 TraceCheckSpWp]: Trace formula consists of 802 conjuncts, 22 conjunts are in the unsatisfiable core [2021-10-28 09:47:27,415 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:47:28,306 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 25 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:47:28,307 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1130630077] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:47:28,307 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 09:47:28,307 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 15 [2021-10-28 09:47:28,307 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1851892240] [2021-10-28 09:47:28,308 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2021-10-28 09:47:28,308 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:47:28,310 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2021-10-28 09:47:28,310 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2021-10-28 09:47:28,310 INFO L87 Difference]: Start difference. First operand 1841 states and 2338 transitions. Second operand has 16 states, 16 states have (on average 12.5) internal successors, (200), 15 states have internal predecessors, (200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:30,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:47:30,229 INFO L93 Difference]: Finished difference Result 5129 states and 6549 transitions. [2021-10-28 09:47:30,229 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2021-10-28 09:47:30,230 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 12.5) internal successors, (200), 15 states have internal predecessors, (200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 139 [2021-10-28 09:47:30,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:47:30,233 INFO L225 Difference]: With dead ends: 5129 [2021-10-28 09:47:30,233 INFO L226 Difference]: Without dead ends: 3477 [2021-10-28 09:47:30,237 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 132 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 265 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=267, Invalid=1065, Unknown=0, NotChecked=0, Total=1332 [2021-10-28 09:47:30,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3477 states. [2021-10-28 09:47:30,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3477 to 2077. [2021-10-28 09:47:30,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2077 states, 2072 states have (on average 1.2697876447876448) internal successors, (2631), 2076 states have internal predecessors, (2631), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:30,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2077 states to 2077 states and 2631 transitions. [2021-10-28 09:47:30,524 INFO L78 Accepts]: Start accepts. Automaton has 2077 states and 2631 transitions. Word has length 139 [2021-10-28 09:47:30,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:47:30,524 INFO L470 AbstractCegarLoop]: Abstraction has 2077 states and 2631 transitions. [2021-10-28 09:47:30,525 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 12.5) internal successors, (200), 15 states have internal predecessors, (200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:30,525 INFO L276 IsEmpty]: Start isEmpty. Operand 2077 states and 2631 transitions. [2021-10-28 09:47:30,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2021-10-28 09:47:30,528 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:47:30,529 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:47:30,579 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2021-10-28 09:47:30,743 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable33 [2021-10-28 09:47:30,743 INFO L402 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:47:30,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:47:30,743 INFO L85 PathProgramCache]: Analyzing trace with hash 1991014633, now seen corresponding path program 1 times [2021-10-28 09:47:30,743 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:47:30,744 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1149088464] [2021-10-28 09:47:30,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:30,744 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:47:30,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:30,829 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2021-10-28 09:47:30,829 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:47:30,830 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1149088464] [2021-10-28 09:47:30,830 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1149088464] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:47:30,830 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:47:30,830 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:47:30,830 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [207133082] [2021-10-28 09:47:30,831 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 09:47:30,831 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:47:30,831 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 09:47:30,832 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:47:30,832 INFO L87 Difference]: Start difference. First operand 2077 states and 2631 transitions. Second operand has 5 states, 5 states have (on average 24.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:31,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:47:31,357 INFO L93 Difference]: Finished difference Result 3899 states and 4977 transitions. [2021-10-28 09:47:31,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:47:31,357 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 139 [2021-10-28 09:47:31,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:47:31,359 INFO L225 Difference]: With dead ends: 3899 [2021-10-28 09:47:31,360 INFO L226 Difference]: Without dead ends: 1952 [2021-10-28 09:47:31,361 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:47:31,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1952 states. [2021-10-28 09:47:31,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1952 to 1952. [2021-10-28 09:47:31,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1952 states, 1947 states have (on average 1.273240883410375) internal successors, (2479), 1951 states have internal predecessors, (2479), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:31,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1952 states to 1952 states and 2479 transitions. [2021-10-28 09:47:31,624 INFO L78 Accepts]: Start accepts. Automaton has 1952 states and 2479 transitions. Word has length 139 [2021-10-28 09:47:31,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:47:31,624 INFO L470 AbstractCegarLoop]: Abstraction has 1952 states and 2479 transitions. [2021-10-28 09:47:31,624 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:31,625 INFO L276 IsEmpty]: Start isEmpty. Operand 1952 states and 2479 transitions. [2021-10-28 09:47:31,627 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-10-28 09:47:31,627 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:47:31,628 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:47:31,628 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2021-10-28 09:47:31,628 INFO L402 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:47:31,628 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:47:31,629 INFO L85 PathProgramCache]: Analyzing trace with hash 1475255201, now seen corresponding path program 1 times [2021-10-28 09:47:31,629 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:47:31,629 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [851955083] [2021-10-28 09:47:31,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:31,629 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:47:31,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:31,818 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 30 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:47:31,818 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:47:31,819 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [851955083] [2021-10-28 09:47:31,819 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [851955083] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:47:31,819 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [837028442] [2021-10-28 09:47:31,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:31,819 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:47:31,819 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:47:31,820 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:47:31,839 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-10-28 09:47:32,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:32,229 INFO L263 TraceCheckSpWp]: Trace formula consists of 803 conjuncts, 24 conjunts are in the unsatisfiable core [2021-10-28 09:47:32,232 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:47:33,081 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 30 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:47:33,082 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [837028442] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:47:33,082 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 09:47:33,082 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 15 [2021-10-28 09:47:33,082 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [234907047] [2021-10-28 09:47:33,083 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2021-10-28 09:47:33,083 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:47:33,083 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2021-10-28 09:47:33,083 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2021-10-28 09:47:33,084 INFO L87 Difference]: Start difference. First operand 1952 states and 2479 transitions. Second operand has 16 states, 16 states have (on average 12.9375) internal successors, (207), 15 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:34,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:47:34,966 INFO L93 Difference]: Finished difference Result 5715 states and 7287 transitions. [2021-10-28 09:47:34,966 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2021-10-28 09:47:34,966 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 12.9375) internal successors, (207), 15 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-10-28 09:47:34,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:47:34,970 INFO L225 Difference]: With dead ends: 5715 [2021-10-28 09:47:34,970 INFO L226 Difference]: Without dead ends: 3952 [2021-10-28 09:47:34,972 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 133 SyntacticMatches, 2 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 403 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=353, Invalid=1453, Unknown=0, NotChecked=0, Total=1806 [2021-10-28 09:47:34,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3952 states. [2021-10-28 09:47:35,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3952 to 2215. [2021-10-28 09:47:35,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2215 states, 2210 states have (on average 1.2692307692307692) internal successors, (2805), 2214 states have internal predecessors, (2805), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:35,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2215 states to 2215 states and 2805 transitions. [2021-10-28 09:47:35,338 INFO L78 Accepts]: Start accepts. Automaton has 2215 states and 2805 transitions. Word has length 140 [2021-10-28 09:47:35,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:47:35,339 INFO L470 AbstractCegarLoop]: Abstraction has 2215 states and 2805 transitions. [2021-10-28 09:47:35,339 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 12.9375) internal successors, (207), 15 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:35,339 INFO L276 IsEmpty]: Start isEmpty. Operand 2215 states and 2805 transitions. [2021-10-28 09:47:35,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-10-28 09:47:35,343 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:47:35,343 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:47:35,376 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2021-10-28 09:47:35,562 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:47:35,562 INFO L402 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:47:35,562 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:47:35,563 INFO L85 PathProgramCache]: Analyzing trace with hash 1593696675, now seen corresponding path program 1 times [2021-10-28 09:47:35,563 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:47:35,563 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1595664606] [2021-10-28 09:47:35,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:35,563 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:47:35,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:47:35,614 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2021-10-28 09:47:35,614 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:47:35,614 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1595664606] [2021-10-28 09:47:35,614 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1595664606] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:47:35,614 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:47:35,615 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:47:35,615 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1694795532] [2021-10-28 09:47:35,616 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:47:35,616 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:47:35,616 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:47:35,617 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:47:35,617 INFO L87 Difference]: Start difference. First operand 2215 states and 2805 transitions. Second operand has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:35,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:47:35,940 INFO L93 Difference]: Finished difference Result 4093 states and 5216 transitions. [2021-10-28 09:47:35,941 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 09:47:35,941 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-10-28 09:47:35,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:47:35,943 INFO L225 Difference]: With dead ends: 4093 [2021-10-28 09:47:35,943 INFO L226 Difference]: Without dead ends: 2010 [2021-10-28 09:47:35,946 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:47:35,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2010 states. [2021-10-28 09:47:36,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2010 to 2002. [2021-10-28 09:47:36,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2002 states, 1997 states have (on average 1.2663995993990986) internal successors, (2529), 2001 states have internal predecessors, (2529), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:36,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2002 states to 2002 states and 2529 transitions. [2021-10-28 09:47:36,284 INFO L78 Accepts]: Start accepts. Automaton has 2002 states and 2529 transitions. Word has length 140 [2021-10-28 09:47:36,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:47:36,284 INFO L470 AbstractCegarLoop]: Abstraction has 2002 states and 2529 transitions. [2021-10-28 09:47:36,285 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:47:36,285 INFO L276 IsEmpty]: Start isEmpty. Operand 2002 states and 2529 transitions. [2021-10-28 09:47:36,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2021-10-28 09:47:36,286 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:47:36,287 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:47:36,287 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2021-10-28 09:47:36,287 INFO L402 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:47:36,287 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:47:36,287 INFO L85 PathProgramCache]: Analyzing trace with hash 458292102, now seen corresponding path program 1 times [2021-10-28 09:47:36,287 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:47:36,288 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1258680084] [2021-10-28 09:47:36,288 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:47:36,288 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:47:36,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:47:36,342 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:47:36,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:47:36,536 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:47:36,536 INFO L627 BasicCegarLoop]: Counterexample is feasible [2021-10-28 09:47:36,537 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,539 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,540 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,540 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,540 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,540 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,540 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,541 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,541 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,541 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,541 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,541 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,541 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,542 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,542 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,542 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,542 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,542 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,542 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,543 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,543 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,543 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,543 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:47:36,543 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2021-10-28 09:47:36,547 INFO L731 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:47:36,551 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-10-28 09:47:36,744 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.10 09:47:36 BoogieIcfgContainer [2021-10-28 09:47:36,744 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-10-28 09:47:36,745 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-28 09:47:36,745 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-28 09:47:36,745 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-28 09:47:36,746 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 09:46:54" (3/4) ... [2021-10-28 09:47:36,747 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-10-28 09:47:37,073 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/witness.graphml [2021-10-28 09:47:37,074 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-28 09:47:37,076 INFO L168 Benchmark]: Toolchain (without parser) took 44134.79 ms. Allocated memory was 109.1 MB in the beginning and 1.2 GB in the end (delta: 1.1 GB). Free memory was 72.9 MB in the beginning and 1.1 GB in the end (delta: -1.0 GB). Peak memory consumption was 767.4 MB. Max. memory is 16.1 GB. [2021-10-28 09:47:37,076 INFO L168 Benchmark]: CDTParser took 0.30 ms. Allocated memory is still 109.1 MB. Free memory was 81.3 MB in the beginning and 81.3 MB in the end (delta: 27.3 kB). There was no memory consumed. Max. memory is 16.1 GB. [2021-10-28 09:47:37,077 INFO L168 Benchmark]: CACSL2BoogieTranslator took 447.58 ms. Allocated memory is still 109.1 MB. Free memory was 72.8 MB in the beginning and 77.8 MB in the end (delta: -5.0 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. [2021-10-28 09:47:37,077 INFO L168 Benchmark]: Boogie Procedure Inliner took 87.83 ms. Allocated memory is still 109.1 MB. Free memory was 77.8 MB in the beginning and 72.7 MB in the end (delta: 5.1 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-10-28 09:47:37,078 INFO L168 Benchmark]: Boogie Preprocessor took 63.46 ms. Allocated memory is still 109.1 MB. Free memory was 72.7 MB in the beginning and 69.4 MB in the end (delta: 3.3 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-10-28 09:47:37,078 INFO L168 Benchmark]: RCFGBuilder took 1167.93 ms. Allocated memory is still 109.1 MB. Free memory was 69.4 MB in the beginning and 76.7 MB in the end (delta: -7.3 MB). Peak memory consumption was 39.3 MB. Max. memory is 16.1 GB. [2021-10-28 09:47:37,079 INFO L168 Benchmark]: TraceAbstraction took 42029.94 ms. Allocated memory was 109.1 MB in the beginning and 1.2 GB in the end (delta: 1.1 GB). Free memory was 76.3 MB in the beginning and 442.7 MB in the end (delta: -366.5 MB). Peak memory consumption was 753.9 MB. Max. memory is 16.1 GB. [2021-10-28 09:47:37,079 INFO L168 Benchmark]: Witness Printer took 329.02 ms. Allocated memory is still 1.2 GB. Free memory was 442.7 MB in the beginning and 1.1 GB in the end (delta: -665.8 MB). Peak memory consumption was 16.8 MB. Max. memory is 16.1 GB. [2021-10-28 09:47:37,085 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.30 ms. Allocated memory is still 109.1 MB. Free memory was 81.3 MB in the beginning and 81.3 MB in the end (delta: 27.3 kB). There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 447.58 ms. Allocated memory is still 109.1 MB. Free memory was 72.8 MB in the beginning and 77.8 MB in the end (delta: -5.0 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 87.83 ms. Allocated memory is still 109.1 MB. Free memory was 77.8 MB in the beginning and 72.7 MB in the end (delta: 5.1 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 63.46 ms. Allocated memory is still 109.1 MB. Free memory was 72.7 MB in the beginning and 69.4 MB in the end (delta: 3.3 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * RCFGBuilder took 1167.93 ms. Allocated memory is still 109.1 MB. Free memory was 69.4 MB in the beginning and 76.7 MB in the end (delta: -7.3 MB). Peak memory consumption was 39.3 MB. Max. memory is 16.1 GB. * TraceAbstraction took 42029.94 ms. Allocated memory was 109.1 MB in the beginning and 1.2 GB in the end (delta: 1.1 GB). Free memory was 76.3 MB in the beginning and 442.7 MB in the end (delta: -366.5 MB). Peak memory consumption was 753.9 MB. Max. memory is 16.1 GB. * Witness Printer took 329.02 ms. Allocated memory is still 1.2 GB. Free memory was 442.7 MB in the beginning and 1.1 GB in the end (delta: -665.8 MB). Peak memory consumption was 16.8 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 610]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L534] int c1 ; [L535] int i2 ; [L538] c1 = 0 [L539] side1Failed = __VERIFIER_nondet_bool() [L540] side2Failed = __VERIFIER_nondet_bool() [L541] side1_written = __VERIFIER_nondet_char() [L542] side2_written = __VERIFIER_nondet_char() [L543] side1Failed_History_0 = __VERIFIER_nondet_bool() [L544] side1Failed_History_1 = __VERIFIER_nondet_bool() [L545] side1Failed_History_2 = __VERIFIER_nondet_bool() [L546] side2Failed_History_0 = __VERIFIER_nondet_bool() [L547] side2Failed_History_1 = __VERIFIER_nondet_bool() [L548] side2Failed_History_2 = __VERIFIER_nondet_bool() [L549] active_side_History_0 = __VERIFIER_nondet_char() [L550] active_side_History_1 = __VERIFIER_nondet_char() [L551] active_side_History_2 = __VERIFIER_nondet_char() [L552] manual_selection_History_0 = __VERIFIER_nondet_char() [L553] manual_selection_History_1 = __VERIFIER_nondet_char() [L554] manual_selection_History_2 = __VERIFIER_nondet_char() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L555] i2 = init() [L58] COND FALSE !(!cond) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L557] cs1_old = nomsg [L558] cs1_new = nomsg [L559] cs2_old = nomsg [L560] cs2_new = nomsg [L561] s1s2_old = nomsg [L562] s1s2_new = nomsg [L563] s1s1_old = nomsg [L564] s1s1_new = nomsg [L565] s2s1_old = nomsg [L566] s2s1_new = nomsg [L567] s2s2_old = nomsg [L568] s2s2_new = nomsg [L569] s1p_old = nomsg [L570] s1p_new = nomsg [L571] s2p_old = nomsg [L572] s2p_new = nomsg [L573] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L574] COND TRUE 1 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND TRUE \read(side1Failed) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L580] cs1_old = cs1_new [L581] cs1_new = nomsg [L582] cs2_old = cs2_new [L583] cs2_new = nomsg [L584] s1s2_old = s1s2_new [L585] s1s2_new = nomsg [L586] s1s1_old = s1s1_new [L587] s1s1_new = nomsg [L588] s2s1_old = s2s1_new [L589] s2s1_new = nomsg [L590] s2s2_old = s2s2_new [L591] s2s2_new = nomsg [L592] s1p_old = s1p_new [L593] s1p_new = nomsg [L594] s2p_old = s2p_new [L595] s2p_new = nomsg [L415] int tmp ; [L416] msg_t tmp___0 ; [L417] _Bool tmp___1 ; [L418] _Bool tmp___2 ; [L419] _Bool tmp___3 ; [L420] _Bool tmp___4 ; [L421] int8_t tmp___5 ; [L422] _Bool tmp___6 ; [L423] _Bool tmp___7 ; [L424] _Bool tmp___8 ; [L425] int8_t tmp___9 ; [L426] _Bool tmp___10 ; [L427] _Bool tmp___11 ; [L428] _Bool tmp___12 ; [L429] msg_t tmp___13 ; [L430] _Bool tmp___14 ; [L431] _Bool tmp___15 ; [L432] _Bool tmp___16 ; [L433] _Bool tmp___17 ; [L434] int8_t tmp___18 ; [L435] int8_t tmp___19 ; [L436] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L439] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L442] COND TRUE ! side2Failed [L443] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L448] tmp___0 = read_manual_selection_history((unsigned char)1) [L449] COND TRUE ! tmp___0 [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] tmp___1 = read_side1_failed_history((unsigned char)1) [L451] COND TRUE ! tmp___1 [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L452] tmp___2 = read_side1_failed_history((unsigned char)0) [L453] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L478] tmp___7 = read_side1_failed_history((unsigned char)1) [L479] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L494] tmp___11 = read_side1_failed_history((unsigned char)1) [L495] COND TRUE ! tmp___11 [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L496] tmp___12 = read_side2_failed_history((unsigned char)1) [L497] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L148] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L151] COND FALSE !((int )index == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L154] COND TRUE (int )index == 2 [L155] return (active_side_History_2); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L510] tmp___20 = read_active_side_history((unsigned char)2) [L511] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L529] return (1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L596] c1 = check() [L608] COND FALSE !(! arg) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L574] COND TRUE 1 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND FALSE !(\read(side1Failed)) [L284] side1 = s1s1_old [L285] s1s1_old = nomsg [L286] side2 = s2s1_old [L287] s2s1_old = nomsg [L288] manual_selection = cs1_old [L289] cs1_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L290] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L293] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L294] COND TRUE (int )side2 != (int )nomsg [L295] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L314] EXPR next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L314] s1s1_new = next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new [L315] EXPR next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L315] s1s2_new = next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new [L316] EXPR next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L316] s1p_new = next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new [L317] side1_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND TRUE \read(side2Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L335] EXPR nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L335] s2s1_new = nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new [L336] EXPR nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L336] s2s2_new = nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new [L337] EXPR nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L337] s2p_new = nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new [L338] side2_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L580] cs1_old = cs1_new [L581] cs1_new = nomsg [L582] cs2_old = cs2_new [L583] cs2_new = nomsg [L584] s1s2_old = s1s2_new [L585] s1s2_new = nomsg [L586] s1s1_old = s1s1_new [L587] s1s1_new = nomsg [L588] s2s1_old = s2s1_new [L589] s2s1_new = nomsg [L590] s2s2_old = s2s2_new [L591] s2s2_new = nomsg [L592] s1p_old = s1p_new [L593] s1p_new = nomsg [L594] s2p_old = s2p_new [L595] s2p_new = nomsg [L415] int tmp ; [L416] msg_t tmp___0 ; [L417] _Bool tmp___1 ; [L418] _Bool tmp___2 ; [L419] _Bool tmp___3 ; [L420] _Bool tmp___4 ; [L421] int8_t tmp___5 ; [L422] _Bool tmp___6 ; [L423] _Bool tmp___7 ; [L424] _Bool tmp___8 ; [L425] int8_t tmp___9 ; [L426] _Bool tmp___10 ; [L427] _Bool tmp___11 ; [L428] _Bool tmp___12 ; [L429] msg_t tmp___13 ; [L430] _Bool tmp___14 ; [L431] _Bool tmp___15 ; [L432] _Bool tmp___16 ; [L433] _Bool tmp___17 ; [L434] int8_t tmp___18 ; [L435] int8_t tmp___19 ; [L436] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L439] COND TRUE ! side1Failed [L440] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L448] tmp___0 = read_manual_selection_history((unsigned char)1) [L449] COND FALSE !(! tmp___0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L478] tmp___7 = read_side1_failed_history((unsigned char)1) [L479] COND TRUE \read(tmp___7) [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L480] tmp___8 = read_side2_failed_history((unsigned char)1) [L481] COND TRUE ! tmp___8 [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L482] tmp___5 = read_active_side_history((unsigned char)0) [L483] COND TRUE ! ((int )tmp___5 == 2) [L484] return (0); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L596] c1 = check() [L608] COND TRUE ! arg VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L610] reach_error() VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 294 locations, 23 error locations. Started 1 CEGAR loops. OverallTime: 41.7s, OverallIterations: 38, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 25.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 16987 SDtfs, 37945 SDslu, 44510 SDs, 0 SdLazy, 7949 SolverSat, 561 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1360 GetRequests, 854 SyntacticMatches, 5 SemanticMatches, 501 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29934 ImplicationChecksByTransitivity, 7.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=2668occurred in iteration=30, InterpolantAutomatonStates: 514, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 5.6s AutomataMinimizationTime, 37 MinimizatonAttempts, 45531 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.4s SsaConstructionTime, 1.7s SatisfiabilityAnalysisTime, 5.7s InterpolantComputationTime, 3987 NumberOfCodeBlocks, 3987 NumberOfCodeBlocksAsserted, 43 NumberOfCheckSat, 3804 ConstructedInterpolants, 0 QuantifiedInterpolants, 13153 SizeOfPredicates, 30 NumberOfNonLiveVariables, 3812 ConjunctsInSsa, 82 ConjunctsInUnsatCore, 42 InterpolantComputations, 33 PerfectInterpolantSequences, 454/621 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-10-28 09:47:37,151 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_88cd2d47-ec8b-463c-8cbe-c9a9843d6992/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...