./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version b2eff8ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash cdd691469d2e12c2dd1871c48be4dd2db0b9d27541ac5dee5ff25a04db0d98eb ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.1-dev-b2eff8b [2021-10-28 09:04:48,177 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-28 09:04:48,181 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-28 09:04:48,245 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-28 09:04:48,245 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-28 09:04:48,252 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-28 09:04:48,254 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-28 09:04:48,258 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-28 09:04:48,261 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-28 09:04:48,270 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-28 09:04:48,272 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-28 09:04:48,275 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-28 09:04:48,275 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-28 09:04:48,279 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-28 09:04:48,282 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-28 09:04:48,289 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-28 09:04:48,293 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-28 09:04:48,294 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-28 09:04:48,299 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-28 09:04:48,304 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-28 09:04:48,312 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-28 09:04:48,314 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-28 09:04:48,318 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-28 09:04:48,320 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-28 09:04:48,329 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-28 09:04:48,329 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-28 09:04:48,330 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-28 09:04:48,333 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-28 09:04:48,334 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-28 09:04:48,335 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-28 09:04:48,336 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-28 09:04:48,336 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-28 09:04:48,338 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-28 09:04:48,339 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-28 09:04:48,340 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-28 09:04:48,341 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-28 09:04:48,341 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-28 09:04:48,342 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-28 09:04:48,342 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-28 09:04:48,343 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-28 09:04:48,344 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-28 09:04:48,345 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/config/svcomp-Reach-32bit-Automizer_Default.epf [2021-10-28 09:04:48,374 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-28 09:04:48,374 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-28 09:04:48,375 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-28 09:04:48,375 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-28 09:04:48,376 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-28 09:04:48,377 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-28 09:04:48,377 INFO L138 SettingsManager]: * Use SBE=true [2021-10-28 09:04:48,377 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-28 09:04:48,378 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-28 09:04:48,378 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-28 09:04:48,378 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-28 09:04:48,379 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-28 09:04:48,379 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-10-28 09:04:48,379 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-10-28 09:04:48,379 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-10-28 09:04:48,380 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-28 09:04:48,380 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-28 09:04:48,380 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-28 09:04:48,380 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-10-28 09:04:48,381 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-28 09:04:48,381 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-28 09:04:48,381 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-10-28 09:04:48,382 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-28 09:04:48,382 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-28 09:04:48,382 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-10-28 09:04:48,383 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-10-28 09:04:48,383 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-28 09:04:48,383 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-10-28 09:04:48,383 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-10-28 09:04:48,384 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2021-10-28 09:04:48,384 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-10-28 09:04:48,384 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-28 09:04:48,385 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> cdd691469d2e12c2dd1871c48be4dd2db0b9d27541ac5dee5ff25a04db0d98eb [2021-10-28 09:04:48,792 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-28 09:04:48,824 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-28 09:04:48,827 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-28 09:04:48,829 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-28 09:04:48,830 INFO L275 PluginConnector]: CDTParser initialized [2021-10-28 09:04:48,831 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c [2021-10-28 09:04:48,911 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/data/c055dfc2a/e621f624014c48a2b9e18cd9ab439a07/FLAG4576447f6 [2021-10-28 09:04:49,667 INFO L306 CDTParser]: Found 1 translation units. [2021-10-28 09:04:49,670 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c [2021-10-28 09:04:49,700 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/data/c055dfc2a/e621f624014c48a2b9e18cd9ab439a07/FLAG4576447f6 [2021-10-28 09:04:49,927 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/data/c055dfc2a/e621f624014c48a2b9e18cd9ab439a07 [2021-10-28 09:04:49,930 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-28 09:04:49,932 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-28 09:04:49,936 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-28 09:04:49,936 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-28 09:04:49,941 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-28 09:04:49,942 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 09:04:49" (1/1) ... [2021-10-28 09:04:49,943 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@54f1fa9e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:49, skipping insertion in model container [2021-10-28 09:04:49,944 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 09:04:49" (1/1) ... [2021-10-28 09:04:49,951 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-28 09:04:49,997 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-28 09:04:50,336 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c[14702,14715] [2021-10-28 09:04:50,340 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 09:04:50,352 INFO L203 MainTranslator]: Completed pre-run [2021-10-28 09:04:50,439 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c[14702,14715] [2021-10-28 09:04:50,440 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 09:04:50,472 INFO L208 MainTranslator]: Completed translation [2021-10-28 09:04:50,473 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:50 WrapperNode [2021-10-28 09:04:50,474 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-28 09:04:50,475 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-28 09:04:50,476 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-28 09:04:50,476 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-28 09:04:50,485 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:50" (1/1) ... [2021-10-28 09:04:50,523 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:50" (1/1) ... [2021-10-28 09:04:50,601 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-28 09:04:50,605 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-28 09:04:50,605 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-28 09:04:50,606 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-28 09:04:50,618 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:50" (1/1) ... [2021-10-28 09:04:50,618 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:50" (1/1) ... [2021-10-28 09:04:50,632 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:50" (1/1) ... [2021-10-28 09:04:50,632 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:50" (1/1) ... [2021-10-28 09:04:50,677 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:50" (1/1) ... [2021-10-28 09:04:50,708 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:50" (1/1) ... [2021-10-28 09:04:50,713 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:50" (1/1) ... [2021-10-28 09:04:50,728 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-28 09:04:50,739 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-28 09:04:50,739 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-28 09:04:50,739 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-28 09:04:50,742 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:50" (1/1) ... [2021-10-28 09:04:50,752 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-28 09:04:50,771 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:04:50,787 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-10-28 09:04:50,852 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-10-28 09:04:50,904 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-28 09:04:50,906 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-28 09:04:50,906 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-28 09:04:50,907 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-28 09:04:52,258 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-28 09:04:52,274 INFO L299 CfgBuilder]: Removed 123 assume(true) statements. [2021-10-28 09:04:52,278 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 09:04:52 BoogieIcfgContainer [2021-10-28 09:04:52,278 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-28 09:04:52,281 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-10-28 09:04:52,282 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-10-28 09:04:52,286 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-10-28 09:04:52,286 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.10 09:04:49" (1/3) ... [2021-10-28 09:04:52,287 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@268ef35a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.10 09:04:52, skipping insertion in model container [2021-10-28 09:04:52,288 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:04:50" (2/3) ... [2021-10-28 09:04:52,288 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@268ef35a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.10 09:04:52, skipping insertion in model container [2021-10-28 09:04:52,289 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 09:04:52" (3/3) ... [2021-10-28 09:04:52,291 INFO L111 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c [2021-10-28 09:04:52,313 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-10-28 09:04:52,313 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 23 error locations. [2021-10-28 09:04:52,430 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-10-28 09:04:52,455 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-10-28 09:04:52,455 INFO L340 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2021-10-28 09:04:52,512 INFO L276 IsEmpty]: Start isEmpty. Operand has 297 states, 273 states have (on average 1.7032967032967032) internal successors, (465), 296 states have internal predecessors, (465), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:52,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-28 09:04:52,526 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:04:52,526 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:52,527 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:04:52,533 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:52,534 INFO L85 PathProgramCache]: Analyzing trace with hash 349506240, now seen corresponding path program 1 times [2021-10-28 09:04:52,546 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:52,547 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2023116062] [2021-10-28 09:04:52,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:52,549 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:52,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:52,850 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:52,851 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:52,852 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2023116062] [2021-10-28 09:04:52,853 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2023116062] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:52,854 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:52,854 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-28 09:04:52,856 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [862028418] [2021-10-28 09:04:52,864 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2021-10-28 09:04:52,864 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:52,888 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-10-28 09:04:52,890 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-28 09:04:52,895 INFO L87 Difference]: Start difference. First operand has 297 states, 273 states have (on average 1.7032967032967032) internal successors, (465), 296 states have internal predecessors, (465), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:52,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:52,994 INFO L93 Difference]: Finished difference Result 578 states and 901 transitions. [2021-10-28 09:04:52,995 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-10-28 09:04:52,996 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-28 09:04:52,997 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:04:53,024 INFO L225 Difference]: With dead ends: 578 [2021-10-28 09:04:53,026 INFO L226 Difference]: Without dead ends: 293 [2021-10-28 09:04:53,037 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-28 09:04:53,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 293 states. [2021-10-28 09:04:53,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 293 to 293. [2021-10-28 09:04:53,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 293 states, 270 states have (on average 1.5888888888888888) internal successors, (429), 292 states have internal predecessors, (429), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:53,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 293 states to 293 states and 429 transitions. [2021-10-28 09:04:53,146 INFO L78 Accepts]: Start accepts. Automaton has 293 states and 429 transitions. Word has length 33 [2021-10-28 09:04:53,147 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:04:53,148 INFO L470 AbstractCegarLoop]: Abstraction has 293 states and 429 transitions. [2021-10-28 09:04:53,149 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:53,149 INFO L276 IsEmpty]: Start isEmpty. Operand 293 states and 429 transitions. [2021-10-28 09:04:53,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-28 09:04:53,152 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:04:53,152 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:53,152 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-10-28 09:04:53,153 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:04:53,157 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:53,157 INFO L85 PathProgramCache]: Analyzing trace with hash -1047215368, now seen corresponding path program 1 times [2021-10-28 09:04:53,157 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:53,158 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1270965892] [2021-10-28 09:04:53,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:53,158 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:53,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:53,365 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:53,365 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:53,366 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1270965892] [2021-10-28 09:04:53,366 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1270965892] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:53,366 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:53,367 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:04:53,367 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2056574985] [2021-10-28 09:04:53,371 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:04:53,372 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:53,375 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:04:53,375 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:04:53,376 INFO L87 Difference]: Start difference. First operand 293 states and 429 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:53,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:53,496 INFO L93 Difference]: Finished difference Result 572 states and 832 transitions. [2021-10-28 09:04:53,497 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 09:04:53,497 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-28 09:04:53,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:04:53,503 INFO L225 Difference]: With dead ends: 572 [2021-10-28 09:04:53,504 INFO L226 Difference]: Without dead ends: 293 [2021-10-28 09:04:53,506 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:04:53,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 293 states. [2021-10-28 09:04:53,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 293 to 293. [2021-10-28 09:04:53,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 293 states, 270 states have (on average 1.5444444444444445) internal successors, (417), 292 states have internal predecessors, (417), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:53,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 293 states to 293 states and 417 transitions. [2021-10-28 09:04:53,537 INFO L78 Accepts]: Start accepts. Automaton has 293 states and 417 transitions. Word has length 33 [2021-10-28 09:04:53,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:04:53,537 INFO L470 AbstractCegarLoop]: Abstraction has 293 states and 417 transitions. [2021-10-28 09:04:53,538 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:53,538 INFO L276 IsEmpty]: Start isEmpty. Operand 293 states and 417 transitions. [2021-10-28 09:04:53,547 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2021-10-28 09:04:53,547 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:04:53,548 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:53,548 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-10-28 09:04:53,549 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:04:53,550 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:53,551 INFO L85 PathProgramCache]: Analyzing trace with hash -600938825, now seen corresponding path program 1 times [2021-10-28 09:04:53,551 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:53,552 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1354076713] [2021-10-28 09:04:53,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:53,553 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:53,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:53,814 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:53,814 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:53,815 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1354076713] [2021-10-28 09:04:53,815 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1354076713] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:53,815 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:53,815 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:04:53,816 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2134891412] [2021-10-28 09:04:53,817 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:04:53,817 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:53,818 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:04:53,818 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:53,819 INFO L87 Difference]: Start difference. First operand 293 states and 417 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:53,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:53,901 INFO L93 Difference]: Finished difference Result 603 states and 867 transitions. [2021-10-28 09:04:53,901 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:04:53,902 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2021-10-28 09:04:53,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:04:53,906 INFO L225 Difference]: With dead ends: 603 [2021-10-28 09:04:53,906 INFO L226 Difference]: Without dead ends: 327 [2021-10-28 09:04:53,907 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:53,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 327 states. [2021-10-28 09:04:53,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 327 to 269. [2021-10-28 09:04:53,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 269 states, 250 states have (on average 1.524) internal successors, (381), 268 states have internal predecessors, (381), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:53,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 269 states and 381 transitions. [2021-10-28 09:04:53,928 INFO L78 Accepts]: Start accepts. Automaton has 269 states and 381 transitions. Word has length 44 [2021-10-28 09:04:53,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:04:53,929 INFO L470 AbstractCegarLoop]: Abstraction has 269 states and 381 transitions. [2021-10-28 09:04:53,929 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:53,930 INFO L276 IsEmpty]: Start isEmpty. Operand 269 states and 381 transitions. [2021-10-28 09:04:53,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-10-28 09:04:53,934 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:04:53,934 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:53,934 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-10-28 09:04:53,935 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:04:53,936 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:53,936 INFO L85 PathProgramCache]: Analyzing trace with hash -1585020226, now seen corresponding path program 1 times [2021-10-28 09:04:53,937 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:53,938 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1793817948] [2021-10-28 09:04:53,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:53,939 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:53,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:54,080 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:54,081 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:54,081 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1793817948] [2021-10-28 09:04:54,085 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1793817948] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:54,086 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:54,087 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:04:54,087 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [445757809] [2021-10-28 09:04:54,088 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:04:54,088 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:54,089 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:04:54,090 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:54,090 INFO L87 Difference]: Start difference. First operand 269 states and 381 transitions. Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:54,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:54,139 INFO L93 Difference]: Finished difference Result 750 states and 1074 transitions. [2021-10-28 09:04:54,139 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:04:54,140 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 53 [2021-10-28 09:04:54,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:04:54,147 INFO L225 Difference]: With dead ends: 750 [2021-10-28 09:04:54,148 INFO L226 Difference]: Without dead ends: 498 [2021-10-28 09:04:54,149 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:54,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 498 states. [2021-10-28 09:04:54,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 498 to 304. [2021-10-28 09:04:54,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 304 states, 285 states have (on average 1.5192982456140351) internal successors, (433), 303 states have internal predecessors, (433), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:54,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 304 states to 304 states and 433 transitions. [2021-10-28 09:04:54,166 INFO L78 Accepts]: Start accepts. Automaton has 304 states and 433 transitions. Word has length 53 [2021-10-28 09:04:54,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:04:54,166 INFO L470 AbstractCegarLoop]: Abstraction has 304 states and 433 transitions. [2021-10-28 09:04:54,167 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:54,167 INFO L276 IsEmpty]: Start isEmpty. Operand 304 states and 433 transitions. [2021-10-28 09:04:54,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-28 09:04:54,169 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:04:54,169 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:54,169 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-10-28 09:04:54,170 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:04:54,170 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:54,170 INFO L85 PathProgramCache]: Analyzing trace with hash -1396202520, now seen corresponding path program 1 times [2021-10-28 09:04:54,171 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:54,171 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [389395058] [2021-10-28 09:04:54,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:54,172 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:54,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:54,246 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:54,247 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:54,247 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [389395058] [2021-10-28 09:04:54,247 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [389395058] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:54,248 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:54,248 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:04:54,248 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1088310558] [2021-10-28 09:04:54,249 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:04:54,249 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:54,250 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:04:54,250 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:54,251 INFO L87 Difference]: Start difference. First operand 304 states and 433 transitions. Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:54,294 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:54,294 INFO L93 Difference]: Finished difference Result 834 states and 1199 transitions. [2021-10-28 09:04:54,295 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:04:54,295 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-28 09:04:54,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:04:54,300 INFO L225 Difference]: With dead ends: 834 [2021-10-28 09:04:54,300 INFO L226 Difference]: Without dead ends: 547 [2021-10-28 09:04:54,302 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:54,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 547 states. [2021-10-28 09:04:54,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 547 to 329. [2021-10-28 09:04:54,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 329 states, 310 states have (on average 1.5193548387096774) internal successors, (471), 328 states have internal predecessors, (471), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:54,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 471 transitions. [2021-10-28 09:04:54,322 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 471 transitions. Word has length 54 [2021-10-28 09:04:54,323 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:04:54,323 INFO L470 AbstractCegarLoop]: Abstraction has 329 states and 471 transitions. [2021-10-28 09:04:54,323 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:54,324 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 471 transitions. [2021-10-28 09:04:54,325 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-28 09:04:54,325 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:04:54,325 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:54,326 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-10-28 09:04:54,326 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:04:54,327 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:54,327 INFO L85 PathProgramCache]: Analyzing trace with hash -716144150, now seen corresponding path program 1 times [2021-10-28 09:04:54,327 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:54,328 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [225815821] [2021-10-28 09:04:54,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:54,328 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:54,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:54,475 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:54,475 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:54,475 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [225815821] [2021-10-28 09:04:54,476 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [225815821] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:54,476 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:54,476 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:04:54,476 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [288520027] [2021-10-28 09:04:54,477 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 09:04:54,477 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:54,478 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 09:04:54,478 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:04:54,479 INFO L87 Difference]: Start difference. First operand 329 states and 471 transitions. Second operand has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:54,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:54,770 INFO L93 Difference]: Finished difference Result 1023 states and 1476 transitions. [2021-10-28 09:04:54,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 09:04:54,771 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-28 09:04:54,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:04:54,785 INFO L225 Difference]: With dead ends: 1023 [2021-10-28 09:04:54,786 INFO L226 Difference]: Without dead ends: 711 [2021-10-28 09:04:54,787 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-28 09:04:54,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2021-10-28 09:04:54,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 427. [2021-10-28 09:04:54,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 427 states, 408 states have (on average 1.4901960784313726) internal successors, (608), 426 states have internal predecessors, (608), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:54,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 427 states to 427 states and 608 transitions. [2021-10-28 09:04:54,823 INFO L78 Accepts]: Start accepts. Automaton has 427 states and 608 transitions. Word has length 54 [2021-10-28 09:04:54,825 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:04:54,825 INFO L470 AbstractCegarLoop]: Abstraction has 427 states and 608 transitions. [2021-10-28 09:04:54,825 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:54,825 INFO L276 IsEmpty]: Start isEmpty. Operand 427 states and 608 transitions. [2021-10-28 09:04:54,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2021-10-28 09:04:54,826 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:04:54,827 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:54,827 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-10-28 09:04:54,827 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:04:54,828 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:54,828 INFO L85 PathProgramCache]: Analyzing trace with hash 153208358, now seen corresponding path program 1 times [2021-10-28 09:04:54,828 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:54,833 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [183850257] [2021-10-28 09:04:54,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:54,834 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:54,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:54,924 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:54,924 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:54,924 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [183850257] [2021-10-28 09:04:54,925 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [183850257] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:54,925 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:54,925 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:04:54,925 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1475620962] [2021-10-28 09:04:54,926 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 09:04:54,926 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:54,927 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 09:04:54,927 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:04:54,928 INFO L87 Difference]: Start difference. First operand 427 states and 608 transitions. Second operand has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:55,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:55,195 INFO L93 Difference]: Finished difference Result 1027 states and 1476 transitions. [2021-10-28 09:04:55,196 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 09:04:55,196 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 55 [2021-10-28 09:04:55,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:04:55,202 INFO L225 Difference]: With dead ends: 1027 [2021-10-28 09:04:55,203 INFO L226 Difference]: Without dead ends: 715 [2021-10-28 09:04:55,204 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-28 09:04:55,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 715 states. [2021-10-28 09:04:55,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 715 to 435. [2021-10-28 09:04:55,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 435 states, 416 states have (on average 1.4807692307692308) internal successors, (616), 434 states have internal predecessors, (616), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:55,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 435 states to 435 states and 616 transitions. [2021-10-28 09:04:55,239 INFO L78 Accepts]: Start accepts. Automaton has 435 states and 616 transitions. Word has length 55 [2021-10-28 09:04:55,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:04:55,239 INFO L470 AbstractCegarLoop]: Abstraction has 435 states and 616 transitions. [2021-10-28 09:04:55,240 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:55,240 INFO L276 IsEmpty]: Start isEmpty. Operand 435 states and 616 transitions. [2021-10-28 09:04:55,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2021-10-28 09:04:55,241 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:04:55,241 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:55,242 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-10-28 09:04:55,242 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:04:55,243 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:55,244 INFO L85 PathProgramCache]: Analyzing trace with hash -748848364, now seen corresponding path program 1 times [2021-10-28 09:04:55,244 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:55,245 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [837607191] [2021-10-28 09:04:55,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:55,245 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:55,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:55,418 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:55,418 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:55,419 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [837607191] [2021-10-28 09:04:55,419 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [837607191] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:55,419 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:55,419 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:04:55,420 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1632252661] [2021-10-28 09:04:55,420 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:04:55,420 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:55,421 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:04:55,421 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:04:55,422 INFO L87 Difference]: Start difference. First operand 435 states and 616 transitions. Second operand has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:55,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:55,680 INFO L93 Difference]: Finished difference Result 1027 states and 1468 transitions. [2021-10-28 09:04:55,681 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:04:55,681 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 57 [2021-10-28 09:04:55,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:04:55,688 INFO L225 Difference]: With dead ends: 1027 [2021-10-28 09:04:55,688 INFO L226 Difference]: Without dead ends: 715 [2021-10-28 09:04:55,690 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:04:55,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 715 states. [2021-10-28 09:04:55,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 715 to 435. [2021-10-28 09:04:55,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 435 states, 416 states have (on average 1.4711538461538463) internal successors, (612), 434 states have internal predecessors, (612), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:55,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 435 states to 435 states and 612 transitions. [2021-10-28 09:04:55,725 INFO L78 Accepts]: Start accepts. Automaton has 435 states and 612 transitions. Word has length 57 [2021-10-28 09:04:55,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:04:55,727 INFO L470 AbstractCegarLoop]: Abstraction has 435 states and 612 transitions. [2021-10-28 09:04:55,727 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:55,727 INFO L276 IsEmpty]: Start isEmpty. Operand 435 states and 612 transitions. [2021-10-28 09:04:55,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2021-10-28 09:04:55,729 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:04:55,729 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:55,730 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-10-28 09:04:55,730 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:04:55,730 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:55,731 INFO L85 PathProgramCache]: Analyzing trace with hash 2035065116, now seen corresponding path program 1 times [2021-10-28 09:04:55,731 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:55,731 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [957388757] [2021-10-28 09:04:55,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:55,732 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:55,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:55,844 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:55,844 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:55,844 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [957388757] [2021-10-28 09:04:55,845 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [957388757] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:55,845 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:55,845 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:04:55,846 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1268483602] [2021-10-28 09:04:55,846 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:04:55,846 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:55,847 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:04:55,847 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:55,848 INFO L87 Difference]: Start difference. First operand 435 states and 612 transitions. Second operand has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:55,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:55,906 INFO L93 Difference]: Finished difference Result 875 states and 1255 transitions. [2021-10-28 09:04:55,910 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:04:55,910 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 58 [2021-10-28 09:04:55,911 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:04:55,915 INFO L225 Difference]: With dead ends: 875 [2021-10-28 09:04:55,915 INFO L226 Difference]: Without dead ends: 563 [2021-10-28 09:04:55,916 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:55,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 563 states. [2021-10-28 09:04:55,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 563 to 430. [2021-10-28 09:04:55,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 430 states, 412 states have (on average 1.4660194174757282) internal successors, (604), 429 states have internal predecessors, (604), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:55,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 430 states to 430 states and 604 transitions. [2021-10-28 09:04:55,950 INFO L78 Accepts]: Start accepts. Automaton has 430 states and 604 transitions. Word has length 58 [2021-10-28 09:04:55,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:04:55,951 INFO L470 AbstractCegarLoop]: Abstraction has 430 states and 604 transitions. [2021-10-28 09:04:55,951 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:55,951 INFO L276 IsEmpty]: Start isEmpty. Operand 430 states and 604 transitions. [2021-10-28 09:04:55,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2021-10-28 09:04:55,952 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:04:55,953 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:55,953 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-10-28 09:04:55,953 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:04:55,954 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:55,954 INFO L85 PathProgramCache]: Analyzing trace with hash -1833641356, now seen corresponding path program 1 times [2021-10-28 09:04:55,954 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:55,955 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1008327814] [2021-10-28 09:04:55,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:55,955 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:55,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:56,075 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:56,075 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:56,076 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1008327814] [2021-10-28 09:04:56,076 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1008327814] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:56,076 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:56,077 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:04:56,077 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1465654675] [2021-10-28 09:04:56,077 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:04:56,078 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:56,078 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:04:56,079 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:56,079 INFO L87 Difference]: Start difference. First operand 430 states and 604 transitions. Second operand has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:56,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:56,186 INFO L93 Difference]: Finished difference Result 874 states and 1254 transitions. [2021-10-28 09:04:56,187 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:04:56,187 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 62 [2021-10-28 09:04:56,188 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:04:56,192 INFO L225 Difference]: With dead ends: 874 [2021-10-28 09:04:56,193 INFO L226 Difference]: Without dead ends: 567 [2021-10-28 09:04:56,194 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:56,195 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 567 states. [2021-10-28 09:04:56,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 567 to 410. [2021-10-28 09:04:56,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 410 states, 396 states have (on average 1.4444444444444444) internal successors, (572), 409 states have internal predecessors, (572), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:56,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 410 states to 410 states and 572 transitions. [2021-10-28 09:04:56,243 INFO L78 Accepts]: Start accepts. Automaton has 410 states and 572 transitions. Word has length 62 [2021-10-28 09:04:56,243 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:04:56,243 INFO L470 AbstractCegarLoop]: Abstraction has 410 states and 572 transitions. [2021-10-28 09:04:56,244 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:56,244 INFO L276 IsEmpty]: Start isEmpty. Operand 410 states and 572 transitions. [2021-10-28 09:04:56,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2021-10-28 09:04:56,245 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:04:56,246 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:56,246 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-10-28 09:04:56,247 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:04:56,247 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:56,248 INFO L85 PathProgramCache]: Analyzing trace with hash -532758708, now seen corresponding path program 1 times [2021-10-28 09:04:56,248 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:56,251 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [333902353] [2021-10-28 09:04:56,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:56,252 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:56,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:56,358 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:56,358 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:56,359 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [333902353] [2021-10-28 09:04:56,359 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [333902353] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:56,359 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:56,359 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:04:56,359 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1473761861] [2021-10-28 09:04:56,360 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:04:56,360 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:56,362 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:04:56,362 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:56,363 INFO L87 Difference]: Start difference. First operand 410 states and 572 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:56,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:56,442 INFO L93 Difference]: Finished difference Result 842 states and 1198 transitions. [2021-10-28 09:04:56,442 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:04:56,443 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2021-10-28 09:04:56,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:04:56,447 INFO L225 Difference]: With dead ends: 842 [2021-10-28 09:04:56,448 INFO L226 Difference]: Without dead ends: 555 [2021-10-28 09:04:56,449 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:56,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2021-10-28 09:04:56,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 398. [2021-10-28 09:04:56,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 398 states, 386 states have (on average 1.4352331606217616) internal successors, (554), 397 states have internal predecessors, (554), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:56,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 398 states to 398 states and 554 transitions. [2021-10-28 09:04:56,482 INFO L78 Accepts]: Start accepts. Automaton has 398 states and 554 transitions. Word has length 66 [2021-10-28 09:04:56,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:04:56,482 INFO L470 AbstractCegarLoop]: Abstraction has 398 states and 554 transitions. [2021-10-28 09:04:56,483 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:56,483 INFO L276 IsEmpty]: Start isEmpty. Operand 398 states and 554 transitions. [2021-10-28 09:04:56,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-10-28 09:04:56,484 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:04:56,485 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:56,485 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-10-28 09:04:56,485 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:04:56,486 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:56,486 INFO L85 PathProgramCache]: Analyzing trace with hash 949999250, now seen corresponding path program 1 times [2021-10-28 09:04:56,486 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:56,487 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [873537728] [2021-10-28 09:04:56,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:56,487 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:56,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:56,575 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:56,576 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:56,576 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [873537728] [2021-10-28 09:04:56,576 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [873537728] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:56,576 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:56,577 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:04:56,577 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1665473592] [2021-10-28 09:04:56,577 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:04:56,578 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:56,578 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:04:56,578 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:56,579 INFO L87 Difference]: Start difference. First operand 398 states and 554 transitions. Second operand has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:56,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:56,682 INFO L93 Difference]: Finished difference Result 838 states and 1190 transitions. [2021-10-28 09:04:56,683 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:04:56,683 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 67 [2021-10-28 09:04:56,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:04:56,688 INFO L225 Difference]: With dead ends: 838 [2021-10-28 09:04:56,688 INFO L226 Difference]: Without dead ends: 563 [2021-10-28 09:04:56,689 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:56,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 563 states. [2021-10-28 09:04:56,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 563 to 378. [2021-10-28 09:04:56,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 378 states, 370 states have (on average 1.4108108108108108) internal successors, (522), 377 states have internal predecessors, (522), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:56,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 378 states to 378 states and 522 transitions. [2021-10-28 09:04:56,724 INFO L78 Accepts]: Start accepts. Automaton has 378 states and 522 transitions. Word has length 67 [2021-10-28 09:04:56,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:04:56,724 INFO L470 AbstractCegarLoop]: Abstraction has 378 states and 522 transitions. [2021-10-28 09:04:56,725 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:56,725 INFO L276 IsEmpty]: Start isEmpty. Operand 378 states and 522 transitions. [2021-10-28 09:04:56,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2021-10-28 09:04:56,726 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:04:56,727 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:56,727 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-10-28 09:04:56,727 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:04:56,728 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:56,728 INFO L85 PathProgramCache]: Analyzing trace with hash -448644128, now seen corresponding path program 1 times [2021-10-28 09:04:56,728 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:56,729 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1142469075] [2021-10-28 09:04:56,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:56,729 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:56,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:56,886 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:56,886 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:56,887 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1142469075] [2021-10-28 09:04:56,887 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1142469075] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:56,887 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:56,887 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 09:04:56,888 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1381787166] [2021-10-28 09:04:56,888 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:04:56,888 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:56,889 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:04:56,889 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 09:04:56,890 INFO L87 Difference]: Start difference. First operand 378 states and 522 transitions. Second operand has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:57,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:57,147 INFO L93 Difference]: Finished difference Result 1133 states and 1588 transitions. [2021-10-28 09:04:57,147 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 09:04:57,148 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 72 [2021-10-28 09:04:57,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:04:57,154 INFO L225 Difference]: With dead ends: 1133 [2021-10-28 09:04:57,154 INFO L226 Difference]: Without dead ends: 878 [2021-10-28 09:04:57,156 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-28 09:04:57,157 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 878 states. [2021-10-28 09:04:57,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 878 to 428. [2021-10-28 09:04:57,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 428 states, 420 states have (on average 1.4047619047619047) internal successors, (590), 427 states have internal predecessors, (590), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:57,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 428 states to 428 states and 590 transitions. [2021-10-28 09:04:57,202 INFO L78 Accepts]: Start accepts. Automaton has 428 states and 590 transitions. Word has length 72 [2021-10-28 09:04:57,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:04:57,202 INFO L470 AbstractCegarLoop]: Abstraction has 428 states and 590 transitions. [2021-10-28 09:04:57,203 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:57,203 INFO L276 IsEmpty]: Start isEmpty. Operand 428 states and 590 transitions. [2021-10-28 09:04:57,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2021-10-28 09:04:57,204 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:04:57,204 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:57,205 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-10-28 09:04:57,205 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:04:57,206 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:57,206 INFO L85 PathProgramCache]: Analyzing trace with hash 534764451, now seen corresponding path program 1 times [2021-10-28 09:04:57,206 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:57,206 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1863372839] [2021-10-28 09:04:57,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:57,207 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:57,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:57,290 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:57,290 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:57,291 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1863372839] [2021-10-28 09:04:57,291 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1863372839] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:57,291 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:57,291 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:04:57,292 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [797445564] [2021-10-28 09:04:57,292 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:04:57,292 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:57,293 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:04:57,293 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:57,294 INFO L87 Difference]: Start difference. First operand 428 states and 590 transitions. Second operand has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:57,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:57,370 INFO L93 Difference]: Finished difference Result 763 states and 1069 transitions. [2021-10-28 09:04:57,370 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:04:57,371 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 73 [2021-10-28 09:04:57,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:04:57,375 INFO L225 Difference]: With dead ends: 763 [2021-10-28 09:04:57,375 INFO L226 Difference]: Without dead ends: 508 [2021-10-28 09:04:57,376 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:57,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 508 states. [2021-10-28 09:04:57,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 508 to 424. [2021-10-28 09:04:57,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 424 states, 417 states have (on average 1.3980815347721822) internal successors, (583), 423 states have internal predecessors, (583), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:57,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 424 states to 424 states and 583 transitions. [2021-10-28 09:04:57,417 INFO L78 Accepts]: Start accepts. Automaton has 424 states and 583 transitions. Word has length 73 [2021-10-28 09:04:57,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:04:57,418 INFO L470 AbstractCegarLoop]: Abstraction has 424 states and 583 transitions. [2021-10-28 09:04:57,418 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:57,419 INFO L276 IsEmpty]: Start isEmpty. Operand 424 states and 583 transitions. [2021-10-28 09:04:57,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2021-10-28 09:04:57,420 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:04:57,420 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:57,420 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-10-28 09:04:57,421 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:04:57,421 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:57,421 INFO L85 PathProgramCache]: Analyzing trace with hash -344815767, now seen corresponding path program 1 times [2021-10-28 09:04:57,422 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:57,422 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1351117203] [2021-10-28 09:04:57,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:57,422 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:57,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:57,494 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:57,494 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:57,494 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1351117203] [2021-10-28 09:04:57,495 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1351117203] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:57,495 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:57,495 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:04:57,495 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1420096075] [2021-10-28 09:04:57,496 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:04:57,496 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:57,497 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:04:57,497 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:57,497 INFO L87 Difference]: Start difference. First operand 424 states and 583 transitions. Second operand has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:57,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:57,595 INFO L93 Difference]: Finished difference Result 862 states and 1206 transitions. [2021-10-28 09:04:57,596 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:04:57,596 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 73 [2021-10-28 09:04:57,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:04:57,601 INFO L225 Difference]: With dead ends: 862 [2021-10-28 09:04:57,601 INFO L226 Difference]: Without dead ends: 594 [2021-10-28 09:04:57,603 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:04:57,604 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 594 states. [2021-10-28 09:04:57,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 594 to 408. [2021-10-28 09:04:57,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 408 states, 403 states have (on average 1.382133995037221) internal successors, (557), 407 states have internal predecessors, (557), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:57,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 408 states to 408 states and 557 transitions. [2021-10-28 09:04:57,643 INFO L78 Accepts]: Start accepts. Automaton has 408 states and 557 transitions. Word has length 73 [2021-10-28 09:04:57,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:04:57,644 INFO L470 AbstractCegarLoop]: Abstraction has 408 states and 557 transitions. [2021-10-28 09:04:57,644 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:57,644 INFO L276 IsEmpty]: Start isEmpty. Operand 408 states and 557 transitions. [2021-10-28 09:04:57,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-28 09:04:57,646 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:04:57,646 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:57,646 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-10-28 09:04:57,647 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:04:57,647 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:57,648 INFO L85 PathProgramCache]: Analyzing trace with hash 317146558, now seen corresponding path program 1 times [2021-10-28 09:04:57,648 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:57,648 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [854626705] [2021-10-28 09:04:57,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:57,649 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:57,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:57,781 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:57,781 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:57,781 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [854626705] [2021-10-28 09:04:57,782 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [854626705] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:57,782 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:57,782 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-28 09:04:57,782 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [363827574] [2021-10-28 09:04:57,783 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-28 09:04:57,783 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:57,784 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 09:04:57,784 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2021-10-28 09:04:57,784 INFO L87 Difference]: Start difference. First operand 408 states and 557 transitions. Second operand has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:58,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:58,197 INFO L93 Difference]: Finished difference Result 1404 states and 1944 transitions. [2021-10-28 09:04:58,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 09:04:58,197 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-28 09:04:58,198 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:04:58,205 INFO L225 Difference]: With dead ends: 1404 [2021-10-28 09:04:58,206 INFO L226 Difference]: Without dead ends: 1147 [2021-10-28 09:04:58,207 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-28 09:04:58,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1147 states. [2021-10-28 09:04:58,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1147 to 436. [2021-10-28 09:04:58,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 436 states, 431 states have (on average 1.3665893271461718) internal successors, (589), 435 states have internal predecessors, (589), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:58,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 436 states to 436 states and 589 transitions. [2021-10-28 09:04:58,277 INFO L78 Accepts]: Start accepts. Automaton has 436 states and 589 transitions. Word has length 76 [2021-10-28 09:04:58,277 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:04:58,277 INFO L470 AbstractCegarLoop]: Abstraction has 436 states and 589 transitions. [2021-10-28 09:04:58,278 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:58,278 INFO L276 IsEmpty]: Start isEmpty. Operand 436 states and 589 transitions. [2021-10-28 09:04:58,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-28 09:04:58,279 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:04:58,279 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:58,280 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-10-28 09:04:58,280 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:04:58,281 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:58,281 INFO L85 PathProgramCache]: Analyzing trace with hash 917353494, now seen corresponding path program 1 times [2021-10-28 09:04:58,281 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:58,281 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [367713290] [2021-10-28 09:04:58,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:58,282 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:58,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:58,346 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:58,346 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:58,347 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [367713290] [2021-10-28 09:04:58,347 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [367713290] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:58,347 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:58,347 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:04:58,348 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [929923486] [2021-10-28 09:04:58,348 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:04:58,348 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:58,349 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:04:58,349 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:04:58,350 INFO L87 Difference]: Start difference. First operand 436 states and 589 transitions. Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:58,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:58,536 INFO L93 Difference]: Finished difference Result 1115 states and 1519 transitions. [2021-10-28 09:04:58,537 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:04:58,537 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-28 09:04:58,538 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:04:58,544 INFO L225 Difference]: With dead ends: 1115 [2021-10-28 09:04:58,544 INFO L226 Difference]: Without dead ends: 852 [2021-10-28 09:04:58,545 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:04:58,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 852 states. [2021-10-28 09:04:58,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 852 to 657. [2021-10-28 09:04:58,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 657 states, 652 states have (on average 1.348159509202454) internal successors, (879), 656 states have internal predecessors, (879), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:58,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 657 states to 657 states and 879 transitions. [2021-10-28 09:04:58,620 INFO L78 Accepts]: Start accepts. Automaton has 657 states and 879 transitions. Word has length 76 [2021-10-28 09:04:58,620 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:04:58,620 INFO L470 AbstractCegarLoop]: Abstraction has 657 states and 879 transitions. [2021-10-28 09:04:58,621 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:58,621 INFO L276 IsEmpty]: Start isEmpty. Operand 657 states and 879 transitions. [2021-10-28 09:04:58,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-10-28 09:04:58,622 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:04:58,623 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:58,623 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-10-28 09:04:58,623 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:04:58,624 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:58,624 INFO L85 PathProgramCache]: Analyzing trace with hash -480894404, now seen corresponding path program 1 times [2021-10-28 09:04:58,624 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:58,625 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [802416406] [2021-10-28 09:04:58,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:58,625 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:58,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:58,719 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:58,719 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:58,719 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [802416406] [2021-10-28 09:04:58,720 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [802416406] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:58,720 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:58,720 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 09:04:58,720 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1852559148] [2021-10-28 09:04:58,721 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:04:58,721 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:58,722 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:04:58,722 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 09:04:58,722 INFO L87 Difference]: Start difference. First operand 657 states and 879 transitions. Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:58,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:58,945 INFO L93 Difference]: Finished difference Result 1021 states and 1390 transitions. [2021-10-28 09:04:58,945 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-28 09:04:58,946 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-10-28 09:04:58,946 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:04:58,953 INFO L225 Difference]: With dead ends: 1021 [2021-10-28 09:04:58,953 INFO L226 Difference]: Without dead ends: 1019 [2021-10-28 09:04:58,954 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-28 09:04:58,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1019 states. [2021-10-28 09:04:59,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1019 to 659. [2021-10-28 09:04:59,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 659 states, 654 states have (on average 1.3470948012232415) internal successors, (881), 658 states have internal predecessors, (881), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:59,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 659 states to 659 states and 881 transitions. [2021-10-28 09:04:59,032 INFO L78 Accepts]: Start accepts. Automaton has 659 states and 881 transitions. Word has length 77 [2021-10-28 09:04:59,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:04:59,033 INFO L470 AbstractCegarLoop]: Abstraction has 659 states and 881 transitions. [2021-10-28 09:04:59,033 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:59,033 INFO L276 IsEmpty]: Start isEmpty. Operand 659 states and 881 transitions. [2021-10-28 09:04:59,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-10-28 09:04:59,035 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:04:59,035 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:59,036 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-10-28 09:04:59,036 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:04:59,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:59,037 INFO L85 PathProgramCache]: Analyzing trace with hash 1699767669, now seen corresponding path program 1 times [2021-10-28 09:04:59,037 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:59,037 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1801334865] [2021-10-28 09:04:59,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:59,038 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:59,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:59,204 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:59,204 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:59,204 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1801334865] [2021-10-28 09:04:59,204 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1801334865] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:59,205 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:59,205 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 09:04:59,205 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1045928770] [2021-10-28 09:04:59,207 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:04:59,207 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:59,207 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:04:59,208 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 09:04:59,208 INFO L87 Difference]: Start difference. First operand 659 states and 881 transitions. Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:59,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:04:59,600 INFO L93 Difference]: Finished difference Result 1988 states and 2739 transitions. [2021-10-28 09:04:59,600 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 09:04:59,601 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-10-28 09:04:59,601 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:04:59,612 INFO L225 Difference]: With dead ends: 1988 [2021-10-28 09:04:59,613 INFO L226 Difference]: Without dead ends: 1608 [2021-10-28 09:04:59,614 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-28 09:04:59,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1608 states. [2021-10-28 09:04:59,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1608 to 647. [2021-10-28 09:04:59,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 647 states, 642 states have (on average 1.3504672897196262) internal successors, (867), 646 states have internal predecessors, (867), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:59,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 647 states to 647 states and 867 transitions. [2021-10-28 09:04:59,699 INFO L78 Accepts]: Start accepts. Automaton has 647 states and 867 transitions. Word has length 77 [2021-10-28 09:04:59,700 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:04:59,700 INFO L470 AbstractCegarLoop]: Abstraction has 647 states and 867 transitions. [2021-10-28 09:04:59,700 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:04:59,700 INFO L276 IsEmpty]: Start isEmpty. Operand 647 states and 867 transitions. [2021-10-28 09:04:59,701 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-28 09:04:59,702 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:04:59,702 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:04:59,702 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-10-28 09:04:59,703 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:04:59,703 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:04:59,704 INFO L85 PathProgramCache]: Analyzing trace with hash 239208754, now seen corresponding path program 1 times [2021-10-28 09:04:59,704 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:04:59,704 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1409385128] [2021-10-28 09:04:59,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:04:59,704 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:04:59,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:04:59,826 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:04:59,826 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:04:59,826 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1409385128] [2021-10-28 09:04:59,827 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1409385128] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:04:59,827 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:04:59,827 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 09:04:59,827 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [627612807] [2021-10-28 09:04:59,828 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:04:59,828 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:04:59,829 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:04:59,829 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 09:04:59,829 INFO L87 Difference]: Start difference. First operand 647 states and 867 transitions. Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:00,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:05:00,111 INFO L93 Difference]: Finished difference Result 1542 states and 2165 transitions. [2021-10-28 09:05:00,111 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 09:05:00,111 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-28 09:05:00,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:05:00,119 INFO L225 Difference]: With dead ends: 1542 [2021-10-28 09:05:00,119 INFO L226 Difference]: Without dead ends: 1162 [2021-10-28 09:05:00,120 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-28 09:05:00,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1162 states. [2021-10-28 09:05:00,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1162 to 653. [2021-10-28 09:05:00,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 653 states, 648 states have (on average 1.3472222222222223) internal successors, (873), 652 states have internal predecessors, (873), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:00,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 653 states to 653 states and 873 transitions. [2021-10-28 09:05:00,200 INFO L78 Accepts]: Start accepts. Automaton has 653 states and 873 transitions. Word has length 78 [2021-10-28 09:05:00,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:05:00,201 INFO L470 AbstractCegarLoop]: Abstraction has 653 states and 873 transitions. [2021-10-28 09:05:00,201 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:00,201 INFO L276 IsEmpty]: Start isEmpty. Operand 653 states and 873 transitions. [2021-10-28 09:05:00,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-28 09:05:00,203 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:05:00,203 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:05:00,203 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-10-28 09:05:00,204 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:05:00,204 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:05:00,204 INFO L85 PathProgramCache]: Analyzing trace with hash 341178161, now seen corresponding path program 1 times [2021-10-28 09:05:00,204 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:05:00,205 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [171495575] [2021-10-28 09:05:00,205 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:00,205 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:05:00,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:00,303 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:00,303 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:05:00,304 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [171495575] [2021-10-28 09:05:00,304 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [171495575] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:05:00,304 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:05:00,304 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:05:00,305 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1335538187] [2021-10-28 09:05:00,306 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:05:00,307 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:05:00,307 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:05:00,308 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:05:00,308 INFO L87 Difference]: Start difference. First operand 653 states and 873 transitions. Second operand has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:00,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:05:00,518 INFO L93 Difference]: Finished difference Result 1511 states and 2028 transitions. [2021-10-28 09:05:00,518 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:05:00,518 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-28 09:05:00,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:05:00,527 INFO L225 Difference]: With dead ends: 1511 [2021-10-28 09:05:00,527 INFO L226 Difference]: Without dead ends: 1107 [2021-10-28 09:05:00,528 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:05:00,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1107 states. [2021-10-28 09:05:00,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1107 to 851. [2021-10-28 09:05:00,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 851 states, 846 states have (on average 1.339243498817967) internal successors, (1133), 850 states have internal predecessors, (1133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:00,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 851 states to 851 states and 1133 transitions. [2021-10-28 09:05:00,682 INFO L78 Accepts]: Start accepts. Automaton has 851 states and 1133 transitions. Word has length 78 [2021-10-28 09:05:00,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:05:00,682 INFO L470 AbstractCegarLoop]: Abstraction has 851 states and 1133 transitions. [2021-10-28 09:05:00,683 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:00,683 INFO L276 IsEmpty]: Start isEmpty. Operand 851 states and 1133 transitions. [2021-10-28 09:05:00,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-28 09:05:00,685 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:05:00,685 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:05:00,685 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-10-28 09:05:00,686 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:05:00,686 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:05:00,687 INFO L85 PathProgramCache]: Analyzing trace with hash -1360037685, now seen corresponding path program 1 times [2021-10-28 09:05:00,687 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:05:00,687 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1924647642] [2021-10-28 09:05:00,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:00,688 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:05:00,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:00,818 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:00,818 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:05:00,818 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1924647642] [2021-10-28 09:05:00,819 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1924647642] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:05:00,819 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:05:00,819 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 09:05:00,819 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1350430147] [2021-10-28 09:05:00,820 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:05:00,820 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:05:00,820 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:05:00,821 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 09:05:00,821 INFO L87 Difference]: Start difference. First operand 851 states and 1133 transitions. Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:01,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:05:01,509 INFO L93 Difference]: Finished difference Result 3248 states and 4372 transitions. [2021-10-28 09:05:01,509 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 09:05:01,510 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-28 09:05:01,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:05:01,527 INFO L225 Difference]: With dead ends: 3248 [2021-10-28 09:05:01,527 INFO L226 Difference]: Without dead ends: 2713 [2021-10-28 09:05:01,530 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-28 09:05:01,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2713 states. [2021-10-28 09:05:01,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2713 to 901. [2021-10-28 09:05:01,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 901 states, 896 states have (on average 1.3359375) internal successors, (1197), 900 states have internal predecessors, (1197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:01,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 901 states to 901 states and 1197 transitions. [2021-10-28 09:05:01,677 INFO L78 Accepts]: Start accepts. Automaton has 901 states and 1197 transitions. Word has length 78 [2021-10-28 09:05:01,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:05:01,678 INFO L470 AbstractCegarLoop]: Abstraction has 901 states and 1197 transitions. [2021-10-28 09:05:01,678 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:01,678 INFO L276 IsEmpty]: Start isEmpty. Operand 901 states and 1197 transitions. [2021-10-28 09:05:01,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2021-10-28 09:05:01,680 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:05:01,680 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:05:01,681 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-10-28 09:05:01,681 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:05:01,681 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:05:01,682 INFO L85 PathProgramCache]: Analyzing trace with hash -504696615, now seen corresponding path program 1 times [2021-10-28 09:05:01,682 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:05:01,682 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [884790815] [2021-10-28 09:05:01,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:01,683 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:05:01,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:01,744 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:01,744 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:05:01,745 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [884790815] [2021-10-28 09:05:01,745 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [884790815] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:05:01,745 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:05:01,745 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:05:01,745 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [735981132] [2021-10-28 09:05:01,746 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:05:01,746 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:05:01,747 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:05:01,748 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:05:01,748 INFO L87 Difference]: Start difference. First operand 901 states and 1197 transitions. Second operand has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:02,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:05:02,073 INFO L93 Difference]: Finished difference Result 2319 states and 3089 transitions. [2021-10-28 09:05:02,073 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:05:02,074 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 79 [2021-10-28 09:05:02,074 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:05:02,085 INFO L225 Difference]: With dead ends: 2319 [2021-10-28 09:05:02,086 INFO L226 Difference]: Without dead ends: 1731 [2021-10-28 09:05:02,087 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:05:02,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1731 states. [2021-10-28 09:05:02,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1731 to 1256. [2021-10-28 09:05:02,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1256 states, 1251 states have (on average 1.3245403677058354) internal successors, (1657), 1255 states have internal predecessors, (1657), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:02,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1256 states to 1256 states and 1657 transitions. [2021-10-28 09:05:02,259 INFO L78 Accepts]: Start accepts. Automaton has 1256 states and 1657 transitions. Word has length 79 [2021-10-28 09:05:02,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:05:02,259 INFO L470 AbstractCegarLoop]: Abstraction has 1256 states and 1657 transitions. [2021-10-28 09:05:02,259 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:02,260 INFO L276 IsEmpty]: Start isEmpty. Operand 1256 states and 1657 transitions. [2021-10-28 09:05:02,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-10-28 09:05:02,262 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:05:02,262 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:05:02,262 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-10-28 09:05:02,263 INFO L402 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:05:02,263 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:05:02,263 INFO L85 PathProgramCache]: Analyzing trace with hash -676572605, now seen corresponding path program 1 times [2021-10-28 09:05:02,264 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:05:02,264 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1925340384] [2021-10-28 09:05:02,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:02,264 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:05:02,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:02,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:02,336 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:05:02,336 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1925340384] [2021-10-28 09:05:02,336 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1925340384] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:05:02,336 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:05:02,337 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:05:02,337 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [245767642] [2021-10-28 09:05:02,337 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:05:02,338 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:05:02,338 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:05:02,338 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:05:02,339 INFO L87 Difference]: Start difference. First operand 1256 states and 1657 transitions. Second operand has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:02,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:05:02,688 INFO L93 Difference]: Finished difference Result 3064 states and 4044 transitions. [2021-10-28 09:05:02,689 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:05:02,689 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-10-28 09:05:02,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:05:02,704 INFO L225 Difference]: With dead ends: 3064 [2021-10-28 09:05:02,704 INFO L226 Difference]: Without dead ends: 2078 [2021-10-28 09:05:02,707 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:05:02,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2078 states. [2021-10-28 09:05:02,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2078 to 1258. [2021-10-28 09:05:02,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1258 states, 1253 states have (on average 1.324022346368715) internal successors, (1659), 1257 states have internal predecessors, (1659), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:02,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1258 states to 1258 states and 1659 transitions. [2021-10-28 09:05:02,914 INFO L78 Accepts]: Start accepts. Automaton has 1258 states and 1659 transitions. Word has length 80 [2021-10-28 09:05:02,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:05:02,915 INFO L470 AbstractCegarLoop]: Abstraction has 1258 states and 1659 transitions. [2021-10-28 09:05:02,915 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:02,915 INFO L276 IsEmpty]: Start isEmpty. Operand 1258 states and 1659 transitions. [2021-10-28 09:05:02,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2021-10-28 09:05:02,919 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:05:02,919 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:05:02,919 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-10-28 09:05:02,919 INFO L402 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:05:02,920 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:05:02,920 INFO L85 PathProgramCache]: Analyzing trace with hash -659983772, now seen corresponding path program 1 times [2021-10-28 09:05:02,921 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:05:02,921 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [545673814] [2021-10-28 09:05:02,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:02,921 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:05:02,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:03,000 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:03,000 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:05:03,000 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [545673814] [2021-10-28 09:05:03,000 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [545673814] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:05:03,001 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:05:03,001 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:05:03,001 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [328901442] [2021-10-28 09:05:03,001 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:05:03,002 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:05:03,002 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:05:03,002 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:05:03,003 INFO L87 Difference]: Start difference. First operand 1258 states and 1659 transitions. Second operand has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:03,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:05:03,262 INFO L93 Difference]: Finished difference Result 2600 states and 3430 transitions. [2021-10-28 09:05:03,263 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:05:03,263 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 81 [2021-10-28 09:05:03,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:05:03,273 INFO L225 Difference]: With dead ends: 2600 [2021-10-28 09:05:03,274 INFO L226 Difference]: Without dead ends: 1418 [2021-10-28 09:05:03,276 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:05:03,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1418 states. [2021-10-28 09:05:03,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1418 to 1055. [2021-10-28 09:05:03,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1055 states, 1050 states have (on average 1.3209523809523809) internal successors, (1387), 1054 states have internal predecessors, (1387), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:03,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1055 states to 1055 states and 1387 transitions. [2021-10-28 09:05:03,475 INFO L78 Accepts]: Start accepts. Automaton has 1055 states and 1387 transitions. Word has length 81 [2021-10-28 09:05:03,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:05:03,475 INFO L470 AbstractCegarLoop]: Abstraction has 1055 states and 1387 transitions. [2021-10-28 09:05:03,476 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:03,476 INFO L276 IsEmpty]: Start isEmpty. Operand 1055 states and 1387 transitions. [2021-10-28 09:05:03,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2021-10-28 09:05:03,478 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:05:03,478 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:05:03,478 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-10-28 09:05:03,479 INFO L402 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:05:03,479 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:05:03,479 INFO L85 PathProgramCache]: Analyzing trace with hash -63459148, now seen corresponding path program 1 times [2021-10-28 09:05:03,480 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:05:03,480 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1796144740] [2021-10-28 09:05:03,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:03,480 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:05:03,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:03,527 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:03,527 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:05:03,527 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1796144740] [2021-10-28 09:05:03,528 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1796144740] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:05:03,528 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:05:03,528 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:05:03,528 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [980439967] [2021-10-28 09:05:03,529 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:05:03,529 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:05:03,529 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:05:03,530 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:05:03,530 INFO L87 Difference]: Start difference. First operand 1055 states and 1387 transitions. Second operand has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:03,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:05:03,858 INFO L93 Difference]: Finished difference Result 2491 states and 3293 transitions. [2021-10-28 09:05:03,859 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:05:03,859 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 82 [2021-10-28 09:05:03,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:05:03,871 INFO L225 Difference]: With dead ends: 2491 [2021-10-28 09:05:03,871 INFO L226 Difference]: Without dead ends: 1585 [2021-10-28 09:05:03,873 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:05:03,876 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1585 states. [2021-10-28 09:05:04,034 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1585 to 1061. [2021-10-28 09:05:04,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1061 states, 1056 states have (on average 1.3191287878787878) internal successors, (1393), 1060 states have internal predecessors, (1393), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:04,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1061 states to 1061 states and 1393 transitions. [2021-10-28 09:05:04,039 INFO L78 Accepts]: Start accepts. Automaton has 1061 states and 1393 transitions. Word has length 82 [2021-10-28 09:05:04,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:05:04,040 INFO L470 AbstractCegarLoop]: Abstraction has 1061 states and 1393 transitions. [2021-10-28 09:05:04,040 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:04,040 INFO L276 IsEmpty]: Start isEmpty. Operand 1061 states and 1393 transitions. [2021-10-28 09:05:04,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2021-10-28 09:05:04,042 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:05:04,042 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:05:04,043 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-10-28 09:05:04,043 INFO L402 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:05:04,043 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:05:04,044 INFO L85 PathProgramCache]: Analyzing trace with hash -753963456, now seen corresponding path program 1 times [2021-10-28 09:05:04,044 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:05:04,044 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [959992006] [2021-10-28 09:05:04,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:04,044 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:05:04,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:04,125 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:04,126 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:05:04,126 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [959992006] [2021-10-28 09:05:04,126 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [959992006] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:05:04,126 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:05:04,127 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:05:04,127 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2105034556] [2021-10-28 09:05:04,127 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:05:04,127 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:05:04,128 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:05:04,128 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:05:04,128 INFO L87 Difference]: Start difference. First operand 1061 states and 1393 transitions. Second operand has 4 states, 4 states have (on average 20.5) internal successors, (82), 4 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:04,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:05:04,351 INFO L93 Difference]: Finished difference Result 2440 states and 3214 transitions. [2021-10-28 09:05:04,352 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:05:04,352 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.5) internal successors, (82), 4 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 82 [2021-10-28 09:05:04,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:05:04,377 INFO L225 Difference]: With dead ends: 2440 [2021-10-28 09:05:04,385 INFO L226 Difference]: Without dead ends: 1478 [2021-10-28 09:05:04,388 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:05:04,390 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1478 states. [2021-10-28 09:05:04,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1478 to 1001. [2021-10-28 09:05:04,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1001 states, 996 states have (on average 1.3142570281124497) internal successors, (1309), 1000 states have internal predecessors, (1309), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:04,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1001 states to 1001 states and 1309 transitions. [2021-10-28 09:05:04,540 INFO L78 Accepts]: Start accepts. Automaton has 1001 states and 1309 transitions. Word has length 82 [2021-10-28 09:05:04,540 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:05:04,541 INFO L470 AbstractCegarLoop]: Abstraction has 1001 states and 1309 transitions. [2021-10-28 09:05:04,541 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.5) internal successors, (82), 4 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:04,541 INFO L276 IsEmpty]: Start isEmpty. Operand 1001 states and 1309 transitions. [2021-10-28 09:05:04,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2021-10-28 09:05:04,545 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:05:04,545 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:05:04,545 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2021-10-28 09:05:04,546 INFO L402 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:05:04,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:05:04,546 INFO L85 PathProgramCache]: Analyzing trace with hash -508619245, now seen corresponding path program 1 times [2021-10-28 09:05:04,547 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:05:04,547 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [748510988] [2021-10-28 09:05:04,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:04,548 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:05:04,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:04,778 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:04,778 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:05:04,778 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [748510988] [2021-10-28 09:05:04,779 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [748510988] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:05:04,779 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1586608408] [2021-10-28 09:05:04,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:04,779 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:05:04,780 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:05:04,788 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:05:04,814 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-10-28 09:05:05,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:05,050 INFO L263 TraceCheckSpWp]: Trace formula consists of 716 conjuncts, 10 conjunts are in the unsatisfiable core [2021-10-28 09:05:05,062 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:05:05,608 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-28 09:05:05,608 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1586608408] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:05:05,608 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-28 09:05:05,609 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2021-10-28 09:05:05,609 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1229371847] [2021-10-28 09:05:05,609 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:05:05,609 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:05:05,610 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:05:05,610 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2021-10-28 09:05:05,610 INFO L87 Difference]: Start difference. First operand 1001 states and 1309 transitions. Second operand has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:06,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:05:06,188 INFO L93 Difference]: Finished difference Result 2598 states and 3526 transitions. [2021-10-28 09:05:06,188 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 09:05:06,189 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 128 [2021-10-28 09:05:06,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:05:06,195 INFO L225 Difference]: With dead ends: 2598 [2021-10-28 09:05:06,195 INFO L226 Difference]: Without dead ends: 1784 [2021-10-28 09:05:06,198 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 125 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2021-10-28 09:05:06,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1784 states. [2021-10-28 09:05:06,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1784 to 1001. [2021-10-28 09:05:06,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1001 states, 996 states have (on average 1.3132530120481927) internal successors, (1308), 1000 states have internal predecessors, (1308), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:06,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1001 states to 1001 states and 1308 transitions. [2021-10-28 09:05:06,482 INFO L78 Accepts]: Start accepts. Automaton has 1001 states and 1308 transitions. Word has length 128 [2021-10-28 09:05:06,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:05:06,483 INFO L470 AbstractCegarLoop]: Abstraction has 1001 states and 1308 transitions. [2021-10-28 09:05:06,483 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:06,483 INFO L276 IsEmpty]: Start isEmpty. Operand 1001 states and 1308 transitions. [2021-10-28 09:05:06,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2021-10-28 09:05:06,487 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:05:06,488 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:05:06,536 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-10-28 09:05:06,714 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2021-10-28 09:05:06,715 INFO L402 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:05:06,715 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:05:06,716 INFO L85 PathProgramCache]: Analyzing trace with hash 1477169230, now seen corresponding path program 1 times [2021-10-28 09:05:06,716 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:05:06,716 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [181620059] [2021-10-28 09:05:06,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:06,716 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:05:06,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:06,933 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:06,933 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:05:06,933 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [181620059] [2021-10-28 09:05:06,935 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [181620059] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:05:06,936 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1139378279] [2021-10-28 09:05:06,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:06,936 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:05:06,937 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:05:06,938 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:05:06,948 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-10-28 09:05:07,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:07,237 INFO L263 TraceCheckSpWp]: Trace formula consists of 730 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-28 09:05:07,245 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:05:07,923 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:07,923 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1139378279] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:05:07,924 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 09:05:07,924 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 13 [2021-10-28 09:05:07,924 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1014912363] [2021-10-28 09:05:07,925 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2021-10-28 09:05:07,925 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:05:07,925 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-10-28 09:05:07,926 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2021-10-28 09:05:07,926 INFO L87 Difference]: Start difference. First operand 1001 states and 1308 transitions. Second operand has 13 states, 13 states have (on average 19.846153846153847) internal successors, (258), 13 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:20,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:05:20,664 INFO L93 Difference]: Finished difference Result 16835 states and 22497 transitions. [2021-10-28 09:05:20,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 242 states. [2021-10-28 09:05:20,664 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 19.846153846153847) internal successors, (258), 13 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 132 [2021-10-28 09:05:20,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:05:20,707 INFO L225 Difference]: With dead ends: 16835 [2021-10-28 09:05:20,707 INFO L226 Difference]: Without dead ends: 16027 [2021-10-28 09:05:20,738 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 475 GetRequests, 224 SyntacticMatches, 0 SemanticMatches, 251 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28995 ImplicationChecksByTransitivity, 6.4s TimeCoverageRelationStatistics Valid=8289, Invalid=55467, Unknown=0, NotChecked=0, Total=63756 [2021-10-28 09:05:20,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16027 states. [2021-10-28 09:05:21,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16027 to 2722. [2021-10-28 09:05:21,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2722 states, 2717 states have (on average 1.3106367316893632) internal successors, (3561), 2721 states have internal predecessors, (3561), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:21,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2722 states to 2722 states and 3561 transitions. [2021-10-28 09:05:21,292 INFO L78 Accepts]: Start accepts. Automaton has 2722 states and 3561 transitions. Word has length 132 [2021-10-28 09:05:21,293 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:05:21,293 INFO L470 AbstractCegarLoop]: Abstraction has 2722 states and 3561 transitions. [2021-10-28 09:05:21,293 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 19.846153846153847) internal successors, (258), 13 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:21,293 INFO L276 IsEmpty]: Start isEmpty. Operand 2722 states and 3561 transitions. [2021-10-28 09:05:21,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2021-10-28 09:05:21,300 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:05:21,301 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:05:21,335 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2021-10-28 09:05:21,514 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2021-10-28 09:05:21,515 INFO L402 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:05:21,516 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:05:21,516 INFO L85 PathProgramCache]: Analyzing trace with hash 199325748, now seen corresponding path program 1 times [2021-10-28 09:05:21,516 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:05:21,517 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1995731317] [2021-10-28 09:05:21,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:21,517 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:05:21,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:21,691 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:21,692 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:05:21,692 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1995731317] [2021-10-28 09:05:21,692 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1995731317] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:05:21,692 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1128790787] [2021-10-28 09:05:21,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:21,693 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:05:21,693 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:05:21,694 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:05:21,720 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-10-28 09:05:21,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:22,001 INFO L263 TraceCheckSpWp]: Trace formula consists of 782 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-28 09:05:22,006 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:05:22,498 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:22,499 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1128790787] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:05:22,499 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 09:05:22,499 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 8 [2021-10-28 09:05:22,499 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [175912059] [2021-10-28 09:05:22,499 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2021-10-28 09:05:22,499 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:05:22,500 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-10-28 09:05:22,500 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2021-10-28 09:05:22,500 INFO L87 Difference]: Start difference. First operand 2722 states and 3561 transitions. Second operand has 8 states, 8 states have (on average 20.125) internal successors, (161), 8 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:24,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:05:24,032 INFO L93 Difference]: Finished difference Result 9813 states and 13401 transitions. [2021-10-28 09:05:24,032 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2021-10-28 09:05:24,032 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 20.125) internal successors, (161), 8 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 133 [2021-10-28 09:05:24,033 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:05:24,049 INFO L225 Difference]: With dead ends: 9813 [2021-10-28 09:05:24,049 INFO L226 Difference]: Without dead ends: 7318 [2021-10-28 09:05:24,056 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 143 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=146, Invalid=360, Unknown=0, NotChecked=0, Total=506 [2021-10-28 09:05:24,065 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7318 states. [2021-10-28 09:05:24,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7318 to 2327. [2021-10-28 09:05:24,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2327 states, 2322 states have (on average 1.313953488372093) internal successors, (3051), 2326 states have internal predecessors, (3051), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:24,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2327 states to 2327 states and 3051 transitions. [2021-10-28 09:05:24,434 INFO L78 Accepts]: Start accepts. Automaton has 2327 states and 3051 transitions. Word has length 133 [2021-10-28 09:05:24,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:05:24,435 INFO L470 AbstractCegarLoop]: Abstraction has 2327 states and 3051 transitions. [2021-10-28 09:05:24,435 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 20.125) internal successors, (161), 8 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:24,435 INFO L276 IsEmpty]: Start isEmpty. Operand 2327 states and 3051 transitions. [2021-10-28 09:05:24,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2021-10-28 09:05:24,441 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:05:24,441 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:05:24,498 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2021-10-28 09:05:24,666 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:05:24,667 INFO L402 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:05:24,667 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:05:24,667 INFO L85 PathProgramCache]: Analyzing trace with hash 99406826, now seen corresponding path program 1 times [2021-10-28 09:05:24,668 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:05:24,668 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1529882178] [2021-10-28 09:05:24,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:24,668 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:05:24,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:24,800 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2021-10-28 09:05:24,801 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:05:24,801 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1529882178] [2021-10-28 09:05:24,801 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1529882178] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:05:24,801 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:05:24,802 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-28 09:05:24,802 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [262212834] [2021-10-28 09:05:24,803 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-28 09:05:24,803 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:05:24,803 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 09:05:24,804 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-10-28 09:05:24,804 INFO L87 Difference]: Start difference. First operand 2327 states and 3051 transitions. Second operand has 7 states, 7 states have (on average 16.571428571428573) internal successors, (116), 7 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:27,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:05:27,027 INFO L93 Difference]: Finished difference Result 13295 states and 17793 transitions. [2021-10-28 09:05:27,028 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-10-28 09:05:27,028 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.571428571428573) internal successors, (116), 7 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 134 [2021-10-28 09:05:27,029 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:05:27,054 INFO L225 Difference]: With dead ends: 13295 [2021-10-28 09:05:27,055 INFO L226 Difference]: Without dead ends: 11215 [2021-10-28 09:05:27,060 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2021-10-28 09:05:27,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11215 states. [2021-10-28 09:05:27,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11215 to 2747. [2021-10-28 09:05:27,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2747 states, 2742 states have (on average 1.2939460247994166) internal successors, (3548), 2746 states have internal predecessors, (3548), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:27,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2747 states to 2747 states and 3548 transitions. [2021-10-28 09:05:27,743 INFO L78 Accepts]: Start accepts. Automaton has 2747 states and 3548 transitions. Word has length 134 [2021-10-28 09:05:27,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:05:27,744 INFO L470 AbstractCegarLoop]: Abstraction has 2747 states and 3548 transitions. [2021-10-28 09:05:27,744 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.571428571428573) internal successors, (116), 7 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:27,745 INFO L276 IsEmpty]: Start isEmpty. Operand 2747 states and 3548 transitions. [2021-10-28 09:05:27,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2021-10-28 09:05:27,754 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:05:27,754 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:05:27,755 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-10-28 09:05:27,755 INFO L402 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:05:27,755 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:05:27,756 INFO L85 PathProgramCache]: Analyzing trace with hash -1092691825, now seen corresponding path program 1 times [2021-10-28 09:05:27,756 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:05:27,756 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1017609842] [2021-10-28 09:05:27,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:27,756 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:05:27,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:27,936 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:27,937 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:05:27,937 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1017609842] [2021-10-28 09:05:27,937 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1017609842] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:05:27,937 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1257451624] [2021-10-28 09:05:27,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:27,938 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:05:27,938 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:05:27,939 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:05:27,962 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-10-28 09:05:28,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:28,279 INFO L263 TraceCheckSpWp]: Trace formula consists of 761 conjuncts, 12 conjunts are in the unsatisfiable core [2021-10-28 09:05:28,282 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:05:28,673 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 14 proven. 1 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2021-10-28 09:05:28,673 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1257451624] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:05:28,673 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 09:05:28,673 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5] total 11 [2021-10-28 09:05:28,674 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1499184389] [2021-10-28 09:05:28,674 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2021-10-28 09:05:28,674 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:05:28,675 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2021-10-28 09:05:28,675 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2021-10-28 09:05:28,675 INFO L87 Difference]: Start difference. First operand 2747 states and 3548 transitions. Second operand has 11 states, 11 states have (on average 21.09090909090909) internal successors, (232), 11 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:30,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:05:30,781 INFO L93 Difference]: Finished difference Result 5998 states and 7876 transitions. [2021-10-28 09:05:30,782 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2021-10-28 09:05:30,782 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 21.09090909090909) internal successors, (232), 11 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 136 [2021-10-28 09:05:30,783 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:05:30,790 INFO L225 Difference]: With dead ends: 5998 [2021-10-28 09:05:30,790 INFO L226 Difference]: Without dead ends: 3346 [2021-10-28 09:05:30,796 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 200 GetRequests, 156 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 621 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=525, Invalid=1545, Unknown=0, NotChecked=0, Total=2070 [2021-10-28 09:05:30,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3346 states. [2021-10-28 09:05:31,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3346 to 1880. [2021-10-28 09:05:31,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1880 states, 1875 states have (on average 1.2816) internal successors, (2403), 1879 states have internal predecessors, (2403), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:31,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1880 states to 1880 states and 2403 transitions. [2021-10-28 09:05:31,096 INFO L78 Accepts]: Start accepts. Automaton has 1880 states and 2403 transitions. Word has length 136 [2021-10-28 09:05:31,097 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:05:31,097 INFO L470 AbstractCegarLoop]: Abstraction has 1880 states and 2403 transitions. [2021-10-28 09:05:31,097 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 21.09090909090909) internal successors, (232), 11 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:31,097 INFO L276 IsEmpty]: Start isEmpty. Operand 1880 states and 2403 transitions. [2021-10-28 09:05:31,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2021-10-28 09:05:31,102 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:05:31,102 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:05:31,143 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2021-10-28 09:05:31,330 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:05:31,331 INFO L402 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:05:31,331 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:05:31,331 INFO L85 PathProgramCache]: Analyzing trace with hash -1966931344, now seen corresponding path program 1 times [2021-10-28 09:05:31,331 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:05:31,331 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1772922828] [2021-10-28 09:05:31,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:31,331 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:05:31,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:31,545 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:31,545 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:05:31,545 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1772922828] [2021-10-28 09:05:31,545 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1772922828] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:05:31,545 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [849319768] [2021-10-28 09:05:31,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:31,546 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:05:31,546 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:05:31,551 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:05:31,570 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-10-28 09:05:31,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:31,978 INFO L263 TraceCheckSpWp]: Trace formula consists of 785 conjuncts, 9 conjunts are in the unsatisfiable core [2021-10-28 09:05:31,982 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:05:32,413 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-28 09:05:32,413 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [849319768] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:05:32,414 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-28 09:05:32,414 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2021-10-28 09:05:32,414 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2093543278] [2021-10-28 09:05:32,414 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:05:32,415 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:05:32,415 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:05:32,415 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=181, Unknown=0, NotChecked=0, Total=210 [2021-10-28 09:05:32,415 INFO L87 Difference]: Start difference. First operand 1880 states and 2403 transitions. Second operand has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:33,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:05:33,360 INFO L93 Difference]: Finished difference Result 5962 states and 7867 transitions. [2021-10-28 09:05:33,360 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 09:05:33,361 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 136 [2021-10-28 09:05:33,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:05:33,372 INFO L225 Difference]: With dead ends: 5962 [2021-10-28 09:05:33,373 INFO L226 Difference]: Without dead ends: 4237 [2021-10-28 09:05:33,376 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 133 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=294, Unknown=0, NotChecked=0, Total=342 [2021-10-28 09:05:33,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4237 states. [2021-10-28 09:05:33,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4237 to 1880. [2021-10-28 09:05:33,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1880 states, 1875 states have (on average 1.28) internal successors, (2400), 1879 states have internal predecessors, (2400), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:33,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1880 states to 1880 states and 2400 transitions. [2021-10-28 09:05:33,793 INFO L78 Accepts]: Start accepts. Automaton has 1880 states and 2400 transitions. Word has length 136 [2021-10-28 09:05:33,794 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:05:33,794 INFO L470 AbstractCegarLoop]: Abstraction has 1880 states and 2400 transitions. [2021-10-28 09:05:33,794 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:33,794 INFO L276 IsEmpty]: Start isEmpty. Operand 1880 states and 2400 transitions. [2021-10-28 09:05:33,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-10-28 09:05:33,798 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:05:33,798 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:05:33,841 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2021-10-28 09:05:34,026 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:05:34,027 INFO L402 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:05:34,027 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:05:34,027 INFO L85 PathProgramCache]: Analyzing trace with hash 2092133653, now seen corresponding path program 1 times [2021-10-28 09:05:34,027 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:05:34,027 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [329232526] [2021-10-28 09:05:34,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:34,028 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:05:34,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:34,283 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:34,283 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:05:34,284 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [329232526] [2021-10-28 09:05:34,284 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [329232526] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:05:34,284 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1059075091] [2021-10-28 09:05:34,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:34,284 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:05:34,284 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:05:34,286 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:05:34,306 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2021-10-28 09:05:34,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:34,816 INFO L263 TraceCheckSpWp]: Trace formula consists of 798 conjuncts, 10 conjunts are in the unsatisfiable core [2021-10-28 09:05:34,821 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:05:35,395 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-28 09:05:35,396 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1059075091] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:05:35,396 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-28 09:05:35,396 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2021-10-28 09:05:35,397 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [667675628] [2021-10-28 09:05:35,398 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:05:35,398 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:05:35,401 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:05:35,402 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=181, Unknown=0, NotChecked=0, Total=210 [2021-10-28 09:05:35,402 INFO L87 Difference]: Start difference. First operand 1880 states and 2400 transitions. Second operand has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:36,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:05:36,247 INFO L93 Difference]: Finished difference Result 5402 states and 7038 transitions. [2021-10-28 09:05:36,247 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 09:05:36,247 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-10-28 09:05:36,248 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:05:36,255 INFO L225 Difference]: With dead ends: 5402 [2021-10-28 09:05:36,255 INFO L226 Difference]: Without dead ends: 3677 [2021-10-28 09:05:36,259 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 137 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=53, Invalid=327, Unknown=0, NotChecked=0, Total=380 [2021-10-28 09:05:36,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3677 states. [2021-10-28 09:05:36,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3677 to 1880. [2021-10-28 09:05:36,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1880 states, 1875 states have (on average 1.2784) internal successors, (2397), 1879 states have internal predecessors, (2397), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:36,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1880 states to 1880 states and 2397 transitions. [2021-10-28 09:05:36,621 INFO L78 Accepts]: Start accepts. Automaton has 1880 states and 2397 transitions. Word has length 140 [2021-10-28 09:05:36,621 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:05:36,622 INFO L470 AbstractCegarLoop]: Abstraction has 1880 states and 2397 transitions. [2021-10-28 09:05:36,622 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:36,622 INFO L276 IsEmpty]: Start isEmpty. Operand 1880 states and 2397 transitions. [2021-10-28 09:05:36,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2021-10-28 09:05:36,626 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:05:36,626 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:05:36,657 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2021-10-28 09:05:36,826 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:05:36,827 INFO L402 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:05:36,827 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:05:36,827 INFO L85 PathProgramCache]: Analyzing trace with hash -1655490771, now seen corresponding path program 1 times [2021-10-28 09:05:36,827 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:05:36,828 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [9338654] [2021-10-28 09:05:36,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:36,828 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:05:36,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:37,046 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:37,047 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:05:37,047 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [9338654] [2021-10-28 09:05:37,047 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [9338654] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:05:37,047 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [701405057] [2021-10-28 09:05:37,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:37,047 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:05:37,048 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:05:37,048 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:05:37,054 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2021-10-28 09:05:37,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:37,534 INFO L263 TraceCheckSpWp]: Trace formula consists of 810 conjuncts, 22 conjunts are in the unsatisfiable core [2021-10-28 09:05:37,539 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:05:38,629 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:38,630 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [701405057] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:05:38,630 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 09:05:38,630 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 15 [2021-10-28 09:05:38,631 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1217677017] [2021-10-28 09:05:38,632 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2021-10-28 09:05:38,632 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:05:38,632 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2021-10-28 09:05:38,633 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2021-10-28 09:05:38,633 INFO L87 Difference]: Start difference. First operand 1880 states and 2397 transitions. Second operand has 16 states, 16 states have (on average 12.9375) internal successors, (207), 15 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:40,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:05:40,707 INFO L93 Difference]: Finished difference Result 5230 states and 6700 transitions. [2021-10-28 09:05:40,707 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2021-10-28 09:05:40,708 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 12.9375) internal successors, (207), 15 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2021-10-28 09:05:40,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:05:40,714 INFO L225 Difference]: With dead ends: 5230 [2021-10-28 09:05:40,714 INFO L226 Difference]: Without dead ends: 3545 [2021-10-28 09:05:40,718 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 173 GetRequests, 136 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 265 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=267, Invalid=1065, Unknown=0, NotChecked=0, Total=1332 [2021-10-28 09:05:40,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3545 states. [2021-10-28 09:05:41,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3545 to 2122. [2021-10-28 09:05:41,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2122 states, 2117 states have (on average 1.274444969296174) internal successors, (2698), 2121 states have internal predecessors, (2698), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:41,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2122 states to 2122 states and 2698 transitions. [2021-10-28 09:05:41,152 INFO L78 Accepts]: Start accepts. Automaton has 2122 states and 2698 transitions. Word has length 143 [2021-10-28 09:05:41,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:05:41,153 INFO L470 AbstractCegarLoop]: Abstraction has 2122 states and 2698 transitions. [2021-10-28 09:05:41,153 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 12.9375) internal successors, (207), 15 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:41,153 INFO L276 IsEmpty]: Start isEmpty. Operand 2122 states and 2698 transitions. [2021-10-28 09:05:41,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2021-10-28 09:05:41,158 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:05:41,159 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:05:41,187 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2021-10-28 09:05:41,360 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable34 [2021-10-28 09:05:41,360 INFO L402 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:05:41,361 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:05:41,361 INFO L85 PathProgramCache]: Analyzing trace with hash 508125803, now seen corresponding path program 1 times [2021-10-28 09:05:41,361 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:05:41,361 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [300919867] [2021-10-28 09:05:41,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:41,361 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:05:41,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:41,469 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2021-10-28 09:05:41,469 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:05:41,469 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [300919867] [2021-10-28 09:05:41,470 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [300919867] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:05:41,470 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:05:41,470 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:05:41,470 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1450496575] [2021-10-28 09:05:41,471 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 09:05:41,471 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:05:41,472 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 09:05:41,472 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:05:41,473 INFO L87 Difference]: Start difference. First operand 2122 states and 2698 transitions. Second operand has 5 states, 5 states have (on average 24.8) internal successors, (124), 4 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:41,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:05:41,970 INFO L93 Difference]: Finished difference Result 3982 states and 5104 transitions. [2021-10-28 09:05:41,970 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:05:41,971 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.8) internal successors, (124), 4 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2021-10-28 09:05:41,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:05:41,973 INFO L225 Difference]: With dead ends: 3982 [2021-10-28 09:05:41,974 INFO L226 Difference]: Without dead ends: 1994 [2021-10-28 09:05:41,977 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:05:41,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1994 states. [2021-10-28 09:05:42,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1994 to 1994. [2021-10-28 09:05:42,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1994 states, 1989 states have (on average 1.278531925590749) internal successors, (2543), 1993 states have internal predecessors, (2543), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:42,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1994 states to 1994 states and 2543 transitions. [2021-10-28 09:05:42,324 INFO L78 Accepts]: Start accepts. Automaton has 1994 states and 2543 transitions. Word has length 143 [2021-10-28 09:05:42,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:05:42,325 INFO L470 AbstractCegarLoop]: Abstraction has 1994 states and 2543 transitions. [2021-10-28 09:05:42,325 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.8) internal successors, (124), 4 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:42,325 INFO L276 IsEmpty]: Start isEmpty. Operand 1994 states and 2543 transitions. [2021-10-28 09:05:42,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-28 09:05:42,328 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:05:42,329 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:05:42,329 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2021-10-28 09:05:42,329 INFO L402 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:05:42,329 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:05:42,330 INFO L85 PathProgramCache]: Analyzing trace with hash -529555049, now seen corresponding path program 1 times [2021-10-28 09:05:42,330 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:05:42,330 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1869454778] [2021-10-28 09:05:42,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:42,330 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:05:42,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:42,546 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 31 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:42,546 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:05:42,547 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1869454778] [2021-10-28 09:05:42,547 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1869454778] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:05:42,547 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [482989212] [2021-10-28 09:05:42,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:42,548 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:05:42,548 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:05:42,549 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:05:42,562 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2021-10-28 09:05:43,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:43,161 INFO L263 TraceCheckSpWp]: Trace formula consists of 811 conjuncts, 24 conjunts are in the unsatisfiable core [2021-10-28 09:05:43,165 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:05:44,191 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 31 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:44,192 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [482989212] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:05:44,192 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 09:05:44,192 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 15 [2021-10-28 09:05:44,193 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2058508986] [2021-10-28 09:05:44,193 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2021-10-28 09:05:44,194 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:05:44,194 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2021-10-28 09:05:44,194 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2021-10-28 09:05:44,195 INFO L87 Difference]: Start difference. First operand 1994 states and 2543 transitions. Second operand has 16 states, 16 states have (on average 13.375) internal successors, (214), 15 states have internal predecessors, (214), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:46,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:05:46,839 INFO L93 Difference]: Finished difference Result 6387 states and 8158 transitions. [2021-10-28 09:05:46,839 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2021-10-28 09:05:46,839 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 13.375) internal successors, (214), 15 states have internal predecessors, (214), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-28 09:05:46,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:05:46,844 INFO L225 Difference]: With dead ends: 6387 [2021-10-28 09:05:46,844 INFO L226 Difference]: Without dead ends: 4588 [2021-10-28 09:05:46,848 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 189 GetRequests, 137 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 645 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=548, Invalid=2104, Unknown=0, NotChecked=0, Total=2652 [2021-10-28 09:05:46,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4588 states. [2021-10-28 09:05:47,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4588 to 2272. [2021-10-28 09:05:47,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2272 states, 2267 states have (on average 1.27437141596824) internal successors, (2889), 2271 states have internal predecessors, (2889), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:47,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2272 states to 2272 states and 2889 transitions. [2021-10-28 09:05:47,502 INFO L78 Accepts]: Start accepts. Automaton has 2272 states and 2889 transitions. Word has length 144 [2021-10-28 09:05:47,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:05:47,503 INFO L470 AbstractCegarLoop]: Abstraction has 2272 states and 2889 transitions. [2021-10-28 09:05:47,503 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 13.375) internal successors, (214), 15 states have internal predecessors, (214), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:47,503 INFO L276 IsEmpty]: Start isEmpty. Operand 2272 states and 2889 transitions. [2021-10-28 09:05:47,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-28 09:05:47,507 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:05:47,508 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:05:47,548 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2021-10-28 09:05:47,722 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable36 [2021-10-28 09:05:47,723 INFO L402 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:05:47,723 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:05:47,723 INFO L85 PathProgramCache]: Analyzing trace with hash -1568139623, now seen corresponding path program 1 times [2021-10-28 09:05:47,723 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:05:47,723 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1745960962] [2021-10-28 09:05:47,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:47,724 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:05:47,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:47,809 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2021-10-28 09:05:47,810 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:05:47,810 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1745960962] [2021-10-28 09:05:47,811 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1745960962] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:05:47,811 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:05:47,811 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:05:47,811 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1339800777] [2021-10-28 09:05:47,813 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:05:47,813 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:05:47,813 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:05:47,813 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:05:47,814 INFO L87 Difference]: Start difference. First operand 2272 states and 2889 transitions. Second operand has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:48,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:05:48,275 INFO L93 Difference]: Finished difference Result 4197 states and 5372 transitions. [2021-10-28 09:05:48,275 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 09:05:48,275 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-28 09:05:48,276 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:05:48,278 INFO L225 Difference]: With dead ends: 4197 [2021-10-28 09:05:48,278 INFO L226 Difference]: Without dead ends: 2061 [2021-10-28 09:05:48,281 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:05:48,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2061 states. [2021-10-28 09:05:48,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2061 to 2053. [2021-10-28 09:05:48,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2053 states, 2048 states have (on average 1.27197265625) internal successors, (2605), 2052 states have internal predecessors, (2605), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:48,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2053 states to 2053 states and 2605 transitions. [2021-10-28 09:05:48,741 INFO L78 Accepts]: Start accepts. Automaton has 2053 states and 2605 transitions. Word has length 144 [2021-10-28 09:05:48,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:05:48,742 INFO L470 AbstractCegarLoop]: Abstraction has 2053 states and 2605 transitions. [2021-10-28 09:05:48,742 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:48,742 INFO L276 IsEmpty]: Start isEmpty. Operand 2053 states and 2605 transitions. [2021-10-28 09:05:48,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-28 09:05:48,746 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:05:48,746 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:05:48,747 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2021-10-28 09:05:48,747 INFO L402 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:05:48,747 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:05:48,748 INFO L85 PathProgramCache]: Analyzing trace with hash -1816010656, now seen corresponding path program 1 times [2021-10-28 09:05:48,748 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:05:48,748 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [474633860] [2021-10-28 09:05:48,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:48,749 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:05:48,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:48,849 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2021-10-28 09:05:48,849 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:05:48,849 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [474633860] [2021-10-28 09:05:48,849 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [474633860] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:05:48,850 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:05:48,850 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 09:05:48,850 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1695586088] [2021-10-28 09:05:48,851 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:05:48,851 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:05:48,851 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:05:48,852 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 09:05:48,852 INFO L87 Difference]: Start difference. First operand 2053 states and 2605 transitions. Second operand has 6 states, 6 states have (on average 19.833333333333332) internal successors, (119), 6 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:50,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:05:50,353 INFO L93 Difference]: Finished difference Result 9022 states and 11736 transitions. [2021-10-28 09:05:50,354 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2021-10-28 09:05:50,354 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 19.833333333333332) internal successors, (119), 6 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-28 09:05:50,354 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:05:50,360 INFO L225 Difference]: With dead ends: 9022 [2021-10-28 09:05:50,360 INFO L226 Difference]: Without dead ends: 7164 [2021-10-28 09:05:50,362 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2021-10-28 09:05:50,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7164 states. [2021-10-28 09:05:50,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7164 to 2406. [2021-10-28 09:05:50,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2406 states, 2401 states have (on average 1.2573927530195752) internal successors, (3019), 2405 states have internal predecessors, (3019), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:50,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2406 states to 2406 states and 3019 transitions. [2021-10-28 09:05:50,831 INFO L78 Accepts]: Start accepts. Automaton has 2406 states and 3019 transitions. Word has length 144 [2021-10-28 09:05:50,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:05:50,831 INFO L470 AbstractCegarLoop]: Abstraction has 2406 states and 3019 transitions. [2021-10-28 09:05:50,831 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 19.833333333333332) internal successors, (119), 6 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:50,831 INFO L276 IsEmpty]: Start isEmpty. Operand 2406 states and 3019 transitions. [2021-10-28 09:05:50,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2021-10-28 09:05:50,834 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:05:50,834 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:05:50,834 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2021-10-28 09:05:50,834 INFO L402 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:05:50,835 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:05:50,835 INFO L85 PathProgramCache]: Analyzing trace with hash -922037262, now seen corresponding path program 1 times [2021-10-28 09:05:50,835 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:05:50,835 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [173517600] [2021-10-28 09:05:50,835 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:50,835 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:05:50,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:51,068 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 17 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:51,068 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:05:51,068 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [173517600] [2021-10-28 09:05:51,068 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [173517600] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:05:51,069 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1341258497] [2021-10-28 09:05:51,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:51,069 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:05:51,069 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:05:51,074 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:05:51,095 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2021-10-28 09:05:51,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:51,789 INFO L263 TraceCheckSpWp]: Trace formula consists of 812 conjuncts, 15 conjunts are in the unsatisfiable core [2021-10-28 09:05:51,792 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:05:52,870 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 17 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:52,871 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1341258497] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:05:52,871 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 09:05:52,871 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6] total 9 [2021-10-28 09:05:52,871 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1512398751] [2021-10-28 09:05:52,871 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2021-10-28 09:05:52,872 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:05:52,872 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2021-10-28 09:05:52,872 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2021-10-28 09:05:52,873 INFO L87 Difference]: Start difference. First operand 2406 states and 3019 transitions. Second operand has 10 states, 10 states have (on average 23.6) internal successors, (236), 9 states have internal predecessors, (236), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:53,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:05:53,919 INFO L93 Difference]: Finished difference Result 5572 states and 7059 transitions. [2021-10-28 09:05:53,919 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2021-10-28 09:05:53,920 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 23.6) internal successors, (236), 9 states have internal predecessors, (236), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 145 [2021-10-28 09:05:53,920 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:05:53,923 INFO L225 Difference]: With dead ends: 5572 [2021-10-28 09:05:53,923 INFO L226 Difference]: Without dead ends: 3361 [2021-10-28 09:05:53,926 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 139 SyntacticMatches, 4 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=100, Invalid=206, Unknown=0, NotChecked=0, Total=306 [2021-10-28 09:05:53,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3361 states. [2021-10-28 09:05:54,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3361 to 2406. [2021-10-28 09:05:54,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2406 states, 2401 states have (on average 1.252811328613078) internal successors, (3008), 2405 states have internal predecessors, (3008), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:54,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2406 states to 2406 states and 3008 transitions. [2021-10-28 09:05:54,272 INFO L78 Accepts]: Start accepts. Automaton has 2406 states and 3008 transitions. Word has length 145 [2021-10-28 09:05:54,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:05:54,272 INFO L470 AbstractCegarLoop]: Abstraction has 2406 states and 3008 transitions. [2021-10-28 09:05:54,272 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 23.6) internal successors, (236), 9 states have internal predecessors, (236), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:54,272 INFO L276 IsEmpty]: Start isEmpty. Operand 2406 states and 3008 transitions. [2021-10-28 09:05:54,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2021-10-28 09:05:54,275 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:05:54,275 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:05:54,299 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2021-10-28 09:05:54,477 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable39 [2021-10-28 09:05:54,478 INFO L402 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:05:54,478 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:05:54,478 INFO L85 PathProgramCache]: Analyzing trace with hash -1375736921, now seen corresponding path program 1 times [2021-10-28 09:05:54,478 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:05:54,479 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [19971244] [2021-10-28 09:05:54,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:54,479 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:05:54,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:54,575 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:54,575 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:05:54,575 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [19971244] [2021-10-28 09:05:54,575 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [19971244] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:05:54,576 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2085350966] [2021-10-28 09:05:54,576 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:54,576 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:05:54,576 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:05:54,579 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:05:54,598 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2021-10-28 09:05:55,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:55,388 INFO L263 TraceCheckSpWp]: Trace formula consists of 810 conjuncts, 6 conjunts are in the unsatisfiable core [2021-10-28 09:05:55,391 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:05:55,769 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:55,769 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2085350966] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:05:55,769 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 09:05:55,769 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2021-10-28 09:05:55,769 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1624846828] [2021-10-28 09:05:55,770 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-28 09:05:55,770 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:05:55,770 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 09:05:55,770 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-10-28 09:05:55,771 INFO L87 Difference]: Start difference. First operand 2406 states and 3008 transitions. Second operand has 7 states, 7 states have (on average 20.714285714285715) internal successors, (145), 7 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:56,854 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:05:56,855 INFO L93 Difference]: Finished difference Result 8321 states and 10665 transitions. [2021-10-28 09:05:56,855 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2021-10-28 09:05:56,855 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 20.714285714285715) internal successors, (145), 7 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 145 [2021-10-28 09:05:56,855 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:05:56,862 INFO L225 Difference]: With dead ends: 8321 [2021-10-28 09:05:56,862 INFO L226 Difference]: Without dead ends: 6110 [2021-10-28 09:05:56,866 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 147 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=194, Unknown=0, NotChecked=0, Total=272 [2021-10-28 09:05:56,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6110 states. [2021-10-28 09:05:57,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6110 to 4184. [2021-10-28 09:05:57,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4184 states, 4179 states have (on average 1.2498205312275663) internal successors, (5223), 4183 states have internal predecessors, (5223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:57,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4184 states to 4184 states and 5223 transitions. [2021-10-28 09:05:57,549 INFO L78 Accepts]: Start accepts. Automaton has 4184 states and 5223 transitions. Word has length 145 [2021-10-28 09:05:57,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:05:57,549 INFO L470 AbstractCegarLoop]: Abstraction has 4184 states and 5223 transitions. [2021-10-28 09:05:57,549 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 20.714285714285715) internal successors, (145), 7 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:05:57,549 INFO L276 IsEmpty]: Start isEmpty. Operand 4184 states and 5223 transitions. [2021-10-28 09:05:57,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2021-10-28 09:05:57,552 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:05:57,552 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:05:57,575 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2021-10-28 09:05:57,752 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:05:57,753 INFO L402 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:05:57,753 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:05:57,753 INFO L85 PathProgramCache]: Analyzing trace with hash -415965278, now seen corresponding path program 1 times [2021-10-28 09:05:57,753 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:05:57,754 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [898169248] [2021-10-28 09:05:57,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:57,754 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:05:57,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:57,955 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 45 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:05:57,956 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:05:57,956 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [898169248] [2021-10-28 09:05:57,956 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [898169248] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:05:57,956 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [814952884] [2021-10-28 09:05:57,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:05:57,957 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:05:57,957 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:05:57,958 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:05:57,964 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2021-10-28 09:05:58,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:05:58,655 INFO L263 TraceCheckSpWp]: Trace formula consists of 821 conjuncts, 12 conjunts are in the unsatisfiable core [2021-10-28 09:05:58,657 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:05:58,991 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2021-10-28 09:05:58,991 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [814952884] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:05:58,991 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-28 09:05:58,991 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2021-10-28 09:05:58,992 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2105864259] [2021-10-28 09:05:58,992 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:05:58,992 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:05:58,992 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:05:58,993 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2021-10-28 09:05:58,993 INFO L87 Difference]: Start difference. First operand 4184 states and 5223 transitions. Second operand has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:06:00,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:06:00,054 INFO L93 Difference]: Finished difference Result 9281 states and 11744 transitions. [2021-10-28 09:06:00,054 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 09:06:00,056 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 145 [2021-10-28 09:06:00,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:06:00,061 INFO L225 Difference]: With dead ends: 9281 [2021-10-28 09:06:00,061 INFO L226 Difference]: Without dead ends: 5931 [2021-10-28 09:06:00,065 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 145 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=76, Invalid=386, Unknown=0, NotChecked=0, Total=462 [2021-10-28 09:06:00,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5931 states. [2021-10-28 09:06:00,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5931 to 4184. [2021-10-28 09:06:00,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4184 states, 4179 states have (on average 1.2335486958602537) internal successors, (5155), 4183 states have internal predecessors, (5155), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:06:00,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4184 states to 4184 states and 5155 transitions. [2021-10-28 09:06:00,735 INFO L78 Accepts]: Start accepts. Automaton has 4184 states and 5155 transitions. Word has length 145 [2021-10-28 09:06:00,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:06:00,735 INFO L470 AbstractCegarLoop]: Abstraction has 4184 states and 5155 transitions. [2021-10-28 09:06:00,735 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:06:00,735 INFO L276 IsEmpty]: Start isEmpty. Operand 4184 states and 5155 transitions. [2021-10-28 09:06:00,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2021-10-28 09:06:00,739 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:06:00,739 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:06:00,786 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2021-10-28 09:06:00,954 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable41 [2021-10-28 09:06:00,955 INFO L402 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:06:00,955 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:06:00,955 INFO L85 PathProgramCache]: Analyzing trace with hash -601450378, now seen corresponding path program 1 times [2021-10-28 09:06:00,955 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:06:00,955 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1803000635] [2021-10-28 09:06:00,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:06:00,955 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:06:01,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:06:01,072 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 26 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:06:01,073 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:06:01,073 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1803000635] [2021-10-28 09:06:01,073 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1803000635] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:06:01,073 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1659671914] [2021-10-28 09:06:01,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:06:01,074 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:06:01,074 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:06:01,075 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:06:01,079 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2021-10-28 09:06:01,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:06:01,872 INFO L263 TraceCheckSpWp]: Trace formula consists of 814 conjuncts, 19 conjunts are in the unsatisfiable core [2021-10-28 09:06:01,877 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:06:02,309 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 26 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:06:02,309 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1659671914] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:06:02,309 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 09:06:02,310 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8] total 8 [2021-10-28 09:06:02,310 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1326563712] [2021-10-28 09:06:02,311 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2021-10-28 09:06:02,311 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:06:02,312 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-10-28 09:06:02,313 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2021-10-28 09:06:02,314 INFO L87 Difference]: Start difference. First operand 4184 states and 5155 transitions. Second operand has 8 states, 8 states have (on average 18.5) internal successors, (148), 8 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:06:04,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:06:04,852 INFO L93 Difference]: Finished difference Result 14982 states and 18477 transitions. [2021-10-28 09:06:04,852 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2021-10-28 09:06:04,852 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 18.5) internal successors, (148), 8 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 146 [2021-10-28 09:06:04,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:06:04,863 INFO L225 Difference]: With dead ends: 14982 [2021-10-28 09:06:04,863 INFO L226 Difference]: Without dead ends: 11801 [2021-10-28 09:06:04,867 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 172 GetRequests, 150 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=129, Invalid=423, Unknown=0, NotChecked=0, Total=552 [2021-10-28 09:06:04,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11801 states. [2021-10-28 09:06:06,034 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11801 to 6811. [2021-10-28 09:06:06,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6811 states, 6806 states have (on average 1.237878342638848) internal successors, (8425), 6810 states have internal predecessors, (8425), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:06:06,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6811 states to 6811 states and 8425 transitions. [2021-10-28 09:06:06,051 INFO L78 Accepts]: Start accepts. Automaton has 6811 states and 8425 transitions. Word has length 146 [2021-10-28 09:06:06,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:06:06,052 INFO L470 AbstractCegarLoop]: Abstraction has 6811 states and 8425 transitions. [2021-10-28 09:06:06,052 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 18.5) internal successors, (148), 8 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:06:06,052 INFO L276 IsEmpty]: Start isEmpty. Operand 6811 states and 8425 transitions. [2021-10-28 09:06:06,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2021-10-28 09:06:06,058 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:06:06,059 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:06:06,095 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2021-10-28 09:06:06,286 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable42 [2021-10-28 09:06:06,287 INFO L402 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:06:06,287 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:06:06,287 INFO L85 PathProgramCache]: Analyzing trace with hash -1640034952, now seen corresponding path program 1 times [2021-10-28 09:06:06,287 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:06:06,287 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1050539425] [2021-10-28 09:06:06,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:06:06,287 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:06:06,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:06:06,344 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-10-28 09:06:06,345 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:06:06,345 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1050539425] [2021-10-28 09:06:06,345 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1050539425] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:06:06,345 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:06:06,345 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:06:06,346 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [649377284] [2021-10-28 09:06:06,346 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:06:06,346 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:06:06,347 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:06:06,347 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:06:06,347 INFO L87 Difference]: Start difference. First operand 6811 states and 8425 transitions. Second operand has 4 states, 4 states have (on average 31.25) internal successors, (125), 4 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:06:07,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:06:07,483 INFO L93 Difference]: Finished difference Result 11214 states and 13923 transitions. [2021-10-28 09:06:07,484 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 09:06:07,484 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 31.25) internal successors, (125), 4 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 146 [2021-10-28 09:06:07,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:06:07,488 INFO L225 Difference]: With dead ends: 11214 [2021-10-28 09:06:07,488 INFO L226 Difference]: Without dead ends: 4986 [2021-10-28 09:06:07,494 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:06:07,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4986 states. [2021-10-28 09:06:08,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4986 to 4960. [2021-10-28 09:06:08,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4960 states, 4955 states have (on average 1.239556004036327) internal successors, (6142), 4959 states have internal predecessors, (6142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:06:08,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4960 states to 4960 states and 6142 transitions. [2021-10-28 09:06:08,333 INFO L78 Accepts]: Start accepts. Automaton has 4960 states and 6142 transitions. Word has length 146 [2021-10-28 09:06:08,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:06:08,333 INFO L470 AbstractCegarLoop]: Abstraction has 4960 states and 6142 transitions. [2021-10-28 09:06:08,333 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 31.25) internal successors, (125), 4 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:06:08,333 INFO L276 IsEmpty]: Start isEmpty. Operand 4960 states and 6142 transitions. [2021-10-28 09:06:08,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2021-10-28 09:06:08,336 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:06:08,336 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:06:08,336 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2021-10-28 09:06:08,336 INFO L402 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:06:08,337 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:06:08,337 INFO L85 PathProgramCache]: Analyzing trace with hash -1660310691, now seen corresponding path program 1 times [2021-10-28 09:06:08,337 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:06:08,337 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [491815411] [2021-10-28 09:06:08,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:06:08,337 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:06:08,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:06:08,529 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 45 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:06:08,529 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:06:08,529 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [491815411] [2021-10-28 09:06:08,530 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [491815411] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:06:08,530 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [85072390] [2021-10-28 09:06:08,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:06:08,530 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:06:08,530 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:06:08,535 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:06:08,540 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2021-10-28 09:06:09,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:06:09,477 INFO L263 TraceCheckSpWp]: Trace formula consists of 834 conjuncts, 8 conjunts are in the unsatisfiable core [2021-10-28 09:06:09,479 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:06:09,852 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2021-10-28 09:06:09,852 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [85072390] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:06:09,853 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-28 09:06:09,853 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2021-10-28 09:06:09,853 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1877631731] [2021-10-28 09:06:09,853 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:06:09,854 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:06:09,854 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:06:09,854 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2021-10-28 09:06:09,854 INFO L87 Difference]: Start difference. First operand 4960 states and 6142 transitions. Second operand has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:06:11,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:06:11,626 INFO L93 Difference]: Finished difference Result 12895 states and 16091 transitions. [2021-10-28 09:06:11,626 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 09:06:11,626 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 149 [2021-10-28 09:06:11,627 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:06:11,637 INFO L225 Difference]: With dead ends: 12895 [2021-10-28 09:06:11,637 INFO L226 Difference]: Without dead ends: 8622 [2021-10-28 09:06:11,643 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 146 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=325, Unknown=0, NotChecked=0, Total=380 [2021-10-28 09:06:11,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8622 states. [2021-10-28 09:06:12,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8622 to 4960. [2021-10-28 09:06:12,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4960 states, 4955 states have (on average 1.2391523713420787) internal successors, (6140), 4959 states have internal predecessors, (6140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:06:12,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4960 states to 4960 states and 6140 transitions. [2021-10-28 09:06:12,503 INFO L78 Accepts]: Start accepts. Automaton has 4960 states and 6140 transitions. Word has length 149 [2021-10-28 09:06:12,504 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:06:12,504 INFO L470 AbstractCegarLoop]: Abstraction has 4960 states and 6140 transitions. [2021-10-28 09:06:12,504 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:06:12,504 INFO L276 IsEmpty]: Start isEmpty. Operand 4960 states and 6140 transitions. [2021-10-28 09:06:12,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2021-10-28 09:06:12,508 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:06:12,509 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:06:12,541 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2021-10-28 09:06:12,722 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44,14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:06:12,723 INFO L402 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:06:12,723 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:06:12,723 INFO L85 PathProgramCache]: Analyzing trace with hash -2043778853, now seen corresponding path program 1 times [2021-10-28 09:06:12,723 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:06:12,723 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [921662992] [2021-10-28 09:06:12,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:06:12,723 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:06:12,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:06:12,842 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2021-10-28 09:06:12,842 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:06:12,842 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [921662992] [2021-10-28 09:06:12,842 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [921662992] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:06:12,843 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:06:12,843 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 09:06:12,843 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [983785765] [2021-10-28 09:06:12,845 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 09:06:12,845 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:06:12,845 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 09:06:12,845 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 09:06:12,846 INFO L87 Difference]: Start difference. First operand 4960 states and 6140 transitions. Second operand has 6 states, 6 states have (on average 24.0) internal successors, (144), 6 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:06:14,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:06:14,982 INFO L93 Difference]: Finished difference Result 12708 states and 15969 transitions. [2021-10-28 09:06:14,984 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 09:06:14,984 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 24.0) internal successors, (144), 6 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 150 [2021-10-28 09:06:14,984 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:06:14,993 INFO L225 Difference]: With dead ends: 12708 [2021-10-28 09:06:14,993 INFO L226 Difference]: Without dead ends: 9846 [2021-10-28 09:06:14,998 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-28 09:06:15,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9846 states. [2021-10-28 09:06:15,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9846 to 5071. [2021-10-28 09:06:15,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5071 states, 5066 states have (on average 1.2376628503750493) internal successors, (6270), 5070 states have internal predecessors, (6270), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:06:15,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5071 states to 5071 states and 6270 transitions. [2021-10-28 09:06:15,888 INFO L78 Accepts]: Start accepts. Automaton has 5071 states and 6270 transitions. Word has length 150 [2021-10-28 09:06:15,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:06:15,889 INFO L470 AbstractCegarLoop]: Abstraction has 5071 states and 6270 transitions. [2021-10-28 09:06:15,889 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 24.0) internal successors, (144), 6 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:06:15,889 INFO L276 IsEmpty]: Start isEmpty. Operand 5071 states and 6270 transitions. [2021-10-28 09:06:15,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2021-10-28 09:06:15,891 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:06:15,892 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:06:15,892 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2021-10-28 09:06:15,892 INFO L402 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 09:06:15,892 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:06:15,892 INFO L85 PathProgramCache]: Analyzing trace with hash 1490980259, now seen corresponding path program 1 times [2021-10-28 09:06:15,892 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:06:15,892 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [950943135] [2021-10-28 09:06:15,892 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:06:15,892 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:06:15,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:06:15,947 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:06:16,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:06:16,138 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:06:16,138 INFO L627 BasicCegarLoop]: Counterexample is feasible [2021-10-28 09:06:16,139 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,141 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,141 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,141 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,141 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,142 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,142 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,142 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,142 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,142 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,143 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,143 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,143 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,143 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,143 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,143 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,144 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,144 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,144 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,144 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,144 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,145 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,145 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:06:16,145 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2021-10-28 09:06:16,149 INFO L731 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:06:16,152 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-10-28 09:06:16,386 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.10 09:06:16 BoogieIcfgContainer [2021-10-28 09:06:16,386 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-10-28 09:06:16,386 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-28 09:06:16,386 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-28 09:06:16,387 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-28 09:06:16,387 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 09:04:52" (3/4) ... [2021-10-28 09:06:16,389 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-10-28 09:06:16,655 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/witness.graphml [2021-10-28 09:06:16,656 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-28 09:06:16,658 INFO L168 Benchmark]: Toolchain (without parser) took 86724.43 ms. Allocated memory was 94.4 MB in the beginning and 2.0 GB in the end (delta: 1.9 GB). Free memory was 52.0 MB in the beginning and 1.2 GB in the end (delta: -1.1 GB). Peak memory consumption was 778.6 MB. Max. memory is 16.1 GB. [2021-10-28 09:06:16,659 INFO L168 Benchmark]: CDTParser took 0.36 ms. Allocated memory is still 94.4 MB. Free memory is still 68.9 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-10-28 09:06:16,660 INFO L168 Benchmark]: CACSL2BoogieTranslator took 538.68 ms. Allocated memory is still 94.4 MB. Free memory was 51.7 MB in the beginning and 67.2 MB in the end (delta: -15.4 MB). Peak memory consumption was 13.7 MB. Max. memory is 16.1 GB. [2021-10-28 09:06:16,660 INFO L168 Benchmark]: Boogie Procedure Inliner took 125.71 ms. Allocated memory is still 94.4 MB. Free memory was 67.2 MB in the beginning and 62.5 MB in the end (delta: 4.7 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-10-28 09:06:16,660 INFO L168 Benchmark]: Boogie Preprocessor took 132.99 ms. Allocated memory is still 94.4 MB. Free memory was 62.5 MB in the beginning and 58.8 MB in the end (delta: 3.7 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-10-28 09:06:16,661 INFO L168 Benchmark]: RCFGBuilder took 1539.59 ms. Allocated memory was 94.4 MB in the beginning and 138.4 MB in the end (delta: 44.0 MB). Free memory was 58.8 MB in the beginning and 78.1 MB in the end (delta: -19.3 MB). Peak memory consumption was 25.2 MB. Max. memory is 16.1 GB. [2021-10-28 09:06:16,661 INFO L168 Benchmark]: TraceAbstraction took 84104.78 ms. Allocated memory was 138.4 MB in the beginning and 2.0 GB in the end (delta: 1.9 GB). Free memory was 78.1 MB in the beginning and 1.2 GB in the end (delta: -1.2 GB). Peak memory consumption was 712.7 MB. Max. memory is 16.1 GB. [2021-10-28 09:06:16,662 INFO L168 Benchmark]: Witness Printer took 269.55 ms. Allocated memory is still 2.0 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 49.3 MB). Peak memory consumption was 48.2 MB. Max. memory is 16.1 GB. [2021-10-28 09:06:16,665 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.36 ms. Allocated memory is still 94.4 MB. Free memory is still 68.9 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 538.68 ms. Allocated memory is still 94.4 MB. Free memory was 51.7 MB in the beginning and 67.2 MB in the end (delta: -15.4 MB). Peak memory consumption was 13.7 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 125.71 ms. Allocated memory is still 94.4 MB. Free memory was 67.2 MB in the beginning and 62.5 MB in the end (delta: 4.7 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 132.99 ms. Allocated memory is still 94.4 MB. Free memory was 62.5 MB in the beginning and 58.8 MB in the end (delta: 3.7 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * RCFGBuilder took 1539.59 ms. Allocated memory was 94.4 MB in the beginning and 138.4 MB in the end (delta: 44.0 MB). Free memory was 58.8 MB in the beginning and 78.1 MB in the end (delta: -19.3 MB). Peak memory consumption was 25.2 MB. Max. memory is 16.1 GB. * TraceAbstraction took 84104.78 ms. Allocated memory was 138.4 MB in the beginning and 2.0 GB in the end (delta: 1.9 GB). Free memory was 78.1 MB in the beginning and 1.2 GB in the end (delta: -1.2 GB). Peak memory consumption was 712.7 MB. Max. memory is 16.1 GB. * Witness Printer took 269.55 ms. Allocated memory is still 2.0 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 49.3 MB). Peak memory consumption was 48.2 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 619]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L542] int c1 ; [L543] int i2 ; [L546] c1 = 0 [L547] side1Failed = __VERIFIER_nondet_bool() [L548] side2Failed = __VERIFIER_nondet_bool() [L549] side1_written = __VERIFIER_nondet_char() [L550] side2_written = __VERIFIER_nondet_char() [L551] side1Failed_History_0 = __VERIFIER_nondet_bool() [L552] side1Failed_History_1 = __VERIFIER_nondet_bool() [L553] side1Failed_History_2 = __VERIFIER_nondet_bool() [L554] side2Failed_History_0 = __VERIFIER_nondet_bool() [L555] side2Failed_History_1 = __VERIFIER_nondet_bool() [L556] side2Failed_History_2 = __VERIFIER_nondet_bool() [L557] active_side_History_0 = __VERIFIER_nondet_char() [L558] active_side_History_1 = __VERIFIER_nondet_char() [L559] active_side_History_2 = __VERIFIER_nondet_char() [L560] manual_selection_History_0 = __VERIFIER_nondet_char() [L561] manual_selection_History_1 = __VERIFIER_nondet_char() [L562] manual_selection_History_2 = __VERIFIER_nondet_char() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L563] i2 = init() [L58] COND FALSE !(!cond) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L565] cs1_old = nomsg [L566] cs1_new = nomsg [L567] cs2_old = nomsg [L568] cs2_new = nomsg [L569] s1s2_old = nomsg [L570] s1s2_new = nomsg [L571] s1s1_old = nomsg [L572] s1s1_new = nomsg [L573] s2s1_old = nomsg [L574] s2s1_new = nomsg [L575] s2s2_old = nomsg [L576] s2s2_new = nomsg [L577] s1p_old = nomsg [L578] s1p_new = nomsg [L579] s2p_old = nomsg [L580] s2p_new = nomsg [L581] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L582] COND TRUE i2 < 10 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND TRUE \read(side1Failed) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L409] COND FALSE !((int )side2 == 0) [L412] active_side = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L447] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] COND TRUE ! side2Failed [L451] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND TRUE ! tmp___0 [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L458] tmp___1 = read_side1_failed_history((unsigned char)1) [L459] COND TRUE ! tmp___1 [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L460] tmp___2 = read_side1_failed_history((unsigned char)0) [L461] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L486] tmp___7 = read_side1_failed_history((unsigned char)1) [L487] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L502] tmp___11 = read_side1_failed_history((unsigned char)1) [L503] COND TRUE ! tmp___11 [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L504] tmp___12 = read_side2_failed_history((unsigned char)1) [L505] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L148] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L151] COND FALSE !((int )index == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L154] COND TRUE (int )index == 2 [L155] return (active_side_History_2); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L518] tmp___20 = read_active_side_history((unsigned char)2) [L519] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L537] return (1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L604] c1 = check() [L617] COND FALSE !(! arg) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L606] i2 ++ VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L582] COND TRUE i2 < 10 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND TRUE \read(side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L350] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L351] COND TRUE (int )side2 != (int )nomsg [L352] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L409] COND TRUE (int )side2 == 0 [L410] active_side = (int8_t )2 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L447] COND FALSE !(! side1Failed) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] COND TRUE ! side2Failed [L451] tmp = 1 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND FALSE !(! tmp___0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L486] tmp___7 = read_side1_failed_history((unsigned char)1) [L487] COND TRUE \read(tmp___7) [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L488] tmp___8 = read_side2_failed_history((unsigned char)1) [L489] COND TRUE ! tmp___8 [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L490] tmp___5 = read_active_side_history((unsigned char)0) [L491] COND FALSE !(! ((int )tmp___5 == 2)) [L118] COND TRUE (int )index == 0 [L119] return (side2Failed_History_0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L494] tmp___6 = read_side2_failed_history((unsigned char)0) [L495] COND TRUE ! tmp___6 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L496] COND TRUE ! ((int )side2_written == 1) [L497] return (0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L604] c1 = check() [L617] COND TRUE ! arg VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L619] reach_error() VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 297 locations, 23 error locations. Started 1 CEGAR loops. OverallTime: 83.7s, OverallIterations: 47, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 45.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 22435 SDtfs, 49588 SDslu, 61678 SDs, 0 SdLazy, 11075 SolverSat, 716 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 8.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2737 GetRequests, 2039 SyntacticMatches, 9 SemanticMatches, 689 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31174 ImplicationChecksByTransitivity, 10.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=6811occurred in iteration=43, InterpolantAutomatonStates: 664, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 12.9s AutomataMinimizationTime, 46 MinimizatonAttempts, 69882 StatesRemovedByMinimization, 43 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.8s SsaConstructionTime, 3.0s SatisfiabilityAnalysisTime, 12.1s InterpolantComputationTime, 6454 NumberOfCodeBlocks, 6454 NumberOfCodeBlocksAsserted, 60 NumberOfCheckSat, 6244 ConstructedInterpolants, 0 QuantifiedInterpolants, 22714 SizeOfPredicates, 57 NumberOfNonLiveVariables, 10284 ConjunctsInSsa, 175 ConjunctsInUnsatCore, 59 InterpolantComputations, 38 PerfectInterpolantSequences, 919/1290 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-10-28 09:06:16,727 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5cf55c2c-846f-4eab-9cc6-07e9302ae0ba/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...