./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/systemc/toy1.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version b2eff8ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg/config/AutomizerReach.xml -i ../../sv-benchmarks/c/systemc/toy1.cil.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e9a06db73e82e132e013fcc47f3d25846deaa9fbcdfb8973f2a147d12a01c9e5 .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.1-dev-b2eff8b [2021-10-28 09:03:02,965 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-28 09:03:02,978 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-28 09:03:03,037 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-28 09:03:03,038 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-28 09:03:03,043 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-28 09:03:03,045 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-28 09:03:03,051 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-28 09:03:03,054 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-28 09:03:03,061 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-28 09:03:03,063 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-28 09:03:03,065 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-28 09:03:03,066 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-28 09:03:03,070 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-28 09:03:03,073 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-28 09:03:03,078 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-28 09:03:03,081 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-28 09:03:03,082 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-28 09:03:03,090 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-28 09:03:03,100 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-28 09:03:03,102 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-28 09:03:03,104 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-28 09:03:03,108 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-28 09:03:03,110 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-28 09:03:03,122 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-28 09:03:03,122 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-28 09:03:03,123 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-28 09:03:03,125 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-28 09:03:03,126 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-28 09:03:03,128 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-28 09:03:03,129 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-28 09:03:03,131 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-28 09:03:03,133 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-28 09:03:03,135 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-28 09:03:03,137 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-28 09:03:03,138 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-28 09:03:03,139 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-28 09:03:03,139 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-28 09:03:03,140 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-28 09:03:03,141 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-28 09:03:03,142 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-28 09:03:03,143 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg/config/svcomp-Reach-32bit-Automizer_Default.epf [2021-10-28 09:03:03,196 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-28 09:03:03,197 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-28 09:03:03,198 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-28 09:03:03,206 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-28 09:03:03,208 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-28 09:03:03,208 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-28 09:03:03,209 INFO L138 SettingsManager]: * Use SBE=true [2021-10-28 09:03:03,209 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-28 09:03:03,210 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-28 09:03:03,210 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-28 09:03:03,212 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-28 09:03:03,212 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-28 09:03:03,212 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-10-28 09:03:03,213 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-10-28 09:03:03,213 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-10-28 09:03:03,213 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-28 09:03:03,214 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-28 09:03:03,214 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-28 09:03:03,214 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-10-28 09:03:03,215 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-28 09:03:03,215 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-28 09:03:03,216 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-10-28 09:03:03,216 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-28 09:03:03,216 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-28 09:03:03,217 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-10-28 09:03:03,217 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-10-28 09:03:03,218 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-28 09:03:03,218 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-10-28 09:03:03,218 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-10-28 09:03:03,220 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2021-10-28 09:03:03,221 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-10-28 09:03:03,221 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-28 09:03:03,222 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e9a06db73e82e132e013fcc47f3d25846deaa9fbcdfb8973f2a147d12a01c9e5 [2021-10-28 09:03:03,543 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-28 09:03:03,569 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-28 09:03:03,572 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-28 09:03:03,574 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-28 09:03:03,575 INFO L275 PluginConnector]: CDTParser initialized [2021-10-28 09:03:03,576 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg/../../sv-benchmarks/c/systemc/toy1.cil.c [2021-10-28 09:03:03,652 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg/data/2976c5647/4a12610e18084b82907c413ef5283763/FLAG40fa70329 [2021-10-28 09:03:04,298 INFO L306 CDTParser]: Found 1 translation units. [2021-10-28 09:03:04,299 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/sv-benchmarks/c/systemc/toy1.cil.c [2021-10-28 09:03:04,326 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg/data/2976c5647/4a12610e18084b82907c413ef5283763/FLAG40fa70329 [2021-10-28 09:03:04,618 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg/data/2976c5647/4a12610e18084b82907c413ef5283763 [2021-10-28 09:03:04,621 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-28 09:03:04,623 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-28 09:03:04,626 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-28 09:03:04,626 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-28 09:03:04,630 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-28 09:03:04,631 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 09:03:04" (1/1) ... [2021-10-28 09:03:04,633 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3c5a23cb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:03:04, skipping insertion in model container [2021-10-28 09:03:04,633 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 09:03:04" (1/1) ... [2021-10-28 09:03:04,642 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-28 09:03:04,685 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-28 09:03:04,858 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/sv-benchmarks/c/systemc/toy1.cil.c[393,406] [2021-10-28 09:03:04,962 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 09:03:04,974 INFO L203 MainTranslator]: Completed pre-run [2021-10-28 09:03:04,987 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/sv-benchmarks/c/systemc/toy1.cil.c[393,406] [2021-10-28 09:03:05,056 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 09:03:05,075 INFO L208 MainTranslator]: Completed translation [2021-10-28 09:03:05,075 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:03:05 WrapperNode [2021-10-28 09:03:05,076 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-28 09:03:05,077 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-28 09:03:05,077 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-28 09:03:05,077 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-28 09:03:05,087 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:03:05" (1/1) ... [2021-10-28 09:03:05,101 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:03:05" (1/1) ... [2021-10-28 09:03:05,144 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-28 09:03:05,145 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-28 09:03:05,145 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-28 09:03:05,146 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-28 09:03:05,161 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:03:05" (1/1) ... [2021-10-28 09:03:05,162 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:03:05" (1/1) ... [2021-10-28 09:03:05,166 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:03:05" (1/1) ... [2021-10-28 09:03:05,182 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:03:05" (1/1) ... [2021-10-28 09:03:05,193 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:03:05" (1/1) ... [2021-10-28 09:03:05,212 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:03:05" (1/1) ... [2021-10-28 09:03:05,215 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:03:05" (1/1) ... [2021-10-28 09:03:05,220 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-28 09:03:05,221 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-28 09:03:05,221 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-28 09:03:05,221 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-28 09:03:05,223 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:03:05" (1/1) ... [2021-10-28 09:03:05,233 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-28 09:03:05,247 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:03:05,259 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-10-28 09:03:05,271 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-10-28 09:03:05,304 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-28 09:03:05,304 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-28 09:03:05,304 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-28 09:03:05,305 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-28 09:03:05,990 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-28 09:03:05,991 INFO L299 CfgBuilder]: Removed 28 assume(true) statements. [2021-10-28 09:03:05,994 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 09:03:05 BoogieIcfgContainer [2021-10-28 09:03:05,994 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-28 09:03:05,996 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-10-28 09:03:05,997 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-10-28 09:03:06,001 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-10-28 09:03:06,001 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.10 09:03:04" (1/3) ... [2021-10-28 09:03:06,003 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7dfad033 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.10 09:03:06, skipping insertion in model container [2021-10-28 09:03:06,003 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 09:03:05" (2/3) ... [2021-10-28 09:03:06,003 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7dfad033 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.10 09:03:06, skipping insertion in model container [2021-10-28 09:03:06,004 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 09:03:05" (3/3) ... [2021-10-28 09:03:06,005 INFO L111 eAbstractionObserver]: Analyzing ICFG toy1.cil.c [2021-10-28 09:03:06,012 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-10-28 09:03:06,012 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 2 error locations. [2021-10-28 09:03:06,072 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-10-28 09:03:06,079 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-10-28 09:03:06,080 INFO L340 AbstractCegarLoop]: Starting to check reachability of 2 error locations. [2021-10-28 09:03:06,103 INFO L276 IsEmpty]: Start isEmpty. Operand has 129 states, 126 states have (on average 1.880952380952381) internal successors, (237), 128 states have internal predecessors, (237), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:06,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-28 09:03:06,113 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:06,114 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:06,114 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:06,121 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:06,122 INFO L85 PathProgramCache]: Analyzing trace with hash -895778166, now seen corresponding path program 1 times [2021-10-28 09:03:06,133 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:06,134 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [383602385] [2021-10-28 09:03:06,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:06,136 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:06,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:06,455 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:03:06,456 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:06,457 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [383602385] [2021-10-28 09:03:06,458 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [383602385] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:06,458 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:06,458 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:03:06,471 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [542589615] [2021-10-28 09:03:06,485 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:03:06,489 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:06,503 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:03:06,504 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:06,509 INFO L87 Difference]: Start difference. First operand has 129 states, 126 states have (on average 1.880952380952381) internal successors, (237), 128 states have internal predecessors, (237), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:06,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:06,603 INFO L93 Difference]: Finished difference Result 250 states and 461 transitions. [2021-10-28 09:03:06,604 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:03:06,608 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2021-10-28 09:03:06,609 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:06,635 INFO L225 Difference]: With dead ends: 250 [2021-10-28 09:03:06,635 INFO L226 Difference]: Without dead ends: 125 [2021-10-28 09:03:06,641 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:06,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2021-10-28 09:03:06,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 125. [2021-10-28 09:03:06,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 125 states, 123 states have (on average 1.7723577235772359) internal successors, (218), 124 states have internal predecessors, (218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:06,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 218 transitions. [2021-10-28 09:03:06,732 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 218 transitions. Word has length 36 [2021-10-28 09:03:06,732 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:06,732 INFO L470 AbstractCegarLoop]: Abstraction has 125 states and 218 transitions. [2021-10-28 09:03:06,733 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:06,733 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 218 transitions. [2021-10-28 09:03:06,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-28 09:03:06,736 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:06,736 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:06,736 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-10-28 09:03:06,737 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:06,738 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:06,738 INFO L85 PathProgramCache]: Analyzing trace with hash -1597378040, now seen corresponding path program 1 times [2021-10-28 09:03:06,738 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:06,739 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [591936638] [2021-10-28 09:03:06,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:06,740 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:06,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:06,840 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:03:06,840 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:06,841 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [591936638] [2021-10-28 09:03:06,842 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [591936638] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:06,843 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:06,843 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:03:06,843 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1708774093] [2021-10-28 09:03:06,846 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:03:06,847 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:06,851 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:03:06,852 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:03:06,853 INFO L87 Difference]: Start difference. First operand 125 states and 218 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:06,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:06,955 INFO L93 Difference]: Finished difference Result 337 states and 586 transitions. [2021-10-28 09:03:06,956 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 09:03:06,956 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2021-10-28 09:03:06,957 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:06,959 INFO L225 Difference]: With dead ends: 337 [2021-10-28 09:03:06,960 INFO L226 Difference]: Without dead ends: 215 [2021-10-28 09:03:06,962 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:03:06,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 215 states. [2021-10-28 09:03:06,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 215 to 210. [2021-10-28 09:03:06,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 210 states, 208 states have (on average 1.7596153846153846) internal successors, (366), 209 states have internal predecessors, (366), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:06,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 366 transitions. [2021-10-28 09:03:06,992 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 366 transitions. Word has length 36 [2021-10-28 09:03:06,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:06,993 INFO L470 AbstractCegarLoop]: Abstraction has 210 states and 366 transitions. [2021-10-28 09:03:06,993 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:06,993 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 366 transitions. [2021-10-28 09:03:06,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-28 09:03:06,995 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:06,996 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:06,996 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-10-28 09:03:06,997 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:06,997 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:06,998 INFO L85 PathProgramCache]: Analyzing trace with hash -211174646, now seen corresponding path program 1 times [2021-10-28 09:03:06,998 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:06,998 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [607128719] [2021-10-28 09:03:06,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:06,999 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:07,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:07,062 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:03:07,063 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:07,063 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [607128719] [2021-10-28 09:03:07,063 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [607128719] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:07,064 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:07,064 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:03:07,064 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [415981441] [2021-10-28 09:03:07,065 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:03:07,065 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:07,066 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:03:07,067 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:07,067 INFO L87 Difference]: Start difference. First operand 210 states and 366 transitions. Second operand has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:07,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:07,134 INFO L93 Difference]: Finished difference Result 411 states and 719 transitions. [2021-10-28 09:03:07,135 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:03:07,135 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2021-10-28 09:03:07,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:07,138 INFO L225 Difference]: With dead ends: 411 [2021-10-28 09:03:07,139 INFO L226 Difference]: Without dead ends: 210 [2021-10-28 09:03:07,141 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:07,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 210 states. [2021-10-28 09:03:07,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 210 to 210. [2021-10-28 09:03:07,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 210 states, 208 states have (on average 1.7019230769230769) internal successors, (354), 209 states have internal predecessors, (354), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:07,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 354 transitions. [2021-10-28 09:03:07,187 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 354 transitions. Word has length 36 [2021-10-28 09:03:07,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:07,187 INFO L470 AbstractCegarLoop]: Abstraction has 210 states and 354 transitions. [2021-10-28 09:03:07,188 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:07,188 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 354 transitions. [2021-10-28 09:03:07,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-28 09:03:07,193 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:07,193 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:07,194 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-10-28 09:03:07,194 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:07,195 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:07,196 INFO L85 PathProgramCache]: Analyzing trace with hash -1741716090, now seen corresponding path program 1 times [2021-10-28 09:03:07,196 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:07,196 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [422952411] [2021-10-28 09:03:07,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:07,198 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:07,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:07,309 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:03:07,310 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:07,310 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [422952411] [2021-10-28 09:03:07,316 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [422952411] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:07,317 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:07,319 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:03:07,320 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1667422596] [2021-10-28 09:03:07,320 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:03:07,321 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:07,322 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:03:07,324 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:03:07,325 INFO L87 Difference]: Start difference. First operand 210 states and 354 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:07,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:07,493 INFO L93 Difference]: Finished difference Result 571 states and 965 transitions. [2021-10-28 09:03:07,493 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:03:07,494 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2021-10-28 09:03:07,494 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:07,497 INFO L225 Difference]: With dead ends: 571 [2021-10-28 09:03:07,498 INFO L226 Difference]: Without dead ends: 371 [2021-10-28 09:03:07,499 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:03:07,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 371 states. [2021-10-28 09:03:07,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 371 to 210. [2021-10-28 09:03:07,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 210 states, 208 states have (on average 1.6875) internal successors, (351), 209 states have internal predecessors, (351), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:07,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 351 transitions. [2021-10-28 09:03:07,526 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 351 transitions. Word has length 36 [2021-10-28 09:03:07,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:07,526 INFO L470 AbstractCegarLoop]: Abstraction has 210 states and 351 transitions. [2021-10-28 09:03:07,527 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:07,527 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 351 transitions. [2021-10-28 09:03:07,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-28 09:03:07,529 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:07,529 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:07,529 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-10-28 09:03:07,529 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:07,530 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:07,530 INFO L85 PathProgramCache]: Analyzing trace with hash 181511944, now seen corresponding path program 1 times [2021-10-28 09:03:07,531 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:07,531 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [518707435] [2021-10-28 09:03:07,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:07,532 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:07,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:07,581 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:03:07,582 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:07,582 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [518707435] [2021-10-28 09:03:07,582 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [518707435] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:07,582 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:07,583 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:03:07,583 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1167751689] [2021-10-28 09:03:07,584 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:03:07,584 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:07,585 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:03:07,585 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:03:07,585 INFO L87 Difference]: Start difference. First operand 210 states and 351 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:07,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:07,684 INFO L93 Difference]: Finished difference Result 574 states and 961 transitions. [2021-10-28 09:03:07,684 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:03:07,684 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2021-10-28 09:03:07,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:07,688 INFO L225 Difference]: With dead ends: 574 [2021-10-28 09:03:07,688 INFO L226 Difference]: Without dead ends: 375 [2021-10-28 09:03:07,689 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:03:07,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 375 states. [2021-10-28 09:03:07,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 375 to 210. [2021-10-28 09:03:07,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 210 states, 208 states have (on average 1.6730769230769231) internal successors, (348), 209 states have internal predecessors, (348), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:07,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 348 transitions. [2021-10-28 09:03:07,711 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 348 transitions. Word has length 36 [2021-10-28 09:03:07,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:07,711 INFO L470 AbstractCegarLoop]: Abstraction has 210 states and 348 transitions. [2021-10-28 09:03:07,712 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:07,712 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 348 transitions. [2021-10-28 09:03:07,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-28 09:03:07,714 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:07,714 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:07,714 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-10-28 09:03:07,714 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:07,715 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:07,715 INFO L85 PathProgramCache]: Analyzing trace with hash 243551558, now seen corresponding path program 1 times [2021-10-28 09:03:07,715 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:07,716 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [379835020] [2021-10-28 09:03:07,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:07,716 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:07,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:07,762 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:03:07,762 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:07,762 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [379835020] [2021-10-28 09:03:07,763 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [379835020] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:07,763 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:07,763 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:03:07,763 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1770839321] [2021-10-28 09:03:07,764 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:03:07,764 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:07,765 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:03:07,765 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:03:07,766 INFO L87 Difference]: Start difference. First operand 210 states and 348 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:07,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:07,853 INFO L93 Difference]: Finished difference Result 586 states and 972 transitions. [2021-10-28 09:03:07,854 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:03:07,854 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2021-10-28 09:03:07,854 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:07,858 INFO L225 Difference]: With dead ends: 586 [2021-10-28 09:03:07,858 INFO L226 Difference]: Without dead ends: 388 [2021-10-28 09:03:07,859 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:03:07,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 388 states. [2021-10-28 09:03:07,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 388 to 216. [2021-10-28 09:03:07,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 216 states, 214 states have (on average 1.644859813084112) internal successors, (352), 215 states have internal predecessors, (352), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:07,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 216 states to 216 states and 352 transitions. [2021-10-28 09:03:07,879 INFO L78 Accepts]: Start accepts. Automaton has 216 states and 352 transitions. Word has length 36 [2021-10-28 09:03:07,879 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:07,879 INFO L470 AbstractCegarLoop]: Abstraction has 216 states and 352 transitions. [2021-10-28 09:03:07,879 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:07,880 INFO L276 IsEmpty]: Start isEmpty. Operand 216 states and 352 transitions. [2021-10-28 09:03:07,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-28 09:03:07,881 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:07,882 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:07,882 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-10-28 09:03:07,882 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:07,883 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:07,883 INFO L85 PathProgramCache]: Analyzing trace with hash 384100168, now seen corresponding path program 1 times [2021-10-28 09:03:07,883 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:07,884 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [643443999] [2021-10-28 09:03:07,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:07,884 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:07,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:07,926 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:03:07,927 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:07,927 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [643443999] [2021-10-28 09:03:07,927 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [643443999] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:07,928 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:07,928 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:03:07,928 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1367966588] [2021-10-28 09:03:07,929 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:03:07,929 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:07,934 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:03:07,935 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:03:07,935 INFO L87 Difference]: Start difference. First operand 216 states and 352 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:08,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:08,058 INFO L93 Difference]: Finished difference Result 737 states and 1201 transitions. [2021-10-28 09:03:08,058 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:03:08,058 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2021-10-28 09:03:08,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:08,064 INFO L225 Difference]: With dead ends: 737 [2021-10-28 09:03:08,064 INFO L226 Difference]: Without dead ends: 534 [2021-10-28 09:03:08,066 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:03:08,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 534 states. [2021-10-28 09:03:08,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 534 to 351. [2021-10-28 09:03:08,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 351 states, 349 states have (on average 1.6361031518624642) internal successors, (571), 350 states have internal predecessors, (571), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:08,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 351 states to 351 states and 571 transitions. [2021-10-28 09:03:08,097 INFO L78 Accepts]: Start accepts. Automaton has 351 states and 571 transitions. Word has length 36 [2021-10-28 09:03:08,097 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:08,098 INFO L470 AbstractCegarLoop]: Abstraction has 351 states and 571 transitions. [2021-10-28 09:03:08,098 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:08,098 INFO L276 IsEmpty]: Start isEmpty. Operand 351 states and 571 transitions. [2021-10-28 09:03:08,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-28 09:03:08,101 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:08,101 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:08,102 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-10-28 09:03:08,102 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:08,103 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:08,103 INFO L85 PathProgramCache]: Analyzing trace with hash 250086662, now seen corresponding path program 1 times [2021-10-28 09:03:08,103 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:08,104 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1387513029] [2021-10-28 09:03:08,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:08,105 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:08,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:08,180 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:03:08,181 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:08,181 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1387513029] [2021-10-28 09:03:08,181 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1387513029] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:08,182 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:08,182 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:03:08,182 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2112352449] [2021-10-28 09:03:08,183 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:03:08,184 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:08,184 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:03:08,185 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:08,185 INFO L87 Difference]: Start difference. First operand 351 states and 571 transitions. Second operand has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:08,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:08,248 INFO L93 Difference]: Finished difference Result 838 states and 1368 transitions. [2021-10-28 09:03:08,248 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:03:08,248 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2021-10-28 09:03:08,249 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:08,252 INFO L225 Difference]: With dead ends: 838 [2021-10-28 09:03:08,252 INFO L226 Difference]: Without dead ends: 511 [2021-10-28 09:03:08,253 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:08,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 511 states. [2021-10-28 09:03:08,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 511 to 507. [2021-10-28 09:03:08,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 507 states, 505 states have (on average 1.6336633663366336) internal successors, (825), 506 states have internal predecessors, (825), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:08,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 507 states to 507 states and 825 transitions. [2021-10-28 09:03:08,295 INFO L78 Accepts]: Start accepts. Automaton has 507 states and 825 transitions. Word has length 36 [2021-10-28 09:03:08,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:08,295 INFO L470 AbstractCegarLoop]: Abstraction has 507 states and 825 transitions. [2021-10-28 09:03:08,296 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:08,296 INFO L276 IsEmpty]: Start isEmpty. Operand 507 states and 825 transitions. [2021-10-28 09:03:08,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-28 09:03:08,296 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:08,297 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:08,297 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-10-28 09:03:08,297 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:08,298 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:08,298 INFO L85 PathProgramCache]: Analyzing trace with hash 1539792002, now seen corresponding path program 1 times [2021-10-28 09:03:08,298 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:08,298 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [959704057] [2021-10-28 09:03:08,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:08,299 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:08,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:08,342 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:03:08,342 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:08,343 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [959704057] [2021-10-28 09:03:08,343 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [959704057] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:08,343 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:08,343 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:03:08,344 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1597418039] [2021-10-28 09:03:08,344 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:03:08,344 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:08,345 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:03:08,345 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:03:08,345 INFO L87 Difference]: Start difference. First operand 507 states and 825 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:08,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:08,473 INFO L93 Difference]: Finished difference Result 1293 states and 2104 transitions. [2021-10-28 09:03:08,478 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 09:03:08,479 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2021-10-28 09:03:08,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:08,485 INFO L225 Difference]: With dead ends: 1293 [2021-10-28 09:03:08,486 INFO L226 Difference]: Without dead ends: 803 [2021-10-28 09:03:08,489 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:03:08,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 803 states. [2021-10-28 09:03:08,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 803 to 507. [2021-10-28 09:03:08,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 507 states, 505 states have (on average 1.617821782178218) internal successors, (817), 506 states have internal predecessors, (817), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:08,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 507 states to 507 states and 817 transitions. [2021-10-28 09:03:08,541 INFO L78 Accepts]: Start accepts. Automaton has 507 states and 817 transitions. Word has length 36 [2021-10-28 09:03:08,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:08,542 INFO L470 AbstractCegarLoop]: Abstraction has 507 states and 817 transitions. [2021-10-28 09:03:08,542 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:08,543 INFO L276 IsEmpty]: Start isEmpty. Operand 507 states and 817 transitions. [2021-10-28 09:03:08,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-28 09:03:08,543 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:08,544 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:08,544 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-10-28 09:03:08,544 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:08,545 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:08,545 INFO L85 PathProgramCache]: Analyzing trace with hash -48555900, now seen corresponding path program 1 times [2021-10-28 09:03:08,545 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:08,547 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1802868993] [2021-10-28 09:03:08,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:08,547 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:08,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:08,619 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:03:08,619 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:08,619 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1802868993] [2021-10-28 09:03:08,620 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1802868993] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:08,620 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:08,620 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:03:08,620 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1150222734] [2021-10-28 09:03:08,621 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:03:08,621 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:08,622 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:03:08,622 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:03:08,622 INFO L87 Difference]: Start difference. First operand 507 states and 817 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:08,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:08,756 INFO L93 Difference]: Finished difference Result 1289 states and 2077 transitions. [2021-10-28 09:03:08,756 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 09:03:08,756 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2021-10-28 09:03:08,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:08,762 INFO L225 Difference]: With dead ends: 1289 [2021-10-28 09:03:08,763 INFO L226 Difference]: Without dead ends: 805 [2021-10-28 09:03:08,765 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:03:08,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 805 states. [2021-10-28 09:03:08,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 805 to 507. [2021-10-28 09:03:08,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 507 states, 505 states have (on average 1.601980198019802) internal successors, (809), 506 states have internal predecessors, (809), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:08,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 507 states to 507 states and 809 transitions. [2021-10-28 09:03:08,841 INFO L78 Accepts]: Start accepts. Automaton has 507 states and 809 transitions. Word has length 36 [2021-10-28 09:03:08,841 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:08,841 INFO L470 AbstractCegarLoop]: Abstraction has 507 states and 809 transitions. [2021-10-28 09:03:08,841 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:08,841 INFO L276 IsEmpty]: Start isEmpty. Operand 507 states and 809 transitions. [2021-10-28 09:03:08,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-28 09:03:08,842 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:08,842 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:08,842 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-10-28 09:03:08,843 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:08,843 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:08,843 INFO L85 PathProgramCache]: Analyzing trace with hash -1328419578, now seen corresponding path program 1 times [2021-10-28 09:03:08,843 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:08,844 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [982178092] [2021-10-28 09:03:08,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:08,844 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:08,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:08,883 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:03:08,883 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:08,883 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [982178092] [2021-10-28 09:03:08,884 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [982178092] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:08,884 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:08,884 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:03:08,884 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [316076600] [2021-10-28 09:03:08,885 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:03:08,885 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:08,885 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:03:08,886 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:03:08,886 INFO L87 Difference]: Start difference. First operand 507 states and 809 transitions. Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:09,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:09,015 INFO L93 Difference]: Finished difference Result 1226 states and 1951 transitions. [2021-10-28 09:03:09,016 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 09:03:09,016 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2021-10-28 09:03:09,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:09,022 INFO L225 Difference]: With dead ends: 1226 [2021-10-28 09:03:09,022 INFO L226 Difference]: Without dead ends: 736 [2021-10-28 09:03:09,023 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:03:09,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 736 states. [2021-10-28 09:03:09,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 736 to 555. [2021-10-28 09:03:09,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 553 states have (on average 1.566003616636528) internal successors, (866), 554 states have internal predecessors, (866), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:09,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 866 transitions. [2021-10-28 09:03:09,076 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 866 transitions. Word has length 36 [2021-10-28 09:03:09,076 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:09,077 INFO L470 AbstractCegarLoop]: Abstraction has 555 states and 866 transitions. [2021-10-28 09:03:09,077 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:09,077 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 866 transitions. [2021-10-28 09:03:09,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2021-10-28 09:03:09,078 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:09,078 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:09,078 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-10-28 09:03:09,078 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:09,079 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:09,079 INFO L85 PathProgramCache]: Analyzing trace with hash -1915225592, now seen corresponding path program 1 times [2021-10-28 09:03:09,079 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:09,079 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1033003194] [2021-10-28 09:03:09,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:09,080 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:09,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:09,113 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:03:09,113 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:09,113 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1033003194] [2021-10-28 09:03:09,113 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1033003194] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:09,113 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:09,114 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:03:09,114 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1449890439] [2021-10-28 09:03:09,114 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:03:09,114 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:09,115 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:03:09,115 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:09,115 INFO L87 Difference]: Start difference. First operand 555 states and 866 transitions. Second operand has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:09,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:09,241 INFO L93 Difference]: Finished difference Result 1316 states and 2058 transitions. [2021-10-28 09:03:09,242 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:03:09,242 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2021-10-28 09:03:09,242 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:09,248 INFO L225 Difference]: With dead ends: 1316 [2021-10-28 09:03:09,248 INFO L226 Difference]: Without dead ends: 775 [2021-10-28 09:03:09,249 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:09,251 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 775 states. [2021-10-28 09:03:09,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 775 to 772. [2021-10-28 09:03:09,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 772 states, 770 states have (on average 1.5454545454545454) internal successors, (1190), 771 states have internal predecessors, (1190), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:09,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 772 states to 772 states and 1190 transitions. [2021-10-28 09:03:09,339 INFO L78 Accepts]: Start accepts. Automaton has 772 states and 1190 transitions. Word has length 36 [2021-10-28 09:03:09,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:09,339 INFO L470 AbstractCegarLoop]: Abstraction has 772 states and 1190 transitions. [2021-10-28 09:03:09,339 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 12.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:09,339 INFO L276 IsEmpty]: Start isEmpty. Operand 772 states and 1190 transitions. [2021-10-28 09:03:09,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2021-10-28 09:03:09,341 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:09,341 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:09,341 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-10-28 09:03:09,341 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:09,342 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:09,342 INFO L85 PathProgramCache]: Analyzing trace with hash -547155332, now seen corresponding path program 1 times [2021-10-28 09:03:09,342 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:09,342 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [683737009] [2021-10-28 09:03:09,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:09,343 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:09,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:09,380 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:03:09,380 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:09,380 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [683737009] [2021-10-28 09:03:09,381 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [683737009] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:09,381 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:09,381 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:03:09,381 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1230578763] [2021-10-28 09:03:09,382 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:03:09,382 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:09,382 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:03:09,383 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:09,383 INFO L87 Difference]: Start difference. First operand 772 states and 1190 transitions. Second operand has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:09,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:09,506 INFO L93 Difference]: Finished difference Result 1906 states and 2978 transitions. [2021-10-28 09:03:09,506 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:03:09,507 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 46 [2021-10-28 09:03:09,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:09,516 INFO L225 Difference]: With dead ends: 1906 [2021-10-28 09:03:09,516 INFO L226 Difference]: Without dead ends: 1161 [2021-10-28 09:03:09,518 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:09,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1161 states. [2021-10-28 09:03:09,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1161 to 1157. [2021-10-28 09:03:09,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1157 states, 1155 states have (on average 1.5593073593073592) internal successors, (1801), 1156 states have internal predecessors, (1801), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:09,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1157 states to 1157 states and 1801 transitions. [2021-10-28 09:03:09,649 INFO L78 Accepts]: Start accepts. Automaton has 1157 states and 1801 transitions. Word has length 46 [2021-10-28 09:03:09,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:09,649 INFO L470 AbstractCegarLoop]: Abstraction has 1157 states and 1801 transitions. [2021-10-28 09:03:09,650 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:09,650 INFO L276 IsEmpty]: Start isEmpty. Operand 1157 states and 1801 transitions. [2021-10-28 09:03:09,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2021-10-28 09:03:09,651 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:09,651 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:09,652 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-10-28 09:03:09,652 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:09,652 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:09,653 INFO L85 PathProgramCache]: Analyzing trace with hash -299008838, now seen corresponding path program 1 times [2021-10-28 09:03:09,653 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:09,653 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [964596688] [2021-10-28 09:03:09,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:09,653 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:09,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:09,678 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2021-10-28 09:03:09,678 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:09,679 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [964596688] [2021-10-28 09:03:09,679 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [964596688] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:09,679 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:09,679 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:03:09,679 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1115761262] [2021-10-28 09:03:09,680 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:03:09,680 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:09,681 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:03:09,681 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:09,681 INFO L87 Difference]: Start difference. First operand 1157 states and 1801 transitions. Second operand has 3 states, 3 states have (on average 14.0) internal successors, (42), 3 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:09,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:09,785 INFO L93 Difference]: Finished difference Result 2265 states and 3543 transitions. [2021-10-28 09:03:09,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:03:09,786 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.0) internal successors, (42), 3 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 46 [2021-10-28 09:03:09,786 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:09,794 INFO L225 Difference]: With dead ends: 2265 [2021-10-28 09:03:09,795 INFO L226 Difference]: Without dead ends: 1135 [2021-10-28 09:03:09,797 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:09,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1135 states. [2021-10-28 09:03:09,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1135 to 1135. [2021-10-28 09:03:09,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1135 states, 1133 states have (on average 1.5657546337157988) internal successors, (1774), 1134 states have internal predecessors, (1774), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:09,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1135 states to 1135 states and 1774 transitions. [2021-10-28 09:03:09,905 INFO L78 Accepts]: Start accepts. Automaton has 1135 states and 1774 transitions. Word has length 46 [2021-10-28 09:03:09,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:09,905 INFO L470 AbstractCegarLoop]: Abstraction has 1135 states and 1774 transitions. [2021-10-28 09:03:09,905 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.0) internal successors, (42), 3 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:09,906 INFO L276 IsEmpty]: Start isEmpty. Operand 1135 states and 1774 transitions. [2021-10-28 09:03:09,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2021-10-28 09:03:09,907 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:09,907 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:09,907 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-10-28 09:03:09,908 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:09,908 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:09,908 INFO L85 PathProgramCache]: Analyzing trace with hash -336670593, now seen corresponding path program 1 times [2021-10-28 09:03:09,909 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:09,909 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1960464431] [2021-10-28 09:03:09,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:09,909 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:09,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:09,957 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:03:09,958 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:09,958 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1960464431] [2021-10-28 09:03:09,958 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1960464431] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:09,959 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:09,959 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:03:09,959 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1187751738] [2021-10-28 09:03:09,959 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:03:09,960 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:09,960 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:03:09,960 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:09,961 INFO L87 Difference]: Start difference. First operand 1135 states and 1774 transitions. Second operand has 3 states, 3 states have (on average 15.666666666666666) internal successors, (47), 3 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:10,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:10,143 INFO L93 Difference]: Finished difference Result 2891 states and 4579 transitions. [2021-10-28 09:03:10,144 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:03:10,144 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.666666666666666) internal successors, (47), 3 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 47 [2021-10-28 09:03:10,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:10,158 INFO L225 Difference]: With dead ends: 2891 [2021-10-28 09:03:10,158 INFO L226 Difference]: Without dead ends: 1783 [2021-10-28 09:03:10,161 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:10,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1783 states. [2021-10-28 09:03:10,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1783 to 1779. [2021-10-28 09:03:10,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1779 states, 1777 states have (on average 1.5801913337084974) internal successors, (2808), 1778 states have internal predecessors, (2808), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:10,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1779 states to 1779 states and 2808 transitions. [2021-10-28 09:03:10,369 INFO L78 Accepts]: Start accepts. Automaton has 1779 states and 2808 transitions. Word has length 47 [2021-10-28 09:03:10,369 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:10,369 INFO L470 AbstractCegarLoop]: Abstraction has 1779 states and 2808 transitions. [2021-10-28 09:03:10,370 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.666666666666666) internal successors, (47), 3 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:10,370 INFO L276 IsEmpty]: Start isEmpty. Operand 1779 states and 2808 transitions. [2021-10-28 09:03:10,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2021-10-28 09:03:10,372 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:10,372 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:10,372 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-10-28 09:03:10,373 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:10,373 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:10,373 INFO L85 PathProgramCache]: Analyzing trace with hash 1825522215, now seen corresponding path program 1 times [2021-10-28 09:03:10,373 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:10,374 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1201175363] [2021-10-28 09:03:10,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:10,374 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:10,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:10,407 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:03:10,407 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:10,407 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1201175363] [2021-10-28 09:03:10,408 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1201175363] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:10,408 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:10,408 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:03:10,408 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [340596881] [2021-10-28 09:03:10,409 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:03:10,409 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:10,409 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:03:10,410 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:10,410 INFO L87 Difference]: Start difference. First operand 1779 states and 2808 transitions. Second operand has 3 states, 3 states have (on average 16.0) internal successors, (48), 3 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:10,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:10,742 INFO L93 Difference]: Finished difference Result 4794 states and 7664 transitions. [2021-10-28 09:03:10,743 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:03:10,743 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 16.0) internal successors, (48), 3 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 48 [2021-10-28 09:03:10,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:10,766 INFO L225 Difference]: With dead ends: 4794 [2021-10-28 09:03:10,766 INFO L226 Difference]: Without dead ends: 3044 [2021-10-28 09:03:10,770 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:10,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3044 states. [2021-10-28 09:03:11,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3044 to 3040. [2021-10-28 09:03:11,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3040 states, 3038 states have (on average 1.5941408821593153) internal successors, (4843), 3039 states have internal predecessors, (4843), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:11,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3040 states to 3040 states and 4843 transitions. [2021-10-28 09:03:11,068 INFO L78 Accepts]: Start accepts. Automaton has 3040 states and 4843 transitions. Word has length 48 [2021-10-28 09:03:11,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:11,068 INFO L470 AbstractCegarLoop]: Abstraction has 3040 states and 4843 transitions. [2021-10-28 09:03:11,069 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 16.0) internal successors, (48), 3 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:11,069 INFO L276 IsEmpty]: Start isEmpty. Operand 3040 states and 4843 transitions. [2021-10-28 09:03:11,071 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2021-10-28 09:03:11,071 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:11,071 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:11,072 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-10-28 09:03:11,072 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:11,072 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:11,073 INFO L85 PathProgramCache]: Analyzing trace with hash 2073668709, now seen corresponding path program 1 times [2021-10-28 09:03:11,073 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:11,073 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1719436548] [2021-10-28 09:03:11,073 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:11,073 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:11,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:11,127 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2021-10-28 09:03:11,127 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:11,128 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1719436548] [2021-10-28 09:03:11,128 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1719436548] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:11,128 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:11,128 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:03:11,128 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1420120337] [2021-10-28 09:03:11,129 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:03:11,129 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:11,130 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:03:11,130 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:11,130 INFO L87 Difference]: Start difference. First operand 3040 states and 4843 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:11,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:11,391 INFO L93 Difference]: Finished difference Result 6029 states and 9627 transitions. [2021-10-28 09:03:11,391 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:03:11,392 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 48 [2021-10-28 09:03:11,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:11,413 INFO L225 Difference]: With dead ends: 6029 [2021-10-28 09:03:11,413 INFO L226 Difference]: Without dead ends: 3018 [2021-10-28 09:03:11,418 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:11,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3018 states. [2021-10-28 09:03:11,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3018 to 3018. [2021-10-28 09:03:11,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3018 states, 3016 states have (on average 1.5971485411140585) internal successors, (4817), 3017 states have internal predecessors, (4817), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:11,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3018 states to 3018 states and 4817 transitions. [2021-10-28 09:03:11,693 INFO L78 Accepts]: Start accepts. Automaton has 3018 states and 4817 transitions. Word has length 48 [2021-10-28 09:03:11,694 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:11,694 INFO L470 AbstractCegarLoop]: Abstraction has 3018 states and 4817 transitions. [2021-10-28 09:03:11,694 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:11,694 INFO L276 IsEmpty]: Start isEmpty. Operand 3018 states and 4817 transitions. [2021-10-28 09:03:11,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2021-10-28 09:03:11,696 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:11,696 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:11,696 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-10-28 09:03:11,697 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:11,697 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:11,698 INFO L85 PathProgramCache]: Analyzing trace with hash 963117268, now seen corresponding path program 1 times [2021-10-28 09:03:11,698 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:11,698 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [202761784] [2021-10-28 09:03:11,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:11,699 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:11,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:11,756 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:03:11,757 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:11,757 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [202761784] [2021-10-28 09:03:11,757 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [202761784] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:11,757 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:11,757 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:03:11,758 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [324480724] [2021-10-28 09:03:11,758 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:03:11,762 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:11,763 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:03:11,763 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:03:11,763 INFO L87 Difference]: Start difference. First operand 3018 states and 4817 transitions. Second operand has 4 states, 4 states have (on average 12.25) internal successors, (49), 4 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:12,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:12,250 INFO L93 Difference]: Finished difference Result 7617 states and 12199 transitions. [2021-10-28 09:03:12,251 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:03:12,251 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 4 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 49 [2021-10-28 09:03:12,252 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:12,280 INFO L225 Difference]: With dead ends: 7617 [2021-10-28 09:03:12,280 INFO L226 Difference]: Without dead ends: 3895 [2021-10-28 09:03:12,286 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:03:12,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3895 states. [2021-10-28 09:03:12,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3895 to 3895. [2021-10-28 09:03:12,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3895 states, 3893 states have (on average 1.588235294117647) internal successors, (6183), 3894 states have internal predecessors, (6183), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:12,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3895 states to 3895 states and 6183 transitions. [2021-10-28 09:03:12,738 INFO L78 Accepts]: Start accepts. Automaton has 3895 states and 6183 transitions. Word has length 49 [2021-10-28 09:03:12,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:12,738 INFO L470 AbstractCegarLoop]: Abstraction has 3895 states and 6183 transitions. [2021-10-28 09:03:12,739 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 4 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:12,739 INFO L276 IsEmpty]: Start isEmpty. Operand 3895 states and 6183 transitions. [2021-10-28 09:03:12,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-28 09:03:12,741 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:12,742 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:12,742 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-10-28 09:03:12,742 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:12,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:12,743 INFO L85 PathProgramCache]: Analyzing trace with hash -1671888881, now seen corresponding path program 1 times [2021-10-28 09:03:12,743 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:12,743 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [787177605] [2021-10-28 09:03:12,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:12,744 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:12,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:12,794 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:03:12,794 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:12,795 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [787177605] [2021-10-28 09:03:12,795 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [787177605] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:12,795 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:12,795 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 09:03:12,795 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [959313704] [2021-10-28 09:03:12,797 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 09:03:12,797 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:12,798 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 09:03:12,798 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:03:12,799 INFO L87 Difference]: Start difference. First operand 3895 states and 6183 transitions. Second operand has 5 states, 5 states have (on average 10.8) internal successors, (54), 5 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:13,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:13,449 INFO L93 Difference]: Finished difference Result 9940 states and 15662 transitions. [2021-10-28 09:03:13,449 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-28 09:03:13,450 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 5 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-28 09:03:13,450 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:13,512 INFO L225 Difference]: With dead ends: 9940 [2021-10-28 09:03:13,512 INFO L226 Difference]: Without dead ends: 6068 [2021-10-28 09:03:13,520 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2021-10-28 09:03:13,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6068 states. [2021-10-28 09:03:13,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6068 to 4554. [2021-10-28 09:03:13,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4554 states, 4552 states have (on average 1.5536028119507908) internal successors, (7072), 4553 states have internal predecessors, (7072), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:14,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4554 states to 4554 states and 7072 transitions. [2021-10-28 09:03:14,007 INFO L78 Accepts]: Start accepts. Automaton has 4554 states and 7072 transitions. Word has length 54 [2021-10-28 09:03:14,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:14,008 INFO L470 AbstractCegarLoop]: Abstraction has 4554 states and 7072 transitions. [2021-10-28 09:03:14,008 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 5 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:14,008 INFO L276 IsEmpty]: Start isEmpty. Operand 4554 states and 7072 transitions. [2021-10-28 09:03:14,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2021-10-28 09:03:14,012 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:14,013 INFO L513 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:14,013 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-10-28 09:03:14,013 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:14,014 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:14,014 INFO L85 PathProgramCache]: Analyzing trace with hash -2128152978, now seen corresponding path program 1 times [2021-10-28 09:03:14,015 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:14,015 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [500656166] [2021-10-28 09:03:14,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:14,015 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:14,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:14,050 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:03:14,051 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:14,051 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [500656166] [2021-10-28 09:03:14,051 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [500656166] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:14,051 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:14,051 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:03:14,052 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [425987780] [2021-10-28 09:03:14,052 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:03:14,052 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:14,053 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:03:14,053 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:14,053 INFO L87 Difference]: Start difference. First operand 4554 states and 7072 transitions. Second operand has 3 states, 3 states have (on average 28.666666666666668) internal successors, (86), 3 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:14,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:14,591 INFO L93 Difference]: Finished difference Result 9431 states and 14610 transitions. [2021-10-28 09:03:14,592 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:03:14,592 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 28.666666666666668) internal successors, (86), 3 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 86 [2021-10-28 09:03:14,593 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:14,608 INFO L225 Difference]: With dead ends: 9431 [2021-10-28 09:03:14,609 INFO L226 Difference]: Without dead ends: 4906 [2021-10-28 09:03:14,618 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:14,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4906 states. [2021-10-28 09:03:15,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4906 to 4874. [2021-10-28 09:03:15,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4874 states, 4872 states have (on average 1.5026683087027914) internal successors, (7321), 4873 states have internal predecessors, (7321), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:15,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4874 states to 4874 states and 7321 transitions. [2021-10-28 09:03:15,203 INFO L78 Accepts]: Start accepts. Automaton has 4874 states and 7321 transitions. Word has length 86 [2021-10-28 09:03:15,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:15,203 INFO L470 AbstractCegarLoop]: Abstraction has 4874 states and 7321 transitions. [2021-10-28 09:03:15,204 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 28.666666666666668) internal successors, (86), 3 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:15,204 INFO L276 IsEmpty]: Start isEmpty. Operand 4874 states and 7321 transitions. [2021-10-28 09:03:15,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2021-10-28 09:03:15,209 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:15,209 INFO L513 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:15,210 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-10-28 09:03:15,210 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:15,211 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:15,211 INFO L85 PathProgramCache]: Analyzing trace with hash 1520792899, now seen corresponding path program 1 times [2021-10-28 09:03:15,211 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:15,211 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [928261417] [2021-10-28 09:03:15,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:15,212 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:15,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:15,245 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:03:15,246 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:15,246 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [928261417] [2021-10-28 09:03:15,246 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [928261417] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:15,246 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:15,247 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:03:15,247 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1160470784] [2021-10-28 09:03:15,247 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:03:15,247 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:15,248 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:03:15,248 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:15,248 INFO L87 Difference]: Start difference. First operand 4874 states and 7321 transitions. Second operand has 3 states, 3 states have (on average 29.0) internal successors, (87), 3 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:15,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:15,740 INFO L93 Difference]: Finished difference Result 10229 states and 15320 transitions. [2021-10-28 09:03:15,740 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:03:15,741 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 29.0) internal successors, (87), 3 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 87 [2021-10-28 09:03:15,741 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:15,757 INFO L225 Difference]: With dead ends: 10229 [2021-10-28 09:03:15,757 INFO L226 Difference]: Without dead ends: 5396 [2021-10-28 09:03:15,766 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:15,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5396 states. [2021-10-28 09:03:16,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5396 to 5348. [2021-10-28 09:03:16,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5348 states, 5346 states have (on average 1.452300785634119) internal successors, (7764), 5347 states have internal predecessors, (7764), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:16,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5348 states to 5348 states and 7764 transitions. [2021-10-28 09:03:16,309 INFO L78 Accepts]: Start accepts. Automaton has 5348 states and 7764 transitions. Word has length 87 [2021-10-28 09:03:16,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:16,310 INFO L470 AbstractCegarLoop]: Abstraction has 5348 states and 7764 transitions. [2021-10-28 09:03:16,310 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 29.0) internal successors, (87), 3 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:16,310 INFO L276 IsEmpty]: Start isEmpty. Operand 5348 states and 7764 transitions. [2021-10-28 09:03:16,317 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2021-10-28 09:03:16,317 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:16,318 INFO L513 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:16,318 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-10-28 09:03:16,318 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:16,319 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:16,319 INFO L85 PathProgramCache]: Analyzing trace with hash -1973365524, now seen corresponding path program 1 times [2021-10-28 09:03:16,319 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:16,319 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1973442966] [2021-10-28 09:03:16,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:16,320 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:16,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:16,354 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 09:03:16,354 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:16,354 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1973442966] [2021-10-28 09:03:16,355 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1973442966] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:16,355 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:16,355 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:03:16,355 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [186419134] [2021-10-28 09:03:16,356 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:03:16,356 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:16,357 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:03:16,357 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:16,357 INFO L87 Difference]: Start difference. First operand 5348 states and 7764 transitions. Second operand has 3 states, 3 states have (on average 29.333333333333332) internal successors, (88), 3 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:16,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:16,841 INFO L93 Difference]: Finished difference Result 11003 states and 15979 transitions. [2021-10-28 09:03:16,842 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:03:16,842 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 29.333333333333332) internal successors, (88), 3 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 88 [2021-10-28 09:03:16,843 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:16,858 INFO L225 Difference]: With dead ends: 11003 [2021-10-28 09:03:16,858 INFO L226 Difference]: Without dead ends: 5716 [2021-10-28 09:03:16,866 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:16,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5716 states. [2021-10-28 09:03:17,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5716 to 5130. [2021-10-28 09:03:17,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5130 states, 5128 states have (on average 1.389625585023401) internal successors, (7126), 5129 states have internal predecessors, (7126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:17,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5130 states to 5130 states and 7126 transitions. [2021-10-28 09:03:17,244 INFO L78 Accepts]: Start accepts. Automaton has 5130 states and 7126 transitions. Word has length 88 [2021-10-28 09:03:17,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:17,244 INFO L470 AbstractCegarLoop]: Abstraction has 5130 states and 7126 transitions. [2021-10-28 09:03:17,245 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 29.333333333333332) internal successors, (88), 3 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:17,246 INFO L276 IsEmpty]: Start isEmpty. Operand 5130 states and 7126 transitions. [2021-10-28 09:03:17,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2021-10-28 09:03:17,253 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:17,253 INFO L513 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:17,254 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-10-28 09:03:17,254 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:17,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:17,255 INFO L85 PathProgramCache]: Analyzing trace with hash 663253701, now seen corresponding path program 1 times [2021-10-28 09:03:17,255 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:17,255 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [796336287] [2021-10-28 09:03:17,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:17,256 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:17,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:17,320 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-28 09:03:17,320 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:17,320 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [796336287] [2021-10-28 09:03:17,320 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [796336287] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:17,321 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:17,321 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:03:17,321 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1014654777] [2021-10-28 09:03:17,322 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:03:17,322 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:17,322 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:03:17,323 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:03:17,323 INFO L87 Difference]: Start difference. First operand 5130 states and 7126 transitions. Second operand has 4 states, 4 states have (on average 22.0) internal successors, (88), 4 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:18,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:18,187 INFO L93 Difference]: Finished difference Result 9554 states and 13184 transitions. [2021-10-28 09:03:18,188 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:03:18,188 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 22.0) internal successors, (88), 4 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 89 [2021-10-28 09:03:18,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:18,202 INFO L225 Difference]: With dead ends: 9554 [2021-10-28 09:03:18,202 INFO L226 Difference]: Without dead ends: 4875 [2021-10-28 09:03:18,211 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:03:18,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4875 states. [2021-10-28 09:03:18,852 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4875 to 4759. [2021-10-28 09:03:18,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4759 states, 4757 states have (on average 1.3378179524910658) internal successors, (6364), 4758 states have internal predecessors, (6364), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:18,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4759 states to 4759 states and 6364 transitions. [2021-10-28 09:03:18,872 INFO L78 Accepts]: Start accepts. Automaton has 4759 states and 6364 transitions. Word has length 89 [2021-10-28 09:03:18,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:18,873 INFO L470 AbstractCegarLoop]: Abstraction has 4759 states and 6364 transitions. [2021-10-28 09:03:18,873 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 22.0) internal successors, (88), 4 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:18,873 INFO L276 IsEmpty]: Start isEmpty. Operand 4759 states and 6364 transitions. [2021-10-28 09:03:18,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2021-10-28 09:03:18,894 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:18,894 INFO L513 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:18,894 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-10-28 09:03:18,895 INFO L402 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:18,895 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:18,895 INFO L85 PathProgramCache]: Analyzing trace with hash 1690650567, now seen corresponding path program 1 times [2021-10-28 09:03:18,896 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:18,896 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [91082651] [2021-10-28 09:03:18,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:18,896 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:18,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:18,951 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 17 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2021-10-28 09:03:18,952 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:18,952 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [91082651] [2021-10-28 09:03:18,952 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [91082651] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:18,952 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:18,953 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:03:18,953 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1795608162] [2021-10-28 09:03:18,953 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:03:18,954 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:18,954 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:03:18,955 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:18,955 INFO L87 Difference]: Start difference. First operand 4759 states and 6364 transitions. Second operand has 3 states, 3 states have (on average 36.666666666666664) internal successors, (110), 3 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:19,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:19,553 INFO L93 Difference]: Finished difference Result 9073 states and 12125 transitions. [2021-10-28 09:03:19,554 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:03:19,554 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 36.666666666666664) internal successors, (110), 3 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 116 [2021-10-28 09:03:19,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:19,567 INFO L225 Difference]: With dead ends: 9073 [2021-10-28 09:03:19,567 INFO L226 Difference]: Without dead ends: 4705 [2021-10-28 09:03:19,575 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:19,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4705 states. [2021-10-28 09:03:20,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4705 to 4705. [2021-10-28 09:03:20,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4705 states, 4703 states have (on average 1.330640017010419) internal successors, (6258), 4704 states have internal predecessors, (6258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:20,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4705 states to 4705 states and 6258 transitions. [2021-10-28 09:03:20,043 INFO L78 Accepts]: Start accepts. Automaton has 4705 states and 6258 transitions. Word has length 116 [2021-10-28 09:03:20,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:20,043 INFO L470 AbstractCegarLoop]: Abstraction has 4705 states and 6258 transitions. [2021-10-28 09:03:20,043 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 36.666666666666664) internal successors, (110), 3 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:20,044 INFO L276 IsEmpty]: Start isEmpty. Operand 4705 states and 6258 transitions. [2021-10-28 09:03:20,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2021-10-28 09:03:20,057 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:20,057 INFO L513 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:20,057 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-10-28 09:03:20,057 INFO L402 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:20,058 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:20,058 INFO L85 PathProgramCache]: Analyzing trace with hash 762576065, now seen corresponding path program 1 times [2021-10-28 09:03:20,058 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:20,059 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [578324759] [2021-10-28 09:03:20,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:20,059 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:20,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:20,130 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2021-10-28 09:03:20,131 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:20,131 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [578324759] [2021-10-28 09:03:20,131 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [578324759] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:20,131 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:20,131 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:03:20,132 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [789309652] [2021-10-28 09:03:20,132 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:03:20,132 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:20,133 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:03:20,133 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:03:20,133 INFO L87 Difference]: Start difference. First operand 4705 states and 6258 transitions. Second operand has 4 states, 4 states have (on average 30.5) internal successors, (122), 4 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:20,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:20,531 INFO L93 Difference]: Finished difference Result 8363 states and 11148 transitions. [2021-10-28 09:03:20,531 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:03:20,532 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 30.5) internal successors, (122), 4 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 128 [2021-10-28 09:03:20,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:20,543 INFO L225 Difference]: With dead ends: 8363 [2021-10-28 09:03:20,544 INFO L226 Difference]: Without dead ends: 4627 [2021-10-28 09:03:20,550 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:03:20,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4627 states. [2021-10-28 09:03:20,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4627 to 4623. [2021-10-28 09:03:20,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4623 states, 4621 states have (on average 1.3064271802640122) internal successors, (6037), 4622 states have internal predecessors, (6037), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:20,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4623 states to 4623 states and 6037 transitions. [2021-10-28 09:03:20,961 INFO L78 Accepts]: Start accepts. Automaton has 4623 states and 6037 transitions. Word has length 128 [2021-10-28 09:03:20,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:20,961 INFO L470 AbstractCegarLoop]: Abstraction has 4623 states and 6037 transitions. [2021-10-28 09:03:20,962 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 30.5) internal successors, (122), 4 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:20,962 INFO L276 IsEmpty]: Start isEmpty. Operand 4623 states and 6037 transitions. [2021-10-28 09:03:20,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2021-10-28 09:03:20,974 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:20,974 INFO L513 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:20,975 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-10-28 09:03:20,975 INFO L402 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:20,975 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:20,976 INFO L85 PathProgramCache]: Analyzing trace with hash 843157933, now seen corresponding path program 1 times [2021-10-28 09:03:20,976 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:20,976 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [482438456] [2021-10-28 09:03:20,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:20,976 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:20,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:21,016 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2021-10-28 09:03:21,016 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:21,016 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [482438456] [2021-10-28 09:03:21,016 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [482438456] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:21,017 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:21,017 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:03:21,017 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1864659324] [2021-10-28 09:03:21,018 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:03:21,018 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:21,018 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:03:21,018 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:21,019 INFO L87 Difference]: Start difference. First operand 4623 states and 6037 transitions. Second operand has 3 states, 3 states have (on average 41.0) internal successors, (123), 3 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:21,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:21,518 INFO L93 Difference]: Finished difference Result 8859 states and 11562 transitions. [2021-10-28 09:03:21,518 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:03:21,519 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 41.0) internal successors, (123), 3 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 134 [2021-10-28 09:03:21,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:21,532 INFO L225 Difference]: With dead ends: 8859 [2021-10-28 09:03:21,533 INFO L226 Difference]: Without dead ends: 4622 [2021-10-28 09:03:21,539 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:21,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4622 states. [2021-10-28 09:03:21,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4622 to 4582. [2021-10-28 09:03:21,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4582 states, 4580 states have (on average 1.3) internal successors, (5954), 4581 states have internal predecessors, (5954), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:21,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4582 states to 4582 states and 5954 transitions. [2021-10-28 09:03:21,978 INFO L78 Accepts]: Start accepts. Automaton has 4582 states and 5954 transitions. Word has length 134 [2021-10-28 09:03:21,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:21,978 INFO L470 AbstractCegarLoop]: Abstraction has 4582 states and 5954 transitions. [2021-10-28 09:03:21,979 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 41.0) internal successors, (123), 3 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:21,979 INFO L276 IsEmpty]: Start isEmpty. Operand 4582 states and 5954 transitions. [2021-10-28 09:03:21,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2021-10-28 09:03:21,989 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:21,989 INFO L513 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:21,990 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-10-28 09:03:21,990 INFO L402 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:21,991 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:21,992 INFO L85 PathProgramCache]: Analyzing trace with hash 713131341, now seen corresponding path program 1 times [2021-10-28 09:03:21,992 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:21,992 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2111397629] [2021-10-28 09:03:21,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:21,992 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:22,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:22,036 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2021-10-28 09:03:22,037 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:22,037 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2111397629] [2021-10-28 09:03:22,040 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2111397629] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:22,040 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:22,040 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:03:22,041 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1954920560] [2021-10-28 09:03:22,041 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:03:22,041 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:22,042 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:03:22,042 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:22,042 INFO L87 Difference]: Start difference. First operand 4582 states and 5954 transitions. Second operand has 3 states, 3 states have (on average 41.333333333333336) internal successors, (124), 3 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:22,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:22,465 INFO L93 Difference]: Finished difference Result 8798 states and 11423 transitions. [2021-10-28 09:03:22,465 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:03:22,466 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 41.333333333333336) internal successors, (124), 3 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 134 [2021-10-28 09:03:22,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:22,478 INFO L225 Difference]: With dead ends: 8798 [2021-10-28 09:03:22,478 INFO L226 Difference]: Without dead ends: 4592 [2021-10-28 09:03:22,486 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:22,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4592 states. [2021-10-28 09:03:22,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4592 to 4552. [2021-10-28 09:03:22,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4552 states, 4550 states have (on average 1.2929670329670329) internal successors, (5883), 4551 states have internal predecessors, (5883), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:22,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4552 states to 4552 states and 5883 transitions. [2021-10-28 09:03:22,941 INFO L78 Accepts]: Start accepts. Automaton has 4552 states and 5883 transitions. Word has length 134 [2021-10-28 09:03:22,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:22,941 INFO L470 AbstractCegarLoop]: Abstraction has 4552 states and 5883 transitions. [2021-10-28 09:03:22,942 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 41.333333333333336) internal successors, (124), 3 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:22,942 INFO L276 IsEmpty]: Start isEmpty. Operand 4552 states and 5883 transitions. [2021-10-28 09:03:22,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2021-10-28 09:03:22,953 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:22,953 INFO L513 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:22,954 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2021-10-28 09:03:22,954 INFO L402 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:22,954 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:22,955 INFO L85 PathProgramCache]: Analyzing trace with hash -57826629, now seen corresponding path program 1 times [2021-10-28 09:03:22,955 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:22,955 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1298497738] [2021-10-28 09:03:22,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:22,956 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:22,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:22,999 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 46 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2021-10-28 09:03:23,000 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:23,000 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1298497738] [2021-10-28 09:03:23,000 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1298497738] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:23,000 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:23,000 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:03:23,001 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2127916978] [2021-10-28 09:03:23,001 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:03:23,001 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:23,002 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:03:23,002 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:03:23,002 INFO L87 Difference]: Start difference. First operand 4552 states and 5883 transitions. Second operand has 4 states, 4 states have (on average 32.75) internal successors, (131), 4 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:23,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:23,346 INFO L93 Difference]: Finished difference Result 7397 states and 9599 transitions. [2021-10-28 09:03:23,346 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:03:23,347 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 32.75) internal successors, (131), 4 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 137 [2021-10-28 09:03:23,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:23,355 INFO L225 Difference]: With dead ends: 7397 [2021-10-28 09:03:23,355 INFO L226 Difference]: Without dead ends: 3218 [2021-10-28 09:03:23,361 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:03:23,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3218 states. [2021-10-28 09:03:23,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3218 to 3214. [2021-10-28 09:03:23,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3214 states, 3212 states have (on average 1.2655666251556663) internal successors, (4065), 3213 states have internal predecessors, (4065), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:23,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3214 states to 3214 states and 4065 transitions. [2021-10-28 09:03:23,669 INFO L78 Accepts]: Start accepts. Automaton has 3214 states and 4065 transitions. Word has length 137 [2021-10-28 09:03:23,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:23,669 INFO L470 AbstractCegarLoop]: Abstraction has 3214 states and 4065 transitions. [2021-10-28 09:03:23,669 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 32.75) internal successors, (131), 4 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:23,670 INFO L276 IsEmpty]: Start isEmpty. Operand 3214 states and 4065 transitions. [2021-10-28 09:03:23,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2021-10-28 09:03:23,675 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:23,676 INFO L513 BasicCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:23,676 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2021-10-28 09:03:23,676 INFO L402 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:23,676 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:23,676 INFO L85 PathProgramCache]: Analyzing trace with hash -76782736, now seen corresponding path program 1 times [2021-10-28 09:03:23,676 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:23,677 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1594544959] [2021-10-28 09:03:23,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:23,677 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:23,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:23,715 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2021-10-28 09:03:23,716 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:23,716 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1594544959] [2021-10-28 09:03:23,716 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1594544959] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:23,716 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:23,716 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 09:03:23,716 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1965234751] [2021-10-28 09:03:23,717 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 09:03:23,717 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:23,717 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 09:03:23,717 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 09:03:23,718 INFO L87 Difference]: Start difference. First operand 3214 states and 4065 transitions. Second operand has 4 states, 4 states have (on average 32.5) internal successors, (130), 4 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:23,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:23,924 INFO L93 Difference]: Finished difference Result 5216 states and 6609 transitions. [2021-10-28 09:03:23,925 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 09:03:23,925 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 32.5) internal successors, (130), 4 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 137 [2021-10-28 09:03:23,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:23,927 INFO L225 Difference]: With dead ends: 5216 [2021-10-28 09:03:23,927 INFO L226 Difference]: Without dead ends: 2075 [2021-10-28 09:03:23,931 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 09:03:23,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2075 states. [2021-10-28 09:03:24,078 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2075 to 2071. [2021-10-28 09:03:24,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2071 states, 2069 states have (on average 1.2290961817303045) internal successors, (2543), 2070 states have internal predecessors, (2543), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:24,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2071 states to 2071 states and 2543 transitions. [2021-10-28 09:03:24,083 INFO L78 Accepts]: Start accepts. Automaton has 2071 states and 2543 transitions. Word has length 137 [2021-10-28 09:03:24,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:24,083 INFO L470 AbstractCegarLoop]: Abstraction has 2071 states and 2543 transitions. [2021-10-28 09:03:24,083 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 32.5) internal successors, (130), 4 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:24,083 INFO L276 IsEmpty]: Start isEmpty. Operand 2071 states and 2543 transitions. [2021-10-28 09:03:24,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2021-10-28 09:03:24,086 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:24,086 INFO L513 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:24,086 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2021-10-28 09:03:24,087 INFO L402 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:24,087 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:24,087 INFO L85 PathProgramCache]: Analyzing trace with hash 373327418, now seen corresponding path program 1 times [2021-10-28 09:03:24,088 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:24,088 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [688792280] [2021-10-28 09:03:24,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:24,088 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:24,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:24,138 INFO L134 CoverageAnalysis]: Checked inductivity of 103 backedges. 77 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2021-10-28 09:03:24,139 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:24,139 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [688792280] [2021-10-28 09:03:24,139 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [688792280] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:24,139 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:24,139 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:03:24,140 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [414932242] [2021-10-28 09:03:24,140 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:03:24,140 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:24,141 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:03:24,141 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:24,141 INFO L87 Difference]: Start difference. First operand 2071 states and 2543 transitions. Second operand has 3 states, 3 states have (on average 54.0) internal successors, (162), 3 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:24,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:24,341 INFO L93 Difference]: Finished difference Result 3759 states and 4649 transitions. [2021-10-28 09:03:24,341 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:03:24,341 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 54.0) internal successors, (162), 3 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 176 [2021-10-28 09:03:24,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:24,343 INFO L225 Difference]: With dead ends: 3759 [2021-10-28 09:03:24,343 INFO L226 Difference]: Without dead ends: 2029 [2021-10-28 09:03:24,345 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:24,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2029 states. [2021-10-28 09:03:24,538 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2029 to 1941. [2021-10-28 09:03:24,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1941 states, 1939 states have (on average 1.2093862815884477) internal successors, (2345), 1940 states have internal predecessors, (2345), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:24,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1941 states to 1941 states and 2345 transitions. [2021-10-28 09:03:24,545 INFO L78 Accepts]: Start accepts. Automaton has 1941 states and 2345 transitions. Word has length 176 [2021-10-28 09:03:24,545 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:24,546 INFO L470 AbstractCegarLoop]: Abstraction has 1941 states and 2345 transitions. [2021-10-28 09:03:24,546 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 54.0) internal successors, (162), 3 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:24,546 INFO L276 IsEmpty]: Start isEmpty. Operand 1941 states and 2345 transitions. [2021-10-28 09:03:24,549 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 183 [2021-10-28 09:03:24,550 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:24,550 INFO L513 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:24,550 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2021-10-28 09:03:24,551 INFO L402 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:24,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:24,551 INFO L85 PathProgramCache]: Analyzing trace with hash 1072981429, now seen corresponding path program 1 times [2021-10-28 09:03:24,552 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:24,552 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1716360494] [2021-10-28 09:03:24,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:24,552 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:24,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:24,595 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 82 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-10-28 09:03:24,595 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:24,595 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1716360494] [2021-10-28 09:03:24,596 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1716360494] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:24,596 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:24,596 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:03:24,596 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [914208168] [2021-10-28 09:03:24,597 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:03:24,597 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:24,598 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:03:24,598 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:24,598 INFO L87 Difference]: Start difference. First operand 1941 states and 2345 transitions. Second operand has 3 states, 3 states have (on average 56.333333333333336) internal successors, (169), 3 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:24,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:24,987 INFO L93 Difference]: Finished difference Result 4180 states and 5086 transitions. [2021-10-28 09:03:24,987 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:03:24,988 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 56.333333333333336) internal successors, (169), 3 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 182 [2021-10-28 09:03:24,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:24,992 INFO L225 Difference]: With dead ends: 4180 [2021-10-28 09:03:24,993 INFO L226 Difference]: Without dead ends: 2576 [2021-10-28 09:03:24,995 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:24,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2576 states. [2021-10-28 09:03:25,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2576 to 2219. [2021-10-28 09:03:25,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2219 states, 2217 states have (on average 1.1930536761389265) internal successors, (2645), 2218 states have internal predecessors, (2645), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:25,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2219 states to 2219 states and 2645 transitions. [2021-10-28 09:03:25,322 INFO L78 Accepts]: Start accepts. Automaton has 2219 states and 2645 transitions. Word has length 182 [2021-10-28 09:03:25,323 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:25,323 INFO L470 AbstractCegarLoop]: Abstraction has 2219 states and 2645 transitions. [2021-10-28 09:03:25,323 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 56.333333333333336) internal successors, (169), 3 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:25,324 INFO L276 IsEmpty]: Start isEmpty. Operand 2219 states and 2645 transitions. [2021-10-28 09:03:25,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2021-10-28 09:03:25,328 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:25,328 INFO L513 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:25,328 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-10-28 09:03:25,329 INFO L402 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:25,329 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:25,329 INFO L85 PathProgramCache]: Analyzing trace with hash 1005799718, now seen corresponding path program 1 times [2021-10-28 09:03:25,330 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:25,330 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [336366714] [2021-10-28 09:03:25,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:25,330 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:25,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:25,381 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 79 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2021-10-28 09:03:25,382 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:25,382 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [336366714] [2021-10-28 09:03:25,383 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [336366714] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:25,383 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:25,384 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:03:25,384 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1104519267] [2021-10-28 09:03:25,385 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:03:25,385 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:25,386 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:03:25,386 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:25,387 INFO L87 Difference]: Start difference. First operand 2219 states and 2645 transitions. Second operand has 3 states, 3 states have (on average 56.666666666666664) internal successors, (170), 3 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:25,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:25,673 INFO L93 Difference]: Finished difference Result 3766 states and 4524 transitions. [2021-10-28 09:03:25,673 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:03:25,674 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 56.666666666666664) internal successors, (170), 3 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 185 [2021-10-28 09:03:25,674 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:25,677 INFO L225 Difference]: With dead ends: 3766 [2021-10-28 09:03:25,677 INFO L226 Difference]: Without dead ends: 1882 [2021-10-28 09:03:25,681 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:25,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1882 states. [2021-10-28 09:03:25,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1882 to 1803. [2021-10-28 09:03:25,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1803 states, 1801 states have (on average 1.1765685730149917) internal successors, (2119), 1802 states have internal predecessors, (2119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:25,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1803 states to 1803 states and 2119 transitions. [2021-10-28 09:03:25,957 INFO L78 Accepts]: Start accepts. Automaton has 1803 states and 2119 transitions. Word has length 185 [2021-10-28 09:03:25,957 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:25,958 INFO L470 AbstractCegarLoop]: Abstraction has 1803 states and 2119 transitions. [2021-10-28 09:03:25,958 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 56.666666666666664) internal successors, (170), 3 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:25,958 INFO L276 IsEmpty]: Start isEmpty. Operand 1803 states and 2119 transitions. [2021-10-28 09:03:25,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2021-10-28 09:03:25,962 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:25,963 INFO L513 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:25,963 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2021-10-28 09:03:25,964 INFO L402 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:25,964 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:25,964 INFO L85 PathProgramCache]: Analyzing trace with hash -1330592792, now seen corresponding path program 1 times [2021-10-28 09:03:25,965 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:25,965 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1177989721] [2021-10-28 09:03:25,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:25,965 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:25,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:26,052 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 107 trivial. 0 not checked. [2021-10-28 09:03:26,053 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:26,053 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1177989721] [2021-10-28 09:03:26,053 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1177989721] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 09:03:26,053 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 09:03:26,054 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 09:03:26,054 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [27325064] [2021-10-28 09:03:26,054 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 09:03:26,055 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:26,055 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 09:03:26,055 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:26,056 INFO L87 Difference]: Start difference. First operand 1803 states and 2119 transitions. Second operand has 3 states, 3 states have (on average 44.333333333333336) internal successors, (133), 3 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:26,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:26,400 INFO L93 Difference]: Finished difference Result 1817 states and 2136 transitions. [2021-10-28 09:03:26,400 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 09:03:26,400 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 44.333333333333336) internal successors, (133), 3 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 185 [2021-10-28 09:03:26,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:26,404 INFO L225 Difference]: With dead ends: 1817 [2021-10-28 09:03:26,404 INFO L226 Difference]: Without dead ends: 1815 [2021-10-28 09:03:26,405 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 09:03:26,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1815 states. [2021-10-28 09:03:26,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1815 to 1807. [2021-10-28 09:03:26,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1807 states, 1805 states have (on average 1.1761772853185595) internal successors, (2123), 1806 states have internal predecessors, (2123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:26,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1807 states to 1807 states and 2123 transitions. [2021-10-28 09:03:26,706 INFO L78 Accepts]: Start accepts. Automaton has 1807 states and 2123 transitions. Word has length 185 [2021-10-28 09:03:26,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:26,707 INFO L470 AbstractCegarLoop]: Abstraction has 1807 states and 2123 transitions. [2021-10-28 09:03:26,707 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 44.333333333333336) internal successors, (133), 3 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:26,707 INFO L276 IsEmpty]: Start isEmpty. Operand 1807 states and 2123 transitions. [2021-10-28 09:03:26,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2021-10-28 09:03:26,711 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:26,712 INFO L513 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:26,712 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2021-10-28 09:03:26,712 INFO L402 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:26,713 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:26,713 INFO L85 PathProgramCache]: Analyzing trace with hash -1330591190, now seen corresponding path program 1 times [2021-10-28 09:03:26,713 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:26,713 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [449909974] [2021-10-28 09:03:26,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:26,714 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:26,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:27,021 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 0 proven. 96 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2021-10-28 09:03:27,022 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 09:03:27,022 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [449909974] [2021-10-28 09:03:27,022 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [449909974] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:03:27,023 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [191527215] [2021-10-28 09:03:27,023 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:27,023 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 09:03:27,023 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg/z3 [2021-10-28 09:03:27,031 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 09:03:27,038 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-10-28 09:03:27,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 09:03:27,191 INFO L263 TraceCheckSpWp]: Trace formula consists of 528 conjuncts, 20 conjunts are in the unsatisfiable core [2021-10-28 09:03:27,214 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 09:03:28,145 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 81 proven. 15 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2021-10-28 09:03:28,146 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [191527215] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 09:03:28,146 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 09:03:28,146 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10] total 19 [2021-10-28 09:03:28,147 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [48766969] [2021-10-28 09:03:28,147 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2021-10-28 09:03:28,148 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 09:03:28,148 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2021-10-28 09:03:28,149 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=299, Unknown=0, NotChecked=0, Total=342 [2021-10-28 09:03:28,149 INFO L87 Difference]: Start difference. First operand 1807 states and 2123 transitions. Second operand has 19 states, 19 states have (on average 18.63157894736842) internal successors, (354), 19 states have internal predecessors, (354), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:29,675 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 09:03:29,676 INFO L93 Difference]: Finished difference Result 5673 states and 6674 transitions. [2021-10-28 09:03:29,676 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2021-10-28 09:03:29,677 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 18.63157894736842) internal successors, (354), 19 states have internal predecessors, (354), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 185 [2021-10-28 09:03:29,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 09:03:29,684 INFO L225 Difference]: With dead ends: 5673 [2021-10-28 09:03:29,684 INFO L226 Difference]: Without dead ends: 4128 [2021-10-28 09:03:29,688 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 228 GetRequests, 189 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 244 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=223, Invalid=1417, Unknown=0, NotChecked=0, Total=1640 [2021-10-28 09:03:29,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4128 states. [2021-10-28 09:03:30,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4128 to 2487. [2021-10-28 09:03:30,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2487 states, 2485 states have (on average 1.173440643863179) internal successors, (2916), 2486 states have internal predecessors, (2916), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:30,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2487 states to 2487 states and 2916 transitions. [2021-10-28 09:03:30,138 INFO L78 Accepts]: Start accepts. Automaton has 2487 states and 2916 transitions. Word has length 185 [2021-10-28 09:03:30,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 09:03:30,139 INFO L470 AbstractCegarLoop]: Abstraction has 2487 states and 2916 transitions. [2021-10-28 09:03:30,139 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 18.63157894736842) internal successors, (354), 19 states have internal predecessors, (354), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 09:03:30,139 INFO L276 IsEmpty]: Start isEmpty. Operand 2487 states and 2916 transitions. [2021-10-28 09:03:30,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 187 [2021-10-28 09:03:30,143 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 09:03:30,144 INFO L513 BasicCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:30,195 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-10-28 09:03:30,361 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable33 [2021-10-28 09:03:30,361 INFO L402 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION] === [2021-10-28 09:03:30,362 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 09:03:30,362 INFO L85 PathProgramCache]: Analyzing trace with hash 1701344696, now seen corresponding path program 1 times [2021-10-28 09:03:30,362 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 09:03:30,362 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [264352528] [2021-10-28 09:03:30,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 09:03:30,363 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 09:03:30,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:03:30,418 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 09:03:30,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 09:03:30,569 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 09:03:30,570 INFO L627 BasicCegarLoop]: Counterexample is feasible [2021-10-28 09:03:30,571 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:03:30,574 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 09:03:30,574 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2021-10-28 09:03:30,578 INFO L731 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 09:03:30,583 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-10-28 09:03:30,859 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.10 09:03:30 BoogieIcfgContainer [2021-10-28 09:03:30,859 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-10-28 09:03:30,860 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-28 09:03:30,860 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-28 09:03:30,861 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-28 09:03:30,862 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 09:03:05" (3/4) ... [2021-10-28 09:03:30,867 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-10-28 09:03:31,164 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg/witness.graphml [2021-10-28 09:03:31,164 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-28 09:03:31,167 INFO L168 Benchmark]: Toolchain (without parser) took 26541.93 ms. Allocated memory was 94.4 MB in the beginning and 2.1 GB in the end (delta: 2.0 GB). Free memory was 65.0 MB in the beginning and 837.9 MB in the end (delta: -772.9 MB). Peak memory consumption was 1.2 GB. Max. memory is 16.1 GB. [2021-10-28 09:03:31,167 INFO L168 Benchmark]: CDTParser took 0.36 ms. Allocated memory is still 94.4 MB. Free memory is still 53.0 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-10-28 09:03:31,168 INFO L168 Benchmark]: CACSL2BoogieTranslator took 450.48 ms. Allocated memory was 94.4 MB in the beginning and 123.7 MB in the end (delta: 29.4 MB). Free memory was 64.7 MB in the beginning and 96.0 MB in the end (delta: -31.3 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. [2021-10-28 09:03:31,169 INFO L168 Benchmark]: Boogie Procedure Inliner took 67.28 ms. Allocated memory is still 123.7 MB. Free memory was 96.0 MB in the beginning and 93.6 MB in the end (delta: 2.4 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 09:03:31,169 INFO L168 Benchmark]: Boogie Preprocessor took 75.03 ms. Allocated memory is still 123.7 MB. Free memory was 93.6 MB in the beginning and 91.9 MB in the end (delta: 1.6 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 09:03:31,169 INFO L168 Benchmark]: RCFGBuilder took 773.25 ms. Allocated memory is still 123.7 MB. Free memory was 91.5 MB in the beginning and 71.6 MB in the end (delta: 19.9 MB). Peak memory consumption was 18.9 MB. Max. memory is 16.1 GB. [2021-10-28 09:03:31,170 INFO L168 Benchmark]: TraceAbstraction took 24862.93 ms. Allocated memory was 123.7 MB in the beginning and 2.1 GB in the end (delta: 2.0 GB). Free memory was 71.0 MB in the beginning and 874.6 MB in the end (delta: -803.6 MB). Peak memory consumption was 1.2 GB. Max. memory is 16.1 GB. [2021-10-28 09:03:31,170 INFO L168 Benchmark]: Witness Printer took 304.58 ms. Allocated memory is still 2.1 GB. Free memory was 874.6 MB in the beginning and 837.9 MB in the end (delta: 36.7 MB). Peak memory consumption was 35.7 MB. Max. memory is 16.1 GB. [2021-10-28 09:03:31,174 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.36 ms. Allocated memory is still 94.4 MB. Free memory is still 53.0 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 450.48 ms. Allocated memory was 94.4 MB in the beginning and 123.7 MB in the end (delta: 29.4 MB). Free memory was 64.7 MB in the beginning and 96.0 MB in the end (delta: -31.3 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 67.28 ms. Allocated memory is still 123.7 MB. Free memory was 96.0 MB in the beginning and 93.6 MB in the end (delta: 2.4 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 75.03 ms. Allocated memory is still 123.7 MB. Free memory was 93.6 MB in the beginning and 91.9 MB in the end (delta: 1.6 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 773.25 ms. Allocated memory is still 123.7 MB. Free memory was 91.5 MB in the beginning and 71.6 MB in the end (delta: 19.9 MB). Peak memory consumption was 18.9 MB. Max. memory is 16.1 GB. * TraceAbstraction took 24862.93 ms. Allocated memory was 123.7 MB in the beginning and 2.1 GB in the end (delta: 2.0 GB). Free memory was 71.0 MB in the beginning and 874.6 MB in the end (delta: -803.6 MB). Peak memory consumption was 1.2 GB. Max. memory is 16.1 GB. * Witness Printer took 304.58 ms. Allocated memory is still 2.1 GB. Free memory was 874.6 MB in the beginning and 837.9 MB in the end (delta: 36.7 MB). Peak memory consumption was 35.7 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 15]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L20] int c ; [L21] int c_t ; [L22] int c_req_up ; [L23] int p_in ; [L24] int p_out ; [L25] int wl_st ; [L26] int c1_st ; [L27] int c2_st ; [L28] int wb_st ; [L29] int r_st ; [L30] int wl_i ; [L31] int c1_i ; [L32] int c2_i ; [L33] int wb_i ; [L34] int r_i ; [L35] int wl_pc ; [L36] int c1_pc ; [L37] int c2_pc ; [L38] int wb_pc ; [L39] int e_e ; [L40] int e_f ; [L41] int e_g ; [L42] int e_c ; [L43] int e_p_in ; [L44] int e_wl ; [L50] int d ; [L51] int data ; [L52] int processed ; [L53] static int t_b ; VAL [c=0, c1_i=0, c1_pc=0, c1_st=0, c2_i=0, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=0, e_e=0, e_f=0, e_g=0, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=0, wb_pc=0, wb_st=0, wl_i=0, wl_pc=0, wl_st=0] [L693] int __retres1 ; [L697] e_wl = 2 [L698] e_c = e_wl [L699] e_g = e_c [L700] e_f = e_g [L701] e_e = e_f [L702] wl_pc = 0 [L703] c1_pc = 0 [L704] c2_pc = 0 [L705] wb_pc = 0 [L706] wb_i = 1 [L707] c2_i = wb_i [L708] c1_i = c2_i [L709] wl_i = c1_i [L710] r_i = 0 [L711] c_req_up = 0 [L712] d = 0 [L713] c = 0 [L404] int kernel_st ; [L407] kernel_st = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L408] COND FALSE !((int )c_req_up == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L419] COND TRUE (int )wl_i == 1 [L420] wl_st = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L424] COND TRUE (int )c1_i == 1 [L425] c1_st = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L429] COND TRUE (int )c2_i == 1 [L430] c2_st = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L434] COND TRUE (int )wb_i == 1 [L435] wb_st = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L439] COND FALSE !((int )r_i == 1) [L442] r_st = 2 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L444] COND FALSE !((int )e_f == 0) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L449] COND FALSE !((int )e_g == 0) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L454] COND FALSE !((int )e_e == 0) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L459] COND FALSE !((int )e_c == 0) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L464] COND FALSE !((int )e_wl == 0) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L469] COND FALSE !((int )wl_pc == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L477] COND FALSE !((int )wl_pc == 2) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L487] COND FALSE !((int )c1_pc == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L496] COND FALSE !((int )c2_pc == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L505] COND FALSE !((int )wb_pc == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L514] COND FALSE !((int )e_c == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L519] COND FALSE !((int )e_e == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L524] COND FALSE !((int )e_f == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L529] COND FALSE !((int )e_g == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L534] COND FALSE !((int )e_c == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L539] COND FALSE !((int )e_wl == 1) VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L545] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L548] kernel_st = 1 [L290] int tmp ; [L291] int tmp___0 ; [L292] int tmp___1 ; [L293] int tmp___2 ; [L294] int tmp___3 ; VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L298] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L300] COND TRUE (int )wl_st == 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L321] COND TRUE (int )wl_st == 0 [L323] tmp = __VERIFIER_nondet_int() [L325] COND TRUE \read(tmp) [L327] wl_st = 1 [L55] int t ; VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=1] [L58] COND TRUE (int )wl_pc == 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=1] [L72] wl_st = 2 [L73] wl_pc = 1 [L74] e_wl = 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L336] COND TRUE (int )c1_st == 0 [L338] tmp___0 = __VERIFIER_nondet_int() [L340] COND TRUE \read(tmp___0) [L342] c1_st = 1 VAL [c=0, c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L141] COND TRUE (int )c1_pc == 0 VAL [c=0, c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L152] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L154] c1_st = 2 [L155] c1_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L351] COND TRUE (int )c2_st == 0 [L353] tmp___1 = __VERIFIER_nondet_int() [L355] COND TRUE \read(tmp___1) [L357] c2_st = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L186] COND TRUE (int )c2_pc == 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L197] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L199] c2_st = 2 [L200] c2_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L366] COND TRUE (int )wb_st == 0 [L368] tmp___2 = __VERIFIER_nondet_int() [L370] COND TRUE \read(tmp___2) [L372] wb_st = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L231] COND TRUE (int )wb_pc == 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L242] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L244] wb_st = 2 [L245] wb_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L381] COND FALSE !((int )r_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L298] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L300] COND FALSE !((int )wl_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L303] COND FALSE !((int )c1_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L306] COND FALSE !((int )c2_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L309] COND FALSE !((int )wb_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L312] COND FALSE !((int )r_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L551] kernel_st = 2 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L552] COND FALSE !((int )c_req_up == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L563] kernel_st = 3 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L564] COND FALSE !((int )e_f == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L569] COND FALSE !((int )e_g == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L574] COND FALSE !((int )e_e == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L579] COND FALSE !((int )e_c == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L584] COND TRUE (int )e_wl == 0 [L585] e_wl = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L589] COND TRUE (int )wl_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L590] COND TRUE (int )e_wl == 1 [L591] wl_st = 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L607] COND TRUE (int )c1_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L608] COND FALSE !((int )e_f == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L616] COND TRUE (int )c2_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L617] COND FALSE !((int )e_f == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L625] COND TRUE (int )wb_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L626] COND FALSE !((int )e_g == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L634] COND FALSE !((int )e_c == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L639] COND FALSE !((int )e_e == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L644] COND FALSE !((int )e_f == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L649] COND FALSE !((int )e_g == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L654] COND FALSE !((int )e_c == 1) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L659] COND TRUE (int )e_wl == 1 [L660] e_wl = 2 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L664] COND TRUE (int )wl_st == 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L545] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L548] kernel_st = 1 [L290] int tmp ; [L291] int tmp___0 ; [L292] int tmp___1 ; [L293] int tmp___2 ; [L294] int tmp___3 ; VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L298] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L300] COND TRUE (int )wl_st == 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L321] COND TRUE (int )wl_st == 0 [L323] tmp = __VERIFIER_nondet_int() [L325] COND TRUE \read(tmp) [L327] wl_st = 1 [L55] int t ; VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L58] COND FALSE !((int )wl_pc == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L61] COND FALSE !((int )wl_pc == 2) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L64] COND TRUE (int )wl_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L79] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L81] t = d [L82] data = d [L83] processed = 0 [L84] e_f = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L85] COND TRUE (int )c1_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L86] COND TRUE (int )e_f == 1 [L87] c1_st = 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L94] COND TRUE (int )c2_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L95] COND TRUE (int )e_f == 1 [L96] c2_st = 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L103] e_f = 2 [L104] wl_st = 2 [L105] wl_pc = 2 [L106] t_b = t VAL [c=0, c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L336] COND TRUE (int )c1_st == 0 [L338] tmp___0 = __VERIFIER_nondet_int() [L340] COND TRUE \read(tmp___0) [L342] c1_st = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L141] COND FALSE !((int )c1_pc == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L144] COND TRUE (int )c1_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L159] COND TRUE ! processed [L160] data += 1 [L161] e_g = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L162] COND TRUE (int )wb_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L163] COND TRUE (int )e_g == 1 [L164] wb_st = 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L171] e_g = 2 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L152] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L154] c1_st = 2 [L155] c1_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L351] COND TRUE (int )c2_st == 0 [L353] tmp___1 = __VERIFIER_nondet_int() [L355] COND TRUE \read(tmp___1) [L357] c2_st = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L186] COND FALSE !((int )c2_pc == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L189] COND TRUE (int )c2_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L204] COND TRUE ! processed [L205] data += 1 [L206] e_g = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L207] COND TRUE (int )wb_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L208] COND TRUE (int )e_g == 1 [L209] wb_st = 0 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L216] e_g = 2 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L197] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L199] c2_st = 2 [L200] c2_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L366] COND TRUE (int )wb_st == 0 [L368] tmp___2 = __VERIFIER_nondet_int() [L370] COND TRUE \read(tmp___2) [L372] wb_st = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L231] COND FALSE !((int )wb_pc == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L234] COND TRUE (int )wb_pc == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L249] c_t = data [L250] c_req_up = 1 [L251] processed = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L242] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L244] wb_st = 2 [L245] wb_pc = 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L381] COND FALSE !((int )r_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L298] COND TRUE 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L300] COND FALSE !((int )wl_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L303] COND FALSE !((int )c1_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L306] COND FALSE !((int )c2_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L309] COND FALSE !((int )wb_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L312] COND FALSE !((int )r_st == 0) VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L551] kernel_st = 2 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L552] COND TRUE (int )c_req_up == 1 VAL [c=0, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L553] COND TRUE c != c_t [L554] c = c_t [L555] e_c = 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=1, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L559] c_req_up = 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L563] kernel_st = 3 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L564] COND FALSE !((int )e_f == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L569] COND FALSE !((int )e_g == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L574] COND FALSE !((int )e_e == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L579] COND TRUE (int )e_c == 0 [L580] e_c = 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L584] COND FALSE !((int )e_wl == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L589] COND FALSE !((int )wl_pc == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L597] COND TRUE (int )wl_pc == 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L598] COND FALSE !((int )e_e == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L607] COND TRUE (int )c1_pc == 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L608] COND FALSE !((int )e_f == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L616] COND TRUE (int )c2_pc == 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L617] COND FALSE !((int )e_f == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L625] COND TRUE (int )wb_pc == 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L626] COND FALSE !((int )e_g == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L634] COND TRUE (int )e_c == 1 [L635] r_st = 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L639] COND FALSE !((int )e_e == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L644] COND FALSE !((int )e_f == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L649] COND FALSE !((int )e_g == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L654] COND TRUE (int )e_c == 1 [L655] e_c = 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L659] COND FALSE !((int )e_wl == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L664] COND FALSE !((int )wl_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L667] COND FALSE !((int )c1_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L670] COND FALSE !((int )c2_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L673] COND FALSE !((int )wb_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L676] COND TRUE (int )r_st == 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L545] COND TRUE 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L548] kernel_st = 1 [L290] int tmp ; [L291] int tmp___0 ; [L292] int tmp___1 ; [L293] int tmp___2 ; [L294] int tmp___3 ; VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L298] COND TRUE 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L300] COND FALSE !((int )wl_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L303] COND FALSE !((int )c1_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L306] COND FALSE !((int )c2_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L309] COND FALSE !((int )wb_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L312] COND TRUE (int )r_st == 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L321] COND FALSE !((int )wl_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L336] COND FALSE !((int )c1_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L351] COND FALSE !((int )c2_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L366] COND FALSE !((int )wb_st == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L381] COND TRUE (int )r_st == 0 [L383] tmp___3 = __VERIFIER_nondet_int() [L385] COND TRUE \read(tmp___3) [L387] r_st = 1 [L263] d = c [L264] e_e = 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L265] COND FALSE !((int )wl_pc == 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L273] COND TRUE (int )wl_pc == 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L274] COND TRUE (int )e_e == 1 [L275] wl_st = 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L283] e_e = 2 [L284] r_st = 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L298] COND TRUE 1 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L300] COND TRUE (int )wl_st == 0 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L321] COND TRUE (int )wl_st == 0 [L323] tmp = __VERIFIER_nondet_int() [L325] COND TRUE \read(tmp) [L327] wl_st = 1 [L55] int t ; VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L58] COND FALSE !((int )wl_pc == 0) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L61] COND TRUE (int )wl_pc == 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L110] t = t_b VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L111] COND FALSE !(d == t + 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L114] COND TRUE d == t + 2 VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L122] COND FALSE !(d == t + 1) VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L15] reach_error() VAL [c=2, c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] - UnprovableResult [Line: 15]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 129 locations, 2 error locations. Started 1 CEGAR loops. OverallTime: 24.5s, OverallIterations: 35, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 11.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 7212 SDtfs, 9463 SDslu, 10236 SDs, 0 SdLazy, 1253 SolverSat, 255 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 371 GetRequests, 269 SyntacticMatches, 0 SemanticMatches, 102 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 245 ImplicationChecksByTransitivity, 0.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=5348occurred in iteration=21, InterpolantAutomatonStates: 154, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 8.4s AutomataMinimizationTime, 34 MinimizatonAttempts, 6041 StatesRemovedByMinimization, 28 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 2.4s InterpolantComputationTime, 3190 NumberOfCodeBlocks, 3190 NumberOfCodeBlocksAsserted, 36 NumberOfCheckSat, 2969 ConstructedInterpolants, 0 QuantifiedInterpolants, 5855 SizeOfPredicates, 6 NumberOfNonLiveVariables, 528 ConjunctsInSsa, 20 ConjunctsInUnsatCore, 35 InterpolantComputations, 33 PerfectInterpolantSequences, 914/1025 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-10-28 09:03:31,243 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_009328f0-4207-4b5d-a6fd-0a267400169d/bin/uautomizer-UnR33cPsHg/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...