./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-restricted-15/NO_22.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version b2eff8ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-restricted-15/NO_22.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 2aebec197cf7bd355d2eb5f718c983de149eae8f5ff2da107813d58a220d4744 ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM) --- Real Ultimate output --- This is Ultimate 0.2.1-dev-b2eff8b [2021-10-28 23:14:52,979 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-28 23:14:52,982 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-28 23:14:53,030 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-28 23:14:53,031 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-28 23:14:53,033 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-28 23:14:53,035 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-28 23:14:53,038 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-28 23:14:53,041 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-28 23:14:53,043 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-28 23:14:53,044 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-28 23:14:53,046 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-28 23:14:53,047 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-28 23:14:53,048 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-28 23:14:53,050 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-28 23:14:53,052 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-28 23:14:53,054 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-28 23:14:53,055 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-28 23:14:53,058 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-28 23:14:53,061 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-28 23:14:53,063 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-28 23:14:53,066 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-28 23:14:53,067 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-28 23:14:53,069 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-28 23:14:53,073 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-28 23:14:53,074 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-28 23:14:53,074 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-28 23:14:53,076 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-28 23:14:53,077 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-28 23:14:53,078 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-28 23:14:53,079 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-28 23:14:53,080 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-28 23:14:53,082 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-28 23:14:53,083 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-28 23:14:53,085 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-28 23:14:53,086 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-28 23:14:53,087 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-28 23:14:53,087 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-28 23:14:53,088 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-28 23:14:53,089 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-28 23:14:53,090 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-28 23:14:53,091 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/config/svcomp-Termination-64bit-Automizer_Default.epf [2021-10-28 23:14:53,123 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-28 23:14:53,124 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-28 23:14:53,124 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-28 23:14:53,124 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-28 23:14:53,126 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-28 23:14:53,126 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-28 23:14:53,126 INFO L138 SettingsManager]: * Use SBE=true [2021-10-28 23:14:53,126 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-10-28 23:14:53,127 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-10-28 23:14:53,127 INFO L138 SettingsManager]: * Use old map elimination=false [2021-10-28 23:14:53,127 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-10-28 23:14:53,127 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-10-28 23:14:53,128 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-10-28 23:14:53,128 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-28 23:14:53,128 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-10-28 23:14:53,128 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-28 23:14:53,129 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-28 23:14:53,129 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-10-28 23:14:53,129 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-10-28 23:14:53,129 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-10-28 23:14:53,130 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-28 23:14:53,130 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-10-28 23:14:53,130 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-28 23:14:53,130 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-10-28 23:14:53,130 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-28 23:14:53,131 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-28 23:14:53,131 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-28 23:14:53,131 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-28 23:14:53,131 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-28 23:14:53,132 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-10-28 23:14:53,132 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2aebec197cf7bd355d2eb5f718c983de149eae8f5ff2da107813d58a220d4744 [2021-10-28 23:14:53,425 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-28 23:14:53,459 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-28 23:14:53,461 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-28 23:14:53,466 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-28 23:14:53,467 INFO L275 PluginConnector]: CDTParser initialized [2021-10-28 23:14:53,468 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/../../sv-benchmarks/c/termination-restricted-15/NO_22.c [2021-10-28 23:14:53,563 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/data/d637d5f5e/97d5706ee32d49e2989479e6a2ac8e0b/FLAG99c4ec65a [2021-10-28 23:14:54,173 INFO L306 CDTParser]: Found 1 translation units. [2021-10-28 23:14:54,175 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/sv-benchmarks/c/termination-restricted-15/NO_22.c [2021-10-28 23:14:54,197 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/data/d637d5f5e/97d5706ee32d49e2989479e6a2ac8e0b/FLAG99c4ec65a [2021-10-28 23:14:54,529 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/data/d637d5f5e/97d5706ee32d49e2989479e6a2ac8e0b [2021-10-28 23:14:54,532 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-28 23:14:54,534 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-28 23:14:54,536 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-28 23:14:54,536 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-28 23:14:54,540 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-28 23:14:54,541 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 11:14:54" (1/1) ... [2021-10-28 23:14:54,543 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@33fc8bc0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:14:54, skipping insertion in model container [2021-10-28 23:14:54,543 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 11:14:54" (1/1) ... [2021-10-28 23:14:54,552 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-28 23:14:54,565 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-28 23:14:54,751 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 23:14:54,755 INFO L203 MainTranslator]: Completed pre-run [2021-10-28 23:14:54,768 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 23:14:54,781 INFO L208 MainTranslator]: Completed translation [2021-10-28 23:14:54,782 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:14:54 WrapperNode [2021-10-28 23:14:54,782 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-28 23:14:54,783 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-28 23:14:54,783 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-28 23:14:54,784 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-28 23:14:54,791 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:14:54" (1/1) ... [2021-10-28 23:14:54,797 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:14:54" (1/1) ... [2021-10-28 23:14:54,816 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-28 23:14:54,817 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-28 23:14:54,817 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-28 23:14:54,817 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-28 23:14:54,827 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:14:54" (1/1) ... [2021-10-28 23:14:54,827 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:14:54" (1/1) ... [2021-10-28 23:14:54,828 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:14:54" (1/1) ... [2021-10-28 23:14:54,829 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:14:54" (1/1) ... [2021-10-28 23:14:54,831 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:14:54" (1/1) ... [2021-10-28 23:14:54,835 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:14:54" (1/1) ... [2021-10-28 23:14:54,836 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:14:54" (1/1) ... [2021-10-28 23:14:54,837 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-28 23:14:54,838 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-28 23:14:54,838 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-28 23:14:54,839 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-28 23:14:54,840 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:14:54" (1/1) ... [2021-10-28 23:14:54,849 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:54,861 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:54,878 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:14:54,881 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-10-28 23:14:54,924 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-28 23:14:54,925 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-28 23:14:55,074 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-28 23:14:55,076 INFO L299 CfgBuilder]: Removed 5 assume(true) statements. [2021-10-28 23:14:55,081 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 11:14:55 BoogieIcfgContainer [2021-10-28 23:14:55,082 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-28 23:14:55,085 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-10-28 23:14:55,086 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-10-28 23:14:55,090 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-10-28 23:14:55,091 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-28 23:14:55,092 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 28.10 11:14:54" (1/3) ... [2021-10-28 23:14:55,094 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@71825bdb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.10 11:14:55, skipping insertion in model container [2021-10-28 23:14:55,094 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-28 23:14:55,094 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:14:54" (2/3) ... [2021-10-28 23:14:55,095 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@71825bdb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.10 11:14:55, skipping insertion in model container [2021-10-28 23:14:55,095 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-28 23:14:55,097 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 11:14:55" (3/3) ... [2021-10-28 23:14:55,099 INFO L389 chiAutomizerObserver]: Analyzing ICFG NO_22.c [2021-10-28 23:14:55,168 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-10-28 23:14:55,168 INFO L360 BuchiCegarLoop]: Hoare is false [2021-10-28 23:14:55,168 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-10-28 23:14:55,168 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-10-28 23:14:55,169 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-10-28 23:14:55,169 INFO L364 BuchiCegarLoop]: Difference is false [2021-10-28 23:14:55,169 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-10-28 23:14:55,169 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-10-28 23:14:55,186 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 7 states, 6 states have (on average 1.5) internal successors, (9), 6 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:55,210 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-10-28 23:14:55,210 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:14:55,210 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:14:55,217 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1] [2021-10-28 23:14:55,217 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-10-28 23:14:55,217 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-10-28 23:14:55,218 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 7 states, 6 states have (on average 1.5) internal successors, (9), 6 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:55,219 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-10-28 23:14:55,220 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:14:55,220 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:14:55,220 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1] [2021-10-28 23:14:55,221 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-10-28 23:14:55,228 INFO L791 eck$LassoCheckResult]: Stem: 5#ULTIMATE.startENTRYtrue havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 4#L10-2true [2021-10-28 23:14:55,230 INFO L793 eck$LassoCheckResult]: Loop: 4#L10-2true assume !!(main_~i~0 < 100); 6#L10true assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4#L10-2true [2021-10-28 23:14:55,239 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:55,239 INFO L85 PathProgramCache]: Analyzing trace with hash 32, now seen corresponding path program 1 times [2021-10-28 23:14:55,250 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:14:55,251 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1619779610] [2021-10-28 23:14:55,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:14:55,253 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:14:55,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:14:55,340 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:14:55,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:14:55,371 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:14:55,376 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:55,376 INFO L85 PathProgramCache]: Analyzing trace with hash 1284, now seen corresponding path program 1 times [2021-10-28 23:14:55,376 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:14:55,377 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1300234045] [2021-10-28 23:14:55,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:14:55,378 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:14:55,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:14:55,401 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:14:55,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:14:55,413 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:14:55,416 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:55,417 INFO L85 PathProgramCache]: Analyzing trace with hash 31075, now seen corresponding path program 1 times [2021-10-28 23:14:55,417 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:14:55,418 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [50857609] [2021-10-28 23:14:55,418 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:14:55,419 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:14:55,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:14:55,441 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:14:55,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:14:55,454 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:14:55,585 INFO L210 LassoAnalysis]: Preferences: [2021-10-28 23:14:55,586 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-10-28 23:14:55,586 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-10-28 23:14:55,586 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-10-28 23:14:55,587 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2021-10-28 23:14:55,587 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:55,587 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-10-28 23:14:55,594 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-10-28 23:14:55,594 INFO L133 ssoRankerPreferences]: Filename of dumped script: NO_22.c_Iteration1_Loop [2021-10-28 23:14:55,595 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-10-28 23:14:55,595 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-10-28 23:14:55,630 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:55,639 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:55,643 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:55,712 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-10-28 23:14:55,713 INFO L404 LassoAnalysis]: Checking for nontermination... [2021-10-28 23:14:55,715 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:55,716 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:55,735 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:14:55,754 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-10-28 23:14:55,754 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 23:14:55,774 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2021-10-28 23:14:55,786 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2021-10-28 23:14:55,786 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~true_1=1} Honda state: {v_rep~unnamed0~0~true_1=1} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2021-10-28 23:14:55,825 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2021-10-28 23:14:55,827 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:55,827 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:55,829 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:14:55,835 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2021-10-28 23:14:55,835 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-10-28 23:14:55,836 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 23:14:55,865 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2021-10-28 23:14:55,865 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~false_1=0} Honda state: {v_rep~unnamed0~0~false_1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2021-10-28 23:14:55,906 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2021-10-28 23:14:55,906 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:55,906 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:55,908 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:14:55,915 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-10-28 23:14:55,915 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 23:14:55,932 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2021-10-28 23:14:55,990 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2021-10-28 23:14:55,991 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:55,991 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:55,992 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:14:56,002 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2021-10-28 23:14:56,002 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2021-10-28 23:14:56,004 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 23:14:56,069 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2021-10-28 23:14:56,073 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2021-10-28 23:14:56,073 INFO L210 LassoAnalysis]: Preferences: [2021-10-28 23:14:56,073 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-10-28 23:14:56,073 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-10-28 23:14:56,073 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-10-28 23:14:56,074 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-10-28 23:14:56,074 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:56,074 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-10-28 23:14:56,074 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-10-28 23:14:56,074 INFO L133 ssoRankerPreferences]: Filename of dumped script: NO_22.c_Iteration1_Loop [2021-10-28 23:14:56,074 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-10-28 23:14:56,075 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-10-28 23:14:56,077 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:56,081 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:56,099 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:56,178 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-10-28 23:14:56,183 INFO L490 LassoAnalysis]: Using template 'affine'. [2021-10-28 23:14:56,184 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:56,185 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:56,204 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:14:56,216 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 23:14:56,228 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 23:14:56,228 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 23:14:56,229 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 23:14:56,229 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 23:14:56,242 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-10-28 23:14:56,242 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-10-28 23:14:56,250 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2021-10-28 23:14:56,270 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-10-28 23:14:56,310 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2021-10-28 23:14:56,310 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:56,310 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:56,313 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:14:56,319 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 23:14:56,329 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 23:14:56,330 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 23:14:56,330 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2021-10-28 23:14:56,332 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 23:14:56,332 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 23:14:56,332 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 23:14:56,335 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-10-28 23:14:56,335 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 23:14:56,350 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2021-10-28 23:14:56,353 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2021-10-28 23:14:56,354 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2021-10-28 23:14:56,355 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:56,355 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:56,357 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:14:56,359 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2021-10-28 23:14:56,359 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2021-10-28 23:14:56,359 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2021-10-28 23:14:56,359 INFO L513 LassoAnalysis]: Proved termination. [2021-10-28 23:14:56,360 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0) = -2*ULTIMATE.start_main_~i~0 + 99 Supporting invariants [] [2021-10-28 23:14:56,384 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2021-10-28 23:14:56,387 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2021-10-28 23:14:56,415 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:56,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:14:56,425 WARN L261 TraceCheckSpWp]: Trace formula consists of 4 conjuncts, 2 conjunts are in the unsatisfiable core [2021-10-28 23:14:56,426 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:14:56,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:14:56,436 WARN L261 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 4 conjunts are in the unsatisfiable core [2021-10-28 23:14:56,436 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:14:56,448 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:14:56,464 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 1 loop predicates [2021-10-28 23:14:56,465 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 7 states, 6 states have (on average 1.5) internal successors, (9), 6 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.0) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:56,506 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 7 states, 6 states have (on average 1.5) internal successors, (9), 6 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.0) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 23 states and 30 transitions. Complement of second has 6 states. [2021-10-28 23:14:56,507 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2021-10-28 23:14:56,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.0) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:56,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 11 transitions. [2021-10-28 23:14:56,512 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 1 letters. Loop has 2 letters. [2021-10-28 23:14:56,513 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 23:14:56,513 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 3 letters. Loop has 2 letters. [2021-10-28 23:14:56,514 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 23:14:56,514 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 1 letters. Loop has 4 letters. [2021-10-28 23:14:56,514 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 23:14:56,515 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 23 states and 30 transitions. [2021-10-28 23:14:56,519 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-10-28 23:14:56,523 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 23 states to 7 states and 10 transitions. [2021-10-28 23:14:56,524 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4 [2021-10-28 23:14:56,525 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2021-10-28 23:14:56,525 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7 states and 10 transitions. [2021-10-28 23:14:56,526 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:14:56,526 INFO L681 BuchiCegarLoop]: Abstraction has 7 states and 10 transitions. [2021-10-28 23:14:56,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7 states and 10 transitions. [2021-10-28 23:14:56,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7 to 7. [2021-10-28 23:14:56,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.4285714285714286) internal successors, (10), 6 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:56,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 10 transitions. [2021-10-28 23:14:56,556 INFO L704 BuchiCegarLoop]: Abstraction has 7 states and 10 transitions. [2021-10-28 23:14:56,556 INFO L587 BuchiCegarLoop]: Abstraction has 7 states and 10 transitions. [2021-10-28 23:14:56,556 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-10-28 23:14:56,557 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states and 10 transitions. [2021-10-28 23:14:56,557 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-10-28 23:14:56,558 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:14:56,558 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:14:56,558 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1] [2021-10-28 23:14:56,558 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-10-28 23:14:56,559 INFO L791 eck$LassoCheckResult]: Stem: 68#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 69#L10-2 assume !!(main_~i~0 < 100); 67#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 63#L10-2 [2021-10-28 23:14:56,559 INFO L793 eck$LassoCheckResult]: Loop: 63#L10-2 assume !!(main_~i~0 < 100); 64#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 63#L10-2 [2021-10-28 23:14:56,560 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:56,560 INFO L85 PathProgramCache]: Analyzing trace with hash 31077, now seen corresponding path program 1 times [2021-10-28 23:14:56,560 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:14:56,561 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [172218448] [2021-10-28 23:14:56,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:14:56,561 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:14:56,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:14:56,596 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:14:56,597 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:14:56,597 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [172218448] [2021-10-28 23:14:56,598 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [172218448] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:14:56,598 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:14:56,599 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2021-10-28 23:14:56,599 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [269976440] [2021-10-28 23:14:56,602 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 23:14:56,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:56,603 INFO L85 PathProgramCache]: Analyzing trace with hash 1284, now seen corresponding path program 2 times [2021-10-28 23:14:56,603 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:14:56,604 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1975518484] [2021-10-28 23:14:56,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:14:56,604 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:14:56,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:14:56,610 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:14:56,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:14:56,614 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:14:56,636 INFO L210 LassoAnalysis]: Preferences: [2021-10-28 23:14:56,637 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-10-28 23:14:56,637 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-10-28 23:14:56,637 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-10-28 23:14:56,637 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2021-10-28 23:14:56,637 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:56,638 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-10-28 23:14:56,638 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-10-28 23:14:56,638 INFO L133 ssoRankerPreferences]: Filename of dumped script: NO_22.c_Iteration2_Loop [2021-10-28 23:14:56,638 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-10-28 23:14:56,638 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-10-28 23:14:56,640 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:56,644 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:56,650 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:56,688 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-10-28 23:14:56,689 INFO L404 LassoAnalysis]: Checking for nontermination... [2021-10-28 23:14:56,689 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:56,689 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:56,690 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:14:56,726 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-10-28 23:14:56,727 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 23:14:56,741 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2021-10-28 23:14:56,761 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2021-10-28 23:14:56,762 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~false_3=0} Honda state: {v_rep~unnamed0~0~false_3=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2021-10-28 23:14:56,803 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2021-10-28 23:14:56,803 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:56,804 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:56,804 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:14:56,805 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2021-10-28 23:14:56,806 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-10-28 23:14:56,806 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 23:14:56,852 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2021-10-28 23:14:56,852 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:56,852 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:56,853 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:14:56,858 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2021-10-28 23:14:56,859 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2021-10-28 23:14:56,859 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 23:14:56,902 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2021-10-28 23:14:56,905 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2021-10-28 23:14:56,905 INFO L210 LassoAnalysis]: Preferences: [2021-10-28 23:14:56,905 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-10-28 23:14:56,905 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-10-28 23:14:56,905 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-10-28 23:14:56,906 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-10-28 23:14:56,906 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:56,906 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-10-28 23:14:56,906 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-10-28 23:14:56,906 INFO L133 ssoRankerPreferences]: Filename of dumped script: NO_22.c_Iteration2_Loop [2021-10-28 23:14:56,906 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-10-28 23:14:56,906 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-10-28 23:14:56,907 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:56,922 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:56,926 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:56,962 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-10-28 23:14:56,963 INFO L490 LassoAnalysis]: Using template 'affine'. [2021-10-28 23:14:56,963 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:56,963 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:56,964 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:14:57,001 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2021-10-28 23:14:57,002 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 23:14:57,013 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 23:14:57,013 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 23:14:57,013 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 23:14:57,014 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 23:14:57,014 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 23:14:57,015 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-10-28 23:14:57,015 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 23:14:57,029 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2021-10-28 23:14:57,032 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2021-10-28 23:14:57,032 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2021-10-28 23:14:57,032 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:57,033 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:57,063 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:14:57,068 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2021-10-28 23:14:57,068 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2021-10-28 23:14:57,069 INFO L513 LassoAnalysis]: Proved termination. [2021-10-28 23:14:57,069 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0) = -2*ULTIMATE.start_main_~i~0 + 99 Supporting invariants [] [2021-10-28 23:14:57,085 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2021-10-28 23:14:57,103 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2021-10-28 23:14:57,104 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2021-10-28 23:14:57,121 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:57,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:14:57,126 INFO L263 TraceCheckSpWp]: Trace formula consists of 8 conjuncts, 2 conjunts are in the unsatisfiable core [2021-10-28 23:14:57,126 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:14:57,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:14:57,142 WARN L261 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 4 conjunts are in the unsatisfiable core [2021-10-28 23:14:57,142 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:14:57,153 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:14:57,154 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 1 loop predicates [2021-10-28 23:14:57,154 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 7 states and 10 transitions. cyclomatic complexity: 5 Second operand has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:57,166 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 7 states and 10 transitions. cyclomatic complexity: 5. Second operand has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 11 states and 16 transitions. Complement of second has 5 states. [2021-10-28 23:14:57,166 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2021-10-28 23:14:57,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 3 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:57,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 6 transitions. [2021-10-28 23:14:57,168 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 6 transitions. Stem has 3 letters. Loop has 2 letters. [2021-10-28 23:14:57,168 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 23:14:57,168 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 6 transitions. Stem has 5 letters. Loop has 2 letters. [2021-10-28 23:14:57,169 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 23:14:57,169 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 6 transitions. Stem has 3 letters. Loop has 4 letters. [2021-10-28 23:14:57,176 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 23:14:57,176 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 16 transitions. [2021-10-28 23:14:57,178 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-10-28 23:14:57,178 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 11 states and 16 transitions. [2021-10-28 23:14:57,179 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2021-10-28 23:14:57,179 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2021-10-28 23:14:57,179 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11 states and 16 transitions. [2021-10-28 23:14:57,179 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:14:57,179 INFO L681 BuchiCegarLoop]: Abstraction has 11 states and 16 transitions. [2021-10-28 23:14:57,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states and 16 transitions. [2021-10-28 23:14:57,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 11. [2021-10-28 23:14:57,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 10 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:57,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 16 transitions. [2021-10-28 23:14:57,182 INFO L704 BuchiCegarLoop]: Abstraction has 11 states and 16 transitions. [2021-10-28 23:14:57,183 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:14:57,185 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:14:57,186 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:14:57,187 INFO L87 Difference]: Start difference. First operand 11 states and 16 transitions. Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:57,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:14:57,199 INFO L93 Difference]: Finished difference Result 13 states and 17 transitions. [2021-10-28 23:14:57,200 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:14:57,200 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 13 states and 17 transitions. [2021-10-28 23:14:57,201 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-10-28 23:14:57,202 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 13 states to 12 states and 16 transitions. [2021-10-28 23:14:57,209 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2021-10-28 23:14:57,210 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2021-10-28 23:14:57,213 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12 states and 16 transitions. [2021-10-28 23:14:57,213 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:14:57,213 INFO L681 BuchiCegarLoop]: Abstraction has 12 states and 16 transitions. [2021-10-28 23:14:57,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states and 16 transitions. [2021-10-28 23:14:57,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 11. [2021-10-28 23:14:57,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:57,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 15 transitions. [2021-10-28 23:14:57,216 INFO L704 BuchiCegarLoop]: Abstraction has 11 states and 15 transitions. [2021-10-28 23:14:57,216 INFO L587 BuchiCegarLoop]: Abstraction has 11 states and 15 transitions. [2021-10-28 23:14:57,216 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-10-28 23:14:57,216 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11 states and 15 transitions. [2021-10-28 23:14:57,217 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-10-28 23:14:57,217 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:14:57,217 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:14:57,217 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [3, 2, 1, 1] [2021-10-28 23:14:57,217 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-10-28 23:14:57,218 INFO L791 eck$LassoCheckResult]: Stem: 144#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 139#L10-2 assume !!(main_~i~0 < 100); 140#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 149#L10-2 assume !!(main_~i~0 < 100); 148#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 146#L10-2 assume !!(main_~i~0 < 100); 142#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 145#L10-2 [2021-10-28 23:14:57,218 INFO L793 eck$LassoCheckResult]: Loop: 145#L10-2 assume !!(main_~i~0 < 100); 147#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 145#L10-2 [2021-10-28 23:14:57,218 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:57,218 INFO L85 PathProgramCache]: Analyzing trace with hash -1366043347, now seen corresponding path program 1 times [2021-10-28 23:14:57,218 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:14:57,219 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1611478074] [2021-10-28 23:14:57,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:14:57,219 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:14:57,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:14:57,270 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2021-10-28 23:14:57,297 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:14:57,298 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:14:57,298 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1611478074] [2021-10-28 23:14:57,299 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1611478074] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:14:57,300 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1668805301] [2021-10-28 23:14:57,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:14:57,300 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:14:57,300 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:57,308 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:14:57,322 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2021-10-28 23:14:57,323 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2021-10-28 23:14:57,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:14:57,346 INFO L263 TraceCheckSpWp]: Trace formula consists of 16 conjuncts, 3 conjunts are in the unsatisfiable core [2021-10-28 23:14:57,347 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:14:57,397 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:14:57,397 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1668805301] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:14:57,398 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:14:57,398 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 3 [2021-10-28 23:14:57,398 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1034517332] [2021-10-28 23:14:57,399 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 23:14:57,399 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:57,399 INFO L85 PathProgramCache]: Analyzing trace with hash 1284, now seen corresponding path program 3 times [2021-10-28 23:14:57,399 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:14:57,400 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [831558907] [2021-10-28 23:14:57,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:14:57,400 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:14:57,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:14:57,405 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:14:57,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:14:57,409 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:14:57,427 INFO L210 LassoAnalysis]: Preferences: [2021-10-28 23:14:57,427 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-10-28 23:14:57,427 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-10-28 23:14:57,428 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-10-28 23:14:57,428 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2021-10-28 23:14:57,428 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:57,428 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-10-28 23:14:57,428 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-10-28 23:14:57,428 INFO L133 ssoRankerPreferences]: Filename of dumped script: NO_22.c_Iteration3_Loop [2021-10-28 23:14:57,429 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-10-28 23:14:57,429 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-10-28 23:14:57,430 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:57,434 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:57,440 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:57,480 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-10-28 23:14:57,480 INFO L404 LassoAnalysis]: Checking for nontermination... [2021-10-28 23:14:57,481 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:57,481 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:57,486 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:14:57,495 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-10-28 23:14:57,495 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 23:14:57,510 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2021-10-28 23:14:57,523 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2021-10-28 23:14:57,523 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~true_5=1} Honda state: {v_rep~unnamed0~0~true_5=1} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2021-10-28 23:14:57,556 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Forceful destruction successful, exit code 0 [2021-10-28 23:14:57,556 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:57,556 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:57,557 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:14:57,560 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2021-10-28 23:14:57,561 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-10-28 23:14:57,561 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 23:14:57,599 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2021-10-28 23:14:57,599 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:57,599 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:57,600 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:14:57,603 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2021-10-28 23:14:57,604 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2021-10-28 23:14:57,604 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 23:14:57,648 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2021-10-28 23:14:57,651 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Forceful destruction successful, exit code 0 [2021-10-28 23:14:57,652 INFO L210 LassoAnalysis]: Preferences: [2021-10-28 23:14:57,652 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-10-28 23:14:57,652 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-10-28 23:14:57,652 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-10-28 23:14:57,652 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-10-28 23:14:57,652 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:57,652 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-10-28 23:14:57,652 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-10-28 23:14:57,652 INFO L133 ssoRankerPreferences]: Filename of dumped script: NO_22.c_Iteration3_Loop [2021-10-28 23:14:57,653 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-10-28 23:14:57,653 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-10-28 23:14:57,655 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:57,692 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:57,697 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:57,754 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-10-28 23:14:57,755 INFO L490 LassoAnalysis]: Using template 'affine'. [2021-10-28 23:14:57,755 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:57,755 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:57,761 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:14:57,767 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2021-10-28 23:14:57,770 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 23:14:57,785 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 23:14:57,785 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 23:14:57,785 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 23:14:57,785 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 23:14:57,786 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 23:14:57,788 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-10-28 23:14:57,789 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 23:14:57,801 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2021-10-28 23:14:57,805 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2021-10-28 23:14:57,806 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2021-10-28 23:14:57,806 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:57,806 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:57,807 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:14:57,815 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2021-10-28 23:14:57,815 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2021-10-28 23:14:57,815 INFO L513 LassoAnalysis]: Proved termination. [2021-10-28 23:14:57,815 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0) = -2*ULTIMATE.start_main_~i~0 + 99 Supporting invariants [] [2021-10-28 23:14:57,831 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2021-10-28 23:14:57,863 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2021-10-28 23:14:57,863 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2021-10-28 23:14:57,891 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:57,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:14:57,905 INFO L263 TraceCheckSpWp]: Trace formula consists of 16 conjuncts, 2 conjunts are in the unsatisfiable core [2021-10-28 23:14:57,906 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:14:57,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:14:57,958 WARN L261 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 4 conjunts are in the unsatisfiable core [2021-10-28 23:14:57,958 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:14:57,971 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:14:57,972 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 1 loop predicates [2021-10-28 23:14:57,974 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 11 states and 15 transitions. cyclomatic complexity: 7 Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:57,993 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 11 states and 15 transitions. cyclomatic complexity: 7. Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 13 states and 19 transitions. Complement of second has 5 states. [2021-10-28 23:14:57,998 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2021-10-28 23:14:57,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:58,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 6 transitions. [2021-10-28 23:14:58,000 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 6 transitions. Stem has 7 letters. Loop has 2 letters. [2021-10-28 23:14:58,000 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 23:14:58,000 INFO L639 RefineBuchi]: Bad chosen interpolant automaton: word not accepted [2021-10-28 23:14:58,015 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:58,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:14:58,027 INFO L263 TraceCheckSpWp]: Trace formula consists of 16 conjuncts, 2 conjunts are in the unsatisfiable core [2021-10-28 23:14:58,028 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:14:58,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:14:58,056 WARN L261 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 4 conjunts are in the unsatisfiable core [2021-10-28 23:14:58,057 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:14:58,067 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:14:58,068 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and with honda bouncer for loop.1 stem predicates 1 loop predicates [2021-10-28 23:14:58,068 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 11 states and 15 transitions. cyclomatic complexity: 7 Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:58,078 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 11 states and 15 transitions. cyclomatic complexity: 7. Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 13 states and 19 transitions. Complement of second has 5 states. [2021-10-28 23:14:58,079 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2021-10-28 23:14:58,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:58,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 6 transitions. [2021-10-28 23:14:58,080 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 6 transitions. Stem has 7 letters. Loop has 2 letters. [2021-10-28 23:14:58,080 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 23:14:58,080 INFO L639 RefineBuchi]: Bad chosen interpolant automaton: word not accepted [2021-10-28 23:14:58,093 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:58,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:14:58,100 INFO L263 TraceCheckSpWp]: Trace formula consists of 16 conjuncts, 2 conjunts are in the unsatisfiable core [2021-10-28 23:14:58,101 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:14:58,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:14:58,129 WARN L261 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 4 conjunts are in the unsatisfiable core [2021-10-28 23:14:58,129 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:14:58,139 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:14:58,140 INFO L152 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.1 stem predicates 1 loop predicates [2021-10-28 23:14:58,141 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 11 states and 15 transitions. cyclomatic complexity: 7 Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:58,161 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 11 states and 15 transitions. cyclomatic complexity: 7. Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 15 states and 22 transitions. Complement of second has 4 states. [2021-10-28 23:14:58,162 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2021-10-28 23:14:58,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:58,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 7 transitions. [2021-10-28 23:14:58,163 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 7 transitions. Stem has 7 letters. Loop has 2 letters. [2021-10-28 23:14:58,164 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 23:14:58,164 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 7 transitions. Stem has 9 letters. Loop has 2 letters. [2021-10-28 23:14:58,165 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 23:14:58,165 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 7 transitions. Stem has 7 letters. Loop has 4 letters. [2021-10-28 23:14:58,166 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 23:14:58,167 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 22 transitions. [2021-10-28 23:14:58,169 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2021-10-28 23:14:58,172 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 13 states and 18 transitions. [2021-10-28 23:14:58,173 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2021-10-28 23:14:58,174 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2021-10-28 23:14:58,174 INFO L73 IsDeterministic]: Start isDeterministic. Operand 13 states and 18 transitions. [2021-10-28 23:14:58,174 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:14:58,174 INFO L681 BuchiCegarLoop]: Abstraction has 13 states and 18 transitions. [2021-10-28 23:14:58,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states and 18 transitions. [2021-10-28 23:14:58,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 6. [2021-10-28 23:14:58,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.3333333333333333) internal successors, (8), 5 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:58,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 8 transitions. [2021-10-28 23:14:58,181 INFO L704 BuchiCegarLoop]: Abstraction has 6 states and 8 transitions. [2021-10-28 23:14:58,181 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:14:58,182 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:14:58,182 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:14:58,183 INFO L87 Difference]: Start difference. First operand 6 states and 8 transitions. Second operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:58,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:14:58,206 INFO L93 Difference]: Finished difference Result 10 states and 12 transitions. [2021-10-28 23:14:58,207 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 23:14:58,207 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10 states and 12 transitions. [2021-10-28 23:14:58,209 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2021-10-28 23:14:58,210 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10 states to 9 states and 11 transitions. [2021-10-28 23:14:58,210 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4 [2021-10-28 23:14:58,210 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4 [2021-10-28 23:14:58,210 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9 states and 11 transitions. [2021-10-28 23:14:58,211 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:14:58,211 INFO L681 BuchiCegarLoop]: Abstraction has 9 states and 11 transitions. [2021-10-28 23:14:58,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states and 11 transitions. [2021-10-28 23:14:58,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 8. [2021-10-28 23:14:58,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.25) internal successors, (10), 7 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:58,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 10 transitions. [2021-10-28 23:14:58,217 INFO L704 BuchiCegarLoop]: Abstraction has 8 states and 10 transitions. [2021-10-28 23:14:58,217 INFO L587 BuchiCegarLoop]: Abstraction has 8 states and 10 transitions. [2021-10-28 23:14:58,217 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-10-28 23:14:58,218 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8 states and 10 transitions. [2021-10-28 23:14:58,219 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2021-10-28 23:14:58,220 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:14:58,220 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:14:58,220 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [3, 2, 1] [2021-10-28 23:14:58,220 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-10-28 23:14:58,221 INFO L791 eck$LassoCheckResult]: Stem: 339#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 335#L10-2 assume !!(main_~i~0 < 100); 336#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 337#L10-2 assume !!(main_~i~0 < 100); 338#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 342#L10-2 assume !!(main_~i~0 < 100); 340#L10 [2021-10-28 23:14:58,221 INFO L793 eck$LassoCheckResult]: Loop: 340#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 341#L10-2 assume !!(main_~i~0 < 100); 340#L10 [2021-10-28 23:14:58,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:58,222 INFO L85 PathProgramCache]: Analyzing trace with hash 925765348, now seen corresponding path program 2 times [2021-10-28 23:14:58,222 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:14:58,223 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1700852743] [2021-10-28 23:14:58,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:14:58,223 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:14:58,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:14:58,251 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:14:58,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:14:58,261 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:14:58,263 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:58,263 INFO L85 PathProgramCache]: Analyzing trace with hash 1436, now seen corresponding path program 1 times [2021-10-28 23:14:58,263 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:14:58,264 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1557449797] [2021-10-28 23:14:58,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:14:58,264 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:14:58,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:14:58,278 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:14:58,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:14:58,297 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:14:58,298 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:58,298 INFO L85 PathProgramCache]: Analyzing trace with hash 602269631, now seen corresponding path program 2 times [2021-10-28 23:14:58,298 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:14:58,299 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2145180817] [2021-10-28 23:14:58,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:14:58,299 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:14:58,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:14:58,341 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:14:58,342 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:14:58,342 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2145180817] [2021-10-28 23:14:58,342 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2145180817] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:14:58,343 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [840431773] [2021-10-28 23:14:58,343 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-10-28 23:14:58,343 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:14:58,344 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:58,346 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:14:58,360 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2021-10-28 23:14:58,406 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-10-28 23:14:58,406 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:14:58,407 INFO L263 TraceCheckSpWp]: Trace formula consists of 17 conjuncts, 4 conjunts are in the unsatisfiable core [2021-10-28 23:14:58,407 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:14:58,443 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:14:58,443 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [840431773] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:14:58,444 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:14:58,444 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2021-10-28 23:14:58,444 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [196492253] [2021-10-28 23:14:58,467 INFO L210 LassoAnalysis]: Preferences: [2021-10-28 23:14:58,467 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-10-28 23:14:58,468 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-10-28 23:14:58,468 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-10-28 23:14:58,468 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2021-10-28 23:14:58,468 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:58,468 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-10-28 23:14:58,468 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-10-28 23:14:58,469 INFO L133 ssoRankerPreferences]: Filename of dumped script: NO_22.c_Iteration4_Loop [2021-10-28 23:14:58,469 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-10-28 23:14:58,469 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-10-28 23:14:58,470 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:58,479 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:58,483 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:58,525 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-10-28 23:14:58,525 INFO L404 LassoAnalysis]: Checking for nontermination... [2021-10-28 23:14:58,525 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:58,526 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:58,528 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:14:58,531 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-10-28 23:14:58,531 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 23:14:58,544 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2021-10-28 23:14:58,606 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Forceful destruction successful, exit code 0 [2021-10-28 23:14:58,606 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:58,606 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:58,608 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:14:58,619 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2021-10-28 23:14:58,619 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-10-28 23:14:58,645 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2021-10-28 23:14:58,676 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2021-10-28 23:14:58,680 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Forceful destruction successful, exit code 0 [2021-10-28 23:14:58,680 INFO L210 LassoAnalysis]: Preferences: [2021-10-28 23:14:58,680 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-10-28 23:14:58,680 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-10-28 23:14:58,680 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-10-28 23:14:58,680 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-10-28 23:14:58,680 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:58,680 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-10-28 23:14:58,680 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-10-28 23:14:58,681 INFO L133 ssoRankerPreferences]: Filename of dumped script: NO_22.c_Iteration4_Loop [2021-10-28 23:14:58,681 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-10-28 23:14:58,681 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-10-28 23:14:58,682 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:58,701 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:58,706 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-10-28 23:14:58,773 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-10-28 23:14:58,773 INFO L490 LassoAnalysis]: Using template 'affine'. [2021-10-28 23:14:58,774 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:58,774 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:58,782 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:14:58,785 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-10-28 23:14:58,797 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-10-28 23:14:58,797 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-10-28 23:14:58,797 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-10-28 23:14:58,797 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-10-28 23:14:58,798 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-10-28 23:14:58,800 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-10-28 23:14:58,800 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-10-28 23:14:58,812 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2021-10-28 23:14:58,821 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2021-10-28 23:14:58,825 INFO L443 ModelExtractionUtils]: Simplification made 2 calls to the SMT solver. [2021-10-28 23:14:58,825 INFO L444 ModelExtractionUtils]: 1 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2021-10-28 23:14:58,825 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:14:58,826 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:58,828 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:14:58,830 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2021-10-28 23:14:58,830 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2021-10-28 23:14:58,830 INFO L513 LassoAnalysis]: Proved termination. [2021-10-28 23:14:58,830 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0) = 1*ULTIMATE.start_main_~i~0 Supporting invariants [] [2021-10-28 23:14:58,847 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2021-10-28 23:14:58,878 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Forceful destruction successful, exit code 0 [2021-10-28 23:14:58,879 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2021-10-28 23:14:58,903 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:58,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:14:58,913 INFO L263 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 2 conjunts are in the unsatisfiable core [2021-10-28 23:14:58,914 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:14:58,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:14:58,957 WARN L261 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 4 conjunts are in the unsatisfiable core [2021-10-28 23:14:58,957 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:14:58,996 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:14:58,997 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2021-10-28 23:14:58,997 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 8 states and 10 transitions. cyclomatic complexity: 3 Second operand has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:59,003 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 8 states and 10 transitions. cyclomatic complexity: 3. Second operand has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 8 states and 10 transitions. Complement of second has 3 states. [2021-10-28 23:14:59,005 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 2 states 1 stem states 0 non-accepting loop states 1 accepting loop states [2021-10-28 23:14:59,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:59,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 2 transitions. [2021-10-28 23:14:59,006 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 2 transitions. Stem has 6 letters. Loop has 2 letters. [2021-10-28 23:14:59,006 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 23:14:59,007 INFO L639 RefineBuchi]: Bad chosen interpolant automaton: word not accepted [2021-10-28 23:14:59,020 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:59,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:14:59,029 INFO L263 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 2 conjunts are in the unsatisfiable core [2021-10-28 23:14:59,030 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:14:59,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:14:59,054 WARN L261 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 4 conjunts are in the unsatisfiable core [2021-10-28 23:14:59,055 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:14:59,087 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:14:59,089 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and with honda bouncer for loop.1 stem predicates 2 loop predicates [2021-10-28 23:14:59,090 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 8 states and 10 transitions. cyclomatic complexity: 3 Second operand has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:59,099 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 8 states and 10 transitions. cyclomatic complexity: 3. Second operand has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 8 states and 10 transitions. Complement of second has 3 states. [2021-10-28 23:14:59,100 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 2 states 1 stem states 0 non-accepting loop states 1 accepting loop states [2021-10-28 23:14:59,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:59,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 2 transitions. [2021-10-28 23:14:59,101 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 2 transitions. Stem has 6 letters. Loop has 2 letters. [2021-10-28 23:14:59,102 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 23:14:59,102 INFO L639 RefineBuchi]: Bad chosen interpolant automaton: word not accepted [2021-10-28 23:14:59,115 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:59,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:14:59,123 INFO L263 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 2 conjunts are in the unsatisfiable core [2021-10-28 23:14:59,126 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:14:59,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:14:59,186 WARN L261 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 4 conjunts are in the unsatisfiable core [2021-10-28 23:14:59,186 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:14:59,212 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Forceful destruction successful, exit code 0 [2021-10-28 23:14:59,250 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:14:59,251 INFO L152 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2021-10-28 23:14:59,251 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 8 states and 10 transitions. cyclomatic complexity: 3 Second operand has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:59,267 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 8 states and 10 transitions. cyclomatic complexity: 3. Second operand has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 12 states and 14 transitions. Complement of second has 4 states. [2021-10-28 23:14:59,270 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2021-10-28 23:14:59,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:59,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 8 transitions. [2021-10-28 23:14:59,271 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 8 transitions. Stem has 6 letters. Loop has 2 letters. [2021-10-28 23:14:59,271 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 23:14:59,272 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 8 transitions. Stem has 8 letters. Loop has 2 letters. [2021-10-28 23:14:59,272 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 23:14:59,272 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 8 transitions. Stem has 6 letters. Loop has 4 letters. [2021-10-28 23:14:59,273 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-10-28 23:14:59,273 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 12 states and 14 transitions. [2021-10-28 23:14:59,274 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 6 [2021-10-28 23:14:59,274 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 12 states to 10 states and 12 transitions. [2021-10-28 23:14:59,275 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:14:59,275 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:14:59,275 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 12 transitions. [2021-10-28 23:14:59,275 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:14:59,275 INFO L681 BuchiCegarLoop]: Abstraction has 10 states and 12 transitions. [2021-10-28 23:14:59,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 12 transitions. [2021-10-28 23:14:59,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 9. [2021-10-28 23:14:59,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:59,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 11 transitions. [2021-10-28 23:14:59,278 INFO L704 BuchiCegarLoop]: Abstraction has 9 states and 11 transitions. [2021-10-28 23:14:59,278 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:14:59,279 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 23:14:59,279 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:14:59,280 INFO L87 Difference]: Start difference. First operand 9 states and 11 transitions. Second operand has 5 states, 5 states have (on average 1.6) internal successors, (8), 4 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:59,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:14:59,297 INFO L93 Difference]: Finished difference Result 13 states and 15 transitions. [2021-10-28 23:14:59,297 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:14:59,298 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 13 states and 15 transitions. [2021-10-28 23:14:59,299 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:14:59,299 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 13 states to 12 states and 14 transitions. [2021-10-28 23:14:59,300 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:14:59,300 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:14:59,300 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12 states and 14 transitions. [2021-10-28 23:14:59,300 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:14:59,301 INFO L681 BuchiCegarLoop]: Abstraction has 12 states and 14 transitions. [2021-10-28 23:14:59,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states and 14 transitions. [2021-10-28 23:14:59,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 11. [2021-10-28 23:14:59,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 1.1818181818181819) internal successors, (13), 10 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:59,303 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Forceful destruction successful, exit code 0 [2021-10-28 23:14:59,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 13 transitions. [2021-10-28 23:14:59,308 INFO L704 BuchiCegarLoop]: Abstraction has 11 states and 13 transitions. [2021-10-28 23:14:59,308 INFO L587 BuchiCegarLoop]: Abstraction has 11 states and 13 transitions. [2021-10-28 23:14:59,308 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-10-28 23:14:59,309 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11 states and 13 transitions. [2021-10-28 23:14:59,309 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:14:59,310 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:14:59,310 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:14:59,310 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [4, 3, 1] [2021-10-28 23:14:59,310 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:14:59,311 INFO L791 eck$LassoCheckResult]: Stem: 519#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 515#L10-2 assume !!(main_~i~0 < 100); 516#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 517#L10-2 assume !!(main_~i~0 < 100); 518#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 525#L10-2 assume !!(main_~i~0 < 100); 524#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 523#L10-2 assume !!(main_~i~0 < 100); 520#L10 [2021-10-28 23:14:59,311 INFO L793 eck$LassoCheckResult]: Loop: 520#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 521#L10-2 assume !!(main_~i~0 < 100); 524#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 523#L10-2 assume !!(main_~i~0 < 100); 520#L10 [2021-10-28 23:14:59,311 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:59,312 INFO L85 PathProgramCache]: Analyzing trace with hash 602269569, now seen corresponding path program 3 times [2021-10-28 23:14:59,312 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:14:59,312 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [816853023] [2021-10-28 23:14:59,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:14:59,313 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:14:59,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:14:59,322 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:14:59,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:14:59,329 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:14:59,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:59,330 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 1 times [2021-10-28 23:14:59,330 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:14:59,331 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [382980241] [2021-10-28 23:14:59,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:14:59,331 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:14:59,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:14:59,337 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:14:59,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:14:59,342 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:14:59,342 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:59,343 INFO L85 PathProgramCache]: Analyzing trace with hash 1740322745, now seen corresponding path program 3 times [2021-10-28 23:14:59,343 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:14:59,343 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [109816487] [2021-10-28 23:14:59,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:14:59,344 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:14:59,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:14:59,392 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:14:59,392 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:14:59,392 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [109816487] [2021-10-28 23:14:59,393 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [109816487] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:14:59,393 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2044198289] [2021-10-28 23:14:59,393 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-10-28 23:14:59,393 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:14:59,394 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:59,395 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:14:59,437 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2021-10-28 23:14:59,488 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2021-10-28 23:14:59,488 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:14:59,489 INFO L263 TraceCheckSpWp]: Trace formula consists of 25 conjuncts, 5 conjunts are in the unsatisfiable core [2021-10-28 23:14:59,490 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:14:59,552 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:14:59,552 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2044198289] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:14:59,553 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:14:59,553 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2021-10-28 23:14:59,553 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [424299898] [2021-10-28 23:14:59,592 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:14:59,593 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:14:59,593 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:14:59,594 INFO L87 Difference]: Start difference. First operand 11 states and 13 transitions. cyclomatic complexity: 3 Second operand has 6 states, 6 states have (on average 1.8333333333333333) internal successors, (11), 5 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:59,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:14:59,622 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2021-10-28 23:14:59,622 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 23:14:59,623 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 17 transitions. [2021-10-28 23:14:59,625 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:14:59,626 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 14 states and 16 transitions. [2021-10-28 23:14:59,627 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:14:59,627 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:14:59,627 INFO L73 IsDeterministic]: Start isDeterministic. Operand 14 states and 16 transitions. [2021-10-28 23:14:59,627 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:14:59,627 INFO L681 BuchiCegarLoop]: Abstraction has 14 states and 16 transitions. [2021-10-28 23:14:59,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states and 16 transitions. [2021-10-28 23:14:59,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 13. [2021-10-28 23:14:59,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 1.1538461538461537) internal successors, (15), 12 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:59,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 15 transitions. [2021-10-28 23:14:59,631 INFO L704 BuchiCegarLoop]: Abstraction has 13 states and 15 transitions. [2021-10-28 23:14:59,632 INFO L587 BuchiCegarLoop]: Abstraction has 13 states and 15 transitions. [2021-10-28 23:14:59,632 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-10-28 23:14:59,632 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 13 states and 15 transitions. [2021-10-28 23:14:59,634 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:14:59,634 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:14:59,634 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:14:59,635 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [5, 4, 1] [2021-10-28 23:14:59,635 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:14:59,635 INFO L791 eck$LassoCheckResult]: Stem: 589#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 585#L10-2 assume !!(main_~i~0 < 100); 586#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 587#L10-2 assume !!(main_~i~0 < 100); 588#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 597#L10-2 assume !!(main_~i~0 < 100); 596#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 595#L10-2 assume !!(main_~i~0 < 100); 594#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 593#L10-2 assume !!(main_~i~0 < 100); 590#L10 [2021-10-28 23:14:59,636 INFO L793 eck$LassoCheckResult]: Loop: 590#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 591#L10-2 assume !!(main_~i~0 < 100); 594#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 593#L10-2 assume !!(main_~i~0 < 100); 590#L10 [2021-10-28 23:14:59,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:59,636 INFO L85 PathProgramCache]: Analyzing trace with hash -1039528738, now seen corresponding path program 4 times [2021-10-28 23:14:59,637 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:14:59,638 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1998029940] [2021-10-28 23:14:59,638 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:14:59,638 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:14:59,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:14:59,665 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:14:59,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:14:59,683 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:14:59,687 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:59,687 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 2 times [2021-10-28 23:14:59,687 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:14:59,687 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2082674632] [2021-10-28 23:14:59,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:14:59,688 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:14:59,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:14:59,701 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:14:59,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:14:59,708 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:14:59,711 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:14:59,711 INFO L85 PathProgramCache]: Analyzing trace with hash 1650681494, now seen corresponding path program 4 times [2021-10-28 23:14:59,712 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:14:59,712 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [666754352] [2021-10-28 23:14:59,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:14:59,712 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:14:59,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:14:59,770 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 15 proven. 20 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:14:59,770 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:14:59,770 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [666754352] [2021-10-28 23:14:59,771 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [666754352] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:14:59,771 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1292948881] [2021-10-28 23:14:59,771 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-10-28 23:14:59,771 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:14:59,771 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:14:59,772 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:14:59,785 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2021-10-28 23:14:59,841 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-10-28 23:14:59,841 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:14:59,842 INFO L263 TraceCheckSpWp]: Trace formula consists of 29 conjuncts, 6 conjunts are in the unsatisfiable core [2021-10-28 23:14:59,843 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:14:59,923 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 15 proven. 20 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:14:59,924 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1292948881] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:14:59,924 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:14:59,924 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2021-10-28 23:14:59,925 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [897482387] [2021-10-28 23:14:59,961 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:14:59,963 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 23:14:59,963 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2021-10-28 23:14:59,963 INFO L87 Difference]: Start difference. First operand 13 states and 15 transitions. cyclomatic complexity: 3 Second operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 6 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:14:59,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:14:59,997 INFO L93 Difference]: Finished difference Result 17 states and 19 transitions. [2021-10-28 23:14:59,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-28 23:14:59,998 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 17 states and 19 transitions. [2021-10-28 23:14:59,999 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:00,000 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 17 states to 16 states and 18 transitions. [2021-10-28 23:15:00,001 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:00,001 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:00,001 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 18 transitions. [2021-10-28 23:15:00,001 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:00,002 INFO L681 BuchiCegarLoop]: Abstraction has 16 states and 18 transitions. [2021-10-28 23:15:00,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 18 transitions. [2021-10-28 23:15:00,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 15. [2021-10-28 23:15:00,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.1333333333333333) internal successors, (17), 14 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:00,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 17 transitions. [2021-10-28 23:15:00,007 INFO L704 BuchiCegarLoop]: Abstraction has 15 states and 17 transitions. [2021-10-28 23:15:00,008 INFO L587 BuchiCegarLoop]: Abstraction has 15 states and 17 transitions. [2021-10-28 23:15:00,008 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-10-28 23:15:00,008 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 15 states and 17 transitions. [2021-10-28 23:15:00,010 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:00,010 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:00,010 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:00,011 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [6, 5, 1] [2021-10-28 23:15:00,011 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:00,012 INFO L791 eck$LassoCheckResult]: Stem: 670#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 666#L10-2 assume !!(main_~i~0 < 100); 667#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 668#L10-2 assume !!(main_~i~0 < 100); 669#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 680#L10-2 assume !!(main_~i~0 < 100); 679#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 678#L10-2 assume !!(main_~i~0 < 100); 676#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 675#L10-2 assume !!(main_~i~0 < 100); 674#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 673#L10-2 assume !!(main_~i~0 < 100); 671#L10 [2021-10-28 23:15:00,012 INFO L793 eck$LassoCheckResult]: Loop: 671#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 672#L10-2 assume !!(main_~i~0 < 100); 674#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 673#L10-2 assume !!(main_~i~0 < 100); 671#L10 [2021-10-28 23:15:00,013 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:00,013 INFO L85 PathProgramCache]: Analyzing trace with hash 1740263163, now seen corresponding path program 5 times [2021-10-28 23:15:00,013 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:00,013 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [969973591] [2021-10-28 23:15:00,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:00,014 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:00,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:00,053 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:00,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:00,061 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:00,061 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:00,062 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 3 times [2021-10-28 23:15:00,062 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:00,062 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1943335784] [2021-10-28 23:15:00,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:00,063 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:00,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:00,068 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:00,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:00,072 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:00,073 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:00,073 INFO L85 PathProgramCache]: Analyzing trace with hash 1404785203, now seen corresponding path program 5 times [2021-10-28 23:15:00,073 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:00,073 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1557563217] [2021-10-28 23:15:00,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:00,074 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:00,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:00,138 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 18 proven. 30 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:00,138 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:00,139 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1557563217] [2021-10-28 23:15:00,139 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1557563217] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:00,139 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1774776640] [2021-10-28 23:15:00,139 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-10-28 23:15:00,140 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:00,140 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:00,141 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:00,165 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2021-10-28 23:15:00,222 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2021-10-28 23:15:00,222 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:00,223 INFO L263 TraceCheckSpWp]: Trace formula consists of 33 conjuncts, 7 conjunts are in the unsatisfiable core [2021-10-28 23:15:00,224 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:00,292 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 18 proven. 30 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:00,292 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1774776640] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:00,292 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:00,293 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2021-10-28 23:15:00,293 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [328634381] [2021-10-28 23:15:00,333 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:00,333 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-10-28 23:15:00,334 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2021-10-28 23:15:00,334 INFO L87 Difference]: Start difference. First operand 15 states and 17 transitions. cyclomatic complexity: 3 Second operand has 8 states, 8 states have (on average 1.875) internal successors, (15), 7 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:00,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:00,365 INFO L93 Difference]: Finished difference Result 19 states and 21 transitions. [2021-10-28 23:15:00,366 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2021-10-28 23:15:00,366 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 21 transitions. [2021-10-28 23:15:00,367 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:00,368 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 18 states and 20 transitions. [2021-10-28 23:15:00,368 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:00,369 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:00,369 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 20 transitions. [2021-10-28 23:15:00,370 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:00,371 INFO L681 BuchiCegarLoop]: Abstraction has 18 states and 20 transitions. [2021-10-28 23:15:00,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 20 transitions. [2021-10-28 23:15:00,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 17. [2021-10-28 23:15:00,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.1176470588235294) internal successors, (19), 16 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:00,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 19 transitions. [2021-10-28 23:15:00,379 INFO L704 BuchiCegarLoop]: Abstraction has 17 states and 19 transitions. [2021-10-28 23:15:00,379 INFO L587 BuchiCegarLoop]: Abstraction has 17 states and 19 transitions. [2021-10-28 23:15:00,379 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-10-28 23:15:00,380 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 19 transitions. [2021-10-28 23:15:00,383 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:00,383 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:00,384 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:00,386 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [7, 6, 1] [2021-10-28 23:15:00,386 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:00,387 INFO L791 eck$LassoCheckResult]: Stem: 762#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 758#L10-2 assume !!(main_~i~0 < 100); 759#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 760#L10-2 assume !!(main_~i~0 < 100); 761#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 765#L10-2 assume !!(main_~i~0 < 100); 774#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 773#L10-2 assume !!(main_~i~0 < 100); 772#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 771#L10-2 assume !!(main_~i~0 < 100); 769#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 768#L10-2 assume !!(main_~i~0 < 100); 767#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 766#L10-2 assume !!(main_~i~0 < 100); 763#L10 [2021-10-28 23:15:00,387 INFO L793 eck$LassoCheckResult]: Loop: 763#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 764#L10-2 assume !!(main_~i~0 < 100); 767#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 766#L10-2 assume !!(main_~i~0 < 100); 763#L10 [2021-10-28 23:15:00,387 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:00,388 INFO L85 PathProgramCache]: Analyzing trace with hash 1650621912, now seen corresponding path program 6 times [2021-10-28 23:15:00,388 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:00,388 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1897409068] [2021-10-28 23:15:00,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:00,388 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:00,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:00,417 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:00,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:00,424 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:00,431 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:00,431 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 4 times [2021-10-28 23:15:00,432 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:00,432 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [650552602] [2021-10-28 23:15:00,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:00,432 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:00,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:00,439 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:00,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:00,446 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:00,447 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:00,447 INFO L85 PathProgramCache]: Analyzing trace with hash 1321650832, now seen corresponding path program 6 times [2021-10-28 23:15:00,449 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:00,449 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [238822273] [2021-10-28 23:15:00,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:00,450 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:00,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:00,534 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 21 proven. 42 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:00,534 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:00,535 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [238822273] [2021-10-28 23:15:00,535 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [238822273] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:00,535 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [638763706] [2021-10-28 23:15:00,535 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-10-28 23:15:00,535 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:00,536 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:00,538 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:00,577 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2021-10-28 23:15:00,639 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2021-10-28 23:15:00,639 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:00,640 INFO L263 TraceCheckSpWp]: Trace formula consists of 37 conjuncts, 8 conjunts are in the unsatisfiable core [2021-10-28 23:15:00,641 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:00,712 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 21 proven. 42 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:00,713 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [638763706] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:00,713 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:00,713 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2021-10-28 23:15:00,713 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1044459152] [2021-10-28 23:15:00,754 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:00,754 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2021-10-28 23:15:00,755 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2021-10-28 23:15:00,755 INFO L87 Difference]: Start difference. First operand 17 states and 19 transitions. cyclomatic complexity: 3 Second operand has 9 states, 9 states have (on average 1.8888888888888888) internal successors, (17), 8 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:00,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:00,792 INFO L93 Difference]: Finished difference Result 21 states and 23 transitions. [2021-10-28 23:15:00,792 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-10-28 23:15:00,793 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 21 states and 23 transitions. [2021-10-28 23:15:00,800 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:00,802 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 21 states to 20 states and 22 transitions. [2021-10-28 23:15:00,803 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:00,803 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:00,803 INFO L73 IsDeterministic]: Start isDeterministic. Operand 20 states and 22 transitions. [2021-10-28 23:15:00,804 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:00,804 INFO L681 BuchiCegarLoop]: Abstraction has 20 states and 22 transitions. [2021-10-28 23:15:00,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states and 22 transitions. [2021-10-28 23:15:00,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 19. [2021-10-28 23:15:00,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.105263157894737) internal successors, (21), 18 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:00,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 21 transitions. [2021-10-28 23:15:00,815 INFO L704 BuchiCegarLoop]: Abstraction has 19 states and 21 transitions. [2021-10-28 23:15:00,815 INFO L587 BuchiCegarLoop]: Abstraction has 19 states and 21 transitions. [2021-10-28 23:15:00,815 INFO L425 BuchiCegarLoop]: ======== Iteration 9============ [2021-10-28 23:15:00,815 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 21 transitions. [2021-10-28 23:15:00,816 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:00,816 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:00,816 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:00,817 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [8, 7, 1] [2021-10-28 23:15:00,817 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:00,817 INFO L791 eck$LassoCheckResult]: Stem: 865#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 861#L10-2 assume !!(main_~i~0 < 100); 862#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 863#L10-2 assume !!(main_~i~0 < 100); 864#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 868#L10-2 assume !!(main_~i~0 < 100); 879#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 878#L10-2 assume !!(main_~i~0 < 100); 877#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 876#L10-2 assume !!(main_~i~0 < 100); 875#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 874#L10-2 assume !!(main_~i~0 < 100); 872#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 871#L10-2 assume !!(main_~i~0 < 100); 870#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 869#L10-2 assume !!(main_~i~0 < 100); 866#L10 [2021-10-28 23:15:00,818 INFO L793 eck$LassoCheckResult]: Loop: 866#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 867#L10-2 assume !!(main_~i~0 < 100); 870#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 869#L10-2 assume !!(main_~i~0 < 100); 866#L10 [2021-10-28 23:15:00,818 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:00,818 INFO L85 PathProgramCache]: Analyzing trace with hash 1404725621, now seen corresponding path program 7 times [2021-10-28 23:15:00,819 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:00,821 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1825976802] [2021-10-28 23:15:00,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:00,821 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:00,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:00,853 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:00,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:00,869 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:00,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:00,870 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 5 times [2021-10-28 23:15:00,870 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:00,870 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1298892783] [2021-10-28 23:15:00,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:00,871 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:00,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:00,880 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:00,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:00,888 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:00,889 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:00,889 INFO L85 PathProgramCache]: Analyzing trace with hash -1261068371, now seen corresponding path program 7 times [2021-10-28 23:15:00,889 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:00,889 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [360206345] [2021-10-28 23:15:00,890 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:00,890 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:00,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:01,003 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 24 proven. 56 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:01,004 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:01,004 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [360206345] [2021-10-28 23:15:01,004 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [360206345] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:01,005 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1803382839] [2021-10-28 23:15:01,005 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-10-28 23:15:01,005 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:01,006 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:01,009 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:01,029 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2021-10-28 23:15:01,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:01,103 INFO L263 TraceCheckSpWp]: Trace formula consists of 41 conjuncts, 9 conjunts are in the unsatisfiable core [2021-10-28 23:15:01,105 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:01,202 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 24 proven. 56 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:01,203 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1803382839] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:01,203 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:01,203 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 9 [2021-10-28 23:15:01,204 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [641747920] [2021-10-28 23:15:01,236 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:01,237 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2021-10-28 23:15:01,238 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2021-10-28 23:15:01,238 INFO L87 Difference]: Start difference. First operand 19 states and 21 transitions. cyclomatic complexity: 3 Second operand has 10 states, 10 states have (on average 1.9) internal successors, (19), 9 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:01,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:01,275 INFO L93 Difference]: Finished difference Result 23 states and 25 transitions. [2021-10-28 23:15:01,276 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:15:01,276 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 23 states and 25 transitions. [2021-10-28 23:15:01,277 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:01,278 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 23 states to 22 states and 24 transitions. [2021-10-28 23:15:01,278 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:01,278 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:01,278 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22 states and 24 transitions. [2021-10-28 23:15:01,279 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:01,279 INFO L681 BuchiCegarLoop]: Abstraction has 22 states and 24 transitions. [2021-10-28 23:15:01,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states and 24 transitions. [2021-10-28 23:15:01,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 21. [2021-10-28 23:15:01,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 1.0952380952380953) internal successors, (23), 20 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:01,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 23 transitions. [2021-10-28 23:15:01,285 INFO L704 BuchiCegarLoop]: Abstraction has 21 states and 23 transitions. [2021-10-28 23:15:01,285 INFO L587 BuchiCegarLoop]: Abstraction has 21 states and 23 transitions. [2021-10-28 23:15:01,286 INFO L425 BuchiCegarLoop]: ======== Iteration 10============ [2021-10-28 23:15:01,286 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 21 states and 23 transitions. [2021-10-28 23:15:01,286 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:01,287 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:01,287 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:01,289 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [9, 8, 1] [2021-10-28 23:15:01,289 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:01,290 INFO L791 eck$LassoCheckResult]: Stem: 979#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 975#L10-2 assume !!(main_~i~0 < 100); 976#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 977#L10-2 assume !!(main_~i~0 < 100); 978#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 982#L10-2 assume !!(main_~i~0 < 100); 995#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 994#L10-2 assume !!(main_~i~0 < 100); 993#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 992#L10-2 assume !!(main_~i~0 < 100); 991#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 990#L10-2 assume !!(main_~i~0 < 100); 989#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 988#L10-2 assume !!(main_~i~0 < 100); 986#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 985#L10-2 assume !!(main_~i~0 < 100); 984#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 983#L10-2 assume !!(main_~i~0 < 100); 980#L10 [2021-10-28 23:15:01,290 INFO L793 eck$LassoCheckResult]: Loop: 980#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 981#L10-2 assume !!(main_~i~0 < 100); 984#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 983#L10-2 assume !!(main_~i~0 < 100); 980#L10 [2021-10-28 23:15:01,290 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:01,290 INFO L85 PathProgramCache]: Analyzing trace with hash 1321591250, now seen corresponding path program 8 times [2021-10-28 23:15:01,291 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:01,291 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1063077419] [2021-10-28 23:15:01,291 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:01,291 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:01,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:01,319 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:01,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:01,333 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:01,339 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:01,339 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 6 times [2021-10-28 23:15:01,339 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:01,339 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [753583387] [2021-10-28 23:15:01,340 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:01,340 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:01,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:01,345 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:01,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:01,348 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:01,349 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:01,349 INFO L85 PathProgramCache]: Analyzing trace with hash -763125366, now seen corresponding path program 8 times [2021-10-28 23:15:01,350 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:01,350 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1317114781] [2021-10-28 23:15:01,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:01,350 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:01,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:01,467 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 27 proven. 72 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:01,467 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:01,467 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1317114781] [2021-10-28 23:15:01,468 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1317114781] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:01,468 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [832412221] [2021-10-28 23:15:01,468 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-10-28 23:15:01,468 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:01,468 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:01,471 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:01,485 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2021-10-28 23:15:01,559 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-10-28 23:15:01,560 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:01,561 INFO L263 TraceCheckSpWp]: Trace formula consists of 45 conjuncts, 10 conjunts are in the unsatisfiable core [2021-10-28 23:15:01,562 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:01,670 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 27 proven. 72 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:01,670 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [832412221] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:01,670 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:01,671 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 10 [2021-10-28 23:15:01,671 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1024009067] [2021-10-28 23:15:01,709 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:01,709 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2021-10-28 23:15:01,710 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2021-10-28 23:15:01,710 INFO L87 Difference]: Start difference. First operand 21 states and 23 transitions. cyclomatic complexity: 3 Second operand has 11 states, 11 states have (on average 1.9090909090909092) internal successors, (21), 10 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:01,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:01,754 INFO L93 Difference]: Finished difference Result 25 states and 27 transitions. [2021-10-28 23:15:01,755 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 23:15:01,755 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 25 states and 27 transitions. [2021-10-28 23:15:01,758 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:01,759 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 25 states to 24 states and 26 transitions. [2021-10-28 23:15:01,759 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:01,759 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:01,760 INFO L73 IsDeterministic]: Start isDeterministic. Operand 24 states and 26 transitions. [2021-10-28 23:15:01,760 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:01,760 INFO L681 BuchiCegarLoop]: Abstraction has 24 states and 26 transitions. [2021-10-28 23:15:01,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states and 26 transitions. [2021-10-28 23:15:01,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 23. [2021-10-28 23:15:01,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.0869565217391304) internal successors, (25), 22 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:01,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 25 transitions. [2021-10-28 23:15:01,766 INFO L704 BuchiCegarLoop]: Abstraction has 23 states and 25 transitions. [2021-10-28 23:15:01,766 INFO L587 BuchiCegarLoop]: Abstraction has 23 states and 25 transitions. [2021-10-28 23:15:01,766 INFO L425 BuchiCegarLoop]: ======== Iteration 11============ [2021-10-28 23:15:01,767 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 23 states and 25 transitions. [2021-10-28 23:15:01,767 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:01,767 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:01,767 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:01,768 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 9, 1] [2021-10-28 23:15:01,768 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:01,769 INFO L791 eck$LassoCheckResult]: Stem: 1104#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 1100#L10-2 assume !!(main_~i~0 < 100); 1101#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1102#L10-2 assume !!(main_~i~0 < 100); 1103#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1107#L10-2 assume !!(main_~i~0 < 100); 1122#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1121#L10-2 assume !!(main_~i~0 < 100); 1120#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1119#L10-2 assume !!(main_~i~0 < 100); 1118#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1117#L10-2 assume !!(main_~i~0 < 100); 1116#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1115#L10-2 assume !!(main_~i~0 < 100); 1114#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1113#L10-2 assume !!(main_~i~0 < 100); 1111#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1110#L10-2 assume !!(main_~i~0 < 100); 1109#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1108#L10-2 assume !!(main_~i~0 < 100); 1105#L10 [2021-10-28 23:15:01,769 INFO L793 eck$LassoCheckResult]: Loop: 1105#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 1106#L10-2 assume !!(main_~i~0 < 100); 1109#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1108#L10-2 assume !!(main_~i~0 < 100); 1105#L10 [2021-10-28 23:15:01,769 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:01,769 INFO L85 PathProgramCache]: Analyzing trace with hash -1261127953, now seen corresponding path program 9 times [2021-10-28 23:15:01,769 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:01,769 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1192129836] [2021-10-28 23:15:01,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:01,770 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:01,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:01,779 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:01,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:01,787 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:01,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:01,788 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 7 times [2021-10-28 23:15:01,788 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:01,789 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [284197148] [2021-10-28 23:15:01,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:01,789 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:01,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:01,794 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:01,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:01,805 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:01,806 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:01,806 INFO L85 PathProgramCache]: Analyzing trace with hash 1018732583, now seen corresponding path program 9 times [2021-10-28 23:15:01,806 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:01,806 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1653665521] [2021-10-28 23:15:01,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:01,807 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:01,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:01,949 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 30 proven. 90 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:01,950 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:01,950 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1653665521] [2021-10-28 23:15:01,950 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1653665521] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:01,950 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1952177208] [2021-10-28 23:15:01,951 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-10-28 23:15:01,951 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:01,951 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:01,953 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:01,977 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2021-10-28 23:15:02,061 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2021-10-28 23:15:02,061 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:02,062 INFO L263 TraceCheckSpWp]: Trace formula consists of 49 conjuncts, 11 conjunts are in the unsatisfiable core [2021-10-28 23:15:02,063 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:02,188 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 30 proven. 90 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:02,188 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1952177208] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:02,188 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:02,189 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2021-10-28 23:15:02,189 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1463398953] [2021-10-28 23:15:02,240 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:02,241 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2021-10-28 23:15:02,241 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2021-10-28 23:15:02,241 INFO L87 Difference]: Start difference. First operand 23 states and 25 transitions. cyclomatic complexity: 3 Second operand has 12 states, 12 states have (on average 1.9166666666666667) internal successors, (23), 11 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:02,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:02,309 INFO L93 Difference]: Finished difference Result 27 states and 29 transitions. [2021-10-28 23:15:02,309 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2021-10-28 23:15:02,309 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 29 transitions. [2021-10-28 23:15:02,310 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:02,311 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 26 states and 28 transitions. [2021-10-28 23:15:02,311 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:02,311 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:02,311 INFO L73 IsDeterministic]: Start isDeterministic. Operand 26 states and 28 transitions. [2021-10-28 23:15:02,311 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:02,311 INFO L681 BuchiCegarLoop]: Abstraction has 26 states and 28 transitions. [2021-10-28 23:15:02,311 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states and 28 transitions. [2021-10-28 23:15:02,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 25. [2021-10-28 23:15:02,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.08) internal successors, (27), 24 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:02,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 27 transitions. [2021-10-28 23:15:02,314 INFO L704 BuchiCegarLoop]: Abstraction has 25 states and 27 transitions. [2021-10-28 23:15:02,314 INFO L587 BuchiCegarLoop]: Abstraction has 25 states and 27 transitions. [2021-10-28 23:15:02,314 INFO L425 BuchiCegarLoop]: ======== Iteration 12============ [2021-10-28 23:15:02,315 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 25 states and 27 transitions. [2021-10-28 23:15:02,315 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:02,316 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:02,316 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:02,317 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [11, 10, 1] [2021-10-28 23:15:02,317 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:02,317 INFO L791 eck$LassoCheckResult]: Stem: 1240#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 1236#L10-2 assume !!(main_~i~0 < 100); 1237#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1238#L10-2 assume !!(main_~i~0 < 100); 1239#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1243#L10-2 assume !!(main_~i~0 < 100); 1260#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1259#L10-2 assume !!(main_~i~0 < 100); 1258#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1257#L10-2 assume !!(main_~i~0 < 100); 1256#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1255#L10-2 assume !!(main_~i~0 < 100); 1254#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1253#L10-2 assume !!(main_~i~0 < 100); 1252#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1251#L10-2 assume !!(main_~i~0 < 100); 1250#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1249#L10-2 assume !!(main_~i~0 < 100); 1247#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1246#L10-2 assume !!(main_~i~0 < 100); 1245#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1244#L10-2 assume !!(main_~i~0 < 100); 1241#L10 [2021-10-28 23:15:02,318 INFO L793 eck$LassoCheckResult]: Loop: 1241#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 1242#L10-2 assume !!(main_~i~0 < 100); 1245#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1244#L10-2 assume !!(main_~i~0 < 100); 1241#L10 [2021-10-28 23:15:02,318 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:02,318 INFO L85 PathProgramCache]: Analyzing trace with hash -763184948, now seen corresponding path program 10 times [2021-10-28 23:15:02,318 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:02,319 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [692018483] [2021-10-28 23:15:02,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:02,319 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:02,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:02,328 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:02,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:02,335 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:02,336 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:02,336 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 8 times [2021-10-28 23:15:02,336 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:02,337 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [205268688] [2021-10-28 23:15:02,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:02,337 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:02,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:02,341 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:02,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:02,344 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:02,345 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:02,345 INFO L85 PathProgramCache]: Analyzing trace with hash -307729532, now seen corresponding path program 10 times [2021-10-28 23:15:02,345 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:02,346 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1606483213] [2021-10-28 23:15:02,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:02,346 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:02,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:02,484 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 33 proven. 110 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:02,485 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:02,485 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1606483213] [2021-10-28 23:15:02,485 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1606483213] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:02,485 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1853919348] [2021-10-28 23:15:02,485 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-10-28 23:15:02,486 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:02,486 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:02,490 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:02,509 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2021-10-28 23:15:02,595 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-10-28 23:15:02,595 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:02,596 INFO L263 TraceCheckSpWp]: Trace formula consists of 53 conjuncts, 12 conjunts are in the unsatisfiable core [2021-10-28 23:15:02,597 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:02,715 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 33 proven. 110 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:02,716 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1853919348] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:02,716 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:02,717 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 12 [2021-10-28 23:15:02,717 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2067010058] [2021-10-28 23:15:02,747 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:02,748 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-10-28 23:15:02,749 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2021-10-28 23:15:02,749 INFO L87 Difference]: Start difference. First operand 25 states and 27 transitions. cyclomatic complexity: 3 Second operand has 13 states, 13 states have (on average 1.9230769230769231) internal successors, (25), 12 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:02,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:02,790 INFO L93 Difference]: Finished difference Result 29 states and 31 transitions. [2021-10-28 23:15:02,791 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2021-10-28 23:15:02,791 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 29 states and 31 transitions. [2021-10-28 23:15:02,792 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:02,792 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 29 states to 28 states and 30 transitions. [2021-10-28 23:15:02,793 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:02,793 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:02,793 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 30 transitions. [2021-10-28 23:15:02,793 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:02,794 INFO L681 BuchiCegarLoop]: Abstraction has 28 states and 30 transitions. [2021-10-28 23:15:02,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 30 transitions. [2021-10-28 23:15:02,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 27. [2021-10-28 23:15:02,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.0740740740740742) internal successors, (29), 26 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:02,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 29 transitions. [2021-10-28 23:15:02,797 INFO L704 BuchiCegarLoop]: Abstraction has 27 states and 29 transitions. [2021-10-28 23:15:02,797 INFO L587 BuchiCegarLoop]: Abstraction has 27 states and 29 transitions. [2021-10-28 23:15:02,797 INFO L425 BuchiCegarLoop]: ======== Iteration 13============ [2021-10-28 23:15:02,797 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 29 transitions. [2021-10-28 23:15:02,798 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:02,798 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:02,798 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:02,799 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [12, 11, 1] [2021-10-28 23:15:02,799 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:02,800 INFO L791 eck$LassoCheckResult]: Stem: 1387#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 1383#L10-2 assume !!(main_~i~0 < 100); 1384#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1385#L10-2 assume !!(main_~i~0 < 100); 1386#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1390#L10-2 assume !!(main_~i~0 < 100); 1409#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1408#L10-2 assume !!(main_~i~0 < 100); 1407#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1406#L10-2 assume !!(main_~i~0 < 100); 1405#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1404#L10-2 assume !!(main_~i~0 < 100); 1403#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1402#L10-2 assume !!(main_~i~0 < 100); 1401#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1400#L10-2 assume !!(main_~i~0 < 100); 1399#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1398#L10-2 assume !!(main_~i~0 < 100); 1397#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1396#L10-2 assume !!(main_~i~0 < 100); 1394#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1393#L10-2 assume !!(main_~i~0 < 100); 1392#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1391#L10-2 assume !!(main_~i~0 < 100); 1388#L10 [2021-10-28 23:15:02,800 INFO L793 eck$LassoCheckResult]: Loop: 1388#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 1389#L10-2 assume !!(main_~i~0 < 100); 1392#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1391#L10-2 assume !!(main_~i~0 < 100); 1388#L10 [2021-10-28 23:15:02,800 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:02,800 INFO L85 PathProgramCache]: Analyzing trace with hash 1018673001, now seen corresponding path program 11 times [2021-10-28 23:15:02,800 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:02,801 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1063934925] [2021-10-28 23:15:02,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:02,801 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:02,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:02,808 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:02,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:02,816 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:02,817 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:02,817 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 9 times [2021-10-28 23:15:02,817 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:02,817 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [696526565] [2021-10-28 23:15:02,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:02,818 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:02,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:02,822 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:02,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:02,825 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:02,826 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:02,826 INFO L85 PathProgramCache]: Analyzing trace with hash 567464865, now seen corresponding path program 11 times [2021-10-28 23:15:02,826 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:02,826 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1326435803] [2021-10-28 23:15:02,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:02,827 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:02,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:02,965 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 36 proven. 132 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:02,965 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:02,966 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1326435803] [2021-10-28 23:15:02,966 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1326435803] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:02,966 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [725963099] [2021-10-28 23:15:02,966 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-10-28 23:15:02,966 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:02,967 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:02,969 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:02,971 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process [2021-10-28 23:15:03,088 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 14 check-sat command(s) [2021-10-28 23:15:03,088 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:03,089 INFO L263 TraceCheckSpWp]: Trace formula consists of 57 conjuncts, 13 conjunts are in the unsatisfiable core [2021-10-28 23:15:03,090 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:03,214 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 36 proven. 132 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:03,214 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [725963099] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:03,215 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:03,215 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 13 [2021-10-28 23:15:03,215 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1062272130] [2021-10-28 23:15:03,252 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:03,253 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2021-10-28 23:15:03,253 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2021-10-28 23:15:03,253 INFO L87 Difference]: Start difference. First operand 27 states and 29 transitions. cyclomatic complexity: 3 Second operand has 14 states, 14 states have (on average 1.9285714285714286) internal successors, (27), 13 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:03,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:03,308 INFO L93 Difference]: Finished difference Result 31 states and 33 transitions. [2021-10-28 23:15:03,308 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2021-10-28 23:15:03,309 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 31 states and 33 transitions. [2021-10-28 23:15:03,309 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:03,310 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 31 states to 30 states and 32 transitions. [2021-10-28 23:15:03,310 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:03,311 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:03,311 INFO L73 IsDeterministic]: Start isDeterministic. Operand 30 states and 32 transitions. [2021-10-28 23:15:03,311 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:03,311 INFO L681 BuchiCegarLoop]: Abstraction has 30 states and 32 transitions. [2021-10-28 23:15:03,311 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states and 32 transitions. [2021-10-28 23:15:03,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 29. [2021-10-28 23:15:03,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.0689655172413792) internal successors, (31), 28 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:03,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 31 transitions. [2021-10-28 23:15:03,314 INFO L704 BuchiCegarLoop]: Abstraction has 29 states and 31 transitions. [2021-10-28 23:15:03,314 INFO L587 BuchiCegarLoop]: Abstraction has 29 states and 31 transitions. [2021-10-28 23:15:03,314 INFO L425 BuchiCegarLoop]: ======== Iteration 14============ [2021-10-28 23:15:03,315 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 31 transitions. [2021-10-28 23:15:03,315 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:03,315 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:03,315 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:03,316 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [13, 12, 1] [2021-10-28 23:15:03,317 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:03,317 INFO L791 eck$LassoCheckResult]: Stem: 1545#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 1541#L10-2 assume !!(main_~i~0 < 100); 1542#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1543#L10-2 assume !!(main_~i~0 < 100); 1544#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1548#L10-2 assume !!(main_~i~0 < 100); 1569#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1568#L10-2 assume !!(main_~i~0 < 100); 1567#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1566#L10-2 assume !!(main_~i~0 < 100); 1565#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1564#L10-2 assume !!(main_~i~0 < 100); 1563#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1562#L10-2 assume !!(main_~i~0 < 100); 1561#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1560#L10-2 assume !!(main_~i~0 < 100); 1559#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1558#L10-2 assume !!(main_~i~0 < 100); 1557#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1556#L10-2 assume !!(main_~i~0 < 100); 1555#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1554#L10-2 assume !!(main_~i~0 < 100); 1552#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1551#L10-2 assume !!(main_~i~0 < 100); 1550#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1549#L10-2 assume !!(main_~i~0 < 100); 1546#L10 [2021-10-28 23:15:03,317 INFO L793 eck$LassoCheckResult]: Loop: 1546#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 1547#L10-2 assume !!(main_~i~0 < 100); 1550#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1549#L10-2 assume !!(main_~i~0 < 100); 1546#L10 [2021-10-28 23:15:03,317 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:03,318 INFO L85 PathProgramCache]: Analyzing trace with hash -307789114, now seen corresponding path program 12 times [2021-10-28 23:15:03,318 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:03,318 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [950808571] [2021-10-28 23:15:03,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:03,319 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:03,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:03,326 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:03,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:03,333 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:03,334 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:03,334 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 10 times [2021-10-28 23:15:03,334 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:03,335 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [112548098] [2021-10-28 23:15:03,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:03,335 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:03,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:03,339 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:03,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:03,341 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:03,342 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:03,342 INFO L85 PathProgramCache]: Analyzing trace with hash -184309634, now seen corresponding path program 12 times [2021-10-28 23:15:03,342 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:03,342 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1858766653] [2021-10-28 23:15:03,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:03,343 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:03,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:03,497 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 39 proven. 156 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:03,498 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:03,498 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1858766653] [2021-10-28 23:15:03,498 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1858766653] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:03,498 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1566107613] [2021-10-28 23:15:03,498 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-10-28 23:15:03,499 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:03,499 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:03,504 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:03,522 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Waiting until timeout for monitored process [2021-10-28 23:15:03,687 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 15 check-sat command(s) [2021-10-28 23:15:03,687 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:03,688 INFO L263 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-28 23:15:03,690 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:03,797 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 39 proven. 156 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:03,798 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1566107613] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:03,798 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:03,798 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 14 [2021-10-28 23:15:03,798 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1626647379] [2021-10-28 23:15:03,830 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:03,831 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2021-10-28 23:15:03,831 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=105, Unknown=0, NotChecked=0, Total=210 [2021-10-28 23:15:03,831 INFO L87 Difference]: Start difference. First operand 29 states and 31 transitions. cyclomatic complexity: 3 Second operand has 15 states, 15 states have (on average 1.9333333333333333) internal successors, (29), 14 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:03,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:03,885 INFO L93 Difference]: Finished difference Result 33 states and 35 transitions. [2021-10-28 23:15:03,886 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2021-10-28 23:15:03,886 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 33 states and 35 transitions. [2021-10-28 23:15:03,887 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:03,887 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 33 states to 32 states and 34 transitions. [2021-10-28 23:15:03,887 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:03,888 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:03,888 INFO L73 IsDeterministic]: Start isDeterministic. Operand 32 states and 34 transitions. [2021-10-28 23:15:03,888 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:03,888 INFO L681 BuchiCegarLoop]: Abstraction has 32 states and 34 transitions. [2021-10-28 23:15:03,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states and 34 transitions. [2021-10-28 23:15:03,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 31. [2021-10-28 23:15:03,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.064516129032258) internal successors, (33), 30 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:03,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 33 transitions. [2021-10-28 23:15:03,902 INFO L704 BuchiCegarLoop]: Abstraction has 31 states and 33 transitions. [2021-10-28 23:15:03,902 INFO L587 BuchiCegarLoop]: Abstraction has 31 states and 33 transitions. [2021-10-28 23:15:03,903 INFO L425 BuchiCegarLoop]: ======== Iteration 15============ [2021-10-28 23:15:03,903 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 31 states and 33 transitions. [2021-10-28 23:15:03,903 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:03,903 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:03,904 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:03,912 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [14, 13, 1] [2021-10-28 23:15:03,912 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:03,913 INFO L791 eck$LassoCheckResult]: Stem: 1714#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 1710#L10-2 assume !!(main_~i~0 < 100); 1711#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1712#L10-2 assume !!(main_~i~0 < 100); 1713#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1717#L10-2 assume !!(main_~i~0 < 100); 1740#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1739#L10-2 assume !!(main_~i~0 < 100); 1738#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1737#L10-2 assume !!(main_~i~0 < 100); 1736#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1735#L10-2 assume !!(main_~i~0 < 100); 1734#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1733#L10-2 assume !!(main_~i~0 < 100); 1732#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1731#L10-2 assume !!(main_~i~0 < 100); 1730#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1729#L10-2 assume !!(main_~i~0 < 100); 1728#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1727#L10-2 assume !!(main_~i~0 < 100); 1726#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1725#L10-2 assume !!(main_~i~0 < 100); 1724#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1723#L10-2 assume !!(main_~i~0 < 100); 1721#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1720#L10-2 assume !!(main_~i~0 < 100); 1719#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1718#L10-2 assume !!(main_~i~0 < 100); 1715#L10 [2021-10-28 23:15:03,915 INFO L793 eck$LassoCheckResult]: Loop: 1715#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 1716#L10-2 assume !!(main_~i~0 < 100); 1719#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1718#L10-2 assume !!(main_~i~0 < 100); 1715#L10 [2021-10-28 23:15:03,916 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:03,916 INFO L85 PathProgramCache]: Analyzing trace with hash 567405283, now seen corresponding path program 13 times [2021-10-28 23:15:03,916 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:03,916 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1237177218] [2021-10-28 23:15:03,916 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:03,917 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:03,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:03,929 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:03,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:03,943 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:03,943 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:03,943 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 11 times [2021-10-28 23:15:03,944 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:03,944 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [788898161] [2021-10-28 23:15:03,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:03,944 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:03,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:03,949 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:03,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:03,953 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:03,954 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:03,954 INFO L85 PathProgramCache]: Analyzing trace with hash -1085097445, now seen corresponding path program 13 times [2021-10-28 23:15:03,954 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:03,954 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1119683104] [2021-10-28 23:15:03,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:03,955 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:03,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:04,145 INFO L134 CoverageAnalysis]: Checked inductivity of 225 backedges. 42 proven. 182 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:04,145 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:04,145 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1119683104] [2021-10-28 23:15:04,145 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1119683104] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:04,146 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2100898870] [2021-10-28 23:15:04,146 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-10-28 23:15:04,146 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:04,146 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:04,147 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:04,148 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Waiting until timeout for monitored process [2021-10-28 23:15:04,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:04,292 INFO L263 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 15 conjunts are in the unsatisfiable core [2021-10-28 23:15:04,293 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:04,410 INFO L134 CoverageAnalysis]: Checked inductivity of 225 backedges. 42 proven. 182 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:04,410 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2100898870] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:04,410 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:04,410 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 15 [2021-10-28 23:15:04,411 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [977522866] [2021-10-28 23:15:04,441 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:04,442 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2021-10-28 23:15:04,442 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2021-10-28 23:15:04,442 INFO L87 Difference]: Start difference. First operand 31 states and 33 transitions. cyclomatic complexity: 3 Second operand has 16 states, 16 states have (on average 1.9375) internal successors, (31), 15 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:04,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:04,497 INFO L93 Difference]: Finished difference Result 35 states and 37 transitions. [2021-10-28 23:15:04,497 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2021-10-28 23:15:04,497 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 37 transitions. [2021-10-28 23:15:04,500 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:04,500 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 34 states and 36 transitions. [2021-10-28 23:15:04,500 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:04,501 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:04,501 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34 states and 36 transitions. [2021-10-28 23:15:04,501 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:04,501 INFO L681 BuchiCegarLoop]: Abstraction has 34 states and 36 transitions. [2021-10-28 23:15:04,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states and 36 transitions. [2021-10-28 23:15:04,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 33. [2021-10-28 23:15:04,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 1.0606060606060606) internal successors, (35), 32 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:04,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 35 transitions. [2021-10-28 23:15:04,507 INFO L704 BuchiCegarLoop]: Abstraction has 33 states and 35 transitions. [2021-10-28 23:15:04,507 INFO L587 BuchiCegarLoop]: Abstraction has 33 states and 35 transitions. [2021-10-28 23:15:04,507 INFO L425 BuchiCegarLoop]: ======== Iteration 16============ [2021-10-28 23:15:04,507 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 33 states and 35 transitions. [2021-10-28 23:15:04,509 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:04,509 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:04,509 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:04,510 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [15, 14, 1] [2021-10-28 23:15:04,510 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:04,511 INFO L791 eck$LassoCheckResult]: Stem: 1894#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 1890#L10-2 assume !!(main_~i~0 < 100); 1891#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1892#L10-2 assume !!(main_~i~0 < 100); 1893#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1897#L10-2 assume !!(main_~i~0 < 100); 1922#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1921#L10-2 assume !!(main_~i~0 < 100); 1920#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1919#L10-2 assume !!(main_~i~0 < 100); 1918#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1917#L10-2 assume !!(main_~i~0 < 100); 1916#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1915#L10-2 assume !!(main_~i~0 < 100); 1914#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1913#L10-2 assume !!(main_~i~0 < 100); 1912#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1911#L10-2 assume !!(main_~i~0 < 100); 1910#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1909#L10-2 assume !!(main_~i~0 < 100); 1908#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1907#L10-2 assume !!(main_~i~0 < 100); 1906#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1905#L10-2 assume !!(main_~i~0 < 100); 1904#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1903#L10-2 assume !!(main_~i~0 < 100); 1901#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1900#L10-2 assume !!(main_~i~0 < 100); 1899#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1898#L10-2 assume !!(main_~i~0 < 100); 1895#L10 [2021-10-28 23:15:04,511 INFO L793 eck$LassoCheckResult]: Loop: 1895#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 1896#L10-2 assume !!(main_~i~0 < 100); 1899#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1898#L10-2 assume !!(main_~i~0 < 100); 1895#L10 [2021-10-28 23:15:04,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:04,512 INFO L85 PathProgramCache]: Analyzing trace with hash -184369216, now seen corresponding path program 14 times [2021-10-28 23:15:04,512 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:04,512 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1233371527] [2021-10-28 23:15:04,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:04,512 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:04,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:04,526 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:04,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:04,539 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:04,542 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:04,542 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 12 times [2021-10-28 23:15:04,542 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:04,542 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [776133596] [2021-10-28 23:15:04,543 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:04,543 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:04,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:04,549 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:04,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:04,551 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:04,552 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:04,552 INFO L85 PathProgramCache]: Analyzing trace with hash 841209976, now seen corresponding path program 14 times [2021-10-28 23:15:04,553 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:04,553 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1541510680] [2021-10-28 23:15:04,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:04,553 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:04,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:04,786 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 45 proven. 210 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:04,786 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:04,786 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1541510680] [2021-10-28 23:15:04,786 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1541510680] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:04,787 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [672967514] [2021-10-28 23:15:04,787 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-10-28 23:15:04,787 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:04,787 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:04,789 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:04,809 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Waiting until timeout for monitored process [2021-10-28 23:15:04,960 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-10-28 23:15:04,960 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:04,961 INFO L263 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 16 conjunts are in the unsatisfiable core [2021-10-28 23:15:04,962 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:05,105 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 45 proven. 210 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:05,106 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [672967514] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:05,106 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:05,106 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 16 [2021-10-28 23:15:05,106 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [325146035] [2021-10-28 23:15:05,143 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:05,144 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2021-10-28 23:15:05,144 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=136, Unknown=0, NotChecked=0, Total=272 [2021-10-28 23:15:05,145 INFO L87 Difference]: Start difference. First operand 33 states and 35 transitions. cyclomatic complexity: 3 Second operand has 17 states, 17 states have (on average 1.9411764705882353) internal successors, (33), 16 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:05,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:05,213 INFO L93 Difference]: Finished difference Result 37 states and 39 transitions. [2021-10-28 23:15:05,213 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2021-10-28 23:15:05,214 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 37 states and 39 transitions. [2021-10-28 23:15:05,214 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:05,215 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 37 states to 36 states and 38 transitions. [2021-10-28 23:15:05,215 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:05,216 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:05,216 INFO L73 IsDeterministic]: Start isDeterministic. Operand 36 states and 38 transitions. [2021-10-28 23:15:05,216 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:05,216 INFO L681 BuchiCegarLoop]: Abstraction has 36 states and 38 transitions. [2021-10-28 23:15:05,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states and 38 transitions. [2021-10-28 23:15:05,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 35. [2021-10-28 23:15:05,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 35 states have (on average 1.0571428571428572) internal successors, (37), 34 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:05,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 37 transitions. [2021-10-28 23:15:05,219 INFO L704 BuchiCegarLoop]: Abstraction has 35 states and 37 transitions. [2021-10-28 23:15:05,220 INFO L587 BuchiCegarLoop]: Abstraction has 35 states and 37 transitions. [2021-10-28 23:15:05,220 INFO L425 BuchiCegarLoop]: ======== Iteration 17============ [2021-10-28 23:15:05,220 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 35 states and 37 transitions. [2021-10-28 23:15:05,220 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:05,221 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:05,221 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:05,221 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [16, 15, 1] [2021-10-28 23:15:05,222 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:05,222 INFO L791 eck$LassoCheckResult]: Stem: 2085#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 2081#L10-2 assume !!(main_~i~0 < 100); 2082#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2083#L10-2 assume !!(main_~i~0 < 100); 2084#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2088#L10-2 assume !!(main_~i~0 < 100); 2115#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2114#L10-2 assume !!(main_~i~0 < 100); 2113#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2112#L10-2 assume !!(main_~i~0 < 100); 2111#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2110#L10-2 assume !!(main_~i~0 < 100); 2109#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2108#L10-2 assume !!(main_~i~0 < 100); 2107#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2106#L10-2 assume !!(main_~i~0 < 100); 2105#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2104#L10-2 assume !!(main_~i~0 < 100); 2103#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2102#L10-2 assume !!(main_~i~0 < 100); 2101#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2100#L10-2 assume !!(main_~i~0 < 100); 2099#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2098#L10-2 assume !!(main_~i~0 < 100); 2097#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2096#L10-2 assume !!(main_~i~0 < 100); 2095#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2094#L10-2 assume !!(main_~i~0 < 100); 2092#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2091#L10-2 assume !!(main_~i~0 < 100); 2090#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2089#L10-2 assume !!(main_~i~0 < 100); 2086#L10 [2021-10-28 23:15:05,222 INFO L793 eck$LassoCheckResult]: Loop: 2086#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 2087#L10-2 assume !!(main_~i~0 < 100); 2090#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2089#L10-2 assume !!(main_~i~0 < 100); 2086#L10 [2021-10-28 23:15:05,223 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:05,223 INFO L85 PathProgramCache]: Analyzing trace with hash -1085157027, now seen corresponding path program 15 times [2021-10-28 23:15:05,223 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:05,223 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [302566713] [2021-10-28 23:15:05,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:05,224 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:05,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:05,232 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:05,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:05,240 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:05,240 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:05,240 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 13 times [2021-10-28 23:15:05,241 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:05,241 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [590653692] [2021-10-28 23:15:05,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:05,241 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:05,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:05,245 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:05,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:05,248 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:05,248 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:05,248 INFO L85 PathProgramCache]: Analyzing trace with hash 891736981, now seen corresponding path program 15 times [2021-10-28 23:15:05,249 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:05,249 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [187330454] [2021-10-28 23:15:05,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:05,249 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:05,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:05,463 INFO L134 CoverageAnalysis]: Checked inductivity of 289 backedges. 48 proven. 240 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:05,463 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:05,463 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [187330454] [2021-10-28 23:15:05,463 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [187330454] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:05,463 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1506810607] [2021-10-28 23:15:05,463 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-10-28 23:15:05,464 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:05,464 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:05,466 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:05,481 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Waiting until timeout for monitored process [2021-10-28 23:15:05,654 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 18 check-sat command(s) [2021-10-28 23:15:05,654 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:05,655 INFO L263 TraceCheckSpWp]: Trace formula consists of 73 conjuncts, 17 conjunts are in the unsatisfiable core [2021-10-28 23:15:05,656 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:05,837 INFO L134 CoverageAnalysis]: Checked inductivity of 289 backedges. 48 proven. 240 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:05,838 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1506810607] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:05,838 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:05,838 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 17 [2021-10-28 23:15:05,838 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [156204580] [2021-10-28 23:15:05,878 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:05,879 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2021-10-28 23:15:05,879 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2021-10-28 23:15:05,879 INFO L87 Difference]: Start difference. First operand 35 states and 37 transitions. cyclomatic complexity: 3 Second operand has 18 states, 18 states have (on average 1.9444444444444444) internal successors, (35), 17 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:05,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:05,950 INFO L93 Difference]: Finished difference Result 39 states and 41 transitions. [2021-10-28 23:15:05,950 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2021-10-28 23:15:05,951 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 39 states and 41 transitions. [2021-10-28 23:15:05,953 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:05,956 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 39 states to 38 states and 40 transitions. [2021-10-28 23:15:05,956 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:05,956 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:05,956 INFO L73 IsDeterministic]: Start isDeterministic. Operand 38 states and 40 transitions. [2021-10-28 23:15:05,957 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:05,957 INFO L681 BuchiCegarLoop]: Abstraction has 38 states and 40 transitions. [2021-10-28 23:15:05,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states and 40 transitions. [2021-10-28 23:15:05,969 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 37. [2021-10-28 23:15:05,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.054054054054054) internal successors, (39), 36 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:05,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 39 transitions. [2021-10-28 23:15:05,972 INFO L704 BuchiCegarLoop]: Abstraction has 37 states and 39 transitions. [2021-10-28 23:15:05,972 INFO L587 BuchiCegarLoop]: Abstraction has 37 states and 39 transitions. [2021-10-28 23:15:05,972 INFO L425 BuchiCegarLoop]: ======== Iteration 18============ [2021-10-28 23:15:05,972 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 37 states and 39 transitions. [2021-10-28 23:15:05,973 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:05,973 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:05,973 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:05,974 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [17, 16, 1] [2021-10-28 23:15:05,974 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:05,975 INFO L791 eck$LassoCheckResult]: Stem: 2287#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 2283#L10-2 assume !!(main_~i~0 < 100); 2284#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2285#L10-2 assume !!(main_~i~0 < 100); 2286#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2290#L10-2 assume !!(main_~i~0 < 100); 2319#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2318#L10-2 assume !!(main_~i~0 < 100); 2317#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2316#L10-2 assume !!(main_~i~0 < 100); 2315#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2314#L10-2 assume !!(main_~i~0 < 100); 2313#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2312#L10-2 assume !!(main_~i~0 < 100); 2311#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2310#L10-2 assume !!(main_~i~0 < 100); 2309#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2308#L10-2 assume !!(main_~i~0 < 100); 2307#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2306#L10-2 assume !!(main_~i~0 < 100); 2305#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2304#L10-2 assume !!(main_~i~0 < 100); 2303#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2302#L10-2 assume !!(main_~i~0 < 100); 2301#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2300#L10-2 assume !!(main_~i~0 < 100); 2299#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2298#L10-2 assume !!(main_~i~0 < 100); 2297#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2296#L10-2 assume !!(main_~i~0 < 100); 2294#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2293#L10-2 assume !!(main_~i~0 < 100); 2292#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2291#L10-2 assume !!(main_~i~0 < 100); 2288#L10 [2021-10-28 23:15:05,975 INFO L793 eck$LassoCheckResult]: Loop: 2288#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 2289#L10-2 assume !!(main_~i~0 < 100); 2292#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2291#L10-2 assume !!(main_~i~0 < 100); 2288#L10 [2021-10-28 23:15:05,976 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:05,976 INFO L85 PathProgramCache]: Analyzing trace with hash 841150394, now seen corresponding path program 16 times [2021-10-28 23:15:05,976 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:05,976 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [56022610] [2021-10-28 23:15:05,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:05,977 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:05,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:05,990 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:05,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:06,000 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:06,001 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:06,001 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 14 times [2021-10-28 23:15:06,001 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:06,002 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1293833777] [2021-10-28 23:15:06,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:06,002 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:06,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:06,008 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:06,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:06,010 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:06,011 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:06,011 INFO L85 PathProgramCache]: Analyzing trace with hash -2091418766, now seen corresponding path program 16 times [2021-10-28 23:15:06,011 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:06,011 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [305820941] [2021-10-28 23:15:06,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:06,012 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:06,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:06,249 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 51 proven. 272 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:06,249 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:06,250 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [305820941] [2021-10-28 23:15:06,250 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [305820941] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:06,250 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [472363066] [2021-10-28 23:15:06,250 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-10-28 23:15:06,250 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:06,250 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:06,253 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:06,254 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Waiting until timeout for monitored process [2021-10-28 23:15:06,443 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-10-28 23:15:06,443 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:06,445 INFO L263 TraceCheckSpWp]: Trace formula consists of 77 conjuncts, 18 conjunts are in the unsatisfiable core [2021-10-28 23:15:06,447 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:06,618 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 51 proven. 272 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:06,619 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [472363066] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:06,619 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:06,619 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 18 [2021-10-28 23:15:06,619 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [161910195] [2021-10-28 23:15:06,656 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:06,656 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2021-10-28 23:15:06,657 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2021-10-28 23:15:06,657 INFO L87 Difference]: Start difference. First operand 37 states and 39 transitions. cyclomatic complexity: 3 Second operand has 19 states, 19 states have (on average 1.9473684210526316) internal successors, (37), 18 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:06,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:06,720 INFO L93 Difference]: Finished difference Result 41 states and 43 transitions. [2021-10-28 23:15:06,720 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-10-28 23:15:06,721 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 41 states and 43 transitions. [2021-10-28 23:15:06,721 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:06,725 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 41 states to 40 states and 42 transitions. [2021-10-28 23:15:06,726 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:06,726 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:06,726 INFO L73 IsDeterministic]: Start isDeterministic. Operand 40 states and 42 transitions. [2021-10-28 23:15:06,730 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:06,731 INFO L681 BuchiCegarLoop]: Abstraction has 40 states and 42 transitions. [2021-10-28 23:15:06,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states and 42 transitions. [2021-10-28 23:15:06,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 39. [2021-10-28 23:15:06,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 39 states have (on average 1.0512820512820513) internal successors, (41), 38 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:06,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 41 transitions. [2021-10-28 23:15:06,734 INFO L704 BuchiCegarLoop]: Abstraction has 39 states and 41 transitions. [2021-10-28 23:15:06,734 INFO L587 BuchiCegarLoop]: Abstraction has 39 states and 41 transitions. [2021-10-28 23:15:06,734 INFO L425 BuchiCegarLoop]: ======== Iteration 19============ [2021-10-28 23:15:06,734 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 39 states and 41 transitions. [2021-10-28 23:15:06,735 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:06,735 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:06,735 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:06,738 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [18, 17, 1] [2021-10-28 23:15:06,738 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:06,738 INFO L791 eck$LassoCheckResult]: Stem: 2500#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 2496#L10-2 assume !!(main_~i~0 < 100); 2497#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2498#L10-2 assume !!(main_~i~0 < 100); 2499#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2503#L10-2 assume !!(main_~i~0 < 100); 2534#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2533#L10-2 assume !!(main_~i~0 < 100); 2532#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2531#L10-2 assume !!(main_~i~0 < 100); 2530#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2529#L10-2 assume !!(main_~i~0 < 100); 2528#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2527#L10-2 assume !!(main_~i~0 < 100); 2526#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2525#L10-2 assume !!(main_~i~0 < 100); 2524#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2523#L10-2 assume !!(main_~i~0 < 100); 2522#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2521#L10-2 assume !!(main_~i~0 < 100); 2520#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2519#L10-2 assume !!(main_~i~0 < 100); 2518#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2517#L10-2 assume !!(main_~i~0 < 100); 2516#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2515#L10-2 assume !!(main_~i~0 < 100); 2514#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2513#L10-2 assume !!(main_~i~0 < 100); 2512#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2511#L10-2 assume !!(main_~i~0 < 100); 2510#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2509#L10-2 assume !!(main_~i~0 < 100); 2507#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2506#L10-2 assume !!(main_~i~0 < 100); 2505#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2504#L10-2 assume !!(main_~i~0 < 100); 2501#L10 [2021-10-28 23:15:06,738 INFO L793 eck$LassoCheckResult]: Loop: 2501#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 2502#L10-2 assume !!(main_~i~0 < 100); 2505#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2504#L10-2 assume !!(main_~i~0 < 100); 2501#L10 [2021-10-28 23:15:06,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:06,739 INFO L85 PathProgramCache]: Analyzing trace with hash 891677399, now seen corresponding path program 17 times [2021-10-28 23:15:06,739 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:06,741 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1406968163] [2021-10-28 23:15:06,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:06,742 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:06,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:06,751 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:06,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:06,764 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:06,765 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:06,765 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 15 times [2021-10-28 23:15:06,765 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:06,766 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [359212143] [2021-10-28 23:15:06,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:06,766 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:06,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:06,770 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:06,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:06,774 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:06,775 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:06,775 INFO L85 PathProgramCache]: Analyzing trace with hash 134062095, now seen corresponding path program 17 times [2021-10-28 23:15:06,775 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:06,776 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [818337143] [2021-10-28 23:15:06,776 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:06,776 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:06,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:07,065 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 54 proven. 306 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:07,065 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:07,065 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [818337143] [2021-10-28 23:15:07,066 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [818337143] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:07,066 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [585682578] [2021-10-28 23:15:07,066 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-10-28 23:15:07,066 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:07,066 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:07,073 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:07,089 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Waiting until timeout for monitored process [2021-10-28 23:15:07,293 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 20 check-sat command(s) [2021-10-28 23:15:07,293 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:07,295 INFO L263 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 19 conjunts are in the unsatisfiable core [2021-10-28 23:15:07,297 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:07,463 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 54 proven. 306 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:07,463 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [585682578] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:07,464 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:07,464 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 19 [2021-10-28 23:15:07,464 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1753174921] [2021-10-28 23:15:07,502 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:07,502 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2021-10-28 23:15:07,503 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2021-10-28 23:15:07,503 INFO L87 Difference]: Start difference. First operand 39 states and 41 transitions. cyclomatic complexity: 3 Second operand has 20 states, 20 states have (on average 1.95) internal successors, (39), 19 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:07,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:07,569 INFO L93 Difference]: Finished difference Result 43 states and 45 transitions. [2021-10-28 23:15:07,569 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2021-10-28 23:15:07,570 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 43 states and 45 transitions. [2021-10-28 23:15:07,570 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:07,574 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 43 states to 42 states and 44 transitions. [2021-10-28 23:15:07,574 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:07,575 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:07,575 INFO L73 IsDeterministic]: Start isDeterministic. Operand 42 states and 44 transitions. [2021-10-28 23:15:07,575 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:07,575 INFO L681 BuchiCegarLoop]: Abstraction has 42 states and 44 transitions. [2021-10-28 23:15:07,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states and 44 transitions. [2021-10-28 23:15:07,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 41. [2021-10-28 23:15:07,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 41 states have (on average 1.048780487804878) internal successors, (43), 40 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:07,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 43 transitions. [2021-10-28 23:15:07,580 INFO L704 BuchiCegarLoop]: Abstraction has 41 states and 43 transitions. [2021-10-28 23:15:07,580 INFO L587 BuchiCegarLoop]: Abstraction has 41 states and 43 transitions. [2021-10-28 23:15:07,580 INFO L425 BuchiCegarLoop]: ======== Iteration 20============ [2021-10-28 23:15:07,580 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 41 states and 43 transitions. [2021-10-28 23:15:07,581 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:07,581 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:07,581 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:07,585 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [19, 18, 1] [2021-10-28 23:15:07,585 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:07,586 INFO L791 eck$LassoCheckResult]: Stem: 2724#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 2720#L10-2 assume !!(main_~i~0 < 100); 2721#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2722#L10-2 assume !!(main_~i~0 < 100); 2723#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2727#L10-2 assume !!(main_~i~0 < 100); 2760#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2759#L10-2 assume !!(main_~i~0 < 100); 2758#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2757#L10-2 assume !!(main_~i~0 < 100); 2756#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2755#L10-2 assume !!(main_~i~0 < 100); 2754#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2753#L10-2 assume !!(main_~i~0 < 100); 2752#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2751#L10-2 assume !!(main_~i~0 < 100); 2750#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2749#L10-2 assume !!(main_~i~0 < 100); 2748#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2747#L10-2 assume !!(main_~i~0 < 100); 2746#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2745#L10-2 assume !!(main_~i~0 < 100); 2744#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2743#L10-2 assume !!(main_~i~0 < 100); 2742#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2741#L10-2 assume !!(main_~i~0 < 100); 2740#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2739#L10-2 assume !!(main_~i~0 < 100); 2738#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2737#L10-2 assume !!(main_~i~0 < 100); 2736#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2735#L10-2 assume !!(main_~i~0 < 100); 2734#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2733#L10-2 assume !!(main_~i~0 < 100); 2731#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2730#L10-2 assume !!(main_~i~0 < 100); 2729#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2728#L10-2 assume !!(main_~i~0 < 100); 2725#L10 [2021-10-28 23:15:07,586 INFO L793 eck$LassoCheckResult]: Loop: 2725#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 2726#L10-2 assume !!(main_~i~0 < 100); 2729#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2728#L10-2 assume !!(main_~i~0 < 100); 2725#L10 [2021-10-28 23:15:07,586 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:07,587 INFO L85 PathProgramCache]: Analyzing trace with hash -2091478348, now seen corresponding path program 18 times [2021-10-28 23:15:07,587 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:07,588 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [392427558] [2021-10-28 23:15:07,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:07,588 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:07,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:07,597 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:07,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:07,614 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:07,617 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:07,617 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 16 times [2021-10-28 23:15:07,618 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:07,618 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1938624572] [2021-10-28 23:15:07,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:07,618 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:07,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:07,628 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:07,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:07,631 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:07,631 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:07,632 INFO L85 PathProgramCache]: Analyzing trace with hash -72543892, now seen corresponding path program 18 times [2021-10-28 23:15:07,632 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:07,632 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [928635684] [2021-10-28 23:15:07,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:07,632 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:07,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:07,948 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 57 proven. 342 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:07,948 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:07,948 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [928635684] [2021-10-28 23:15:07,948 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [928635684] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:07,948 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [118921575] [2021-10-28 23:15:07,949 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-10-28 23:15:07,949 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:07,949 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:07,950 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:07,952 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Waiting until timeout for monitored process [2021-10-28 23:15:08,212 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 21 check-sat command(s) [2021-10-28 23:15:08,212 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:08,213 INFO L263 TraceCheckSpWp]: Trace formula consists of 85 conjuncts, 20 conjunts are in the unsatisfiable core [2021-10-28 23:15:08,214 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:08,368 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 57 proven. 342 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:08,368 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [118921575] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:08,369 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:08,369 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 20 [2021-10-28 23:15:08,369 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1460573497] [2021-10-28 23:15:08,403 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:08,404 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2021-10-28 23:15:08,404 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=210, Invalid=210, Unknown=0, NotChecked=0, Total=420 [2021-10-28 23:15:08,405 INFO L87 Difference]: Start difference. First operand 41 states and 43 transitions. cyclomatic complexity: 3 Second operand has 21 states, 21 states have (on average 1.9523809523809523) internal successors, (41), 20 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:08,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:08,467 INFO L93 Difference]: Finished difference Result 45 states and 47 transitions. [2021-10-28 23:15:08,468 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2021-10-28 23:15:08,468 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 45 states and 47 transitions. [2021-10-28 23:15:08,470 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:08,471 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 45 states to 44 states and 46 transitions. [2021-10-28 23:15:08,471 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:08,471 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:08,471 INFO L73 IsDeterministic]: Start isDeterministic. Operand 44 states and 46 transitions. [2021-10-28 23:15:08,472 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:08,472 INFO L681 BuchiCegarLoop]: Abstraction has 44 states and 46 transitions. [2021-10-28 23:15:08,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states and 46 transitions. [2021-10-28 23:15:08,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 43. [2021-10-28 23:15:08,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 43 states have (on average 1.0465116279069768) internal successors, (45), 42 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:08,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 45 transitions. [2021-10-28 23:15:08,484 INFO L704 BuchiCegarLoop]: Abstraction has 43 states and 45 transitions. [2021-10-28 23:15:08,485 INFO L587 BuchiCegarLoop]: Abstraction has 43 states and 45 transitions. [2021-10-28 23:15:08,485 INFO L425 BuchiCegarLoop]: ======== Iteration 21============ [2021-10-28 23:15:08,485 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 43 states and 45 transitions. [2021-10-28 23:15:08,485 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:08,486 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:08,486 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:08,487 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [20, 19, 1] [2021-10-28 23:15:08,487 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:08,487 INFO L791 eck$LassoCheckResult]: Stem: 2959#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 2955#L10-2 assume !!(main_~i~0 < 100); 2956#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2957#L10-2 assume !!(main_~i~0 < 100); 2958#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2962#L10-2 assume !!(main_~i~0 < 100); 2997#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2996#L10-2 assume !!(main_~i~0 < 100); 2995#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2994#L10-2 assume !!(main_~i~0 < 100); 2993#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2992#L10-2 assume !!(main_~i~0 < 100); 2991#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2990#L10-2 assume !!(main_~i~0 < 100); 2989#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2988#L10-2 assume !!(main_~i~0 < 100); 2987#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2986#L10-2 assume !!(main_~i~0 < 100); 2985#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2984#L10-2 assume !!(main_~i~0 < 100); 2983#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2982#L10-2 assume !!(main_~i~0 < 100); 2981#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2980#L10-2 assume !!(main_~i~0 < 100); 2979#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2978#L10-2 assume !!(main_~i~0 < 100); 2977#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2976#L10-2 assume !!(main_~i~0 < 100); 2975#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2974#L10-2 assume !!(main_~i~0 < 100); 2973#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2972#L10-2 assume !!(main_~i~0 < 100); 2971#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2970#L10-2 assume !!(main_~i~0 < 100); 2969#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2968#L10-2 assume !!(main_~i~0 < 100); 2966#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2965#L10-2 assume !!(main_~i~0 < 100); 2964#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2963#L10-2 assume !!(main_~i~0 < 100); 2960#L10 [2021-10-28 23:15:08,487 INFO L793 eck$LassoCheckResult]: Loop: 2960#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 2961#L10-2 assume !!(main_~i~0 < 100); 2964#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2963#L10-2 assume !!(main_~i~0 < 100); 2960#L10 [2021-10-28 23:15:08,488 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:08,488 INFO L85 PathProgramCache]: Analyzing trace with hash 134002513, now seen corresponding path program 19 times [2021-10-28 23:15:08,488 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:08,488 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1208571979] [2021-10-28 23:15:08,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:08,489 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:08,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:08,505 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:08,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:08,513 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:08,516 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:08,516 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 17 times [2021-10-28 23:15:08,516 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:08,517 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1599348513] [2021-10-28 23:15:08,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:08,517 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:08,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:08,524 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:08,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:08,527 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:08,529 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:08,529 INFO L85 PathProgramCache]: Analyzing trace with hash -1052401783, now seen corresponding path program 19 times [2021-10-28 23:15:08,529 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:08,529 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [824854879] [2021-10-28 23:15:08,529 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:08,530 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:08,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:08,806 INFO L134 CoverageAnalysis]: Checked inductivity of 441 backedges. 60 proven. 380 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:08,807 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:08,807 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [824854879] [2021-10-28 23:15:08,807 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [824854879] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:08,807 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1769969959] [2021-10-28 23:15:08,807 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-10-28 23:15:08,807 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:08,807 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:08,810 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:08,812 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Waiting until timeout for monitored process [2021-10-28 23:15:09,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:09,044 INFO L263 TraceCheckSpWp]: Trace formula consists of 89 conjuncts, 21 conjunts are in the unsatisfiable core [2021-10-28 23:15:09,045 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:09,241 INFO L134 CoverageAnalysis]: Checked inductivity of 441 backedges. 60 proven. 380 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:09,242 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1769969959] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:09,242 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:09,242 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21] total 21 [2021-10-28 23:15:09,242 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1513828777] [2021-10-28 23:15:09,270 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:09,271 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2021-10-28 23:15:09,272 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=231, Invalid=231, Unknown=0, NotChecked=0, Total=462 [2021-10-28 23:15:09,273 INFO L87 Difference]: Start difference. First operand 43 states and 45 transitions. cyclomatic complexity: 3 Second operand has 22 states, 22 states have (on average 1.9545454545454546) internal successors, (43), 21 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:09,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:09,342 INFO L93 Difference]: Finished difference Result 47 states and 49 transitions. [2021-10-28 23:15:09,343 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2021-10-28 23:15:09,343 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 47 states and 49 transitions. [2021-10-28 23:15:09,345 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:09,345 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 47 states to 46 states and 48 transitions. [2021-10-28 23:15:09,346 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:09,346 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:09,346 INFO L73 IsDeterministic]: Start isDeterministic. Operand 46 states and 48 transitions. [2021-10-28 23:15:09,346 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:09,347 INFO L681 BuchiCegarLoop]: Abstraction has 46 states and 48 transitions. [2021-10-28 23:15:09,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states and 48 transitions. [2021-10-28 23:15:09,348 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 45. [2021-10-28 23:15:09,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 44 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:09,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 47 transitions. [2021-10-28 23:15:09,348 INFO L704 BuchiCegarLoop]: Abstraction has 45 states and 47 transitions. [2021-10-28 23:15:09,348 INFO L587 BuchiCegarLoop]: Abstraction has 45 states and 47 transitions. [2021-10-28 23:15:09,348 INFO L425 BuchiCegarLoop]: ======== Iteration 22============ [2021-10-28 23:15:09,349 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 45 states and 47 transitions. [2021-10-28 23:15:09,349 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:09,349 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:09,349 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:09,350 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [21, 20, 1] [2021-10-28 23:15:09,350 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:09,350 INFO L791 eck$LassoCheckResult]: Stem: 3205#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 3201#L10-2 assume !!(main_~i~0 < 100); 3202#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3203#L10-2 assume !!(main_~i~0 < 100); 3204#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3208#L10-2 assume !!(main_~i~0 < 100); 3245#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3244#L10-2 assume !!(main_~i~0 < 100); 3243#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3242#L10-2 assume !!(main_~i~0 < 100); 3241#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3240#L10-2 assume !!(main_~i~0 < 100); 3239#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3238#L10-2 assume !!(main_~i~0 < 100); 3237#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3236#L10-2 assume !!(main_~i~0 < 100); 3235#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3234#L10-2 assume !!(main_~i~0 < 100); 3233#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3232#L10-2 assume !!(main_~i~0 < 100); 3231#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3230#L10-2 assume !!(main_~i~0 < 100); 3229#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3228#L10-2 assume !!(main_~i~0 < 100); 3227#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3226#L10-2 assume !!(main_~i~0 < 100); 3225#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3224#L10-2 assume !!(main_~i~0 < 100); 3223#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3222#L10-2 assume !!(main_~i~0 < 100); 3221#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3220#L10-2 assume !!(main_~i~0 < 100); 3219#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3218#L10-2 assume !!(main_~i~0 < 100); 3217#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3216#L10-2 assume !!(main_~i~0 < 100); 3215#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3214#L10-2 assume !!(main_~i~0 < 100); 3212#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3211#L10-2 assume !!(main_~i~0 < 100); 3210#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3209#L10-2 assume !!(main_~i~0 < 100); 3206#L10 [2021-10-28 23:15:09,350 INFO L793 eck$LassoCheckResult]: Loop: 3206#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 3207#L10-2 assume !!(main_~i~0 < 100); 3210#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3209#L10-2 assume !!(main_~i~0 < 100); 3206#L10 [2021-10-28 23:15:09,350 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:09,351 INFO L85 PathProgramCache]: Analyzing trace with hash -72603474, now seen corresponding path program 20 times [2021-10-28 23:15:09,351 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:09,351 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [448734575] [2021-10-28 23:15:09,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:09,351 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:09,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:09,360 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:09,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:09,369 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:09,369 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:09,370 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 18 times [2021-10-28 23:15:09,370 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:09,370 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [3152251] [2021-10-28 23:15:09,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:09,370 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:09,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:09,375 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:09,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:09,377 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:09,377 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:09,377 INFO L85 PathProgramCache]: Analyzing trace with hash -2097997210, now seen corresponding path program 20 times [2021-10-28 23:15:09,378 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:09,378 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1714181801] [2021-10-28 23:15:09,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:09,378 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:09,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:09,742 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 63 proven. 420 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:09,742 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:09,742 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1714181801] [2021-10-28 23:15:09,743 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1714181801] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:09,743 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1851922524] [2021-10-28 23:15:09,743 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-10-28 23:15:09,743 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:09,743 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:09,758 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:09,762 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Waiting until timeout for monitored process [2021-10-28 23:15:10,030 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-10-28 23:15:10,030 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:10,031 INFO L263 TraceCheckSpWp]: Trace formula consists of 93 conjuncts, 22 conjunts are in the unsatisfiable core [2021-10-28 23:15:10,033 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:10,213 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 63 proven. 420 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:10,214 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1851922524] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:10,214 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:10,214 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 22 [2021-10-28 23:15:10,214 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [832185887] [2021-10-28 23:15:10,251 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:10,252 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2021-10-28 23:15:10,252 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=253, Unknown=0, NotChecked=0, Total=506 [2021-10-28 23:15:10,252 INFO L87 Difference]: Start difference. First operand 45 states and 47 transitions. cyclomatic complexity: 3 Second operand has 23 states, 23 states have (on average 1.9565217391304348) internal successors, (45), 22 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:10,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:10,331 INFO L93 Difference]: Finished difference Result 49 states and 51 transitions. [2021-10-28 23:15:10,332 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2021-10-28 23:15:10,333 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 49 states and 51 transitions. [2021-10-28 23:15:10,334 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:10,335 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 49 states to 48 states and 50 transitions. [2021-10-28 23:15:10,335 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:10,335 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:10,335 INFO L73 IsDeterministic]: Start isDeterministic. Operand 48 states and 50 transitions. [2021-10-28 23:15:10,335 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:10,335 INFO L681 BuchiCegarLoop]: Abstraction has 48 states and 50 transitions. [2021-10-28 23:15:10,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states and 50 transitions. [2021-10-28 23:15:10,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 47. [2021-10-28 23:15:10,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 47 states have (on average 1.0425531914893618) internal successors, (49), 46 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:10,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 49 transitions. [2021-10-28 23:15:10,338 INFO L704 BuchiCegarLoop]: Abstraction has 47 states and 49 transitions. [2021-10-28 23:15:10,338 INFO L587 BuchiCegarLoop]: Abstraction has 47 states and 49 transitions. [2021-10-28 23:15:10,338 INFO L425 BuchiCegarLoop]: ======== Iteration 23============ [2021-10-28 23:15:10,339 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 47 states and 49 transitions. [2021-10-28 23:15:10,340 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:10,340 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:10,340 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:10,344 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [22, 21, 1] [2021-10-28 23:15:10,344 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:10,344 INFO L791 eck$LassoCheckResult]: Stem: 3462#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 3458#L10-2 assume !!(main_~i~0 < 100); 3459#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3460#L10-2 assume !!(main_~i~0 < 100); 3461#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3465#L10-2 assume !!(main_~i~0 < 100); 3504#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3503#L10-2 assume !!(main_~i~0 < 100); 3502#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3501#L10-2 assume !!(main_~i~0 < 100); 3500#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3499#L10-2 assume !!(main_~i~0 < 100); 3498#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3497#L10-2 assume !!(main_~i~0 < 100); 3496#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3495#L10-2 assume !!(main_~i~0 < 100); 3494#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3493#L10-2 assume !!(main_~i~0 < 100); 3492#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3491#L10-2 assume !!(main_~i~0 < 100); 3490#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3489#L10-2 assume !!(main_~i~0 < 100); 3488#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3487#L10-2 assume !!(main_~i~0 < 100); 3486#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3485#L10-2 assume !!(main_~i~0 < 100); 3484#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3483#L10-2 assume !!(main_~i~0 < 100); 3482#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3481#L10-2 assume !!(main_~i~0 < 100); 3480#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3479#L10-2 assume !!(main_~i~0 < 100); 3478#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3477#L10-2 assume !!(main_~i~0 < 100); 3476#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3475#L10-2 assume !!(main_~i~0 < 100); 3474#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3473#L10-2 assume !!(main_~i~0 < 100); 3472#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3471#L10-2 assume !!(main_~i~0 < 100); 3469#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3468#L10-2 assume !!(main_~i~0 < 100); 3467#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3466#L10-2 assume !!(main_~i~0 < 100); 3463#L10 [2021-10-28 23:15:10,345 INFO L793 eck$LassoCheckResult]: Loop: 3463#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 3464#L10-2 assume !!(main_~i~0 < 100); 3467#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3466#L10-2 assume !!(main_~i~0 < 100); 3463#L10 [2021-10-28 23:15:10,345 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:10,345 INFO L85 PathProgramCache]: Analyzing trace with hash -1052461365, now seen corresponding path program 21 times [2021-10-28 23:15:10,345 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:10,346 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1878322095] [2021-10-28 23:15:10,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:10,346 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:10,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:10,360 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:10,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:10,373 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:10,374 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:10,374 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 19 times [2021-10-28 23:15:10,374 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:10,374 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1627006033] [2021-10-28 23:15:10,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:10,375 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:10,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:10,381 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:10,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:10,383 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:10,384 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:10,384 INFO L85 PathProgramCache]: Analyzing trace with hash -1892855293, now seen corresponding path program 21 times [2021-10-28 23:15:10,384 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:10,384 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [857026882] [2021-10-28 23:15:10,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:10,384 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:10,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:10,778 INFO L134 CoverageAnalysis]: Checked inductivity of 529 backedges. 66 proven. 462 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:10,778 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:10,778 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [857026882] [2021-10-28 23:15:10,778 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [857026882] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:10,778 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [306201252] [2021-10-28 23:15:10,778 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-10-28 23:15:10,778 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:10,779 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:10,781 INFO L229 MonitoredProcess]: Starting monitored process 43 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:10,782 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Waiting until timeout for monitored process [2021-10-28 23:15:11,045 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 24 check-sat command(s) [2021-10-28 23:15:11,045 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:11,046 INFO L263 TraceCheckSpWp]: Trace formula consists of 97 conjuncts, 23 conjunts are in the unsatisfiable core [2021-10-28 23:15:11,048 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:11,236 INFO L134 CoverageAnalysis]: Checked inductivity of 529 backedges. 66 proven. 462 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:11,237 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [306201252] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:11,237 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:11,237 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 23 [2021-10-28 23:15:11,237 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1512763818] [2021-10-28 23:15:11,266 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:11,268 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2021-10-28 23:15:11,268 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2021-10-28 23:15:11,268 INFO L87 Difference]: Start difference. First operand 47 states and 49 transitions. cyclomatic complexity: 3 Second operand has 24 states, 24 states have (on average 1.9583333333333333) internal successors, (47), 23 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:11,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:11,339 INFO L93 Difference]: Finished difference Result 51 states and 53 transitions. [2021-10-28 23:15:11,340 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2021-10-28 23:15:11,340 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 53 transitions. [2021-10-28 23:15:11,341 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:11,342 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 50 states and 52 transitions. [2021-10-28 23:15:11,342 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:11,342 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:11,342 INFO L73 IsDeterministic]: Start isDeterministic. Operand 50 states and 52 transitions. [2021-10-28 23:15:11,342 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:11,342 INFO L681 BuchiCegarLoop]: Abstraction has 50 states and 52 transitions. [2021-10-28 23:15:11,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states and 52 transitions. [2021-10-28 23:15:11,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 49. [2021-10-28 23:15:11,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 49 states have (on average 1.0408163265306123) internal successors, (51), 48 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:11,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 51 transitions. [2021-10-28 23:15:11,348 INFO L704 BuchiCegarLoop]: Abstraction has 49 states and 51 transitions. [2021-10-28 23:15:11,348 INFO L587 BuchiCegarLoop]: Abstraction has 49 states and 51 transitions. [2021-10-28 23:15:11,348 INFO L425 BuchiCegarLoop]: ======== Iteration 24============ [2021-10-28 23:15:11,348 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 49 states and 51 transitions. [2021-10-28 23:15:11,349 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:11,349 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:11,349 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:11,357 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [23, 22, 1] [2021-10-28 23:15:11,357 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:11,358 INFO L791 eck$LassoCheckResult]: Stem: 3730#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 3726#L10-2 assume !!(main_~i~0 < 100); 3727#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3728#L10-2 assume !!(main_~i~0 < 100); 3729#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3733#L10-2 assume !!(main_~i~0 < 100); 3774#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3773#L10-2 assume !!(main_~i~0 < 100); 3772#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3771#L10-2 assume !!(main_~i~0 < 100); 3770#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3769#L10-2 assume !!(main_~i~0 < 100); 3768#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3767#L10-2 assume !!(main_~i~0 < 100); 3766#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3765#L10-2 assume !!(main_~i~0 < 100); 3764#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3763#L10-2 assume !!(main_~i~0 < 100); 3762#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3761#L10-2 assume !!(main_~i~0 < 100); 3760#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3759#L10-2 assume !!(main_~i~0 < 100); 3758#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3757#L10-2 assume !!(main_~i~0 < 100); 3756#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3755#L10-2 assume !!(main_~i~0 < 100); 3754#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3753#L10-2 assume !!(main_~i~0 < 100); 3752#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3751#L10-2 assume !!(main_~i~0 < 100); 3750#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3749#L10-2 assume !!(main_~i~0 < 100); 3748#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3747#L10-2 assume !!(main_~i~0 < 100); 3746#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3745#L10-2 assume !!(main_~i~0 < 100); 3744#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3743#L10-2 assume !!(main_~i~0 < 100); 3742#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3741#L10-2 assume !!(main_~i~0 < 100); 3740#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3739#L10-2 assume !!(main_~i~0 < 100); 3737#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3736#L10-2 assume !!(main_~i~0 < 100); 3735#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3734#L10-2 assume !!(main_~i~0 < 100); 3731#L10 [2021-10-28 23:15:11,358 INFO L793 eck$LassoCheckResult]: Loop: 3731#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 3732#L10-2 assume !!(main_~i~0 < 100); 3735#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3734#L10-2 assume !!(main_~i~0 < 100); 3731#L10 [2021-10-28 23:15:11,358 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:11,358 INFO L85 PathProgramCache]: Analyzing trace with hash -2098056792, now seen corresponding path program 22 times [2021-10-28 23:15:11,359 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:11,359 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1165127121] [2021-10-28 23:15:11,359 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:11,359 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:11,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:11,369 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:11,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:11,378 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:11,378 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:11,378 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 20 times [2021-10-28 23:15:11,379 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:11,379 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1784893822] [2021-10-28 23:15:11,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:11,379 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:11,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:11,383 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:11,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:11,385 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:11,386 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:11,386 INFO L85 PathProgramCache]: Analyzing trace with hash 1974998624, now seen corresponding path program 22 times [2021-10-28 23:15:11,386 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:11,386 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1561882741] [2021-10-28 23:15:11,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:11,386 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:11,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:11,843 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 69 proven. 506 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:11,843 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:11,844 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1561882741] [2021-10-28 23:15:11,844 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1561882741] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:11,844 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1873468623] [2021-10-28 23:15:11,850 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-10-28 23:15:11,850 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:11,850 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:11,853 INFO L229 MonitoredProcess]: Starting monitored process 44 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:11,883 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (44)] Waiting until timeout for monitored process [2021-10-28 23:15:12,171 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-10-28 23:15:12,171 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:12,172 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 24 conjunts are in the unsatisfiable core [2021-10-28 23:15:12,174 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:12,397 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 69 proven. 506 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:12,397 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1873468623] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:12,397 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:12,397 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 24 [2021-10-28 23:15:12,397 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [16671155] [2021-10-28 23:15:12,428 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:12,429 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2021-10-28 23:15:12,429 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2021-10-28 23:15:12,429 INFO L87 Difference]: Start difference. First operand 49 states and 51 transitions. cyclomatic complexity: 3 Second operand has 25 states, 25 states have (on average 1.96) internal successors, (49), 24 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:12,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:12,505 INFO L93 Difference]: Finished difference Result 53 states and 55 transitions. [2021-10-28 23:15:12,505 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2021-10-28 23:15:12,506 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 53 states and 55 transitions. [2021-10-28 23:15:12,509 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:12,510 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 53 states to 52 states and 54 transitions. [2021-10-28 23:15:12,510 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:12,510 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:12,510 INFO L73 IsDeterministic]: Start isDeterministic. Operand 52 states and 54 transitions. [2021-10-28 23:15:12,510 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:12,510 INFO L681 BuchiCegarLoop]: Abstraction has 52 states and 54 transitions. [2021-10-28 23:15:12,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states and 54 transitions. [2021-10-28 23:15:12,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 51. [2021-10-28 23:15:12,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 51 states have (on average 1.0392156862745099) internal successors, (53), 50 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:12,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 53 transitions. [2021-10-28 23:15:12,512 INFO L704 BuchiCegarLoop]: Abstraction has 51 states and 53 transitions. [2021-10-28 23:15:12,512 INFO L587 BuchiCegarLoop]: Abstraction has 51 states and 53 transitions. [2021-10-28 23:15:12,512 INFO L425 BuchiCegarLoop]: ======== Iteration 25============ [2021-10-28 23:15:12,512 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 51 states and 53 transitions. [2021-10-28 23:15:12,512 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:12,512 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:12,512 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:12,513 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [24, 23, 1] [2021-10-28 23:15:12,513 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:12,513 INFO L791 eck$LassoCheckResult]: Stem: 4009#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 4005#L10-2 assume !!(main_~i~0 < 100); 4006#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4007#L10-2 assume !!(main_~i~0 < 100); 4008#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4012#L10-2 assume !!(main_~i~0 < 100); 4055#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4054#L10-2 assume !!(main_~i~0 < 100); 4053#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4052#L10-2 assume !!(main_~i~0 < 100); 4051#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4050#L10-2 assume !!(main_~i~0 < 100); 4049#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4048#L10-2 assume !!(main_~i~0 < 100); 4047#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4046#L10-2 assume !!(main_~i~0 < 100); 4045#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4044#L10-2 assume !!(main_~i~0 < 100); 4043#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4042#L10-2 assume !!(main_~i~0 < 100); 4041#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4040#L10-2 assume !!(main_~i~0 < 100); 4039#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4038#L10-2 assume !!(main_~i~0 < 100); 4037#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4036#L10-2 assume !!(main_~i~0 < 100); 4035#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4034#L10-2 assume !!(main_~i~0 < 100); 4033#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4032#L10-2 assume !!(main_~i~0 < 100); 4031#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4030#L10-2 assume !!(main_~i~0 < 100); 4029#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4028#L10-2 assume !!(main_~i~0 < 100); 4027#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4026#L10-2 assume !!(main_~i~0 < 100); 4025#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4024#L10-2 assume !!(main_~i~0 < 100); 4023#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4022#L10-2 assume !!(main_~i~0 < 100); 4021#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4020#L10-2 assume !!(main_~i~0 < 100); 4019#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4018#L10-2 assume !!(main_~i~0 < 100); 4016#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4015#L10-2 assume !!(main_~i~0 < 100); 4014#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4013#L10-2 assume !!(main_~i~0 < 100); 4010#L10 [2021-10-28 23:15:12,513 INFO L793 eck$LassoCheckResult]: Loop: 4010#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 4011#L10-2 assume !!(main_~i~0 < 100); 4014#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4013#L10-2 assume !!(main_~i~0 < 100); 4010#L10 [2021-10-28 23:15:12,513 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:12,513 INFO L85 PathProgramCache]: Analyzing trace with hash -1892914875, now seen corresponding path program 23 times [2021-10-28 23:15:12,514 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:12,514 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1098065922] [2021-10-28 23:15:12,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:12,514 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:12,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:12,523 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:12,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:12,532 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:12,533 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:12,533 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 21 times [2021-10-28 23:15:12,533 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:12,533 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [684225604] [2021-10-28 23:15:12,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:12,534 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:12,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:12,558 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:12,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:12,560 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:12,561 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:12,561 INFO L85 PathProgramCache]: Analyzing trace with hash -459065475, now seen corresponding path program 23 times [2021-10-28 23:15:12,561 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:12,562 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [690185593] [2021-10-28 23:15:12,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:12,562 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:12,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:12,956 INFO L134 CoverageAnalysis]: Checked inductivity of 625 backedges. 72 proven. 552 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:12,956 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:12,956 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [690185593] [2021-10-28 23:15:12,957 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [690185593] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:12,957 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [746376617] [2021-10-28 23:15:12,957 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-10-28 23:15:12,957 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:12,957 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:12,959 INFO L229 MonitoredProcess]: Starting monitored process 45 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:12,961 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (45)] Waiting until timeout for monitored process [2021-10-28 23:15:13,256 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 26 check-sat command(s) [2021-10-28 23:15:13,257 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:13,258 INFO L263 TraceCheckSpWp]: Trace formula consists of 105 conjuncts, 25 conjunts are in the unsatisfiable core [2021-10-28 23:15:13,259 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:13,462 INFO L134 CoverageAnalysis]: Checked inductivity of 625 backedges. 72 proven. 552 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:13,462 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [746376617] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:13,462 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:13,463 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 25 [2021-10-28 23:15:13,463 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [357626375] [2021-10-28 23:15:13,495 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:13,495 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2021-10-28 23:15:13,496 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2021-10-28 23:15:13,496 INFO L87 Difference]: Start difference. First operand 51 states and 53 transitions. cyclomatic complexity: 3 Second operand has 26 states, 26 states have (on average 1.9615384615384615) internal successors, (51), 25 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:13,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:13,583 INFO L93 Difference]: Finished difference Result 55 states and 57 transitions. [2021-10-28 23:15:13,583 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2021-10-28 23:15:13,584 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 55 states and 57 transitions. [2021-10-28 23:15:13,584 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:13,585 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 55 states to 54 states and 56 transitions. [2021-10-28 23:15:13,585 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:13,585 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:13,585 INFO L73 IsDeterministic]: Start isDeterministic. Operand 54 states and 56 transitions. [2021-10-28 23:15:13,586 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:13,586 INFO L681 BuchiCegarLoop]: Abstraction has 54 states and 56 transitions. [2021-10-28 23:15:13,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states and 56 transitions. [2021-10-28 23:15:13,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 53. [2021-10-28 23:15:13,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 53 states have (on average 1.0377358490566038) internal successors, (55), 52 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:13,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 55 transitions. [2021-10-28 23:15:13,588 INFO L704 BuchiCegarLoop]: Abstraction has 53 states and 55 transitions. [2021-10-28 23:15:13,588 INFO L587 BuchiCegarLoop]: Abstraction has 53 states and 55 transitions. [2021-10-28 23:15:13,588 INFO L425 BuchiCegarLoop]: ======== Iteration 26============ [2021-10-28 23:15:13,588 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 53 states and 55 transitions. [2021-10-28 23:15:13,589 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:13,589 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:13,589 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:13,590 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [25, 24, 1] [2021-10-28 23:15:13,590 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:13,590 INFO L791 eck$LassoCheckResult]: Stem: 4299#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 4295#L10-2 assume !!(main_~i~0 < 100); 4296#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4297#L10-2 assume !!(main_~i~0 < 100); 4298#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4302#L10-2 assume !!(main_~i~0 < 100); 4347#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4346#L10-2 assume !!(main_~i~0 < 100); 4345#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4344#L10-2 assume !!(main_~i~0 < 100); 4343#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4342#L10-2 assume !!(main_~i~0 < 100); 4341#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4340#L10-2 assume !!(main_~i~0 < 100); 4339#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4338#L10-2 assume !!(main_~i~0 < 100); 4337#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4336#L10-2 assume !!(main_~i~0 < 100); 4335#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4334#L10-2 assume !!(main_~i~0 < 100); 4333#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4332#L10-2 assume !!(main_~i~0 < 100); 4331#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4330#L10-2 assume !!(main_~i~0 < 100); 4329#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4328#L10-2 assume !!(main_~i~0 < 100); 4327#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4326#L10-2 assume !!(main_~i~0 < 100); 4325#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4324#L10-2 assume !!(main_~i~0 < 100); 4323#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4322#L10-2 assume !!(main_~i~0 < 100); 4321#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4320#L10-2 assume !!(main_~i~0 < 100); 4319#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4318#L10-2 assume !!(main_~i~0 < 100); 4317#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4316#L10-2 assume !!(main_~i~0 < 100); 4315#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4314#L10-2 assume !!(main_~i~0 < 100); 4313#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4312#L10-2 assume !!(main_~i~0 < 100); 4311#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4310#L10-2 assume !!(main_~i~0 < 100); 4309#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4308#L10-2 assume !!(main_~i~0 < 100); 4306#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4305#L10-2 assume !!(main_~i~0 < 100); 4304#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4303#L10-2 assume !!(main_~i~0 < 100); 4300#L10 [2021-10-28 23:15:13,590 INFO L793 eck$LassoCheckResult]: Loop: 4300#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 4301#L10-2 assume !!(main_~i~0 < 100); 4304#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4303#L10-2 assume !!(main_~i~0 < 100); 4300#L10 [2021-10-28 23:15:13,591 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:13,591 INFO L85 PathProgramCache]: Analyzing trace with hash 1974939042, now seen corresponding path program 24 times [2021-10-28 23:15:13,591 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:13,591 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [163404085] [2021-10-28 23:15:13,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:13,591 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:13,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:13,602 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:13,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:13,611 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:13,612 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:13,612 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 22 times [2021-10-28 23:15:13,612 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:13,612 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1860399173] [2021-10-28 23:15:13,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:13,612 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:13,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:13,635 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:13,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:13,637 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:13,637 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:13,638 INFO L85 PathProgramCache]: Analyzing trace with hash 1162511706, now seen corresponding path program 24 times [2021-10-28 23:15:13,638 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:13,638 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1986079850] [2021-10-28 23:15:13,638 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:13,639 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:13,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:14,150 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 75 proven. 600 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:14,151 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:14,151 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1986079850] [2021-10-28 23:15:14,151 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1986079850] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:14,151 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1782894848] [2021-10-28 23:15:14,151 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-10-28 23:15:14,151 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:14,152 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:14,165 INFO L229 MonitoredProcess]: Starting monitored process 46 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:14,229 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (46)] Waiting until timeout for monitored process [2021-10-28 23:15:14,576 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 27 check-sat command(s) [2021-10-28 23:15:14,576 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:14,579 INFO L263 TraceCheckSpWp]: Trace formula consists of 109 conjuncts, 26 conjunts are in the unsatisfiable core [2021-10-28 23:15:14,580 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:14,758 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 75 proven. 600 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:14,758 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1782894848] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:14,758 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:14,759 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26] total 26 [2021-10-28 23:15:14,759 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1924960938] [2021-10-28 23:15:14,787 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:14,788 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2021-10-28 23:15:14,789 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=351, Invalid=351, Unknown=0, NotChecked=0, Total=702 [2021-10-28 23:15:14,789 INFO L87 Difference]: Start difference. First operand 53 states and 55 transitions. cyclomatic complexity: 3 Second operand has 27 states, 27 states have (on average 1.962962962962963) internal successors, (53), 26 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:14,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:14,903 INFO L93 Difference]: Finished difference Result 57 states and 59 transitions. [2021-10-28 23:15:14,904 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2021-10-28 23:15:14,904 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 57 states and 59 transitions. [2021-10-28 23:15:14,905 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:14,905 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 57 states to 56 states and 58 transitions. [2021-10-28 23:15:14,905 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:14,906 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:14,906 INFO L73 IsDeterministic]: Start isDeterministic. Operand 56 states and 58 transitions. [2021-10-28 23:15:14,906 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:14,906 INFO L681 BuchiCegarLoop]: Abstraction has 56 states and 58 transitions. [2021-10-28 23:15:14,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states and 58 transitions. [2021-10-28 23:15:14,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 55. [2021-10-28 23:15:14,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 55 states have (on average 1.0363636363636364) internal successors, (57), 54 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:14,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 57 transitions. [2021-10-28 23:15:14,907 INFO L704 BuchiCegarLoop]: Abstraction has 55 states and 57 transitions. [2021-10-28 23:15:14,907 INFO L587 BuchiCegarLoop]: Abstraction has 55 states and 57 transitions. [2021-10-28 23:15:14,907 INFO L425 BuchiCegarLoop]: ======== Iteration 27============ [2021-10-28 23:15:14,908 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 55 states and 57 transitions. [2021-10-28 23:15:14,908 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:14,908 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:14,908 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:14,909 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [26, 25, 1] [2021-10-28 23:15:14,909 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:14,909 INFO L791 eck$LassoCheckResult]: Stem: 4600#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 4596#L10-2 assume !!(main_~i~0 < 100); 4597#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4598#L10-2 assume !!(main_~i~0 < 100); 4599#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4603#L10-2 assume !!(main_~i~0 < 100); 4650#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4649#L10-2 assume !!(main_~i~0 < 100); 4648#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4647#L10-2 assume !!(main_~i~0 < 100); 4646#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4645#L10-2 assume !!(main_~i~0 < 100); 4644#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4643#L10-2 assume !!(main_~i~0 < 100); 4642#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4641#L10-2 assume !!(main_~i~0 < 100); 4640#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4639#L10-2 assume !!(main_~i~0 < 100); 4638#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4637#L10-2 assume !!(main_~i~0 < 100); 4636#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4635#L10-2 assume !!(main_~i~0 < 100); 4634#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4633#L10-2 assume !!(main_~i~0 < 100); 4632#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4631#L10-2 assume !!(main_~i~0 < 100); 4630#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4629#L10-2 assume !!(main_~i~0 < 100); 4628#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4627#L10-2 assume !!(main_~i~0 < 100); 4626#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4625#L10-2 assume !!(main_~i~0 < 100); 4624#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4623#L10-2 assume !!(main_~i~0 < 100); 4622#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4621#L10-2 assume !!(main_~i~0 < 100); 4620#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4619#L10-2 assume !!(main_~i~0 < 100); 4618#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4617#L10-2 assume !!(main_~i~0 < 100); 4616#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4615#L10-2 assume !!(main_~i~0 < 100); 4614#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4613#L10-2 assume !!(main_~i~0 < 100); 4612#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4611#L10-2 assume !!(main_~i~0 < 100); 4610#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4609#L10-2 assume !!(main_~i~0 < 100); 4607#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4606#L10-2 assume !!(main_~i~0 < 100); 4605#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4604#L10-2 assume !!(main_~i~0 < 100); 4601#L10 [2021-10-28 23:15:14,909 INFO L793 eck$LassoCheckResult]: Loop: 4601#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 4602#L10-2 assume !!(main_~i~0 < 100); 4605#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4604#L10-2 assume !!(main_~i~0 < 100); 4601#L10 [2021-10-28 23:15:14,909 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:14,910 INFO L85 PathProgramCache]: Analyzing trace with hash -459125057, now seen corresponding path program 25 times [2021-10-28 23:15:14,910 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:14,910 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1636684080] [2021-10-28 23:15:14,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:14,911 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:14,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:14,922 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:14,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:14,932 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:14,932 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:14,933 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 23 times [2021-10-28 23:15:14,933 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:14,933 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1371064628] [2021-10-28 23:15:14,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:14,933 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:14,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:14,938 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:14,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:14,941 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:14,941 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:14,941 INFO L85 PathProgramCache]: Analyzing trace with hash 425054199, now seen corresponding path program 25 times [2021-10-28 23:15:14,942 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:14,942 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [148089844] [2021-10-28 23:15:14,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:14,942 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:14,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:15,344 INFO L134 CoverageAnalysis]: Checked inductivity of 729 backedges. 78 proven. 650 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:15,344 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:15,345 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [148089844] [2021-10-28 23:15:15,345 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [148089844] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:15,345 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2084654591] [2021-10-28 23:15:15,345 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-10-28 23:15:15,345 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:15,346 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:15,348 INFO L229 MonitoredProcess]: Starting monitored process 47 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:15,349 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (47)] Waiting until timeout for monitored process [2021-10-28 23:15:15,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:15,680 INFO L263 TraceCheckSpWp]: Trace formula consists of 113 conjuncts, 27 conjunts are in the unsatisfiable core [2021-10-28 23:15:15,681 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:15,943 INFO L134 CoverageAnalysis]: Checked inductivity of 729 backedges. 78 proven. 650 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:15,944 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2084654591] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:15,944 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:15,944 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27] total 27 [2021-10-28 23:15:15,944 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1653091413] [2021-10-28 23:15:15,978 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:15,979 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2021-10-28 23:15:15,979 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=378, Invalid=378, Unknown=0, NotChecked=0, Total=756 [2021-10-28 23:15:15,980 INFO L87 Difference]: Start difference. First operand 55 states and 57 transitions. cyclomatic complexity: 3 Second operand has 28 states, 28 states have (on average 1.9642857142857142) internal successors, (55), 27 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:16,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:16,065 INFO L93 Difference]: Finished difference Result 59 states and 61 transitions. [2021-10-28 23:15:16,065 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2021-10-28 23:15:16,065 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 59 states and 61 transitions. [2021-10-28 23:15:16,066 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:16,067 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 59 states to 58 states and 60 transitions. [2021-10-28 23:15:16,067 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:16,067 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:16,067 INFO L73 IsDeterministic]: Start isDeterministic. Operand 58 states and 60 transitions. [2021-10-28 23:15:16,067 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:16,067 INFO L681 BuchiCegarLoop]: Abstraction has 58 states and 60 transitions. [2021-10-28 23:15:16,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states and 60 transitions. [2021-10-28 23:15:16,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 57. [2021-10-28 23:15:16,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 57 states, 57 states have (on average 1.0350877192982457) internal successors, (59), 56 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:16,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 59 transitions. [2021-10-28 23:15:16,070 INFO L704 BuchiCegarLoop]: Abstraction has 57 states and 59 transitions. [2021-10-28 23:15:16,070 INFO L587 BuchiCegarLoop]: Abstraction has 57 states and 59 transitions. [2021-10-28 23:15:16,070 INFO L425 BuchiCegarLoop]: ======== Iteration 28============ [2021-10-28 23:15:16,070 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 57 states and 59 transitions. [2021-10-28 23:15:16,071 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:16,071 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:16,071 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:16,071 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [27, 26, 1] [2021-10-28 23:15:16,071 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:16,072 INFO L791 eck$LassoCheckResult]: Stem: 4912#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 4908#L10-2 assume !!(main_~i~0 < 100); 4909#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4910#L10-2 assume !!(main_~i~0 < 100); 4911#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4915#L10-2 assume !!(main_~i~0 < 100); 4964#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4963#L10-2 assume !!(main_~i~0 < 100); 4962#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4961#L10-2 assume !!(main_~i~0 < 100); 4960#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4959#L10-2 assume !!(main_~i~0 < 100); 4958#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4957#L10-2 assume !!(main_~i~0 < 100); 4956#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4955#L10-2 assume !!(main_~i~0 < 100); 4954#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4953#L10-2 assume !!(main_~i~0 < 100); 4952#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4951#L10-2 assume !!(main_~i~0 < 100); 4950#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4949#L10-2 assume !!(main_~i~0 < 100); 4948#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4947#L10-2 assume !!(main_~i~0 < 100); 4946#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4945#L10-2 assume !!(main_~i~0 < 100); 4944#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4943#L10-2 assume !!(main_~i~0 < 100); 4942#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4941#L10-2 assume !!(main_~i~0 < 100); 4940#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4939#L10-2 assume !!(main_~i~0 < 100); 4938#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4937#L10-2 assume !!(main_~i~0 < 100); 4936#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4935#L10-2 assume !!(main_~i~0 < 100); 4934#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4933#L10-2 assume !!(main_~i~0 < 100); 4932#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4931#L10-2 assume !!(main_~i~0 < 100); 4930#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4929#L10-2 assume !!(main_~i~0 < 100); 4928#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4927#L10-2 assume !!(main_~i~0 < 100); 4926#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4925#L10-2 assume !!(main_~i~0 < 100); 4924#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4923#L10-2 assume !!(main_~i~0 < 100); 4922#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4921#L10-2 assume !!(main_~i~0 < 100); 4919#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4918#L10-2 assume !!(main_~i~0 < 100); 4917#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4916#L10-2 assume !!(main_~i~0 < 100); 4913#L10 [2021-10-28 23:15:16,072 INFO L793 eck$LassoCheckResult]: Loop: 4913#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 4914#L10-2 assume !!(main_~i~0 < 100); 4917#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4916#L10-2 assume !!(main_~i~0 < 100); 4913#L10 [2021-10-28 23:15:16,072 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:16,072 INFO L85 PathProgramCache]: Analyzing trace with hash 1162452124, now seen corresponding path program 26 times [2021-10-28 23:15:16,072 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:16,072 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1559587656] [2021-10-28 23:15:16,073 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:16,073 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:16,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:16,085 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:16,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:16,096 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:16,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:16,097 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 24 times [2021-10-28 23:15:16,097 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:16,097 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1014386457] [2021-10-28 23:15:16,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:16,098 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:16,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:16,103 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:16,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:16,105 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:16,105 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:16,106 INFO L85 PathProgramCache]: Analyzing trace with hash 397993812, now seen corresponding path program 26 times [2021-10-28 23:15:16,106 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:16,106 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [96076791] [2021-10-28 23:15:16,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:16,106 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:16,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:16,575 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 81 proven. 702 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:16,575 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:16,575 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [96076791] [2021-10-28 23:15:16,575 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [96076791] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:16,575 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1133633325] [2021-10-28 23:15:16,575 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-10-28 23:15:16,576 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:16,576 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:16,578 INFO L229 MonitoredProcess]: Starting monitored process 48 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:16,580 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Waiting until timeout for monitored process [2021-10-28 23:15:16,934 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-10-28 23:15:16,934 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:16,935 INFO L263 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 28 conjunts are in the unsatisfiable core [2021-10-28 23:15:16,938 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:17,219 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 81 proven. 702 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:17,219 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1133633325] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:17,220 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:17,220 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28] total 28 [2021-10-28 23:15:17,220 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [648916259] [2021-10-28 23:15:17,257 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:17,258 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2021-10-28 23:15:17,259 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=406, Invalid=406, Unknown=0, NotChecked=0, Total=812 [2021-10-28 23:15:17,259 INFO L87 Difference]: Start difference. First operand 57 states and 59 transitions. cyclomatic complexity: 3 Second operand has 29 states, 29 states have (on average 1.9655172413793103) internal successors, (57), 28 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:17,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:17,353 INFO L93 Difference]: Finished difference Result 61 states and 63 transitions. [2021-10-28 23:15:17,353 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2021-10-28 23:15:17,353 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 61 states and 63 transitions. [2021-10-28 23:15:17,354 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:17,355 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 61 states to 60 states and 62 transitions. [2021-10-28 23:15:17,355 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:17,355 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:17,356 INFO L73 IsDeterministic]: Start isDeterministic. Operand 60 states and 62 transitions. [2021-10-28 23:15:17,356 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:17,356 INFO L681 BuchiCegarLoop]: Abstraction has 60 states and 62 transitions. [2021-10-28 23:15:17,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states and 62 transitions. [2021-10-28 23:15:17,358 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 59. [2021-10-28 23:15:17,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 59 states have (on average 1.0338983050847457) internal successors, (61), 58 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:17,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 61 transitions. [2021-10-28 23:15:17,359 INFO L704 BuchiCegarLoop]: Abstraction has 59 states and 61 transitions. [2021-10-28 23:15:17,359 INFO L587 BuchiCegarLoop]: Abstraction has 59 states and 61 transitions. [2021-10-28 23:15:17,359 INFO L425 BuchiCegarLoop]: ======== Iteration 29============ [2021-10-28 23:15:17,359 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 59 states and 61 transitions. [2021-10-28 23:15:17,360 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:17,360 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:17,360 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:17,361 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [28, 27, 1] [2021-10-28 23:15:17,362 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:17,362 INFO L791 eck$LassoCheckResult]: Stem: 5235#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 5231#L10-2 assume !!(main_~i~0 < 100); 5232#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5233#L10-2 assume !!(main_~i~0 < 100); 5234#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5238#L10-2 assume !!(main_~i~0 < 100); 5289#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5288#L10-2 assume !!(main_~i~0 < 100); 5287#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5286#L10-2 assume !!(main_~i~0 < 100); 5285#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5284#L10-2 assume !!(main_~i~0 < 100); 5283#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5282#L10-2 assume !!(main_~i~0 < 100); 5281#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5280#L10-2 assume !!(main_~i~0 < 100); 5279#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5278#L10-2 assume !!(main_~i~0 < 100); 5277#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5276#L10-2 assume !!(main_~i~0 < 100); 5275#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5274#L10-2 assume !!(main_~i~0 < 100); 5273#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5272#L10-2 assume !!(main_~i~0 < 100); 5271#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5270#L10-2 assume !!(main_~i~0 < 100); 5269#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5268#L10-2 assume !!(main_~i~0 < 100); 5267#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5266#L10-2 assume !!(main_~i~0 < 100); 5265#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5264#L10-2 assume !!(main_~i~0 < 100); 5263#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5262#L10-2 assume !!(main_~i~0 < 100); 5261#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5260#L10-2 assume !!(main_~i~0 < 100); 5259#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5258#L10-2 assume !!(main_~i~0 < 100); 5257#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5256#L10-2 assume !!(main_~i~0 < 100); 5255#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5254#L10-2 assume !!(main_~i~0 < 100); 5253#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5252#L10-2 assume !!(main_~i~0 < 100); 5251#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5250#L10-2 assume !!(main_~i~0 < 100); 5249#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5248#L10-2 assume !!(main_~i~0 < 100); 5247#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5246#L10-2 assume !!(main_~i~0 < 100); 5245#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5244#L10-2 assume !!(main_~i~0 < 100); 5242#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5241#L10-2 assume !!(main_~i~0 < 100); 5240#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5239#L10-2 assume !!(main_~i~0 < 100); 5236#L10 [2021-10-28 23:15:17,362 INFO L793 eck$LassoCheckResult]: Loop: 5236#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 5237#L10-2 assume !!(main_~i~0 < 100); 5240#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5239#L10-2 assume !!(main_~i~0 < 100); 5236#L10 [2021-10-28 23:15:17,363 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:17,363 INFO L85 PathProgramCache]: Analyzing trace with hash 424994617, now seen corresponding path program 27 times [2021-10-28 23:15:17,363 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:17,363 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1381828091] [2021-10-28 23:15:17,363 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:17,364 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:17,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:17,380 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:17,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:17,406 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:17,406 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:17,407 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 25 times [2021-10-28 23:15:17,407 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:17,407 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1959523955] [2021-10-28 23:15:17,407 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:17,407 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:17,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:17,443 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:17,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:17,445 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:17,445 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:17,445 INFO L85 PathProgramCache]: Analyzing trace with hash 162765681, now seen corresponding path program 27 times [2021-10-28 23:15:17,446 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:17,446 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1965589686] [2021-10-28 23:15:17,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:17,446 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:17,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:17,952 INFO L134 CoverageAnalysis]: Checked inductivity of 841 backedges. 84 proven. 756 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:17,952 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:17,952 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1965589686] [2021-10-28 23:15:17,953 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1965589686] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:17,953 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [966597446] [2021-10-28 23:15:17,953 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-10-28 23:15:17,953 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:17,953 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:17,959 INFO L229 MonitoredProcess]: Starting monitored process 49 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:17,969 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (49)] Waiting until timeout for monitored process [2021-10-28 23:15:18,333 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 30 check-sat command(s) [2021-10-28 23:15:18,334 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:18,335 INFO L263 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 29 conjunts are in the unsatisfiable core [2021-10-28 23:15:18,336 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:18,572 INFO L134 CoverageAnalysis]: Checked inductivity of 841 backedges. 84 proven. 756 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:18,572 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [966597446] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:18,573 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:18,573 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29] total 29 [2021-10-28 23:15:18,573 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1369918092] [2021-10-28 23:15:18,605 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:18,605 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2021-10-28 23:15:18,606 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=435, Unknown=0, NotChecked=0, Total=870 [2021-10-28 23:15:18,606 INFO L87 Difference]: Start difference. First operand 59 states and 61 transitions. cyclomatic complexity: 3 Second operand has 30 states, 30 states have (on average 1.9666666666666666) internal successors, (59), 29 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:18,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:18,683 INFO L93 Difference]: Finished difference Result 63 states and 65 transitions. [2021-10-28 23:15:18,683 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2021-10-28 23:15:18,683 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 63 states and 65 transitions. [2021-10-28 23:15:18,684 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:18,685 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 63 states to 62 states and 64 transitions. [2021-10-28 23:15:18,685 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:18,685 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:18,685 INFO L73 IsDeterministic]: Start isDeterministic. Operand 62 states and 64 transitions. [2021-10-28 23:15:18,686 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:18,686 INFO L681 BuchiCegarLoop]: Abstraction has 62 states and 64 transitions. [2021-10-28 23:15:18,686 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states and 64 transitions. [2021-10-28 23:15:18,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 61. [2021-10-28 23:15:18,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 61 states, 61 states have (on average 1.0327868852459017) internal successors, (63), 60 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:18,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 63 transitions. [2021-10-28 23:15:18,688 INFO L704 BuchiCegarLoop]: Abstraction has 61 states and 63 transitions. [2021-10-28 23:15:18,689 INFO L587 BuchiCegarLoop]: Abstraction has 61 states and 63 transitions. [2021-10-28 23:15:18,689 INFO L425 BuchiCegarLoop]: ======== Iteration 30============ [2021-10-28 23:15:18,689 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 61 states and 63 transitions. [2021-10-28 23:15:18,690 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:18,690 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:18,690 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:18,691 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [29, 28, 1] [2021-10-28 23:15:18,691 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:18,691 INFO L791 eck$LassoCheckResult]: Stem: 5569#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 5565#L10-2 assume !!(main_~i~0 < 100); 5566#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5567#L10-2 assume !!(main_~i~0 < 100); 5568#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5572#L10-2 assume !!(main_~i~0 < 100); 5625#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5624#L10-2 assume !!(main_~i~0 < 100); 5623#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5622#L10-2 assume !!(main_~i~0 < 100); 5621#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5620#L10-2 assume !!(main_~i~0 < 100); 5619#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5618#L10-2 assume !!(main_~i~0 < 100); 5617#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5616#L10-2 assume !!(main_~i~0 < 100); 5615#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5614#L10-2 assume !!(main_~i~0 < 100); 5613#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5612#L10-2 assume !!(main_~i~0 < 100); 5611#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5610#L10-2 assume !!(main_~i~0 < 100); 5609#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5608#L10-2 assume !!(main_~i~0 < 100); 5607#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5606#L10-2 assume !!(main_~i~0 < 100); 5605#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5604#L10-2 assume !!(main_~i~0 < 100); 5603#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5602#L10-2 assume !!(main_~i~0 < 100); 5601#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5600#L10-2 assume !!(main_~i~0 < 100); 5599#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5598#L10-2 assume !!(main_~i~0 < 100); 5597#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5596#L10-2 assume !!(main_~i~0 < 100); 5595#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5594#L10-2 assume !!(main_~i~0 < 100); 5593#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5592#L10-2 assume !!(main_~i~0 < 100); 5591#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5590#L10-2 assume !!(main_~i~0 < 100); 5589#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5588#L10-2 assume !!(main_~i~0 < 100); 5587#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5586#L10-2 assume !!(main_~i~0 < 100); 5585#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5584#L10-2 assume !!(main_~i~0 < 100); 5583#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5582#L10-2 assume !!(main_~i~0 < 100); 5581#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5580#L10-2 assume !!(main_~i~0 < 100); 5579#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5578#L10-2 assume !!(main_~i~0 < 100); 5576#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5575#L10-2 assume !!(main_~i~0 < 100); 5574#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5573#L10-2 assume !!(main_~i~0 < 100); 5570#L10 [2021-10-28 23:15:18,691 INFO L793 eck$LassoCheckResult]: Loop: 5570#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 5571#L10-2 assume !!(main_~i~0 < 100); 5574#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5573#L10-2 assume !!(main_~i~0 < 100); 5570#L10 [2021-10-28 23:15:18,692 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:18,692 INFO L85 PathProgramCache]: Analyzing trace with hash 397934230, now seen corresponding path program 28 times [2021-10-28 23:15:18,692 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:18,692 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1818234107] [2021-10-28 23:15:18,693 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:18,693 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:18,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:18,705 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:18,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:18,716 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:18,716 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:18,717 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 26 times [2021-10-28 23:15:18,717 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:18,717 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [295120120] [2021-10-28 23:15:18,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:18,717 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:18,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:18,723 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:18,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:18,724 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:18,725 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:18,725 INFO L85 PathProgramCache]: Analyzing trace with hash 1741798478, now seen corresponding path program 28 times [2021-10-28 23:15:18,725 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:18,725 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [744236469] [2021-10-28 23:15:18,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:18,726 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:18,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:19,250 INFO L134 CoverageAnalysis]: Checked inductivity of 900 backedges. 87 proven. 812 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:19,250 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:19,250 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [744236469] [2021-10-28 23:15:19,251 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [744236469] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:19,251 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1009163640] [2021-10-28 23:15:19,251 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-10-28 23:15:19,251 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:19,251 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:19,253 INFO L229 MonitoredProcess]: Starting monitored process 50 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:19,276 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (50)] Waiting until timeout for monitored process [2021-10-28 23:15:19,705 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-10-28 23:15:19,705 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:19,706 INFO L263 TraceCheckSpWp]: Trace formula consists of 125 conjuncts, 30 conjunts are in the unsatisfiable core [2021-10-28 23:15:19,707 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:19,948 INFO L134 CoverageAnalysis]: Checked inductivity of 900 backedges. 87 proven. 812 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:19,949 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1009163640] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:19,949 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:19,949 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30] total 30 [2021-10-28 23:15:19,950 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1062931480] [2021-10-28 23:15:19,977 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:19,978 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2021-10-28 23:15:19,980 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=465, Invalid=465, Unknown=0, NotChecked=0, Total=930 [2021-10-28 23:15:19,981 INFO L87 Difference]: Start difference. First operand 61 states and 63 transitions. cyclomatic complexity: 3 Second operand has 31 states, 31 states have (on average 1.967741935483871) internal successors, (61), 30 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:20,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:20,086 INFO L93 Difference]: Finished difference Result 65 states and 67 transitions. [2021-10-28 23:15:20,087 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2021-10-28 23:15:20,087 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 65 states and 67 transitions. [2021-10-28 23:15:20,088 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:20,089 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 65 states to 64 states and 66 transitions. [2021-10-28 23:15:20,089 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:20,090 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:20,090 INFO L73 IsDeterministic]: Start isDeterministic. Operand 64 states and 66 transitions. [2021-10-28 23:15:20,090 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:20,090 INFO L681 BuchiCegarLoop]: Abstraction has 64 states and 66 transitions. [2021-10-28 23:15:20,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states and 66 transitions. [2021-10-28 23:15:20,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 63. [2021-10-28 23:15:20,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 63 states have (on average 1.0317460317460319) internal successors, (65), 62 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:20,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 65 transitions. [2021-10-28 23:15:20,092 INFO L704 BuchiCegarLoop]: Abstraction has 63 states and 65 transitions. [2021-10-28 23:15:20,093 INFO L587 BuchiCegarLoop]: Abstraction has 63 states and 65 transitions. [2021-10-28 23:15:20,093 INFO L425 BuchiCegarLoop]: ======== Iteration 31============ [2021-10-28 23:15:20,093 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 63 states and 65 transitions. [2021-10-28 23:15:20,094 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:20,094 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:20,094 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:20,095 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [30, 29, 1] [2021-10-28 23:15:20,095 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:20,095 INFO L791 eck$LassoCheckResult]: Stem: 5914#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 5910#L10-2 assume !!(main_~i~0 < 100); 5911#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5912#L10-2 assume !!(main_~i~0 < 100); 5913#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5917#L10-2 assume !!(main_~i~0 < 100); 5972#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5971#L10-2 assume !!(main_~i~0 < 100); 5970#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5969#L10-2 assume !!(main_~i~0 < 100); 5968#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5967#L10-2 assume !!(main_~i~0 < 100); 5966#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5965#L10-2 assume !!(main_~i~0 < 100); 5964#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5963#L10-2 assume !!(main_~i~0 < 100); 5962#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5961#L10-2 assume !!(main_~i~0 < 100); 5960#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5959#L10-2 assume !!(main_~i~0 < 100); 5958#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5957#L10-2 assume !!(main_~i~0 < 100); 5956#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5955#L10-2 assume !!(main_~i~0 < 100); 5954#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5953#L10-2 assume !!(main_~i~0 < 100); 5952#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5951#L10-2 assume !!(main_~i~0 < 100); 5950#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5949#L10-2 assume !!(main_~i~0 < 100); 5948#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5947#L10-2 assume !!(main_~i~0 < 100); 5946#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5945#L10-2 assume !!(main_~i~0 < 100); 5944#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5943#L10-2 assume !!(main_~i~0 < 100); 5942#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5941#L10-2 assume !!(main_~i~0 < 100); 5940#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5939#L10-2 assume !!(main_~i~0 < 100); 5938#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5937#L10-2 assume !!(main_~i~0 < 100); 5936#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5935#L10-2 assume !!(main_~i~0 < 100); 5934#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5933#L10-2 assume !!(main_~i~0 < 100); 5932#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5931#L10-2 assume !!(main_~i~0 < 100); 5930#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5929#L10-2 assume !!(main_~i~0 < 100); 5928#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5927#L10-2 assume !!(main_~i~0 < 100); 5926#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5925#L10-2 assume !!(main_~i~0 < 100); 5924#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5923#L10-2 assume !!(main_~i~0 < 100); 5921#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5920#L10-2 assume !!(main_~i~0 < 100); 5919#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5918#L10-2 assume !!(main_~i~0 < 100); 5915#L10 [2021-10-28 23:15:20,095 INFO L793 eck$LassoCheckResult]: Loop: 5915#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 5916#L10-2 assume !!(main_~i~0 < 100); 5919#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5918#L10-2 assume !!(main_~i~0 < 100); 5915#L10 [2021-10-28 23:15:20,095 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:20,096 INFO L85 PathProgramCache]: Analyzing trace with hash 162706099, now seen corresponding path program 29 times [2021-10-28 23:15:20,096 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:20,096 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1569590715] [2021-10-28 23:15:20,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:20,096 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:20,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:20,132 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:20,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:20,150 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:20,151 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:20,151 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 27 times [2021-10-28 23:15:20,151 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:20,152 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1507704360] [2021-10-28 23:15:20,152 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:20,152 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:20,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:20,161 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:20,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:20,163 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:20,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:20,164 INFO L85 PathProgramCache]: Analyzing trace with hash -1226106389, now seen corresponding path program 29 times [2021-10-28 23:15:20,164 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:20,164 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [974671378] [2021-10-28 23:15:20,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:20,166 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:20,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:20,840 INFO L134 CoverageAnalysis]: Checked inductivity of 961 backedges. 90 proven. 870 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:20,841 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:20,841 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [974671378] [2021-10-28 23:15:20,841 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [974671378] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:20,841 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [628815880] [2021-10-28 23:15:20,841 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-10-28 23:15:20,841 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:20,841 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:20,852 INFO L229 MonitoredProcess]: Starting monitored process 51 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:20,873 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (51)] Waiting until timeout for monitored process [2021-10-28 23:15:21,308 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 32 check-sat command(s) [2021-10-28 23:15:21,309 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:21,310 INFO L263 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 31 conjunts are in the unsatisfiable core [2021-10-28 23:15:21,312 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:21,581 INFO L134 CoverageAnalysis]: Checked inductivity of 961 backedges. 90 proven. 870 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:21,582 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [628815880] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:21,582 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:21,582 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31] total 31 [2021-10-28 23:15:21,582 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1360110256] [2021-10-28 23:15:21,611 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:21,612 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2021-10-28 23:15:21,612 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=496, Invalid=496, Unknown=0, NotChecked=0, Total=992 [2021-10-28 23:15:21,613 INFO L87 Difference]: Start difference. First operand 63 states and 65 transitions. cyclomatic complexity: 3 Second operand has 32 states, 32 states have (on average 1.96875) internal successors, (63), 31 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:21,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:21,703 INFO L93 Difference]: Finished difference Result 67 states and 69 transitions. [2021-10-28 23:15:21,704 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2021-10-28 23:15:21,704 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 67 states and 69 transitions. [2021-10-28 23:15:21,705 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:21,706 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 67 states to 66 states and 68 transitions. [2021-10-28 23:15:21,706 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:21,706 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:21,706 INFO L73 IsDeterministic]: Start isDeterministic. Operand 66 states and 68 transitions. [2021-10-28 23:15:21,707 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:21,707 INFO L681 BuchiCegarLoop]: Abstraction has 66 states and 68 transitions. [2021-10-28 23:15:21,707 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states and 68 transitions. [2021-10-28 23:15:21,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 65. [2021-10-28 23:15:21,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 65 states, 65 states have (on average 1.0307692307692307) internal successors, (67), 64 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:21,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 67 transitions. [2021-10-28 23:15:21,709 INFO L704 BuchiCegarLoop]: Abstraction has 65 states and 67 transitions. [2021-10-28 23:15:21,710 INFO L587 BuchiCegarLoop]: Abstraction has 65 states and 67 transitions. [2021-10-28 23:15:21,710 INFO L425 BuchiCegarLoop]: ======== Iteration 32============ [2021-10-28 23:15:21,710 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 65 states and 67 transitions. [2021-10-28 23:15:21,711 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:21,711 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:21,711 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:21,712 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [31, 30, 1] [2021-10-28 23:15:21,712 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:21,712 INFO L791 eck$LassoCheckResult]: Stem: 6270#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 6266#L10-2 assume !!(main_~i~0 < 100); 6267#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6268#L10-2 assume !!(main_~i~0 < 100); 6269#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6273#L10-2 assume !!(main_~i~0 < 100); 6330#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6329#L10-2 assume !!(main_~i~0 < 100); 6328#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6327#L10-2 assume !!(main_~i~0 < 100); 6326#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6325#L10-2 assume !!(main_~i~0 < 100); 6324#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6323#L10-2 assume !!(main_~i~0 < 100); 6322#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6321#L10-2 assume !!(main_~i~0 < 100); 6320#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6319#L10-2 assume !!(main_~i~0 < 100); 6318#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6317#L10-2 assume !!(main_~i~0 < 100); 6316#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6315#L10-2 assume !!(main_~i~0 < 100); 6314#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6313#L10-2 assume !!(main_~i~0 < 100); 6312#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6311#L10-2 assume !!(main_~i~0 < 100); 6310#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6309#L10-2 assume !!(main_~i~0 < 100); 6308#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6307#L10-2 assume !!(main_~i~0 < 100); 6306#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6305#L10-2 assume !!(main_~i~0 < 100); 6304#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6303#L10-2 assume !!(main_~i~0 < 100); 6302#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6301#L10-2 assume !!(main_~i~0 < 100); 6300#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6299#L10-2 assume !!(main_~i~0 < 100); 6298#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6297#L10-2 assume !!(main_~i~0 < 100); 6296#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6295#L10-2 assume !!(main_~i~0 < 100); 6294#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6293#L10-2 assume !!(main_~i~0 < 100); 6292#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6291#L10-2 assume !!(main_~i~0 < 100); 6290#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6289#L10-2 assume !!(main_~i~0 < 100); 6288#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6287#L10-2 assume !!(main_~i~0 < 100); 6286#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6285#L10-2 assume !!(main_~i~0 < 100); 6284#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6283#L10-2 assume !!(main_~i~0 < 100); 6282#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6281#L10-2 assume !!(main_~i~0 < 100); 6280#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6279#L10-2 assume !!(main_~i~0 < 100); 6277#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6276#L10-2 assume !!(main_~i~0 < 100); 6275#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6274#L10-2 assume !!(main_~i~0 < 100); 6271#L10 [2021-10-28 23:15:21,712 INFO L793 eck$LassoCheckResult]: Loop: 6271#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 6272#L10-2 assume !!(main_~i~0 < 100); 6275#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6274#L10-2 assume !!(main_~i~0 < 100); 6271#L10 [2021-10-28 23:15:21,713 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:21,713 INFO L85 PathProgramCache]: Analyzing trace with hash 1741738896, now seen corresponding path program 30 times [2021-10-28 23:15:21,713 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:21,713 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1086691979] [2021-10-28 23:15:21,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:21,714 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:21,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:21,727 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:21,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:21,738 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:21,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:21,739 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 28 times [2021-10-28 23:15:21,739 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:21,739 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [522820763] [2021-10-28 23:15:21,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:21,740 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:21,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:21,746 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:21,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:21,748 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:21,748 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:21,749 INFO L85 PathProgramCache]: Analyzing trace with hash -1524399032, now seen corresponding path program 30 times [2021-10-28 23:15:21,749 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:21,749 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [273742721] [2021-10-28 23:15:21,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:21,749 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:21,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:22,354 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 93 proven. 930 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:22,354 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:22,354 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [273742721] [2021-10-28 23:15:22,354 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [273742721] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:22,354 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1710889147] [2021-10-28 23:15:22,354 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-10-28 23:15:22,355 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:22,355 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:22,361 INFO L229 MonitoredProcess]: Starting monitored process 52 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:22,377 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Waiting until timeout for monitored process [2021-10-28 23:15:22,881 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 33 check-sat command(s) [2021-10-28 23:15:22,881 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:22,883 INFO L263 TraceCheckSpWp]: Trace formula consists of 133 conjuncts, 32 conjunts are in the unsatisfiable core [2021-10-28 23:15:22,884 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:23,147 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 93 proven. 930 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:23,147 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1710889147] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:23,147 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:23,147 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32] total 32 [2021-10-28 23:15:23,148 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [130730174] [2021-10-28 23:15:23,185 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:23,186 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2021-10-28 23:15:23,186 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=528, Invalid=528, Unknown=0, NotChecked=0, Total=1056 [2021-10-28 23:15:23,187 INFO L87 Difference]: Start difference. First operand 65 states and 67 transitions. cyclomatic complexity: 3 Second operand has 33 states, 33 states have (on average 1.9696969696969697) internal successors, (65), 32 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:23,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:23,290 INFO L93 Difference]: Finished difference Result 69 states and 71 transitions. [2021-10-28 23:15:23,291 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2021-10-28 23:15:23,291 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 69 states and 71 transitions. [2021-10-28 23:15:23,292 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:23,294 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 69 states to 68 states and 70 transitions. [2021-10-28 23:15:23,294 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:23,294 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:23,294 INFO L73 IsDeterministic]: Start isDeterministic. Operand 68 states and 70 transitions. [2021-10-28 23:15:23,294 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:23,294 INFO L681 BuchiCegarLoop]: Abstraction has 68 states and 70 transitions. [2021-10-28 23:15:23,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states and 70 transitions. [2021-10-28 23:15:23,296 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 67. [2021-10-28 23:15:23,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 67 states have (on average 1.0298507462686568) internal successors, (69), 66 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:23,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 69 transitions. [2021-10-28 23:15:23,297 INFO L704 BuchiCegarLoop]: Abstraction has 67 states and 69 transitions. [2021-10-28 23:15:23,298 INFO L587 BuchiCegarLoop]: Abstraction has 67 states and 69 transitions. [2021-10-28 23:15:23,298 INFO L425 BuchiCegarLoop]: ======== Iteration 33============ [2021-10-28 23:15:23,298 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 67 states and 69 transitions. [2021-10-28 23:15:23,299 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:23,299 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:23,299 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:23,300 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [32, 31, 1] [2021-10-28 23:15:23,300 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:23,300 INFO L791 eck$LassoCheckResult]: Stem: 6637#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 6633#L10-2 assume !!(main_~i~0 < 100); 6634#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6635#L10-2 assume !!(main_~i~0 < 100); 6636#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6640#L10-2 assume !!(main_~i~0 < 100); 6699#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6698#L10-2 assume !!(main_~i~0 < 100); 6697#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6696#L10-2 assume !!(main_~i~0 < 100); 6695#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6694#L10-2 assume !!(main_~i~0 < 100); 6693#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6692#L10-2 assume !!(main_~i~0 < 100); 6691#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6690#L10-2 assume !!(main_~i~0 < 100); 6689#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6688#L10-2 assume !!(main_~i~0 < 100); 6687#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6686#L10-2 assume !!(main_~i~0 < 100); 6685#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6684#L10-2 assume !!(main_~i~0 < 100); 6683#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6682#L10-2 assume !!(main_~i~0 < 100); 6681#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6680#L10-2 assume !!(main_~i~0 < 100); 6679#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6678#L10-2 assume !!(main_~i~0 < 100); 6677#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6676#L10-2 assume !!(main_~i~0 < 100); 6675#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6674#L10-2 assume !!(main_~i~0 < 100); 6673#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6672#L10-2 assume !!(main_~i~0 < 100); 6671#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6670#L10-2 assume !!(main_~i~0 < 100); 6669#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6668#L10-2 assume !!(main_~i~0 < 100); 6667#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6666#L10-2 assume !!(main_~i~0 < 100); 6665#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6664#L10-2 assume !!(main_~i~0 < 100); 6663#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6662#L10-2 assume !!(main_~i~0 < 100); 6661#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6660#L10-2 assume !!(main_~i~0 < 100); 6659#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6658#L10-2 assume !!(main_~i~0 < 100); 6657#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6656#L10-2 assume !!(main_~i~0 < 100); 6655#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6654#L10-2 assume !!(main_~i~0 < 100); 6653#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6652#L10-2 assume !!(main_~i~0 < 100); 6651#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6650#L10-2 assume !!(main_~i~0 < 100); 6649#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6648#L10-2 assume !!(main_~i~0 < 100); 6647#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6646#L10-2 assume !!(main_~i~0 < 100); 6644#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6643#L10-2 assume !!(main_~i~0 < 100); 6642#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6641#L10-2 assume !!(main_~i~0 < 100); 6638#L10 [2021-10-28 23:15:23,300 INFO L793 eck$LassoCheckResult]: Loop: 6638#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 6639#L10-2 assume !!(main_~i~0 < 100); 6642#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6641#L10-2 assume !!(main_~i~0 < 100); 6638#L10 [2021-10-28 23:15:23,301 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:23,301 INFO L85 PathProgramCache]: Analyzing trace with hash -1226165971, now seen corresponding path program 31 times [2021-10-28 23:15:23,301 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:23,301 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [439349875] [2021-10-28 23:15:23,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:23,301 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:23,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:23,316 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:23,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:23,331 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:23,331 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:23,331 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 29 times [2021-10-28 23:15:23,332 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:23,332 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2141492211] [2021-10-28 23:15:23,332 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:23,332 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:23,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:23,340 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:23,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:23,341 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:23,342 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:23,342 INFO L85 PathProgramCache]: Analyzing trace with hash -420820123, now seen corresponding path program 31 times [2021-10-28 23:15:23,342 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:23,342 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1066217717] [2021-10-28 23:15:23,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:23,343 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:23,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:23,958 INFO L134 CoverageAnalysis]: Checked inductivity of 1089 backedges. 96 proven. 992 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:23,959 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:23,959 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1066217717] [2021-10-28 23:15:23,959 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1066217717] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:23,959 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [252778385] [2021-10-28 23:15:23,959 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-10-28 23:15:23,959 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:23,960 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:23,976 INFO L229 MonitoredProcess]: Starting monitored process 53 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:23,978 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Waiting until timeout for monitored process [2021-10-28 23:15:24,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:24,449 INFO L263 TraceCheckSpWp]: Trace formula consists of 137 conjuncts, 33 conjunts are in the unsatisfiable core [2021-10-28 23:15:24,450 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:24,756 INFO L134 CoverageAnalysis]: Checked inductivity of 1089 backedges. 96 proven. 992 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:24,756 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [252778385] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:24,756 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:24,756 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33] total 33 [2021-10-28 23:15:24,756 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1096376777] [2021-10-28 23:15:24,788 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:24,789 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2021-10-28 23:15:24,789 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=561, Invalid=561, Unknown=0, NotChecked=0, Total=1122 [2021-10-28 23:15:24,790 INFO L87 Difference]: Start difference. First operand 67 states and 69 transitions. cyclomatic complexity: 3 Second operand has 34 states, 34 states have (on average 1.9705882352941178) internal successors, (67), 33 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:24,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:24,924 INFO L93 Difference]: Finished difference Result 71 states and 73 transitions. [2021-10-28 23:15:24,925 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2021-10-28 23:15:24,925 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 71 states and 73 transitions. [2021-10-28 23:15:24,926 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:24,927 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 71 states to 70 states and 72 transitions. [2021-10-28 23:15:24,927 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:24,927 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:24,927 INFO L73 IsDeterministic]: Start isDeterministic. Operand 70 states and 72 transitions. [2021-10-28 23:15:24,928 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:24,928 INFO L681 BuchiCegarLoop]: Abstraction has 70 states and 72 transitions. [2021-10-28 23:15:24,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states and 72 transitions. [2021-10-28 23:15:24,930 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 69. [2021-10-28 23:15:24,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 69 states, 69 states have (on average 1.0289855072463767) internal successors, (71), 68 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:24,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 71 transitions. [2021-10-28 23:15:24,931 INFO L704 BuchiCegarLoop]: Abstraction has 69 states and 71 transitions. [2021-10-28 23:15:24,931 INFO L587 BuchiCegarLoop]: Abstraction has 69 states and 71 transitions. [2021-10-28 23:15:24,932 INFO L425 BuchiCegarLoop]: ======== Iteration 34============ [2021-10-28 23:15:24,932 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 69 states and 71 transitions. [2021-10-28 23:15:24,933 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:24,933 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:24,933 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:24,934 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [33, 32, 1] [2021-10-28 23:15:24,934 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:24,935 INFO L791 eck$LassoCheckResult]: Stem: 7015#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 7011#L10-2 assume !!(main_~i~0 < 100); 7012#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7013#L10-2 assume !!(main_~i~0 < 100); 7014#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7018#L10-2 assume !!(main_~i~0 < 100); 7079#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7078#L10-2 assume !!(main_~i~0 < 100); 7077#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7076#L10-2 assume !!(main_~i~0 < 100); 7075#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7074#L10-2 assume !!(main_~i~0 < 100); 7073#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7072#L10-2 assume !!(main_~i~0 < 100); 7071#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7070#L10-2 assume !!(main_~i~0 < 100); 7069#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7068#L10-2 assume !!(main_~i~0 < 100); 7067#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7066#L10-2 assume !!(main_~i~0 < 100); 7065#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7064#L10-2 assume !!(main_~i~0 < 100); 7063#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7062#L10-2 assume !!(main_~i~0 < 100); 7061#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7060#L10-2 assume !!(main_~i~0 < 100); 7059#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7058#L10-2 assume !!(main_~i~0 < 100); 7057#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7056#L10-2 assume !!(main_~i~0 < 100); 7055#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7054#L10-2 assume !!(main_~i~0 < 100); 7053#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7052#L10-2 assume !!(main_~i~0 < 100); 7051#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7050#L10-2 assume !!(main_~i~0 < 100); 7049#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7048#L10-2 assume !!(main_~i~0 < 100); 7047#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7046#L10-2 assume !!(main_~i~0 < 100); 7045#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7044#L10-2 assume !!(main_~i~0 < 100); 7043#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7042#L10-2 assume !!(main_~i~0 < 100); 7041#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7040#L10-2 assume !!(main_~i~0 < 100); 7039#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7038#L10-2 assume !!(main_~i~0 < 100); 7037#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7036#L10-2 assume !!(main_~i~0 < 100); 7035#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7034#L10-2 assume !!(main_~i~0 < 100); 7033#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7032#L10-2 assume !!(main_~i~0 < 100); 7031#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7030#L10-2 assume !!(main_~i~0 < 100); 7029#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7028#L10-2 assume !!(main_~i~0 < 100); 7027#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7026#L10-2 assume !!(main_~i~0 < 100); 7025#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7024#L10-2 assume !!(main_~i~0 < 100); 7022#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7021#L10-2 assume !!(main_~i~0 < 100); 7020#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7019#L10-2 assume !!(main_~i~0 < 100); 7016#L10 [2021-10-28 23:15:24,935 INFO L793 eck$LassoCheckResult]: Loop: 7016#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 7017#L10-2 assume !!(main_~i~0 < 100); 7020#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7019#L10-2 assume !!(main_~i~0 < 100); 7016#L10 [2021-10-28 23:15:24,935 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:24,935 INFO L85 PathProgramCache]: Analyzing trace with hash -1524458614, now seen corresponding path program 32 times [2021-10-28 23:15:24,936 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:24,936 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1054448759] [2021-10-28 23:15:24,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:24,936 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:24,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:24,958 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:24,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:24,972 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:24,973 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:24,973 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 30 times [2021-10-28 23:15:24,973 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:24,974 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [892046444] [2021-10-28 23:15:24,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:24,974 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:24,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:24,985 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:24,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:24,987 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:24,987 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:24,988 INFO L85 PathProgramCache]: Analyzing trace with hash -738410686, now seen corresponding path program 32 times [2021-10-28 23:15:24,988 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:24,988 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1881890094] [2021-10-28 23:15:24,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:24,989 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:25,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:25,700 INFO L134 CoverageAnalysis]: Checked inductivity of 1156 backedges. 99 proven. 1056 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:25,701 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:25,701 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1881890094] [2021-10-28 23:15:25,701 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1881890094] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:25,701 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1035766139] [2021-10-28 23:15:25,701 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-10-28 23:15:25,701 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:25,702 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:25,704 INFO L229 MonitoredProcess]: Starting monitored process 54 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:25,724 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Waiting until timeout for monitored process [2021-10-28 23:15:26,282 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-10-28 23:15:26,282 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:26,283 INFO L263 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 34 conjunts are in the unsatisfiable core [2021-10-28 23:15:26,285 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:26,620 INFO L134 CoverageAnalysis]: Checked inductivity of 1156 backedges. 99 proven. 1056 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:26,621 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1035766139] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:26,621 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:26,621 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34] total 34 [2021-10-28 23:15:26,621 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1892007032] [2021-10-28 23:15:26,655 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:26,655 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2021-10-28 23:15:26,656 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=595, Invalid=595, Unknown=0, NotChecked=0, Total=1190 [2021-10-28 23:15:26,656 INFO L87 Difference]: Start difference. First operand 69 states and 71 transitions. cyclomatic complexity: 3 Second operand has 35 states, 35 states have (on average 1.9714285714285715) internal successors, (69), 34 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:26,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:26,757 INFO L93 Difference]: Finished difference Result 73 states and 75 transitions. [2021-10-28 23:15:26,758 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2021-10-28 23:15:26,758 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 73 states and 75 transitions. [2021-10-28 23:15:26,759 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:26,760 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 73 states to 72 states and 74 transitions. [2021-10-28 23:15:26,760 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:26,760 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:26,760 INFO L73 IsDeterministic]: Start isDeterministic. Operand 72 states and 74 transitions. [2021-10-28 23:15:26,761 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:26,761 INFO L681 BuchiCegarLoop]: Abstraction has 72 states and 74 transitions. [2021-10-28 23:15:26,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states and 74 transitions. [2021-10-28 23:15:26,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 71. [2021-10-28 23:15:26,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 71 states, 71 states have (on average 1.028169014084507) internal successors, (73), 70 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:26,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 73 transitions. [2021-10-28 23:15:26,764 INFO L704 BuchiCegarLoop]: Abstraction has 71 states and 73 transitions. [2021-10-28 23:15:26,764 INFO L587 BuchiCegarLoop]: Abstraction has 71 states and 73 transitions. [2021-10-28 23:15:26,764 INFO L425 BuchiCegarLoop]: ======== Iteration 35============ [2021-10-28 23:15:26,764 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 71 states and 73 transitions. [2021-10-28 23:15:26,765 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:26,765 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:26,765 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:26,766 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [34, 33, 1] [2021-10-28 23:15:26,766 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:26,766 INFO L791 eck$LassoCheckResult]: Stem: 7404#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 7400#L10-2 assume !!(main_~i~0 < 100); 7401#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7402#L10-2 assume !!(main_~i~0 < 100); 7403#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7407#L10-2 assume !!(main_~i~0 < 100); 7470#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7469#L10-2 assume !!(main_~i~0 < 100); 7468#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7467#L10-2 assume !!(main_~i~0 < 100); 7466#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7465#L10-2 assume !!(main_~i~0 < 100); 7464#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7463#L10-2 assume !!(main_~i~0 < 100); 7462#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7461#L10-2 assume !!(main_~i~0 < 100); 7460#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7459#L10-2 assume !!(main_~i~0 < 100); 7458#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7457#L10-2 assume !!(main_~i~0 < 100); 7456#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7455#L10-2 assume !!(main_~i~0 < 100); 7454#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7453#L10-2 assume !!(main_~i~0 < 100); 7452#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7451#L10-2 assume !!(main_~i~0 < 100); 7450#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7449#L10-2 assume !!(main_~i~0 < 100); 7448#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7447#L10-2 assume !!(main_~i~0 < 100); 7446#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7445#L10-2 assume !!(main_~i~0 < 100); 7444#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7443#L10-2 assume !!(main_~i~0 < 100); 7442#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7441#L10-2 assume !!(main_~i~0 < 100); 7440#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7439#L10-2 assume !!(main_~i~0 < 100); 7438#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7437#L10-2 assume !!(main_~i~0 < 100); 7436#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7435#L10-2 assume !!(main_~i~0 < 100); 7434#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7433#L10-2 assume !!(main_~i~0 < 100); 7432#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7431#L10-2 assume !!(main_~i~0 < 100); 7430#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7429#L10-2 assume !!(main_~i~0 < 100); 7428#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7427#L10-2 assume !!(main_~i~0 < 100); 7426#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7425#L10-2 assume !!(main_~i~0 < 100); 7424#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7423#L10-2 assume !!(main_~i~0 < 100); 7422#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7421#L10-2 assume !!(main_~i~0 < 100); 7420#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7419#L10-2 assume !!(main_~i~0 < 100); 7418#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7417#L10-2 assume !!(main_~i~0 < 100); 7416#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7415#L10-2 assume !!(main_~i~0 < 100); 7414#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7413#L10-2 assume !!(main_~i~0 < 100); 7411#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7410#L10-2 assume !!(main_~i~0 < 100); 7409#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7408#L10-2 assume !!(main_~i~0 < 100); 7405#L10 [2021-10-28 23:15:26,767 INFO L793 eck$LassoCheckResult]: Loop: 7405#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 7406#L10-2 assume !!(main_~i~0 < 100); 7409#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7408#L10-2 assume !!(main_~i~0 < 100); 7405#L10 [2021-10-28 23:15:26,767 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:26,767 INFO L85 PathProgramCache]: Analyzing trace with hash -420879705, now seen corresponding path program 33 times [2021-10-28 23:15:26,767 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:26,768 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2113778030] [2021-10-28 23:15:26,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:26,768 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:26,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:26,783 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:26,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:26,795 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:26,796 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:26,796 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 31 times [2021-10-28 23:15:26,796 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:26,797 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1203485093] [2021-10-28 23:15:26,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:26,797 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:26,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:26,804 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:26,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:26,806 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:26,806 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:26,806 INFO L85 PathProgramCache]: Analyzing trace with hash -1000263713, now seen corresponding path program 33 times [2021-10-28 23:15:26,807 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:26,807 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [224615211] [2021-10-28 23:15:26,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:26,807 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:26,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:27,533 INFO L134 CoverageAnalysis]: Checked inductivity of 1225 backedges. 102 proven. 1122 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:27,534 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:27,534 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [224615211] [2021-10-28 23:15:27,534 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [224615211] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:27,534 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1379019713] [2021-10-28 23:15:27,534 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-10-28 23:15:27,534 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:27,534 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:27,537 INFO L229 MonitoredProcess]: Starting monitored process 55 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:27,557 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Waiting until timeout for monitored process [2021-10-28 23:15:28,128 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 36 check-sat command(s) [2021-10-28 23:15:28,128 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:28,130 INFO L263 TraceCheckSpWp]: Trace formula consists of 145 conjuncts, 35 conjunts are in the unsatisfiable core [2021-10-28 23:15:28,131 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:28,405 INFO L134 CoverageAnalysis]: Checked inductivity of 1225 backedges. 102 proven. 1122 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:28,406 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1379019713] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:28,406 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:28,406 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35] total 35 [2021-10-28 23:15:28,406 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [994584975] [2021-10-28 23:15:28,436 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:28,436 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2021-10-28 23:15:28,437 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=630, Invalid=630, Unknown=0, NotChecked=0, Total=1260 [2021-10-28 23:15:28,437 INFO L87 Difference]: Start difference. First operand 71 states and 73 transitions. cyclomatic complexity: 3 Second operand has 36 states, 36 states have (on average 1.9722222222222223) internal successors, (71), 35 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:28,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:28,522 INFO L93 Difference]: Finished difference Result 75 states and 77 transitions. [2021-10-28 23:15:28,522 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2021-10-28 23:15:28,523 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 75 states and 77 transitions. [2021-10-28 23:15:28,524 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:28,524 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 75 states to 74 states and 76 transitions. [2021-10-28 23:15:28,525 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:28,525 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:28,525 INFO L73 IsDeterministic]: Start isDeterministic. Operand 74 states and 76 transitions. [2021-10-28 23:15:28,526 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:28,526 INFO L681 BuchiCegarLoop]: Abstraction has 74 states and 76 transitions. [2021-10-28 23:15:28,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states and 76 transitions. [2021-10-28 23:15:28,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 73. [2021-10-28 23:15:28,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 73 states have (on average 1.0273972602739727) internal successors, (75), 72 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:28,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 75 transitions. [2021-10-28 23:15:28,529 INFO L704 BuchiCegarLoop]: Abstraction has 73 states and 75 transitions. [2021-10-28 23:15:28,529 INFO L587 BuchiCegarLoop]: Abstraction has 73 states and 75 transitions. [2021-10-28 23:15:28,529 INFO L425 BuchiCegarLoop]: ======== Iteration 36============ [2021-10-28 23:15:28,529 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 73 states and 75 transitions. [2021-10-28 23:15:28,530 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:28,530 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:28,530 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:28,531 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [35, 34, 1] [2021-10-28 23:15:28,531 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:28,532 INFO L791 eck$LassoCheckResult]: Stem: 7804#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 7800#L10-2 assume !!(main_~i~0 < 100); 7801#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7802#L10-2 assume !!(main_~i~0 < 100); 7803#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7807#L10-2 assume !!(main_~i~0 < 100); 7872#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7871#L10-2 assume !!(main_~i~0 < 100); 7870#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7869#L10-2 assume !!(main_~i~0 < 100); 7868#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7867#L10-2 assume !!(main_~i~0 < 100); 7866#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7865#L10-2 assume !!(main_~i~0 < 100); 7864#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7863#L10-2 assume !!(main_~i~0 < 100); 7862#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7861#L10-2 assume !!(main_~i~0 < 100); 7860#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7859#L10-2 assume !!(main_~i~0 < 100); 7858#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7857#L10-2 assume !!(main_~i~0 < 100); 7856#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7855#L10-2 assume !!(main_~i~0 < 100); 7854#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7853#L10-2 assume !!(main_~i~0 < 100); 7852#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7851#L10-2 assume !!(main_~i~0 < 100); 7850#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7849#L10-2 assume !!(main_~i~0 < 100); 7848#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7847#L10-2 assume !!(main_~i~0 < 100); 7846#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7845#L10-2 assume !!(main_~i~0 < 100); 7844#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7843#L10-2 assume !!(main_~i~0 < 100); 7842#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7841#L10-2 assume !!(main_~i~0 < 100); 7840#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7839#L10-2 assume !!(main_~i~0 < 100); 7838#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7837#L10-2 assume !!(main_~i~0 < 100); 7836#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7835#L10-2 assume !!(main_~i~0 < 100); 7834#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7833#L10-2 assume !!(main_~i~0 < 100); 7832#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7831#L10-2 assume !!(main_~i~0 < 100); 7830#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7829#L10-2 assume !!(main_~i~0 < 100); 7828#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7827#L10-2 assume !!(main_~i~0 < 100); 7826#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7825#L10-2 assume !!(main_~i~0 < 100); 7824#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7823#L10-2 assume !!(main_~i~0 < 100); 7822#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7821#L10-2 assume !!(main_~i~0 < 100); 7820#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7819#L10-2 assume !!(main_~i~0 < 100); 7818#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7817#L10-2 assume !!(main_~i~0 < 100); 7816#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7815#L10-2 assume !!(main_~i~0 < 100); 7814#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7813#L10-2 assume !!(main_~i~0 < 100); 7811#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7810#L10-2 assume !!(main_~i~0 < 100); 7809#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7808#L10-2 assume !!(main_~i~0 < 100); 7805#L10 [2021-10-28 23:15:28,532 INFO L793 eck$LassoCheckResult]: Loop: 7805#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 7806#L10-2 assume !!(main_~i~0 < 100); 7809#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7808#L10-2 assume !!(main_~i~0 < 100); 7805#L10 [2021-10-28 23:15:28,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:28,532 INFO L85 PathProgramCache]: Analyzing trace with hash -738470268, now seen corresponding path program 34 times [2021-10-28 23:15:28,533 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:28,533 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1979656449] [2021-10-28 23:15:28,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:28,533 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:28,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:28,548 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:28,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:28,560 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:28,561 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:28,561 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 32 times [2021-10-28 23:15:28,561 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:28,561 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1025116511] [2021-10-28 23:15:28,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:28,562 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:28,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:28,568 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:28,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:28,570 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:28,571 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:28,571 INFO L85 PathProgramCache]: Analyzing trace with hash 762047804, now seen corresponding path program 34 times [2021-10-28 23:15:28,571 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:28,572 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [382356190] [2021-10-28 23:15:28,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:28,572 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:28,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:29,362 INFO L134 CoverageAnalysis]: Checked inductivity of 1296 backedges. 105 proven. 1190 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:29,362 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:29,362 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [382356190] [2021-10-28 23:15:29,363 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [382356190] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:29,363 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1554150498] [2021-10-28 23:15:29,363 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-10-28 23:15:29,363 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:29,363 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:29,365 INFO L229 MonitoredProcess]: Starting monitored process 56 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:29,381 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (56)] Waiting until timeout for monitored process [2021-10-28 23:15:30,084 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-10-28 23:15:30,084 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:30,085 INFO L263 TraceCheckSpWp]: Trace formula consists of 149 conjuncts, 36 conjunts are in the unsatisfiable core [2021-10-28 23:15:30,087 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:30,360 INFO L134 CoverageAnalysis]: Checked inductivity of 1296 backedges. 105 proven. 1190 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:30,360 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1554150498] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:30,360 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:30,361 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36] total 36 [2021-10-28 23:15:30,361 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1662710778] [2021-10-28 23:15:30,388 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:30,389 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2021-10-28 23:15:30,390 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=666, Invalid=666, Unknown=0, NotChecked=0, Total=1332 [2021-10-28 23:15:30,390 INFO L87 Difference]: Start difference. First operand 73 states and 75 transitions. cyclomatic complexity: 3 Second operand has 37 states, 37 states have (on average 1.972972972972973) internal successors, (73), 36 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:30,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:30,495 INFO L93 Difference]: Finished difference Result 77 states and 79 transitions. [2021-10-28 23:15:30,495 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2021-10-28 23:15:30,496 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 77 states and 79 transitions. [2021-10-28 23:15:30,497 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:30,498 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 77 states to 76 states and 78 transitions. [2021-10-28 23:15:30,499 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:30,499 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:30,499 INFO L73 IsDeterministic]: Start isDeterministic. Operand 76 states and 78 transitions. [2021-10-28 23:15:30,499 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:30,499 INFO L681 BuchiCegarLoop]: Abstraction has 76 states and 78 transitions. [2021-10-28 23:15:30,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states and 78 transitions. [2021-10-28 23:15:30,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 75. [2021-10-28 23:15:30,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 75 states have (on average 1.0266666666666666) internal successors, (77), 74 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:30,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 77 transitions. [2021-10-28 23:15:30,508 INFO L704 BuchiCegarLoop]: Abstraction has 75 states and 77 transitions. [2021-10-28 23:15:30,508 INFO L587 BuchiCegarLoop]: Abstraction has 75 states and 77 transitions. [2021-10-28 23:15:30,508 INFO L425 BuchiCegarLoop]: ======== Iteration 37============ [2021-10-28 23:15:30,509 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 75 states and 77 transitions. [2021-10-28 23:15:30,509 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:30,510 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:30,510 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:30,510 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [36, 35, 1] [2021-10-28 23:15:30,510 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:30,511 INFO L791 eck$LassoCheckResult]: Stem: 8215#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 8211#L10-2 assume !!(main_~i~0 < 100); 8212#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8213#L10-2 assume !!(main_~i~0 < 100); 8214#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8218#L10-2 assume !!(main_~i~0 < 100); 8285#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8284#L10-2 assume !!(main_~i~0 < 100); 8283#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8282#L10-2 assume !!(main_~i~0 < 100); 8281#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8280#L10-2 assume !!(main_~i~0 < 100); 8279#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8278#L10-2 assume !!(main_~i~0 < 100); 8277#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8276#L10-2 assume !!(main_~i~0 < 100); 8275#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8274#L10-2 assume !!(main_~i~0 < 100); 8273#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8272#L10-2 assume !!(main_~i~0 < 100); 8271#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8270#L10-2 assume !!(main_~i~0 < 100); 8269#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8268#L10-2 assume !!(main_~i~0 < 100); 8267#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8266#L10-2 assume !!(main_~i~0 < 100); 8265#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8264#L10-2 assume !!(main_~i~0 < 100); 8263#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8262#L10-2 assume !!(main_~i~0 < 100); 8261#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8260#L10-2 assume !!(main_~i~0 < 100); 8259#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8258#L10-2 assume !!(main_~i~0 < 100); 8257#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8256#L10-2 assume !!(main_~i~0 < 100); 8255#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8254#L10-2 assume !!(main_~i~0 < 100); 8253#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8252#L10-2 assume !!(main_~i~0 < 100); 8251#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8250#L10-2 assume !!(main_~i~0 < 100); 8249#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8248#L10-2 assume !!(main_~i~0 < 100); 8247#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8246#L10-2 assume !!(main_~i~0 < 100); 8245#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8244#L10-2 assume !!(main_~i~0 < 100); 8243#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8242#L10-2 assume !!(main_~i~0 < 100); 8241#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8240#L10-2 assume !!(main_~i~0 < 100); 8239#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8238#L10-2 assume !!(main_~i~0 < 100); 8237#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8236#L10-2 assume !!(main_~i~0 < 100); 8235#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8234#L10-2 assume !!(main_~i~0 < 100); 8233#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8232#L10-2 assume !!(main_~i~0 < 100); 8231#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8230#L10-2 assume !!(main_~i~0 < 100); 8229#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8228#L10-2 assume !!(main_~i~0 < 100); 8227#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8226#L10-2 assume !!(main_~i~0 < 100); 8225#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8224#L10-2 assume !!(main_~i~0 < 100); 8222#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8221#L10-2 assume !!(main_~i~0 < 100); 8220#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8219#L10-2 assume !!(main_~i~0 < 100); 8216#L10 [2021-10-28 23:15:30,511 INFO L793 eck$LassoCheckResult]: Loop: 8216#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 8217#L10-2 assume !!(main_~i~0 < 100); 8220#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8219#L10-2 assume !!(main_~i~0 < 100); 8216#L10 [2021-10-28 23:15:30,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:30,512 INFO L85 PathProgramCache]: Analyzing trace with hash -1000323295, now seen corresponding path program 35 times [2021-10-28 23:15:30,512 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:30,512 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1623291191] [2021-10-28 23:15:30,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:30,513 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:30,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:30,530 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:30,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:30,541 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:30,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:30,542 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 33 times [2021-10-28 23:15:30,542 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:30,542 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1040605644] [2021-10-28 23:15:30,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:30,542 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:30,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:30,605 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:30,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:30,607 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:30,607 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:30,607 INFO L85 PathProgramCache]: Analyzing trace with hash 2126301017, now seen corresponding path program 35 times [2021-10-28 23:15:30,608 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:30,608 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [467634639] [2021-10-28 23:15:30,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:30,608 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:30,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:31,226 INFO L134 CoverageAnalysis]: Checked inductivity of 1369 backedges. 108 proven. 1260 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:31,226 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:31,226 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [467634639] [2021-10-28 23:15:31,226 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [467634639] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:31,227 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1215630085] [2021-10-28 23:15:31,227 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-10-28 23:15:31,227 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:31,227 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:31,228 INFO L229 MonitoredProcess]: Starting monitored process 57 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:31,229 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (57)] Waiting until timeout for monitored process [2021-10-28 23:15:31,710 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 38 check-sat command(s) [2021-10-28 23:15:31,710 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:31,712 INFO L263 TraceCheckSpWp]: Trace formula consists of 153 conjuncts, 37 conjunts are in the unsatisfiable core [2021-10-28 23:15:31,714 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:31,977 INFO L134 CoverageAnalysis]: Checked inductivity of 1369 backedges. 108 proven. 1260 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:31,978 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1215630085] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:31,978 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:31,978 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37] total 37 [2021-10-28 23:15:31,978 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1818834496] [2021-10-28 23:15:32,002 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:32,003 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2021-10-28 23:15:32,003 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2021-10-28 23:15:32,004 INFO L87 Difference]: Start difference. First operand 75 states and 77 transitions. cyclomatic complexity: 3 Second operand has 38 states, 38 states have (on average 1.9736842105263157) internal successors, (75), 37 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:32,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:32,089 INFO L93 Difference]: Finished difference Result 79 states and 81 transitions. [2021-10-28 23:15:32,089 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2021-10-28 23:15:32,089 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 79 states and 81 transitions. [2021-10-28 23:15:32,090 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:32,091 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 79 states to 78 states and 80 transitions. [2021-10-28 23:15:32,091 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:32,091 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:32,091 INFO L73 IsDeterministic]: Start isDeterministic. Operand 78 states and 80 transitions. [2021-10-28 23:15:32,091 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:32,091 INFO L681 BuchiCegarLoop]: Abstraction has 78 states and 80 transitions. [2021-10-28 23:15:32,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states and 80 transitions. [2021-10-28 23:15:32,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 77. [2021-10-28 23:15:32,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 77 states have (on average 1.025974025974026) internal successors, (79), 76 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:32,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 79 transitions. [2021-10-28 23:15:32,093 INFO L704 BuchiCegarLoop]: Abstraction has 77 states and 79 transitions. [2021-10-28 23:15:32,093 INFO L587 BuchiCegarLoop]: Abstraction has 77 states and 79 transitions. [2021-10-28 23:15:32,093 INFO L425 BuchiCegarLoop]: ======== Iteration 38============ [2021-10-28 23:15:32,093 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 77 states and 79 transitions. [2021-10-28 23:15:32,094 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:32,094 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:32,094 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:32,095 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [37, 36, 1] [2021-10-28 23:15:32,095 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:32,096 INFO L791 eck$LassoCheckResult]: Stem: 8637#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 8633#L10-2 assume !!(main_~i~0 < 100); 8634#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8635#L10-2 assume !!(main_~i~0 < 100); 8636#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8640#L10-2 assume !!(main_~i~0 < 100); 8709#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8708#L10-2 assume !!(main_~i~0 < 100); 8707#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8706#L10-2 assume !!(main_~i~0 < 100); 8705#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8704#L10-2 assume !!(main_~i~0 < 100); 8703#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8702#L10-2 assume !!(main_~i~0 < 100); 8701#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8700#L10-2 assume !!(main_~i~0 < 100); 8699#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8698#L10-2 assume !!(main_~i~0 < 100); 8697#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8696#L10-2 assume !!(main_~i~0 < 100); 8695#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8694#L10-2 assume !!(main_~i~0 < 100); 8693#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8692#L10-2 assume !!(main_~i~0 < 100); 8691#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8690#L10-2 assume !!(main_~i~0 < 100); 8689#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8688#L10-2 assume !!(main_~i~0 < 100); 8687#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8686#L10-2 assume !!(main_~i~0 < 100); 8685#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8684#L10-2 assume !!(main_~i~0 < 100); 8683#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8682#L10-2 assume !!(main_~i~0 < 100); 8681#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8680#L10-2 assume !!(main_~i~0 < 100); 8679#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8678#L10-2 assume !!(main_~i~0 < 100); 8677#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8676#L10-2 assume !!(main_~i~0 < 100); 8675#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8674#L10-2 assume !!(main_~i~0 < 100); 8673#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8672#L10-2 assume !!(main_~i~0 < 100); 8671#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8670#L10-2 assume !!(main_~i~0 < 100); 8669#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8668#L10-2 assume !!(main_~i~0 < 100); 8667#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8666#L10-2 assume !!(main_~i~0 < 100); 8665#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8664#L10-2 assume !!(main_~i~0 < 100); 8663#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8662#L10-2 assume !!(main_~i~0 < 100); 8661#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8660#L10-2 assume !!(main_~i~0 < 100); 8659#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8658#L10-2 assume !!(main_~i~0 < 100); 8657#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8656#L10-2 assume !!(main_~i~0 < 100); 8655#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8654#L10-2 assume !!(main_~i~0 < 100); 8653#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8652#L10-2 assume !!(main_~i~0 < 100); 8651#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8650#L10-2 assume !!(main_~i~0 < 100); 8649#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8648#L10-2 assume !!(main_~i~0 < 100); 8647#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8646#L10-2 assume !!(main_~i~0 < 100); 8644#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8643#L10-2 assume !!(main_~i~0 < 100); 8642#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8641#L10-2 assume !!(main_~i~0 < 100); 8638#L10 [2021-10-28 23:15:32,096 INFO L793 eck$LassoCheckResult]: Loop: 8638#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 8639#L10-2 assume !!(main_~i~0 < 100); 8642#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8641#L10-2 assume !!(main_~i~0 < 100); 8638#L10 [2021-10-28 23:15:32,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:32,096 INFO L85 PathProgramCache]: Analyzing trace with hash 761988222, now seen corresponding path program 36 times [2021-10-28 23:15:32,096 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:32,096 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [239464296] [2021-10-28 23:15:32,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:32,097 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:32,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:32,114 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:32,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:32,126 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:32,127 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:32,127 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 34 times [2021-10-28 23:15:32,127 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:32,127 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1996642758] [2021-10-28 23:15:32,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:32,128 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:32,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:32,178 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:32,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:32,179 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:32,179 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:32,180 INFO L85 PathProgramCache]: Analyzing trace with hash -1086353866, now seen corresponding path program 36 times [2021-10-28 23:15:32,180 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:32,180 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1104012015] [2021-10-28 23:15:32,180 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:32,180 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:32,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:32,882 INFO L134 CoverageAnalysis]: Checked inductivity of 1444 backedges. 111 proven. 1332 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:32,883 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:32,883 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1104012015] [2021-10-28 23:15:32,883 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1104012015] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:32,883 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [451434426] [2021-10-28 23:15:32,883 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-10-28 23:15:32,883 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:32,883 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:32,886 INFO L229 MonitoredProcess]: Starting monitored process 58 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:32,901 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (58)] Waiting until timeout for monitored process [2021-10-28 23:15:33,454 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 39 check-sat command(s) [2021-10-28 23:15:33,454 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:33,455 INFO L263 TraceCheckSpWp]: Trace formula consists of 157 conjuncts, 38 conjunts are in the unsatisfiable core [2021-10-28 23:15:33,456 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:33,699 INFO L134 CoverageAnalysis]: Checked inductivity of 1444 backedges. 111 proven. 1332 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:33,699 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [451434426] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:33,699 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:33,699 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38] total 38 [2021-10-28 23:15:33,700 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2071345593] [2021-10-28 23:15:33,726 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:33,727 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2021-10-28 23:15:33,727 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=741, Invalid=741, Unknown=0, NotChecked=0, Total=1482 [2021-10-28 23:15:33,728 INFO L87 Difference]: Start difference. First operand 77 states and 79 transitions. cyclomatic complexity: 3 Second operand has 39 states, 39 states have (on average 1.9743589743589745) internal successors, (77), 38 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:33,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:33,818 INFO L93 Difference]: Finished difference Result 81 states and 83 transitions. [2021-10-28 23:15:33,818 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2021-10-28 23:15:33,818 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 81 states and 83 transitions. [2021-10-28 23:15:33,822 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:33,823 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 81 states to 80 states and 82 transitions. [2021-10-28 23:15:33,823 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:33,823 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:33,824 INFO L73 IsDeterministic]: Start isDeterministic. Operand 80 states and 82 transitions. [2021-10-28 23:15:33,824 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:33,824 INFO L681 BuchiCegarLoop]: Abstraction has 80 states and 82 transitions. [2021-10-28 23:15:33,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states and 82 transitions. [2021-10-28 23:15:33,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 79. [2021-10-28 23:15:33,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 79 states, 79 states have (on average 1.0253164556962024) internal successors, (81), 78 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:33,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 81 transitions. [2021-10-28 23:15:33,828 INFO L704 BuchiCegarLoop]: Abstraction has 79 states and 81 transitions. [2021-10-28 23:15:33,828 INFO L587 BuchiCegarLoop]: Abstraction has 79 states and 81 transitions. [2021-10-28 23:15:33,828 INFO L425 BuchiCegarLoop]: ======== Iteration 39============ [2021-10-28 23:15:33,828 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 79 states and 81 transitions. [2021-10-28 23:15:33,830 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:33,830 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:33,830 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:33,831 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [38, 37, 1] [2021-10-28 23:15:33,831 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:33,831 INFO L791 eck$LassoCheckResult]: Stem: 9070#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 9066#L10-2 assume !!(main_~i~0 < 100); 9067#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9068#L10-2 assume !!(main_~i~0 < 100); 9069#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9073#L10-2 assume !!(main_~i~0 < 100); 9144#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9143#L10-2 assume !!(main_~i~0 < 100); 9142#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9141#L10-2 assume !!(main_~i~0 < 100); 9140#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9139#L10-2 assume !!(main_~i~0 < 100); 9138#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9137#L10-2 assume !!(main_~i~0 < 100); 9136#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9135#L10-2 assume !!(main_~i~0 < 100); 9134#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9133#L10-2 assume !!(main_~i~0 < 100); 9132#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9131#L10-2 assume !!(main_~i~0 < 100); 9130#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9129#L10-2 assume !!(main_~i~0 < 100); 9128#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9127#L10-2 assume !!(main_~i~0 < 100); 9126#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9125#L10-2 assume !!(main_~i~0 < 100); 9124#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9123#L10-2 assume !!(main_~i~0 < 100); 9122#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9121#L10-2 assume !!(main_~i~0 < 100); 9120#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9119#L10-2 assume !!(main_~i~0 < 100); 9118#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9117#L10-2 assume !!(main_~i~0 < 100); 9116#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9115#L10-2 assume !!(main_~i~0 < 100); 9114#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9113#L10-2 assume !!(main_~i~0 < 100); 9112#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9111#L10-2 assume !!(main_~i~0 < 100); 9110#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9109#L10-2 assume !!(main_~i~0 < 100); 9108#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9107#L10-2 assume !!(main_~i~0 < 100); 9106#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9105#L10-2 assume !!(main_~i~0 < 100); 9104#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9103#L10-2 assume !!(main_~i~0 < 100); 9102#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9101#L10-2 assume !!(main_~i~0 < 100); 9100#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9099#L10-2 assume !!(main_~i~0 < 100); 9098#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9097#L10-2 assume !!(main_~i~0 < 100); 9096#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9095#L10-2 assume !!(main_~i~0 < 100); 9094#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9093#L10-2 assume !!(main_~i~0 < 100); 9092#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9091#L10-2 assume !!(main_~i~0 < 100); 9090#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9089#L10-2 assume !!(main_~i~0 < 100); 9088#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9087#L10-2 assume !!(main_~i~0 < 100); 9086#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9085#L10-2 assume !!(main_~i~0 < 100); 9084#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9083#L10-2 assume !!(main_~i~0 < 100); 9082#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9081#L10-2 assume !!(main_~i~0 < 100); 9080#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9079#L10-2 assume !!(main_~i~0 < 100); 9077#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9076#L10-2 assume !!(main_~i~0 < 100); 9075#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9074#L10-2 assume !!(main_~i~0 < 100); 9071#L10 [2021-10-28 23:15:33,832 INFO L793 eck$LassoCheckResult]: Loop: 9071#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 9072#L10-2 assume !!(main_~i~0 < 100); 9075#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9074#L10-2 assume !!(main_~i~0 < 100); 9071#L10 [2021-10-28 23:15:33,832 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:33,832 INFO L85 PathProgramCache]: Analyzing trace with hash 2126241435, now seen corresponding path program 37 times [2021-10-28 23:15:33,832 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:33,833 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [260356094] [2021-10-28 23:15:33,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:33,833 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:33,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:33,849 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:33,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:33,863 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:33,864 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:33,864 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 35 times [2021-10-28 23:15:33,864 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:33,864 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1968910574] [2021-10-28 23:15:33,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:33,865 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:33,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:33,872 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:33,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:33,874 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:33,874 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:33,875 INFO L85 PathProgramCache]: Analyzing trace with hash -366210605, now seen corresponding path program 37 times [2021-10-28 23:15:33,875 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:33,875 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1732202094] [2021-10-28 23:15:33,875 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:33,875 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:33,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:34,669 INFO L134 CoverageAnalysis]: Checked inductivity of 1521 backedges. 114 proven. 1406 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:34,669 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:34,669 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1732202094] [2021-10-28 23:15:34,669 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1732202094] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:34,669 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [893787639] [2021-10-28 23:15:34,669 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-10-28 23:15:34,669 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:34,670 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:34,672 INFO L229 MonitoredProcess]: Starting monitored process 59 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:34,673 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (59)] Waiting until timeout for monitored process [2021-10-28 23:15:35,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:35,302 INFO L263 TraceCheckSpWp]: Trace formula consists of 161 conjuncts, 39 conjunts are in the unsatisfiable core [2021-10-28 23:15:35,304 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:35,563 INFO L134 CoverageAnalysis]: Checked inductivity of 1521 backedges. 114 proven. 1406 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:35,564 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [893787639] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:35,564 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:35,564 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39] total 39 [2021-10-28 23:15:35,564 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1272376706] [2021-10-28 23:15:35,594 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:35,594 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2021-10-28 23:15:35,595 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=780, Invalid=780, Unknown=0, NotChecked=0, Total=1560 [2021-10-28 23:15:35,596 INFO L87 Difference]: Start difference. First operand 79 states and 81 transitions. cyclomatic complexity: 3 Second operand has 40 states, 40 states have (on average 1.975) internal successors, (79), 39 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:35,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:35,696 INFO L93 Difference]: Finished difference Result 83 states and 85 transitions. [2021-10-28 23:15:35,696 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2021-10-28 23:15:35,696 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 83 states and 85 transitions. [2021-10-28 23:15:35,697 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:35,698 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 83 states to 82 states and 84 transitions. [2021-10-28 23:15:35,699 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:35,699 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:35,699 INFO L73 IsDeterministic]: Start isDeterministic. Operand 82 states and 84 transitions. [2021-10-28 23:15:35,699 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:35,699 INFO L681 BuchiCegarLoop]: Abstraction has 82 states and 84 transitions. [2021-10-28 23:15:35,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states and 84 transitions. [2021-10-28 23:15:35,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 81. [2021-10-28 23:15:35,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 81 states, 81 states have (on average 1.0246913580246915) internal successors, (83), 80 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:35,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 83 transitions. [2021-10-28 23:15:35,702 INFO L704 BuchiCegarLoop]: Abstraction has 81 states and 83 transitions. [2021-10-28 23:15:35,703 INFO L587 BuchiCegarLoop]: Abstraction has 81 states and 83 transitions. [2021-10-28 23:15:35,703 INFO L425 BuchiCegarLoop]: ======== Iteration 40============ [2021-10-28 23:15:35,703 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 81 states and 83 transitions. [2021-10-28 23:15:35,704 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:35,704 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:35,704 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:35,705 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [39, 38, 1] [2021-10-28 23:15:35,705 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:35,706 INFO L791 eck$LassoCheckResult]: Stem: 9514#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 9510#L10-2 assume !!(main_~i~0 < 100); 9511#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9512#L10-2 assume !!(main_~i~0 < 100); 9513#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9517#L10-2 assume !!(main_~i~0 < 100); 9590#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9589#L10-2 assume !!(main_~i~0 < 100); 9588#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9587#L10-2 assume !!(main_~i~0 < 100); 9586#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9585#L10-2 assume !!(main_~i~0 < 100); 9584#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9583#L10-2 assume !!(main_~i~0 < 100); 9582#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9581#L10-2 assume !!(main_~i~0 < 100); 9580#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9579#L10-2 assume !!(main_~i~0 < 100); 9578#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9577#L10-2 assume !!(main_~i~0 < 100); 9576#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9575#L10-2 assume !!(main_~i~0 < 100); 9574#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9573#L10-2 assume !!(main_~i~0 < 100); 9572#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9571#L10-2 assume !!(main_~i~0 < 100); 9570#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9569#L10-2 assume !!(main_~i~0 < 100); 9568#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9567#L10-2 assume !!(main_~i~0 < 100); 9566#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9565#L10-2 assume !!(main_~i~0 < 100); 9564#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9563#L10-2 assume !!(main_~i~0 < 100); 9562#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9561#L10-2 assume !!(main_~i~0 < 100); 9560#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9559#L10-2 assume !!(main_~i~0 < 100); 9558#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9557#L10-2 assume !!(main_~i~0 < 100); 9556#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9555#L10-2 assume !!(main_~i~0 < 100); 9554#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9553#L10-2 assume !!(main_~i~0 < 100); 9552#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9551#L10-2 assume !!(main_~i~0 < 100); 9550#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9549#L10-2 assume !!(main_~i~0 < 100); 9548#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9547#L10-2 assume !!(main_~i~0 < 100); 9546#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9545#L10-2 assume !!(main_~i~0 < 100); 9544#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9543#L10-2 assume !!(main_~i~0 < 100); 9542#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9541#L10-2 assume !!(main_~i~0 < 100); 9540#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9539#L10-2 assume !!(main_~i~0 < 100); 9538#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9537#L10-2 assume !!(main_~i~0 < 100); 9536#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9535#L10-2 assume !!(main_~i~0 < 100); 9534#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9533#L10-2 assume !!(main_~i~0 < 100); 9532#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9531#L10-2 assume !!(main_~i~0 < 100); 9530#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9529#L10-2 assume !!(main_~i~0 < 100); 9528#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9527#L10-2 assume !!(main_~i~0 < 100); 9526#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9525#L10-2 assume !!(main_~i~0 < 100); 9524#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9523#L10-2 assume !!(main_~i~0 < 100); 9521#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9520#L10-2 assume !!(main_~i~0 < 100); 9519#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9518#L10-2 assume !!(main_~i~0 < 100); 9515#L10 [2021-10-28 23:15:35,706 INFO L793 eck$LassoCheckResult]: Loop: 9515#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 9516#L10-2 assume !!(main_~i~0 < 100); 9519#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9518#L10-2 assume !!(main_~i~0 < 100); 9515#L10 [2021-10-28 23:15:35,706 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:35,706 INFO L85 PathProgramCache]: Analyzing trace with hash -1086413448, now seen corresponding path program 38 times [2021-10-28 23:15:35,707 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:35,707 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1217723153] [2021-10-28 23:15:35,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:35,707 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:35,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:35,729 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:35,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:35,743 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:35,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:35,744 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 36 times [2021-10-28 23:15:35,744 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:35,744 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1288948199] [2021-10-28 23:15:35,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:35,744 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:35,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:35,797 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:35,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:35,798 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:35,798 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:35,798 INFO L85 PathProgramCache]: Analyzing trace with hash 201728560, now seen corresponding path program 38 times [2021-10-28 23:15:35,798 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:35,799 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2038328973] [2021-10-28 23:15:35,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:35,799 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:35,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:36,720 INFO L134 CoverageAnalysis]: Checked inductivity of 1600 backedges. 117 proven. 1482 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:36,720 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:36,720 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2038328973] [2021-10-28 23:15:36,720 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2038328973] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:36,720 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [718754257] [2021-10-28 23:15:36,720 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-10-28 23:15:36,720 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:36,721 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:36,722 INFO L229 MonitoredProcess]: Starting monitored process 60 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:36,723 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (60)] Waiting until timeout for monitored process [2021-10-28 23:15:37,376 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-10-28 23:15:37,376 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:37,377 INFO L263 TraceCheckSpWp]: Trace formula consists of 165 conjuncts, 40 conjunts are in the unsatisfiable core [2021-10-28 23:15:37,378 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:37,706 INFO L134 CoverageAnalysis]: Checked inductivity of 1600 backedges. 117 proven. 1482 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:37,706 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [718754257] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:37,707 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:37,707 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40] total 40 [2021-10-28 23:15:37,707 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1054917510] [2021-10-28 23:15:37,732 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:37,733 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2021-10-28 23:15:37,734 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=820, Invalid=820, Unknown=0, NotChecked=0, Total=1640 [2021-10-28 23:15:37,734 INFO L87 Difference]: Start difference. First operand 81 states and 83 transitions. cyclomatic complexity: 3 Second operand has 41 states, 41 states have (on average 1.975609756097561) internal successors, (81), 40 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:37,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:37,865 INFO L93 Difference]: Finished difference Result 85 states and 87 transitions. [2021-10-28 23:15:37,866 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2021-10-28 23:15:37,866 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 85 states and 87 transitions. [2021-10-28 23:15:37,867 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:37,868 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 85 states to 84 states and 86 transitions. [2021-10-28 23:15:37,868 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:37,868 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:37,869 INFO L73 IsDeterministic]: Start isDeterministic. Operand 84 states and 86 transitions. [2021-10-28 23:15:37,869 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:37,869 INFO L681 BuchiCegarLoop]: Abstraction has 84 states and 86 transitions. [2021-10-28 23:15:37,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states and 86 transitions. [2021-10-28 23:15:37,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 83. [2021-10-28 23:15:37,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 83 states have (on average 1.0240963855421688) internal successors, (85), 82 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:37,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 85 transitions. [2021-10-28 23:15:37,872 INFO L704 BuchiCegarLoop]: Abstraction has 83 states and 85 transitions. [2021-10-28 23:15:37,872 INFO L587 BuchiCegarLoop]: Abstraction has 83 states and 85 transitions. [2021-10-28 23:15:37,873 INFO L425 BuchiCegarLoop]: ======== Iteration 41============ [2021-10-28 23:15:37,873 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 83 states and 85 transitions. [2021-10-28 23:15:37,874 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:37,874 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:37,874 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:37,875 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [40, 39, 1] [2021-10-28 23:15:37,875 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:37,876 INFO L791 eck$LassoCheckResult]: Stem: 9969#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 9965#L10-2 assume !!(main_~i~0 < 100); 9966#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9967#L10-2 assume !!(main_~i~0 < 100); 9968#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9972#L10-2 assume !!(main_~i~0 < 100); 10047#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10046#L10-2 assume !!(main_~i~0 < 100); 10045#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10044#L10-2 assume !!(main_~i~0 < 100); 10043#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10042#L10-2 assume !!(main_~i~0 < 100); 10041#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10040#L10-2 assume !!(main_~i~0 < 100); 10039#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10038#L10-2 assume !!(main_~i~0 < 100); 10037#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10036#L10-2 assume !!(main_~i~0 < 100); 10035#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10034#L10-2 assume !!(main_~i~0 < 100); 10033#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10032#L10-2 assume !!(main_~i~0 < 100); 10031#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10030#L10-2 assume !!(main_~i~0 < 100); 10029#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10028#L10-2 assume !!(main_~i~0 < 100); 10027#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10026#L10-2 assume !!(main_~i~0 < 100); 10025#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10024#L10-2 assume !!(main_~i~0 < 100); 10023#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10022#L10-2 assume !!(main_~i~0 < 100); 10021#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10020#L10-2 assume !!(main_~i~0 < 100); 10019#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10018#L10-2 assume !!(main_~i~0 < 100); 10017#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10016#L10-2 assume !!(main_~i~0 < 100); 10015#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10014#L10-2 assume !!(main_~i~0 < 100); 10013#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10012#L10-2 assume !!(main_~i~0 < 100); 10011#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10010#L10-2 assume !!(main_~i~0 < 100); 10009#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10008#L10-2 assume !!(main_~i~0 < 100); 10007#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10006#L10-2 assume !!(main_~i~0 < 100); 10005#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10004#L10-2 assume !!(main_~i~0 < 100); 10003#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10002#L10-2 assume !!(main_~i~0 < 100); 10001#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10000#L10-2 assume !!(main_~i~0 < 100); 9999#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9998#L10-2 assume !!(main_~i~0 < 100); 9997#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9996#L10-2 assume !!(main_~i~0 < 100); 9995#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9994#L10-2 assume !!(main_~i~0 < 100); 9993#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9992#L10-2 assume !!(main_~i~0 < 100); 9991#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9990#L10-2 assume !!(main_~i~0 < 100); 9989#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9988#L10-2 assume !!(main_~i~0 < 100); 9987#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9986#L10-2 assume !!(main_~i~0 < 100); 9985#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9984#L10-2 assume !!(main_~i~0 < 100); 9983#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9982#L10-2 assume !!(main_~i~0 < 100); 9981#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9980#L10-2 assume !!(main_~i~0 < 100); 9979#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9978#L10-2 assume !!(main_~i~0 < 100); 9976#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9975#L10-2 assume !!(main_~i~0 < 100); 9974#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9973#L10-2 assume !!(main_~i~0 < 100); 9970#L10 [2021-10-28 23:15:37,876 INFO L793 eck$LassoCheckResult]: Loop: 9970#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 9971#L10-2 assume !!(main_~i~0 < 100); 9974#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9973#L10-2 assume !!(main_~i~0 < 100); 9970#L10 [2021-10-28 23:15:37,876 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:37,876 INFO L85 PathProgramCache]: Analyzing trace with hash -366270187, now seen corresponding path program 39 times [2021-10-28 23:15:37,877 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:37,877 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2023985875] [2021-10-28 23:15:37,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:37,877 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:37,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:37,940 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:37,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:37,956 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:37,956 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:37,957 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 37 times [2021-10-28 23:15:37,957 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:37,957 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [362385270] [2021-10-28 23:15:37,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:37,958 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:37,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:37,972 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:37,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:37,975 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:37,975 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:37,976 INFO L85 PathProgramCache]: Analyzing trace with hash 530419533, now seen corresponding path program 39 times [2021-10-28 23:15:37,976 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:37,976 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [576129749] [2021-10-28 23:15:37,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:37,977 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:38,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:38,737 INFO L134 CoverageAnalysis]: Checked inductivity of 1681 backedges. 120 proven. 1560 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:38,737 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:38,737 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [576129749] [2021-10-28 23:15:38,737 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [576129749] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:38,737 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1284642146] [2021-10-28 23:15:38,737 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-10-28 23:15:38,738 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:38,738 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:38,743 INFO L229 MonitoredProcess]: Starting monitored process 61 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:38,743 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (61)] Waiting until timeout for monitored process [2021-10-28 23:15:39,356 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 42 check-sat command(s) [2021-10-28 23:15:39,356 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:39,357 INFO L263 TraceCheckSpWp]: Trace formula consists of 169 conjuncts, 41 conjunts are in the unsatisfiable core [2021-10-28 23:15:39,358 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:39,647 INFO L134 CoverageAnalysis]: Checked inductivity of 1681 backedges. 120 proven. 1560 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:39,647 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1284642146] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:39,648 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:39,648 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41] total 41 [2021-10-28 23:15:39,648 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [694975647] [2021-10-28 23:15:39,682 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:39,683 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2021-10-28 23:15:39,684 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=861, Invalid=861, Unknown=0, NotChecked=0, Total=1722 [2021-10-28 23:15:39,684 INFO L87 Difference]: Start difference. First operand 83 states and 85 transitions. cyclomatic complexity: 3 Second operand has 42 states, 42 states have (on average 1.9761904761904763) internal successors, (83), 41 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:39,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:39,797 INFO L93 Difference]: Finished difference Result 87 states and 89 transitions. [2021-10-28 23:15:39,797 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2021-10-28 23:15:39,797 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 87 states and 89 transitions. [2021-10-28 23:15:39,798 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:39,799 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 87 states to 86 states and 88 transitions. [2021-10-28 23:15:39,799 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:39,799 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:39,799 INFO L73 IsDeterministic]: Start isDeterministic. Operand 86 states and 88 transitions. [2021-10-28 23:15:39,799 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:39,799 INFO L681 BuchiCegarLoop]: Abstraction has 86 states and 88 transitions. [2021-10-28 23:15:39,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states and 88 transitions. [2021-10-28 23:15:39,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 85. [2021-10-28 23:15:39,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 85 states, 85 states have (on average 1.0235294117647058) internal successors, (87), 84 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:39,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 87 transitions. [2021-10-28 23:15:39,801 INFO L704 BuchiCegarLoop]: Abstraction has 85 states and 87 transitions. [2021-10-28 23:15:39,801 INFO L587 BuchiCegarLoop]: Abstraction has 85 states and 87 transitions. [2021-10-28 23:15:39,801 INFO L425 BuchiCegarLoop]: ======== Iteration 42============ [2021-10-28 23:15:39,801 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 85 states and 87 transitions. [2021-10-28 23:15:39,802 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:39,802 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:39,802 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:39,803 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [41, 40, 1] [2021-10-28 23:15:39,803 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:39,803 INFO L791 eck$LassoCheckResult]: Stem: 10435#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 10431#L10-2 assume !!(main_~i~0 < 100); 10432#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10433#L10-2 assume !!(main_~i~0 < 100); 10434#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10438#L10-2 assume !!(main_~i~0 < 100); 10515#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10514#L10-2 assume !!(main_~i~0 < 100); 10513#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10512#L10-2 assume !!(main_~i~0 < 100); 10511#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10510#L10-2 assume !!(main_~i~0 < 100); 10509#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10508#L10-2 assume !!(main_~i~0 < 100); 10507#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10506#L10-2 assume !!(main_~i~0 < 100); 10505#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10504#L10-2 assume !!(main_~i~0 < 100); 10503#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10502#L10-2 assume !!(main_~i~0 < 100); 10501#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10500#L10-2 assume !!(main_~i~0 < 100); 10499#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10498#L10-2 assume !!(main_~i~0 < 100); 10497#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10496#L10-2 assume !!(main_~i~0 < 100); 10495#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10494#L10-2 assume !!(main_~i~0 < 100); 10493#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10492#L10-2 assume !!(main_~i~0 < 100); 10491#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10490#L10-2 assume !!(main_~i~0 < 100); 10489#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10488#L10-2 assume !!(main_~i~0 < 100); 10487#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10486#L10-2 assume !!(main_~i~0 < 100); 10485#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10484#L10-2 assume !!(main_~i~0 < 100); 10483#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10482#L10-2 assume !!(main_~i~0 < 100); 10481#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10480#L10-2 assume !!(main_~i~0 < 100); 10479#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10478#L10-2 assume !!(main_~i~0 < 100); 10477#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10476#L10-2 assume !!(main_~i~0 < 100); 10475#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10474#L10-2 assume !!(main_~i~0 < 100); 10473#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10472#L10-2 assume !!(main_~i~0 < 100); 10471#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10470#L10-2 assume !!(main_~i~0 < 100); 10469#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10468#L10-2 assume !!(main_~i~0 < 100); 10467#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10466#L10-2 assume !!(main_~i~0 < 100); 10465#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10464#L10-2 assume !!(main_~i~0 < 100); 10463#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10462#L10-2 assume !!(main_~i~0 < 100); 10461#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10460#L10-2 assume !!(main_~i~0 < 100); 10459#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10458#L10-2 assume !!(main_~i~0 < 100); 10457#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10456#L10-2 assume !!(main_~i~0 < 100); 10455#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10454#L10-2 assume !!(main_~i~0 < 100); 10453#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10452#L10-2 assume !!(main_~i~0 < 100); 10451#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10450#L10-2 assume !!(main_~i~0 < 100); 10449#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10448#L10-2 assume !!(main_~i~0 < 100); 10447#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10446#L10-2 assume !!(main_~i~0 < 100); 10445#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10444#L10-2 assume !!(main_~i~0 < 100); 10442#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10441#L10-2 assume !!(main_~i~0 < 100); 10440#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10439#L10-2 assume !!(main_~i~0 < 100); 10436#L10 [2021-10-28 23:15:39,803 INFO L793 eck$LassoCheckResult]: Loop: 10436#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 10437#L10-2 assume !!(main_~i~0 < 100); 10440#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10439#L10-2 assume !!(main_~i~0 < 100); 10436#L10 [2021-10-28 23:15:39,804 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:39,804 INFO L85 PathProgramCache]: Analyzing trace with hash 201668978, now seen corresponding path program 40 times [2021-10-28 23:15:39,804 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:39,804 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1733199017] [2021-10-28 23:15:39,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:39,804 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:39,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:39,824 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:39,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:39,838 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:39,838 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:39,839 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 38 times [2021-10-28 23:15:39,839 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:39,839 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [813167281] [2021-10-28 23:15:39,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:39,839 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:39,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:39,851 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:39,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:39,853 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:39,853 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:39,854 INFO L85 PathProgramCache]: Analyzing trace with hash -1425135318, now seen corresponding path program 40 times [2021-10-28 23:15:39,854 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:39,854 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [916056319] [2021-10-28 23:15:39,854 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:39,854 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:39,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:40,691 INFO L134 CoverageAnalysis]: Checked inductivity of 1764 backedges. 123 proven. 1640 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:40,692 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:40,692 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [916056319] [2021-10-28 23:15:40,692 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [916056319] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:40,692 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1494857361] [2021-10-28 23:15:40,693 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-10-28 23:15:40,693 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:40,693 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:40,695 INFO L229 MonitoredProcess]: Starting monitored process 62 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:40,695 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (62)] Waiting until timeout for monitored process [2021-10-28 23:15:41,313 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-10-28 23:15:41,313 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:41,315 INFO L263 TraceCheckSpWp]: Trace formula consists of 173 conjuncts, 42 conjunts are in the unsatisfiable core [2021-10-28 23:15:41,316 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:41,578 INFO L134 CoverageAnalysis]: Checked inductivity of 1764 backedges. 123 proven. 1640 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:41,578 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1494857361] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:41,579 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:41,579 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42] total 42 [2021-10-28 23:15:41,579 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1176815799] [2021-10-28 23:15:41,605 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:41,606 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2021-10-28 23:15:41,607 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=903, Invalid=903, Unknown=0, NotChecked=0, Total=1806 [2021-10-28 23:15:41,607 INFO L87 Difference]: Start difference. First operand 85 states and 87 transitions. cyclomatic complexity: 3 Second operand has 43 states, 43 states have (on average 1.9767441860465116) internal successors, (85), 42 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:41,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:41,731 INFO L93 Difference]: Finished difference Result 89 states and 91 transitions. [2021-10-28 23:15:41,732 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2021-10-28 23:15:41,732 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 89 states and 91 transitions. [2021-10-28 23:15:41,733 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:41,734 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 89 states to 88 states and 90 transitions. [2021-10-28 23:15:41,734 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:41,734 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:41,734 INFO L73 IsDeterministic]: Start isDeterministic. Operand 88 states and 90 transitions. [2021-10-28 23:15:41,735 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:41,735 INFO L681 BuchiCegarLoop]: Abstraction has 88 states and 90 transitions. [2021-10-28 23:15:41,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states and 90 transitions. [2021-10-28 23:15:41,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 87. [2021-10-28 23:15:41,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 87 states, 87 states have (on average 1.0229885057471264) internal successors, (89), 86 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:41,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 89 transitions. [2021-10-28 23:15:41,738 INFO L704 BuchiCegarLoop]: Abstraction has 87 states and 89 transitions. [2021-10-28 23:15:41,738 INFO L587 BuchiCegarLoop]: Abstraction has 87 states and 89 transitions. [2021-10-28 23:15:41,738 INFO L425 BuchiCegarLoop]: ======== Iteration 43============ [2021-10-28 23:15:41,738 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 87 states and 89 transitions. [2021-10-28 23:15:41,739 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:41,739 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:41,739 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:41,740 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [42, 41, 1] [2021-10-28 23:15:41,740 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:41,740 INFO L791 eck$LassoCheckResult]: Stem: 10912#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 10908#L10-2 assume !!(main_~i~0 < 100); 10909#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10910#L10-2 assume !!(main_~i~0 < 100); 10911#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10915#L10-2 assume !!(main_~i~0 < 100); 10994#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10993#L10-2 assume !!(main_~i~0 < 100); 10992#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10991#L10-2 assume !!(main_~i~0 < 100); 10990#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10989#L10-2 assume !!(main_~i~0 < 100); 10988#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10987#L10-2 assume !!(main_~i~0 < 100); 10986#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10985#L10-2 assume !!(main_~i~0 < 100); 10984#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10983#L10-2 assume !!(main_~i~0 < 100); 10982#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10981#L10-2 assume !!(main_~i~0 < 100); 10980#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10979#L10-2 assume !!(main_~i~0 < 100); 10978#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10977#L10-2 assume !!(main_~i~0 < 100); 10976#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10975#L10-2 assume !!(main_~i~0 < 100); 10974#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10973#L10-2 assume !!(main_~i~0 < 100); 10972#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10971#L10-2 assume !!(main_~i~0 < 100); 10970#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10969#L10-2 assume !!(main_~i~0 < 100); 10968#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10967#L10-2 assume !!(main_~i~0 < 100); 10966#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10965#L10-2 assume !!(main_~i~0 < 100); 10964#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10963#L10-2 assume !!(main_~i~0 < 100); 10962#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10961#L10-2 assume !!(main_~i~0 < 100); 10960#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10959#L10-2 assume !!(main_~i~0 < 100); 10958#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10957#L10-2 assume !!(main_~i~0 < 100); 10956#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10955#L10-2 assume !!(main_~i~0 < 100); 10954#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10953#L10-2 assume !!(main_~i~0 < 100); 10952#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10951#L10-2 assume !!(main_~i~0 < 100); 10950#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10949#L10-2 assume !!(main_~i~0 < 100); 10948#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10947#L10-2 assume !!(main_~i~0 < 100); 10946#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10945#L10-2 assume !!(main_~i~0 < 100); 10944#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10943#L10-2 assume !!(main_~i~0 < 100); 10942#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10941#L10-2 assume !!(main_~i~0 < 100); 10940#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10939#L10-2 assume !!(main_~i~0 < 100); 10938#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10937#L10-2 assume !!(main_~i~0 < 100); 10936#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10935#L10-2 assume !!(main_~i~0 < 100); 10934#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10933#L10-2 assume !!(main_~i~0 < 100); 10932#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10931#L10-2 assume !!(main_~i~0 < 100); 10930#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10929#L10-2 assume !!(main_~i~0 < 100); 10928#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10927#L10-2 assume !!(main_~i~0 < 100); 10926#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10925#L10-2 assume !!(main_~i~0 < 100); 10924#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10923#L10-2 assume !!(main_~i~0 < 100); 10922#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10921#L10-2 assume !!(main_~i~0 < 100); 10919#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10918#L10-2 assume !!(main_~i~0 < 100); 10917#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10916#L10-2 assume !!(main_~i~0 < 100); 10913#L10 [2021-10-28 23:15:41,740 INFO L793 eck$LassoCheckResult]: Loop: 10913#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 10914#L10-2 assume !!(main_~i~0 < 100); 10917#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10916#L10-2 assume !!(main_~i~0 < 100); 10913#L10 [2021-10-28 23:15:41,740 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:41,741 INFO L85 PathProgramCache]: Analyzing trace with hash 530359951, now seen corresponding path program 41 times [2021-10-28 23:15:41,741 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:41,742 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1330704736] [2021-10-28 23:15:41,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:41,743 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:41,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:41,759 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:41,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:41,770 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:41,771 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:41,771 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 39 times [2021-10-28 23:15:41,771 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:41,771 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [528903847] [2021-10-28 23:15:41,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:41,772 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:41,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:41,782 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:41,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:41,783 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:41,784 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:41,784 INFO L85 PathProgramCache]: Analyzing trace with hash 482328519, now seen corresponding path program 41 times [2021-10-28 23:15:41,784 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:41,784 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1718796179] [2021-10-28 23:15:41,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:41,785 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:41,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:42,634 INFO L134 CoverageAnalysis]: Checked inductivity of 1849 backedges. 126 proven. 1722 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:42,635 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:42,635 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1718796179] [2021-10-28 23:15:42,635 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1718796179] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:42,635 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1798146943] [2021-10-28 23:15:42,635 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-10-28 23:15:42,635 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:42,635 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:42,636 INFO L229 MonitoredProcess]: Starting monitored process 63 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:42,638 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (63)] Waiting until timeout for monitored process [2021-10-28 23:15:43,305 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 44 check-sat command(s) [2021-10-28 23:15:43,305 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:43,307 INFO L263 TraceCheckSpWp]: Trace formula consists of 177 conjuncts, 43 conjunts are in the unsatisfiable core [2021-10-28 23:15:43,309 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:43,597 INFO L134 CoverageAnalysis]: Checked inductivity of 1849 backedges. 126 proven. 1722 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:43,597 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1798146943] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:43,598 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:43,598 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 43] total 43 [2021-10-28 23:15:43,598 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [78304816] [2021-10-28 23:15:43,625 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:43,626 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2021-10-28 23:15:43,627 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=946, Invalid=946, Unknown=0, NotChecked=0, Total=1892 [2021-10-28 23:15:43,627 INFO L87 Difference]: Start difference. First operand 87 states and 89 transitions. cyclomatic complexity: 3 Second operand has 44 states, 44 states have (on average 1.9772727272727273) internal successors, (87), 43 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:43,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:43,727 INFO L93 Difference]: Finished difference Result 91 states and 93 transitions. [2021-10-28 23:15:43,727 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2021-10-28 23:15:43,727 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 91 states and 93 transitions. [2021-10-28 23:15:43,728 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:43,728 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 91 states to 90 states and 92 transitions. [2021-10-28 23:15:43,728 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:43,728 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:43,728 INFO L73 IsDeterministic]: Start isDeterministic. Operand 90 states and 92 transitions. [2021-10-28 23:15:43,729 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:43,729 INFO L681 BuchiCegarLoop]: Abstraction has 90 states and 92 transitions. [2021-10-28 23:15:43,729 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states and 92 transitions. [2021-10-28 23:15:43,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 89. [2021-10-28 23:15:43,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 89 states, 89 states have (on average 1.0224719101123596) internal successors, (91), 88 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:43,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 91 transitions. [2021-10-28 23:15:43,730 INFO L704 BuchiCegarLoop]: Abstraction has 89 states and 91 transitions. [2021-10-28 23:15:43,730 INFO L587 BuchiCegarLoop]: Abstraction has 89 states and 91 transitions. [2021-10-28 23:15:43,730 INFO L425 BuchiCegarLoop]: ======== Iteration 44============ [2021-10-28 23:15:43,731 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 89 states and 91 transitions. [2021-10-28 23:15:43,731 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:43,731 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:43,731 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:43,732 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [43, 42, 1] [2021-10-28 23:15:43,732 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:43,733 INFO L791 eck$LassoCheckResult]: Stem: 11400#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 11396#L10-2 assume !!(main_~i~0 < 100); 11397#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11398#L10-2 assume !!(main_~i~0 < 100); 11399#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11403#L10-2 assume !!(main_~i~0 < 100); 11484#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11483#L10-2 assume !!(main_~i~0 < 100); 11482#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11481#L10-2 assume !!(main_~i~0 < 100); 11480#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11479#L10-2 assume !!(main_~i~0 < 100); 11478#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11477#L10-2 assume !!(main_~i~0 < 100); 11476#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11475#L10-2 assume !!(main_~i~0 < 100); 11474#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11473#L10-2 assume !!(main_~i~0 < 100); 11472#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11471#L10-2 assume !!(main_~i~0 < 100); 11470#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11469#L10-2 assume !!(main_~i~0 < 100); 11468#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11467#L10-2 assume !!(main_~i~0 < 100); 11466#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11465#L10-2 assume !!(main_~i~0 < 100); 11464#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11463#L10-2 assume !!(main_~i~0 < 100); 11462#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11461#L10-2 assume !!(main_~i~0 < 100); 11460#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11459#L10-2 assume !!(main_~i~0 < 100); 11458#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11457#L10-2 assume !!(main_~i~0 < 100); 11456#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11455#L10-2 assume !!(main_~i~0 < 100); 11454#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11453#L10-2 assume !!(main_~i~0 < 100); 11452#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11451#L10-2 assume !!(main_~i~0 < 100); 11450#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11449#L10-2 assume !!(main_~i~0 < 100); 11448#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11447#L10-2 assume !!(main_~i~0 < 100); 11446#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11445#L10-2 assume !!(main_~i~0 < 100); 11444#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11443#L10-2 assume !!(main_~i~0 < 100); 11442#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11441#L10-2 assume !!(main_~i~0 < 100); 11440#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11439#L10-2 assume !!(main_~i~0 < 100); 11438#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11437#L10-2 assume !!(main_~i~0 < 100); 11436#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11435#L10-2 assume !!(main_~i~0 < 100); 11434#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11433#L10-2 assume !!(main_~i~0 < 100); 11432#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11431#L10-2 assume !!(main_~i~0 < 100); 11430#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11429#L10-2 assume !!(main_~i~0 < 100); 11428#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11427#L10-2 assume !!(main_~i~0 < 100); 11426#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11425#L10-2 assume !!(main_~i~0 < 100); 11424#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11423#L10-2 assume !!(main_~i~0 < 100); 11422#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11421#L10-2 assume !!(main_~i~0 < 100); 11420#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11419#L10-2 assume !!(main_~i~0 < 100); 11418#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11417#L10-2 assume !!(main_~i~0 < 100); 11416#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11415#L10-2 assume !!(main_~i~0 < 100); 11414#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11413#L10-2 assume !!(main_~i~0 < 100); 11412#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11411#L10-2 assume !!(main_~i~0 < 100); 11410#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11409#L10-2 assume !!(main_~i~0 < 100); 11407#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11406#L10-2 assume !!(main_~i~0 < 100); 11405#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11404#L10-2 assume !!(main_~i~0 < 100); 11401#L10 [2021-10-28 23:15:43,733 INFO L793 eck$LassoCheckResult]: Loop: 11401#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 11402#L10-2 assume !!(main_~i~0 < 100); 11405#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11404#L10-2 assume !!(main_~i~0 < 100); 11401#L10 [2021-10-28 23:15:43,733 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:43,733 INFO L85 PathProgramCache]: Analyzing trace with hash -1425194900, now seen corresponding path program 42 times [2021-10-28 23:15:43,733 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:43,733 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1041745839] [2021-10-28 23:15:43,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:43,734 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:43,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:43,748 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:43,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:43,759 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:43,760 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:43,760 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 40 times [2021-10-28 23:15:43,760 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:43,760 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1554229805] [2021-10-28 23:15:43,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:43,761 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:43,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:43,768 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:43,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:43,770 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:43,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:43,771 INFO L85 PathProgramCache]: Analyzing trace with hash -395959516, now seen corresponding path program 42 times [2021-10-28 23:15:43,771 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:43,771 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2041800008] [2021-10-28 23:15:43,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:43,771 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:43,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:44,639 INFO L134 CoverageAnalysis]: Checked inductivity of 1936 backedges. 129 proven. 1806 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:44,640 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:44,640 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2041800008] [2021-10-28 23:15:44,640 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2041800008] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:44,640 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1786993742] [2021-10-28 23:15:44,640 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-10-28 23:15:44,641 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:44,641 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:44,644 INFO L229 MonitoredProcess]: Starting monitored process 64 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:44,644 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (64)] Waiting until timeout for monitored process [2021-10-28 23:15:45,353 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 45 check-sat command(s) [2021-10-28 23:15:45,354 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:45,355 INFO L263 TraceCheckSpWp]: Trace formula consists of 181 conjuncts, 44 conjunts are in the unsatisfiable core [2021-10-28 23:15:45,356 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:45,674 INFO L134 CoverageAnalysis]: Checked inductivity of 1936 backedges. 129 proven. 1806 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:45,675 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1786993742] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:45,675 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:45,675 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 44] total 44 [2021-10-28 23:15:45,675 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1301517485] [2021-10-28 23:15:45,704 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:45,705 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2021-10-28 23:15:45,706 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=990, Invalid=990, Unknown=0, NotChecked=0, Total=1980 [2021-10-28 23:15:45,706 INFO L87 Difference]: Start difference. First operand 89 states and 91 transitions. cyclomatic complexity: 3 Second operand has 45 states, 45 states have (on average 1.9777777777777779) internal successors, (89), 44 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:45,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:45,803 INFO L93 Difference]: Finished difference Result 93 states and 95 transitions. [2021-10-28 23:15:45,803 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2021-10-28 23:15:45,803 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 93 states and 95 transitions. [2021-10-28 23:15:45,804 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:45,805 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 93 states to 92 states and 94 transitions. [2021-10-28 23:15:45,805 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:45,806 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:45,806 INFO L73 IsDeterministic]: Start isDeterministic. Operand 92 states and 94 transitions. [2021-10-28 23:15:45,806 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:45,806 INFO L681 BuchiCegarLoop]: Abstraction has 92 states and 94 transitions. [2021-10-28 23:15:45,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states and 94 transitions. [2021-10-28 23:15:45,808 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 91. [2021-10-28 23:15:45,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 91 states, 91 states have (on average 1.021978021978022) internal successors, (93), 90 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:45,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 93 transitions. [2021-10-28 23:15:45,809 INFO L704 BuchiCegarLoop]: Abstraction has 91 states and 93 transitions. [2021-10-28 23:15:45,809 INFO L587 BuchiCegarLoop]: Abstraction has 91 states and 93 transitions. [2021-10-28 23:15:45,809 INFO L425 BuchiCegarLoop]: ======== Iteration 45============ [2021-10-28 23:15:45,809 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 91 states and 93 transitions. [2021-10-28 23:15:45,810 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:45,810 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:45,810 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:45,811 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [44, 43, 1] [2021-10-28 23:15:45,811 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:45,811 INFO L791 eck$LassoCheckResult]: Stem: 11899#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 11895#L10-2 assume !!(main_~i~0 < 100); 11896#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11897#L10-2 assume !!(main_~i~0 < 100); 11898#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11902#L10-2 assume !!(main_~i~0 < 100); 11985#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11984#L10-2 assume !!(main_~i~0 < 100); 11983#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11982#L10-2 assume !!(main_~i~0 < 100); 11981#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11980#L10-2 assume !!(main_~i~0 < 100); 11979#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11978#L10-2 assume !!(main_~i~0 < 100); 11977#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11976#L10-2 assume !!(main_~i~0 < 100); 11975#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11974#L10-2 assume !!(main_~i~0 < 100); 11973#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11972#L10-2 assume !!(main_~i~0 < 100); 11971#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11970#L10-2 assume !!(main_~i~0 < 100); 11969#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11968#L10-2 assume !!(main_~i~0 < 100); 11967#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11966#L10-2 assume !!(main_~i~0 < 100); 11965#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11964#L10-2 assume !!(main_~i~0 < 100); 11963#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11962#L10-2 assume !!(main_~i~0 < 100); 11961#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11960#L10-2 assume !!(main_~i~0 < 100); 11959#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11958#L10-2 assume !!(main_~i~0 < 100); 11957#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11956#L10-2 assume !!(main_~i~0 < 100); 11955#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11954#L10-2 assume !!(main_~i~0 < 100); 11953#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11952#L10-2 assume !!(main_~i~0 < 100); 11951#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11950#L10-2 assume !!(main_~i~0 < 100); 11949#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11948#L10-2 assume !!(main_~i~0 < 100); 11947#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11946#L10-2 assume !!(main_~i~0 < 100); 11945#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11944#L10-2 assume !!(main_~i~0 < 100); 11943#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11942#L10-2 assume !!(main_~i~0 < 100); 11941#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11940#L10-2 assume !!(main_~i~0 < 100); 11939#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11938#L10-2 assume !!(main_~i~0 < 100); 11937#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11936#L10-2 assume !!(main_~i~0 < 100); 11935#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11934#L10-2 assume !!(main_~i~0 < 100); 11933#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11932#L10-2 assume !!(main_~i~0 < 100); 11931#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11930#L10-2 assume !!(main_~i~0 < 100); 11929#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11928#L10-2 assume !!(main_~i~0 < 100); 11927#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11926#L10-2 assume !!(main_~i~0 < 100); 11925#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11924#L10-2 assume !!(main_~i~0 < 100); 11923#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11922#L10-2 assume !!(main_~i~0 < 100); 11921#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11920#L10-2 assume !!(main_~i~0 < 100); 11919#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11918#L10-2 assume !!(main_~i~0 < 100); 11917#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11916#L10-2 assume !!(main_~i~0 < 100); 11915#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11914#L10-2 assume !!(main_~i~0 < 100); 11913#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11912#L10-2 assume !!(main_~i~0 < 100); 11911#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11910#L10-2 assume !!(main_~i~0 < 100); 11909#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11908#L10-2 assume !!(main_~i~0 < 100); 11906#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11905#L10-2 assume !!(main_~i~0 < 100); 11904#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11903#L10-2 assume !!(main_~i~0 < 100); 11900#L10 [2021-10-28 23:15:45,812 INFO L793 eck$LassoCheckResult]: Loop: 11900#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 11901#L10-2 assume !!(main_~i~0 < 100); 11904#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11903#L10-2 assume !!(main_~i~0 < 100); 11900#L10 [2021-10-28 23:15:45,812 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:45,812 INFO L85 PathProgramCache]: Analyzing trace with hash 482268937, now seen corresponding path program 43 times [2021-10-28 23:15:45,812 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:45,812 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1009320738] [2021-10-28 23:15:45,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:45,813 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:45,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:45,849 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:45,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:45,861 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:45,861 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:45,862 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 41 times [2021-10-28 23:15:45,862 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:45,862 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [79560564] [2021-10-28 23:15:45,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:45,862 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:45,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:45,873 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:45,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:45,875 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:45,875 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:45,875 INFO L85 PathProgramCache]: Analyzing trace with hash 1677796161, now seen corresponding path program 43 times [2021-10-28 23:15:45,875 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:45,875 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1036362099] [2021-10-28 23:15:45,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:45,876 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:45,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:46,868 INFO L134 CoverageAnalysis]: Checked inductivity of 2025 backedges. 132 proven. 1892 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:46,868 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:46,868 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1036362099] [2021-10-28 23:15:46,868 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1036362099] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:46,868 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1295435062] [2021-10-28 23:15:46,868 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-10-28 23:15:46,869 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:46,869 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:46,870 INFO L229 MonitoredProcess]: Starting monitored process 65 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:46,870 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (65)] Waiting until timeout for monitored process [2021-10-28 23:15:47,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:47,600 INFO L263 TraceCheckSpWp]: Trace formula consists of 185 conjuncts, 45 conjunts are in the unsatisfiable core [2021-10-28 23:15:47,602 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:47,865 INFO L134 CoverageAnalysis]: Checked inductivity of 2025 backedges. 132 proven. 1892 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:47,865 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1295435062] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:47,866 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:47,866 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [45, 45] total 45 [2021-10-28 23:15:47,866 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [831894473] [2021-10-28 23:15:47,888 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:47,889 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2021-10-28 23:15:47,889 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1035, Invalid=1035, Unknown=0, NotChecked=0, Total=2070 [2021-10-28 23:15:47,890 INFO L87 Difference]: Start difference. First operand 91 states and 93 transitions. cyclomatic complexity: 3 Second operand has 46 states, 46 states have (on average 1.9782608695652173) internal successors, (91), 45 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:47,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:47,991 INFO L93 Difference]: Finished difference Result 95 states and 97 transitions. [2021-10-28 23:15:47,992 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2021-10-28 23:15:47,992 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 95 states and 97 transitions. [2021-10-28 23:15:47,993 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:47,993 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 95 states to 94 states and 96 transitions. [2021-10-28 23:15:47,993 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:47,993 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:47,993 INFO L73 IsDeterministic]: Start isDeterministic. Operand 94 states and 96 transitions. [2021-10-28 23:15:47,994 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:47,994 INFO L681 BuchiCegarLoop]: Abstraction has 94 states and 96 transitions. [2021-10-28 23:15:47,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states and 96 transitions. [2021-10-28 23:15:47,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 93. [2021-10-28 23:15:47,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 93 states have (on average 1.021505376344086) internal successors, (95), 92 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:47,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 95 transitions. [2021-10-28 23:15:47,996 INFO L704 BuchiCegarLoop]: Abstraction has 93 states and 95 transitions. [2021-10-28 23:15:47,997 INFO L587 BuchiCegarLoop]: Abstraction has 93 states and 95 transitions. [2021-10-28 23:15:47,997 INFO L425 BuchiCegarLoop]: ======== Iteration 46============ [2021-10-28 23:15:47,997 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 93 states and 95 transitions. [2021-10-28 23:15:47,998 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:47,998 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:47,998 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:47,999 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [45, 44, 1] [2021-10-28 23:15:47,999 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:47,999 INFO L791 eck$LassoCheckResult]: Stem: 12409#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 12405#L10-2 assume !!(main_~i~0 < 100); 12406#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12407#L10-2 assume !!(main_~i~0 < 100); 12408#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12412#L10-2 assume !!(main_~i~0 < 100); 12497#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12496#L10-2 assume !!(main_~i~0 < 100); 12495#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12494#L10-2 assume !!(main_~i~0 < 100); 12493#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12492#L10-2 assume !!(main_~i~0 < 100); 12491#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12490#L10-2 assume !!(main_~i~0 < 100); 12489#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12488#L10-2 assume !!(main_~i~0 < 100); 12487#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12486#L10-2 assume !!(main_~i~0 < 100); 12485#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12484#L10-2 assume !!(main_~i~0 < 100); 12483#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12482#L10-2 assume !!(main_~i~0 < 100); 12481#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12480#L10-2 assume !!(main_~i~0 < 100); 12479#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12478#L10-2 assume !!(main_~i~0 < 100); 12477#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12476#L10-2 assume !!(main_~i~0 < 100); 12475#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12474#L10-2 assume !!(main_~i~0 < 100); 12473#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12472#L10-2 assume !!(main_~i~0 < 100); 12471#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12470#L10-2 assume !!(main_~i~0 < 100); 12469#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12468#L10-2 assume !!(main_~i~0 < 100); 12467#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12466#L10-2 assume !!(main_~i~0 < 100); 12465#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12464#L10-2 assume !!(main_~i~0 < 100); 12463#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12462#L10-2 assume !!(main_~i~0 < 100); 12461#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12460#L10-2 assume !!(main_~i~0 < 100); 12459#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12458#L10-2 assume !!(main_~i~0 < 100); 12457#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12456#L10-2 assume !!(main_~i~0 < 100); 12455#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12454#L10-2 assume !!(main_~i~0 < 100); 12453#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12452#L10-2 assume !!(main_~i~0 < 100); 12451#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12450#L10-2 assume !!(main_~i~0 < 100); 12449#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12448#L10-2 assume !!(main_~i~0 < 100); 12447#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12446#L10-2 assume !!(main_~i~0 < 100); 12445#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12444#L10-2 assume !!(main_~i~0 < 100); 12443#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12442#L10-2 assume !!(main_~i~0 < 100); 12441#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12440#L10-2 assume !!(main_~i~0 < 100); 12439#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12438#L10-2 assume !!(main_~i~0 < 100); 12437#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12436#L10-2 assume !!(main_~i~0 < 100); 12435#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12434#L10-2 assume !!(main_~i~0 < 100); 12433#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12432#L10-2 assume !!(main_~i~0 < 100); 12431#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12430#L10-2 assume !!(main_~i~0 < 100); 12429#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12428#L10-2 assume !!(main_~i~0 < 100); 12427#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12426#L10-2 assume !!(main_~i~0 < 100); 12425#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12424#L10-2 assume !!(main_~i~0 < 100); 12423#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12422#L10-2 assume !!(main_~i~0 < 100); 12421#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12420#L10-2 assume !!(main_~i~0 < 100); 12419#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12418#L10-2 assume !!(main_~i~0 < 100); 12416#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12415#L10-2 assume !!(main_~i~0 < 100); 12414#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12413#L10-2 assume !!(main_~i~0 < 100); 12410#L10 [2021-10-28 23:15:47,999 INFO L793 eck$LassoCheckResult]: Loop: 12410#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 12411#L10-2 assume !!(main_~i~0 < 100); 12414#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12413#L10-2 assume !!(main_~i~0 < 100); 12410#L10 [2021-10-28 23:15:48,000 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:48,000 INFO L85 PathProgramCache]: Analyzing trace with hash -396019098, now seen corresponding path program 44 times [2021-10-28 23:15:48,000 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:48,000 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [681548977] [2021-10-28 23:15:48,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:48,000 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:48,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:48,021 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:48,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:48,035 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:48,035 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:48,035 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 42 times [2021-10-28 23:15:48,036 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:48,036 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [155661500] [2021-10-28 23:15:48,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:48,036 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:48,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:48,050 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:48,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:48,052 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:48,053 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:48,054 INFO L85 PathProgramCache]: Analyzing trace with hash 1692176414, now seen corresponding path program 44 times [2021-10-28 23:15:48,054 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:48,054 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1228762262] [2021-10-28 23:15:48,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:48,054 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:48,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:49,108 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 135 proven. 1980 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:49,108 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:49,108 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1228762262] [2021-10-28 23:15:49,109 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1228762262] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:49,109 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [387861922] [2021-10-28 23:15:49,109 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-10-28 23:15:49,109 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:49,109 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:49,121 INFO L229 MonitoredProcess]: Starting monitored process 66 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:49,143 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (66)] Waiting until timeout for monitored process [2021-10-28 23:15:49,866 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-10-28 23:15:49,867 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:49,868 INFO L263 TraceCheckSpWp]: Trace formula consists of 189 conjuncts, 46 conjunts are in the unsatisfiable core [2021-10-28 23:15:49,869 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:50,161 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 135 proven. 1980 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:50,161 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [387861922] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:50,161 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:50,165 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 46] total 46 [2021-10-28 23:15:50,165 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [609038094] [2021-10-28 23:15:50,186 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:50,187 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2021-10-28 23:15:50,187 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1081, Invalid=1081, Unknown=0, NotChecked=0, Total=2162 [2021-10-28 23:15:50,188 INFO L87 Difference]: Start difference. First operand 93 states and 95 transitions. cyclomatic complexity: 3 Second operand has 47 states, 47 states have (on average 1.9787234042553192) internal successors, (93), 46 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:50,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:50,291 INFO L93 Difference]: Finished difference Result 97 states and 99 transitions. [2021-10-28 23:15:50,291 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2021-10-28 23:15:50,291 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 97 states and 99 transitions. [2021-10-28 23:15:50,292 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:50,293 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 97 states to 96 states and 98 transitions. [2021-10-28 23:15:50,293 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:50,293 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:50,293 INFO L73 IsDeterministic]: Start isDeterministic. Operand 96 states and 98 transitions. [2021-10-28 23:15:50,293 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:50,294 INFO L681 BuchiCegarLoop]: Abstraction has 96 states and 98 transitions. [2021-10-28 23:15:50,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states and 98 transitions. [2021-10-28 23:15:50,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 95. [2021-10-28 23:15:50,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 95 states have (on average 1.0210526315789474) internal successors, (97), 94 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:50,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 97 transitions. [2021-10-28 23:15:50,297 INFO L704 BuchiCegarLoop]: Abstraction has 95 states and 97 transitions. [2021-10-28 23:15:50,297 INFO L587 BuchiCegarLoop]: Abstraction has 95 states and 97 transitions. [2021-10-28 23:15:50,297 INFO L425 BuchiCegarLoop]: ======== Iteration 47============ [2021-10-28 23:15:50,297 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 95 states and 97 transitions. [2021-10-28 23:15:50,298 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:50,298 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:50,298 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:50,299 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [46, 45, 1] [2021-10-28 23:15:50,299 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:50,300 INFO L791 eck$LassoCheckResult]: Stem: 12930#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 12926#L10-2 assume !!(main_~i~0 < 100); 12927#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12928#L10-2 assume !!(main_~i~0 < 100); 12929#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12933#L10-2 assume !!(main_~i~0 < 100); 13020#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13019#L10-2 assume !!(main_~i~0 < 100); 13018#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13017#L10-2 assume !!(main_~i~0 < 100); 13016#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13015#L10-2 assume !!(main_~i~0 < 100); 13014#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13013#L10-2 assume !!(main_~i~0 < 100); 13012#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13011#L10-2 assume !!(main_~i~0 < 100); 13010#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13009#L10-2 assume !!(main_~i~0 < 100); 13008#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13007#L10-2 assume !!(main_~i~0 < 100); 13006#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13005#L10-2 assume !!(main_~i~0 < 100); 13004#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13003#L10-2 assume !!(main_~i~0 < 100); 13002#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13001#L10-2 assume !!(main_~i~0 < 100); 13000#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12999#L10-2 assume !!(main_~i~0 < 100); 12998#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12997#L10-2 assume !!(main_~i~0 < 100); 12996#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12995#L10-2 assume !!(main_~i~0 < 100); 12994#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12993#L10-2 assume !!(main_~i~0 < 100); 12992#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12991#L10-2 assume !!(main_~i~0 < 100); 12990#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12989#L10-2 assume !!(main_~i~0 < 100); 12988#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12987#L10-2 assume !!(main_~i~0 < 100); 12986#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12985#L10-2 assume !!(main_~i~0 < 100); 12984#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12983#L10-2 assume !!(main_~i~0 < 100); 12982#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12981#L10-2 assume !!(main_~i~0 < 100); 12980#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12979#L10-2 assume !!(main_~i~0 < 100); 12978#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12977#L10-2 assume !!(main_~i~0 < 100); 12976#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12975#L10-2 assume !!(main_~i~0 < 100); 12974#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12973#L10-2 assume !!(main_~i~0 < 100); 12972#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12971#L10-2 assume !!(main_~i~0 < 100); 12970#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12969#L10-2 assume !!(main_~i~0 < 100); 12968#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12967#L10-2 assume !!(main_~i~0 < 100); 12966#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12965#L10-2 assume !!(main_~i~0 < 100); 12964#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12963#L10-2 assume !!(main_~i~0 < 100); 12962#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12961#L10-2 assume !!(main_~i~0 < 100); 12960#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12959#L10-2 assume !!(main_~i~0 < 100); 12958#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12957#L10-2 assume !!(main_~i~0 < 100); 12956#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12955#L10-2 assume !!(main_~i~0 < 100); 12954#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12953#L10-2 assume !!(main_~i~0 < 100); 12952#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12951#L10-2 assume !!(main_~i~0 < 100); 12950#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12949#L10-2 assume !!(main_~i~0 < 100); 12948#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12947#L10-2 assume !!(main_~i~0 < 100); 12946#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12945#L10-2 assume !!(main_~i~0 < 100); 12944#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12943#L10-2 assume !!(main_~i~0 < 100); 12942#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12941#L10-2 assume !!(main_~i~0 < 100); 12940#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12939#L10-2 assume !!(main_~i~0 < 100); 12937#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12936#L10-2 assume !!(main_~i~0 < 100); 12935#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12934#L10-2 assume !!(main_~i~0 < 100); 12931#L10 [2021-10-28 23:15:50,300 INFO L793 eck$LassoCheckResult]: Loop: 12931#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 12932#L10-2 assume !!(main_~i~0 < 100); 12935#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12934#L10-2 assume !!(main_~i~0 < 100); 12931#L10 [2021-10-28 23:15:50,300 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:50,300 INFO L85 PathProgramCache]: Analyzing trace with hash 1677736579, now seen corresponding path program 45 times [2021-10-28 23:15:50,301 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:50,306 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1500927595] [2021-10-28 23:15:50,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:50,309 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:50,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:50,329 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:50,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:50,343 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:50,344 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:50,344 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 43 times [2021-10-28 23:15:50,344 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:50,344 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1844442621] [2021-10-28 23:15:50,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:50,344 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:50,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:50,424 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:50,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:50,426 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:50,426 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:50,426 INFO L85 PathProgramCache]: Analyzing trace with hash -1668269637, now seen corresponding path program 45 times [2021-10-28 23:15:50,426 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:50,426 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1142719597] [2021-10-28 23:15:50,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:50,427 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:50,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:51,380 INFO L134 CoverageAnalysis]: Checked inductivity of 2209 backedges. 138 proven. 2070 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:51,380 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:51,380 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1142719597] [2021-10-28 23:15:51,381 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1142719597] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:51,381 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [315174860] [2021-10-28 23:15:51,381 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-10-28 23:15:51,381 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:51,381 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:51,426 INFO L229 MonitoredProcess]: Starting monitored process 67 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:51,427 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (67)] Waiting until timeout for monitored process [2021-10-28 23:15:52,202 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 48 check-sat command(s) [2021-10-28 23:15:52,202 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:52,203 INFO L263 TraceCheckSpWp]: Trace formula consists of 193 conjuncts, 47 conjunts are in the unsatisfiable core [2021-10-28 23:15:52,205 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:52,495 INFO L134 CoverageAnalysis]: Checked inductivity of 2209 backedges. 138 proven. 2070 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:52,495 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [315174860] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:52,495 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:52,495 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 47] total 47 [2021-10-28 23:15:52,496 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1807460761] [2021-10-28 23:15:52,515 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:52,516 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2021-10-28 23:15:52,516 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2021-10-28 23:15:52,517 INFO L87 Difference]: Start difference. First operand 95 states and 97 transitions. cyclomatic complexity: 3 Second operand has 48 states, 48 states have (on average 1.9791666666666667) internal successors, (95), 47 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:52,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:52,617 INFO L93 Difference]: Finished difference Result 99 states and 101 transitions. [2021-10-28 23:15:52,617 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2021-10-28 23:15:52,617 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 99 states and 101 transitions. [2021-10-28 23:15:52,618 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:52,618 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 99 states to 98 states and 100 transitions. [2021-10-28 23:15:52,618 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:52,619 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:52,619 INFO L73 IsDeterministic]: Start isDeterministic. Operand 98 states and 100 transitions. [2021-10-28 23:15:52,619 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:52,619 INFO L681 BuchiCegarLoop]: Abstraction has 98 states and 100 transitions. [2021-10-28 23:15:52,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states and 100 transitions. [2021-10-28 23:15:52,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 97. [2021-10-28 23:15:52,621 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 97 states, 97 states have (on average 1.0206185567010309) internal successors, (99), 96 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:52,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 99 transitions. [2021-10-28 23:15:52,621 INFO L704 BuchiCegarLoop]: Abstraction has 97 states and 99 transitions. [2021-10-28 23:15:52,621 INFO L587 BuchiCegarLoop]: Abstraction has 97 states and 99 transitions. [2021-10-28 23:15:52,621 INFO L425 BuchiCegarLoop]: ======== Iteration 48============ [2021-10-28 23:15:52,622 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 97 states and 99 transitions. [2021-10-28 23:15:52,622 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:52,622 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:52,622 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:52,623 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [47, 46, 1] [2021-10-28 23:15:52,623 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:52,623 INFO L791 eck$LassoCheckResult]: Stem: 13462#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 13458#L10-2 assume !!(main_~i~0 < 100); 13459#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13460#L10-2 assume !!(main_~i~0 < 100); 13461#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13465#L10-2 assume !!(main_~i~0 < 100); 13554#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13553#L10-2 assume !!(main_~i~0 < 100); 13552#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13551#L10-2 assume !!(main_~i~0 < 100); 13550#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13549#L10-2 assume !!(main_~i~0 < 100); 13548#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13547#L10-2 assume !!(main_~i~0 < 100); 13546#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13545#L10-2 assume !!(main_~i~0 < 100); 13544#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13543#L10-2 assume !!(main_~i~0 < 100); 13542#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13541#L10-2 assume !!(main_~i~0 < 100); 13540#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13539#L10-2 assume !!(main_~i~0 < 100); 13538#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13537#L10-2 assume !!(main_~i~0 < 100); 13536#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13535#L10-2 assume !!(main_~i~0 < 100); 13534#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13533#L10-2 assume !!(main_~i~0 < 100); 13532#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13531#L10-2 assume !!(main_~i~0 < 100); 13530#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13529#L10-2 assume !!(main_~i~0 < 100); 13528#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13527#L10-2 assume !!(main_~i~0 < 100); 13526#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13525#L10-2 assume !!(main_~i~0 < 100); 13524#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13523#L10-2 assume !!(main_~i~0 < 100); 13522#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13521#L10-2 assume !!(main_~i~0 < 100); 13520#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13519#L10-2 assume !!(main_~i~0 < 100); 13518#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13517#L10-2 assume !!(main_~i~0 < 100); 13516#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13515#L10-2 assume !!(main_~i~0 < 100); 13514#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13513#L10-2 assume !!(main_~i~0 < 100); 13512#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13511#L10-2 assume !!(main_~i~0 < 100); 13510#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13509#L10-2 assume !!(main_~i~0 < 100); 13508#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13507#L10-2 assume !!(main_~i~0 < 100); 13506#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13505#L10-2 assume !!(main_~i~0 < 100); 13504#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13503#L10-2 assume !!(main_~i~0 < 100); 13502#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13501#L10-2 assume !!(main_~i~0 < 100); 13500#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13499#L10-2 assume !!(main_~i~0 < 100); 13498#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13497#L10-2 assume !!(main_~i~0 < 100); 13496#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13495#L10-2 assume !!(main_~i~0 < 100); 13494#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13493#L10-2 assume !!(main_~i~0 < 100); 13492#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13491#L10-2 assume !!(main_~i~0 < 100); 13490#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13489#L10-2 assume !!(main_~i~0 < 100); 13488#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13487#L10-2 assume !!(main_~i~0 < 100); 13486#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13485#L10-2 assume !!(main_~i~0 < 100); 13484#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13483#L10-2 assume !!(main_~i~0 < 100); 13482#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13481#L10-2 assume !!(main_~i~0 < 100); 13480#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13479#L10-2 assume !!(main_~i~0 < 100); 13478#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13477#L10-2 assume !!(main_~i~0 < 100); 13476#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13475#L10-2 assume !!(main_~i~0 < 100); 13474#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13473#L10-2 assume !!(main_~i~0 < 100); 13472#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13471#L10-2 assume !!(main_~i~0 < 100); 13469#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13468#L10-2 assume !!(main_~i~0 < 100); 13467#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13466#L10-2 assume !!(main_~i~0 < 100); 13463#L10 [2021-10-28 23:15:52,623 INFO L793 eck$LassoCheckResult]: Loop: 13463#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 13464#L10-2 assume !!(main_~i~0 < 100); 13467#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13466#L10-2 assume !!(main_~i~0 < 100); 13463#L10 [2021-10-28 23:15:52,623 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:52,623 INFO L85 PathProgramCache]: Analyzing trace with hash 1692116832, now seen corresponding path program 46 times [2021-10-28 23:15:52,623 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:52,623 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [144148412] [2021-10-28 23:15:52,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:52,624 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:52,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:52,638 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:52,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:52,651 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:52,651 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:52,651 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 44 times [2021-10-28 23:15:52,651 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:52,652 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1758596011] [2021-10-28 23:15:52,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:52,652 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:52,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:52,660 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:52,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:52,662 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:52,662 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:52,662 INFO L85 PathProgramCache]: Analyzing trace with hash -1241518056, now seen corresponding path program 46 times [2021-10-28 23:15:52,663 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:52,663 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [135939644] [2021-10-28 23:15:52,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:52,663 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:52,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:53,834 INFO L134 CoverageAnalysis]: Checked inductivity of 2304 backedges. 141 proven. 2162 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:53,834 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:53,834 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [135939644] [2021-10-28 23:15:53,834 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [135939644] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:53,835 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2116242067] [2021-10-28 23:15:53,835 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-10-28 23:15:53,835 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:53,835 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:53,836 INFO L229 MonitoredProcess]: Starting monitored process 68 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:53,837 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (68)] Waiting until timeout for monitored process [2021-10-28 23:15:54,599 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-10-28 23:15:54,599 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:54,601 INFO L263 TraceCheckSpWp]: Trace formula consists of 197 conjuncts, 48 conjunts are in the unsatisfiable core [2021-10-28 23:15:54,602 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:54,937 INFO L134 CoverageAnalysis]: Checked inductivity of 2304 backedges. 141 proven. 2162 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:54,937 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2116242067] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:54,938 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:54,938 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48] total 48 [2021-10-28 23:15:54,938 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1074384757] [2021-10-28 23:15:54,972 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:54,973 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2021-10-28 23:15:54,974 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2021-10-28 23:15:54,974 INFO L87 Difference]: Start difference. First operand 97 states and 99 transitions. cyclomatic complexity: 3 Second operand has 49 states, 49 states have (on average 1.9795918367346939) internal successors, (97), 48 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:55,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:55,077 INFO L93 Difference]: Finished difference Result 101 states and 103 transitions. [2021-10-28 23:15:55,077 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2021-10-28 23:15:55,077 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 103 transitions. [2021-10-28 23:15:55,082 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:55,083 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 100 states and 102 transitions. [2021-10-28 23:15:55,083 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:55,083 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:55,083 INFO L73 IsDeterministic]: Start isDeterministic. Operand 100 states and 102 transitions. [2021-10-28 23:15:55,083 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:55,083 INFO L681 BuchiCegarLoop]: Abstraction has 100 states and 102 transitions. [2021-10-28 23:15:55,084 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states and 102 transitions. [2021-10-28 23:15:55,085 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 99. [2021-10-28 23:15:55,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 99 states have (on average 1.02020202020202) internal successors, (101), 98 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:55,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 101 transitions. [2021-10-28 23:15:55,086 INFO L704 BuchiCegarLoop]: Abstraction has 99 states and 101 transitions. [2021-10-28 23:15:55,086 INFO L587 BuchiCegarLoop]: Abstraction has 99 states and 101 transitions. [2021-10-28 23:15:55,086 INFO L425 BuchiCegarLoop]: ======== Iteration 49============ [2021-10-28 23:15:55,086 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 99 states and 101 transitions. [2021-10-28 23:15:55,088 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:55,088 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:55,088 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:55,089 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [48, 47, 1] [2021-10-28 23:15:55,089 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:55,089 INFO L791 eck$LassoCheckResult]: Stem: 14005#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 14001#L10-2 assume !!(main_~i~0 < 100); 14002#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14003#L10-2 assume !!(main_~i~0 < 100); 14004#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14008#L10-2 assume !!(main_~i~0 < 100); 14099#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14098#L10-2 assume !!(main_~i~0 < 100); 14097#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14096#L10-2 assume !!(main_~i~0 < 100); 14095#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14094#L10-2 assume !!(main_~i~0 < 100); 14093#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14092#L10-2 assume !!(main_~i~0 < 100); 14091#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14090#L10-2 assume !!(main_~i~0 < 100); 14089#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14088#L10-2 assume !!(main_~i~0 < 100); 14087#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14086#L10-2 assume !!(main_~i~0 < 100); 14085#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14084#L10-2 assume !!(main_~i~0 < 100); 14083#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14082#L10-2 assume !!(main_~i~0 < 100); 14081#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14080#L10-2 assume !!(main_~i~0 < 100); 14079#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14078#L10-2 assume !!(main_~i~0 < 100); 14077#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14076#L10-2 assume !!(main_~i~0 < 100); 14075#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14074#L10-2 assume !!(main_~i~0 < 100); 14073#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14072#L10-2 assume !!(main_~i~0 < 100); 14071#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14070#L10-2 assume !!(main_~i~0 < 100); 14069#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14068#L10-2 assume !!(main_~i~0 < 100); 14067#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14066#L10-2 assume !!(main_~i~0 < 100); 14065#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14064#L10-2 assume !!(main_~i~0 < 100); 14063#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14062#L10-2 assume !!(main_~i~0 < 100); 14061#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14060#L10-2 assume !!(main_~i~0 < 100); 14059#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14058#L10-2 assume !!(main_~i~0 < 100); 14057#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14056#L10-2 assume !!(main_~i~0 < 100); 14055#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14054#L10-2 assume !!(main_~i~0 < 100); 14053#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14052#L10-2 assume !!(main_~i~0 < 100); 14051#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14050#L10-2 assume !!(main_~i~0 < 100); 14049#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14048#L10-2 assume !!(main_~i~0 < 100); 14047#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14046#L10-2 assume !!(main_~i~0 < 100); 14045#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14044#L10-2 assume !!(main_~i~0 < 100); 14043#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14042#L10-2 assume !!(main_~i~0 < 100); 14041#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14040#L10-2 assume !!(main_~i~0 < 100); 14039#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14038#L10-2 assume !!(main_~i~0 < 100); 14037#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14036#L10-2 assume !!(main_~i~0 < 100); 14035#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14034#L10-2 assume !!(main_~i~0 < 100); 14033#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14032#L10-2 assume !!(main_~i~0 < 100); 14031#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14030#L10-2 assume !!(main_~i~0 < 100); 14029#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14028#L10-2 assume !!(main_~i~0 < 100); 14027#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14026#L10-2 assume !!(main_~i~0 < 100); 14025#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14024#L10-2 assume !!(main_~i~0 < 100); 14023#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14022#L10-2 assume !!(main_~i~0 < 100); 14021#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14020#L10-2 assume !!(main_~i~0 < 100); 14019#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14018#L10-2 assume !!(main_~i~0 < 100); 14017#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14016#L10-2 assume !!(main_~i~0 < 100); 14015#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14014#L10-2 assume !!(main_~i~0 < 100); 14012#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14011#L10-2 assume !!(main_~i~0 < 100); 14010#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14009#L10-2 assume !!(main_~i~0 < 100); 14006#L10 [2021-10-28 23:15:55,090 INFO L793 eck$LassoCheckResult]: Loop: 14006#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 14007#L10-2 assume !!(main_~i~0 < 100); 14010#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14009#L10-2 assume !!(main_~i~0 < 100); 14006#L10 [2021-10-28 23:15:55,090 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:55,090 INFO L85 PathProgramCache]: Analyzing trace with hash -1668329219, now seen corresponding path program 47 times [2021-10-28 23:15:55,090 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:55,090 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [255917315] [2021-10-28 23:15:55,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:55,091 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:55,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:55,107 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:55,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:55,118 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:55,119 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:55,119 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 45 times [2021-10-28 23:15:55,119 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:55,119 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [192378886] [2021-10-28 23:15:55,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:55,120 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:55,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:55,128 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:55,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:55,129 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:55,130 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:55,130 INFO L85 PathProgramCache]: Analyzing trace with hash 844858165, now seen corresponding path program 47 times [2021-10-28 23:15:55,130 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:55,130 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [371676170] [2021-10-28 23:15:55,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:55,131 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:55,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:56,274 INFO L134 CoverageAnalysis]: Checked inductivity of 2401 backedges. 144 proven. 2256 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:56,274 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:56,274 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [371676170] [2021-10-28 23:15:56,274 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [371676170] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:56,274 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [734540651] [2021-10-28 23:15:56,274 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-10-28 23:15:56,274 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:56,275 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:56,281 INFO L229 MonitoredProcess]: Starting monitored process 69 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:56,283 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (69)] Waiting until timeout for monitored process [2021-10-28 23:15:57,087 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 50 check-sat command(s) [2021-10-28 23:15:57,087 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:57,089 INFO L263 TraceCheckSpWp]: Trace formula consists of 201 conjuncts, 49 conjunts are in the unsatisfiable core [2021-10-28 23:15:57,090 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:15:57,482 INFO L134 CoverageAnalysis]: Checked inductivity of 2401 backedges. 144 proven. 2256 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:57,482 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [734540651] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:57,482 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:15:57,482 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49] total 49 [2021-10-28 23:15:57,483 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1129957763] [2021-10-28 23:15:57,504 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:15:57,505 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2021-10-28 23:15:57,506 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1225, Invalid=1225, Unknown=0, NotChecked=0, Total=2450 [2021-10-28 23:15:57,506 INFO L87 Difference]: Start difference. First operand 99 states and 101 transitions. cyclomatic complexity: 3 Second operand has 50 states, 50 states have (on average 1.98) internal successors, (99), 49 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:57,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:15:57,605 INFO L93 Difference]: Finished difference Result 103 states and 105 transitions. [2021-10-28 23:15:57,605 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2021-10-28 23:15:57,605 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 103 states and 105 transitions. [2021-10-28 23:15:57,613 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:57,614 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 103 states to 102 states and 104 transitions. [2021-10-28 23:15:57,614 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:15:57,614 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:15:57,614 INFO L73 IsDeterministic]: Start isDeterministic. Operand 102 states and 104 transitions. [2021-10-28 23:15:57,615 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:15:57,615 INFO L681 BuchiCegarLoop]: Abstraction has 102 states and 104 transitions. [2021-10-28 23:15:57,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states and 104 transitions. [2021-10-28 23:15:57,617 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 101. [2021-10-28 23:15:57,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.0198019801980198) internal successors, (103), 100 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:15:57,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 103 transitions. [2021-10-28 23:15:57,618 INFO L704 BuchiCegarLoop]: Abstraction has 101 states and 103 transitions. [2021-10-28 23:15:57,618 INFO L587 BuchiCegarLoop]: Abstraction has 101 states and 103 transitions. [2021-10-28 23:15:57,618 INFO L425 BuchiCegarLoop]: ======== Iteration 50============ [2021-10-28 23:15:57,618 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 103 transitions. [2021-10-28 23:15:57,618 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:15:57,619 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:15:57,619 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:15:57,619 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [49, 48, 1] [2021-10-28 23:15:57,620 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:15:57,620 INFO L791 eck$LassoCheckResult]: Stem: 14559#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 14555#L10-2 assume !!(main_~i~0 < 100); 14556#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14557#L10-2 assume !!(main_~i~0 < 100); 14558#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14562#L10-2 assume !!(main_~i~0 < 100); 14655#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14654#L10-2 assume !!(main_~i~0 < 100); 14653#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14652#L10-2 assume !!(main_~i~0 < 100); 14651#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14650#L10-2 assume !!(main_~i~0 < 100); 14649#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14648#L10-2 assume !!(main_~i~0 < 100); 14647#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14646#L10-2 assume !!(main_~i~0 < 100); 14645#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14644#L10-2 assume !!(main_~i~0 < 100); 14643#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14642#L10-2 assume !!(main_~i~0 < 100); 14641#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14640#L10-2 assume !!(main_~i~0 < 100); 14639#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14638#L10-2 assume !!(main_~i~0 < 100); 14637#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14636#L10-2 assume !!(main_~i~0 < 100); 14635#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14634#L10-2 assume !!(main_~i~0 < 100); 14633#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14632#L10-2 assume !!(main_~i~0 < 100); 14631#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14630#L10-2 assume !!(main_~i~0 < 100); 14629#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14628#L10-2 assume !!(main_~i~0 < 100); 14627#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14626#L10-2 assume !!(main_~i~0 < 100); 14625#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14624#L10-2 assume !!(main_~i~0 < 100); 14623#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14622#L10-2 assume !!(main_~i~0 < 100); 14621#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14620#L10-2 assume !!(main_~i~0 < 100); 14619#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14618#L10-2 assume !!(main_~i~0 < 100); 14617#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14616#L10-2 assume !!(main_~i~0 < 100); 14615#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14614#L10-2 assume !!(main_~i~0 < 100); 14613#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14612#L10-2 assume !!(main_~i~0 < 100); 14611#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14610#L10-2 assume !!(main_~i~0 < 100); 14609#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14608#L10-2 assume !!(main_~i~0 < 100); 14607#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14606#L10-2 assume !!(main_~i~0 < 100); 14605#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14604#L10-2 assume !!(main_~i~0 < 100); 14603#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14602#L10-2 assume !!(main_~i~0 < 100); 14601#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14600#L10-2 assume !!(main_~i~0 < 100); 14599#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14598#L10-2 assume !!(main_~i~0 < 100); 14597#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14596#L10-2 assume !!(main_~i~0 < 100); 14595#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14594#L10-2 assume !!(main_~i~0 < 100); 14593#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14592#L10-2 assume !!(main_~i~0 < 100); 14591#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14590#L10-2 assume !!(main_~i~0 < 100); 14589#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14588#L10-2 assume !!(main_~i~0 < 100); 14587#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14586#L10-2 assume !!(main_~i~0 < 100); 14585#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14584#L10-2 assume !!(main_~i~0 < 100); 14583#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14582#L10-2 assume !!(main_~i~0 < 100); 14581#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14580#L10-2 assume !!(main_~i~0 < 100); 14579#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14578#L10-2 assume !!(main_~i~0 < 100); 14577#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14576#L10-2 assume !!(main_~i~0 < 100); 14575#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14574#L10-2 assume !!(main_~i~0 < 100); 14573#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14572#L10-2 assume !!(main_~i~0 < 100); 14571#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14570#L10-2 assume !!(main_~i~0 < 100); 14569#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14568#L10-2 assume !!(main_~i~0 < 100); 14566#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14565#L10-2 assume !!(main_~i~0 < 100); 14564#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14563#L10-2 assume !!(main_~i~0 < 100); 14560#L10 [2021-10-28 23:15:57,621 INFO L793 eck$LassoCheckResult]: Loop: 14560#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 14561#L10-2 assume !!(main_~i~0 < 100); 14564#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14563#L10-2 assume !!(main_~i~0 < 100); 14560#L10 [2021-10-28 23:15:57,623 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:57,624 INFO L85 PathProgramCache]: Analyzing trace with hash -1241577638, now seen corresponding path program 48 times [2021-10-28 23:15:57,624 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:57,624 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [517084120] [2021-10-28 23:15:57,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:57,625 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:57,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:57,640 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:57,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:57,653 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:57,653 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:57,653 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 46 times [2021-10-28 23:15:57,654 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:57,654 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [288194904] [2021-10-28 23:15:57,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:57,654 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:57,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:57,663 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:15:57,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:15:57,664 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:15:57,664 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:15:57,664 INFO L85 PathProgramCache]: Analyzing trace with hash 102679314, now seen corresponding path program 48 times [2021-10-28 23:15:57,664 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:15:57,665 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [951512091] [2021-10-28 23:15:57,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:15:57,665 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:15:57,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:15:58,865 INFO L134 CoverageAnalysis]: Checked inductivity of 2500 backedges. 147 proven. 2352 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:15:58,866 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:15:58,866 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [951512091] [2021-10-28 23:15:58,866 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [951512091] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:15:58,866 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1358217713] [2021-10-28 23:15:58,866 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-10-28 23:15:58,866 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:15:58,866 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:15:58,869 INFO L229 MonitoredProcess]: Starting monitored process 70 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:15:58,885 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (70)] Waiting until timeout for monitored process [2021-10-28 23:15:59,966 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 51 check-sat command(s) [2021-10-28 23:15:59,966 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-10-28 23:15:59,968 INFO L263 TraceCheckSpWp]: Trace formula consists of 205 conjuncts, 50 conjunts are in the unsatisfiable core [2021-10-28 23:15:59,969 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:16:00,319 INFO L134 CoverageAnalysis]: Checked inductivity of 2500 backedges. 147 proven. 2352 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:16:00,319 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1358217713] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:16:00,319 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:16:00,320 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 50] total 50 [2021-10-28 23:16:00,320 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [71579352] [2021-10-28 23:16:00,360 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:16:00,361 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2021-10-28 23:16:00,362 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1275, Invalid=1275, Unknown=0, NotChecked=0, Total=2550 [2021-10-28 23:16:00,363 INFO L87 Difference]: Start difference. First operand 101 states and 103 transitions. cyclomatic complexity: 3 Second operand has 51 states, 51 states have (on average 1.9803921568627452) internal successors, (101), 50 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:16:00,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:16:00,559 INFO L93 Difference]: Finished difference Result 105 states and 107 transitions. [2021-10-28 23:16:00,560 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2021-10-28 23:16:00,560 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 105 states and 107 transitions. [2021-10-28 23:16:00,561 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:16:00,563 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 105 states to 104 states and 106 transitions. [2021-10-28 23:16:00,563 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:16:00,563 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:16:00,563 INFO L73 IsDeterministic]: Start isDeterministic. Operand 104 states and 106 transitions. [2021-10-28 23:16:00,563 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:16:00,564 INFO L681 BuchiCegarLoop]: Abstraction has 104 states and 106 transitions. [2021-10-28 23:16:00,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states and 106 transitions. [2021-10-28 23:16:00,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 103. [2021-10-28 23:16:00,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 103 states, 103 states have (on average 1.0194174757281553) internal successors, (105), 102 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:16:00,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 105 transitions. [2021-10-28 23:16:00,567 INFO L704 BuchiCegarLoop]: Abstraction has 103 states and 105 transitions. [2021-10-28 23:16:00,567 INFO L587 BuchiCegarLoop]: Abstraction has 103 states and 105 transitions. [2021-10-28 23:16:00,567 INFO L425 BuchiCegarLoop]: ======== Iteration 51============ [2021-10-28 23:16:00,568 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 103 states and 105 transitions. [2021-10-28 23:16:00,568 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:16:00,568 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:16:00,569 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:16:00,570 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [50, 49, 1] [2021-10-28 23:16:00,570 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:16:00,570 INFO L791 eck$LassoCheckResult]: Stem: 15124#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 15120#L10-2 assume !!(main_~i~0 < 100); 15121#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15122#L10-2 assume !!(main_~i~0 < 100); 15123#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15127#L10-2 assume !!(main_~i~0 < 100); 15222#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15221#L10-2 assume !!(main_~i~0 < 100); 15220#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15219#L10-2 assume !!(main_~i~0 < 100); 15218#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15217#L10-2 assume !!(main_~i~0 < 100); 15216#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15215#L10-2 assume !!(main_~i~0 < 100); 15214#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15213#L10-2 assume !!(main_~i~0 < 100); 15212#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15211#L10-2 assume !!(main_~i~0 < 100); 15210#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15209#L10-2 assume !!(main_~i~0 < 100); 15208#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15207#L10-2 assume !!(main_~i~0 < 100); 15206#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15205#L10-2 assume !!(main_~i~0 < 100); 15204#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15203#L10-2 assume !!(main_~i~0 < 100); 15202#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15201#L10-2 assume !!(main_~i~0 < 100); 15200#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15199#L10-2 assume !!(main_~i~0 < 100); 15198#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15197#L10-2 assume !!(main_~i~0 < 100); 15196#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15195#L10-2 assume !!(main_~i~0 < 100); 15194#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15193#L10-2 assume !!(main_~i~0 < 100); 15192#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15191#L10-2 assume !!(main_~i~0 < 100); 15190#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15189#L10-2 assume !!(main_~i~0 < 100); 15188#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15187#L10-2 assume !!(main_~i~0 < 100); 15186#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15185#L10-2 assume !!(main_~i~0 < 100); 15184#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15183#L10-2 assume !!(main_~i~0 < 100); 15182#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15181#L10-2 assume !!(main_~i~0 < 100); 15180#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15179#L10-2 assume !!(main_~i~0 < 100); 15178#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15177#L10-2 assume !!(main_~i~0 < 100); 15176#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15175#L10-2 assume !!(main_~i~0 < 100); 15174#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15173#L10-2 assume !!(main_~i~0 < 100); 15172#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15171#L10-2 assume !!(main_~i~0 < 100); 15170#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15169#L10-2 assume !!(main_~i~0 < 100); 15168#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15167#L10-2 assume !!(main_~i~0 < 100); 15166#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15165#L10-2 assume !!(main_~i~0 < 100); 15164#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15163#L10-2 assume !!(main_~i~0 < 100); 15162#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15161#L10-2 assume !!(main_~i~0 < 100); 15160#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15159#L10-2 assume !!(main_~i~0 < 100); 15158#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15157#L10-2 assume !!(main_~i~0 < 100); 15156#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15155#L10-2 assume !!(main_~i~0 < 100); 15154#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15153#L10-2 assume !!(main_~i~0 < 100); 15152#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15151#L10-2 assume !!(main_~i~0 < 100); 15150#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15149#L10-2 assume !!(main_~i~0 < 100); 15148#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15147#L10-2 assume !!(main_~i~0 < 100); 15146#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15145#L10-2 assume !!(main_~i~0 < 100); 15144#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15143#L10-2 assume !!(main_~i~0 < 100); 15142#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15141#L10-2 assume !!(main_~i~0 < 100); 15140#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15139#L10-2 assume !!(main_~i~0 < 100); 15138#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15137#L10-2 assume !!(main_~i~0 < 100); 15136#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15135#L10-2 assume !!(main_~i~0 < 100); 15134#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15133#L10-2 assume !!(main_~i~0 < 100); 15131#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15130#L10-2 assume !!(main_~i~0 < 100); 15129#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15128#L10-2 assume !!(main_~i~0 < 100); 15125#L10 [2021-10-28 23:16:00,570 INFO L793 eck$LassoCheckResult]: Loop: 15125#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 15126#L10-2 assume !!(main_~i~0 < 100); 15129#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15128#L10-2 assume !!(main_~i~0 < 100); 15125#L10 [2021-10-28 23:16:00,571 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:16:00,571 INFO L85 PathProgramCache]: Analyzing trace with hash 844798583, now seen corresponding path program 49 times [2021-10-28 23:16:00,571 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:16:00,571 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1765266802] [2021-10-28 23:16:00,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:16:00,572 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:16:00,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:16:00,601 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:16:00,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:16:00,616 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:16:00,617 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:16:00,617 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 47 times [2021-10-28 23:16:00,617 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:16:00,617 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1738842395] [2021-10-28 23:16:00,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:16:00,618 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:16:00,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:16:00,635 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:16:00,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:16:00,637 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:16:00,638 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:16:00,638 INFO L85 PathProgramCache]: Analyzing trace with hash -166625361, now seen corresponding path program 49 times [2021-10-28 23:16:00,638 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:16:00,638 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1620908652] [2021-10-28 23:16:00,638 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:16:00,639 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:16:00,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:16:02,039 INFO L134 CoverageAnalysis]: Checked inductivity of 2601 backedges. 150 proven. 2450 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:16:02,039 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:16:02,039 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1620908652] [2021-10-28 23:16:02,043 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1620908652] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:16:02,047 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1831243289] [2021-10-28 23:16:02,048 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-10-28 23:16:02,048 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:16:02,048 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:16:02,049 INFO L229 MonitoredProcess]: Starting monitored process 71 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:16:02,050 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (71)] Waiting until timeout for monitored process [2021-10-28 23:16:03,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:16:03,034 INFO L263 TraceCheckSpWp]: Trace formula consists of 209 conjuncts, 51 conjunts are in the unsatisfiable core [2021-10-28 23:16:03,036 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:16:03,401 INFO L134 CoverageAnalysis]: Checked inductivity of 2601 backedges. 150 proven. 2450 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2021-10-28 23:16:03,402 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1831243289] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:16:03,402 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:16:03,402 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [51, 51] total 51 [2021-10-28 23:16:03,402 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [826928987] [2021-10-28 23:16:03,431 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:16:03,432 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2021-10-28 23:16:03,434 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2021-10-28 23:16:03,434 INFO L87 Difference]: Start difference. First operand 103 states and 105 transitions. cyclomatic complexity: 3 Second operand has 52 states, 52 states have (on average 1.9807692307692308) internal successors, (103), 51 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:16:03,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:16:03,567 INFO L93 Difference]: Finished difference Result 107 states and 109 transitions. [2021-10-28 23:16:03,567 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2021-10-28 23:16:03,567 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 107 states and 109 transitions. [2021-10-28 23:16:03,568 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:16:03,570 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 107 states to 106 states and 108 transitions. [2021-10-28 23:16:03,570 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2021-10-28 23:16:03,570 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2021-10-28 23:16:03,570 INFO L73 IsDeterministic]: Start isDeterministic. Operand 106 states and 108 transitions. [2021-10-28 23:16:03,570 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-10-28 23:16:03,570 INFO L681 BuchiCegarLoop]: Abstraction has 106 states and 108 transitions. [2021-10-28 23:16:03,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states and 108 transitions. [2021-10-28 23:16:03,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 105. [2021-10-28 23:16:03,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 105 states, 105 states have (on average 1.019047619047619) internal successors, (107), 104 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:16:03,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 107 transitions. [2021-10-28 23:16:03,573 INFO L704 BuchiCegarLoop]: Abstraction has 105 states and 107 transitions. [2021-10-28 23:16:03,573 INFO L587 BuchiCegarLoop]: Abstraction has 105 states and 107 transitions. [2021-10-28 23:16:03,573 INFO L425 BuchiCegarLoop]: ======== Iteration 52============ [2021-10-28 23:16:03,574 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 105 states and 107 transitions. [2021-10-28 23:16:03,574 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2021-10-28 23:16:03,575 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:16:03,575 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:16:03,576 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [51, 50, 1] [2021-10-28 23:16:03,576 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-10-28 23:16:03,576 INFO L791 eck$LassoCheckResult]: Stem: 15700#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 15696#L10-2 assume !!(main_~i~0 < 100); 15697#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15698#L10-2 assume !!(main_~i~0 < 100); 15699#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15703#L10-2 assume !!(main_~i~0 < 100); 15800#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15799#L10-2 assume !!(main_~i~0 < 100); 15798#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15797#L10-2 assume !!(main_~i~0 < 100); 15796#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15795#L10-2 assume !!(main_~i~0 < 100); 15794#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15793#L10-2 assume !!(main_~i~0 < 100); 15792#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15791#L10-2 assume !!(main_~i~0 < 100); 15790#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15789#L10-2 assume !!(main_~i~0 < 100); 15788#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15787#L10-2 assume !!(main_~i~0 < 100); 15786#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15785#L10-2 assume !!(main_~i~0 < 100); 15784#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15783#L10-2 assume !!(main_~i~0 < 100); 15782#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15781#L10-2 assume !!(main_~i~0 < 100); 15780#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15779#L10-2 assume !!(main_~i~0 < 100); 15778#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15777#L10-2 assume !!(main_~i~0 < 100); 15776#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15775#L10-2 assume !!(main_~i~0 < 100); 15774#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15773#L10-2 assume !!(main_~i~0 < 100); 15772#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15771#L10-2 assume !!(main_~i~0 < 100); 15770#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15769#L10-2 assume !!(main_~i~0 < 100); 15768#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15767#L10-2 assume !!(main_~i~0 < 100); 15766#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15765#L10-2 assume !!(main_~i~0 < 100); 15764#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15763#L10-2 assume !!(main_~i~0 < 100); 15762#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15761#L10-2 assume !!(main_~i~0 < 100); 15760#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15759#L10-2 assume !!(main_~i~0 < 100); 15758#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15757#L10-2 assume !!(main_~i~0 < 100); 15756#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15755#L10-2 assume !!(main_~i~0 < 100); 15754#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15753#L10-2 assume !!(main_~i~0 < 100); 15752#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15751#L10-2 assume !!(main_~i~0 < 100); 15750#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15749#L10-2 assume !!(main_~i~0 < 100); 15748#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15747#L10-2 assume !!(main_~i~0 < 100); 15746#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15745#L10-2 assume !!(main_~i~0 < 100); 15744#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15743#L10-2 assume !!(main_~i~0 < 100); 15742#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15741#L10-2 assume !!(main_~i~0 < 100); 15740#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15739#L10-2 assume !!(main_~i~0 < 100); 15738#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15737#L10-2 assume !!(main_~i~0 < 100); 15736#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15735#L10-2 assume !!(main_~i~0 < 100); 15734#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15733#L10-2 assume !!(main_~i~0 < 100); 15732#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15731#L10-2 assume !!(main_~i~0 < 100); 15730#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15729#L10-2 assume !!(main_~i~0 < 100); 15728#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15727#L10-2 assume !!(main_~i~0 < 100); 15726#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15725#L10-2 assume !!(main_~i~0 < 100); 15724#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15723#L10-2 assume !!(main_~i~0 < 100); 15722#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15721#L10-2 assume !!(main_~i~0 < 100); 15720#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15719#L10-2 assume !!(main_~i~0 < 100); 15718#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15717#L10-2 assume !!(main_~i~0 < 100); 15716#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15715#L10-2 assume !!(main_~i~0 < 100); 15714#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15713#L10-2 assume !!(main_~i~0 < 100); 15712#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15711#L10-2 assume !!(main_~i~0 < 100); 15710#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15709#L10-2 assume !!(main_~i~0 < 100); 15707#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15706#L10-2 assume !!(main_~i~0 < 100); 15705#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15704#L10-2 assume !!(main_~i~0 < 100); 15701#L10 [2021-10-28 23:16:03,577 INFO L793 eck$LassoCheckResult]: Loop: 15701#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 15702#L10-2 assume !!(main_~i~0 < 100); 15705#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15704#L10-2 assume !!(main_~i~0 < 100); 15701#L10 [2021-10-28 23:16:03,577 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:16:03,577 INFO L85 PathProgramCache]: Analyzing trace with hash 102619732, now seen corresponding path program 50 times [2021-10-28 23:16:03,577 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:16:03,578 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2124713243] [2021-10-28 23:16:03,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:16:03,578 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:16:03,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:16:03,611 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:16:03,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:16:03,630 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:16:03,630 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:16:03,630 INFO L85 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 48 times [2021-10-28 23:16:03,631 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:16:03,631 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1698496273] [2021-10-28 23:16:03,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:16:03,631 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:16:03,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:16:03,651 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:16:03,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:16:03,655 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:16:03,655 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:16:03,656 INFO L85 PathProgramCache]: Analyzing trace with hash -1270380276, now seen corresponding path program 50 times [2021-10-28 23:16:03,656 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:16:03,656 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2066559157] [2021-10-28 23:16:03,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:16:03,656 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:16:03,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:16:03,689 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:16:03,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:16:03,720 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:16:05,173 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 28.10 11:16:05 BoogieIcfgContainer [2021-10-28 23:16:05,173 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2021-10-28 23:16:05,174 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-28 23:16:05,174 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-28 23:16:05,174 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-28 23:16:05,175 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 11:14:55" (3/4) ... [2021-10-28 23:16:05,177 INFO L134 WitnessPrinter]: Generating witness for non-termination counterexample [2021-10-28 23:16:05,269 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/witness.graphml [2021-10-28 23:16:05,270 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-28 23:16:05,272 INFO L168 Benchmark]: Toolchain (without parser) took 70737.00 ms. Allocated memory was 100.7 MB in the beginning and 1.6 GB in the end (delta: 1.5 GB). Free memory was 59.6 MB in the beginning and 539.3 MB in the end (delta: -479.7 MB). Peak memory consumption was 989.2 MB. Max. memory is 16.1 GB. [2021-10-28 23:16:05,272 INFO L168 Benchmark]: CDTParser took 0.29 ms. Allocated memory is still 100.7 MB. Free memory is still 75.4 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-10-28 23:16:05,274 INFO L168 Benchmark]: CACSL2BoogieTranslator took 246.79 ms. Allocated memory is still 100.7 MB. Free memory was 59.4 MB in the beginning and 77.2 MB in the end (delta: -17.8 MB). Peak memory consumption was 8.0 MB. Max. memory is 16.1 GB. [2021-10-28 23:16:05,274 INFO L168 Benchmark]: Boogie Procedure Inliner took 32.88 ms. Allocated memory is still 100.7 MB. Free memory was 77.2 MB in the beginning and 75.9 MB in the end (delta: 1.3 MB). There was no memory consumed. Max. memory is 16.1 GB. [2021-10-28 23:16:05,275 INFO L168 Benchmark]: Boogie Preprocessor took 20.41 ms. Allocated memory is still 100.7 MB. Free memory was 75.9 MB in the beginning and 75.1 MB in the end (delta: 814.5 kB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 23:16:05,275 INFO L168 Benchmark]: RCFGBuilder took 244.04 ms. Allocated memory is still 100.7 MB. Free memory was 75.0 MB in the beginning and 67.5 MB in the end (delta: 7.4 MB). Peak memory consumption was 6.3 MB. Max. memory is 16.1 GB. [2021-10-28 23:16:05,275 INFO L168 Benchmark]: BuchiAutomizer took 70088.63 ms. Allocated memory was 100.7 MB in the beginning and 1.6 GB in the end (delta: 1.5 GB). Free memory was 67.4 MB in the beginning and 542.4 MB in the end (delta: -475.0 MB). Peak memory consumption was 1.2 GB. Max. memory is 16.1 GB. [2021-10-28 23:16:05,282 INFO L168 Benchmark]: Witness Printer took 96.00 ms. Allocated memory is still 1.6 GB. Free memory was 542.4 MB in the beginning and 539.3 MB in the end (delta: 3.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 23:16:05,284 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.29 ms. Allocated memory is still 100.7 MB. Free memory is still 75.4 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 246.79 ms. Allocated memory is still 100.7 MB. Free memory was 59.4 MB in the beginning and 77.2 MB in the end (delta: -17.8 MB). Peak memory consumption was 8.0 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 32.88 ms. Allocated memory is still 100.7 MB. Free memory was 77.2 MB in the beginning and 75.9 MB in the end (delta: 1.3 MB). There was no memory consumed. Max. memory is 16.1 GB. * Boogie Preprocessor took 20.41 ms. Allocated memory is still 100.7 MB. Free memory was 75.9 MB in the beginning and 75.1 MB in the end (delta: 814.5 kB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 244.04 ms. Allocated memory is still 100.7 MB. Free memory was 75.0 MB in the beginning and 67.5 MB in the end (delta: 7.4 MB). Peak memory consumption was 6.3 MB. Max. memory is 16.1 GB. * BuchiAutomizer took 70088.63 ms. Allocated memory was 100.7 MB in the beginning and 1.6 GB in the end (delta: 1.5 GB). Free memory was 67.4 MB in the beginning and 542.4 MB in the end (delta: -475.0 MB). Peak memory consumption was 1.2 GB. Max. memory is 16.1 GB. * Witness Printer took 96.00 ms. Allocated memory is still 1.6 GB. Free memory was 542.4 MB in the beginning and 539.3 MB in the end (delta: 3.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 54 terminating modules (50 trivial, 2 deterministic, 2 nondeterministic) and one nonterminating remainder module.One deterministic module has affine ranking function -2 * i + 99 and consists of 4 locations. One deterministic module has affine ranking function -2 * i + 99 and consists of 3 locations. One nondeterministic module has affine ranking function -2 * i + 99 and consists of 3 locations. One nondeterministic module has affine ranking function i and consists of 3 locations. 50 modules have a trivial ranking function, the largest among these consists of 52 locations. The remainder module has 105 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 69.9s and 52 iterations. TraceHistogramMax:51. Analysis of lassos took 64.2s. Construction of modules took 2.6s. Büchi inclusion checks took 2.3s. Highest rank in rank-based complementation 3. Minimization of det autom 0. Minimization of nondet autom 54. Automata minimization 0.2s AutomataMinimizationTime, 54 MinimizatonAttempts, 58 StatesRemovedByMinimization, 52 NontrivialMinimizations. Non-live state removal took 0.1s Buchi closure took 0.0s. Biggest automaton had 105 states and ocurred in iteration 51. Nontrivial modules had stage [2, 0, 2, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 128 SDtfs, 29 SDslu, 3 SDs, 0 SdLazy, 2875 SolverSat, 175 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.6s Time LassoAnalysisResults: nont1 unkn0 SFLI0 SFLT1 conc47 concLT1 SILN0 SILU0 SILI0 SILT2 lasso0 LassoPreprocessingBenchmarks: Lassos: inital10 mio100 ax213 hnf100 lsp47 ukn100 mio100 lsp100 div100 bol100 ite100 ukn100 eq156 hnf93 smp100 dnf100 smp100 tf112 neg100 sie111 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: unsat Degree: 0 Time: 86ms VariablesStem: 1 VariablesLoop: 0 DisjunctsStem: 1 DisjunctsLoop: 1 SupportingInvariants: 2 MotzkinApplications: 6 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 4 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 4 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.7s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 10]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {} State at position 1 is {\result=0, i=50} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 10]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L6] int i; [L7] i = 0 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 Loop: [L10] COND FALSE !(i < 50) [L11] i = i-1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2021-10-28 23:16:05,375 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (71)] Forceful destruction successful, exit code 0 [2021-10-28 23:16:05,566 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (70)] Ended with exit code 0 [2021-10-28 23:16:05,774 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (69)] Forceful destruction successful, exit code 0 [2021-10-28 23:16:05,967 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (68)] Ended with exit code 0 [2021-10-28 23:16:06,166 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (67)] Ended with exit code 0 [2021-10-28 23:16:06,368 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (66)] Forceful destruction successful, exit code 0 [2021-10-28 23:16:06,569 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (65)] Forceful destruction successful, exit code 0 [2021-10-28 23:16:06,767 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (64)] Ended with exit code 0 [2021-10-28 23:16:06,967 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (63)] Ended with exit code 0 [2021-10-28 23:16:07,168 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (62)] Forceful destruction successful, exit code 0 [2021-10-28 23:16:07,367 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (61)] Ended with exit code 0 [2021-10-28 23:16:07,567 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (60)] Ended with exit code 0 [2021-10-28 23:16:07,763 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (59)] Ended with exit code 0 [2021-10-28 23:16:07,967 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (58)] Ended with exit code 0 [2021-10-28 23:16:08,167 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (57)] Ended with exit code 0 [2021-10-28 23:16:08,375 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (56)] Forceful destruction successful, exit code 0 [2021-10-28 23:16:08,568 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Ended with exit code 0 [2021-10-28 23:16:08,768 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Forceful destruction successful, exit code 0 [2021-10-28 23:16:08,968 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Ended with exit code 0 [2021-10-28 23:16:09,164 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Ended with exit code 0 [2021-10-28 23:16:09,368 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (51)] Ended with exit code 0 [2021-10-28 23:16:09,594 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (50)] Forceful destruction successful, exit code 0 [2021-10-28 23:16:09,769 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (49)] Forceful destruction successful, exit code 0 [2021-10-28 23:16:09,968 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Ended with exit code 0 [2021-10-28 23:16:10,168 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (47)] Ended with exit code 0 [2021-10-28 23:16:10,369 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (46)] Ended with exit code 0 [2021-10-28 23:16:10,566 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (45)] Ended with exit code 0 [2021-10-28 23:16:10,770 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (44)] Forceful destruction successful, exit code 0 [2021-10-28 23:16:10,970 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Forceful destruction successful, exit code 0 [2021-10-28 23:16:11,169 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Ended with exit code 0 [2021-10-28 23:16:11,370 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Forceful destruction successful, exit code 0 [2021-10-28 23:16:11,576 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Forceful destruction successful, exit code 0 [2021-10-28 23:16:11,768 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Forceful destruction successful, exit code 0 [2021-10-28 23:16:11,971 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Ended with exit code 0 [2021-10-28 23:16:12,170 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Ended with exit code 0 [2021-10-28 23:16:12,371 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Ended with exit code 0 [2021-10-28 23:16:12,571 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Ended with exit code 0 [2021-10-28 23:16:12,771 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Ended with exit code 0 [2021-10-28 23:16:12,970 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Ended with exit code 0 [2021-10-28 23:16:13,172 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Ended with exit code 0 [2021-10-28 23:16:13,371 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Forceful destruction successful, exit code 0 [2021-10-28 23:16:13,569 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Ended with exit code 0 [2021-10-28 23:16:13,773 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Forceful destruction successful, exit code 0 [2021-10-28 23:16:13,971 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Forceful destruction successful, exit code 0 [2021-10-28 23:16:14,173 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Ended with exit code 0 [2021-10-28 23:16:14,373 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Ended with exit code 0 [2021-10-28 23:16:14,573 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Ended with exit code 0 [2021-10-28 23:16:14,773 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2021-10-28 23:16:14,973 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2021-10-28 23:16:15,177 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6ac6f322-eb7c-4c20-b844-36260a312fe8/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request...