./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/systemc/transmitter.01.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version b2eff8ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46203f8f-bc62-42ad-b1e2-53975d7dace2/bin/uautomizer-GMMbpWq8iD/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46203f8f-bc62-42ad-b1e2-53975d7dace2/bin/uautomizer-GMMbpWq8iD/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46203f8f-bc62-42ad-b1e2-53975d7dace2/bin/uautomizer-GMMbpWq8iD/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46203f8f-bc62-42ad-b1e2-53975d7dace2/bin/uautomizer-GMMbpWq8iD/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/systemc/transmitter.01.cil.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46203f8f-bc62-42ad-b1e2-53975d7dace2/bin/uautomizer-GMMbpWq8iD/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46203f8f-bc62-42ad-b1e2-53975d7dace2/bin/uautomizer-GMMbpWq8iD --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0bca5bbd8ac33ab1d58a01dd560e5e3d6c95b5dc081f89e35a635c59fa2143ad ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM) --- Real Ultimate output --- This is Ultimate 0.2.1-dev-b2eff8b [2021-10-28 23:40:28,822 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-28 23:40:28,824 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-28 23:40:28,853 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-28 23:40:28,854 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-28 23:40:28,855 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-28 23:40:28,857 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-28 23:40:28,863 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-28 23:40:28,866 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-28 23:40:28,871 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-28 23:40:28,872 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-28 23:40:28,874 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-28 23:40:28,874 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-28 23:40:28,876 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-28 23:40:28,878 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-28 23:40:28,884 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-28 23:40:28,885 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-28 23:40:28,886 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-28 23:40:28,890 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-28 23:40:28,895 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-28 23:40:28,897 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-28 23:40:28,898 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-28 23:40:28,901 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-28 23:40:28,902 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-28 23:40:28,912 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-28 23:40:28,912 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-28 23:40:28,913 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-28 23:40:28,914 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-28 23:40:28,915 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-28 23:40:28,916 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-28 23:40:28,917 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-28 23:40:28,918 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-28 23:40:28,919 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-28 23:40:28,921 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-28 23:40:28,922 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-28 23:40:28,922 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-28 23:40:28,923 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-28 23:40:28,923 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-28 23:40:28,923 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-28 23:40:28,924 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-28 23:40:28,924 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-28 23:40:28,925 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46203f8f-bc62-42ad-b1e2-53975d7dace2/bin/uautomizer-GMMbpWq8iD/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-10-28 23:40:28,968 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-28 23:40:28,968 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-28 23:40:28,974 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-28 23:40:28,974 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-28 23:40:28,976 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-28 23:40:28,976 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-28 23:40:28,976 INFO L138 SettingsManager]: * Use SBE=true [2021-10-28 23:40:28,976 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-10-28 23:40:28,977 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-10-28 23:40:28,977 INFO L138 SettingsManager]: * Use old map elimination=false [2021-10-28 23:40:28,978 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-10-28 23:40:28,978 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-10-28 23:40:28,978 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-10-28 23:40:28,978 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-28 23:40:28,979 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-28 23:40:28,979 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-10-28 23:40:28,979 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-28 23:40:28,979 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-28 23:40:28,979 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-28 23:40:28,979 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-10-28 23:40:28,980 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-10-28 23:40:28,980 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-10-28 23:40:28,980 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-28 23:40:28,980 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-28 23:40:28,981 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-10-28 23:40:28,981 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-28 23:40:28,983 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-10-28 23:40:28,983 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-28 23:40:28,983 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-28 23:40:28,983 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-28 23:40:28,984 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-28 23:40:28,984 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-28 23:40:28,985 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-10-28 23:40:28,985 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46203f8f-bc62-42ad-b1e2-53975d7dace2/bin/uautomizer-GMMbpWq8iD/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46203f8f-bc62-42ad-b1e2-53975d7dace2/bin/uautomizer-GMMbpWq8iD Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0bca5bbd8ac33ab1d58a01dd560e5e3d6c95b5dc081f89e35a635c59fa2143ad [2021-10-28 23:40:29,277 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-28 23:40:29,304 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-28 23:40:29,307 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-28 23:40:29,308 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-28 23:40:29,309 INFO L275 PluginConnector]: CDTParser initialized [2021-10-28 23:40:29,310 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46203f8f-bc62-42ad-b1e2-53975d7dace2/bin/uautomizer-GMMbpWq8iD/../../sv-benchmarks/c/systemc/transmitter.01.cil.c [2021-10-28 23:40:29,371 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46203f8f-bc62-42ad-b1e2-53975d7dace2/bin/uautomizer-GMMbpWq8iD/data/2579db0b5/39c8deae9ee647f6a4d5b4b1935f1755/FLAGe6e6495c2 [2021-10-28 23:40:29,798 INFO L306 CDTParser]: Found 1 translation units. [2021-10-28 23:40:29,799 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46203f8f-bc62-42ad-b1e2-53975d7dace2/sv-benchmarks/c/systemc/transmitter.01.cil.c [2021-10-28 23:40:29,807 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46203f8f-bc62-42ad-b1e2-53975d7dace2/bin/uautomizer-GMMbpWq8iD/data/2579db0b5/39c8deae9ee647f6a4d5b4b1935f1755/FLAGe6e6495c2 [2021-10-28 23:40:30,195 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46203f8f-bc62-42ad-b1e2-53975d7dace2/bin/uautomizer-GMMbpWq8iD/data/2579db0b5/39c8deae9ee647f6a4d5b4b1935f1755 [2021-10-28 23:40:30,198 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-28 23:40:30,200 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-28 23:40:30,205 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-28 23:40:30,205 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-28 23:40:30,209 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-28 23:40:30,210 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 11:40:30" (1/1) ... [2021-10-28 23:40:30,212 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1f5bc2c9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:40:30, skipping insertion in model container [2021-10-28 23:40:30,212 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 11:40:30" (1/1) ... [2021-10-28 23:40:30,221 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-28 23:40:30,258 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-28 23:40:30,428 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46203f8f-bc62-42ad-b1e2-53975d7dace2/sv-benchmarks/c/systemc/transmitter.01.cil.c[401,414] [2021-10-28 23:40:30,465 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 23:40:30,474 INFO L203 MainTranslator]: Completed pre-run [2021-10-28 23:40:30,486 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46203f8f-bc62-42ad-b1e2-53975d7dace2/sv-benchmarks/c/systemc/transmitter.01.cil.c[401,414] [2021-10-28 23:40:30,510 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 23:40:30,524 INFO L208 MainTranslator]: Completed translation [2021-10-28 23:40:30,525 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:40:30 WrapperNode [2021-10-28 23:40:30,525 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-28 23:40:30,526 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-28 23:40:30,526 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-28 23:40:30,526 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-28 23:40:30,532 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:40:30" (1/1) ... [2021-10-28 23:40:30,539 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:40:30" (1/1) ... [2021-10-28 23:40:30,568 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-28 23:40:30,568 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-28 23:40:30,569 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-28 23:40:30,569 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-28 23:40:30,576 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:40:30" (1/1) ... [2021-10-28 23:40:30,577 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:40:30" (1/1) ... [2021-10-28 23:40:30,581 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:40:30" (1/1) ... [2021-10-28 23:40:30,581 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:40:30" (1/1) ... [2021-10-28 23:40:30,587 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:40:30" (1/1) ... [2021-10-28 23:40:30,595 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:40:30" (1/1) ... [2021-10-28 23:40:30,597 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:40:30" (1/1) ... [2021-10-28 23:40:30,600 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-28 23:40:30,601 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-28 23:40:30,601 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-28 23:40:30,601 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-28 23:40:30,602 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:40:30" (1/1) ... [2021-10-28 23:40:30,609 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-10-28 23:40:30,623 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46203f8f-bc62-42ad-b1e2-53975d7dace2/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:40:30,636 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46203f8f-bc62-42ad-b1e2-53975d7dace2/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-10-28 23:40:30,659 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46203f8f-bc62-42ad-b1e2-53975d7dace2/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-10-28 23:40:30,689 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-28 23:40:30,690 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-28 23:40:30,690 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-28 23:40:30,690 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-28 23:40:31,322 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-28 23:40:31,323 INFO L299 CfgBuilder]: Removed 73 assume(true) statements. [2021-10-28 23:40:31,325 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 11:40:31 BoogieIcfgContainer [2021-10-28 23:40:31,325 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-28 23:40:31,326 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-10-28 23:40:31,326 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-10-28 23:40:31,333 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-10-28 23:40:31,334 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-28 23:40:31,335 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 28.10 11:40:30" (1/3) ... [2021-10-28 23:40:31,335 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@651fde78 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.10 11:40:31, skipping insertion in model container [2021-10-28 23:40:31,336 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-28 23:40:31,336 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:40:30" (2/3) ... [2021-10-28 23:40:31,336 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@651fde78 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 28.10 11:40:31, skipping insertion in model container [2021-10-28 23:40:31,336 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-10-28 23:40:31,336 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 11:40:31" (3/3) ... [2021-10-28 23:40:31,337 INFO L389 chiAutomizerObserver]: Analyzing ICFG transmitter.01.cil.c [2021-10-28 23:40:31,391 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-10-28 23:40:31,391 INFO L360 BuchiCegarLoop]: Hoare is false [2021-10-28 23:40:31,391 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-10-28 23:40:31,391 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-10-28 23:40:31,391 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-10-28 23:40:31,392 INFO L364 BuchiCegarLoop]: Difference is false [2021-10-28 23:40:31,392 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-10-28 23:40:31,392 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-10-28 23:40:31,414 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 121 states, 120 states have (on average 1.575) internal successors, (189), 120 states have internal predecessors, (189), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:40:31,452 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 92 [2021-10-28 23:40:31,452 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:40:31,452 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:40:31,462 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:40:31,462 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:40:31,462 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-10-28 23:40:31,463 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 121 states, 120 states have (on average 1.575) internal successors, (189), 120 states have internal predecessors, (189), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:40:31,480 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 92 [2021-10-28 23:40:31,480 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:40:31,480 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:40:31,484 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:40:31,484 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:40:31,493 INFO L791 eck$LassoCheckResult]: Stem: 107#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(21);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_1~0 := 2; 41#L-1true havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 89#L359true havoc start_simulation_#t~ret13, start_simulation_#t~ret14, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 79#L146true assume !(1 == ~m_i~0);~m_st~0 := 2; 78#L153-1true assume 1 == ~t1_i~0;~t1_st~0 := 0; 86#L158-1true assume !(0 == ~M_E~0); 46#L242-1true assume !(0 == ~T1_E~0); 103#L247-1true assume !(0 == ~E_1~0); 37#L252-1true havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 115#L107true assume !(1 == ~m_pc~0); 59#L107-2true is_master_triggered_~__retres1~0 := 0; 87#L118true is_master_triggered_#res := is_master_triggered_~__retres1~0; 108#L119true activate_threads_#t~ret10 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 82#L292true assume !(0 != activate_threads_~tmp~1); 42#L292-2true havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 64#L126true assume 1 == ~t1_pc~0; 109#L127true assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 55#L137true is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 56#L138true activate_threads_#t~ret11 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 60#L300true assume !(0 != activate_threads_~tmp___0~0); 97#L300-2true assume !(1 == ~M_E~0); 106#L265-1true assume !(1 == ~T1_E~0); 13#L270-1true assume !(1 == ~E_1~0); 21#L396-1true [2021-10-28 23:40:31,494 INFO L793 eck$LassoCheckResult]: Loop: 21#L396-1true assume !false; 114#L397true start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp_ndt_1~0, eval_#t~nondet9, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 19#L217true assume !true; 123#L232true start_simulation_~kernel_st~0 := 2; 17#L146-1true start_simulation_~kernel_st~0 := 3; 47#L242-2true assume 0 == ~M_E~0;~M_E~0 := 1; 44#L242-4true assume !(0 == ~T1_E~0); 50#L247-3true assume 0 == ~E_1~0;~E_1~0 := 1; 24#L252-3true havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 95#L107-6true assume 1 == ~m_pc~0; 88#L108-2true assume 1 == ~M_E~0;is_master_triggered_~__retres1~0 := 1; 51#L118-2true is_master_triggered_#res := is_master_triggered_~__retres1~0; 43#L119-2true activate_threads_#t~ret10 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 62#L292-6true assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 92#L292-8true havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 45#L126-6true assume !(1 == ~t1_pc~0); 49#L126-8true is_transmit1_triggered_~__retres1~1 := 0; 104#L137-2true is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 85#L138-2true activate_threads_#t~ret11 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 70#L300-6true assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 105#L300-8true assume 1 == ~M_E~0;~M_E~0 := 2; 25#L265-3true assume 1 == ~T1_E~0;~T1_E~0 := 2; 35#L270-3true assume 1 == ~E_1~0;~E_1~0 := 2; 93#L275-3true havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 29#L171-1true assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 83#L183-1true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 111#L184-1true start_simulation_#t~ret13 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret13;havoc start_simulation_#t~ret13; 101#L415true assume !(0 == start_simulation_~tmp~3); 16#L415-1true havoc stop_simulation_#res;havoc stop_simulation_#t~ret12, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 75#L171-2true assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 40#L183-2true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 73#L184-2true stop_simulation_#t~ret12 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret12;havoc stop_simulation_#t~ret12; 8#L370true assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 120#L377true stop_simulation_#res := stop_simulation_~__retres2~0; 12#L378true start_simulation_#t~ret14 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 102#L428true assume !(0 != start_simulation_~tmp___0~1); 21#L396-1true [2021-10-28 23:40:31,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:40:31,501 INFO L85 PathProgramCache]: Analyzing trace with hash 1587080038, now seen corresponding path program 1 times [2021-10-28 23:40:31,509 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:40:31,510 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1786806361] [2021-10-28 23:40:31,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:40:31,511 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:40:31,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:40:31,701 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:40:31,702 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:40:31,702 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1786806361] [2021-10-28 23:40:31,703 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1786806361] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:40:31,704 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:40:31,704 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:40:31,706 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1779260203] [2021-10-28 23:40:31,711 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 23:40:31,711 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:40:31,712 INFO L85 PathProgramCache]: Analyzing trace with hash -1368035724, now seen corresponding path program 1 times [2021-10-28 23:40:31,712 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:40:31,712 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1792504448] [2021-10-28 23:40:31,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:40:31,713 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:40:31,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:40:31,749 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:40:31,749 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:40:31,749 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1792504448] [2021-10-28 23:40:31,750 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1792504448] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:40:31,750 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:40:31,750 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-28 23:40:31,750 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [94044600] [2021-10-28 23:40:31,752 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 23:40:31,752 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:40:31,767 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:40:31,767 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:40:31,771 INFO L87 Difference]: Start difference. First operand has 121 states, 120 states have (on average 1.575) internal successors, (189), 120 states have internal predecessors, (189), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 7.666666666666667) internal successors, (23), 3 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:40:31,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:40:31,813 INFO L93 Difference]: Finished difference Result 121 states and 177 transitions. [2021-10-28 23:40:31,814 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:40:31,815 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 121 states and 177 transitions. [2021-10-28 23:40:31,822 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 91 [2021-10-28 23:40:31,830 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 121 states to 116 states and 172 transitions. [2021-10-28 23:40:31,831 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 116 [2021-10-28 23:40:31,832 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 116 [2021-10-28 23:40:31,833 INFO L73 IsDeterministic]: Start isDeterministic. Operand 116 states and 172 transitions. [2021-10-28 23:40:31,834 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 23:40:31,834 INFO L681 BuchiCegarLoop]: Abstraction has 116 states and 172 transitions. [2021-10-28 23:40:31,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states and 172 transitions. [2021-10-28 23:40:31,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2021-10-28 23:40:31,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 116 states have (on average 1.4827586206896552) internal successors, (172), 115 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:40:31,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 172 transitions. [2021-10-28 23:40:31,872 INFO L704 BuchiCegarLoop]: Abstraction has 116 states and 172 transitions. [2021-10-28 23:40:31,873 INFO L587 BuchiCegarLoop]: Abstraction has 116 states and 172 transitions. [2021-10-28 23:40:31,873 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-10-28 23:40:31,873 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 116 states and 172 transitions. [2021-10-28 23:40:31,876 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 91 [2021-10-28 23:40:31,876 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:40:31,876 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:40:31,879 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:40:31,879 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:40:31,880 INFO L791 eck$LassoCheckResult]: Stem: 365#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(21);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_1~0 := 2; 313#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 314#L359 havoc start_simulation_#t~ret13, start_simulation_#t~ret14, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 352#L146 assume 1 == ~m_i~0;~m_st~0 := 0; 350#L153-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 351#L158-1 assume !(0 == ~M_E~0); 324#L242-1 assume !(0 == ~T1_E~0); 325#L247-1 assume !(0 == ~E_1~0); 307#L252-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 308#L107 assume !(1 == ~m_pc~0); 281#L107-2 is_master_triggered_~__retres1~0 := 0; 280#L118 is_master_triggered_#res := is_master_triggered_~__retres1~0; 358#L119 activate_threads_#t~ret10 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 355#L292 assume !(0 != activate_threads_~tmp~1); 315#L292-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 316#L126 assume 1 == ~t1_pc~0; 338#L127 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 329#L137 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 330#L138 activate_threads_#t~ret11 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 331#L300 assume !(0 != activate_threads_~tmp___0~0); 336#L300-2 assume !(1 == ~M_E~0); 363#L265-1 assume !(1 == ~T1_E~0); 270#L270-1 assume !(1 == ~E_1~0); 271#L396-1 [2021-10-28 23:40:31,880 INFO L793 eck$LassoCheckResult]: Loop: 271#L396-1 assume !false; 282#L397 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp_ndt_1~0, eval_#t~nondet9, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 252#L217 assume !false; 278#L194 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 361#L171 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 256#L183 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 304#L184 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret7;havoc eval_#t~ret7; 340#L198 assume !(0 != eval_~tmp~0); 341#L232 start_simulation_~kernel_st~0 := 2; 275#L146-1 start_simulation_~kernel_st~0 := 3; 276#L242-2 assume 0 == ~M_E~0;~M_E~0 := 1; 319#L242-4 assume !(0 == ~T1_E~0); 320#L247-3 assume 0 == ~E_1~0;~E_1~0 := 1; 286#L252-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 287#L107-6 assume 1 == ~m_pc~0; 359#L108-2 assume 1 == ~M_E~0;is_master_triggered_~__retres1~0 := 1; 328#L118-2 is_master_triggered_#res := is_master_triggered_~__retres1~0; 317#L119-2 activate_threads_#t~ret10 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 318#L292-6 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 337#L292-8 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 321#L126-6 assume 1 == ~t1_pc~0; 322#L127-2 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 327#L137-2 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 357#L138-2 activate_threads_#t~ret11 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 347#L300-6 assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 348#L300-8 assume 1 == ~M_E~0;~M_E~0 := 2; 288#L265-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 289#L270-3 assume 1 == ~E_1~0;~E_1~0 := 2; 305#L275-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 294#L171-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 296#L183-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 356#L184-1 start_simulation_#t~ret13 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret13;havoc start_simulation_#t~ret13; 364#L415 assume !(0 == start_simulation_~tmp~3); 273#L415-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret12, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 274#L171-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 311#L183-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 312#L184-2 stop_simulation_#t~ret12 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret12;havoc stop_simulation_#t~ret12; 260#L370 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 261#L377 stop_simulation_#res := stop_simulation_~__retres2~0; 268#L378 start_simulation_#t~ret14 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 269#L428 assume !(0 != start_simulation_~tmp___0~1); 271#L396-1 [2021-10-28 23:40:31,881 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:40:31,881 INFO L85 PathProgramCache]: Analyzing trace with hash -1890238808, now seen corresponding path program 1 times [2021-10-28 23:40:31,881 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:40:31,882 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [534053016] [2021-10-28 23:40:31,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:40:31,883 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:40:31,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:40:31,977 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:40:31,978 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:40:31,978 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [534053016] [2021-10-28 23:40:31,978 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [534053016] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:40:31,978 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:40:31,979 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:40:31,979 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1769203407] [2021-10-28 23:40:31,980 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 23:40:31,983 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:40:31,983 INFO L85 PathProgramCache]: Analyzing trace with hash 500242205, now seen corresponding path program 1 times [2021-10-28 23:40:31,983 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:40:31,984 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [810596523] [2021-10-28 23:40:31,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:40:31,985 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:40:32,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:40:32,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:40:32,070 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:40:32,076 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [810596523] [2021-10-28 23:40:32,076 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [810596523] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:40:32,077 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:40:32,077 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 23:40:32,077 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2145252835] [2021-10-28 23:40:32,078 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 23:40:32,078 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:40:32,079 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:40:32,080 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:40:32,080 INFO L87 Difference]: Start difference. First operand 116 states and 172 transitions. cyclomatic complexity: 57 Second operand has 4 states, 4 states have (on average 5.75) internal successors, (23), 3 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:40:32,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:40:32,230 INFO L93 Difference]: Finished difference Result 285 states and 404 transitions. [2021-10-28 23:40:32,231 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 23:40:32,231 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 285 states and 404 transitions. [2021-10-28 23:40:32,234 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 240 [2021-10-28 23:40:32,241 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 285 states to 285 states and 404 transitions. [2021-10-28 23:40:32,241 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 285 [2021-10-28 23:40:32,243 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 285 [2021-10-28 23:40:32,243 INFO L73 IsDeterministic]: Start isDeterministic. Operand 285 states and 404 transitions. [2021-10-28 23:40:32,251 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 23:40:32,251 INFO L681 BuchiCegarLoop]: Abstraction has 285 states and 404 transitions. [2021-10-28 23:40:32,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 285 states and 404 transitions. [2021-10-28 23:40:32,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 285 to 266. [2021-10-28 23:40:32,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 266 states, 266 states have (on average 1.4323308270676691) internal successors, (381), 265 states have internal predecessors, (381), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:40:32,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 266 states to 266 states and 381 transitions. [2021-10-28 23:40:32,278 INFO L704 BuchiCegarLoop]: Abstraction has 266 states and 381 transitions. [2021-10-28 23:40:32,278 INFO L587 BuchiCegarLoop]: Abstraction has 266 states and 381 transitions. [2021-10-28 23:40:32,278 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-10-28 23:40:32,278 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 266 states and 381 transitions. [2021-10-28 23:40:32,281 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 238 [2021-10-28 23:40:32,281 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:40:32,281 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:40:32,283 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:40:32,284 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:40:32,285 INFO L791 eck$LassoCheckResult]: Stem: 788#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(21);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_1~0 := 2; 727#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 728#L359 havoc start_simulation_#t~ret13, start_simulation_#t~ret14, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 775#L146 assume 1 == ~m_i~0;~m_st~0 := 0; 769#L153-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 770#L158-1 assume !(0 == ~M_E~0); 737#L242-1 assume !(0 == ~T1_E~0); 738#L247-1 assume !(0 == ~E_1~0); 722#L252-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 723#L107 assume !(1 == ~m_pc~0); 753#L107-2 is_master_triggered_~__retres1~0 := 0; 754#L118 is_master_triggered_#res := is_master_triggered_~__retres1~0; 782#L119 activate_threads_#t~ret10 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 777#L292 assume !(0 != activate_threads_~tmp~1); 729#L292-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 730#L126 assume !(1 == ~t1_pc~0); 757#L126-2 is_transmit1_triggered_~__retres1~1 := 0; 747#L137 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 748#L138 activate_threads_#t~ret11 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 749#L300 assume !(0 != activate_threads_~tmp___0~0); 755#L300-2 assume !(1 == ~M_E~0); 786#L265-1 assume !(1 == ~T1_E~0); 682#L270-1 assume !(1 == ~E_1~0); 683#L396-1 [2021-10-28 23:40:32,285 INFO L793 eck$LassoCheckResult]: Loop: 683#L396-1 assume !false; 789#L397 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp_ndt_1~0, eval_#t~nondet9, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 691#L217 assume !false; 692#L194 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 783#L171 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 669#L183 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 717#L184 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret7;havoc eval_#t~ret7; 758#L198 assume !(0 != eval_~tmp~0); 759#L232 start_simulation_~kernel_st~0 := 2; 688#L146-1 start_simulation_~kernel_st~0 := 3; 689#L242-2 assume 0 == ~M_E~0;~M_E~0 := 1; 735#L242-4 assume !(0 == ~T1_E~0); 736#L247-3 assume 0 == ~E_1~0;~E_1~0 := 1; 701#L252-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 702#L107-6 assume !(1 == ~m_pc~0); 785#L107-8 is_master_triggered_~__retres1~0 := 0; 741#L118-2 is_master_triggered_#res := is_master_triggered_~__retres1~0; 742#L119-2 activate_threads_#t~ret10 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 905#L292-6 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 904#L292-8 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 903#L126-6 assume !(1 == ~t1_pc~0); 901#L126-8 is_transmit1_triggered_~__retres1~1 := 0; 868#L137-2 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 864#L138-2 activate_threads_#t~ret11 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 861#L300-6 assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 856#L300-8 assume 1 == ~M_E~0;~M_E~0 := 2; 851#L265-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 847#L270-3 assume 1 == ~E_1~0;~E_1~0 := 2; 842#L275-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 837#L171-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 831#L183-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 827#L184-1 start_simulation_#t~ret13 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret13;havoc start_simulation_#t~ret13; 822#L415 assume !(0 == start_simulation_~tmp~3); 823#L415-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret12, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 891#L171-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 889#L183-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 887#L184-2 stop_simulation_#t~ret12 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret12;havoc stop_simulation_#t~ret12; 885#L370 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 884#L377 stop_simulation_#res := stop_simulation_~__retres2~0; 883#L378 start_simulation_#t~ret14 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 880#L428 assume !(0 != start_simulation_~tmp___0~1); 683#L396-1 [2021-10-28 23:40:32,286 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:40:32,286 INFO L85 PathProgramCache]: Analyzing trace with hash -1545413561, now seen corresponding path program 1 times [2021-10-28 23:40:32,287 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:40:32,287 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [885355540] [2021-10-28 23:40:32,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:40:32,288 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:40:32,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:40:32,316 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:40:32,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:40:32,377 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:40:32,378 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:40:32,378 INFO L85 PathProgramCache]: Analyzing trace with hash -2145764385, now seen corresponding path program 1 times [2021-10-28 23:40:32,379 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:40:32,379 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1007850701] [2021-10-28 23:40:32,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:40:32,379 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:40:32,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:40:32,417 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:40:32,418 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:40:32,418 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1007850701] [2021-10-28 23:40:32,418 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1007850701] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:40:32,418 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:40:32,419 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 23:40:32,419 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [321073512] [2021-10-28 23:40:32,419 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 23:40:32,419 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:40:32,420 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 23:40:32,420 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:40:32,420 INFO L87 Difference]: Start difference. First operand 266 states and 381 transitions. cyclomatic complexity: 117 Second operand has 5 states, 5 states have (on average 8.2) internal successors, (41), 5 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:40:32,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:40:32,509 INFO L93 Difference]: Finished difference Result 449 states and 625 transitions. [2021-10-28 23:40:32,509 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-28 23:40:32,509 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 449 states and 625 transitions. [2021-10-28 23:40:32,516 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 416 [2021-10-28 23:40:32,519 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 449 states to 449 states and 625 transitions. [2021-10-28 23:40:32,519 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 449 [2021-10-28 23:40:32,520 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 449 [2021-10-28 23:40:32,520 INFO L73 IsDeterministic]: Start isDeterministic. Operand 449 states and 625 transitions. [2021-10-28 23:40:32,521 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 23:40:32,521 INFO L681 BuchiCegarLoop]: Abstraction has 449 states and 625 transitions. [2021-10-28 23:40:32,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 449 states and 625 transitions. [2021-10-28 23:40:32,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 449 to 275. [2021-10-28 23:40:32,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 275 states, 275 states have (on average 1.4181818181818182) internal successors, (390), 274 states have internal predecessors, (390), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:40:32,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 275 states to 275 states and 390 transitions. [2021-10-28 23:40:32,575 INFO L704 BuchiCegarLoop]: Abstraction has 275 states and 390 transitions. [2021-10-28 23:40:32,575 INFO L587 BuchiCegarLoop]: Abstraction has 275 states and 390 transitions. [2021-10-28 23:40:32,575 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-10-28 23:40:32,575 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 275 states and 390 transitions. [2021-10-28 23:40:32,577 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 247 [2021-10-28 23:40:32,577 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:40:32,577 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:40:32,578 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:40:32,578 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:40:32,578 INFO L791 eck$LassoCheckResult]: Stem: 1535#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(21);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_1~0 := 2; 1460#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 1461#L359 havoc start_simulation_#t~ret13, start_simulation_#t~ret14, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 1511#L146 assume 1 == ~m_i~0;~m_st~0 := 0; 1505#L153-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 1506#L158-1 assume !(0 == ~M_E~0); 1470#L242-1 assume !(0 == ~T1_E~0); 1471#L247-1 assume !(0 == ~E_1~0); 1455#L252-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 1456#L107 assume !(1 == ~m_pc~0); 1487#L107-2 is_master_triggered_~__retres1~0 := 0; 1488#L118 is_master_triggered_#res := is_master_triggered_~__retres1~0; 1518#L119 activate_threads_#t~ret10 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 1513#L292 assume !(0 != activate_threads_~tmp~1); 1462#L292-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 1463#L126 assume !(1 == ~t1_pc~0); 1492#L126-2 is_transmit1_triggered_~__retres1~1 := 0; 1481#L137 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 1482#L138 activate_threads_#t~ret11 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 1483#L300 assume !(0 != activate_threads_~tmp___0~0); 1489#L300-2 assume !(1 == ~M_E~0); 1527#L265-1 assume !(1 == ~T1_E~0); 1414#L270-1 assume !(1 == ~E_1~0); 1415#L396-1 [2021-10-28 23:40:32,578 INFO L793 eck$LassoCheckResult]: Loop: 1415#L396-1 assume !false; 1628#L397 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp_ndt_1~0, eval_#t~nondet9, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 1627#L217 assume !false; 1589#L194 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 1584#L171 assume !(0 == ~m_st~0); 1580#L175 assume !(0 == ~t1_st~0);exists_runnable_thread_~__retres1~2 := 0; 1571#L183 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 1567#L184 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret7;havoc eval_#t~ret7; 1565#L198 assume !(0 != eval_~tmp~0); 1562#L232 start_simulation_~kernel_st~0 := 2; 1560#L146-1 start_simulation_~kernel_st~0 := 3; 1558#L242-2 assume 0 == ~M_E~0;~M_E~0 := 1; 1556#L242-4 assume !(0 == ~T1_E~0); 1475#L247-3 assume 0 == ~E_1~0;~E_1~0 := 1; 1429#L252-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 1430#L107-6 assume !(1 == ~m_pc~0); 1526#L107-8 is_master_triggered_~__retres1~0 := 0; 1528#L118-2 is_master_triggered_#res := is_master_triggered_~__retres1~0; 1464#L119-2 activate_threads_#t~ret10 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 1465#L292-6 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 1522#L292-8 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 1523#L126-6 assume !(1 == ~t1_pc~0); 1473#L126-8 is_transmit1_triggered_~__retres1~1 := 0; 1474#L137-2 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 1514#L138-2 activate_threads_#t~ret11 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 1515#L300-6 assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 1533#L300-8 assume 1 == ~M_E~0;~M_E~0 := 2; 1534#L265-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 1449#L270-3 assume 1 == ~E_1~0;~E_1~0 := 2; 1450#L275-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 1437#L171-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 1439#L183-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 1512#L184-1 start_simulation_#t~ret13 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret13;havoc start_simulation_#t~ret13; 1529#L415 assume !(0 == start_simulation_~tmp~3); 1530#L415-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret12, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 1643#L171-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 1642#L183-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 1640#L184-2 stop_simulation_#t~ret12 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret12;havoc stop_simulation_#t~ret12; 1638#L370 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1636#L377 stop_simulation_#res := stop_simulation_~__retres2~0; 1635#L378 start_simulation_#t~ret14 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 1632#L428 assume !(0 != start_simulation_~tmp___0~1); 1415#L396-1 [2021-10-28 23:40:32,579 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:40:32,579 INFO L85 PathProgramCache]: Analyzing trace with hash -1545413561, now seen corresponding path program 2 times [2021-10-28 23:40:32,579 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:40:32,579 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1149995020] [2021-10-28 23:40:32,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:40:32,580 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:40:32,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:40:32,590 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:40:32,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:40:32,606 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:40:32,607 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:40:32,607 INFO L85 PathProgramCache]: Analyzing trace with hash -977189106, now seen corresponding path program 1 times [2021-10-28 23:40:32,607 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:40:32,607 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1678711318] [2021-10-28 23:40:32,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:40:32,608 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:40:32,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:40:32,676 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:40:32,676 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:40:32,676 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1678711318] [2021-10-28 23:40:32,676 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1678711318] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:40:32,677 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:40:32,677 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 23:40:32,677 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1390923344] [2021-10-28 23:40:32,677 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 23:40:32,677 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:40:32,678 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 23:40:32,678 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:40:32,678 INFO L87 Difference]: Start difference. First operand 275 states and 390 transitions. cyclomatic complexity: 117 Second operand has 5 states, 5 states have (on average 8.4) internal successors, (42), 5 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:40:32,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:40:32,758 INFO L93 Difference]: Finished difference Result 583 states and 817 transitions. [2021-10-28 23:40:32,758 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 23:40:32,758 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 583 states and 817 transitions. [2021-10-28 23:40:32,763 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 555 [2021-10-28 23:40:32,768 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 583 states to 583 states and 817 transitions. [2021-10-28 23:40:32,768 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 583 [2021-10-28 23:40:32,768 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 583 [2021-10-28 23:40:32,769 INFO L73 IsDeterministic]: Start isDeterministic. Operand 583 states and 817 transitions. [2021-10-28 23:40:32,769 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 23:40:32,770 INFO L681 BuchiCegarLoop]: Abstraction has 583 states and 817 transitions. [2021-10-28 23:40:32,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 583 states and 817 transitions. [2021-10-28 23:40:32,775 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 583 to 293. [2021-10-28 23:40:32,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 293 states, 293 states have (on average 1.3822525597269624) internal successors, (405), 292 states have internal predecessors, (405), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:40:32,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 293 states to 293 states and 405 transitions. [2021-10-28 23:40:32,778 INFO L704 BuchiCegarLoop]: Abstraction has 293 states and 405 transitions. [2021-10-28 23:40:32,778 INFO L587 BuchiCegarLoop]: Abstraction has 293 states and 405 transitions. [2021-10-28 23:40:32,778 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-10-28 23:40:32,778 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 293 states and 405 transitions. [2021-10-28 23:40:32,780 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 265 [2021-10-28 23:40:32,780 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:40:32,780 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:40:32,780 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:40:32,781 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:40:32,781 INFO L791 eck$LassoCheckResult]: Stem: 2398#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(21);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_1~0 := 2; 2331#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 2332#L359 havoc start_simulation_#t~ret13, start_simulation_#t~ret14, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 2379#L146 assume 1 == ~m_i~0;~m_st~0 := 0; 2375#L153-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 2376#L158-1 assume !(0 == ~M_E~0); 2341#L242-1 assume !(0 == ~T1_E~0); 2342#L247-1 assume !(0 == ~E_1~0); 2326#L252-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 2327#L107 assume !(1 == ~m_pc~0); 2357#L107-2 is_master_triggered_~__retres1~0 := 0; 2358#L118 is_master_triggered_#res := is_master_triggered_~__retres1~0; 2384#L119 activate_threads_#t~ret10 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 2381#L292 assume !(0 != activate_threads_~tmp~1); 2333#L292-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 2334#L126 assume !(1 == ~t1_pc~0); 2362#L126-2 is_transmit1_triggered_~__retres1~1 := 0; 2351#L137 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 2352#L138 activate_threads_#t~ret11 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 2353#L300 assume !(0 != activate_threads_~tmp___0~0); 2359#L300-2 assume !(1 == ~M_E~0); 2395#L265-1 assume !(1 == ~T1_E~0); 2285#L270-1 assume !(1 == ~E_1~0); 2286#L396-1 [2021-10-28 23:40:32,781 INFO L793 eck$LassoCheckResult]: Loop: 2286#L396-1 assume !false; 2484#L397 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp_ndt_1~0, eval_#t~nondet9, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 2483#L217 assume !false; 2482#L194 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 2478#L171 assume !(0 == ~m_st~0); 2479#L175 assume !(0 == ~t1_st~0);exists_runnable_thread_~__retres1~2 := 0; 2480#L183 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 2472#L184 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret7;havoc eval_#t~ret7; 2473#L198 assume !(0 != eval_~tmp~0); 2493#L232 start_simulation_~kernel_st~0 := 2; 2481#L146-1 start_simulation_~kernel_st~0 := 3; 2477#L242-2 assume 0 == ~M_E~0;~M_E~0 := 1; 2474#L242-4 assume !(0 == ~T1_E~0); 2471#L247-3 assume 0 == ~E_1~0;~E_1~0 := 1; 2301#L252-3 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 2302#L107-6 assume !(1 == ~m_pc~0); 2392#L107-8 is_master_triggered_~__retres1~0 := 0; 2436#L118-2 is_master_triggered_#res := is_master_triggered_~__retres1~0; 2435#L119-2 activate_threads_#t~ret10 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 2434#L292-6 assume !(0 != activate_threads_~tmp~1); 2433#L292-8 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 2432#L126-6 assume !(1 == ~t1_pc~0); 2431#L126-8 is_transmit1_triggered_~__retres1~1 := 0; 2430#L137-2 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 2429#L138-2 activate_threads_#t~ret11 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 2428#L300-6 assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 2427#L300-8 assume 1 == ~M_E~0;~M_E~0 := 2; 2426#L265-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 2425#L270-3 assume 1 == ~E_1~0;~E_1~0 := 2; 2424#L275-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 2423#L171-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 2421#L183-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 2420#L184-1 start_simulation_#t~ret13 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret13;havoc start_simulation_#t~ret13; 2416#L415 assume !(0 == start_simulation_~tmp~3); 2417#L415-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret12, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 2495#L171-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 2494#L183-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 2492#L184-2 stop_simulation_#t~ret12 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret12;havoc stop_simulation_#t~ret12; 2491#L370 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 2490#L377 stop_simulation_#res := stop_simulation_~__retres2~0; 2487#L378 start_simulation_#t~ret14 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret14;havoc start_simulation_#t~ret14; 2486#L428 assume !(0 != start_simulation_~tmp___0~1); 2286#L396-1 [2021-10-28 23:40:32,781 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:40:32,781 INFO L85 PathProgramCache]: Analyzing trace with hash -1545413561, now seen corresponding path program 3 times [2021-10-28 23:40:32,782 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:40:32,782 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [279649459] [2021-10-28 23:40:32,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:40:32,782 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:40:32,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:40:32,791 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:40:32,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:40:32,805 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:40:32,805 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:40:32,805 INFO L85 PathProgramCache]: Analyzing trace with hash 1512339856, now seen corresponding path program 1 times [2021-10-28 23:40:32,805 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:40:32,806 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1198729878] [2021-10-28 23:40:32,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:40:32,806 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:40:32,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:40:32,832 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:40:32,832 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:40:32,832 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1198729878] [2021-10-28 23:40:32,833 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1198729878] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:40:32,833 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:40:32,833 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:40:32,833 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [949473133] [2021-10-28 23:40:32,833 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-10-28 23:40:32,834 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:40:32,834 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:40:32,834 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:40:32,834 INFO L87 Difference]: Start difference. First operand 293 states and 405 transitions. cyclomatic complexity: 114 Second operand has 3 states, 3 states have (on average 14.0) internal successors, (42), 3 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:40:32,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:40:32,862 INFO L93 Difference]: Finished difference Result 433 states and 584 transitions. [2021-10-28 23:40:32,863 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:40:32,863 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 433 states and 584 transitions. [2021-10-28 23:40:32,866 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 403 [2021-10-28 23:40:32,870 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 433 states to 433 states and 584 transitions. [2021-10-28 23:40:32,870 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 433 [2021-10-28 23:40:32,871 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 433 [2021-10-28 23:40:32,871 INFO L73 IsDeterministic]: Start isDeterministic. Operand 433 states and 584 transitions. [2021-10-28 23:40:32,871 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 23:40:32,871 INFO L681 BuchiCegarLoop]: Abstraction has 433 states and 584 transitions. [2021-10-28 23:40:32,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 433 states and 584 transitions. [2021-10-28 23:40:32,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 433 to 414. [2021-10-28 23:40:32,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 414 states, 414 states have (on average 1.355072463768116) internal successors, (561), 413 states have internal predecessors, (561), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:40:32,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 414 states to 414 states and 561 transitions. [2021-10-28 23:40:32,880 INFO L704 BuchiCegarLoop]: Abstraction has 414 states and 561 transitions. [2021-10-28 23:40:32,880 INFO L587 BuchiCegarLoop]: Abstraction has 414 states and 561 transitions. [2021-10-28 23:40:32,880 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-10-28 23:40:32,880 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 414 states and 561 transitions. [2021-10-28 23:40:32,882 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 384 [2021-10-28 23:40:32,882 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:40:32,882 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:40:32,883 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:40:32,883 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:40:32,883 INFO L791 eck$LassoCheckResult]: Stem: 3124#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(21);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_1~0 := 2; 3059#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 3060#L359 havoc start_simulation_#t~ret13, start_simulation_#t~ret14, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 3105#L146 assume 1 == ~m_i~0;~m_st~0 := 0; 3103#L153-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 3104#L158-1 assume !(0 == ~M_E~0); 3069#L242-1 assume !(0 == ~T1_E~0); 3070#L247-1 assume !(0 == ~E_1~0); 3052#L252-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 3053#L107 assume !(1 == ~m_pc~0); 3085#L107-2 is_master_triggered_~__retres1~0 := 0; 3086#L118 is_master_triggered_#res := is_master_triggered_~__retres1~0; 3112#L119 activate_threads_#t~ret10 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 3108#L292 assume !(0 != activate_threads_~tmp~1); 3061#L292-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 3062#L126 assume !(1 == ~t1_pc~0); 3089#L126-2 is_transmit1_triggered_~__retres1~1 := 0; 3077#L137 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 3078#L138 activate_threads_#t~ret11 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 3079#L300 assume !(0 != activate_threads_~tmp___0~0); 3087#L300-2 assume !(1 == ~M_E~0); 3120#L265-1 assume !(1 == ~T1_E~0); 3017#L270-1 assume !(1 == ~E_1~0); 3018#L396-1 assume !false; 3180#L397 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp_ndt_1~0, eval_#t~nondet9, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 3175#L217 [2021-10-28 23:40:32,883 INFO L793 eck$LassoCheckResult]: Loop: 3175#L217 assume !false; 3173#L194 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 3171#L171 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 3170#L183 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 3167#L184 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret7;havoc eval_#t~ret7; 3164#L198 assume 0 != eval_~tmp~0; 3156#L198-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet8;havoc eval_#t~nondet8; 3154#L206 assume !(0 != eval_~tmp_ndt_1~0); 3155#L203 assume !(0 == ~t1_st~0); 3175#L217 [2021-10-28 23:40:32,884 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:40:32,884 INFO L85 PathProgramCache]: Analyzing trace with hash 916255881, now seen corresponding path program 1 times [2021-10-28 23:40:32,884 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:40:32,884 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1092208702] [2021-10-28 23:40:32,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:40:32,885 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:40:32,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:40:32,893 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:40:32,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:40:32,911 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:40:32,912 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:40:32,912 INFO L85 PathProgramCache]: Analyzing trace with hash 1324144305, now seen corresponding path program 1 times [2021-10-28 23:40:32,912 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:40:32,912 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1762395817] [2021-10-28 23:40:32,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:40:32,912 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:40:32,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:40:32,915 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:40:32,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:40:32,919 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:40:32,919 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:40:32,920 INFO L85 PathProgramCache]: Analyzing trace with hash -1901692119, now seen corresponding path program 1 times [2021-10-28 23:40:32,920 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:40:32,920 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [97198991] [2021-10-28 23:40:32,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:40:32,920 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:40:32,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:40:32,960 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:40:32,960 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:40:32,961 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [97198991] [2021-10-28 23:40:32,961 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [97198991] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:40:32,961 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:40:32,961 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-28 23:40:32,962 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [119565811] [2021-10-28 23:40:33,028 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:40:33,029 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:40:33,029 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:40:33,029 INFO L87 Difference]: Start difference. First operand 414 states and 561 transitions. cyclomatic complexity: 150 Second operand has 3 states, 2 states have (on average 17.0) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:40:33,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:40:33,065 INFO L93 Difference]: Finished difference Result 718 states and 961 transitions. [2021-10-28 23:40:33,065 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:40:33,065 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 718 states and 961 transitions. [2021-10-28 23:40:33,071 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 628 [2021-10-28 23:40:33,077 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 718 states to 718 states and 961 transitions. [2021-10-28 23:40:33,078 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 718 [2021-10-28 23:40:33,078 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 718 [2021-10-28 23:40:33,078 INFO L73 IsDeterministic]: Start isDeterministic. Operand 718 states and 961 transitions. [2021-10-28 23:40:33,080 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 23:40:33,080 INFO L681 BuchiCegarLoop]: Abstraction has 718 states and 961 transitions. [2021-10-28 23:40:33,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 718 states and 961 transitions. [2021-10-28 23:40:33,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 718 to 649. [2021-10-28 23:40:33,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 649 states, 649 states have (on average 1.3543913713405238) internal successors, (879), 648 states have internal predecessors, (879), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:40:33,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 649 states to 649 states and 879 transitions. [2021-10-28 23:40:33,094 INFO L704 BuchiCegarLoop]: Abstraction has 649 states and 879 transitions. [2021-10-28 23:40:33,095 INFO L587 BuchiCegarLoop]: Abstraction has 649 states and 879 transitions. [2021-10-28 23:40:33,095 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-10-28 23:40:33,095 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 649 states and 879 transitions. [2021-10-28 23:40:33,099 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 583 [2021-10-28 23:40:33,099 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:40:33,099 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:40:33,100 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:40:33,100 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:40:33,100 INFO L791 eck$LassoCheckResult]: Stem: 4278#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(21);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_1~0 := 2; 4199#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 4200#L359 havoc start_simulation_#t~ret13, start_simulation_#t~ret14, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 4251#L146 assume 1 == ~m_i~0;~m_st~0 := 0; 4248#L153-1 assume !(1 == ~t1_i~0);~t1_st~0 := 2; 4249#L158-1 assume !(0 == ~M_E~0); 4209#L242-1 assume !(0 == ~T1_E~0); 4210#L247-1 assume !(0 == ~E_1~0); 4194#L252-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 4195#L107 assume !(1 == ~m_pc~0); 4228#L107-2 is_master_triggered_~__retres1~0 := 0; 4229#L118 is_master_triggered_#res := is_master_triggered_~__retres1~0; 4279#L119 activate_threads_#t~ret10 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 4280#L292 assume !(0 != activate_threads_~tmp~1); 4201#L292-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 4202#L126 assume !(1 == ~t1_pc~0); 4233#L126-2 is_transmit1_triggered_~__retres1~1 := 0; 4287#L137 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 4221#L138 activate_threads_#t~ret11 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 4222#L300 assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 4230#L300-2 assume !(1 == ~M_E~0); 4270#L265-1 assume !(1 == ~T1_E~0); 4156#L270-1 assume !(1 == ~E_1~0); 4157#L396-1 assume !false; 4745#L397 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp_ndt_1~0, eval_#t~nondet9, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 4224#L217 [2021-10-28 23:40:33,100 INFO L793 eck$LassoCheckResult]: Loop: 4224#L217 assume !false; 4742#L194 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 4740#L171 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 4738#L183 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 4736#L184 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret7;havoc eval_#t~ret7; 4734#L198 assume 0 != eval_~tmp~0; 4732#L198-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet8;havoc eval_#t~nondet8; 4191#L206 assume !(0 != eval_~tmp_ndt_1~0); 4192#L203 assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet9;havoc eval_#t~nondet9; 4223#L220 assume !(0 != eval_~tmp_ndt_2~0); 4224#L217 [2021-10-28 23:40:33,100 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:40:33,101 INFO L85 PathProgramCache]: Analyzing trace with hash 1281699405, now seen corresponding path program 1 times [2021-10-28 23:40:33,101 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:40:33,101 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [890321309] [2021-10-28 23:40:33,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:40:33,101 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:40:33,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:40:33,120 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:40:33,120 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:40:33,121 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [890321309] [2021-10-28 23:40:33,121 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [890321309] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:40:33,121 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:40:33,121 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:40:33,121 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [174295508] [2021-10-28 23:40:33,122 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-10-28 23:40:33,122 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:40:33,122 INFO L85 PathProgramCache]: Analyzing trace with hash -1901200370, now seen corresponding path program 1 times [2021-10-28 23:40:33,122 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:40:33,122 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [218322107] [2021-10-28 23:40:33,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:40:33,123 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:40:33,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:40:33,126 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:40:33,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:40:33,130 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:40:33,198 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:40:33,199 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:40:33,199 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:40:33,199 INFO L87 Difference]: Start difference. First operand 649 states and 879 transitions. cyclomatic complexity: 234 Second operand has 3 states, 3 states have (on average 8.333333333333334) internal successors, (25), 3 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:40:33,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:40:33,207 INFO L93 Difference]: Finished difference Result 543 states and 738 transitions. [2021-10-28 23:40:33,208 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:40:33,208 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 543 states and 738 transitions. [2021-10-28 23:40:33,213 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 513 [2021-10-28 23:40:33,217 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 543 states to 543 states and 738 transitions. [2021-10-28 23:40:33,218 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 543 [2021-10-28 23:40:33,218 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 543 [2021-10-28 23:40:33,218 INFO L73 IsDeterministic]: Start isDeterministic. Operand 543 states and 738 transitions. [2021-10-28 23:40:33,219 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-10-28 23:40:33,219 INFO L681 BuchiCegarLoop]: Abstraction has 543 states and 738 transitions. [2021-10-28 23:40:33,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 543 states and 738 transitions. [2021-10-28 23:40:33,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 543 to 543. [2021-10-28 23:40:33,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 543 states, 543 states have (on average 1.3591160220994476) internal successors, (738), 542 states have internal predecessors, (738), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:40:33,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 543 states to 543 states and 738 transitions. [2021-10-28 23:40:33,232 INFO L704 BuchiCegarLoop]: Abstraction has 543 states and 738 transitions. [2021-10-28 23:40:33,232 INFO L587 BuchiCegarLoop]: Abstraction has 543 states and 738 transitions. [2021-10-28 23:40:33,232 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-10-28 23:40:33,232 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 543 states and 738 transitions. [2021-10-28 23:40:33,235 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 513 [2021-10-28 23:40:33,235 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-10-28 23:40:33,235 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-10-28 23:40:33,236 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:40:33,236 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:40:33,236 INFO L791 eck$LassoCheckResult]: Stem: 5471#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(21);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_1~0 := 2; 5396#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 5397#L359 havoc start_simulation_#t~ret13, start_simulation_#t~ret14, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 5448#L146 assume 1 == ~m_i~0;~m_st~0 := 0; 5444#L153-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 5445#L158-1 assume !(0 == ~M_E~0); 5406#L242-1 assume !(0 == ~T1_E~0); 5407#L247-1 assume !(0 == ~E_1~0); 5391#L252-1 havoc activate_threads_#t~ret10, activate_threads_#t~ret11, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 5392#L107 assume !(1 == ~m_pc~0); 5425#L107-2 is_master_triggered_~__retres1~0 := 0; 5426#L118 is_master_triggered_#res := is_master_triggered_~__retres1~0; 5457#L119 activate_threads_#t~ret10 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret10;havoc activate_threads_#t~ret10; 5450#L292 assume !(0 != activate_threads_~tmp~1); 5398#L292-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 5399#L126 assume !(1 == ~t1_pc~0); 5429#L126-2 is_transmit1_triggered_~__retres1~1 := 0; 5417#L137 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 5418#L138 activate_threads_#t~ret11 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret11;havoc activate_threads_#t~ret11; 5419#L300 assume !(0 != activate_threads_~tmp___0~0); 5427#L300-2 assume !(1 == ~M_E~0); 5466#L265-1 assume !(1 == ~T1_E~0); 5354#L270-1 assume !(1 == ~E_1~0); 5355#L396-1 assume !false; 5590#L397 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp_ndt_1~0, eval_#t~nondet9, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 5589#L217 [2021-10-28 23:40:33,236 INFO L793 eck$LassoCheckResult]: Loop: 5589#L217 assume !false; 5586#L194 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 5584#L171 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 5582#L183 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 5580#L184 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret7;havoc eval_#t~ret7; 5578#L198 assume 0 != eval_~tmp~0; 5576#L198-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet8;havoc eval_#t~nondet8; 5573#L206 assume !(0 != eval_~tmp_ndt_1~0); 5574#L203 assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet9;havoc eval_#t~nondet9; 5591#L220 assume !(0 != eval_~tmp_ndt_2~0); 5589#L217 [2021-10-28 23:40:33,236 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:40:33,237 INFO L85 PathProgramCache]: Analyzing trace with hash 916255881, now seen corresponding path program 2 times [2021-10-28 23:40:33,237 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:40:33,237 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1939635462] [2021-10-28 23:40:33,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:40:33,237 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:40:33,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:40:33,244 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:40:33,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:40:33,254 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:40:33,255 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:40:33,255 INFO L85 PathProgramCache]: Analyzing trace with hash -1901200370, now seen corresponding path program 2 times [2021-10-28 23:40:33,255 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:40:33,255 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1036223092] [2021-10-28 23:40:33,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:40:33,256 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:40:33,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:40:33,259 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:40:33,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:40:33,262 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:40:33,263 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:40:33,263 INFO L85 PathProgramCache]: Analyzing trace with hash 1177085590, now seen corresponding path program 1 times [2021-10-28 23:40:33,263 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:40:33,263 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1665252106] [2021-10-28 23:40:33,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:40:33,264 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:40:33,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:40:33,274 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:40:33,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:40:33,288 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:40:34,275 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 28.10 11:40:34 BoogieIcfgContainer [2021-10-28 23:40:34,275 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2021-10-28 23:40:34,276 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-28 23:40:34,276 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-28 23:40:34,276 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-28 23:40:34,277 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 11:40:31" (3/4) ... [2021-10-28 23:40:34,281 INFO L134 WitnessPrinter]: Generating witness for non-termination counterexample [2021-10-28 23:40:34,366 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46203f8f-bc62-42ad-b1e2-53975d7dace2/bin/uautomizer-GMMbpWq8iD/witness.graphml [2021-10-28 23:40:34,366 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-28 23:40:34,368 INFO L168 Benchmark]: Toolchain (without parser) took 4167.05 ms. Allocated memory was 107.0 MB in the beginning and 138.4 MB in the end (delta: 31.5 MB). Free memory was 71.3 MB in the beginning and 78.1 MB in the end (delta: -6.8 MB). Peak memory consumption was 24.2 MB. Max. memory is 16.1 GB. [2021-10-28 23:40:34,368 INFO L168 Benchmark]: CDTParser took 0.22 ms. Allocated memory is still 107.0 MB. Free memory is still 87.9 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-10-28 23:40:34,369 INFO L168 Benchmark]: CACSL2BoogieTranslator took 320.05 ms. Allocated memory is still 107.0 MB. Free memory was 71.1 MB in the beginning and 82.4 MB in the end (delta: -11.3 MB). Peak memory consumption was 12.6 MB. Max. memory is 16.1 GB. [2021-10-28 23:40:34,369 INFO L168 Benchmark]: Boogie Procedure Inliner took 42.09 ms. Allocated memory is still 107.0 MB. Free memory was 82.4 MB in the beginning and 80.1 MB in the end (delta: 2.3 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 23:40:34,370 INFO L168 Benchmark]: Boogie Preprocessor took 32.04 ms. Allocated memory is still 107.0 MB. Free memory was 80.1 MB in the beginning and 78.3 MB in the end (delta: 1.8 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 23:40:34,371 INFO L168 Benchmark]: RCFGBuilder took 723.70 ms. Allocated memory is still 107.0 MB. Free memory was 78.3 MB in the beginning and 61.2 MB in the end (delta: 17.1 MB). Peak memory consumption was 16.8 MB. Max. memory is 16.1 GB. [2021-10-28 23:40:34,371 INFO L168 Benchmark]: BuchiAutomizer took 2949.93 ms. Allocated memory was 107.0 MB in the beginning and 138.4 MB in the end (delta: 31.5 MB). Free memory was 61.2 MB in the beginning and 80.3 MB in the end (delta: -19.1 MB). Peak memory consumption was 37.8 MB. Max. memory is 16.1 GB. [2021-10-28 23:40:34,372 INFO L168 Benchmark]: Witness Printer took 90.05 ms. Allocated memory is still 138.4 MB. Free memory was 80.3 MB in the beginning and 78.1 MB in the end (delta: 2.2 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 23:40:34,384 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22 ms. Allocated memory is still 107.0 MB. Free memory is still 87.9 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 320.05 ms. Allocated memory is still 107.0 MB. Free memory was 71.1 MB in the beginning and 82.4 MB in the end (delta: -11.3 MB). Peak memory consumption was 12.6 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 42.09 ms. Allocated memory is still 107.0 MB. Free memory was 82.4 MB in the beginning and 80.1 MB in the end (delta: 2.3 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 32.04 ms. Allocated memory is still 107.0 MB. Free memory was 80.1 MB in the beginning and 78.3 MB in the end (delta: 1.8 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 723.70 ms. Allocated memory is still 107.0 MB. Free memory was 78.3 MB in the beginning and 61.2 MB in the end (delta: 17.1 MB). Peak memory consumption was 16.8 MB. Max. memory is 16.1 GB. * BuchiAutomizer took 2949.93 ms. Allocated memory was 107.0 MB in the beginning and 138.4 MB in the end (delta: 31.5 MB). Free memory was 61.2 MB in the beginning and 80.3 MB in the end (delta: -19.1 MB). Peak memory consumption was 37.8 MB. Max. memory is 16.1 GB. * Witness Printer took 90.05 ms. Allocated memory is still 138.4 MB. Free memory was 80.3 MB in the beginning and 78.1 MB in the end (delta: 2.2 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 7 terminating modules (7 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.7 modules have a trivial ranking function, the largest among these consists of 5 locations. The remainder module has 543 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 2.8s and 8 iterations. TraceHistogramMax:1. Analysis of lassos took 2.0s. Construction of modules took 0.1s. Büchi inclusion checks took 0.2s. Highest rank in rank-based complementation 0. Minimization of det autom 7. Minimization of nondet autom 0. Automata minimization 0.1s AutomataMinimizationTime, 7 MinimizatonAttempts, 571 StatesRemovedByMinimization, 5 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had 649 states and ocurred in iteration 6. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 1196 SDtfs, 1610 SDslu, 1586 SDs, 0 SdLazy, 176 SolverSat, 62 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.1s Time LassoAnalysisResults: nont1 unkn0 SFLI3 SFLT0 conc1 concLT0 SILN1 SILU0 SILI2 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 193]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {NULL=9335} State at position 1 is {org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@7e31c8b0=0, NULL=9337, NULL=0, \result=0, __retres1=0, NULL=9335, tmp=1, \result=0, kernel_st=1, __retres1=0, tmp___0=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@6e3f4b97=0, t1_pc=0, __retres1=1, T1_E=2, NULL=9336, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@14ad263f=0, \result=0, E_1=2, NULL=0, tmp_ndt_1=0, NULL=0, NULL=0, M_E=2, tmp_ndt_2=0, tmp=0, NULL=9338, m_i=1, t1_st=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@3e44a2b=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@71876af3=0, m_st=0, NULL=0, tmp___0=0, tmp=0, __retres1=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@59313211=0, t1_i=1, m_pc=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@42e14657=0, \result=1} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 193]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L17] int m_pc = 0; [L18] int t1_pc = 0; [L19] int m_st ; [L20] int t1_st ; [L21] int m_i ; [L22] int t1_i ; [L23] int M_E = 2; [L24] int T1_E = 2; [L25] int E_1 = 2; [L441] int __retres1 ; [L356] m_i = 1 [L357] t1_i = 1 [L382] int kernel_st ; [L383] int tmp ; [L384] int tmp___0 ; [L388] kernel_st = 0 [L153] COND TRUE m_i == 1 [L154] m_st = 0 [L158] COND TRUE t1_i == 1 [L159] t1_st = 0 [L242] COND FALSE !(M_E == 0) [L247] COND FALSE !(T1_E == 0) [L252] COND FALSE !(E_1 == 0) [L285] int tmp ; [L286] int tmp___0 ; [L104] int __retres1 ; [L107] COND FALSE !(m_pc == 1) [L117] __retres1 = 0 [L119] return (__retres1); [L290] tmp = is_master_triggered() [L292] COND FALSE !(\read(tmp)) [L123] int __retres1 ; [L126] COND FALSE !(t1_pc == 1) [L136] __retres1 = 0 [L138] return (__retres1); [L298] tmp___0 = is_transmit1_triggered() [L300] COND FALSE !(\read(tmp___0)) [L265] COND FALSE !(M_E == 1) [L270] COND FALSE !(T1_E == 1) [L275] COND FALSE !(E_1 == 1) [L396] COND TRUE 1 [L399] kernel_st = 1 [L189] int tmp ; Loop: [L193] COND TRUE 1 [L168] int __retres1 ; [L171] COND TRUE m_st == 0 [L172] __retres1 = 1 [L184] return (__retres1); [L196] tmp = exists_runnable_thread() [L198] COND TRUE \read(tmp) [L203] COND TRUE m_st == 0 [L204] int tmp_ndt_1; [L205] tmp_ndt_1 = __VERIFIER_nondet_int() [L206] COND FALSE !(\read(tmp_ndt_1)) [L217] COND TRUE t1_st == 0 [L218] int tmp_ndt_2; [L219] tmp_ndt_2 = __VERIFIER_nondet_int() [L220] COND FALSE !(\read(tmp_ndt_2)) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2021-10-28 23:40:34,449 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_46203f8f-bc62-42ad-b1e2-53975d7dace2/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request...