./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version b2eff8ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6038b779-d533-4b12-a668-16c7a8635ef5/bin/uautomizer-GMMbpWq8iD/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6038b779-d533-4b12-a668-16c7a8635ef5/bin/uautomizer-GMMbpWq8iD/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6038b779-d533-4b12-a668-16c7a8635ef5/bin/uautomizer-GMMbpWq8iD/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6038b779-d533-4b12-a668-16c7a8635ef5/bin/uautomizer-GMMbpWq8iD/config/AutomizerReach.xml -i ../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6038b779-d533-4b12-a668-16c7a8635ef5/bin/uautomizer-GMMbpWq8iD/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6038b779-d533-4b12-a668-16c7a8635ef5/bin/uautomizer-GMMbpWq8iD --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 56ff1aa7a746f87b9c1b788d1f6729b885abef13666f4b3b25250b45ff5a6786 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.1-dev-b2eff8b [2021-10-28 23:30:40,740 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-28 23:30:40,742 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-28 23:30:40,801 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-28 23:30:40,802 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-28 23:30:40,807 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-28 23:30:40,809 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-28 23:30:40,813 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-28 23:30:40,815 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-28 23:30:40,823 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-28 23:30:40,824 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-28 23:30:40,826 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-28 23:30:40,826 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-28 23:30:40,829 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-28 23:30:40,832 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-28 23:30:40,839 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-28 23:30:40,842 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-28 23:30:40,843 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-28 23:30:40,845 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-28 23:30:40,852 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-28 23:30:40,854 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-28 23:30:40,856 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-28 23:30:40,859 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-28 23:30:40,860 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-28 23:30:40,867 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-28 23:30:40,867 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-28 23:30:40,868 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-28 23:30:40,869 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-28 23:30:40,870 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-28 23:30:40,871 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-28 23:30:40,872 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-28 23:30:40,872 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-28 23:30:40,873 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-28 23:30:40,875 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-28 23:30:40,876 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-28 23:30:40,876 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-28 23:30:40,877 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-28 23:30:40,877 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-28 23:30:40,878 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-28 23:30:40,879 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-28 23:30:40,879 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-28 23:30:40,881 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6038b779-d533-4b12-a668-16c7a8635ef5/bin/uautomizer-GMMbpWq8iD/config/svcomp-Reach-64bit-Automizer_Default.epf [2021-10-28 23:30:40,924 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-28 23:30:40,927 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-28 23:30:40,928 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-28 23:30:40,928 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-28 23:30:40,935 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-28 23:30:40,936 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-28 23:30:40,936 INFO L138 SettingsManager]: * Use SBE=true [2021-10-28 23:30:40,936 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-28 23:30:40,936 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-28 23:30:40,937 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-28 23:30:40,938 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-10-28 23:30:40,938 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-10-28 23:30:40,938 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-10-28 23:30:40,938 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-28 23:30:40,939 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-28 23:30:40,939 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-10-28 23:30:40,939 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-28 23:30:40,939 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-28 23:30:40,940 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-10-28 23:30:40,940 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-28 23:30:40,940 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-28 23:30:40,941 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-10-28 23:30:40,941 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-10-28 23:30:40,941 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-28 23:30:40,941 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-10-28 23:30:40,941 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-10-28 23:30:40,942 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2021-10-28 23:30:40,942 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-10-28 23:30:40,942 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-28 23:30:40,944 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6038b779-d533-4b12-a668-16c7a8635ef5/bin/uautomizer-GMMbpWq8iD/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6038b779-d533-4b12-a668-16c7a8635ef5/bin/uautomizer-GMMbpWq8iD Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 56ff1aa7a746f87b9c1b788d1f6729b885abef13666f4b3b25250b45ff5a6786 [2021-10-28 23:30:41,195 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-28 23:30:41,216 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-28 23:30:41,218 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-28 23:30:41,220 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-28 23:30:41,220 INFO L275 PluginConnector]: CDTParser initialized [2021-10-28 23:30:41,221 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6038b779-d533-4b12-a668-16c7a8635ef5/bin/uautomizer-GMMbpWq8iD/../../sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i [2021-10-28 23:30:41,312 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6038b779-d533-4b12-a668-16c7a8635ef5/bin/uautomizer-GMMbpWq8iD/data/7af3677dc/eaf90b1a226c441ca9c7d9dc9b038cbd/FLAG2aa56e005 [2021-10-28 23:30:42,115 INFO L306 CDTParser]: Found 1 translation units. [2021-10-28 23:30:42,116 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6038b779-d533-4b12-a668-16c7a8635ef5/sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i [2021-10-28 23:30:42,153 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6038b779-d533-4b12-a668-16c7a8635ef5/bin/uautomizer-GMMbpWq8iD/data/7af3677dc/eaf90b1a226c441ca9c7d9dc9b038cbd/FLAG2aa56e005 [2021-10-28 23:30:42,641 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6038b779-d533-4b12-a668-16c7a8635ef5/bin/uautomizer-GMMbpWq8iD/data/7af3677dc/eaf90b1a226c441ca9c7d9dc9b038cbd [2021-10-28 23:30:42,644 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-28 23:30:42,646 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-28 23:30:42,652 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-28 23:30:42,652 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-28 23:30:42,655 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-28 23:30:42,656 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 11:30:42" (1/1) ... [2021-10-28 23:30:42,657 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1a8fc000 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:30:42, skipping insertion in model container [2021-10-28 23:30:42,658 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 11:30:42" (1/1) ... [2021-10-28 23:30:42,666 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-28 23:30:42,774 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-28 23:30:43,576 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6038b779-d533-4b12-a668-16c7a8635ef5/sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i[115668,115681] [2021-10-28 23:30:44,247 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 23:30:44,271 INFO L203 MainTranslator]: Completed pre-run [2021-10-28 23:30:44,401 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6038b779-d533-4b12-a668-16c7a8635ef5/sv-benchmarks/c/ldv-validator-v0.6/linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i[115668,115681] [2021-10-28 23:30:44,623 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 23:30:44,772 INFO L208 MainTranslator]: Completed translation [2021-10-28 23:30:44,772 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:30:44 WrapperNode [2021-10-28 23:30:44,772 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-28 23:30:44,775 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-28 23:30:44,775 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-28 23:30:44,775 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-28 23:30:44,796 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:30:44" (1/1) ... [2021-10-28 23:30:44,908 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:30:44" (1/1) ... [2021-10-28 23:30:45,914 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-28 23:30:45,915 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-28 23:30:45,915 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-28 23:30:45,916 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-28 23:30:45,928 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:30:44" (1/1) ... [2021-10-28 23:30:45,928 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:30:44" (1/1) ... [2021-10-28 23:30:46,139 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:30:44" (1/1) ... [2021-10-28 23:30:46,140 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:30:44" (1/1) ... [2021-10-28 23:30:46,648 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:30:44" (1/1) ... [2021-10-28 23:30:46,803 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:30:44" (1/1) ... [2021-10-28 23:30:46,884 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:30:44" (1/1) ... [2021-10-28 23:30:47,043 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-28 23:30:47,044 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-28 23:30:47,044 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-28 23:30:47,045 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-28 23:30:47,046 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:30:44" (1/1) ... [2021-10-28 23:30:47,138 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-28 23:30:47,157 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6038b779-d533-4b12-a668-16c7a8635ef5/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:30:47,180 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6038b779-d533-4b12-a668-16c7a8635ef5/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-10-28 23:30:47,190 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6038b779-d533-4b12-a668-16c7a8635ef5/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-10-28 23:30:47,223 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2021-10-28 23:30:47,224 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2021-10-28 23:30:47,224 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2021-10-28 23:30:47,225 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-10-28 23:30:47,225 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-10-28 23:30:47,225 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-10-28 23:30:47,225 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-10-28 23:30:47,225 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-28 23:30:47,225 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-10-28 23:30:47,225 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-10-28 23:30:47,226 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2021-10-28 23:30:47,226 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-28 23:30:47,226 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2021-10-28 23:30:47,226 INFO L130 BoogieDeclarations]: Found specification of procedure strncpy [2021-10-28 23:30:47,226 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-28 23:30:47,226 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-28 23:31:15,554 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-28 23:31:15,554 INFO L299 CfgBuilder]: Removed 3249 assume(true) statements. [2021-10-28 23:31:15,564 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 11:31:15 BoogieIcfgContainer [2021-10-28 23:31:15,565 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-28 23:31:15,567 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-10-28 23:31:15,567 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-10-28 23:31:15,570 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-10-28 23:31:15,571 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.10 11:30:42" (1/3) ... [2021-10-28 23:31:15,572 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@29411869 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.10 11:31:15, skipping insertion in model container [2021-10-28 23:31:15,572 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:30:44" (2/3) ... [2021-10-28 23:31:15,573 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@29411869 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.10 11:31:15, skipping insertion in model container [2021-10-28 23:31:15,573 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 11:31:15" (3/3) ... [2021-10-28 23:31:15,575 INFO L111 eAbstractionObserver]: Analyzing ICFG linux-stable-064368f-1-111_1a-drivers--media--radio--si4713-i2c.ko-entry_point.cil.out.i [2021-10-28 23:31:15,581 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-10-28 23:31:15,581 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 8 error locations. [2021-10-28 23:31:15,671 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-10-28 23:31:15,680 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-10-28 23:31:15,680 INFO L340 AbstractCegarLoop]: Starting to check reachability of 8 error locations. [2021-10-28 23:31:15,774 INFO L276 IsEmpty]: Start isEmpty. Operand has 4749 states, 4740 states have (on average 1.5126582278481013) internal successors, (7170), 4748 states have internal predecessors, (7170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:31:15,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-28 23:31:15,792 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:31:15,793 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:31:15,794 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 5 more)] === [2021-10-28 23:31:15,799 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:31:15,799 INFO L85 PathProgramCache]: Analyzing trace with hash -2037521194, now seen corresponding path program 1 times [2021-10-28 23:31:15,808 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:31:15,809 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2144866814] [2021-10-28 23:31:15,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:31:15,810 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:31:16,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:31:16,413 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:31:16,414 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:31:16,416 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2144866814] [2021-10-28 23:31:16,417 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2144866814] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:31:16,417 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:31:16,418 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:31:16,420 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1075529753] [2021-10-28 23:31:16,426 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:31:16,426 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:31:16,442 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:31:16,443 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:31:16,458 INFO L87 Difference]: Start difference. First operand has 4749 states, 4740 states have (on average 1.5126582278481013) internal successors, (7170), 4748 states have internal predecessors, (7170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:31:16,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:31:16,881 INFO L93 Difference]: Finished difference Result 10237 states and 15425 transitions. [2021-10-28 23:31:16,882 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:31:16,884 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-28 23:31:16,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:31:16,938 INFO L225 Difference]: With dead ends: 10237 [2021-10-28 23:31:16,939 INFO L226 Difference]: Without dead ends: 5450 [2021-10-28 23:31:16,960 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:31:16,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5450 states. [2021-10-28 23:31:17,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5450 to 5428. [2021-10-28 23:31:17,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5428 states, 5420 states have (on average 1.5) internal successors, (8130), 5427 states have internal predecessors, (8130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:31:17,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5428 states to 5428 states and 8130 transitions. [2021-10-28 23:31:17,233 INFO L78 Accepts]: Start accepts. Automaton has 5428 states and 8130 transitions. Word has length 33 [2021-10-28 23:31:17,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:31:17,234 INFO L470 AbstractCegarLoop]: Abstraction has 5428 states and 8130 transitions. [2021-10-28 23:31:17,234 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:31:17,234 INFO L276 IsEmpty]: Start isEmpty. Operand 5428 states and 8130 transitions. [2021-10-28 23:31:17,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2021-10-28 23:31:17,239 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:31:17,239 INFO L513 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:31:17,240 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-10-28 23:31:17,240 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 5 more)] === [2021-10-28 23:31:17,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:31:17,241 INFO L85 PathProgramCache]: Analyzing trace with hash -532029243, now seen corresponding path program 1 times [2021-10-28 23:31:17,241 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:31:17,241 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [961590923] [2021-10-28 23:31:17,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:31:17,242 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:31:17,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:31:17,674 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-28 23:31:17,675 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:31:17,675 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [961590923] [2021-10-28 23:31:17,675 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [961590923] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:31:17,676 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:31:17,676 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-10-28 23:31:17,676 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [106085018] [2021-10-28 23:31:17,678 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 23:31:17,679 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:31:17,679 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 23:31:17,679 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:31:17,681 INFO L87 Difference]: Start difference. First operand 5428 states and 8130 transitions. Second operand has 5 states, 5 states have (on average 12.2) internal successors, (61), 5 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:31:59,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:31:59,710 INFO L93 Difference]: Finished difference Result 12237 states and 18209 transitions. [2021-10-28 23:31:59,710 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 23:31:59,711 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 12.2) internal successors, (61), 5 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 62 [2021-10-28 23:31:59,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:31:59,756 INFO L225 Difference]: With dead ends: 12237 [2021-10-28 23:31:59,756 INFO L226 Difference]: Without dead ends: 6827 [2021-10-28 23:31:59,766 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:31:59,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6827 states. [2021-10-28 23:31:59,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6827 to 5432. [2021-10-28 23:31:59,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5432 states, 5424 states have (on average 1.4998156342182891) internal successors, (8135), 5431 states have internal predecessors, (8135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:31:59,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5432 states to 5432 states and 8135 transitions. [2021-10-28 23:31:59,979 INFO L78 Accepts]: Start accepts. Automaton has 5432 states and 8135 transitions. Word has length 62 [2021-10-28 23:31:59,981 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:31:59,982 INFO L470 AbstractCegarLoop]: Abstraction has 5432 states and 8135 transitions. [2021-10-28 23:31:59,982 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 12.2) internal successors, (61), 5 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:31:59,982 INFO L276 IsEmpty]: Start isEmpty. Operand 5432 states and 8135 transitions. [2021-10-28 23:31:59,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2021-10-28 23:31:59,990 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:31:59,991 INFO L513 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:31:59,991 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-10-28 23:31:59,992 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 5 more)] === [2021-10-28 23:32:00,002 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:00,004 INFO L85 PathProgramCache]: Analyzing trace with hash 1136380178, now seen corresponding path program 1 times [2021-10-28 23:32:00,004 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:00,005 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [386497872] [2021-10-28 23:32:00,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:00,006 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:00,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:00,445 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-28 23:32:00,446 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:00,446 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [386497872] [2021-10-28 23:32:00,452 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [386497872] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:00,452 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:00,453 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:32:00,453 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [6871524] [2021-10-28 23:32:00,454 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:32:00,454 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:00,455 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:32:00,456 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:32:00,457 INFO L87 Difference]: Start difference. First operand 5432 states and 8135 transitions. Second operand has 6 states, 6 states have (on average 10.333333333333334) internal successors, (62), 6 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:25,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:25,871 INFO L93 Difference]: Finished difference Result 18664 states and 27771 transitions. [2021-10-28 23:33:25,872 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-10-28 23:33:25,872 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 10.333333333333334) internal successors, (62), 6 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 63 [2021-10-28 23:33:25,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:25,973 INFO L225 Difference]: With dead ends: 18664 [2021-10-28 23:33:25,973 INFO L226 Difference]: Without dead ends: 13250 [2021-10-28 23:33:25,987 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2021-10-28 23:33:26,012 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13250 states. [2021-10-28 23:33:26,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13250 to 5433. [2021-10-28 23:33:26,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5433 states, 5425 states have (on average 1.4997235023041475) internal successors, (8136), 5432 states have internal predecessors, (8136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:26,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5433 states to 5433 states and 8136 transitions. [2021-10-28 23:33:26,247 INFO L78 Accepts]: Start accepts. Automaton has 5433 states and 8136 transitions. Word has length 63 [2021-10-28 23:33:26,249 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:26,249 INFO L470 AbstractCegarLoop]: Abstraction has 5433 states and 8136 transitions. [2021-10-28 23:33:26,250 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 10.333333333333334) internal successors, (62), 6 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:26,250 INFO L276 IsEmpty]: Start isEmpty. Operand 5433 states and 8136 transitions. [2021-10-28 23:33:26,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2021-10-28 23:33:26,254 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:26,255 INFO L513 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:26,255 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-10-28 23:33:26,255 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 5 more)] === [2021-10-28 23:33:26,256 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:26,256 INFO L85 PathProgramCache]: Analyzing trace with hash -714352571, now seen corresponding path program 1 times [2021-10-28 23:33:26,256 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:26,257 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [194943903] [2021-10-28 23:33:26,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:26,257 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:26,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:26,637 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-28 23:33:26,637 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:26,637 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [194943903] [2021-10-28 23:33:26,638 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [194943903] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:26,638 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:26,638 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:33:26,638 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1584357683] [2021-10-28 23:33:26,639 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:33:26,639 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:26,639 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:33:26,640 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:33:26,640 INFO L87 Difference]: Start difference. First operand 5433 states and 8136 transitions. Second operand has 6 states, 6 states have (on average 10.333333333333334) internal successors, (62), 6 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:17,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:34:17,646 INFO L93 Difference]: Finished difference Result 13394 states and 19848 transitions. [2021-10-28 23:34:17,647 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:34:17,647 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 10.333333333333334) internal successors, (62), 6 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 63 [2021-10-28 23:34:17,647 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:34:17,672 INFO L225 Difference]: With dead ends: 13394 [2021-10-28 23:34:17,672 INFO L226 Difference]: Without dead ends: 7979 [2021-10-28 23:34:17,682 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2021-10-28 23:34:17,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7979 states. [2021-10-28 23:34:17,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7979 to 5437. [2021-10-28 23:34:17,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5437 states, 5429 states have (on average 1.4995395100386812) internal successors, (8141), 5436 states have internal predecessors, (8141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:17,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5437 states to 5437 states and 8141 transitions. [2021-10-28 23:34:17,865 INFO L78 Accepts]: Start accepts. Automaton has 5437 states and 8141 transitions. Word has length 63 [2021-10-28 23:34:17,866 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:34:17,866 INFO L470 AbstractCegarLoop]: Abstraction has 5437 states and 8141 transitions. [2021-10-28 23:34:17,866 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 10.333333333333334) internal successors, (62), 6 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:17,866 INFO L276 IsEmpty]: Start isEmpty. Operand 5437 states and 8141 transitions. [2021-10-28 23:34:17,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2021-10-28 23:34:17,871 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:34:17,871 INFO L513 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:34:17,872 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-10-28 23:34:17,872 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 5 more)] === [2021-10-28 23:34:17,872 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:34:17,873 INFO L85 PathProgramCache]: Analyzing trace with hash -1635166794, now seen corresponding path program 1 times [2021-10-28 23:34:17,873 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:34:17,873 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [107931225] [2021-10-28 23:34:17,873 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:34:17,874 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:34:17,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:34:18,048 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-28 23:34:18,049 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:34:18,049 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [107931225] [2021-10-28 23:34:18,049 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [107931225] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:34:18,049 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:34:18,050 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:34:18,050 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1406308509] [2021-10-28 23:34:18,050 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:34:18,051 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:34:18,051 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:34:18,052 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:34:18,052 INFO L87 Difference]: Start difference. First operand 5437 states and 8141 transitions. Second operand has 3 states, 3 states have (on average 21.0) internal successors, (63), 3 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:18,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:34:18,288 INFO L93 Difference]: Finished difference Result 10596 states and 15909 transitions. [2021-10-28 23:34:18,289 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:34:18,289 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 21.0) internal successors, (63), 3 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 64 [2021-10-28 23:34:18,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:34:18,325 INFO L225 Difference]: With dead ends: 10596 [2021-10-28 23:34:18,325 INFO L226 Difference]: Without dead ends: 10584 [2021-10-28 23:34:18,330 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:34:18,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10584 states. [2021-10-28 23:34:18,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10584 to 5425. [2021-10-28 23:34:18,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5425 states, 5423 states have (on average 1.4989858012170385) internal successors, (8129), 5424 states have internal predecessors, (8129), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:18,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5425 states to 5425 states and 8129 transitions. [2021-10-28 23:34:18,526 INFO L78 Accepts]: Start accepts. Automaton has 5425 states and 8129 transitions. Word has length 64 [2021-10-28 23:34:18,527 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:34:18,527 INFO L470 AbstractCegarLoop]: Abstraction has 5425 states and 8129 transitions. [2021-10-28 23:34:18,527 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 21.0) internal successors, (63), 3 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:18,528 INFO L276 IsEmpty]: Start isEmpty. Operand 5425 states and 8129 transitions. [2021-10-28 23:34:18,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2021-10-28 23:34:18,532 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:34:18,532 INFO L513 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:34:18,533 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-10-28 23:34:18,533 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 5 more)] === [2021-10-28 23:34:18,533 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:34:18,534 INFO L85 PathProgramCache]: Analyzing trace with hash -220675694, now seen corresponding path program 1 times [2021-10-28 23:34:18,534 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:34:18,534 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [30951410] [2021-10-28 23:34:18,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:34:18,535 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:34:18,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:34:18,863 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-28 23:34:18,863 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:34:18,863 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [30951410] [2021-10-28 23:34:18,864 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [30951410] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:34:18,864 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:34:18,864 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-28 23:34:18,864 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [974808470] [2021-10-28 23:34:18,865 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-28 23:34:18,865 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:34:18,865 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 23:34:18,866 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2021-10-28 23:34:18,866 INFO L87 Difference]: Start difference. First operand 5425 states and 8129 transitions. Second operand has 7 states, 7 states have (on average 9.0) internal successors, (63), 7 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:36:00,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:36:00,532 INFO L93 Difference]: Finished difference Result 20486 states and 30373 transitions. [2021-10-28 23:36:00,533 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2021-10-28 23:36:00,533 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.0) internal successors, (63), 7 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 64 [2021-10-28 23:36:00,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:36:00,580 INFO L225 Difference]: With dead ends: 20486 [2021-10-28 23:36:00,581 INFO L226 Difference]: Without dead ends: 15079 [2021-10-28 23:36:00,594 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=123, Unknown=0, NotChecked=0, Total=182 [2021-10-28 23:36:00,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15079 states. [2021-10-28 23:36:00,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15079 to 5429. [2021-10-28 23:36:00,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5429 states, 5427 states have (on average 1.4989865487377925) internal successors, (8135), 5428 states have internal predecessors, (8135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:36:00,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5429 states to 5429 states and 8135 transitions. [2021-10-28 23:36:00,844 INFO L78 Accepts]: Start accepts. Automaton has 5429 states and 8135 transitions. Word has length 64 [2021-10-28 23:36:00,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:36:00,845 INFO L470 AbstractCegarLoop]: Abstraction has 5429 states and 8135 transitions. [2021-10-28 23:36:00,845 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.0) internal successors, (63), 7 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:36:00,845 INFO L276 IsEmpty]: Start isEmpty. Operand 5429 states and 8135 transitions. [2021-10-28 23:36:00,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2021-10-28 23:36:00,851 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:36:00,852 INFO L513 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:36:00,852 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-10-28 23:36:00,854 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 5 more)] === [2021-10-28 23:36:00,855 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:36:00,855 INFO L85 PathProgramCache]: Analyzing trace with hash 1678022903, now seen corresponding path program 1 times [2021-10-28 23:36:00,855 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:36:00,859 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2068186419] [2021-10-28 23:36:00,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:36:00,860 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:36:01,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:36:01,401 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:36:02,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:36:02,495 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:36:02,495 INFO L627 BasicCegarLoop]: Counterexample is feasible [2021-10-28 23:36:02,497 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:36:02,499 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:36:02,500 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:36:02,500 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:36:02,500 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:36:02,501 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:36:02,501 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:36:02,501 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:36:02,502 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-10-28 23:36:02,507 INFO L731 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:36:02,511 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-10-28 23:36:02,939 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.10 11:36:02 BoogieIcfgContainer [2021-10-28 23:36:02,939 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-10-28 23:36:02,940 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-28 23:36:02,940 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-28 23:36:02,940 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-28 23:36:02,941 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 11:31:15" (3/4) ... [2021-10-28 23:36:02,944 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-10-28 23:36:03,391 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6038b779-d533-4b12-a668-16c7a8635ef5/bin/uautomizer-GMMbpWq8iD/witness.graphml [2021-10-28 23:36:03,392 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-28 23:36:03,394 INFO L168 Benchmark]: Toolchain (without parser) took 320746.06 ms. Allocated memory was 81.8 MB in the beginning and 1.7 GB in the end (delta: 1.6 GB). Free memory was 55.4 MB in the beginning and 1.4 GB in the end (delta: -1.4 GB). Peak memory consumption was 1.2 GB. Max. memory is 16.1 GB. [2021-10-28 23:36:03,394 INFO L168 Benchmark]: CDTParser took 0.23 ms. Allocated memory is still 81.8 MB. Free memory was 52.1 MB in the beginning and 52.1 MB in the end (delta: 26.6 kB). There was no memory consumed. Max. memory is 16.1 GB. [2021-10-28 23:36:03,395 INFO L168 Benchmark]: CACSL2BoogieTranslator took 2122.62 ms. Allocated memory was 81.8 MB in the beginning and 153.1 MB in the end (delta: 71.3 MB). Free memory was 55.4 MB in the beginning and 101.9 MB in the end (delta: -46.5 MB). Peak memory consumption was 53.8 MB. Max. memory is 16.1 GB. [2021-10-28 23:36:03,396 INFO L168 Benchmark]: Boogie Procedure Inliner took 1139.79 ms. Allocated memory was 153.1 MB in the beginning and 306.2 MB in the end (delta: 153.1 MB). Free memory was 101.9 MB in the beginning and 182.8 MB in the end (delta: -80.8 MB). Peak memory consumption was 90.6 MB. Max. memory is 16.1 GB. [2021-10-28 23:36:03,396 INFO L168 Benchmark]: Boogie Preprocessor took 1128.07 ms. Allocated memory is still 306.2 MB. Free memory was 182.8 MB in the beginning and 112.5 MB in the end (delta: 70.3 MB). Peak memory consumption was 84.9 MB. Max. memory is 16.1 GB. [2021-10-28 23:36:03,397 INFO L168 Benchmark]: RCFGBuilder took 28520.62 ms. Allocated memory was 306.2 MB in the beginning and 1.3 GB in the end (delta: 973.1 MB). Free memory was 112.5 MB in the beginning and 786.8 MB in the end (delta: -674.2 MB). Peak memory consumption was 791.7 MB. Max. memory is 16.1 GB. [2021-10-28 23:36:03,398 INFO L168 Benchmark]: TraceAbstraction took 287372.85 ms. Allocated memory was 1.3 GB in the beginning and 1.7 GB in the end (delta: 434.1 MB). Free memory was 785.7 MB in the beginning and 521.5 MB in the end (delta: 264.2 MB). Peak memory consumption was 698.4 MB. Max. memory is 16.1 GB. [2021-10-28 23:36:03,398 INFO L168 Benchmark]: Witness Printer took 452.02 ms. Allocated memory is still 1.7 GB. Free memory was 521.5 MB in the beginning and 1.4 GB in the end (delta: -918.6 MB). Peak memory consumption was 50.3 MB. Max. memory is 16.1 GB. [2021-10-28 23:36:03,401 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.23 ms. Allocated memory is still 81.8 MB. Free memory was 52.1 MB in the beginning and 52.1 MB in the end (delta: 26.6 kB). There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 2122.62 ms. Allocated memory was 81.8 MB in the beginning and 153.1 MB in the end (delta: 71.3 MB). Free memory was 55.4 MB in the beginning and 101.9 MB in the end (delta: -46.5 MB). Peak memory consumption was 53.8 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 1139.79 ms. Allocated memory was 153.1 MB in the beginning and 306.2 MB in the end (delta: 153.1 MB). Free memory was 101.9 MB in the beginning and 182.8 MB in the end (delta: -80.8 MB). Peak memory consumption was 90.6 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 1128.07 ms. Allocated memory is still 306.2 MB. Free memory was 182.8 MB in the beginning and 112.5 MB in the end (delta: 70.3 MB). Peak memory consumption was 84.9 MB. Max. memory is 16.1 GB. * RCFGBuilder took 28520.62 ms. Allocated memory was 306.2 MB in the beginning and 1.3 GB in the end (delta: 973.1 MB). Free memory was 112.5 MB in the beginning and 786.8 MB in the end (delta: -674.2 MB). Peak memory consumption was 791.7 MB. Max. memory is 16.1 GB. * TraceAbstraction took 287372.85 ms. Allocated memory was 1.3 GB in the beginning and 1.7 GB in the end (delta: 434.1 MB). Free memory was 785.7 MB in the beginning and 521.5 MB in the end (delta: 264.2 MB). Peak memory consumption was 698.4 MB. Max. memory is 16.1 GB. * Witness Printer took 452.02 ms. Allocated memory is still 1.7 GB. Free memory was 521.5 MB in the beginning and 1.4 GB in the end (delta: -918.6 MB). Peak memory consumption was 50.3 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 3957]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L3980] struct v4l2_subdev *si4713_subdev_tuner_ops_group1 ; [L3981] int ldv_irq_1_3 = 0; [L3982] void *ldv_irq_data_1_1 ; [L3983] int ldv_irq_1_0 = 0; [L3984] void *ldv_irq_data_1_0 ; [L3985] int ldv_state_variable_0 ; [L3986] struct v4l2_frequency *si4713_subdev_tuner_ops_group0 ; [L3987] struct v4l2_control *si4713_subdev_core_ops_group2 ; [L3988] int ldv_state_variable_2 ; [L3989] void *ldv_irq_data_1_3 ; [L3990] void *ldv_irq_data_1_2 ; [L3991] int ldv_irq_1_2 = 0; [L3992] int LDV_IN_INTERRUPT = 1; [L3993] int ldv_irq_1_1 = 0; [L3994] int ldv_irq_line_1_3 ; [L3995] struct v4l2_subdev *si4713_subdev_core_ops_group1 ; [L3996] struct v4l2_ext_controls *si4713_subdev_core_ops_group0 ; [L3997] int ldv_state_variable_3 ; [L3998] int ldv_irq_line_1_0 ; [L3999] int ref_cnt ; [L4000] struct v4l2_modulator *si4713_subdev_tuner_ops_group2 ; [L4001] int ldv_irq_line_1_1 ; [L4002] struct i2c_client *si4713_i2c_driver_group0 ; [L4003] int ldv_state_variable_1 ; [L4004] int ldv_irq_line_1_2 ; [L4005] int ldv_state_variable_4 ; [L4144] static int debug ; [L4145] static char const *si4713_supply_names[2U] = { "vio", "vdd"}; [L4146-L4156] static long limiter_times[40U] = { 2000L, 250L, 1000L, 500L, 510L, 1000L, 255L, 2000L, 170L, 3000L, 127L, 4020L, 102L, 5010L, 85L, 6020L, 73L, 7010L, 64L, 7990L, 57L, 8970L, 51L, 10030L, 25L, 20470L, 17L, 30110L, 13L, 39380L, 10L, 51190L, 8L, 63690L, 7L, 73140L, 6L, 85330L, 5L, 102390L}; [L4157-L4160] static unsigned long acomp_rtimes[10U] = { 0UL, 100000UL, 1UL, 200000UL, 2UL, 350000UL, 3UL, 525000UL, 4UL, 1000000UL}; [L4161-L4162] static unsigned long preemphasis_values[6U] = { 2UL, 0UL, 1UL, 1UL, 0UL, 2UL}; [L5779-L5781] static struct v4l2_subdev_core_ops const si4713_subdev_core_ops = {0, 0, 0, 0, 0, 0, 0, & si4713_queryctrl, & si4713_g_ctrl, & si4713_s_ctrl, & si4713_g_ext_ctrls, & si4713_s_ext_ctrls, 0, 0, 0, & si4713_ioctl, 0, 0, 0, 0, 0, 0}; [L5949-L5951] static struct v4l2_subdev_tuner_ops const si4713_subdev_tuner_ops = {0, 0, & si4713_s_frequency, & si4713_g_frequency, 0, 0, & si4713_g_modulator, & si4713_s_modulator, 0, 0}; [L5952-L5953] static struct v4l2_subdev_ops const si4713_subdev_ops = {& si4713_subdev_core_ops, & si4713_subdev_tuner_ops, 0, 0, 0, 0, 0, 0}; [L6083] static struct i2c_device_id const si4713_id[2U] = { {{'s', 'i', '4', '7', '1', '3', '\000'}, 0UL}}; [L6084] struct i2c_device_id const __mod_i2c_device_table ; [L6085-L6089] static struct i2c_driver si4713_i2c_driver = {0U, 0, 0, & si4713_probe, & si4713_remove, 0, 0, 0, 0, 0, {"si4713", 0, 0, 0, (_Bool)0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, (struct i2c_device_id const *)(& si4713_id), 0, 0, {0, 0}}; [L6105] int ldv_retval_0 ; [L6106] int ldv_retval_1 ; VAL [__mod_i2c_device_table=0, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6271] unsigned int ldvarg1 ; [L6272] unsigned int tmp ; [L6273] void *ldvarg0 ; [L6274] void *tmp___0 ; [L6275] struct v4l2_queryctrl *ldvarg2 ; [L6276] void *tmp___1 ; [L6277] struct i2c_device_id *ldvarg3 ; [L6278] void *tmp___2 ; [L6279] int tmp___3 ; [L6280] int tmp___4 ; [L6281] int tmp___5 ; [L6282] int tmp___6 ; [L6283] int tmp___7 ; [L6285] tmp = __VERIFIER_nondet_uint() [L6286] ldvarg1 = tmp [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [__mod_i2c_device_table=0, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6287] tmp___0 = ldv_zalloc(1UL) [L6288] ldvarg0 = tmp___0 [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [__mod_i2c_device_table=0, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6289] tmp___1 = ldv_zalloc(68UL) [L6290] ldvarg2 = (struct v4l2_queryctrl *)tmp___1 [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [__mod_i2c_device_table=0, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6291] tmp___2 = ldv_zalloc(32UL) [L6292] ldvarg3 = (struct i2c_device_id *)tmp___2 VAL [__mod_i2c_device_table=0, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=0, ldv_state_variable_1=0, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6294] ldv_state_variable_4 = 0 [L6295] ldv_state_variable_1 = 1 [L6296] ref_cnt = 0 [L6297] ldv_state_variable_0 = 1 [L6298] ldv_state_variable_3 = 0 [L6299] ldv_state_variable_2 = 0 VAL [__mod_i2c_device_table=0, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6301] tmp___3 = __VERIFIER_nondet_int() [L6303] case 0: [L6356] case 1: [L6362] case 2: VAL [__mod_i2c_device_table=0, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6363] COND TRUE ldv_state_variable_0 != 0 [L6364] tmp___5 = __VERIFIER_nondet_int() [L6366] case 0: [L6374] case 1: VAL [__mod_i2c_device_table=0, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6375] COND TRUE ldv_state_variable_0 == 1 [L6092] int tmp ; [L4108] int tmp ; [L6677] return __VERIFIER_nondet_int(); [L4110] tmp = i2c_register_driver(& __this_module, driver) [L4111] return (tmp); VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6094] tmp = i2c_add_driver(& si4713_i2c_driver) [L6095] return (tmp); VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=1, ldv_state_variable_1=1, ldv_state_variable_2=0, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6376] ldv_retval_0 = si4713_module_init() [L6377] COND TRUE ldv_retval_0 == 0 [L6378] ldv_state_variable_0 = 3 [L6379] ldv_state_variable_2 = 1 [L6111] void *tmp ; [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6113] tmp = ldv_zalloc(1168UL) [L6114] si4713_i2c_driver_group0 = (struct i2c_client *)tmp VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=0, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6381] ldv_state_variable_3 = 1 [L6256] void *tmp ; [L6257] void *tmp___0 ; [L6258] void *tmp___1 ; [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6260] tmp = ldv_zalloc(44UL) [L6261] si4713_subdev_tuner_ops_group0 = (struct v4l2_frequency *)tmp [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6262] tmp___0 = ldv_zalloc(1736UL) [L6263] si4713_subdev_tuner_ops_group1 = (struct v4l2_subdev *)tmp___0 [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6264] tmp___1 = ldv_zalloc(68UL) [L6265] si4713_subdev_tuner_ops_group2 = (struct v4l2_modulator *)tmp___1 VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=0, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6383] ldv_state_variable_4 = 1 [L6120] void *tmp ; [L6121] void *tmp___0 ; [L6122] void *tmp___1 ; [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6124] tmp = ldv_zalloc(32UL) [L6125] si4713_subdev_core_ops_group0 = (struct v4l2_ext_controls *)tmp [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6126] tmp___0 = ldv_zalloc(1736UL) [L6127] si4713_subdev_core_ops_group1 = (struct v4l2_subdev *)tmp___0 [L3922] void *p ; [L3923] void *tmp ; [L3924] int tmp___0 ; [L3926] tmp___0 = __VERIFIER_nondet_int() [L3927] COND TRUE tmp___0 != 0 [L3928] return ((void *)0); VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6128] tmp___1 = ldv_zalloc(8UL) [L6129] si4713_subdev_core_ops_group2 = (struct v4l2_control *)tmp___1 VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6387] COND FALSE !(ldv_retval_0 != 0) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6301] tmp___3 = __VERIFIER_nondet_int() [L6303] case 0: VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6304] COND TRUE ldv_state_variable_4 != 0 [L6305] tmp___4 = __VERIFIER_nondet_int() [L6307] case 0: [L6314] case 1: [L6321] case 2: [L6328] case 3: VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L6329] COND TRUE ldv_state_variable_4 == 1 [L5502] struct si4713_device *sdev ; [L5503] struct v4l2_subdev const *__mptr ; [L5504] int i ; [L5505] int err ; [L5507] __mptr = (struct v4l2_subdev const *)sd [L5508] sdev = (struct si4713_device *)__mptr [L5509] EXPR ctrls->ctrl_class VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L5509] COND FALSE !(ctrls->ctrl_class != 10158080U) [L5513] i = 0 VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L5536] EXPR ctrls->count VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L5536] COND TRUE (__u32 )i < ctrls->count [L5516] EXPR ctrls->controls [L5516] (ctrls->controls + (unsigned long )i)->id [L5517] case 10160389U: VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L5518] case 10160390U: [L5519] ctrls->controls [L4924] struct v4l2_queryctrl vqc ; [L4925] int len ; [L4926] s32 rval ; [L4927] char ps_name[97U] ; [L4928] unsigned long tmp ; [L4929] size_t tmp___0 ; [L4930] char radio_text[385U] ; [L4931] unsigned long tmp___1 ; [L4932] size_t tmp___2 ; [L4934] rval = 0 [L4935] EXPR control->id [L4935] vqc.id = control->id [L5588] int rval ; [L5590] rval = 0 [L5591] qc->id [L5592] case 9963785U: [L5595] case 10160386U: [L5598] case 10160387U: [L5601] case 10160385U: [L5604] case 10160389U: [L6730] return __VERIFIER_nondet_int(); [L5605] rval = v4l2_ctrl_query_fill(qc, 0, 96, 8, 0) [L5657] return (rval); VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L4936] rval = si4713_queryctrl(& sdev->sd, & vqc) [L4937] COND FALSE !(rval < 0) [L4941] control->id [L4942] case 10160389U: [L4943] EXPR control->size [L4943] len = (int )(control->size - 1U) [L4944] COND FALSE !(len > 96) [L4949] control->ldv_23757.string [L6524] unsigned long tmp ; [L6599] COND FALSE !(n >= 0L) VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] [L3957] reach_error() VAL [__mod_i2c_device_table=0, __this_module={4294967307:4294967300}, acomp_rtimes={87:0}, debug=0, LDV_IN_INTERRUPT=1, ldv_irq_1_0=0, ldv_irq_1_1=0, ldv_irq_1_2=0, ldv_irq_1_3=0, ldv_irq_data_1_0={0:0}, ldv_irq_data_1_1={0:0}, ldv_irq_data_1_2={0:0}, ldv_irq_data_1_3={0:0}, ldv_irq_line_1_0=0, ldv_irq_line_1_1=0, ldv_irq_line_1_2=0, ldv_irq_line_1_3=0, ldv_retval_0=0, ldv_retval_1=0, ldv_state_variable_0=3, ldv_state_variable_1=1, ldv_state_variable_2=1, ldv_state_variable_3=1, ldv_state_variable_4=1, limiter_times={137:0}, preemphasis_values={146:0}, ref_cnt=0, si4713_i2c_driver={107:0}, si4713_i2c_driver_group0={0:0}, si4713_id={132:0}, si4713_subdev_core_ops={61:0}, si4713_subdev_core_ops_group0={0:0}, si4713_subdev_core_ops_group1={0:0}, si4713_subdev_core_ops_group2={0:0}, si4713_subdev_ops={74:0}, si4713_subdev_tuner_ops={71:0}, si4713_subdev_tuner_ops_group0={0:0}, si4713_subdev_tuner_ops_group1={0:0}, si4713_subdev_tuner_ops_group2={0:0}, si4713_supply_names={138:0}] - UnprovableResult [Line: 3957]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 3957]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 3957]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 3957]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 3957]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 3957]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 3957]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 4749 locations, 8 error locations. Started 1 CEGAR loops. OverallTime: 286.8s, OverallIterations: 7, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 281.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 68190 SDtfs, 33970 SDslu, 141869 SDs, 0 SdLazy, 26989 SolverSat, 747 SolverUnsat, 22 SolverUnknown, 0 SolverNotchecked, 255.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 54 GetRequests, 21 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=5437occurred in iteration=4, InterpolantAutomatonStates: 45, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.3s AutomataMinimizationTime, 6 MinimizatonAttempts, 26585 StatesRemovedByMinimization, 6 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 1.3s SatisfiabilityAnalysisTime, 1.2s InterpolantComputationTime, 415 NumberOfCodeBlocks, 415 NumberOfCodeBlocksAsserted, 7 NumberOfCheckSat, 343 ConstructedInterpolants, 0 QuantifiedInterpolants, 533 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 6 InterpolantComputations, 6 PerfectInterpolantSequences, 10/10 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-10-28 23:36:03,632 WARN L435 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6038b779-d533-4b12-a668-16c7a8635ef5/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forcibly destroying the process [2021-10-28 23:36:03,656 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_6038b779-d533-4b12-a668-16c7a8635ef5/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 137 Received shutdown request...