./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version b2eff8ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a30aa210ed4a7c8ee647a70aef136aef282e5eccb07388ecda6495e33bc30b6d .......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.1-dev-b2eff8b [2021-10-28 23:38:10,310 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-28 23:38:10,313 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-28 23:38:10,354 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-28 23:38:10,354 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-28 23:38:10,356 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-28 23:38:10,358 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-28 23:38:10,361 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-28 23:38:10,363 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-28 23:38:10,365 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-28 23:38:10,366 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-28 23:38:10,372 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-28 23:38:10,373 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-28 23:38:10,374 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-28 23:38:10,376 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-28 23:38:10,378 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-28 23:38:10,379 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-28 23:38:10,380 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-28 23:38:10,383 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-28 23:38:10,386 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-28 23:38:10,396 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-28 23:38:10,401 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-28 23:38:10,406 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-28 23:38:10,407 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-28 23:38:10,418 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-28 23:38:10,419 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-28 23:38:10,420 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-28 23:38:10,425 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-28 23:38:10,425 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-28 23:38:10,427 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-28 23:38:10,427 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-28 23:38:10,428 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-28 23:38:10,429 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-28 23:38:10,430 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-28 23:38:10,432 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-28 23:38:10,432 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-28 23:38:10,433 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-28 23:38:10,434 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-28 23:38:10,434 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-28 23:38:10,439 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-28 23:38:10,441 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-28 23:38:10,442 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/config/svcomp-Reach-32bit-Automizer_Default.epf [2021-10-28 23:38:10,495 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-28 23:38:10,495 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-28 23:38:10,496 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-28 23:38:10,496 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-28 23:38:10,501 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-28 23:38:10,501 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-28 23:38:10,501 INFO L138 SettingsManager]: * Use SBE=true [2021-10-28 23:38:10,502 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-28 23:38:10,502 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-28 23:38:10,502 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-28 23:38:10,503 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-28 23:38:10,503 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-28 23:38:10,504 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-10-28 23:38:10,504 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-10-28 23:38:10,504 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-10-28 23:38:10,504 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-28 23:38:10,504 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-28 23:38:10,504 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-28 23:38:10,505 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-10-28 23:38:10,505 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-28 23:38:10,505 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-28 23:38:10,505 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-10-28 23:38:10,505 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-28 23:38:10,506 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-28 23:38:10,506 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-10-28 23:38:10,506 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-10-28 23:38:10,506 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-28 23:38:10,506 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-10-28 23:38:10,507 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-10-28 23:38:10,508 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2021-10-28 23:38:10,508 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-10-28 23:38:10,509 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-28 23:38:10,509 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a30aa210ed4a7c8ee647a70aef136aef282e5eccb07388ecda6495e33bc30b6d [2021-10-28 23:38:10,807 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-28 23:38:10,827 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-28 23:38:10,829 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-28 23:38:10,831 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-28 23:38:10,832 INFO L275 PluginConnector]: CDTParser initialized [2021-10-28 23:38:10,833 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2021-10-28 23:38:10,909 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/data/e9b7f4b30/defdcfc3828b49ab8eac80825ba2f95b/FLAG911c75817 [2021-10-28 23:38:11,498 INFO L306 CDTParser]: Found 1 translation units. [2021-10-28 23:38:11,500 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2021-10-28 23:38:11,523 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/data/e9b7f4b30/defdcfc3828b49ab8eac80825ba2f95b/FLAG911c75817 [2021-10-28 23:38:11,758 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/data/e9b7f4b30/defdcfc3828b49ab8eac80825ba2f95b [2021-10-28 23:38:11,760 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-28 23:38:11,762 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-28 23:38:11,763 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-28 23:38:11,764 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-28 23:38:11,767 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-28 23:38:11,768 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 11:38:11" (1/1) ... [2021-10-28 23:38:11,769 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@12cf2eb8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:38:11, skipping insertion in model container [2021-10-28 23:38:11,769 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 11:38:11" (1/1) ... [2021-10-28 23:38:11,776 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-28 23:38:11,813 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-28 23:38:12,122 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c[14540,14553] [2021-10-28 23:38:12,125 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 23:38:12,135 INFO L203 MainTranslator]: Completed pre-run [2021-10-28 23:38:12,203 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c[14540,14553] [2021-10-28 23:38:12,204 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 23:38:12,221 INFO L208 MainTranslator]: Completed translation [2021-10-28 23:38:12,222 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:38:12 WrapperNode [2021-10-28 23:38:12,222 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-28 23:38:12,223 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-28 23:38:12,223 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-28 23:38:12,224 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-28 23:38:12,244 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:38:12" (1/1) ... [2021-10-28 23:38:12,257 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:38:12" (1/1) ... [2021-10-28 23:38:12,323 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-28 23:38:12,324 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-28 23:38:12,324 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-28 23:38:12,325 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-28 23:38:12,334 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:38:12" (1/1) ... [2021-10-28 23:38:12,334 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:38:12" (1/1) ... [2021-10-28 23:38:12,342 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:38:12" (1/1) ... [2021-10-28 23:38:12,342 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:38:12" (1/1) ... [2021-10-28 23:38:12,361 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:38:12" (1/1) ... [2021-10-28 23:38:12,373 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:38:12" (1/1) ... [2021-10-28 23:38:12,378 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:38:12" (1/1) ... [2021-10-28 23:38:12,387 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-28 23:38:12,388 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-28 23:38:12,388 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-28 23:38:12,388 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-28 23:38:12,389 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:38:12" (1/1) ... [2021-10-28 23:38:12,410 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-28 23:38:12,427 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:38:12,473 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-10-28 23:38:12,486 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-10-28 23:38:12,519 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-28 23:38:12,520 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-28 23:38:12,520 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-28 23:38:12,520 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-28 23:38:13,700 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-28 23:38:13,700 INFO L299 CfgBuilder]: Removed 123 assume(true) statements. [2021-10-28 23:38:13,704 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 11:38:13 BoogieIcfgContainer [2021-10-28 23:38:13,704 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-28 23:38:13,707 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-10-28 23:38:13,708 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-10-28 23:38:13,712 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-10-28 23:38:13,712 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.10 11:38:11" (1/3) ... [2021-10-28 23:38:13,713 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@78caaf52 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.10 11:38:13, skipping insertion in model container [2021-10-28 23:38:13,714 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:38:12" (2/3) ... [2021-10-28 23:38:13,714 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@78caaf52 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.10 11:38:13, skipping insertion in model container [2021-10-28 23:38:13,714 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 11:38:13" (3/3) ... [2021-10-28 23:38:13,716 INFO L111 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2021-10-28 23:38:13,722 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-10-28 23:38:13,723 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 23 error locations. [2021-10-28 23:38:13,778 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-10-28 23:38:13,785 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-10-28 23:38:13,785 INFO L340 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2021-10-28 23:38:13,815 INFO L276 IsEmpty]: Start isEmpty. Operand has 295 states, 271 states have (on average 1.7011070110701108) internal successors, (461), 294 states have internal predecessors, (461), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:13,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-28 23:38:13,825 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:13,825 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:13,826 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:13,842 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:13,848 INFO L85 PathProgramCache]: Analyzing trace with hash 349506240, now seen corresponding path program 1 times [2021-10-28 23:38:13,866 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:13,871 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1598310956] [2021-10-28 23:38:13,872 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:13,873 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:14,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:14,171 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:14,171 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:14,172 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1598310956] [2021-10-28 23:38:14,173 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1598310956] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:14,173 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:14,174 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-28 23:38:14,176 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1471916224] [2021-10-28 23:38:14,183 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2021-10-28 23:38:14,183 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:14,205 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-10-28 23:38:14,207 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-28 23:38:14,211 INFO L87 Difference]: Start difference. First operand has 295 states, 271 states have (on average 1.7011070110701108) internal successors, (461), 294 states have internal predecessors, (461), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:14,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:14,300 INFO L93 Difference]: Finished difference Result 574 states and 893 transitions. [2021-10-28 23:38:14,301 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-10-28 23:38:14,302 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-28 23:38:14,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:14,328 INFO L225 Difference]: With dead ends: 574 [2021-10-28 23:38:14,329 INFO L226 Difference]: Without dead ends: 291 [2021-10-28 23:38:14,337 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-28 23:38:14,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 291 states. [2021-10-28 23:38:14,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 291 to 291. [2021-10-28 23:38:14,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 291 states, 268 states have (on average 1.585820895522388) internal successors, (425), 290 states have internal predecessors, (425), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:14,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291 states to 291 states and 425 transitions. [2021-10-28 23:38:14,432 INFO L78 Accepts]: Start accepts. Automaton has 291 states and 425 transitions. Word has length 33 [2021-10-28 23:38:14,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:14,433 INFO L470 AbstractCegarLoop]: Abstraction has 291 states and 425 transitions. [2021-10-28 23:38:14,434 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:14,434 INFO L276 IsEmpty]: Start isEmpty. Operand 291 states and 425 transitions. [2021-10-28 23:38:14,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-28 23:38:14,437 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:14,437 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:14,437 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-10-28 23:38:14,438 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:14,441 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:14,441 INFO L85 PathProgramCache]: Analyzing trace with hash -1047215368, now seen corresponding path program 1 times [2021-10-28 23:38:14,441 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:14,442 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1077619978] [2021-10-28 23:38:14,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:14,442 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:14,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:14,604 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:14,605 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:14,605 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1077619978] [2021-10-28 23:38:14,605 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1077619978] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:14,606 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:14,606 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:38:14,606 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1062265458] [2021-10-28 23:38:14,608 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:38:14,608 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:14,610 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:38:14,611 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:38:14,611 INFO L87 Difference]: Start difference. First operand 291 states and 425 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:14,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:14,688 INFO L93 Difference]: Finished difference Result 568 states and 824 transitions. [2021-10-28 23:38:14,688 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 23:38:14,688 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-28 23:38:14,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:14,692 INFO L225 Difference]: With dead ends: 568 [2021-10-28 23:38:14,693 INFO L226 Difference]: Without dead ends: 291 [2021-10-28 23:38:14,695 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:38:14,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 291 states. [2021-10-28 23:38:14,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 291 to 291. [2021-10-28 23:38:14,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 291 states, 268 states have (on average 1.541044776119403) internal successors, (413), 290 states have internal predecessors, (413), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:14,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291 states to 291 states and 413 transitions. [2021-10-28 23:38:14,722 INFO L78 Accepts]: Start accepts. Automaton has 291 states and 413 transitions. Word has length 33 [2021-10-28 23:38:14,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:14,722 INFO L470 AbstractCegarLoop]: Abstraction has 291 states and 413 transitions. [2021-10-28 23:38:14,722 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:14,723 INFO L276 IsEmpty]: Start isEmpty. Operand 291 states and 413 transitions. [2021-10-28 23:38:14,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2021-10-28 23:38:14,728 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:14,728 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:14,728 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-10-28 23:38:14,730 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:14,730 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:14,731 INFO L85 PathProgramCache]: Analyzing trace with hash -600938825, now seen corresponding path program 1 times [2021-10-28 23:38:14,731 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:14,731 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1256864211] [2021-10-28 23:38:14,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:14,733 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:14,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:14,941 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:14,941 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:14,942 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1256864211] [2021-10-28 23:38:14,942 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1256864211] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:14,942 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:14,943 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:38:14,943 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2014167046] [2021-10-28 23:38:14,944 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:38:14,944 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:14,945 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:38:14,945 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:38:14,945 INFO L87 Difference]: Start difference. First operand 291 states and 413 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:14,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:14,994 INFO L93 Difference]: Finished difference Result 599 states and 859 transitions. [2021-10-28 23:38:14,994 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:38:14,995 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2021-10-28 23:38:14,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:14,997 INFO L225 Difference]: With dead ends: 599 [2021-10-28 23:38:14,998 INFO L226 Difference]: Without dead ends: 325 [2021-10-28 23:38:14,999 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:38:14,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 325 states. [2021-10-28 23:38:15,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 325 to 267. [2021-10-28 23:38:15,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 267 states, 248 states have (on average 1.5201612903225807) internal successors, (377), 266 states have internal predecessors, (377), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:15,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 267 states to 267 states and 377 transitions. [2021-10-28 23:38:15,008 INFO L78 Accepts]: Start accepts. Automaton has 267 states and 377 transitions. Word has length 44 [2021-10-28 23:38:15,008 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:15,009 INFO L470 AbstractCegarLoop]: Abstraction has 267 states and 377 transitions. [2021-10-28 23:38:15,009 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:15,009 INFO L276 IsEmpty]: Start isEmpty. Operand 267 states and 377 transitions. [2021-10-28 23:38:15,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-10-28 23:38:15,011 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:15,011 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:15,011 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-10-28 23:38:15,012 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:15,012 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:15,012 INFO L85 PathProgramCache]: Analyzing trace with hash -777659854, now seen corresponding path program 1 times [2021-10-28 23:38:15,013 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:15,013 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [593457082] [2021-10-28 23:38:15,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:15,013 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:15,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:15,089 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:15,089 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:15,089 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [593457082] [2021-10-28 23:38:15,090 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [593457082] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:15,090 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:15,090 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:38:15,091 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1001807169] [2021-10-28 23:38:15,091 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:38:15,091 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:15,092 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:38:15,092 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:38:15,093 INFO L87 Difference]: Start difference. First operand 267 states and 377 transitions. Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:15,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:15,125 INFO L93 Difference]: Finished difference Result 744 states and 1062 transitions. [2021-10-28 23:38:15,126 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:38:15,126 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 53 [2021-10-28 23:38:15,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:15,130 INFO L225 Difference]: With dead ends: 744 [2021-10-28 23:38:15,130 INFO L226 Difference]: Without dead ends: 494 [2021-10-28 23:38:15,131 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:38:15,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 494 states. [2021-10-28 23:38:15,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 494 to 300. [2021-10-28 23:38:15,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 300 states, 281 states have (on average 1.5124555160142348) internal successors, (425), 299 states have internal predecessors, (425), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:15,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 300 states to 300 states and 425 transitions. [2021-10-28 23:38:15,146 INFO L78 Accepts]: Start accepts. Automaton has 300 states and 425 transitions. Word has length 53 [2021-10-28 23:38:15,147 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:15,147 INFO L470 AbstractCegarLoop]: Abstraction has 300 states and 425 transitions. [2021-10-28 23:38:15,147 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:15,147 INFO L276 IsEmpty]: Start isEmpty. Operand 300 states and 425 transitions. [2021-10-28 23:38:15,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-28 23:38:15,149 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:15,149 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:15,149 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-10-28 23:38:15,150 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:15,150 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:15,150 INFO L85 PathProgramCache]: Analyzing trace with hash -2137834776, now seen corresponding path program 1 times [2021-10-28 23:38:15,151 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:15,151 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1143440325] [2021-10-28 23:38:15,151 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:15,152 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:15,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:15,218 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:15,218 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:15,218 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1143440325] [2021-10-28 23:38:15,219 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1143440325] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:15,219 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:15,219 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:38:15,219 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [464500058] [2021-10-28 23:38:15,220 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:38:15,220 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:15,221 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:38:15,221 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:38:15,221 INFO L87 Difference]: Start difference. First operand 300 states and 425 transitions. Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:15,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:15,257 INFO L93 Difference]: Finished difference Result 822 states and 1175 transitions. [2021-10-28 23:38:15,257 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:38:15,258 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-28 23:38:15,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:15,262 INFO L225 Difference]: With dead ends: 822 [2021-10-28 23:38:15,262 INFO L226 Difference]: Without dead ends: 539 [2021-10-28 23:38:15,263 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:38:15,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2021-10-28 23:38:15,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 321. [2021-10-28 23:38:15,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 321 states, 302 states have (on average 1.5066225165562914) internal successors, (455), 320 states have internal predecessors, (455), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:15,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 321 states to 321 states and 455 transitions. [2021-10-28 23:38:15,278 INFO L78 Accepts]: Start accepts. Automaton has 321 states and 455 transitions. Word has length 54 [2021-10-28 23:38:15,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:15,279 INFO L470 AbstractCegarLoop]: Abstraction has 321 states and 455 transitions. [2021-10-28 23:38:15,279 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:15,280 INFO L276 IsEmpty]: Start isEmpty. Operand 321 states and 455 transitions. [2021-10-28 23:38:15,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-28 23:38:15,280 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:15,281 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:15,281 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-10-28 23:38:15,281 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:15,282 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:15,282 INFO L85 PathProgramCache]: Analyzing trace with hash -1457776406, now seen corresponding path program 1 times [2021-10-28 23:38:15,282 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:15,283 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [534928267] [2021-10-28 23:38:15,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:15,283 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:15,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:15,384 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:15,385 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:15,386 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [534928267] [2021-10-28 23:38:15,391 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [534928267] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:15,392 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:15,392 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:38:15,393 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1652701223] [2021-10-28 23:38:15,393 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 23:38:15,397 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:15,398 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 23:38:15,399 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:38:15,399 INFO L87 Difference]: Start difference. First operand 321 states and 455 transitions. Second operand has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:15,631 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:15,631 INFO L93 Difference]: Finished difference Result 1003 states and 1436 transitions. [2021-10-28 23:38:15,631 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 23:38:15,632 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-28 23:38:15,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:15,636 INFO L225 Difference]: With dead ends: 1003 [2021-10-28 23:38:15,637 INFO L226 Difference]: Without dead ends: 699 [2021-10-28 23:38:15,638 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-28 23:38:15,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 699 states. [2021-10-28 23:38:15,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 699 to 419. [2021-10-28 23:38:15,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 419 states, 400 states have (on average 1.48) internal successors, (592), 418 states have internal predecessors, (592), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:15,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 419 states to 419 states and 592 transitions. [2021-10-28 23:38:15,660 INFO L78 Accepts]: Start accepts. Automaton has 419 states and 592 transitions. Word has length 54 [2021-10-28 23:38:15,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:15,661 INFO L470 AbstractCegarLoop]: Abstraction has 419 states and 592 transitions. [2021-10-28 23:38:15,661 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:15,662 INFO L276 IsEmpty]: Start isEmpty. Operand 419 states and 592 transitions. [2021-10-28 23:38:15,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2021-10-28 23:38:15,663 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:15,663 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:15,663 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-10-28 23:38:15,663 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:15,664 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:15,664 INFO L85 PathProgramCache]: Analyzing trace with hash -588423898, now seen corresponding path program 1 times [2021-10-28 23:38:15,664 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:15,665 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1279563792] [2021-10-28 23:38:15,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:15,665 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:15,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:15,754 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:15,755 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:15,755 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1279563792] [2021-10-28 23:38:15,755 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1279563792] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:15,755 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:15,756 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:38:15,756 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1204190659] [2021-10-28 23:38:15,756 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 23:38:15,757 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:15,758 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 23:38:15,758 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:38:15,758 INFO L87 Difference]: Start difference. First operand 419 states and 592 transitions. Second operand has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:15,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:15,968 INFO L93 Difference]: Finished difference Result 1003 states and 1428 transitions. [2021-10-28 23:38:15,969 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 23:38:15,969 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 55 [2021-10-28 23:38:15,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:15,973 INFO L225 Difference]: With dead ends: 1003 [2021-10-28 23:38:15,974 INFO L226 Difference]: Without dead ends: 699 [2021-10-28 23:38:15,975 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-28 23:38:15,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 699 states. [2021-10-28 23:38:15,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 699 to 419. [2021-10-28 23:38:15,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 419 states, 400 states have (on average 1.47) internal successors, (588), 418 states have internal predecessors, (588), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:15,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 419 states to 419 states and 588 transitions. [2021-10-28 23:38:15,999 INFO L78 Accepts]: Start accepts. Automaton has 419 states and 588 transitions. Word has length 55 [2021-10-28 23:38:15,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:16,000 INFO L470 AbstractCegarLoop]: Abstraction has 419 states and 588 transitions. [2021-10-28 23:38:16,000 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:16,000 INFO L276 IsEmpty]: Start isEmpty. Operand 419 states and 588 transitions. [2021-10-28 23:38:16,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2021-10-28 23:38:16,001 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:16,001 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:16,002 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-10-28 23:38:16,002 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:16,002 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:16,003 INFO L85 PathProgramCache]: Analyzing trace with hash 1072428279, now seen corresponding path program 1 times [2021-10-28 23:38:16,003 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:16,003 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1519790392] [2021-10-28 23:38:16,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:16,004 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:16,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:16,157 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:16,157 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:16,157 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1519790392] [2021-10-28 23:38:16,158 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1519790392] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:16,158 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:16,158 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:38:16,158 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1487778538] [2021-10-28 23:38:16,159 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:38:16,159 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:16,160 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:38:16,160 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:38:16,160 INFO L87 Difference]: Start difference. First operand 419 states and 588 transitions. Second operand has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:16,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:16,201 INFO L93 Difference]: Finished difference Result 843 states and 1199 transitions. [2021-10-28 23:38:16,201 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:38:16,202 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 56 [2021-10-28 23:38:16,203 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:16,206 INFO L225 Difference]: With dead ends: 843 [2021-10-28 23:38:16,207 INFO L226 Difference]: Without dead ends: 539 [2021-10-28 23:38:16,207 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:38:16,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2021-10-28 23:38:16,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 414. [2021-10-28 23:38:16,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 414 states, 396 states have (on average 1.4646464646464648) internal successors, (580), 413 states have internal predecessors, (580), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:16,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 414 states to 414 states and 580 transitions. [2021-10-28 23:38:16,233 INFO L78 Accepts]: Start accepts. Automaton has 414 states and 580 transitions. Word has length 56 [2021-10-28 23:38:16,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:16,235 INFO L470 AbstractCegarLoop]: Abstraction has 414 states and 580 transitions. [2021-10-28 23:38:16,235 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:16,235 INFO L276 IsEmpty]: Start isEmpty. Operand 414 states and 580 transitions. [2021-10-28 23:38:16,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2021-10-28 23:38:16,236 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:16,236 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:16,237 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-10-28 23:38:16,237 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:16,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:16,238 INFO L85 PathProgramCache]: Analyzing trace with hash -1887754801, now seen corresponding path program 1 times [2021-10-28 23:38:16,238 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:16,238 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [350709200] [2021-10-28 23:38:16,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:16,239 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:16,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:16,352 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:16,352 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:16,352 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [350709200] [2021-10-28 23:38:16,352 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [350709200] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:16,353 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:16,353 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:38:16,353 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [20727609] [2021-10-28 23:38:16,353 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:38:16,354 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:16,354 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:38:16,354 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:38:16,355 INFO L87 Difference]: Start difference. First operand 414 states and 580 transitions. Second operand has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:16,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:16,431 INFO L93 Difference]: Finished difference Result 842 states and 1198 transitions. [2021-10-28 23:38:16,431 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:38:16,431 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 60 [2021-10-28 23:38:16,432 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:16,435 INFO L225 Difference]: With dead ends: 842 [2021-10-28 23:38:16,435 INFO L226 Difference]: Without dead ends: 543 [2021-10-28 23:38:16,437 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:38:16,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 543 states. [2021-10-28 23:38:16,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 543 to 394. [2021-10-28 23:38:16,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 394 states, 380 states have (on average 1.4421052631578948) internal successors, (548), 393 states have internal predecessors, (548), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:16,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 394 states to 394 states and 548 transitions. [2021-10-28 23:38:16,465 INFO L78 Accepts]: Start accepts. Automaton has 394 states and 548 transitions. Word has length 60 [2021-10-28 23:38:16,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:16,465 INFO L470 AbstractCegarLoop]: Abstraction has 394 states and 548 transitions. [2021-10-28 23:38:16,466 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:16,466 INFO L276 IsEmpty]: Start isEmpty. Operand 394 states and 548 transitions. [2021-10-28 23:38:16,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2021-10-28 23:38:16,467 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:16,467 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:16,467 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-10-28 23:38:16,468 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:16,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:16,468 INFO L85 PathProgramCache]: Analyzing trace with hash 803488295, now seen corresponding path program 1 times [2021-10-28 23:38:16,469 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:16,470 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [101346711] [2021-10-28 23:38:16,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:16,471 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:16,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:16,561 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:16,561 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:16,561 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [101346711] [2021-10-28 23:38:16,562 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [101346711] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:16,562 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:16,562 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:38:16,562 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [296267160] [2021-10-28 23:38:16,563 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:38:16,563 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:16,563 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:38:16,564 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:38:16,564 INFO L87 Difference]: Start difference. First operand 394 states and 548 transitions. Second operand has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:16,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:16,643 INFO L93 Difference]: Finished difference Result 810 states and 1142 transitions. [2021-10-28 23:38:16,643 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:38:16,643 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 64 [2021-10-28 23:38:16,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:16,647 INFO L225 Difference]: With dead ends: 810 [2021-10-28 23:38:16,647 INFO L226 Difference]: Without dead ends: 531 [2021-10-28 23:38:16,649 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:38:16,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 531 states. [2021-10-28 23:38:16,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 531 to 382. [2021-10-28 23:38:16,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 382 states, 370 states have (on average 1.4324324324324325) internal successors, (530), 381 states have internal predecessors, (530), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:16,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 382 states to 382 states and 530 transitions. [2021-10-28 23:38:16,675 INFO L78 Accepts]: Start accepts. Automaton has 382 states and 530 transitions. Word has length 64 [2021-10-28 23:38:16,675 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:16,675 INFO L470 AbstractCegarLoop]: Abstraction has 382 states and 530 transitions. [2021-10-28 23:38:16,676 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:16,676 INFO L276 IsEmpty]: Start isEmpty. Operand 382 states and 530 transitions. [2021-10-28 23:38:16,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2021-10-28 23:38:16,677 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:16,677 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:16,678 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-10-28 23:38:16,678 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:16,679 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:16,679 INFO L85 PathProgramCache]: Analyzing trace with hash -576016629, now seen corresponding path program 1 times [2021-10-28 23:38:16,679 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:16,682 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1667383538] [2021-10-28 23:38:16,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:16,683 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:16,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:16,790 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:16,790 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:16,790 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1667383538] [2021-10-28 23:38:16,791 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1667383538] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:16,791 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:16,791 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:38:16,791 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [567745954] [2021-10-28 23:38:16,792 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:38:16,792 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:16,794 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:38:16,794 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:38:16,795 INFO L87 Difference]: Start difference. First operand 382 states and 530 transitions. Second operand has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:16,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:16,882 INFO L93 Difference]: Finished difference Result 806 states and 1134 transitions. [2021-10-28 23:38:16,883 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:38:16,883 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 65 [2021-10-28 23:38:16,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:16,887 INFO L225 Difference]: With dead ends: 806 [2021-10-28 23:38:16,887 INFO L226 Difference]: Without dead ends: 539 [2021-10-28 23:38:16,888 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:38:16,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2021-10-28 23:38:16,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 362. [2021-10-28 23:38:16,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 362 states, 354 states have (on average 1.4067796610169492) internal successors, (498), 361 states have internal predecessors, (498), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:16,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 362 states to 362 states and 498 transitions. [2021-10-28 23:38:16,918 INFO L78 Accepts]: Start accepts. Automaton has 362 states and 498 transitions. Word has length 65 [2021-10-28 23:38:16,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:16,919 INFO L470 AbstractCegarLoop]: Abstraction has 362 states and 498 transitions. [2021-10-28 23:38:16,919 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:16,919 INFO L276 IsEmpty]: Start isEmpty. Operand 362 states and 498 transitions. [2021-10-28 23:38:16,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2021-10-28 23:38:16,920 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:16,921 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:16,921 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-10-28 23:38:16,921 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:16,922 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:16,922 INFO L85 PathProgramCache]: Analyzing trace with hash 990513659, now seen corresponding path program 1 times [2021-10-28 23:38:16,922 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:16,922 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2038509709] [2021-10-28 23:38:16,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:16,923 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:16,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:17,108 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:17,108 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:17,109 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2038509709] [2021-10-28 23:38:17,110 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2038509709] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:17,111 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:17,111 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:38:17,112 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1183767532] [2021-10-28 23:38:17,113 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:38:17,113 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:17,114 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:38:17,114 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:38:17,115 INFO L87 Difference]: Start difference. First operand 362 states and 498 transitions. Second operand has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:17,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:17,352 INFO L93 Difference]: Finished difference Result 1093 states and 1516 transitions. [2021-10-28 23:38:17,352 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 23:38:17,353 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 70 [2021-10-28 23:38:17,353 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:17,359 INFO L225 Difference]: With dead ends: 1093 [2021-10-28 23:38:17,359 INFO L226 Difference]: Without dead ends: 846 [2021-10-28 23:38:17,361 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-28 23:38:17,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 846 states. [2021-10-28 23:38:17,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 846 to 412. [2021-10-28 23:38:17,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 412 states, 404 states have (on average 1.400990099009901) internal successors, (566), 411 states have internal predecessors, (566), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:17,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 412 states to 412 states and 566 transitions. [2021-10-28 23:38:17,401 INFO L78 Accepts]: Start accepts. Automaton has 412 states and 566 transitions. Word has length 70 [2021-10-28 23:38:17,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:17,402 INFO L470 AbstractCegarLoop]: Abstraction has 412 states and 566 transitions. [2021-10-28 23:38:17,402 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:17,403 INFO L276 IsEmpty]: Start isEmpty. Operand 412 states and 566 transitions. [2021-10-28 23:38:17,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2021-10-28 23:38:17,404 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:17,404 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:17,405 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-10-28 23:38:17,405 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:17,406 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:17,406 INFO L85 PathProgramCache]: Analyzing trace with hash 1319402658, now seen corresponding path program 1 times [2021-10-28 23:38:17,406 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:17,406 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1655606835] [2021-10-28 23:38:17,407 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:17,407 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:17,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:17,484 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:17,484 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:17,484 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1655606835] [2021-10-28 23:38:17,485 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1655606835] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:17,485 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:17,485 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:38:17,485 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [774535289] [2021-10-28 23:38:17,486 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:38:17,486 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:17,487 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:38:17,487 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:38:17,487 INFO L87 Difference]: Start difference. First operand 412 states and 566 transitions. Second operand has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:17,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:17,576 INFO L93 Difference]: Finished difference Result 842 states and 1171 transitions. [2021-10-28 23:38:17,577 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:38:17,577 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2021-10-28 23:38:17,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:17,581 INFO L225 Difference]: With dead ends: 842 [2021-10-28 23:38:17,581 INFO L226 Difference]: Without dead ends: 578 [2021-10-28 23:38:17,583 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:38:17,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 578 states. [2021-10-28 23:38:17,613 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 578 to 396. [2021-10-28 23:38:17,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 396 states, 390 states have (on average 1.3846153846153846) internal successors, (540), 395 states have internal predecessors, (540), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:17,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 396 states to 396 states and 540 transitions. [2021-10-28 23:38:17,617 INFO L78 Accepts]: Start accepts. Automaton has 396 states and 540 transitions. Word has length 71 [2021-10-28 23:38:17,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:17,618 INFO L470 AbstractCegarLoop]: Abstraction has 396 states and 540 transitions. [2021-10-28 23:38:17,618 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:17,618 INFO L276 IsEmpty]: Start isEmpty. Operand 396 states and 540 transitions. [2021-10-28 23:38:17,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2021-10-28 23:38:17,619 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:17,620 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:17,620 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-10-28 23:38:17,620 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:17,621 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:17,621 INFO L85 PathProgramCache]: Analyzing trace with hash -2095984420, now seen corresponding path program 1 times [2021-10-28 23:38:17,621 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:17,621 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [608042809] [2021-10-28 23:38:17,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:17,622 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:17,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:17,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:17,708 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:17,708 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [608042809] [2021-10-28 23:38:17,708 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [608042809] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:17,708 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:17,709 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:38:17,709 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [268855575] [2021-10-28 23:38:17,709 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:38:17,710 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:17,710 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:38:17,710 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:38:17,711 INFO L87 Difference]: Start difference. First operand 396 states and 540 transitions. Second operand has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:17,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:17,775 INFO L93 Difference]: Finished difference Result 711 states and 985 transitions. [2021-10-28 23:38:17,776 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:38:17,776 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2021-10-28 23:38:17,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:17,780 INFO L225 Difference]: With dead ends: 711 [2021-10-28 23:38:17,780 INFO L226 Difference]: Without dead ends: 476 [2021-10-28 23:38:17,781 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:38:17,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 476 states. [2021-10-28 23:38:17,816 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 476 to 392. [2021-10-28 23:38:17,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 392 states, 387 states have (on average 1.3772609819121446) internal successors, (533), 391 states have internal predecessors, (533), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:17,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 533 transitions. [2021-10-28 23:38:17,819 INFO L78 Accepts]: Start accepts. Automaton has 392 states and 533 transitions. Word has length 71 [2021-10-28 23:38:17,819 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:17,819 INFO L470 AbstractCegarLoop]: Abstraction has 392 states and 533 transitions. [2021-10-28 23:38:17,820 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:17,820 INFO L276 IsEmpty]: Start isEmpty. Operand 392 states and 533 transitions. [2021-10-28 23:38:17,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2021-10-28 23:38:17,821 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:17,821 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:17,821 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-10-28 23:38:17,821 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:17,822 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:17,822 INFO L85 PathProgramCache]: Analyzing trace with hash -2054231207, now seen corresponding path program 1 times [2021-10-28 23:38:17,822 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:17,822 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1451431897] [2021-10-28 23:38:17,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:17,823 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:17,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:17,933 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:17,933 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:17,933 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1451431897] [2021-10-28 23:38:17,933 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1451431897] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:17,933 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:17,934 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-28 23:38:17,934 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1768194898] [2021-10-28 23:38:17,934 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-28 23:38:17,934 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:17,935 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 23:38:17,935 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2021-10-28 23:38:17,935 INFO L87 Difference]: Start difference. First operand 392 states and 533 transitions. Second operand has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:18,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:18,315 INFO L93 Difference]: Finished difference Result 1356 states and 1856 transitions. [2021-10-28 23:38:18,316 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:38:18,316 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2021-10-28 23:38:18,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:18,322 INFO L225 Difference]: With dead ends: 1356 [2021-10-28 23:38:18,323 INFO L226 Difference]: Without dead ends: 1107 [2021-10-28 23:38:18,328 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-28 23:38:18,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1107 states. [2021-10-28 23:38:18,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1107 to 420. [2021-10-28 23:38:18,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 420 states, 415 states have (on average 1.3614457831325302) internal successors, (565), 419 states have internal predecessors, (565), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:18,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 420 states to 420 states and 565 transitions. [2021-10-28 23:38:18,369 INFO L78 Accepts]: Start accepts. Automaton has 420 states and 565 transitions. Word has length 74 [2021-10-28 23:38:18,369 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:18,370 INFO L470 AbstractCegarLoop]: Abstraction has 420 states and 565 transitions. [2021-10-28 23:38:18,370 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:18,370 INFO L276 IsEmpty]: Start isEmpty. Operand 420 states and 565 transitions. [2021-10-28 23:38:18,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2021-10-28 23:38:18,371 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:18,371 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:18,372 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-10-28 23:38:18,372 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:18,374 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:18,374 INFO L85 PathProgramCache]: Analyzing trace with hash 1972545423, now seen corresponding path program 1 times [2021-10-28 23:38:18,375 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:18,377 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1681175288] [2021-10-28 23:38:18,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:18,377 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:18,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:18,451 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:18,451 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:18,452 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1681175288] [2021-10-28 23:38:18,454 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1681175288] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:18,454 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:18,454 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:38:18,455 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1259331014] [2021-10-28 23:38:18,455 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:38:18,455 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:18,456 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:38:18,456 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:38:18,456 INFO L87 Difference]: Start difference. First operand 420 states and 565 transitions. Second operand has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:18,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:18,602 INFO L93 Difference]: Finished difference Result 1083 states and 1467 transitions. [2021-10-28 23:38:18,602 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:38:18,603 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2021-10-28 23:38:18,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:18,608 INFO L225 Difference]: With dead ends: 1083 [2021-10-28 23:38:18,608 INFO L226 Difference]: Without dead ends: 828 [2021-10-28 23:38:18,609 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:38:18,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 828 states. [2021-10-28 23:38:18,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 828 to 633. [2021-10-28 23:38:18,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 633 states, 628 states have (on average 1.3423566878980893) internal successors, (843), 632 states have internal predecessors, (843), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:18,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 633 states to 633 states and 843 transitions. [2021-10-28 23:38:18,669 INFO L78 Accepts]: Start accepts. Automaton has 633 states and 843 transitions. Word has length 74 [2021-10-28 23:38:18,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:18,670 INFO L470 AbstractCegarLoop]: Abstraction has 633 states and 843 transitions. [2021-10-28 23:38:18,670 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:18,670 INFO L276 IsEmpty]: Start isEmpty. Operand 633 states and 843 transitions. [2021-10-28 23:38:18,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-10-28 23:38:18,671 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:18,672 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:18,672 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-10-28 23:38:18,672 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:18,673 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:18,673 INFO L85 PathProgramCache]: Analyzing trace with hash 1201500974, now seen corresponding path program 1 times [2021-10-28 23:38:18,673 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:18,673 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [802127911] [2021-10-28 23:38:18,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:18,674 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:18,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:18,807 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:18,807 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:18,807 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [802127911] [2021-10-28 23:38:18,807 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [802127911] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:18,807 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:18,808 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:38:18,808 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [459076870] [2021-10-28 23:38:18,808 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:38:18,809 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:18,809 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:38:18,810 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:38:18,810 INFO L87 Difference]: Start difference. First operand 633 states and 843 transitions. Second operand has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:19,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:19,156 INFO L93 Difference]: Finished difference Result 1906 states and 2597 transitions. [2021-10-28 23:38:19,157 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 23:38:19,157 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2021-10-28 23:38:19,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:19,166 INFO L225 Difference]: With dead ends: 1906 [2021-10-28 23:38:19,166 INFO L226 Difference]: Without dead ends: 1540 [2021-10-28 23:38:19,167 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-28 23:38:19,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1540 states. [2021-10-28 23:38:19,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1540 to 621. [2021-10-28 23:38:19,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 621 states, 616 states have (on average 1.3457792207792207) internal successors, (829), 620 states have internal predecessors, (829), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:19,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 621 states to 621 states and 829 transitions. [2021-10-28 23:38:19,234 INFO L78 Accepts]: Start accepts. Automaton has 621 states and 829 transitions. Word has length 75 [2021-10-28 23:38:19,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:19,235 INFO L470 AbstractCegarLoop]: Abstraction has 621 states and 829 transitions. [2021-10-28 23:38:19,235 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:19,235 INFO L276 IsEmpty]: Start isEmpty. Operand 621 states and 829 transitions. [2021-10-28 23:38:19,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-10-28 23:38:19,236 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:19,236 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:19,237 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-10-28 23:38:19,237 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:19,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:19,238 INFO L85 PathProgramCache]: Analyzing trace with hash -979161099, now seen corresponding path program 1 times [2021-10-28 23:38:19,238 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:19,238 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2132900551] [2021-10-28 23:38:19,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:19,238 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:19,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:19,314 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:19,314 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:19,314 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2132900551] [2021-10-28 23:38:19,314 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2132900551] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:19,314 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:19,315 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:38:19,315 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1708258115] [2021-10-28 23:38:19,315 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:38:19,316 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:19,316 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:38:19,316 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:38:19,317 INFO L87 Difference]: Start difference. First operand 621 states and 829 transitions. Second operand has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:19,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:19,541 INFO L93 Difference]: Finished difference Result 973 states and 1316 transitions. [2021-10-28 23:38:19,541 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-28 23:38:19,542 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2021-10-28 23:38:19,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:19,547 INFO L225 Difference]: With dead ends: 973 [2021-10-28 23:38:19,547 INFO L226 Difference]: Without dead ends: 971 [2021-10-28 23:38:19,548 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-28 23:38:19,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 971 states. [2021-10-28 23:38:19,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 971 to 623. [2021-10-28 23:38:19,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 623 states, 618 states have (on average 1.3446601941747574) internal successors, (831), 622 states have internal predecessors, (831), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:19,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 623 states to 623 states and 831 transitions. [2021-10-28 23:38:19,617 INFO L78 Accepts]: Start accepts. Automaton has 623 states and 831 transitions. Word has length 75 [2021-10-28 23:38:19,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:19,618 INFO L470 AbstractCegarLoop]: Abstraction has 623 states and 831 transitions. [2021-10-28 23:38:19,618 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:19,618 INFO L276 IsEmpty]: Start isEmpty. Operand 623 states and 831 transitions. [2021-10-28 23:38:19,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-28 23:38:19,619 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:19,620 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:19,620 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-10-28 23:38:19,620 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:19,621 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:19,621 INFO L85 PathProgramCache]: Analyzing trace with hash 1972810381, now seen corresponding path program 1 times [2021-10-28 23:38:19,621 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:19,621 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1599451221] [2021-10-28 23:38:19,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:19,622 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:19,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:19,696 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:19,696 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:19,696 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1599451221] [2021-10-28 23:38:19,697 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1599451221] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:19,697 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:19,697 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:38:19,697 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [916661278] [2021-10-28 23:38:19,699 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:38:19,699 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:19,700 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:38:19,700 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:38:19,700 INFO L87 Difference]: Start difference. First operand 623 states and 831 transitions. Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:19,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:19,919 INFO L93 Difference]: Finished difference Result 1470 states and 2033 transitions. [2021-10-28 23:38:19,920 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:38:19,920 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-28 23:38:19,920 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:19,926 INFO L225 Difference]: With dead ends: 1470 [2021-10-28 23:38:19,926 INFO L226 Difference]: Without dead ends: 1102 [2021-10-28 23:38:19,928 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-28 23:38:19,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1102 states. [2021-10-28 23:38:20,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1102 to 629. [2021-10-28 23:38:20,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 629 states, 624 states have (on average 1.3413461538461537) internal successors, (837), 628 states have internal predecessors, (837), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:20,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 629 states to 629 states and 837 transitions. [2021-10-28 23:38:20,028 INFO L78 Accepts]: Start accepts. Automaton has 629 states and 837 transitions. Word has length 76 [2021-10-28 23:38:20,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:20,028 INFO L470 AbstractCegarLoop]: Abstraction has 629 states and 837 transitions. [2021-10-28 23:38:20,028 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:20,029 INFO L276 IsEmpty]: Start isEmpty. Operand 629 states and 837 transitions. [2021-10-28 23:38:20,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-28 23:38:20,030 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:20,030 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:20,030 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-10-28 23:38:20,031 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:20,032 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:20,032 INFO L85 PathProgramCache]: Analyzing trace with hash -1558776470, now seen corresponding path program 1 times [2021-10-28 23:38:20,032 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:20,032 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1981789895] [2021-10-28 23:38:20,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:20,033 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:20,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:20,117 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:20,117 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:20,118 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1981789895] [2021-10-28 23:38:20,118 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1981789895] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:20,118 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:20,118 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:38:20,118 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2058866940] [2021-10-28 23:38:20,119 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:38:20,119 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:20,120 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:38:20,120 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:38:20,120 INFO L87 Difference]: Start difference. First operand 629 states and 837 transitions. Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:20,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:20,308 INFO L93 Difference]: Finished difference Result 1467 states and 1956 transitions. [2021-10-28 23:38:20,308 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:38:20,309 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-28 23:38:20,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:20,315 INFO L225 Difference]: With dead ends: 1467 [2021-10-28 23:38:20,315 INFO L226 Difference]: Without dead ends: 1075 [2021-10-28 23:38:20,316 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:38:20,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1075 states. [2021-10-28 23:38:20,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1075 to 819. [2021-10-28 23:38:20,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 819 states, 814 states have (on average 1.3329238329238329) internal successors, (1085), 818 states have internal predecessors, (1085), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:20,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 819 states to 819 states and 1085 transitions. [2021-10-28 23:38:20,407 INFO L78 Accepts]: Start accepts. Automaton has 819 states and 1085 transitions. Word has length 76 [2021-10-28 23:38:20,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:20,408 INFO L470 AbstractCegarLoop]: Abstraction has 819 states and 1085 transitions. [2021-10-28 23:38:20,409 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:20,409 INFO L276 IsEmpty]: Start isEmpty. Operand 819 states and 1085 transitions. [2021-10-28 23:38:20,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-28 23:38:20,411 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:20,411 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:20,411 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-10-28 23:38:20,412 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:20,412 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:20,412 INFO L85 PathProgramCache]: Analyzing trace with hash -932876156, now seen corresponding path program 1 times [2021-10-28 23:38:20,412 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:20,413 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [240276239] [2021-10-28 23:38:20,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:20,413 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:20,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:20,548 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:20,548 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:20,548 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [240276239] [2021-10-28 23:38:20,549 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [240276239] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:20,549 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:20,549 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:38:20,549 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [375433113] [2021-10-28 23:38:20,550 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:38:20,551 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:20,552 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:38:20,552 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:38:20,553 INFO L87 Difference]: Start difference. First operand 819 states and 1085 transitions. Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:21,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:21,149 INFO L93 Difference]: Finished difference Result 3152 states and 4196 transitions. [2021-10-28 23:38:21,149 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:38:21,149 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-28 23:38:21,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:21,164 INFO L225 Difference]: With dead ends: 3152 [2021-10-28 23:38:21,164 INFO L226 Difference]: Without dead ends: 2633 [2021-10-28 23:38:21,166 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-28 23:38:21,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2633 states. [2021-10-28 23:38:21,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2633 to 873. [2021-10-28 23:38:21,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 873 states, 868 states have (on average 1.3283410138248848) internal successors, (1153), 872 states have internal predecessors, (1153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:21,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 873 states to 873 states and 1153 transitions. [2021-10-28 23:38:21,295 INFO L78 Accepts]: Start accepts. Automaton has 873 states and 1153 transitions. Word has length 76 [2021-10-28 23:38:21,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:21,296 INFO L470 AbstractCegarLoop]: Abstraction has 873 states and 1153 transitions. [2021-10-28 23:38:21,296 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:21,296 INFO L276 IsEmpty]: Start isEmpty. Operand 873 states and 1153 transitions. [2021-10-28 23:38:21,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-10-28 23:38:21,297 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:21,298 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:21,298 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-10-28 23:38:21,298 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:21,298 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:21,299 INFO L85 PathProgramCache]: Analyzing trace with hash 542872594, now seen corresponding path program 1 times [2021-10-28 23:38:21,299 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:21,299 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1302067568] [2021-10-28 23:38:21,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:21,300 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:21,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:21,365 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:21,366 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:21,366 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1302067568] [2021-10-28 23:38:21,366 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1302067568] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:21,366 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:21,367 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:38:21,367 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1374614262] [2021-10-28 23:38:21,367 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:38:21,368 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:21,368 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:38:21,368 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:38:21,369 INFO L87 Difference]: Start difference. First operand 873 states and 1153 transitions. Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:21,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:21,664 INFO L93 Difference]: Finished difference Result 2259 states and 2989 transitions. [2021-10-28 23:38:21,665 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:38:21,665 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-10-28 23:38:21,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:21,674 INFO L225 Difference]: With dead ends: 2259 [2021-10-28 23:38:21,674 INFO L226 Difference]: Without dead ends: 1687 [2021-10-28 23:38:21,676 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:38:21,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1687 states. [2021-10-28 23:38:21,806 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1687 to 1214. [2021-10-28 23:38:21,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1214 states, 1209 states have (on average 1.315963606286187) internal successors, (1591), 1213 states have internal predecessors, (1591), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:21,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1214 states to 1214 states and 1591 transitions. [2021-10-28 23:38:21,814 INFO L78 Accepts]: Start accepts. Automaton has 1214 states and 1591 transitions. Word has length 77 [2021-10-28 23:38:21,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:21,814 INFO L470 AbstractCegarLoop]: Abstraction has 1214 states and 1591 transitions. [2021-10-28 23:38:21,815 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:21,815 INFO L276 IsEmpty]: Start isEmpty. Operand 1214 states and 1591 transitions. [2021-10-28 23:38:21,816 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-28 23:38:21,817 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:21,817 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:21,817 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-10-28 23:38:21,817 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:21,818 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:21,818 INFO L85 PathProgramCache]: Analyzing trace with hash -871568132, now seen corresponding path program 1 times [2021-10-28 23:38:21,818 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:21,818 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1957020341] [2021-10-28 23:38:21,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:21,819 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:21,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:21,869 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:21,869 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:21,869 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1957020341] [2021-10-28 23:38:21,869 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1957020341] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:21,870 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:21,870 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:38:21,871 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1428829149] [2021-10-28 23:38:21,872 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:38:21,872 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:21,873 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:38:21,874 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:38:21,874 INFO L87 Difference]: Start difference. First operand 1214 states and 1591 transitions. Second operand has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:22,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:22,190 INFO L93 Difference]: Finished difference Result 2970 states and 3890 transitions. [2021-10-28 23:38:22,191 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:38:22,191 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-28 23:38:22,191 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:22,202 INFO L225 Difference]: With dead ends: 2970 [2021-10-28 23:38:22,202 INFO L226 Difference]: Without dead ends: 2014 [2021-10-28 23:38:22,204 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:38:22,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2014 states. [2021-10-28 23:38:22,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2014 to 1216. [2021-10-28 23:38:22,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1216 states, 1211 states have (on average 1.3154417836498762) internal successors, (1593), 1215 states have internal predecessors, (1593), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:22,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1216 states to 1216 states and 1593 transitions. [2021-10-28 23:38:22,343 INFO L78 Accepts]: Start accepts. Automaton has 1216 states and 1593 transitions. Word has length 78 [2021-10-28 23:38:22,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:22,344 INFO L470 AbstractCegarLoop]: Abstraction has 1216 states and 1593 transitions. [2021-10-28 23:38:22,344 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:22,344 INFO L276 IsEmpty]: Start isEmpty. Operand 1216 states and 1593 transitions. [2021-10-28 23:38:22,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2021-10-28 23:38:22,346 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:22,346 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:22,346 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-10-28 23:38:22,347 INFO L402 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:22,347 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:22,347 INFO L85 PathProgramCache]: Analyzing trace with hash 1856049885, now seen corresponding path program 1 times [2021-10-28 23:38:22,347 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:22,348 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [815701678] [2021-10-28 23:38:22,348 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:22,348 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:22,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:22,429 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:22,429 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:22,429 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [815701678] [2021-10-28 23:38:22,429 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [815701678] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:22,430 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:22,430 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:38:22,430 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [244834537] [2021-10-28 23:38:22,430 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:38:22,431 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:22,431 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:38:22,431 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:38:22,432 INFO L87 Difference]: Start difference. First operand 1216 states and 1593 transitions. Second operand has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:22,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:22,683 INFO L93 Difference]: Finished difference Result 2522 states and 3298 transitions. [2021-10-28 23:38:22,683 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:38:22,683 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 79 [2021-10-28 23:38:22,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:22,691 INFO L225 Difference]: With dead ends: 2522 [2021-10-28 23:38:22,691 INFO L226 Difference]: Without dead ends: 1378 [2021-10-28 23:38:22,693 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:38:22,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1378 states. [2021-10-28 23:38:22,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1378 to 1021. [2021-10-28 23:38:22,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1021 states, 1016 states have (on average 1.3080708661417322) internal successors, (1329), 1020 states have internal predecessors, (1329), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:22,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1021 states to 1021 states and 1329 transitions. [2021-10-28 23:38:22,817 INFO L78 Accepts]: Start accepts. Automaton has 1021 states and 1329 transitions. Word has length 79 [2021-10-28 23:38:22,817 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:22,817 INFO L470 AbstractCegarLoop]: Abstraction has 1021 states and 1329 transitions. [2021-10-28 23:38:22,817 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:22,817 INFO L276 IsEmpty]: Start isEmpty. Operand 1021 states and 1329 transitions. [2021-10-28 23:38:22,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-10-28 23:38:22,819 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:22,819 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:22,819 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-10-28 23:38:22,819 INFO L402 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:22,820 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:22,820 INFO L85 PathProgramCache]: Analyzing trace with hash 1593609901, now seen corresponding path program 1 times [2021-10-28 23:38:22,820 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:22,821 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [839936056] [2021-10-28 23:38:22,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:22,821 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:22,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:22,859 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:22,859 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:22,859 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [839936056] [2021-10-28 23:38:22,860 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [839936056] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:22,860 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:22,860 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:38:22,860 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2143287153] [2021-10-28 23:38:22,861 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:38:22,861 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:22,861 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:38:22,862 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:38:22,862 INFO L87 Difference]: Start difference. First operand 1021 states and 1329 transitions. Second operand has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:23,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:23,151 INFO L93 Difference]: Finished difference Result 2417 states and 3163 transitions. [2021-10-28 23:38:23,151 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:38:23,151 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-10-28 23:38:23,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:23,161 INFO L225 Difference]: With dead ends: 2417 [2021-10-28 23:38:23,161 INFO L226 Difference]: Without dead ends: 1539 [2021-10-28 23:38:23,163 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:38:23,165 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1539 states. [2021-10-28 23:38:23,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1539 to 1027. [2021-10-28 23:38:23,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1027 states, 1022 states have (on average 1.3062622309197651) internal successors, (1335), 1026 states have internal predecessors, (1335), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:23,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1027 states to 1027 states and 1335 transitions. [2021-10-28 23:38:23,319 INFO L78 Accepts]: Start accepts. Automaton has 1027 states and 1335 transitions. Word has length 80 [2021-10-28 23:38:23,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:23,320 INFO L470 AbstractCegarLoop]: Abstraction has 1027 states and 1335 transitions. [2021-10-28 23:38:23,321 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:23,321 INFO L276 IsEmpty]: Start isEmpty. Operand 1027 states and 1335 transitions. [2021-10-28 23:38:23,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-10-28 23:38:23,322 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:23,323 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:23,323 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-10-28 23:38:23,323 INFO L402 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:23,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:23,324 INFO L85 PathProgramCache]: Analyzing trace with hash 1333673785, now seen corresponding path program 1 times [2021-10-28 23:38:23,324 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:23,324 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1612415370] [2021-10-28 23:38:23,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:23,325 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:23,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:23,406 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:23,406 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:23,407 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1612415370] [2021-10-28 23:38:23,407 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1612415370] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:23,407 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:23,407 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:38:23,407 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1979326163] [2021-10-28 23:38:23,408 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:38:23,408 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:23,410 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:38:23,410 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:38:23,410 INFO L87 Difference]: Start difference. First operand 1027 states and 1335 transitions. Second operand has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:23,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:23,644 INFO L93 Difference]: Finished difference Result 2370 states and 3088 transitions. [2021-10-28 23:38:23,644 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:38:23,645 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-10-28 23:38:23,645 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:23,652 INFO L225 Difference]: With dead ends: 2370 [2021-10-28 23:38:23,653 INFO L226 Difference]: Without dead ends: 1438 [2021-10-28 23:38:23,655 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:38:23,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1438 states. [2021-10-28 23:38:23,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1438 to 969. [2021-10-28 23:38:23,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 969 states, 964 states have (on average 1.299792531120332) internal successors, (1253), 968 states have internal predecessors, (1253), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:23,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 969 states to 969 states and 1253 transitions. [2021-10-28 23:38:23,779 INFO L78 Accepts]: Start accepts. Automaton has 969 states and 1253 transitions. Word has length 80 [2021-10-28 23:38:23,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:23,779 INFO L470 AbstractCegarLoop]: Abstraction has 969 states and 1253 transitions. [2021-10-28 23:38:23,780 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:23,780 INFO L276 IsEmpty]: Start isEmpty. Operand 969 states and 1253 transitions. [2021-10-28 23:38:23,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2021-10-28 23:38:23,782 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:23,783 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:23,783 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-10-28 23:38:23,783 INFO L402 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:23,784 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:23,784 INFO L85 PathProgramCache]: Analyzing trace with hash -1625709510, now seen corresponding path program 1 times [2021-10-28 23:38:23,784 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:23,784 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [514200239] [2021-10-28 23:38:23,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:23,785 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:23,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:23,987 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:23,988 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:23,988 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [514200239] [2021-10-28 23:38:23,988 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [514200239] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:38:23,988 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1059082726] [2021-10-28 23:38:23,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:23,989 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:38:23,989 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:38:23,991 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:38:23,998 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-10-28 23:38:24,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:24,212 INFO L263 TraceCheckSpWp]: Trace formula consists of 713 conjuncts, 8 conjunts are in the unsatisfiable core [2021-10-28 23:38:24,228 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:38:24,808 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-28 23:38:24,809 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1059082726] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:24,809 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-28 23:38:24,809 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2021-10-28 23:38:24,810 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1128042931] [2021-10-28 23:38:24,810 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:38:24,810 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:24,811 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:38:24,811 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2021-10-28 23:38:24,811 INFO L87 Difference]: Start difference. First operand 969 states and 1253 transitions. Second operand has 6 states, 6 states have (on average 20.833333333333332) internal successors, (125), 6 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:25,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:25,339 INFO L93 Difference]: Finished difference Result 2494 states and 3326 transitions. [2021-10-28 23:38:25,339 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:38:25,340 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 20.833333333333332) internal successors, (125), 6 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 126 [2021-10-28 23:38:25,340 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:25,363 INFO L225 Difference]: With dead ends: 2494 [2021-10-28 23:38:25,370 INFO L226 Difference]: Without dead ends: 1704 [2021-10-28 23:38:25,372 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 123 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2021-10-28 23:38:25,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1704 states. [2021-10-28 23:38:25,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1704 to 969. [2021-10-28 23:38:25,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 969 states, 964 states have (on average 1.2987551867219918) internal successors, (1252), 968 states have internal predecessors, (1252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:25,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 969 states to 969 states and 1252 transitions. [2021-10-28 23:38:25,564 INFO L78 Accepts]: Start accepts. Automaton has 969 states and 1252 transitions. Word has length 126 [2021-10-28 23:38:25,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:25,564 INFO L470 AbstractCegarLoop]: Abstraction has 969 states and 1252 transitions. [2021-10-28 23:38:25,564 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 20.833333333333332) internal successors, (125), 6 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:25,565 INFO L276 IsEmpty]: Start isEmpty. Operand 969 states and 1252 transitions. [2021-10-28 23:38:25,567 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2021-10-28 23:38:25,568 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:25,568 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:25,604 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-10-28 23:38:25,784 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2021-10-28 23:38:25,785 INFO L402 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:25,785 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:25,785 INFO L85 PathProgramCache]: Analyzing trace with hash 652850677, now seen corresponding path program 1 times [2021-10-28 23:38:25,785 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:25,786 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1749836272] [2021-10-28 23:38:25,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:25,786 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:25,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:25,945 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:25,945 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:25,945 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1749836272] [2021-10-28 23:38:25,945 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1749836272] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:38:25,946 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [175667602] [2021-10-28 23:38:25,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:25,946 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:38:25,946 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:38:25,947 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:38:25,967 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-10-28 23:38:26,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:26,213 INFO L263 TraceCheckSpWp]: Trace formula consists of 727 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-28 23:38:26,221 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:38:26,737 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:26,738 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [175667602] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:38:26,738 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:38:26,738 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 13 [2021-10-28 23:38:26,738 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [148719027] [2021-10-28 23:38:26,739 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2021-10-28 23:38:26,739 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:26,740 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-10-28 23:38:26,740 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2021-10-28 23:38:26,740 INFO L87 Difference]: Start difference. First operand 969 states and 1252 transitions. Second operand has 13 states, 13 states have (on average 19.53846153846154) internal successors, (254), 13 states have internal predecessors, (254), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:38,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:38,787 INFO L93 Difference]: Finished difference Result 16611 states and 22057 transitions. [2021-10-28 23:38:38,788 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 242 states. [2021-10-28 23:38:38,788 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 19.53846153846154) internal successors, (254), 13 states have internal predecessors, (254), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 130 [2021-10-28 23:38:38,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:38,828 INFO L225 Difference]: With dead ends: 16611 [2021-10-28 23:38:38,829 INFO L226 Difference]: Without dead ends: 15827 [2021-10-28 23:38:38,865 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 473 GetRequests, 222 SyntacticMatches, 0 SemanticMatches, 251 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29009 ImplicationChecksByTransitivity, 6.2s TimeCoverageRelationStatistics Valid=8289, Invalid=55467, Unknown=0, NotChecked=0, Total=63756 [2021-10-28 23:38:38,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15827 states. [2021-10-28 23:38:39,458 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15827 to 2668. [2021-10-28 23:38:39,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2668 states, 2663 states have (on average 1.2996620352985355) internal successors, (3461), 2667 states have internal predecessors, (3461), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:39,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2668 states to 2668 states and 3461 transitions. [2021-10-28 23:38:39,470 INFO L78 Accepts]: Start accepts. Automaton has 2668 states and 3461 transitions. Word has length 130 [2021-10-28 23:38:39,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:39,471 INFO L470 AbstractCegarLoop]: Abstraction has 2668 states and 3461 transitions. [2021-10-28 23:38:39,471 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 19.53846153846154) internal successors, (254), 13 states have internal predecessors, (254), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:39,471 INFO L276 IsEmpty]: Start isEmpty. Operand 2668 states and 3461 transitions. [2021-10-28 23:38:39,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2021-10-28 23:38:39,479 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:39,479 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:39,525 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2021-10-28 23:38:39,695 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2021-10-28 23:38:39,696 INFO L402 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:39,696 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:39,697 INFO L85 PathProgramCache]: Analyzing trace with hash 1302889785, now seen corresponding path program 1 times [2021-10-28 23:38:39,697 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:39,697 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [458312671] [2021-10-28 23:38:39,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:39,697 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:39,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:39,984 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:39,984 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:39,984 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [458312671] [2021-10-28 23:38:39,985 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [458312671] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:38:39,985 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [235636168] [2021-10-28 23:38:39,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:39,985 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:38:39,985 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:38:39,988 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:38:40,019 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-10-28 23:38:40,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:40,486 INFO L263 TraceCheckSpWp]: Trace formula consists of 779 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-28 23:38:40,493 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:38:41,026 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:41,026 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [235636168] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:38:41,026 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:38:41,027 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 8 [2021-10-28 23:38:41,027 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [254011418] [2021-10-28 23:38:41,027 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2021-10-28 23:38:41,028 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:41,028 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-10-28 23:38:41,028 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2021-10-28 23:38:41,029 INFO L87 Difference]: Start difference. First operand 2668 states and 3461 transitions. Second operand has 8 states, 8 states have (on average 19.625) internal successors, (157), 8 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:42,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:42,635 INFO L93 Difference]: Finished difference Result 9437 states and 12657 transitions. [2021-10-28 23:38:42,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2021-10-28 23:38:42,636 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 19.625) internal successors, (157), 8 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 131 [2021-10-28 23:38:42,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:42,656 INFO L225 Difference]: With dead ends: 9437 [2021-10-28 23:38:42,656 INFO L226 Difference]: Without dead ends: 6988 [2021-10-28 23:38:42,662 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 141 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=146, Invalid=360, Unknown=0, NotChecked=0, Total=506 [2021-10-28 23:38:42,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6988 states. [2021-10-28 23:38:43,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6988 to 2251. [2021-10-28 23:38:43,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2251 states, 2246 states have (on average 1.2943009795191451) internal successors, (2907), 2250 states have internal predecessors, (2907), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:43,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2251 states to 2251 states and 2907 transitions. [2021-10-28 23:38:43,279 INFO L78 Accepts]: Start accepts. Automaton has 2251 states and 2907 transitions. Word has length 131 [2021-10-28 23:38:43,280 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:43,280 INFO L470 AbstractCegarLoop]: Abstraction has 2251 states and 2907 transitions. [2021-10-28 23:38:43,281 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 19.625) internal successors, (157), 8 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:43,281 INFO L276 IsEmpty]: Start isEmpty. Operand 2251 states and 2907 transitions. [2021-10-28 23:38:43,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2021-10-28 23:38:43,288 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:43,288 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:43,339 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2021-10-28 23:38:43,513 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2021-10-28 23:38:43,514 INFO L402 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:43,514 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:43,514 INFO L85 PathProgramCache]: Analyzing trace with hash 1342385059, now seen corresponding path program 1 times [2021-10-28 23:38:43,514 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:43,514 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1704603200] [2021-10-28 23:38:43,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:43,515 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:43,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:43,680 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2021-10-28 23:38:43,681 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:43,681 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1704603200] [2021-10-28 23:38:43,681 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1704603200] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:43,681 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:43,681 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-28 23:38:43,682 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [819912072] [2021-10-28 23:38:43,682 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-28 23:38:43,683 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:43,683 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 23:38:43,684 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-10-28 23:38:43,684 INFO L87 Difference]: Start difference. First operand 2251 states and 2907 transitions. Second operand has 7 states, 7 states have (on average 16.285714285714285) internal successors, (114), 7 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:45,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:45,697 INFO L93 Difference]: Finished difference Result 12947 states and 17105 transitions. [2021-10-28 23:38:45,697 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-10-28 23:38:45,698 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.285714285714285) internal successors, (114), 7 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 132 [2021-10-28 23:38:45,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:45,731 INFO L225 Difference]: With dead ends: 12947 [2021-10-28 23:38:45,732 INFO L226 Difference]: Without dead ends: 10935 [2021-10-28 23:38:45,738 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2021-10-28 23:38:45,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10935 states. [2021-10-28 23:38:46,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10935 to 2671. [2021-10-28 23:38:46,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2671 states, 2666 states have (on average 1.2768192048012004) internal successors, (3404), 2670 states have internal predecessors, (3404), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:46,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2671 states to 2671 states and 3404 transitions. [2021-10-28 23:38:46,266 INFO L78 Accepts]: Start accepts. Automaton has 2671 states and 3404 transitions. Word has length 132 [2021-10-28 23:38:46,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:46,267 INFO L470 AbstractCegarLoop]: Abstraction has 2671 states and 3404 transitions. [2021-10-28 23:38:46,267 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.285714285714285) internal successors, (114), 7 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:46,267 INFO L276 IsEmpty]: Start isEmpty. Operand 2671 states and 3404 transitions. [2021-10-28 23:38:46,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2021-10-28 23:38:46,276 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:46,276 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:46,276 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2021-10-28 23:38:46,277 INFO L402 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:46,277 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:46,278 INFO L85 PathProgramCache]: Analyzing trace with hash 2020329826, now seen corresponding path program 1 times [2021-10-28 23:38:46,278 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:46,278 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [986491588] [2021-10-28 23:38:46,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:46,279 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:46,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:46,527 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-28 23:38:46,527 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:46,527 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [986491588] [2021-10-28 23:38:46,527 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [986491588] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:46,528 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:46,528 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:38:46,528 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [847158176] [2021-10-28 23:38:46,529 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:38:46,529 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:46,530 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:38:46,530 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:38:46,531 INFO L87 Difference]: Start difference. First operand 2671 states and 3404 transitions. Second operand has 6 states, 6 states have (on average 21.333333333333332) internal successors, (128), 6 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:48,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:48,115 INFO L93 Difference]: Finished difference Result 8601 states and 11289 transitions. [2021-10-28 23:38:48,116 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:38:48,116 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.333333333333332) internal successors, (128), 6 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 133 [2021-10-28 23:38:48,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:48,131 INFO L225 Difference]: With dead ends: 8601 [2021-10-28 23:38:48,131 INFO L226 Difference]: Without dead ends: 6109 [2021-10-28 23:38:48,136 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-28 23:38:48,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6109 states. [2021-10-28 23:38:48,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6109 to 2671. [2021-10-28 23:38:48,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2671 states, 2666 states have (on average 1.275318829707427) internal successors, (3400), 2670 states have internal predecessors, (3400), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:48,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2671 states to 2671 states and 3400 transitions. [2021-10-28 23:38:48,653 INFO L78 Accepts]: Start accepts. Automaton has 2671 states and 3400 transitions. Word has length 133 [2021-10-28 23:38:48,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:48,654 INFO L470 AbstractCegarLoop]: Abstraction has 2671 states and 3400 transitions. [2021-10-28 23:38:48,655 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.333333333333332) internal successors, (128), 6 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:48,657 INFO L276 IsEmpty]: Start isEmpty. Operand 2671 states and 3400 transitions. [2021-10-28 23:38:48,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2021-10-28 23:38:48,664 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:48,664 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:48,665 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-10-28 23:38:48,665 INFO L402 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:48,665 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:48,666 INFO L85 PathProgramCache]: Analyzing trace with hash -1433899619, now seen corresponding path program 1 times [2021-10-28 23:38:48,666 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:48,666 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1220862901] [2021-10-28 23:38:48,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:48,667 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:48,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:48,820 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-28 23:38:48,821 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:48,821 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1220862901] [2021-10-28 23:38:48,821 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1220862901] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:48,821 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:48,821 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:38:48,821 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [375904822] [2021-10-28 23:38:48,822 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:38:48,822 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:48,822 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:38:48,823 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:38:48,823 INFO L87 Difference]: Start difference. First operand 2671 states and 3400 transitions. Second operand has 6 states, 6 states have (on average 22.0) internal successors, (132), 6 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:49,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:49,837 INFO L93 Difference]: Finished difference Result 7787 states and 10093 transitions. [2021-10-28 23:38:49,837 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 23:38:49,837 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 22.0) internal successors, (132), 6 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 137 [2021-10-28 23:38:49,838 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:49,849 INFO L225 Difference]: With dead ends: 7787 [2021-10-28 23:38:49,850 INFO L226 Difference]: Without dead ends: 5295 [2021-10-28 23:38:49,854 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-28 23:38:49,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5295 states. [2021-10-28 23:38:50,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5295 to 2671. [2021-10-28 23:38:50,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2671 states, 2666 states have (on average 1.2738184546136535) internal successors, (3396), 2670 states have internal predecessors, (3396), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:50,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2671 states to 2671 states and 3396 transitions. [2021-10-28 23:38:50,380 INFO L78 Accepts]: Start accepts. Automaton has 2671 states and 3396 transitions. Word has length 137 [2021-10-28 23:38:50,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:50,381 INFO L470 AbstractCegarLoop]: Abstraction has 2671 states and 3396 transitions. [2021-10-28 23:38:50,381 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 22.0) internal successors, (132), 6 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:50,381 INFO L276 IsEmpty]: Start isEmpty. Operand 2671 states and 3396 transitions. [2021-10-28 23:38:50,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-10-28 23:38:50,387 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:50,388 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:50,388 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2021-10-28 23:38:50,388 INFO L402 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:50,389 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:50,389 INFO L85 PathProgramCache]: Analyzing trace with hash 1119861603, now seen corresponding path program 1 times [2021-10-28 23:38:50,389 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:50,389 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [610919039] [2021-10-28 23:38:50,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:50,390 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:50,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:50,502 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-10-28 23:38:50,503 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:50,503 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [610919039] [2021-10-28 23:38:50,503 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [610919039] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:50,503 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:50,503 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:38:50,504 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [29820670] [2021-10-28 23:38:50,504 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:38:50,504 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:50,505 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:38:50,505 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:38:50,505 INFO L87 Difference]: Start difference. First operand 2671 states and 3396 transitions. Second operand has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:50,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:50,788 INFO L93 Difference]: Finished difference Result 4373 states and 5591 transitions. [2021-10-28 23:38:50,788 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 23:38:50,788 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-10-28 23:38:50,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:50,791 INFO L225 Difference]: With dead ends: 4373 [2021-10-28 23:38:50,791 INFO L226 Difference]: Without dead ends: 1843 [2021-10-28 23:38:50,795 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:38:50,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1843 states. [2021-10-28 23:38:51,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1843 to 1843. [2021-10-28 23:38:51,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1843 states, 1838 states have (on average 1.2731229597388465) internal successors, (2340), 1842 states have internal predecessors, (2340), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:51,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1843 states to 1843 states and 2340 transitions. [2021-10-28 23:38:51,069 INFO L78 Accepts]: Start accepts. Automaton has 1843 states and 2340 transitions. Word has length 140 [2021-10-28 23:38:51,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:51,069 INFO L470 AbstractCegarLoop]: Abstraction has 1843 states and 2340 transitions. [2021-10-28 23:38:51,069 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:51,070 INFO L276 IsEmpty]: Start isEmpty. Operand 1843 states and 2340 transitions. [2021-10-28 23:38:51,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-10-28 23:38:51,074 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:51,074 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:51,074 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2021-10-28 23:38:51,075 INFO L402 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:51,075 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:51,075 INFO L85 PathProgramCache]: Analyzing trace with hash 2051408537, now seen corresponding path program 1 times [2021-10-28 23:38:51,075 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:51,075 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [881562605] [2021-10-28 23:38:51,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:51,076 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:51,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:51,294 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 25 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:51,295 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:51,295 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [881562605] [2021-10-28 23:38:51,295 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [881562605] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:38:51,295 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [567702194] [2021-10-28 23:38:51,295 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:51,295 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:38:51,295 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:38:51,296 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:38:51,297 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-10-28 23:38:51,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:51,633 INFO L263 TraceCheckSpWp]: Trace formula consists of 806 conjuncts, 22 conjunts are in the unsatisfiable core [2021-10-28 23:38:51,638 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:38:52,626 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 25 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:52,627 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [567702194] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:38:52,627 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:38:52,627 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 17 [2021-10-28 23:38:52,627 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2032480457] [2021-10-28 23:38:52,628 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2021-10-28 23:38:52,628 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:52,629 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2021-10-28 23:38:52,629 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=257, Unknown=0, NotChecked=0, Total=306 [2021-10-28 23:38:52,629 INFO L87 Difference]: Start difference. First operand 1843 states and 2340 transitions. Second operand has 18 states, 18 states have (on average 11.666666666666666) internal successors, (210), 17 states have internal predecessors, (210), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:54,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:54,984 INFO L93 Difference]: Finished difference Result 5137 states and 6557 transitions. [2021-10-28 23:38:54,984 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2021-10-28 23:38:54,984 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 11.666666666666666) internal successors, (210), 17 states have internal predecessors, (210), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-10-28 23:38:54,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:54,995 INFO L225 Difference]: With dead ends: 5137 [2021-10-28 23:38:54,996 INFO L226 Difference]: Without dead ends: 3483 [2021-10-28 23:38:55,000 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 132 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 286 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=309, Invalid=1173, Unknown=0, NotChecked=0, Total=1482 [2021-10-28 23:38:55,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3483 states. [2021-10-28 23:38:55,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3483 to 2080. [2021-10-28 23:38:55,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2080 states, 2075 states have (on average 1.2693975903614458) internal successors, (2634), 2079 states have internal predecessors, (2634), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:55,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2080 states to 2080 states and 2634 transitions. [2021-10-28 23:38:55,464 INFO L78 Accepts]: Start accepts. Automaton has 2080 states and 2634 transitions. Word has length 140 [2021-10-28 23:38:55,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:55,465 INFO L470 AbstractCegarLoop]: Abstraction has 2080 states and 2634 transitions. [2021-10-28 23:38:55,465 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 11.666666666666666) internal successors, (210), 17 states have internal predecessors, (210), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:55,465 INFO L276 IsEmpty]: Start isEmpty. Operand 2080 states and 2634 transitions. [2021-10-28 23:38:55,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-10-28 23:38:55,471 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:55,471 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:55,506 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2021-10-28 23:38:55,691 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:38:55,693 INFO L402 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:55,694 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:55,694 INFO L85 PathProgramCache]: Analyzing trace with hash -90451941, now seen corresponding path program 1 times [2021-10-28 23:38:55,694 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:55,694 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1676121879] [2021-10-28 23:38:55,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:55,695 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:55,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:55,806 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2021-10-28 23:38:55,806 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:55,806 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1676121879] [2021-10-28 23:38:55,807 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1676121879] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:38:55,807 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:38:55,807 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:38:55,808 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1165061473] [2021-10-28 23:38:55,809 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 23:38:55,809 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:55,810 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 23:38:55,810 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:38:55,810 INFO L87 Difference]: Start difference. First operand 2080 states and 2634 transitions. Second operand has 5 states, 5 states have (on average 24.2) internal successors, (121), 4 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:56,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:38:56,225 INFO L93 Difference]: Finished difference Result 3905 states and 4983 transitions. [2021-10-28 23:38:56,225 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:38:56,226 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.2) internal successors, (121), 4 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-10-28 23:38:56,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:38:56,228 INFO L225 Difference]: With dead ends: 3905 [2021-10-28 23:38:56,228 INFO L226 Difference]: Without dead ends: 1955 [2021-10-28 23:38:56,235 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:38:56,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1955 states. [2021-10-28 23:38:56,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1955 to 1955. [2021-10-28 23:38:56,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1955 states, 1950 states have (on average 1.2728205128205128) internal successors, (2482), 1954 states have internal predecessors, (2482), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:56,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1955 states to 1955 states and 2482 transitions. [2021-10-28 23:38:56,510 INFO L78 Accepts]: Start accepts. Automaton has 1955 states and 2482 transitions. Word has length 140 [2021-10-28 23:38:56,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:38:56,510 INFO L470 AbstractCegarLoop]: Abstraction has 1955 states and 2482 transitions. [2021-10-28 23:38:56,510 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.2) internal successors, (121), 4 states have internal predecessors, (121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:38:56,511 INFO L276 IsEmpty]: Start isEmpty. Operand 1955 states and 2482 transitions. [2021-10-28 23:38:56,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2021-10-28 23:38:56,518 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:38:56,519 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:38:56,519 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2021-10-28 23:38:56,521 INFO L402 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:38:56,521 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:38:56,521 INFO L85 PathProgramCache]: Analyzing trace with hash 1205605747, now seen corresponding path program 1 times [2021-10-28 23:38:56,521 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:38:56,522 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1271481665] [2021-10-28 23:38:56,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:56,522 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:38:56,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:56,777 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 30 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:56,778 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:38:56,778 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1271481665] [2021-10-28 23:38:56,778 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1271481665] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:38:56,778 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1228548971] [2021-10-28 23:38:56,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:38:56,779 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:38:56,779 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:38:56,780 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:38:56,799 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-10-28 23:38:57,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:38:57,248 INFO L263 TraceCheckSpWp]: Trace formula consists of 807 conjuncts, 24 conjunts are in the unsatisfiable core [2021-10-28 23:38:57,251 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:38:58,188 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 30 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:38:58,188 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1228548971] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:38:58,189 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:38:58,189 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 17 [2021-10-28 23:38:58,189 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [111486019] [2021-10-28 23:38:58,189 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2021-10-28 23:38:58,190 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:38:58,190 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2021-10-28 23:38:58,190 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=257, Unknown=0, NotChecked=0, Total=306 [2021-10-28 23:38:58,191 INFO L87 Difference]: Start difference. First operand 1955 states and 2482 transitions. Second operand has 18 states, 18 states have (on average 12.055555555555555) internal successors, (217), 17 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:39:00,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:39:00,431 INFO L93 Difference]: Finished difference Result 5727 states and 7299 transitions. [2021-10-28 23:39:00,431 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2021-10-28 23:39:00,432 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 12.055555555555555) internal successors, (217), 17 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 141 [2021-10-28 23:39:00,432 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:39:00,436 INFO L225 Difference]: With dead ends: 5727 [2021-10-28 23:39:00,436 INFO L226 Difference]: Without dead ends: 3961 [2021-10-28 23:39:00,439 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 177 GetRequests, 133 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 426 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=401, Invalid=1579, Unknown=0, NotChecked=0, Total=1980 [2021-10-28 23:39:00,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3961 states. [2021-10-28 23:39:00,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3961 to 2219. [2021-10-28 23:39:00,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2219 states, 2214 states have (on average 1.2687443541102077) internal successors, (2809), 2218 states have internal predecessors, (2809), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:39:00,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2219 states to 2219 states and 2809 transitions. [2021-10-28 23:39:00,901 INFO L78 Accepts]: Start accepts. Automaton has 2219 states and 2809 transitions. Word has length 141 [2021-10-28 23:39:00,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:39:00,901 INFO L470 AbstractCegarLoop]: Abstraction has 2219 states and 2809 transitions. [2021-10-28 23:39:00,901 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 12.055555555555555) internal successors, (217), 17 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:39:00,901 INFO L276 IsEmpty]: Start isEmpty. Operand 2219 states and 2809 transitions. [2021-10-28 23:39:00,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2021-10-28 23:39:00,905 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:39:00,905 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:39:00,938 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2021-10-28 23:39:01,118 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable35 [2021-10-28 23:39:01,118 INFO L402 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:39:01,119 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:39:01,119 INFO L85 PathProgramCache]: Analyzing trace with hash 582324145, now seen corresponding path program 1 times [2021-10-28 23:39:01,119 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:39:01,119 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1054048889] [2021-10-28 23:39:01,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:39:01,119 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:39:01,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:39:01,175 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2021-10-28 23:39:01,175 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:39:01,176 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1054048889] [2021-10-28 23:39:01,176 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1054048889] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:39:01,176 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:39:01,176 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:39:01,176 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1625882824] [2021-10-28 23:39:01,177 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:39:01,178 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:39:01,178 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:39:01,178 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:39:01,178 INFO L87 Difference]: Start difference. First operand 2219 states and 2809 transitions. Second operand has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:39:01,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:39:01,556 INFO L93 Difference]: Finished difference Result 4100 states and 5223 transitions. [2021-10-28 23:39:01,556 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 23:39:01,556 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 141 [2021-10-28 23:39:01,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:39:01,559 INFO L225 Difference]: With dead ends: 4100 [2021-10-28 23:39:01,559 INFO L226 Difference]: Without dead ends: 2013 [2021-10-28 23:39:01,561 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:39:01,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2013 states. [2021-10-28 23:39:02,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2013 to 2005. [2021-10-28 23:39:02,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2005 states, 2000 states have (on average 1.266) internal successors, (2532), 2004 states have internal predecessors, (2532), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:39:02,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2005 states to 2005 states and 2532 transitions. [2021-10-28 23:39:02,090 INFO L78 Accepts]: Start accepts. Automaton has 2005 states and 2532 transitions. Word has length 141 [2021-10-28 23:39:02,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:39:02,091 INFO L470 AbstractCegarLoop]: Abstraction has 2005 states and 2532 transitions. [2021-10-28 23:39:02,091 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.25) internal successors, (117), 4 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:39:02,091 INFO L276 IsEmpty]: Start isEmpty. Operand 2005 states and 2532 transitions. [2021-10-28 23:39:02,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2021-10-28 23:39:02,093 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:39:02,093 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:39:02,094 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2021-10-28 23:39:02,094 INFO L402 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:39:02,094 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:39:02,094 INFO L85 PathProgramCache]: Analyzing trace with hash 689093620, now seen corresponding path program 1 times [2021-10-28 23:39:02,094 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:39:02,094 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1221984428] [2021-10-28 23:39:02,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:39:02,095 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:39:02,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:39:02,171 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:39:02,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:39:02,376 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:39:02,377 INFO L627 BasicCegarLoop]: Counterexample is feasible [2021-10-28 23:39:02,378 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,381 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,382 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,382 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,382 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,383 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,383 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,383 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,383 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,383 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,383 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,384 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,384 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,384 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,385 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,385 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,385 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,386 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,386 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,387 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,387 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,387 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,387 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:39:02,387 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2021-10-28 23:39:02,391 INFO L731 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:39:02,396 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-10-28 23:39:02,682 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.10 11:39:02 BoogieIcfgContainer [2021-10-28 23:39:02,683 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-10-28 23:39:02,683 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-28 23:39:02,684 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-28 23:39:02,684 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-28 23:39:02,685 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 11:38:13" (3/4) ... [2021-10-28 23:39:02,687 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-10-28 23:39:02,958 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/witness.graphml [2021-10-28 23:39:02,959 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-28 23:39:02,961 INFO L168 Benchmark]: Toolchain (without parser) took 51198.29 ms. Allocated memory was 104.9 MB in the beginning and 1.3 GB in the end (delta: 1.2 GB). Free memory was 62.2 MB in the beginning and 990.5 MB in the end (delta: -928.3 MB). Peak memory consumption was 304.7 MB. Max. memory is 16.1 GB. [2021-10-28 23:39:02,961 INFO L168 Benchmark]: CDTParser took 0.30 ms. Allocated memory is still 104.9 MB. Free memory is still 79.1 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-10-28 23:39:02,962 INFO L168 Benchmark]: CACSL2BoogieTranslator took 458.88 ms. Allocated memory is still 104.9 MB. Free memory was 62.1 MB in the beginning and 72.5 MB in the end (delta: -10.4 MB). Peak memory consumption was 8.5 MB. Max. memory is 16.1 GB. [2021-10-28 23:39:02,963 INFO L168 Benchmark]: Boogie Procedure Inliner took 100.49 ms. Allocated memory is still 104.9 MB. Free memory was 72.5 MB in the beginning and 67.6 MB in the end (delta: 4.9 MB). Peak memory consumption was 6.3 MB. Max. memory is 16.1 GB. [2021-10-28 23:39:02,963 INFO L168 Benchmark]: Boogie Preprocessor took 62.89 ms. Allocated memory is still 104.9 MB. Free memory was 67.6 MB in the beginning and 64.6 MB in the end (delta: 3.0 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 23:39:02,964 INFO L168 Benchmark]: RCFGBuilder took 1316.49 ms. Allocated memory was 104.9 MB in the beginning and 132.1 MB in the end (delta: 27.3 MB). Free memory was 64.1 MB in the beginning and 98.9 MB in the end (delta: -34.8 MB). Peak memory consumption was 48.8 MB. Max. memory is 16.1 GB. [2021-10-28 23:39:02,965 INFO L168 Benchmark]: TraceAbstraction took 48975.19 ms. Allocated memory was 132.1 MB in the beginning and 1.3 GB in the end (delta: 1.2 GB). Free memory was 98.2 MB in the beginning and 1.0 GB in the end (delta: -938.5 MB). Peak memory consumption was 266.1 MB. Max. memory is 16.1 GB. [2021-10-28 23:39:02,965 INFO L168 Benchmark]: Witness Printer took 275.95 ms. Allocated memory is still 1.3 GB. Free memory was 1.0 GB in the beginning and 990.5 MB in the end (delta: 46.1 MB). Peak memory consumption was 46.1 MB. Max. memory is 16.1 GB. [2021-10-28 23:39:02,967 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.30 ms. Allocated memory is still 104.9 MB. Free memory is still 79.1 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 458.88 ms. Allocated memory is still 104.9 MB. Free memory was 62.1 MB in the beginning and 72.5 MB in the end (delta: -10.4 MB). Peak memory consumption was 8.5 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 100.49 ms. Allocated memory is still 104.9 MB. Free memory was 72.5 MB in the beginning and 67.6 MB in the end (delta: 4.9 MB). Peak memory consumption was 6.3 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 62.89 ms. Allocated memory is still 104.9 MB. Free memory was 67.6 MB in the beginning and 64.6 MB in the end (delta: 3.0 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 1316.49 ms. Allocated memory was 104.9 MB in the beginning and 132.1 MB in the end (delta: 27.3 MB). Free memory was 64.1 MB in the beginning and 98.9 MB in the end (delta: -34.8 MB). Peak memory consumption was 48.8 MB. Max. memory is 16.1 GB. * TraceAbstraction took 48975.19 ms. Allocated memory was 132.1 MB in the beginning and 1.3 GB in the end (delta: 1.2 GB). Free memory was 98.2 MB in the beginning and 1.0 GB in the end (delta: -938.5 MB). Peak memory consumption was 266.1 MB. Max. memory is 16.1 GB. * Witness Printer took 275.95 ms. Allocated memory is still 1.3 GB. Free memory was 1.0 GB in the beginning and 990.5 MB in the end (delta: 46.1 MB). Peak memory consumption was 46.1 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 611]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L534] int c1 ; [L535] int i2 ; [L538] c1 = 0 [L539] side1Failed = __VERIFIER_nondet_bool() [L540] side2Failed = __VERIFIER_nondet_bool() [L541] side1_written = __VERIFIER_nondet_char() [L542] side2_written = __VERIFIER_nondet_char() [L543] side1Failed_History_0 = __VERIFIER_nondet_bool() [L544] side1Failed_History_1 = __VERIFIER_nondet_bool() [L545] side1Failed_History_2 = __VERIFIER_nondet_bool() [L546] side2Failed_History_0 = __VERIFIER_nondet_bool() [L547] side2Failed_History_1 = __VERIFIER_nondet_bool() [L548] side2Failed_History_2 = __VERIFIER_nondet_bool() [L549] active_side_History_0 = __VERIFIER_nondet_char() [L550] active_side_History_1 = __VERIFIER_nondet_char() [L551] active_side_History_2 = __VERIFIER_nondet_char() [L552] manual_selection_History_0 = __VERIFIER_nondet_char() [L553] manual_selection_History_1 = __VERIFIER_nondet_char() [L554] manual_selection_History_2 = __VERIFIER_nondet_char() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L555] i2 = init() [L58] COND FALSE !(!cond) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L557] cs1_old = nomsg [L558] cs1_new = nomsg [L559] cs2_old = nomsg [L560] cs2_new = nomsg [L561] s1s2_old = nomsg [L562] s1s2_new = nomsg [L563] s1s1_old = nomsg [L564] s1s1_new = nomsg [L565] s2s1_old = nomsg [L566] s2s1_new = nomsg [L567] s2s2_old = nomsg [L568] s2s2_new = nomsg [L569] s1p_old = nomsg [L570] s1p_new = nomsg [L571] s2p_old = nomsg [L572] s2p_new = nomsg [L573] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L574] COND TRUE i2 < 10 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND TRUE \read(side1Failed) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L580] cs1_old = cs1_new [L581] cs1_new = nomsg [L582] cs2_old = cs2_new [L583] cs2_new = nomsg [L584] s1s2_old = s1s2_new [L585] s1s2_new = nomsg [L586] s1s1_old = s1s1_new [L587] s1s1_new = nomsg [L588] s2s1_old = s2s1_new [L589] s2s1_new = nomsg [L590] s2s2_old = s2s2_new [L591] s2s2_new = nomsg [L592] s1p_old = s1p_new [L593] s1p_new = nomsg [L594] s2p_old = s2p_new [L595] s2p_new = nomsg [L415] int tmp ; [L416] msg_t tmp___0 ; [L417] _Bool tmp___1 ; [L418] _Bool tmp___2 ; [L419] _Bool tmp___3 ; [L420] _Bool tmp___4 ; [L421] int8_t tmp___5 ; [L422] _Bool tmp___6 ; [L423] _Bool tmp___7 ; [L424] _Bool tmp___8 ; [L425] int8_t tmp___9 ; [L426] _Bool tmp___10 ; [L427] _Bool tmp___11 ; [L428] _Bool tmp___12 ; [L429] msg_t tmp___13 ; [L430] _Bool tmp___14 ; [L431] _Bool tmp___15 ; [L432] _Bool tmp___16 ; [L433] _Bool tmp___17 ; [L434] int8_t tmp___18 ; [L435] int8_t tmp___19 ; [L436] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L439] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L442] COND TRUE ! side2Failed [L443] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L448] tmp___0 = read_manual_selection_history((unsigned char)1) [L449] COND TRUE ! tmp___0 [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] tmp___1 = read_side1_failed_history((unsigned char)1) [L451] COND TRUE ! tmp___1 [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L452] tmp___2 = read_side1_failed_history((unsigned char)0) [L453] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L478] tmp___7 = read_side1_failed_history((unsigned char)1) [L479] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L494] tmp___11 = read_side1_failed_history((unsigned char)1) [L495] COND TRUE ! tmp___11 [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L496] tmp___12 = read_side2_failed_history((unsigned char)1) [L497] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L148] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L151] COND FALSE !((int )index == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L154] COND TRUE (int )index == 2 [L155] return (active_side_History_2); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L510] tmp___20 = read_active_side_history((unsigned char)2) [L511] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L529] return (1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L596] c1 = check() [L609] COND FALSE !(! arg) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L598] i2 ++ VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L574] COND TRUE i2 < 10 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND FALSE !(\read(side1Failed)) [L284] side1 = s1s1_old [L285] s1s1_old = nomsg [L286] side2 = s2s1_old [L287] s2s1_old = nomsg [L288] manual_selection = cs1_old [L289] cs1_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L290] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L293] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L294] COND TRUE (int )side2 != (int )nomsg [L295] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L314] EXPR next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L314] s1s1_new = next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new [L315] EXPR next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L315] s1s2_new = next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new [L316] EXPR next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L316] s1p_new = next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new [L317] side1_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND TRUE \read(side2Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L335] EXPR nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L335] s2s1_new = nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new [L336] EXPR nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L336] s2s2_new = nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new [L337] EXPR nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L337] s2p_new = nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new [L338] side2_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L580] cs1_old = cs1_new [L581] cs1_new = nomsg [L582] cs2_old = cs2_new [L583] cs2_new = nomsg [L584] s1s2_old = s1s2_new [L585] s1s2_new = nomsg [L586] s1s1_old = s1s1_new [L587] s1s1_new = nomsg [L588] s2s1_old = s2s1_new [L589] s2s1_new = nomsg [L590] s2s2_old = s2s2_new [L591] s2s2_new = nomsg [L592] s1p_old = s1p_new [L593] s1p_new = nomsg [L594] s2p_old = s2p_new [L595] s2p_new = nomsg [L415] int tmp ; [L416] msg_t tmp___0 ; [L417] _Bool tmp___1 ; [L418] _Bool tmp___2 ; [L419] _Bool tmp___3 ; [L420] _Bool tmp___4 ; [L421] int8_t tmp___5 ; [L422] _Bool tmp___6 ; [L423] _Bool tmp___7 ; [L424] _Bool tmp___8 ; [L425] int8_t tmp___9 ; [L426] _Bool tmp___10 ; [L427] _Bool tmp___11 ; [L428] _Bool tmp___12 ; [L429] msg_t tmp___13 ; [L430] _Bool tmp___14 ; [L431] _Bool tmp___15 ; [L432] _Bool tmp___16 ; [L433] _Bool tmp___17 ; [L434] int8_t tmp___18 ; [L435] int8_t tmp___19 ; [L436] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L439] COND TRUE ! side1Failed [L440] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L448] tmp___0 = read_manual_selection_history((unsigned char)1) [L449] COND FALSE !(! tmp___0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L478] tmp___7 = read_side1_failed_history((unsigned char)1) [L479] COND TRUE \read(tmp___7) [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L480] tmp___8 = read_side2_failed_history((unsigned char)1) [L481] COND TRUE ! tmp___8 [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L482] tmp___5 = read_active_side_history((unsigned char)0) [L483] COND TRUE ! ((int )tmp___5 == 2) [L484] return (0); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L596] c1 = check() [L609] COND TRUE ! arg VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L611] reach_error() VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 611]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 295 locations, 23 error locations. Started 1 CEGAR loops. OverallTime: 48.6s, OverallIterations: 38, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 29.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 17056 SDtfs, 37704 SDslu, 45483 SDs, 0 SdLazy, 7967 SolverSat, 565 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1365 GetRequests, 857 SyntacticMatches, 3 SemanticMatches, 505 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29978 ImplicationChecksByTransitivity, 8.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=2671occurred in iteration=30, InterpolantAutomatonStates: 514, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 6.6s AutomataMinimizationTime, 37 MinimizatonAttempts, 45687 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.4s SsaConstructionTime, 2.0s SatisfiabilityAnalysisTime, 6.5s InterpolantComputationTime, 4004 NumberOfCodeBlocks, 4004 NumberOfCodeBlocksAsserted, 43 NumberOfCheckSat, 3820 ConstructedInterpolants, 0 QuantifiedInterpolants, 13046 SizeOfPredicates, 30 NumberOfNonLiveVariables, 3832 ConjunctsInSsa, 82 ConjunctsInUnsatCore, 42 InterpolantComputations, 33 PerfectInterpolantSequences, 454/621 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-10-28 23:39:03,029 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b769a488-ba62-46b9-8830-7622951eb1f3/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...