./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version b2eff8ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ac8e60fb32c268c01bf0cc1d1cd76454411c67e3ab15d16b4eca5e74b982e97f ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.1-dev-b2eff8b [2021-10-28 23:33:14,824 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-28 23:33:14,828 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-28 23:33:14,904 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-28 23:33:14,905 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-28 23:33:14,911 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-28 23:33:14,914 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-28 23:33:14,919 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-28 23:33:14,924 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-28 23:33:14,932 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-28 23:33:14,934 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-28 23:33:14,937 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-28 23:33:14,938 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-28 23:33:14,941 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-28 23:33:14,944 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-28 23:33:14,951 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-28 23:33:14,953 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-28 23:33:14,955 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-28 23:33:14,958 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-28 23:33:14,970 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-28 23:33:14,972 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-28 23:33:14,974 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-28 23:33:14,979 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-28 23:33:14,980 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-28 23:33:14,992 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-28 23:33:14,993 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-28 23:33:14,994 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-28 23:33:14,997 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-28 23:33:14,998 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-28 23:33:15,000 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-28 23:33:15,001 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-28 23:33:15,002 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-28 23:33:15,005 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-28 23:33:15,007 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-28 23:33:15,010 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-28 23:33:15,011 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-28 23:33:15,012 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-28 23:33:15,012 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-28 23:33:15,013 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-28 23:33:15,014 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-28 23:33:15,015 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-28 23:33:15,016 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/config/svcomp-Reach-32bit-Automizer_Default.epf [2021-10-28 23:33:15,070 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-28 23:33:15,070 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-28 23:33:15,071 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-28 23:33:15,072 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-28 23:33:15,082 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-28 23:33:15,082 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-28 23:33:15,082 INFO L138 SettingsManager]: * Use SBE=true [2021-10-28 23:33:15,083 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-28 23:33:15,083 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-28 23:33:15,083 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-28 23:33:15,085 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-28 23:33:15,085 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-28 23:33:15,086 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-10-28 23:33:15,086 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-10-28 23:33:15,086 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-10-28 23:33:15,087 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-28 23:33:15,087 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-28 23:33:15,087 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-28 23:33:15,088 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-10-28 23:33:15,088 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-28 23:33:15,088 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-28 23:33:15,089 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-10-28 23:33:15,089 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-28 23:33:15,089 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-28 23:33:15,090 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-10-28 23:33:15,090 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-10-28 23:33:15,090 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-28 23:33:15,091 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-10-28 23:33:15,091 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-10-28 23:33:15,093 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2021-10-28 23:33:15,093 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-10-28 23:33:15,094 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-28 23:33:15,094 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ac8e60fb32c268c01bf0cc1d1cd76454411c67e3ab15d16b4eca5e74b982e97f [2021-10-28 23:33:15,523 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-28 23:33:15,568 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-28 23:33:15,587 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-28 23:33:15,589 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-28 23:33:15,590 INFO L275 PluginConnector]: CDTParser initialized [2021-10-28 23:33:15,591 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c [2021-10-28 23:33:15,700 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/data/b1581cc95/07f88d29fc284b1b9069a00ec4ad1c18/FLAGbcf7060ee [2021-10-28 23:33:16,384 INFO L306 CDTParser]: Found 1 translation units. [2021-10-28 23:33:16,386 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c [2021-10-28 23:33:16,420 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/data/b1581cc95/07f88d29fc284b1b9069a00ec4ad1c18/FLAGbcf7060ee [2021-10-28 23:33:16,647 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/data/b1581cc95/07f88d29fc284b1b9069a00ec4ad1c18 [2021-10-28 23:33:16,652 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-28 23:33:16,655 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-28 23:33:16,660 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-28 23:33:16,660 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-28 23:33:16,665 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-28 23:33:16,666 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 11:33:16" (1/1) ... [2021-10-28 23:33:16,669 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@24c4ad0d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:33:16, skipping insertion in model container [2021-10-28 23:33:16,669 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 11:33:16" (1/1) ... [2021-10-28 23:33:16,680 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-28 23:33:16,752 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-28 23:33:17,231 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c[14522,14535] [2021-10-28 23:33:17,235 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 23:33:17,248 INFO L203 MainTranslator]: Completed pre-run [2021-10-28 23:33:17,339 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c[14522,14535] [2021-10-28 23:33:17,340 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 23:33:17,370 INFO L208 MainTranslator]: Completed translation [2021-10-28 23:33:17,371 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:33:17 WrapperNode [2021-10-28 23:33:17,371 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-28 23:33:17,373 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-28 23:33:17,373 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-28 23:33:17,374 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-28 23:33:17,390 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:33:17" (1/1) ... [2021-10-28 23:33:17,409 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:33:17" (1/1) ... [2021-10-28 23:33:17,480 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-28 23:33:17,481 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-28 23:33:17,482 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-28 23:33:17,482 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-28 23:33:17,493 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:33:17" (1/1) ... [2021-10-28 23:33:17,494 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:33:17" (1/1) ... [2021-10-28 23:33:17,506 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:33:17" (1/1) ... [2021-10-28 23:33:17,506 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:33:17" (1/1) ... [2021-10-28 23:33:17,534 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:33:17" (1/1) ... [2021-10-28 23:33:17,565 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:33:17" (1/1) ... [2021-10-28 23:33:17,570 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:33:17" (1/1) ... [2021-10-28 23:33:17,579 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-28 23:33:17,593 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-28 23:33:17,594 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-28 23:33:17,594 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-28 23:33:17,605 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:33:17" (1/1) ... [2021-10-28 23:33:17,624 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-28 23:33:17,640 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:33:17,671 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-10-28 23:33:17,686 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-10-28 23:33:17,725 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-28 23:33:17,726 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-28 23:33:17,726 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-28 23:33:17,726 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-28 23:33:19,143 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-28 23:33:19,143 INFO L299 CfgBuilder]: Removed 123 assume(true) statements. [2021-10-28 23:33:19,146 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 11:33:19 BoogieIcfgContainer [2021-10-28 23:33:19,146 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-28 23:33:19,149 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-10-28 23:33:19,149 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-10-28 23:33:19,157 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-10-28 23:33:19,158 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.10 11:33:16" (1/3) ... [2021-10-28 23:33:19,160 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@cf85e30 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.10 11:33:19, skipping insertion in model container [2021-10-28 23:33:19,161 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:33:17" (2/3) ... [2021-10-28 23:33:19,161 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@cf85e30 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.10 11:33:19, skipping insertion in model container [2021-10-28 23:33:19,161 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 11:33:19" (3/3) ... [2021-10-28 23:33:19,164 INFO L111 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_1.ufo.UNBOUNDED.pals.c [2021-10-28 23:33:19,171 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-10-28 23:33:19,171 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 23 error locations. [2021-10-28 23:33:19,289 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-10-28 23:33:19,300 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-10-28 23:33:19,300 INFO L340 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2021-10-28 23:33:19,343 INFO L276 IsEmpty]: Start isEmpty. Operand has 294 states, 270 states have (on average 1.7037037037037037) internal successors, (460), 293 states have internal predecessors, (460), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:19,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-28 23:33:19,355 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:19,356 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:19,356 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:19,364 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:19,364 INFO L85 PathProgramCache]: Analyzing trace with hash 349506240, now seen corresponding path program 1 times [2021-10-28 23:33:19,377 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:19,378 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [492058926] [2021-10-28 23:33:19,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:19,379 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:19,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:19,695 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:19,696 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:19,696 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [492058926] [2021-10-28 23:33:19,697 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [492058926] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:19,698 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:19,698 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-28 23:33:19,700 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [328897670] [2021-10-28 23:33:19,706 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2021-10-28 23:33:19,707 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:19,722 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-10-28 23:33:19,723 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-28 23:33:19,727 INFO L87 Difference]: Start difference. First operand has 294 states, 270 states have (on average 1.7037037037037037) internal successors, (460), 293 states have internal predecessors, (460), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:19,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:19,783 INFO L93 Difference]: Finished difference Result 568 states and 888 transitions. [2021-10-28 23:33:19,784 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-10-28 23:33:19,785 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-28 23:33:19,786 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:19,802 INFO L225 Difference]: With dead ends: 568 [2021-10-28 23:33:19,802 INFO L226 Difference]: Without dead ends: 290 [2021-10-28 23:33:19,807 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-28 23:33:19,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 290 states. [2021-10-28 23:33:19,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 290 to 290. [2021-10-28 23:33:19,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 290 states, 267 states have (on average 1.5880149812734083) internal successors, (424), 289 states have internal predecessors, (424), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:19,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290 states to 290 states and 424 transitions. [2021-10-28 23:33:19,877 INFO L78 Accepts]: Start accepts. Automaton has 290 states and 424 transitions. Word has length 33 [2021-10-28 23:33:19,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:19,878 INFO L470 AbstractCegarLoop]: Abstraction has 290 states and 424 transitions. [2021-10-28 23:33:19,878 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:19,878 INFO L276 IsEmpty]: Start isEmpty. Operand 290 states and 424 transitions. [2021-10-28 23:33:19,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-28 23:33:19,881 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:19,881 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:19,881 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-10-28 23:33:19,882 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:19,883 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:19,883 INFO L85 PathProgramCache]: Analyzing trace with hash -1047215368, now seen corresponding path program 1 times [2021-10-28 23:33:19,883 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:19,884 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [419055248] [2021-10-28 23:33:19,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:19,884 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:19,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:20,019 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:20,019 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:20,021 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [419055248] [2021-10-28 23:33:20,021 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [419055248] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:20,022 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:20,022 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:33:20,022 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [760659983] [2021-10-28 23:33:20,024 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:33:20,026 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:20,027 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:33:20,028 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:33:20,028 INFO L87 Difference]: Start difference. First operand 290 states and 424 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:20,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:20,150 INFO L93 Difference]: Finished difference Result 566 states and 822 transitions. [2021-10-28 23:33:20,151 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 23:33:20,151 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-28 23:33:20,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:20,155 INFO L225 Difference]: With dead ends: 566 [2021-10-28 23:33:20,155 INFO L226 Difference]: Without dead ends: 290 [2021-10-28 23:33:20,158 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:33:20,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 290 states. [2021-10-28 23:33:20,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 290 to 290. [2021-10-28 23:33:20,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 290 states, 267 states have (on average 1.5430711610486891) internal successors, (412), 289 states have internal predecessors, (412), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:20,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290 states to 290 states and 412 transitions. [2021-10-28 23:33:20,203 INFO L78 Accepts]: Start accepts. Automaton has 290 states and 412 transitions. Word has length 33 [2021-10-28 23:33:20,204 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:20,204 INFO L470 AbstractCegarLoop]: Abstraction has 290 states and 412 transitions. [2021-10-28 23:33:20,205 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:20,205 INFO L276 IsEmpty]: Start isEmpty. Operand 290 states and 412 transitions. [2021-10-28 23:33:20,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2021-10-28 23:33:20,210 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:20,210 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:20,210 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-10-28 23:33:20,211 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:20,211 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:20,212 INFO L85 PathProgramCache]: Analyzing trace with hash -600938825, now seen corresponding path program 1 times [2021-10-28 23:33:20,212 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:20,212 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [523282771] [2021-10-28 23:33:20,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:20,213 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:20,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:20,513 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:20,514 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:20,514 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [523282771] [2021-10-28 23:33:20,515 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [523282771] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:20,515 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:20,515 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:33:20,516 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [670756731] [2021-10-28 23:33:20,516 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:33:20,517 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:20,517 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:33:20,518 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:33:20,518 INFO L87 Difference]: Start difference. First operand 290 states and 412 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:20,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:20,613 INFO L93 Difference]: Finished difference Result 596 states and 856 transitions. [2021-10-28 23:33:20,613 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:33:20,613 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2021-10-28 23:33:20,614 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:20,617 INFO L225 Difference]: With dead ends: 596 [2021-10-28 23:33:20,617 INFO L226 Difference]: Without dead ends: 323 [2021-10-28 23:33:20,620 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:33:20,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 323 states. [2021-10-28 23:33:20,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 323 to 266. [2021-10-28 23:33:20,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 266 states, 247 states have (on average 1.5222672064777327) internal successors, (376), 265 states have internal predecessors, (376), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:20,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 266 states to 266 states and 376 transitions. [2021-10-28 23:33:20,654 INFO L78 Accepts]: Start accepts. Automaton has 266 states and 376 transitions. Word has length 44 [2021-10-28 23:33:20,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:20,655 INFO L470 AbstractCegarLoop]: Abstraction has 266 states and 376 transitions. [2021-10-28 23:33:20,655 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:20,655 INFO L276 IsEmpty]: Start isEmpty. Operand 266 states and 376 transitions. [2021-10-28 23:33:20,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-10-28 23:33:20,663 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:20,663 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:20,663 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-10-28 23:33:20,664 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:20,664 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:20,665 INFO L85 PathProgramCache]: Analyzing trace with hash -777659854, now seen corresponding path program 1 times [2021-10-28 23:33:20,665 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:20,668 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [681100445] [2021-10-28 23:33:20,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:20,669 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:20,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:20,821 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:20,821 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:20,822 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [681100445] [2021-10-28 23:33:20,822 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [681100445] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:20,822 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:20,823 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:33:20,823 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1765550759] [2021-10-28 23:33:20,824 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:33:20,824 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:20,825 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:33:20,825 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:33:20,825 INFO L87 Difference]: Start difference. First operand 266 states and 376 transitions. Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:20,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:20,878 INFO L93 Difference]: Finished difference Result 741 states and 1059 transitions. [2021-10-28 23:33:20,879 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:33:20,879 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 53 [2021-10-28 23:33:20,880 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:20,884 INFO L225 Difference]: With dead ends: 741 [2021-10-28 23:33:20,885 INFO L226 Difference]: Without dead ends: 492 [2021-10-28 23:33:20,888 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:33:20,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 492 states. [2021-10-28 23:33:20,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 492 to 299. [2021-10-28 23:33:20,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 299 states, 280 states have (on average 1.5142857142857142) internal successors, (424), 298 states have internal predecessors, (424), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:20,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 299 states to 299 states and 424 transitions. [2021-10-28 23:33:20,923 INFO L78 Accepts]: Start accepts. Automaton has 299 states and 424 transitions. Word has length 53 [2021-10-28 23:33:20,925 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:20,925 INFO L470 AbstractCegarLoop]: Abstraction has 299 states and 424 transitions. [2021-10-28 23:33:20,926 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:20,926 INFO L276 IsEmpty]: Start isEmpty. Operand 299 states and 424 transitions. [2021-10-28 23:33:20,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-28 23:33:20,936 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:20,937 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:20,937 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-10-28 23:33:20,937 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:20,938 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:20,938 INFO L85 PathProgramCache]: Analyzing trace with hash -2137834776, now seen corresponding path program 1 times [2021-10-28 23:33:20,939 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:20,939 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2047320807] [2021-10-28 23:33:20,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:20,941 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:20,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:21,028 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:21,029 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:21,029 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2047320807] [2021-10-28 23:33:21,029 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2047320807] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:21,030 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:21,030 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:33:21,030 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [295761248] [2021-10-28 23:33:21,031 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:33:21,031 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:21,032 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:33:21,032 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:33:21,033 INFO L87 Difference]: Start difference. First operand 299 states and 424 transitions. Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:21,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:21,080 INFO L93 Difference]: Finished difference Result 819 states and 1172 transitions. [2021-10-28 23:33:21,081 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:33:21,081 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-28 23:33:21,082 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:21,086 INFO L225 Difference]: With dead ends: 819 [2021-10-28 23:33:21,086 INFO L226 Difference]: Without dead ends: 537 [2021-10-28 23:33:21,087 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:33:21,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 537 states. [2021-10-28 23:33:21,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 537 to 320. [2021-10-28 23:33:21,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 320 states, 301 states have (on average 1.5083056478405317) internal successors, (454), 319 states have internal predecessors, (454), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:21,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 320 states to 320 states and 454 transitions. [2021-10-28 23:33:21,108 INFO L78 Accepts]: Start accepts. Automaton has 320 states and 454 transitions. Word has length 54 [2021-10-28 23:33:21,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:21,109 INFO L470 AbstractCegarLoop]: Abstraction has 320 states and 454 transitions. [2021-10-28 23:33:21,109 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:21,110 INFO L276 IsEmpty]: Start isEmpty. Operand 320 states and 454 transitions. [2021-10-28 23:33:21,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-28 23:33:21,111 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:21,112 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:21,112 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-10-28 23:33:21,113 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:21,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:21,113 INFO L85 PathProgramCache]: Analyzing trace with hash -1457776406, now seen corresponding path program 1 times [2021-10-28 23:33:21,114 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:21,114 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [537941810] [2021-10-28 23:33:21,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:21,115 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:21,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:21,225 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:21,226 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:21,226 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [537941810] [2021-10-28 23:33:21,227 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [537941810] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:21,227 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:21,227 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:33:21,227 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1388561839] [2021-10-28 23:33:21,228 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 23:33:21,228 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:21,229 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 23:33:21,229 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:33:21,230 INFO L87 Difference]: Start difference. First operand 320 states and 454 transitions. Second operand has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:21,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:21,490 INFO L93 Difference]: Finished difference Result 1000 states and 1433 transitions. [2021-10-28 23:33:21,491 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 23:33:21,491 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-28 23:33:21,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:21,497 INFO L225 Difference]: With dead ends: 1000 [2021-10-28 23:33:21,498 INFO L226 Difference]: Without dead ends: 697 [2021-10-28 23:33:21,499 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-28 23:33:21,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 697 states. [2021-10-28 23:33:21,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 697 to 418. [2021-10-28 23:33:21,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 418 states, 399 states have (on average 1.481203007518797) internal successors, (591), 417 states have internal predecessors, (591), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:21,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 418 states to 418 states and 591 transitions. [2021-10-28 23:33:21,528 INFO L78 Accepts]: Start accepts. Automaton has 418 states and 591 transitions. Word has length 54 [2021-10-28 23:33:21,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:21,529 INFO L470 AbstractCegarLoop]: Abstraction has 418 states and 591 transitions. [2021-10-28 23:33:21,530 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:21,530 INFO L276 IsEmpty]: Start isEmpty. Operand 418 states and 591 transitions. [2021-10-28 23:33:21,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2021-10-28 23:33:21,531 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:21,531 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:21,532 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-10-28 23:33:21,532 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:21,533 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:21,533 INFO L85 PathProgramCache]: Analyzing trace with hash -588423898, now seen corresponding path program 1 times [2021-10-28 23:33:21,533 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:21,534 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1594316927] [2021-10-28 23:33:21,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:21,534 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:21,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:21,625 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:21,625 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:21,626 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1594316927] [2021-10-28 23:33:21,626 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1594316927] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:21,626 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:21,626 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:33:21,627 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1852190878] [2021-10-28 23:33:21,627 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 23:33:21,628 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:21,628 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 23:33:21,629 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:33:21,629 INFO L87 Difference]: Start difference. First operand 418 states and 591 transitions. Second operand has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:21,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:21,888 INFO L93 Difference]: Finished difference Result 1000 states and 1425 transitions. [2021-10-28 23:33:21,889 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 23:33:21,889 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 55 [2021-10-28 23:33:21,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:21,895 INFO L225 Difference]: With dead ends: 1000 [2021-10-28 23:33:21,895 INFO L226 Difference]: Without dead ends: 697 [2021-10-28 23:33:21,897 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-28 23:33:21,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 697 states. [2021-10-28 23:33:21,923 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 697 to 418. [2021-10-28 23:33:21,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 418 states, 399 states have (on average 1.4711779448621554) internal successors, (587), 417 states have internal predecessors, (587), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:21,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 418 states to 418 states and 587 transitions. [2021-10-28 23:33:21,928 INFO L78 Accepts]: Start accepts. Automaton has 418 states and 587 transitions. Word has length 55 [2021-10-28 23:33:21,928 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:21,928 INFO L470 AbstractCegarLoop]: Abstraction has 418 states and 587 transitions. [2021-10-28 23:33:21,929 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:21,929 INFO L276 IsEmpty]: Start isEmpty. Operand 418 states and 587 transitions. [2021-10-28 23:33:21,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2021-10-28 23:33:21,930 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:21,931 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:21,931 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-10-28 23:33:21,931 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:21,932 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:21,932 INFO L85 PathProgramCache]: Analyzing trace with hash 1072428279, now seen corresponding path program 1 times [2021-10-28 23:33:21,932 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:21,933 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1681391644] [2021-10-28 23:33:21,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:21,933 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:21,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:22,048 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:22,049 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:22,049 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1681391644] [2021-10-28 23:33:22,049 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1681391644] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:22,050 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:22,050 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:33:22,050 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [500768338] [2021-10-28 23:33:22,051 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:33:22,051 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:22,052 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:33:22,052 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:33:22,052 INFO L87 Difference]: Start difference. First operand 418 states and 587 transitions. Second operand has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:22,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:22,103 INFO L93 Difference]: Finished difference Result 840 states and 1196 transitions. [2021-10-28 23:33:22,103 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:33:22,104 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 56 [2021-10-28 23:33:22,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:22,110 INFO L225 Difference]: With dead ends: 840 [2021-10-28 23:33:22,110 INFO L226 Difference]: Without dead ends: 537 [2021-10-28 23:33:22,111 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:33:22,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 537 states. [2021-10-28 23:33:22,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 537 to 413. [2021-10-28 23:33:22,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 413 states, 395 states have (on average 1.4658227848101266) internal successors, (579), 412 states have internal predecessors, (579), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:22,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 413 states to 413 states and 579 transitions. [2021-10-28 23:33:22,141 INFO L78 Accepts]: Start accepts. Automaton has 413 states and 579 transitions. Word has length 56 [2021-10-28 23:33:22,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:22,143 INFO L470 AbstractCegarLoop]: Abstraction has 413 states and 579 transitions. [2021-10-28 23:33:22,143 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.666666666666668) internal successors, (56), 3 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:22,143 INFO L276 IsEmpty]: Start isEmpty. Operand 413 states and 579 transitions. [2021-10-28 23:33:22,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2021-10-28 23:33:22,145 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:22,145 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:22,145 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-10-28 23:33:22,146 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:22,146 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:22,146 INFO L85 PathProgramCache]: Analyzing trace with hash -1887754801, now seen corresponding path program 1 times [2021-10-28 23:33:22,147 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:22,147 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1542601504] [2021-10-28 23:33:22,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:22,148 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:22,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:22,324 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:22,325 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:22,325 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1542601504] [2021-10-28 23:33:22,325 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1542601504] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:22,326 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:22,326 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:33:22,326 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [779340626] [2021-10-28 23:33:22,328 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:33:22,329 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:22,329 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:33:22,330 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:33:22,331 INFO L87 Difference]: Start difference. First operand 413 states and 579 transitions. Second operand has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:22,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:22,433 INFO L93 Difference]: Finished difference Result 839 states and 1195 transitions. [2021-10-28 23:33:22,434 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:33:22,434 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 60 [2021-10-28 23:33:22,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:22,438 INFO L225 Difference]: With dead ends: 839 [2021-10-28 23:33:22,439 INFO L226 Difference]: Without dead ends: 541 [2021-10-28 23:33:22,444 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:33:22,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 541 states. [2021-10-28 23:33:22,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 541 to 393. [2021-10-28 23:33:22,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 379 states have (on average 1.4432717678100264) internal successors, (547), 392 states have internal predecessors, (547), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:22,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 547 transitions. [2021-10-28 23:33:22,478 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 547 transitions. Word has length 60 [2021-10-28 23:33:22,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:22,478 INFO L470 AbstractCegarLoop]: Abstraction has 393 states and 547 transitions. [2021-10-28 23:33:22,478 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 20.0) internal successors, (60), 3 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:22,479 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 547 transitions. [2021-10-28 23:33:22,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2021-10-28 23:33:22,480 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:22,480 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:22,481 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-10-28 23:33:22,481 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:22,481 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:22,482 INFO L85 PathProgramCache]: Analyzing trace with hash 803488295, now seen corresponding path program 1 times [2021-10-28 23:33:22,482 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:22,484 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1831207197] [2021-10-28 23:33:22,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:22,485 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:22,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:22,607 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:22,607 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:22,607 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1831207197] [2021-10-28 23:33:22,608 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1831207197] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:22,608 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:22,608 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:33:22,609 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [692612405] [2021-10-28 23:33:22,609 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:33:22,609 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:22,610 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:33:22,611 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:33:22,611 INFO L87 Difference]: Start difference. First operand 393 states and 547 transitions. Second operand has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:22,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:22,688 INFO L93 Difference]: Finished difference Result 807 states and 1139 transitions. [2021-10-28 23:33:22,688 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:33:22,689 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 64 [2021-10-28 23:33:22,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:22,693 INFO L225 Difference]: With dead ends: 807 [2021-10-28 23:33:22,693 INFO L226 Difference]: Without dead ends: 529 [2021-10-28 23:33:22,695 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:33:22,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 529 states. [2021-10-28 23:33:22,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 529 to 381. [2021-10-28 23:33:22,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 381 states, 369 states have (on average 1.4336043360433603) internal successors, (529), 380 states have internal predecessors, (529), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:22,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 381 states to 381 states and 529 transitions. [2021-10-28 23:33:22,725 INFO L78 Accepts]: Start accepts. Automaton has 381 states and 529 transitions. Word has length 64 [2021-10-28 23:33:22,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:22,726 INFO L470 AbstractCegarLoop]: Abstraction has 381 states and 529 transitions. [2021-10-28 23:33:22,726 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 21.333333333333332) internal successors, (64), 3 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:22,727 INFO L276 IsEmpty]: Start isEmpty. Operand 381 states and 529 transitions. [2021-10-28 23:33:22,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2021-10-28 23:33:22,728 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:22,728 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:22,729 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-10-28 23:33:22,729 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:22,730 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:22,730 INFO L85 PathProgramCache]: Analyzing trace with hash -576016629, now seen corresponding path program 1 times [2021-10-28 23:33:22,731 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:22,734 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [69609897] [2021-10-28 23:33:22,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:22,734 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:22,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:22,867 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:22,867 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:22,867 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [69609897] [2021-10-28 23:33:22,868 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [69609897] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:22,868 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:22,868 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:33:22,869 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1976541972] [2021-10-28 23:33:22,870 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:33:22,870 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:22,872 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:33:22,872 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:33:22,873 INFO L87 Difference]: Start difference. First operand 381 states and 529 transitions. Second operand has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:22,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:22,983 INFO L93 Difference]: Finished difference Result 803 states and 1131 transitions. [2021-10-28 23:33:22,984 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:33:22,984 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 65 [2021-10-28 23:33:22,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:22,989 INFO L225 Difference]: With dead ends: 803 [2021-10-28 23:33:22,990 INFO L226 Difference]: Without dead ends: 537 [2021-10-28 23:33:22,991 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:33:22,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 537 states. [2021-10-28 23:33:23,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 537 to 361. [2021-10-28 23:33:23,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 361 states, 353 states have (on average 1.4079320113314449) internal successors, (497), 360 states have internal predecessors, (497), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:23,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 361 states to 361 states and 497 transitions. [2021-10-28 23:33:23,022 INFO L78 Accepts]: Start accepts. Automaton has 361 states and 497 transitions. Word has length 65 [2021-10-28 23:33:23,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:23,023 INFO L470 AbstractCegarLoop]: Abstraction has 361 states and 497 transitions. [2021-10-28 23:33:23,023 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:23,023 INFO L276 IsEmpty]: Start isEmpty. Operand 361 states and 497 transitions. [2021-10-28 23:33:23,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2021-10-28 23:33:23,025 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:23,025 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:23,025 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-10-28 23:33:23,026 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:23,026 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:23,027 INFO L85 PathProgramCache]: Analyzing trace with hash 990513659, now seen corresponding path program 1 times [2021-10-28 23:33:23,027 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:23,027 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [718655021] [2021-10-28 23:33:23,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:23,028 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:23,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:23,252 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:23,253 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:23,253 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [718655021] [2021-10-28 23:33:23,254 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [718655021] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:23,254 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:23,254 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:33:23,254 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [288417424] [2021-10-28 23:33:23,255 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:33:23,255 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:23,256 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:33:23,256 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:33:23,257 INFO L87 Difference]: Start difference. First operand 361 states and 497 transitions. Second operand has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:23,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:23,542 INFO L93 Difference]: Finished difference Result 1087 states and 1510 transitions. [2021-10-28 23:33:23,542 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 23:33:23,543 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 70 [2021-10-28 23:33:23,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:23,550 INFO L225 Difference]: With dead ends: 1087 [2021-10-28 23:33:23,550 INFO L226 Difference]: Without dead ends: 841 [2021-10-28 23:33:23,551 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-28 23:33:23,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 841 states. [2021-10-28 23:33:23,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 841 to 411. [2021-10-28 23:33:23,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 411 states, 403 states have (on average 1.401985111662531) internal successors, (565), 410 states have internal predecessors, (565), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:23,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 411 states to 411 states and 565 transitions. [2021-10-28 23:33:23,594 INFO L78 Accepts]: Start accepts. Automaton has 411 states and 565 transitions. Word has length 70 [2021-10-28 23:33:23,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:23,594 INFO L470 AbstractCegarLoop]: Abstraction has 411 states and 565 transitions. [2021-10-28 23:33:23,595 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 11.666666666666666) internal successors, (70), 6 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:23,595 INFO L276 IsEmpty]: Start isEmpty. Operand 411 states and 565 transitions. [2021-10-28 23:33:23,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2021-10-28 23:33:23,596 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:23,597 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:23,597 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-10-28 23:33:23,597 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:23,598 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:23,598 INFO L85 PathProgramCache]: Analyzing trace with hash 1319402658, now seen corresponding path program 1 times [2021-10-28 23:33:23,599 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:23,599 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1561520040] [2021-10-28 23:33:23,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:23,599 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:23,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:23,682 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:23,682 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:23,682 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1561520040] [2021-10-28 23:33:23,683 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1561520040] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:23,683 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:23,683 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:33:23,683 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1128418413] [2021-10-28 23:33:23,684 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:33:23,684 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:23,685 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:33:23,685 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:33:23,685 INFO L87 Difference]: Start difference. First operand 411 states and 565 transitions. Second operand has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:23,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:23,777 INFO L93 Difference]: Finished difference Result 839 states and 1168 transitions. [2021-10-28 23:33:23,777 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:33:23,778 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2021-10-28 23:33:23,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:23,782 INFO L225 Difference]: With dead ends: 839 [2021-10-28 23:33:23,783 INFO L226 Difference]: Without dead ends: 576 [2021-10-28 23:33:23,784 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:33:23,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 576 states. [2021-10-28 23:33:23,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 576 to 395. [2021-10-28 23:33:23,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 395 states, 389 states have (on average 1.3856041131105399) internal successors, (539), 394 states have internal predecessors, (539), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:23,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 395 states and 539 transitions. [2021-10-28 23:33:23,826 INFO L78 Accepts]: Start accepts. Automaton has 395 states and 539 transitions. Word has length 71 [2021-10-28 23:33:23,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:23,826 INFO L470 AbstractCegarLoop]: Abstraction has 395 states and 539 transitions. [2021-10-28 23:33:23,827 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:23,827 INFO L276 IsEmpty]: Start isEmpty. Operand 395 states and 539 transitions. [2021-10-28 23:33:23,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2021-10-28 23:33:23,829 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:23,829 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:23,829 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-10-28 23:33:23,830 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:23,830 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:23,830 INFO L85 PathProgramCache]: Analyzing trace with hash -2095984420, now seen corresponding path program 1 times [2021-10-28 23:33:23,831 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:23,831 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1771106423] [2021-10-28 23:33:23,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:23,831 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:23,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:23,941 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:23,941 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:23,942 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1771106423] [2021-10-28 23:33:23,942 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1771106423] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:23,942 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:23,942 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:33:23,943 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1861572786] [2021-10-28 23:33:23,943 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:33:23,944 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:23,944 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:33:23,945 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:33:23,945 INFO L87 Difference]: Start difference. First operand 395 states and 539 transitions. Second operand has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:24,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:24,031 INFO L93 Difference]: Finished difference Result 708 states and 982 transitions. [2021-10-28 23:33:24,032 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:33:24,032 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2021-10-28 23:33:24,033 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:24,037 INFO L225 Difference]: With dead ends: 708 [2021-10-28 23:33:24,037 INFO L226 Difference]: Without dead ends: 474 [2021-10-28 23:33:24,038 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:33:24,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 474 states. [2021-10-28 23:33:24,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 474 to 391. [2021-10-28 23:33:24,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 391 states, 386 states have (on average 1.378238341968912) internal successors, (532), 390 states have internal predecessors, (532), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:24,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 532 transitions. [2021-10-28 23:33:24,085 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 532 transitions. Word has length 71 [2021-10-28 23:33:24,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:24,086 INFO L470 AbstractCegarLoop]: Abstraction has 391 states and 532 transitions. [2021-10-28 23:33:24,086 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.666666666666668) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:24,086 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 532 transitions. [2021-10-28 23:33:24,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2021-10-28 23:33:24,088 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:24,089 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:24,089 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-10-28 23:33:24,089 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:24,090 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:24,090 INFO L85 PathProgramCache]: Analyzing trace with hash -2054231207, now seen corresponding path program 1 times [2021-10-28 23:33:24,090 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:24,091 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1651702617] [2021-10-28 23:33:24,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:24,091 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:24,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:24,287 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:24,287 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:24,288 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1651702617] [2021-10-28 23:33:24,288 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1651702617] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:24,288 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:24,288 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-28 23:33:24,289 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1149541154] [2021-10-28 23:33:24,289 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-28 23:33:24,290 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:24,290 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 23:33:24,291 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2021-10-28 23:33:24,291 INFO L87 Difference]: Start difference. First operand 391 states and 532 transitions. Second operand has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:24,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:24,758 INFO L93 Difference]: Finished difference Result 1349 states and 1849 transitions. [2021-10-28 23:33:24,758 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:33:24,759 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2021-10-28 23:33:24,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:24,767 INFO L225 Difference]: With dead ends: 1349 [2021-10-28 23:33:24,768 INFO L226 Difference]: Without dead ends: 1101 [2021-10-28 23:33:24,771 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-28 23:33:24,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1101 states. [2021-10-28 23:33:24,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1101 to 419. [2021-10-28 23:33:24,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 419 states, 414 states have (on average 1.3623188405797102) internal successors, (564), 418 states have internal predecessors, (564), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:24,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 419 states to 419 states and 564 transitions. [2021-10-28 23:33:24,828 INFO L78 Accepts]: Start accepts. Automaton has 419 states and 564 transitions. Word has length 74 [2021-10-28 23:33:24,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:24,828 INFO L470 AbstractCegarLoop]: Abstraction has 419 states and 564 transitions. [2021-10-28 23:33:24,829 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 7 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:24,829 INFO L276 IsEmpty]: Start isEmpty. Operand 419 states and 564 transitions. [2021-10-28 23:33:24,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2021-10-28 23:33:24,830 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:24,831 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:24,831 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-10-28 23:33:24,831 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:24,832 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:24,832 INFO L85 PathProgramCache]: Analyzing trace with hash 1972545423, now seen corresponding path program 1 times [2021-10-28 23:33:24,832 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:24,835 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1853185609] [2021-10-28 23:33:24,835 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:24,836 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:24,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:24,922 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:24,922 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:24,923 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1853185609] [2021-10-28 23:33:24,925 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1853185609] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:24,926 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:24,926 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:33:24,926 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [40429022] [2021-10-28 23:33:24,927 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:33:24,927 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:24,928 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:33:24,928 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:33:24,928 INFO L87 Difference]: Start difference. First operand 419 states and 564 transitions. Second operand has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:25,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:25,112 INFO L93 Difference]: Finished difference Result 1079 states and 1463 transitions. [2021-10-28 23:33:25,112 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:33:25,112 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 74 [2021-10-28 23:33:25,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:25,119 INFO L225 Difference]: With dead ends: 1079 [2021-10-28 23:33:25,119 INFO L226 Difference]: Without dead ends: 825 [2021-10-28 23:33:25,120 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:33:25,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 825 states. [2021-10-28 23:33:25,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 825 to 632. [2021-10-28 23:33:25,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 632 states, 627 states have (on average 1.342902711323764) internal successors, (842), 631 states have internal predecessors, (842), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:25,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 632 states to 632 states and 842 transitions. [2021-10-28 23:33:25,193 INFO L78 Accepts]: Start accepts. Automaton has 632 states and 842 transitions. Word has length 74 [2021-10-28 23:33:25,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:25,193 INFO L470 AbstractCegarLoop]: Abstraction has 632 states and 842 transitions. [2021-10-28 23:33:25,194 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:25,194 INFO L276 IsEmpty]: Start isEmpty. Operand 632 states and 842 transitions. [2021-10-28 23:33:25,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-10-28 23:33:25,196 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:25,196 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:25,196 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-10-28 23:33:25,197 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:25,197 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:25,197 INFO L85 PathProgramCache]: Analyzing trace with hash 1201500974, now seen corresponding path program 1 times [2021-10-28 23:33:25,198 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:25,198 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1254387209] [2021-10-28 23:33:25,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:25,198 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:25,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:25,384 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:25,384 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:25,384 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1254387209] [2021-10-28 23:33:25,385 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1254387209] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:25,385 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:25,385 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:33:25,385 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1227791150] [2021-10-28 23:33:25,386 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:33:25,386 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:25,387 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:33:25,388 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:33:25,388 INFO L87 Difference]: Start difference. First operand 632 states and 842 transitions. Second operand has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:25,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:25,775 INFO L93 Difference]: Finished difference Result 1899 states and 2590 transitions. [2021-10-28 23:33:25,775 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 23:33:25,776 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2021-10-28 23:33:25,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:25,787 INFO L225 Difference]: With dead ends: 1899 [2021-10-28 23:33:25,787 INFO L226 Difference]: Without dead ends: 1534 [2021-10-28 23:33:25,789 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-28 23:33:25,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1534 states. [2021-10-28 23:33:25,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1534 to 620. [2021-10-28 23:33:25,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 620 states, 615 states have (on average 1.3463414634146342) internal successors, (828), 619 states have internal predecessors, (828), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:25,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 620 states to 620 states and 828 transitions. [2021-10-28 23:33:25,910 INFO L78 Accepts]: Start accepts. Automaton has 620 states and 828 transitions. Word has length 75 [2021-10-28 23:33:25,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:25,910 INFO L470 AbstractCegarLoop]: Abstraction has 620 states and 828 transitions. [2021-10-28 23:33:25,911 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:25,911 INFO L276 IsEmpty]: Start isEmpty. Operand 620 states and 828 transitions. [2021-10-28 23:33:25,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2021-10-28 23:33:25,913 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:25,913 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:25,913 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-10-28 23:33:25,914 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:25,914 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:25,914 INFO L85 PathProgramCache]: Analyzing trace with hash -979161099, now seen corresponding path program 1 times [2021-10-28 23:33:25,915 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:25,915 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1308985566] [2021-10-28 23:33:25,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:25,915 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:25,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:26,016 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:26,017 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:26,017 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1308985566] [2021-10-28 23:33:26,017 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1308985566] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:26,018 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:26,018 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:33:26,018 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2048901419] [2021-10-28 23:33:26,020 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:33:26,021 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:26,021 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:33:26,022 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:33:26,022 INFO L87 Difference]: Start difference. First operand 620 states and 828 transitions. Second operand has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:26,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:26,255 INFO L93 Difference]: Finished difference Result 971 states and 1314 transitions. [2021-10-28 23:33:26,255 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-28 23:33:26,255 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 75 [2021-10-28 23:33:26,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:26,263 INFO L225 Difference]: With dead ends: 971 [2021-10-28 23:33:26,263 INFO L226 Difference]: Without dead ends: 969 [2021-10-28 23:33:26,264 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-28 23:33:26,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 969 states. [2021-10-28 23:33:26,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 969 to 622. [2021-10-28 23:33:26,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 622 states, 617 states have (on average 1.3452188006482981) internal successors, (830), 621 states have internal predecessors, (830), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:26,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 622 states to 622 states and 830 transitions. [2021-10-28 23:33:26,351 INFO L78 Accepts]: Start accepts. Automaton has 622 states and 830 transitions. Word has length 75 [2021-10-28 23:33:26,351 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:26,352 INFO L470 AbstractCegarLoop]: Abstraction has 622 states and 830 transitions. [2021-10-28 23:33:26,353 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:26,353 INFO L276 IsEmpty]: Start isEmpty. Operand 622 states and 830 transitions. [2021-10-28 23:33:26,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-28 23:33:26,354 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:26,355 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:26,355 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-10-28 23:33:26,356 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:26,357 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:26,357 INFO L85 PathProgramCache]: Analyzing trace with hash 1972810381, now seen corresponding path program 1 times [2021-10-28 23:33:26,357 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:26,358 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [180336075] [2021-10-28 23:33:26,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:26,358 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:26,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:26,460 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:26,460 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:26,461 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [180336075] [2021-10-28 23:33:26,461 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [180336075] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:26,461 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:26,461 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:33:26,462 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [439321254] [2021-10-28 23:33:26,464 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:33:26,464 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:26,465 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:33:26,465 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:33:26,465 INFO L87 Difference]: Start difference. First operand 622 states and 830 transitions. Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:26,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:26,743 INFO L93 Difference]: Finished difference Result 1465 states and 2028 transitions. [2021-10-28 23:33:26,744 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:33:26,744 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-28 23:33:26,745 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:26,752 INFO L225 Difference]: With dead ends: 1465 [2021-10-28 23:33:26,753 INFO L226 Difference]: Without dead ends: 1098 [2021-10-28 23:33:26,754 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-28 23:33:26,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1098 states. [2021-10-28 23:33:26,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1098 to 628. [2021-10-28 23:33:26,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 628 states, 623 states have (on average 1.3418940609951846) internal successors, (836), 627 states have internal predecessors, (836), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:26,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 628 states to 628 states and 836 transitions. [2021-10-28 23:33:26,840 INFO L78 Accepts]: Start accepts. Automaton has 628 states and 836 transitions. Word has length 76 [2021-10-28 23:33:26,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:26,841 INFO L470 AbstractCegarLoop]: Abstraction has 628 states and 836 transitions. [2021-10-28 23:33:26,841 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:26,841 INFO L276 IsEmpty]: Start isEmpty. Operand 628 states and 836 transitions. [2021-10-28 23:33:26,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-28 23:33:26,843 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:26,843 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:26,843 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-10-28 23:33:26,844 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:26,845 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:26,845 INFO L85 PathProgramCache]: Analyzing trace with hash -1558776470, now seen corresponding path program 1 times [2021-10-28 23:33:26,845 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:26,845 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [570131383] [2021-10-28 23:33:26,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:26,846 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:26,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:26,946 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:26,946 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:26,947 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [570131383] [2021-10-28 23:33:26,947 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [570131383] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:26,947 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:26,947 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:33:26,948 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [910232118] [2021-10-28 23:33:26,948 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:33:26,948 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:26,949 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:33:26,949 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:33:26,949 INFO L87 Difference]: Start difference. First operand 628 states and 836 transitions. Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:27,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:27,185 INFO L93 Difference]: Finished difference Result 1463 states and 1952 transitions. [2021-10-28 23:33:27,186 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:33:27,186 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-28 23:33:27,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:27,194 INFO L225 Difference]: With dead ends: 1463 [2021-10-28 23:33:27,194 INFO L226 Difference]: Without dead ends: 1072 [2021-10-28 23:33:27,195 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:33:27,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1072 states. [2021-10-28 23:33:27,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1072 to 818. [2021-10-28 23:33:27,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 818 states, 813 states have (on average 1.3333333333333333) internal successors, (1084), 817 states have internal predecessors, (1084), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:27,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 818 states to 818 states and 1084 transitions. [2021-10-28 23:33:27,300 INFO L78 Accepts]: Start accepts. Automaton has 818 states and 1084 transitions. Word has length 76 [2021-10-28 23:33:27,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:27,300 INFO L470 AbstractCegarLoop]: Abstraction has 818 states and 1084 transitions. [2021-10-28 23:33:27,301 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:27,301 INFO L276 IsEmpty]: Start isEmpty. Operand 818 states and 1084 transitions. [2021-10-28 23:33:27,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-28 23:33:27,303 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:27,303 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:27,303 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-10-28 23:33:27,304 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:27,305 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:27,305 INFO L85 PathProgramCache]: Analyzing trace with hash -932876156, now seen corresponding path program 1 times [2021-10-28 23:33:27,305 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:27,305 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [665042018] [2021-10-28 23:33:27,306 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:27,306 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:27,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:27,442 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:27,442 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:27,442 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [665042018] [2021-10-28 23:33:27,443 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [665042018] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:27,443 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:27,443 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:33:27,443 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [195135274] [2021-10-28 23:33:27,444 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:33:27,445 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:27,446 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:33:27,446 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:33:27,447 INFO L87 Difference]: Start difference. First operand 818 states and 1084 transitions. Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:28,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:28,102 INFO L93 Difference]: Finished difference Result 3144 states and 4188 transitions. [2021-10-28 23:33:28,102 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:33:28,103 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-28 23:33:28,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:28,122 INFO L225 Difference]: With dead ends: 3144 [2021-10-28 23:33:28,122 INFO L226 Difference]: Without dead ends: 2626 [2021-10-28 23:33:28,124 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-28 23:33:28,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2626 states. [2021-10-28 23:33:28,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2626 to 872. [2021-10-28 23:33:28,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 872 states, 867 states have (on average 1.328719723183391) internal successors, (1152), 871 states have internal predecessors, (1152), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:28,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 872 states to 872 states and 1152 transitions. [2021-10-28 23:33:28,286 INFO L78 Accepts]: Start accepts. Automaton has 872 states and 1152 transitions. Word has length 76 [2021-10-28 23:33:28,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:28,287 INFO L470 AbstractCegarLoop]: Abstraction has 872 states and 1152 transitions. [2021-10-28 23:33:28,287 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:28,288 INFO L276 IsEmpty]: Start isEmpty. Operand 872 states and 1152 transitions. [2021-10-28 23:33:28,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-10-28 23:33:28,289 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:28,290 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:28,290 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-10-28 23:33:28,290 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:28,291 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:28,291 INFO L85 PathProgramCache]: Analyzing trace with hash 542872594, now seen corresponding path program 1 times [2021-10-28 23:33:28,291 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:28,291 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1177186020] [2021-10-28 23:33:28,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:28,292 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:28,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:28,363 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:28,363 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:28,363 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1177186020] [2021-10-28 23:33:28,364 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1177186020] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:28,364 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:28,364 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:33:28,364 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1792491585] [2021-10-28 23:33:28,365 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:33:28,365 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:28,366 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:33:28,366 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:33:28,366 INFO L87 Difference]: Start difference. First operand 872 states and 1152 transitions. Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:28,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:28,664 INFO L93 Difference]: Finished difference Result 2255 states and 2985 transitions. [2021-10-28 23:33:28,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:33:28,665 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-10-28 23:33:28,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:28,677 INFO L225 Difference]: With dead ends: 2255 [2021-10-28 23:33:28,677 INFO L226 Difference]: Without dead ends: 1684 [2021-10-28 23:33:28,680 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:33:28,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1684 states. [2021-10-28 23:33:28,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1684 to 1213. [2021-10-28 23:33:28,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1213 states, 1208 states have (on average 1.3162251655629138) internal successors, (1590), 1212 states have internal predecessors, (1590), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:28,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1213 states to 1213 states and 1590 transitions. [2021-10-28 23:33:28,906 INFO L78 Accepts]: Start accepts. Automaton has 1213 states and 1590 transitions. Word has length 77 [2021-10-28 23:33:28,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:28,906 INFO L470 AbstractCegarLoop]: Abstraction has 1213 states and 1590 transitions. [2021-10-28 23:33:28,907 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:28,907 INFO L276 IsEmpty]: Start isEmpty. Operand 1213 states and 1590 transitions. [2021-10-28 23:33:28,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-28 23:33:28,909 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:28,910 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:28,910 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-10-28 23:33:28,910 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:28,911 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:28,911 INFO L85 PathProgramCache]: Analyzing trace with hash -871568132, now seen corresponding path program 1 times [2021-10-28 23:33:28,912 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:28,912 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1816255410] [2021-10-28 23:33:28,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:28,912 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:28,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:28,959 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:28,960 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:28,960 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1816255410] [2021-10-28 23:33:28,960 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1816255410] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:28,961 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:28,961 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:33:28,961 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [265002388] [2021-10-28 23:33:28,962 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:33:28,962 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:28,963 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:33:28,963 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:33:28,963 INFO L87 Difference]: Start difference. First operand 1213 states and 1590 transitions. Second operand has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:29,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:29,307 INFO L93 Difference]: Finished difference Result 2967 states and 3887 transitions. [2021-10-28 23:33:29,308 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:33:29,308 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-28 23:33:29,308 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:29,322 INFO L225 Difference]: With dead ends: 2967 [2021-10-28 23:33:29,322 INFO L226 Difference]: Without dead ends: 2012 [2021-10-28 23:33:29,325 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:33:29,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2012 states. [2021-10-28 23:33:29,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2012 to 1215. [2021-10-28 23:33:29,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1215 states, 1210 states have (on average 1.315702479338843) internal successors, (1592), 1214 states have internal predecessors, (1592), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:29,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1215 states to 1215 states and 1592 transitions. [2021-10-28 23:33:29,512 INFO L78 Accepts]: Start accepts. Automaton has 1215 states and 1592 transitions. Word has length 78 [2021-10-28 23:33:29,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:29,512 INFO L470 AbstractCegarLoop]: Abstraction has 1215 states and 1592 transitions. [2021-10-28 23:33:29,512 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:29,513 INFO L276 IsEmpty]: Start isEmpty. Operand 1215 states and 1592 transitions. [2021-10-28 23:33:29,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2021-10-28 23:33:29,515 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:29,515 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:29,515 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-10-28 23:33:29,516 INFO L402 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:29,516 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:29,517 INFO L85 PathProgramCache]: Analyzing trace with hash 1856049885, now seen corresponding path program 1 times [2021-10-28 23:33:29,517 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:29,517 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1776541761] [2021-10-28 23:33:29,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:29,518 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:29,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:29,597 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:29,597 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:29,597 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1776541761] [2021-10-28 23:33:29,598 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1776541761] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:29,598 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:29,598 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:33:29,598 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1586326581] [2021-10-28 23:33:29,599 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:33:29,599 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:29,600 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:33:29,600 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:33:29,600 INFO L87 Difference]: Start difference. First operand 1215 states and 1592 transitions. Second operand has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:29,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:29,845 INFO L93 Difference]: Finished difference Result 2519 states and 3295 transitions. [2021-10-28 23:33:29,845 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:33:29,846 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 79 [2021-10-28 23:33:29,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:29,856 INFO L225 Difference]: With dead ends: 2519 [2021-10-28 23:33:29,856 INFO L226 Difference]: Without dead ends: 1376 [2021-10-28 23:33:29,858 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:33:29,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1376 states. [2021-10-28 23:33:30,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1376 to 1020. [2021-10-28 23:33:30,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1020 states, 1015 states have (on average 1.3083743842364532) internal successors, (1328), 1019 states have internal predecessors, (1328), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:30,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1020 states to 1020 states and 1328 transitions. [2021-10-28 23:33:30,036 INFO L78 Accepts]: Start accepts. Automaton has 1020 states and 1328 transitions. Word has length 79 [2021-10-28 23:33:30,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:30,036 INFO L470 AbstractCegarLoop]: Abstraction has 1020 states and 1328 transitions. [2021-10-28 23:33:30,037 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:30,037 INFO L276 IsEmpty]: Start isEmpty. Operand 1020 states and 1328 transitions. [2021-10-28 23:33:30,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-10-28 23:33:30,039 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:30,039 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:30,039 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-10-28 23:33:30,039 INFO L402 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:30,040 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:30,040 INFO L85 PathProgramCache]: Analyzing trace with hash 1593609901, now seen corresponding path program 1 times [2021-10-28 23:33:30,041 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:30,041 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1977036830] [2021-10-28 23:33:30,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:30,041 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:30,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:30,106 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:30,106 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:30,107 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1977036830] [2021-10-28 23:33:30,107 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1977036830] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:30,107 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:30,107 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:33:30,108 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1212557296] [2021-10-28 23:33:30,108 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:33:30,108 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:30,109 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:33:30,109 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:33:30,110 INFO L87 Difference]: Start difference. First operand 1020 states and 1328 transitions. Second operand has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:30,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:30,439 INFO L93 Difference]: Finished difference Result 2414 states and 3160 transitions. [2021-10-28 23:33:30,440 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:33:30,440 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-10-28 23:33:30,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:30,451 INFO L225 Difference]: With dead ends: 2414 [2021-10-28 23:33:30,452 INFO L226 Difference]: Without dead ends: 1537 [2021-10-28 23:33:30,454 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:33:30,457 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1537 states. [2021-10-28 23:33:30,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1537 to 1026. [2021-10-28 23:33:30,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1026 states, 1021 states have (on average 1.306562193927522) internal successors, (1334), 1025 states have internal predecessors, (1334), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:30,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1026 states to 1026 states and 1334 transitions. [2021-10-28 23:33:30,649 INFO L78 Accepts]: Start accepts. Automaton has 1026 states and 1334 transitions. Word has length 80 [2021-10-28 23:33:30,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:30,650 INFO L470 AbstractCegarLoop]: Abstraction has 1026 states and 1334 transitions. [2021-10-28 23:33:30,651 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:30,651 INFO L276 IsEmpty]: Start isEmpty. Operand 1026 states and 1334 transitions. [2021-10-28 23:33:30,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-10-28 23:33:30,653 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:30,653 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:30,653 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-10-28 23:33:30,654 INFO L402 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:30,654 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:30,654 INFO L85 PathProgramCache]: Analyzing trace with hash 1333673785, now seen corresponding path program 1 times [2021-10-28 23:33:30,655 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:30,655 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1595904374] [2021-10-28 23:33:30,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:30,655 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:30,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:30,761 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:30,761 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:30,761 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1595904374] [2021-10-28 23:33:30,762 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1595904374] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:30,762 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:30,762 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:33:30,762 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1454652408] [2021-10-28 23:33:30,763 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:33:30,763 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:30,764 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:33:30,765 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:33:30,765 INFO L87 Difference]: Start difference. First operand 1026 states and 1334 transitions. Second operand has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:31,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:31,039 INFO L93 Difference]: Finished difference Result 2367 states and 3085 transitions. [2021-10-28 23:33:31,039 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:33:31,040 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-10-28 23:33:31,040 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:31,049 INFO L225 Difference]: With dead ends: 2367 [2021-10-28 23:33:31,050 INFO L226 Difference]: Without dead ends: 1436 [2021-10-28 23:33:31,052 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:33:31,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1436 states. [2021-10-28 23:33:31,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1436 to 968. [2021-10-28 23:33:31,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 968 states, 963 states have (on average 1.300103842159917) internal successors, (1252), 967 states have internal predecessors, (1252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:31,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 968 states to 968 states and 1252 transitions. [2021-10-28 23:33:31,261 INFO L78 Accepts]: Start accepts. Automaton has 968 states and 1252 transitions. Word has length 80 [2021-10-28 23:33:31,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:31,261 INFO L470 AbstractCegarLoop]: Abstraction has 968 states and 1252 transitions. [2021-10-28 23:33:31,262 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.0) internal successors, (80), 4 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:31,262 INFO L276 IsEmpty]: Start isEmpty. Operand 968 states and 1252 transitions. [2021-10-28 23:33:31,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2021-10-28 23:33:31,266 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:31,267 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:31,267 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-10-28 23:33:31,267 INFO L402 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:31,268 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:31,268 INFO L85 PathProgramCache]: Analyzing trace with hash -1161164796, now seen corresponding path program 1 times [2021-10-28 23:33:31,269 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:31,269 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [751372372] [2021-10-28 23:33:31,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:31,269 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:31,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:31,492 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:31,493 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:31,493 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [751372372] [2021-10-28 23:33:31,496 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [751372372] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:33:31,497 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1193350594] [2021-10-28 23:33:31,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:31,498 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:33:31,498 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:33:31,504 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:33:31,538 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-10-28 23:33:31,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:31,808 INFO L263 TraceCheckSpWp]: Trace formula consists of 709 conjuncts, 8 conjunts are in the unsatisfiable core [2021-10-28 23:33:31,821 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:33:32,461 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-28 23:33:32,461 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1193350594] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:32,462 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-28 23:33:32,462 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2021-10-28 23:33:32,462 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [656127929] [2021-10-28 23:33:32,463 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:33:32,463 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:32,464 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:33:32,464 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2021-10-28 23:33:32,465 INFO L87 Difference]: Start difference. First operand 968 states and 1252 transitions. Second operand has 6 states, 6 states have (on average 20.666666666666668) internal successors, (124), 6 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:33,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:33,009 INFO L93 Difference]: Finished difference Result 2490 states and 3322 transitions. [2021-10-28 23:33:33,010 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:33:33,010 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 20.666666666666668) internal successors, (124), 6 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 125 [2021-10-28 23:33:33,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:33,033 INFO L225 Difference]: With dead ends: 2490 [2021-10-28 23:33:33,040 INFO L226 Difference]: Without dead ends: 1701 [2021-10-28 23:33:33,043 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 122 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2021-10-28 23:33:33,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1701 states. [2021-10-28 23:33:33,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1701 to 968. [2021-10-28 23:33:33,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 968 states, 963 states have (on average 1.2990654205607477) internal successors, (1251), 967 states have internal predecessors, (1251), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:33,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 968 states to 968 states and 1251 transitions. [2021-10-28 23:33:33,258 INFO L78 Accepts]: Start accepts. Automaton has 968 states and 1251 transitions. Word has length 125 [2021-10-28 23:33:33,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:33,259 INFO L470 AbstractCegarLoop]: Abstraction has 968 states and 1251 transitions. [2021-10-28 23:33:33,259 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 20.666666666666668) internal successors, (124), 6 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:33,260 INFO L276 IsEmpty]: Start isEmpty. Operand 968 states and 1251 transitions. [2021-10-28 23:33:33,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2021-10-28 23:33:33,263 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:33,264 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:33,314 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-10-28 23:33:33,480 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2021-10-28 23:33:33,481 INFO L402 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:33,481 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:33,481 INFO L85 PathProgramCache]: Analyzing trace with hash -1641852183, now seen corresponding path program 1 times [2021-10-28 23:33:33,482 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:33,482 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [712756631] [2021-10-28 23:33:33,482 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:33,482 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:33,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:33,709 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:33,709 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:33,710 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [712756631] [2021-10-28 23:33:33,710 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [712756631] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:33:33,710 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2002464925] [2021-10-28 23:33:33,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:33,711 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:33:33,711 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:33:33,712 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:33:33,736 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-10-28 23:33:34,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:34,029 INFO L263 TraceCheckSpWp]: Trace formula consists of 723 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-28 23:33:34,045 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:33:34,705 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:34,705 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2002464925] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:33:34,705 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:33:34,706 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 13 [2021-10-28 23:33:34,706 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1906805917] [2021-10-28 23:33:34,707 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2021-10-28 23:33:34,707 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:34,708 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-10-28 23:33:34,708 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2021-10-28 23:33:34,709 INFO L87 Difference]: Start difference. First operand 968 states and 1251 transitions. Second operand has 13 states, 13 states have (on average 19.384615384615383) internal successors, (252), 13 states have internal predecessors, (252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:49,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:49,240 INFO L93 Difference]: Finished difference Result 16562 states and 22008 transitions. [2021-10-28 23:33:49,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 242 states. [2021-10-28 23:33:49,241 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 19.384615384615383) internal successors, (252), 13 states have internal predecessors, (252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 129 [2021-10-28 23:33:49,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:49,287 INFO L225 Difference]: With dead ends: 16562 [2021-10-28 23:33:49,288 INFO L226 Difference]: Without dead ends: 15779 [2021-10-28 23:33:49,319 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 472 GetRequests, 221 SyntacticMatches, 0 SemanticMatches, 251 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29009 ImplicationChecksByTransitivity, 7.4s TimeCoverageRelationStatistics Valid=8289, Invalid=55467, Unknown=0, NotChecked=0, Total=63756 [2021-10-28 23:33:49,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15779 states. [2021-10-28 23:33:49,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15779 to 2664. [2021-10-28 23:33:49,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2664 states, 2659 states have (on average 1.300112824370064) internal successors, (3457), 2663 states have internal predecessors, (3457), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:49,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2664 states to 2664 states and 3457 transitions. [2021-10-28 23:33:49,992 INFO L78 Accepts]: Start accepts. Automaton has 2664 states and 3457 transitions. Word has length 129 [2021-10-28 23:33:49,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:49,993 INFO L470 AbstractCegarLoop]: Abstraction has 2664 states and 3457 transitions. [2021-10-28 23:33:49,993 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 19.384615384615383) internal successors, (252), 13 states have internal predecessors, (252), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:49,993 INFO L276 IsEmpty]: Start isEmpty. Operand 2664 states and 3457 transitions. [2021-10-28 23:33:50,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2021-10-28 23:33:50,001 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:50,002 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:50,046 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2021-10-28 23:33:50,216 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2021-10-28 23:33:50,217 INFO L402 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:50,217 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:50,218 INFO L85 PathProgramCache]: Analyzing trace with hash -1066693851, now seen corresponding path program 1 times [2021-10-28 23:33:50,218 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:50,218 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1958101739] [2021-10-28 23:33:50,218 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:50,218 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:50,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:50,540 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:50,541 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:50,541 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1958101739] [2021-10-28 23:33:50,541 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1958101739] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:33:50,542 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1064554936] [2021-10-28 23:33:50,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:50,542 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:33:50,542 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:33:50,545 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:33:50,572 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-10-28 23:33:50,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:50,904 INFO L263 TraceCheckSpWp]: Trace formula consists of 775 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-28 23:33:50,912 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:33:51,416 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:51,416 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1064554936] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:33:51,417 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:33:51,417 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 8 [2021-10-28 23:33:51,417 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [599196103] [2021-10-28 23:33:51,418 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2021-10-28 23:33:51,419 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:51,419 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-10-28 23:33:51,420 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2021-10-28 23:33:51,420 INFO L87 Difference]: Start difference. First operand 2664 states and 3457 transitions. Second operand has 8 states, 8 states have (on average 19.5) internal successors, (156), 8 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:52,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:52,940 INFO L93 Difference]: Finished difference Result 9414 states and 12634 transitions. [2021-10-28 23:33:52,940 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2021-10-28 23:33:52,940 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 19.5) internal successors, (156), 8 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 130 [2021-10-28 23:33:52,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:52,961 INFO L225 Difference]: With dead ends: 9414 [2021-10-28 23:33:52,961 INFO L226 Difference]: Without dead ends: 6969 [2021-10-28 23:33:52,966 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 140 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=146, Invalid=360, Unknown=0, NotChecked=0, Total=506 [2021-10-28 23:33:52,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6969 states. [2021-10-28 23:33:53,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6969 to 2248. [2021-10-28 23:33:53,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2248 states, 2243 states have (on average 1.294694605439144) internal successors, (2904), 2247 states have internal predecessors, (2904), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:53,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2248 states to 2248 states and 2904 transitions. [2021-10-28 23:33:53,491 INFO L78 Accepts]: Start accepts. Automaton has 2248 states and 2904 transitions. Word has length 130 [2021-10-28 23:33:53,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:53,491 INFO L470 AbstractCegarLoop]: Abstraction has 2248 states and 2904 transitions. [2021-10-28 23:33:53,492 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 19.5) internal successors, (156), 8 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:53,492 INFO L276 IsEmpty]: Start isEmpty. Operand 2248 states and 2904 transitions. [2021-10-28 23:33:53,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2021-10-28 23:33:53,498 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:53,499 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:53,547 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2021-10-28 23:33:53,712 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2021-10-28 23:33:53,713 INFO L402 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:53,713 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:53,713 INFO L85 PathProgramCache]: Analyzing trace with hash -2028457745, now seen corresponding path program 1 times [2021-10-28 23:33:53,713 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:53,714 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1437342929] [2021-10-28 23:33:53,714 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:53,714 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:53,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:53,883 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2021-10-28 23:33:53,884 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:53,884 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1437342929] [2021-10-28 23:33:53,884 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1437342929] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:53,884 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:53,885 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-28 23:33:53,885 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [174587797] [2021-10-28 23:33:53,886 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-28 23:33:53,886 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:53,887 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 23:33:53,887 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-10-28 23:33:53,887 INFO L87 Difference]: Start difference. First operand 2248 states and 2904 transitions. Second operand has 7 states, 7 states have (on average 16.142857142857142) internal successors, (113), 7 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:55,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:55,929 INFO L93 Difference]: Finished difference Result 12918 states and 17076 transitions. [2021-10-28 23:33:55,930 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-10-28 23:33:55,930 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.142857142857142) internal successors, (113), 7 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 131 [2021-10-28 23:33:55,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:55,956 INFO L225 Difference]: With dead ends: 12918 [2021-10-28 23:33:55,957 INFO L226 Difference]: Without dead ends: 10909 [2021-10-28 23:33:55,962 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2021-10-28 23:33:55,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10909 states. [2021-10-28 23:33:56,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10909 to 2668. [2021-10-28 23:33:56,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2668 states, 2663 states have (on average 1.2771310552009012) internal successors, (3401), 2667 states have internal predecessors, (3401), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:56,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2668 states to 2668 states and 3401 transitions. [2021-10-28 23:33:56,555 INFO L78 Accepts]: Start accepts. Automaton has 2668 states and 3401 transitions. Word has length 131 [2021-10-28 23:33:56,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:56,556 INFO L470 AbstractCegarLoop]: Abstraction has 2668 states and 3401 transitions. [2021-10-28 23:33:56,557 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.142857142857142) internal successors, (113), 7 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:56,557 INFO L276 IsEmpty]: Start isEmpty. Operand 2668 states and 3401 transitions. [2021-10-28 23:33:56,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2021-10-28 23:33:56,564 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:56,565 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:56,565 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2021-10-28 23:33:56,567 INFO L402 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:56,568 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:56,568 INFO L85 PathProgramCache]: Analyzing trace with hash 603418006, now seen corresponding path program 1 times [2021-10-28 23:33:56,569 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:56,569 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [657006445] [2021-10-28 23:33:56,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:56,569 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:56,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:56,773 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-28 23:33:56,774 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:56,774 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [657006445] [2021-10-28 23:33:56,774 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [657006445] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:56,774 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:56,775 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:33:56,775 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1667212899] [2021-10-28 23:33:56,776 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:33:56,776 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:56,777 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:33:56,777 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:33:56,777 INFO L87 Difference]: Start difference. First operand 2668 states and 3401 transitions. Second operand has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:58,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:58,077 INFO L93 Difference]: Finished difference Result 8583 states and 11271 transitions. [2021-10-28 23:33:58,077 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:33:58,078 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 132 [2021-10-28 23:33:58,078 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:58,093 INFO L225 Difference]: With dead ends: 8583 [2021-10-28 23:33:58,093 INFO L226 Difference]: Without dead ends: 6094 [2021-10-28 23:33:58,099 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-28 23:33:58,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6094 states. [2021-10-28 23:33:58,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6094 to 2668. [2021-10-28 23:33:58,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2668 states, 2663 states have (on average 1.2756289898610589) internal successors, (3397), 2667 states have internal predecessors, (3397), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:58,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2668 states to 2668 states and 3397 transitions. [2021-10-28 23:33:58,654 INFO L78 Accepts]: Start accepts. Automaton has 2668 states and 3397 transitions. Word has length 132 [2021-10-28 23:33:58,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:58,655 INFO L470 AbstractCegarLoop]: Abstraction has 2668 states and 3397 transitions. [2021-10-28 23:33:58,655 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:58,655 INFO L276 IsEmpty]: Start isEmpty. Operand 2668 states and 3397 transitions. [2021-10-28 23:33:58,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2021-10-28 23:33:58,663 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:58,663 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:58,663 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-10-28 23:33:58,664 INFO L402 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:58,664 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:58,664 INFO L85 PathProgramCache]: Analyzing trace with hash 1877464571, now seen corresponding path program 1 times [2021-10-28 23:33:58,665 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:58,665 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [53413129] [2021-10-28 23:33:58,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:58,665 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:58,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:58,856 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-28 23:33:58,856 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:58,856 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [53413129] [2021-10-28 23:33:58,857 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [53413129] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:58,857 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:58,857 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:33:58,857 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1046091905] [2021-10-28 23:33:58,859 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:33:58,859 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:58,860 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:33:58,860 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:33:58,861 INFO L87 Difference]: Start difference. First operand 2668 states and 3397 transitions. Second operand has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:00,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:34:00,070 INFO L93 Difference]: Finished difference Result 7775 states and 10081 transitions. [2021-10-28 23:34:00,071 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 23:34:00,071 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 136 [2021-10-28 23:34:00,071 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:34:00,082 INFO L225 Difference]: With dead ends: 7775 [2021-10-28 23:34:00,082 INFO L226 Difference]: Without dead ends: 5286 [2021-10-28 23:34:00,087 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-28 23:34:00,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5286 states. [2021-10-28 23:34:00,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5286 to 2668. [2021-10-28 23:34:00,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2668 states, 2663 states have (on average 1.2741269245212166) internal successors, (3393), 2667 states have internal predecessors, (3393), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:00,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2668 states to 2668 states and 3393 transitions. [2021-10-28 23:34:00,667 INFO L78 Accepts]: Start accepts. Automaton has 2668 states and 3393 transitions. Word has length 136 [2021-10-28 23:34:00,667 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:34:00,667 INFO L470 AbstractCegarLoop]: Abstraction has 2668 states and 3393 transitions. [2021-10-28 23:34:00,667 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:00,668 INFO L276 IsEmpty]: Start isEmpty. Operand 2668 states and 3393 transitions. [2021-10-28 23:34:00,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2021-10-28 23:34:00,675 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:34:00,676 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:34:00,676 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2021-10-28 23:34:00,676 INFO L402 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:34:00,677 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:34:00,677 INFO L85 PathProgramCache]: Analyzing trace with hash 1682749301, now seen corresponding path program 1 times [2021-10-28 23:34:00,677 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:34:00,677 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1022749925] [2021-10-28 23:34:00,678 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:34:00,678 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:34:00,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:34:00,847 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-10-28 23:34:00,847 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:34:00,847 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1022749925] [2021-10-28 23:34:00,847 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1022749925] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:34:00,848 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:34:00,848 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:34:00,848 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1952552597] [2021-10-28 23:34:00,849 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:34:00,849 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:34:00,850 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:34:00,850 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:34:00,850 INFO L87 Difference]: Start difference. First operand 2668 states and 3393 transitions. Second operand has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:01,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:34:01,323 INFO L93 Difference]: Finished difference Result 4368 states and 5586 transitions. [2021-10-28 23:34:01,324 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 23:34:01,324 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 139 [2021-10-28 23:34:01,324 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:34:01,328 INFO L225 Difference]: With dead ends: 4368 [2021-10-28 23:34:01,328 INFO L226 Difference]: Without dead ends: 1841 [2021-10-28 23:34:01,333 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:34:01,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1841 states. [2021-10-28 23:34:01,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1841 to 1841. [2021-10-28 23:34:01,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1841 states, 1836 states have (on average 1.2734204793028323) internal successors, (2338), 1840 states have internal predecessors, (2338), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:01,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1841 states to 1841 states and 2338 transitions. [2021-10-28 23:34:01,721 INFO L78 Accepts]: Start accepts. Automaton has 1841 states and 2338 transitions. Word has length 139 [2021-10-28 23:34:01,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:34:01,722 INFO L470 AbstractCegarLoop]: Abstraction has 1841 states and 2338 transitions. [2021-10-28 23:34:01,722 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:01,722 INFO L276 IsEmpty]: Start isEmpty. Operand 1841 states and 2338 transitions. [2021-10-28 23:34:01,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2021-10-28 23:34:01,727 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:34:01,728 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:34:01,728 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2021-10-28 23:34:01,728 INFO L402 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:34:01,729 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:34:01,729 INFO L85 PathProgramCache]: Analyzing trace with hash -1680671061, now seen corresponding path program 1 times [2021-10-28 23:34:01,729 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:34:01,730 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1838949793] [2021-10-28 23:34:01,730 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:34:01,730 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:34:01,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:34:01,977 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 25 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:34:01,978 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:34:01,978 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1838949793] [2021-10-28 23:34:01,978 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1838949793] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:34:01,978 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1261472202] [2021-10-28 23:34:01,978 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:34:01,979 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:34:01,979 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:34:01,981 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:34:02,000 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-10-28 23:34:02,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:34:02,420 INFO L263 TraceCheckSpWp]: Trace formula consists of 802 conjuncts, 22 conjunts are in the unsatisfiable core [2021-10-28 23:34:02,425 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:34:03,530 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 25 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:34:03,531 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1261472202] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:34:03,531 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:34:03,531 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 15 [2021-10-28 23:34:03,532 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [540259001] [2021-10-28 23:34:03,532 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2021-10-28 23:34:03,533 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:34:03,535 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2021-10-28 23:34:03,535 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2021-10-28 23:34:03,535 INFO L87 Difference]: Start difference. First operand 1841 states and 2338 transitions. Second operand has 16 states, 16 states have (on average 12.5) internal successors, (200), 15 states have internal predecessors, (200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:05,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:34:05,891 INFO L93 Difference]: Finished difference Result 5129 states and 6549 transitions. [2021-10-28 23:34:05,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2021-10-28 23:34:05,892 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 12.5) internal successors, (200), 15 states have internal predecessors, (200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 139 [2021-10-28 23:34:05,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:34:05,899 INFO L225 Difference]: With dead ends: 5129 [2021-10-28 23:34:05,899 INFO L226 Difference]: Without dead ends: 3477 [2021-10-28 23:34:05,904 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 132 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 265 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=267, Invalid=1065, Unknown=0, NotChecked=0, Total=1332 [2021-10-28 23:34:05,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3477 states. [2021-10-28 23:34:06,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3477 to 2077. [2021-10-28 23:34:06,268 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2077 states, 2072 states have (on average 1.2697876447876448) internal successors, (2631), 2076 states have internal predecessors, (2631), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:06,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2077 states to 2077 states and 2631 transitions. [2021-10-28 23:34:06,274 INFO L78 Accepts]: Start accepts. Automaton has 2077 states and 2631 transitions. Word has length 139 [2021-10-28 23:34:06,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:34:06,275 INFO L470 AbstractCegarLoop]: Abstraction has 2077 states and 2631 transitions. [2021-10-28 23:34:06,276 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 12.5) internal successors, (200), 15 states have internal predecessors, (200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:06,276 INFO L276 IsEmpty]: Start isEmpty. Operand 2077 states and 2631 transitions. [2021-10-28 23:34:06,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2021-10-28 23:34:06,282 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:34:06,282 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:34:06,327 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2021-10-28 23:34:06,496 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:34:06,497 INFO L402 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:34:06,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:34:06,497 INFO L85 PathProgramCache]: Analyzing trace with hash 1991014633, now seen corresponding path program 1 times [2021-10-28 23:34:06,498 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:34:06,498 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1716274944] [2021-10-28 23:34:06,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:34:06,498 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:34:06,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:34:06,631 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2021-10-28 23:34:06,631 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:34:06,631 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1716274944] [2021-10-28 23:34:06,632 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1716274944] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:34:06,632 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:34:06,632 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:34:06,632 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1240696966] [2021-10-28 23:34:06,633 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 23:34:06,634 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:34:06,638 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 23:34:06,639 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:34:06,640 INFO L87 Difference]: Start difference. First operand 2077 states and 2631 transitions. Second operand has 5 states, 5 states have (on average 24.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:07,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:34:07,293 INFO L93 Difference]: Finished difference Result 3899 states and 4977 transitions. [2021-10-28 23:34:07,294 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:34:07,294 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 139 [2021-10-28 23:34:07,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:34:07,297 INFO L225 Difference]: With dead ends: 3899 [2021-10-28 23:34:07,298 INFO L226 Difference]: Without dead ends: 1952 [2021-10-28 23:34:07,301 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:34:07,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1952 states. [2021-10-28 23:34:07,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1952 to 1952. [2021-10-28 23:34:07,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1952 states, 1947 states have (on average 1.273240883410375) internal successors, (2479), 1951 states have internal predecessors, (2479), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:07,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1952 states to 1952 states and 2479 transitions. [2021-10-28 23:34:07,804 INFO L78 Accepts]: Start accepts. Automaton has 1952 states and 2479 transitions. Word has length 139 [2021-10-28 23:34:07,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:34:07,805 INFO L470 AbstractCegarLoop]: Abstraction has 1952 states and 2479 transitions. [2021-10-28 23:34:07,805 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:07,806 INFO L276 IsEmpty]: Start isEmpty. Operand 1952 states and 2479 transitions. [2021-10-28 23:34:07,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-10-28 23:34:07,810 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:34:07,810 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:34:07,810 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2021-10-28 23:34:07,811 INFO L402 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:34:07,811 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:34:07,811 INFO L85 PathProgramCache]: Analyzing trace with hash 1475255201, now seen corresponding path program 1 times [2021-10-28 23:34:07,812 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:34:07,812 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1257921990] [2021-10-28 23:34:07,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:34:07,812 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:34:07,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:34:08,052 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 30 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:34:08,052 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:34:08,053 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1257921990] [2021-10-28 23:34:08,053 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1257921990] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:34:08,053 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1337723212] [2021-10-28 23:34:08,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:34:08,054 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:34:08,054 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:34:08,057 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:34:08,076 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-10-28 23:34:08,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:34:08,498 INFO L263 TraceCheckSpWp]: Trace formula consists of 803 conjuncts, 24 conjunts are in the unsatisfiable core [2021-10-28 23:34:08,502 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:34:09,619 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 30 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:34:09,619 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1337723212] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:34:09,619 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:34:09,619 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 15 [2021-10-28 23:34:09,620 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [627740701] [2021-10-28 23:34:09,620 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2021-10-28 23:34:09,621 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:34:09,621 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2021-10-28 23:34:09,621 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2021-10-28 23:34:09,622 INFO L87 Difference]: Start difference. First operand 1952 states and 2479 transitions. Second operand has 16 states, 16 states have (on average 12.9375) internal successors, (207), 15 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:11,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:34:11,901 INFO L93 Difference]: Finished difference Result 5715 states and 7287 transitions. [2021-10-28 23:34:11,901 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2021-10-28 23:34:11,902 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 12.9375) internal successors, (207), 15 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-10-28 23:34:11,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:34:11,907 INFO L225 Difference]: With dead ends: 5715 [2021-10-28 23:34:11,908 INFO L226 Difference]: Without dead ends: 3952 [2021-10-28 23:34:11,911 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 133 SyntacticMatches, 2 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 403 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=353, Invalid=1453, Unknown=0, NotChecked=0, Total=1806 [2021-10-28 23:34:11,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3952 states. [2021-10-28 23:34:12,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3952 to 2215. [2021-10-28 23:34:12,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2215 states, 2210 states have (on average 1.2692307692307692) internal successors, (2805), 2214 states have internal predecessors, (2805), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:12,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2215 states to 2215 states and 2805 transitions. [2021-10-28 23:34:12,457 INFO L78 Accepts]: Start accepts. Automaton has 2215 states and 2805 transitions. Word has length 140 [2021-10-28 23:34:12,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:34:12,458 INFO L470 AbstractCegarLoop]: Abstraction has 2215 states and 2805 transitions. [2021-10-28 23:34:12,458 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 12.9375) internal successors, (207), 15 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:12,458 INFO L276 IsEmpty]: Start isEmpty. Operand 2215 states and 2805 transitions. [2021-10-28 23:34:12,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-10-28 23:34:12,463 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:34:12,463 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:34:12,511 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2021-10-28 23:34:12,688 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:34:12,689 INFO L402 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:34:12,689 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:34:12,689 INFO L85 PathProgramCache]: Analyzing trace with hash 1593696675, now seen corresponding path program 1 times [2021-10-28 23:34:12,689 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:34:12,690 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1313386204] [2021-10-28 23:34:12,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:34:12,690 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:34:12,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:34:12,751 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2021-10-28 23:34:12,752 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:34:12,752 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1313386204] [2021-10-28 23:34:12,752 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1313386204] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:34:12,752 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:34:12,752 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:34:12,753 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1467885212] [2021-10-28 23:34:12,754 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:34:12,754 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:34:12,755 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:34:12,755 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:34:12,755 INFO L87 Difference]: Start difference. First operand 2215 states and 2805 transitions. Second operand has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:13,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:34:13,203 INFO L93 Difference]: Finished difference Result 4093 states and 5216 transitions. [2021-10-28 23:34:13,203 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 23:34:13,203 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-10-28 23:34:13,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:34:13,206 INFO L225 Difference]: With dead ends: 4093 [2021-10-28 23:34:13,206 INFO L226 Difference]: Without dead ends: 2010 [2021-10-28 23:34:13,208 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:34:13,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2010 states. [2021-10-28 23:34:13,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2010 to 2002. [2021-10-28 23:34:13,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2002 states, 1997 states have (on average 1.2663995993990986) internal successors, (2529), 2001 states have internal predecessors, (2529), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:13,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2002 states to 2002 states and 2529 transitions. [2021-10-28 23:34:13,678 INFO L78 Accepts]: Start accepts. Automaton has 2002 states and 2529 transitions. Word has length 140 [2021-10-28 23:34:13,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:34:13,679 INFO L470 AbstractCegarLoop]: Abstraction has 2002 states and 2529 transitions. [2021-10-28 23:34:13,679 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.0) internal successors, (116), 4 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:34:13,679 INFO L276 IsEmpty]: Start isEmpty. Operand 2002 states and 2529 transitions. [2021-10-28 23:34:13,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2021-10-28 23:34:13,683 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:34:13,683 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:34:13,684 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2021-10-28 23:34:13,684 INFO L402 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:34:13,684 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:34:13,685 INFO L85 PathProgramCache]: Analyzing trace with hash 458292102, now seen corresponding path program 1 times [2021-10-28 23:34:13,685 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:34:13,685 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [546989776] [2021-10-28 23:34:13,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:34:13,686 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:34:13,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:34:13,770 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:34:13,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:34:14,095 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:34:14,095 INFO L627 BasicCegarLoop]: Counterexample is feasible [2021-10-28 23:34:14,097 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,100 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,100 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,101 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,101 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,101 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,101 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,102 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,102 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,102 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,102 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,103 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,103 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,103 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,103 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,104 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,104 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,105 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,106 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,106 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,106 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,107 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,107 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:34:14,107 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2021-10-28 23:34:14,112 INFO L731 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:34:14,118 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-10-28 23:34:14,413 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.10 11:34:14 BoogieIcfgContainer [2021-10-28 23:34:14,413 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-10-28 23:34:14,414 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-28 23:34:14,414 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-28 23:34:14,414 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-28 23:34:14,415 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 11:33:19" (3/4) ... [2021-10-28 23:34:14,417 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-10-28 23:34:14,718 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/witness.graphml [2021-10-28 23:34:14,720 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-28 23:34:14,722 INFO L168 Benchmark]: Toolchain (without parser) took 58065.61 ms. Allocated memory was 90.2 MB in the beginning and 1.1 GB in the end (delta: 1.1 GB). Free memory was 55.8 MB in the beginning and 959.2 MB in the end (delta: -903.4 MB). Peak memory consumption was 155.9 MB. Max. memory is 16.1 GB. [2021-10-28 23:34:14,722 INFO L168 Benchmark]: CDTParser took 0.34 ms. Allocated memory is still 90.2 MB. Free memory was 63.8 MB in the beginning and 63.8 MB in the end (delta: 27.3 kB). There was no memory consumed. Max. memory is 16.1 GB. [2021-10-28 23:34:14,723 INFO L168 Benchmark]: CACSL2BoogieTranslator took 711.93 ms. Allocated memory was 90.2 MB in the beginning and 123.7 MB in the end (delta: 33.6 MB). Free memory was 55.7 MB in the beginning and 92.0 MB in the end (delta: -36.3 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. [2021-10-28 23:34:14,724 INFO L168 Benchmark]: Boogie Procedure Inliner took 107.43 ms. Allocated memory is still 123.7 MB. Free memory was 92.0 MB in the beginning and 87.2 MB in the end (delta: 4.8 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-10-28 23:34:14,724 INFO L168 Benchmark]: Boogie Preprocessor took 110.95 ms. Allocated memory is still 123.7 MB. Free memory was 87.2 MB in the beginning and 84.3 MB in the end (delta: 2.9 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 23:34:14,725 INFO L168 Benchmark]: RCFGBuilder took 1553.09 ms. Allocated memory is still 123.7 MB. Free memory was 83.7 MB in the beginning and 46.5 MB in the end (delta: 37.1 MB). Peak memory consumption was 35.7 MB. Max. memory is 16.1 GB. [2021-10-28 23:34:14,725 INFO L168 Benchmark]: TraceAbstraction took 55264.85 ms. Allocated memory was 123.7 MB in the beginning and 1.1 GB in the end (delta: 1.0 GB). Free memory was 45.9 MB in the beginning and 1.0 GB in the end (delta: -958.6 MB). Peak memory consumption was 674.6 MB. Max. memory is 16.1 GB. [2021-10-28 23:34:14,726 INFO L168 Benchmark]: Witness Printer took 306.05 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 959.2 MB in the end (delta: 45.3 MB). Peak memory consumption was 46.1 MB. Max. memory is 16.1 GB. [2021-10-28 23:34:14,733 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.34 ms. Allocated memory is still 90.2 MB. Free memory was 63.8 MB in the beginning and 63.8 MB in the end (delta: 27.3 kB). There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 711.93 ms. Allocated memory was 90.2 MB in the beginning and 123.7 MB in the end (delta: 33.6 MB). Free memory was 55.7 MB in the beginning and 92.0 MB in the end (delta: -36.3 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 107.43 ms. Allocated memory is still 123.7 MB. Free memory was 92.0 MB in the beginning and 87.2 MB in the end (delta: 4.8 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 110.95 ms. Allocated memory is still 123.7 MB. Free memory was 87.2 MB in the beginning and 84.3 MB in the end (delta: 2.9 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 1553.09 ms. Allocated memory is still 123.7 MB. Free memory was 83.7 MB in the beginning and 46.5 MB in the end (delta: 37.1 MB). Peak memory consumption was 35.7 MB. Max. memory is 16.1 GB. * TraceAbstraction took 55264.85 ms. Allocated memory was 123.7 MB in the beginning and 1.1 GB in the end (delta: 1.0 GB). Free memory was 45.9 MB in the beginning and 1.0 GB in the end (delta: -958.6 MB). Peak memory consumption was 674.6 MB. Max. memory is 16.1 GB. * Witness Printer took 306.05 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 959.2 MB in the end (delta: 45.3 MB). Peak memory consumption was 46.1 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 610]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L534] int c1 ; [L535] int i2 ; [L538] c1 = 0 [L539] side1Failed = __VERIFIER_nondet_bool() [L540] side2Failed = __VERIFIER_nondet_bool() [L541] side1_written = __VERIFIER_nondet_char() [L542] side2_written = __VERIFIER_nondet_char() [L543] side1Failed_History_0 = __VERIFIER_nondet_bool() [L544] side1Failed_History_1 = __VERIFIER_nondet_bool() [L545] side1Failed_History_2 = __VERIFIER_nondet_bool() [L546] side2Failed_History_0 = __VERIFIER_nondet_bool() [L547] side2Failed_History_1 = __VERIFIER_nondet_bool() [L548] side2Failed_History_2 = __VERIFIER_nondet_bool() [L549] active_side_History_0 = __VERIFIER_nondet_char() [L550] active_side_History_1 = __VERIFIER_nondet_char() [L551] active_side_History_2 = __VERIFIER_nondet_char() [L552] manual_selection_History_0 = __VERIFIER_nondet_char() [L553] manual_selection_History_1 = __VERIFIER_nondet_char() [L554] manual_selection_History_2 = __VERIFIER_nondet_char() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L555] i2 = init() [L58] COND FALSE !(!cond) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L557] cs1_old = nomsg [L558] cs1_new = nomsg [L559] cs2_old = nomsg [L560] cs2_new = nomsg [L561] s1s2_old = nomsg [L562] s1s2_new = nomsg [L563] s1s1_old = nomsg [L564] s1s1_new = nomsg [L565] s2s1_old = nomsg [L566] s2s1_new = nomsg [L567] s2s2_old = nomsg [L568] s2s2_new = nomsg [L569] s1p_old = nomsg [L570] s1p_new = nomsg [L571] s2p_old = nomsg [L572] s2p_new = nomsg [L573] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L574] COND TRUE 1 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND TRUE \read(side1Failed) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L580] cs1_old = cs1_new [L581] cs1_new = nomsg [L582] cs2_old = cs2_new [L583] cs2_new = nomsg [L584] s1s2_old = s1s2_new [L585] s1s2_new = nomsg [L586] s1s1_old = s1s1_new [L587] s1s1_new = nomsg [L588] s2s1_old = s2s1_new [L589] s2s1_new = nomsg [L590] s2s2_old = s2s2_new [L591] s2s2_new = nomsg [L592] s1p_old = s1p_new [L593] s1p_new = nomsg [L594] s2p_old = s2p_new [L595] s2p_new = nomsg [L415] int tmp ; [L416] msg_t tmp___0 ; [L417] _Bool tmp___1 ; [L418] _Bool tmp___2 ; [L419] _Bool tmp___3 ; [L420] _Bool tmp___4 ; [L421] int8_t tmp___5 ; [L422] _Bool tmp___6 ; [L423] _Bool tmp___7 ; [L424] _Bool tmp___8 ; [L425] int8_t tmp___9 ; [L426] _Bool tmp___10 ; [L427] _Bool tmp___11 ; [L428] _Bool tmp___12 ; [L429] msg_t tmp___13 ; [L430] _Bool tmp___14 ; [L431] _Bool tmp___15 ; [L432] _Bool tmp___16 ; [L433] _Bool tmp___17 ; [L434] int8_t tmp___18 ; [L435] int8_t tmp___19 ; [L436] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L439] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L442] COND TRUE ! side2Failed [L443] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L448] tmp___0 = read_manual_selection_history((unsigned char)1) [L449] COND TRUE ! tmp___0 [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] tmp___1 = read_side1_failed_history((unsigned char)1) [L451] COND TRUE ! tmp___1 [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L452] tmp___2 = read_side1_failed_history((unsigned char)0) [L453] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L478] tmp___7 = read_side1_failed_history((unsigned char)1) [L479] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L494] tmp___11 = read_side1_failed_history((unsigned char)1) [L495] COND TRUE ! tmp___11 [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L496] tmp___12 = read_side2_failed_history((unsigned char)1) [L497] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L148] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L151] COND FALSE !((int )index == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L154] COND TRUE (int )index == 2 [L155] return (active_side_History_2); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L510] tmp___20 = read_active_side_history((unsigned char)2) [L511] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L529] return (1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L596] c1 = check() [L608] COND FALSE !(! arg) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L574] COND TRUE 1 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND FALSE !(\read(side1Failed)) [L284] side1 = s1s1_old [L285] s1s1_old = nomsg [L286] side2 = s2s1_old [L287] s2s1_old = nomsg [L288] manual_selection = cs1_old [L289] cs1_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L290] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L293] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L294] COND TRUE (int )side2 != (int )nomsg [L295] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L314] EXPR next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L314] s1s1_new = next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new [L315] EXPR next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L315] s1s2_new = next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new [L316] EXPR next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L316] s1p_new = next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new [L317] side1_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND TRUE \read(side2Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L335] EXPR nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L335] s2s1_new = nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new [L336] EXPR nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L336] s2s2_new = nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new [L337] EXPR nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L337] s2p_new = nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new [L338] side2_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-1, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L580] cs1_old = cs1_new [L581] cs1_new = nomsg [L582] cs2_old = cs2_new [L583] cs2_new = nomsg [L584] s1s2_old = s1s2_new [L585] s1s2_new = nomsg [L586] s1s1_old = s1s1_new [L587] s1s1_new = nomsg [L588] s2s1_old = s2s1_new [L589] s2s1_new = nomsg [L590] s2s2_old = s2s2_new [L591] s2s2_new = nomsg [L592] s1p_old = s1p_new [L593] s1p_new = nomsg [L594] s2p_old = s2p_new [L595] s2p_new = nomsg [L415] int tmp ; [L416] msg_t tmp___0 ; [L417] _Bool tmp___1 ; [L418] _Bool tmp___2 ; [L419] _Bool tmp___3 ; [L420] _Bool tmp___4 ; [L421] int8_t tmp___5 ; [L422] _Bool tmp___6 ; [L423] _Bool tmp___7 ; [L424] _Bool tmp___8 ; [L425] int8_t tmp___9 ; [L426] _Bool tmp___10 ; [L427] _Bool tmp___11 ; [L428] _Bool tmp___12 ; [L429] msg_t tmp___13 ; [L430] _Bool tmp___14 ; [L431] _Bool tmp___15 ; [L432] _Bool tmp___16 ; [L433] _Bool tmp___17 ; [L434] int8_t tmp___18 ; [L435] int8_t tmp___19 ; [L436] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L439] COND TRUE ! side1Failed [L440] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L448] tmp___0 = read_manual_selection_history((unsigned char)1) [L449] COND FALSE !(! tmp___0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L478] tmp___7 = read_side1_failed_history((unsigned char)1) [L479] COND TRUE \read(tmp___7) [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L480] tmp___8 = read_side2_failed_history((unsigned char)1) [L481] COND TRUE ! tmp___8 [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L482] tmp___5 = read_active_side_history((unsigned char)0) [L483] COND TRUE ! ((int )tmp___5 == 2) [L484] return (0); VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L596] c1 = check() [L608] COND TRUE ! arg VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] [L610] reach_error() VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=-1, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0] - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 610]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 294 locations, 23 error locations. Started 1 CEGAR loops. OverallTime: 54.8s, OverallIterations: 38, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 33.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 16987 SDtfs, 37945 SDslu, 44510 SDs, 0 SdLazy, 7949 SolverSat, 561 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 6.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1360 GetRequests, 854 SyntacticMatches, 5 SemanticMatches, 501 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29934 ImplicationChecksByTransitivity, 9.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=2668occurred in iteration=30, InterpolantAutomatonStates: 514, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 7.5s AutomataMinimizationTime, 37 MinimizatonAttempts, 45531 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.5s SsaConstructionTime, 2.3s SatisfiabilityAnalysisTime, 7.4s InterpolantComputationTime, 3987 NumberOfCodeBlocks, 3987 NumberOfCodeBlocksAsserted, 43 NumberOfCheckSat, 3804 ConstructedInterpolants, 0 QuantifiedInterpolants, 13153 SizeOfPredicates, 30 NumberOfNonLiveVariables, 3812 ConjunctsInSsa, 82 ConjunctsInUnsatCore, 42 InterpolantComputations, 33 PerfectInterpolantSequences, 454/621 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-10-28 23:34:14,815 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_ddcaa9d6-70fd-4225-9648-4183aa9e7a11/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...