./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version b2eff8ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash cdd691469d2e12c2dd1871c48be4dd2db0b9d27541ac5dee5ff25a04db0d98eb ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.1-dev-b2eff8b [2021-10-28 23:32:21,529 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-28 23:32:21,531 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-28 23:32:21,566 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-28 23:32:21,567 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-28 23:32:21,568 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-28 23:32:21,570 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-28 23:32:21,573 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-28 23:32:21,575 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-28 23:32:21,576 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-28 23:32:21,578 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-28 23:32:21,580 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-28 23:32:21,582 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-28 23:32:21,586 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-28 23:32:21,588 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-28 23:32:21,591 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-28 23:32:21,594 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-28 23:32:21,599 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-28 23:32:21,602 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-28 23:32:21,606 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-28 23:32:21,611 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-28 23:32:21,612 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-28 23:32:21,616 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-28 23:32:21,617 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-28 23:32:21,625 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-28 23:32:21,626 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-28 23:32:21,626 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-28 23:32:21,628 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-28 23:32:21,629 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-28 23:32:21,630 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-28 23:32:21,631 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-28 23:32:21,633 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-28 23:32:21,635 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-28 23:32:21,636 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-28 23:32:21,638 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-28 23:32:21,638 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-28 23:32:21,639 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-28 23:32:21,639 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-28 23:32:21,639 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-28 23:32:21,640 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-28 23:32:21,641 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-28 23:32:21,642 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/config/svcomp-Reach-32bit-Automizer_Default.epf [2021-10-28 23:32:21,688 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-28 23:32:21,688 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-28 23:32:21,689 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-28 23:32:21,689 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-28 23:32:21,690 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-28 23:32:21,691 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-28 23:32:21,691 INFO L138 SettingsManager]: * Use SBE=true [2021-10-28 23:32:21,691 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-28 23:32:21,692 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-28 23:32:21,692 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-28 23:32:21,693 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-28 23:32:21,693 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-28 23:32:21,694 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-10-28 23:32:21,694 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-10-28 23:32:21,694 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-10-28 23:32:21,694 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-28 23:32:21,694 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-28 23:32:21,695 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-28 23:32:21,695 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-10-28 23:32:21,695 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-28 23:32:21,695 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-28 23:32:21,696 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-10-28 23:32:21,696 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-28 23:32:21,696 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-28 23:32:21,696 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-10-28 23:32:21,696 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-10-28 23:32:21,697 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-28 23:32:21,697 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-10-28 23:32:21,697 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-10-28 23:32:21,699 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2021-10-28 23:32:21,699 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-10-28 23:32:21,700 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-28 23:32:21,700 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> cdd691469d2e12c2dd1871c48be4dd2db0b9d27541ac5dee5ff25a04db0d98eb [2021-10-28 23:32:21,988 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-28 23:32:22,009 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-28 23:32:22,011 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-28 23:32:22,013 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-28 23:32:22,013 INFO L275 PluginConnector]: CDTParser initialized [2021-10-28 23:32:22,014 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c [2021-10-28 23:32:22,106 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/data/0b1305af8/a4960cd16053440aaed32e5b26899c3a/FLAG20b4725ad [2021-10-28 23:32:22,746 INFO L306 CDTParser]: Found 1 translation units. [2021-10-28 23:32:22,747 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c [2021-10-28 23:32:22,773 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/data/0b1305af8/a4960cd16053440aaed32e5b26899c3a/FLAG20b4725ad [2021-10-28 23:32:23,065 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/data/0b1305af8/a4960cd16053440aaed32e5b26899c3a [2021-10-28 23:32:23,068 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-28 23:32:23,069 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-28 23:32:23,074 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-28 23:32:23,075 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-28 23:32:23,079 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-28 23:32:23,080 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 11:32:23" (1/1) ... [2021-10-28 23:32:23,081 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4c8a8907 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:32:23, skipping insertion in model container [2021-10-28 23:32:23,082 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 11:32:23" (1/1) ... [2021-10-28 23:32:23,090 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-28 23:32:23,138 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-28 23:32:23,440 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c[14702,14715] [2021-10-28 23:32:23,447 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 23:32:23,462 INFO L203 MainTranslator]: Completed pre-run [2021-10-28 23:32:23,556 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c[14702,14715] [2021-10-28 23:32:23,557 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 23:32:23,576 INFO L208 MainTranslator]: Completed translation [2021-10-28 23:32:23,577 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:32:23 WrapperNode [2021-10-28 23:32:23,577 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-28 23:32:23,579 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-28 23:32:23,579 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-28 23:32:23,579 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-28 23:32:23,588 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:32:23" (1/1) ... [2021-10-28 23:32:23,619 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:32:23" (1/1) ... [2021-10-28 23:32:23,701 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-28 23:32:23,702 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-28 23:32:23,702 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-28 23:32:23,703 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-28 23:32:23,710 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:32:23" (1/1) ... [2021-10-28 23:32:23,710 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:32:23" (1/1) ... [2021-10-28 23:32:23,720 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:32:23" (1/1) ... [2021-10-28 23:32:23,721 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:32:23" (1/1) ... [2021-10-28 23:32:23,744 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:32:23" (1/1) ... [2021-10-28 23:32:23,758 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:32:23" (1/1) ... [2021-10-28 23:32:23,764 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:32:23" (1/1) ... [2021-10-28 23:32:23,774 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-28 23:32:23,775 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-28 23:32:23,775 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-28 23:32:23,776 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-28 23:32:23,777 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:32:23" (1/1) ... [2021-10-28 23:32:23,786 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-28 23:32:23,801 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:32:23,823 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-10-28 23:32:23,887 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-10-28 23:32:23,914 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-28 23:32:23,914 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-28 23:32:23,914 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-28 23:32:23,915 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-28 23:32:24,940 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-28 23:32:24,940 INFO L299 CfgBuilder]: Removed 123 assume(true) statements. [2021-10-28 23:32:24,943 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 11:32:24 BoogieIcfgContainer [2021-10-28 23:32:24,943 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-28 23:32:24,945 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-10-28 23:32:24,945 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-10-28 23:32:24,949 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-10-28 23:32:24,950 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.10 11:32:23" (1/3) ... [2021-10-28 23:32:24,950 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7f6a8175 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.10 11:32:24, skipping insertion in model container [2021-10-28 23:32:24,951 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:32:23" (2/3) ... [2021-10-28 23:32:24,951 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7f6a8175 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.10 11:32:24, skipping insertion in model container [2021-10-28 23:32:24,951 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 11:32:24" (3/3) ... [2021-10-28 23:32:24,953 INFO L111 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_2.ufo.BOUNDED-10.pals.c [2021-10-28 23:32:24,959 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-10-28 23:32:24,959 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 23 error locations. [2021-10-28 23:32:25,014 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-10-28 23:32:25,021 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-10-28 23:32:25,022 INFO L340 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2021-10-28 23:32:25,047 INFO L276 IsEmpty]: Start isEmpty. Operand has 297 states, 273 states have (on average 1.7032967032967032) internal successors, (465), 296 states have internal predecessors, (465), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:25,055 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-28 23:32:25,055 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:25,056 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:25,057 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:25,063 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:25,063 INFO L85 PathProgramCache]: Analyzing trace with hash 349506240, now seen corresponding path program 1 times [2021-10-28 23:32:25,074 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:25,074 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [778990000] [2021-10-28 23:32:25,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:25,076 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:25,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:25,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:25,357 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:25,357 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [778990000] [2021-10-28 23:32:25,358 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [778990000] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:25,358 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:25,359 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-28 23:32:25,361 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1282756986] [2021-10-28 23:32:25,367 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2021-10-28 23:32:25,368 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:25,386 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-10-28 23:32:25,388 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-28 23:32:25,393 INFO L87 Difference]: Start difference. First operand has 297 states, 273 states have (on average 1.7032967032967032) internal successors, (465), 296 states have internal predecessors, (465), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:25,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:25,477 INFO L93 Difference]: Finished difference Result 578 states and 901 transitions. [2021-10-28 23:32:25,478 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-10-28 23:32:25,479 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-28 23:32:25,480 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:25,505 INFO L225 Difference]: With dead ends: 578 [2021-10-28 23:32:25,505 INFO L226 Difference]: Without dead ends: 293 [2021-10-28 23:32:25,515 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-28 23:32:25,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 293 states. [2021-10-28 23:32:25,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 293 to 293. [2021-10-28 23:32:25,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 293 states, 270 states have (on average 1.5888888888888888) internal successors, (429), 292 states have internal predecessors, (429), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:25,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 293 states to 293 states and 429 transitions. [2021-10-28 23:32:25,610 INFO L78 Accepts]: Start accepts. Automaton has 293 states and 429 transitions. Word has length 33 [2021-10-28 23:32:25,610 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:25,611 INFO L470 AbstractCegarLoop]: Abstraction has 293 states and 429 transitions. [2021-10-28 23:32:25,612 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:25,612 INFO L276 IsEmpty]: Start isEmpty. Operand 293 states and 429 transitions. [2021-10-28 23:32:25,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-28 23:32:25,615 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:25,615 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:25,615 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-10-28 23:32:25,616 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:25,621 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:25,621 INFO L85 PathProgramCache]: Analyzing trace with hash -1047215368, now seen corresponding path program 1 times [2021-10-28 23:32:25,621 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:25,622 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [696212801] [2021-10-28 23:32:25,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:25,623 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:25,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:25,816 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:25,817 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:25,817 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [696212801] [2021-10-28 23:32:25,817 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [696212801] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:25,818 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:25,818 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:32:25,818 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1280464656] [2021-10-28 23:32:25,820 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:32:25,820 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:25,821 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:32:25,821 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:32:25,822 INFO L87 Difference]: Start difference. First operand 293 states and 429 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:25,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:25,890 INFO L93 Difference]: Finished difference Result 572 states and 832 transitions. [2021-10-28 23:32:25,893 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 23:32:25,893 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-28 23:32:25,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:25,898 INFO L225 Difference]: With dead ends: 572 [2021-10-28 23:32:25,898 INFO L226 Difference]: Without dead ends: 293 [2021-10-28 23:32:25,900 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:32:25,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 293 states. [2021-10-28 23:32:25,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 293 to 293. [2021-10-28 23:32:25,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 293 states, 270 states have (on average 1.5444444444444445) internal successors, (417), 292 states have internal predecessors, (417), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:25,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 293 states to 293 states and 417 transitions. [2021-10-28 23:32:25,914 INFO L78 Accepts]: Start accepts. Automaton has 293 states and 417 transitions. Word has length 33 [2021-10-28 23:32:25,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:25,915 INFO L470 AbstractCegarLoop]: Abstraction has 293 states and 417 transitions. [2021-10-28 23:32:25,919 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:25,923 INFO L276 IsEmpty]: Start isEmpty. Operand 293 states and 417 transitions. [2021-10-28 23:32:25,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2021-10-28 23:32:25,925 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:25,926 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:25,926 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-10-28 23:32:25,926 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:25,927 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:25,927 INFO L85 PathProgramCache]: Analyzing trace with hash -600938825, now seen corresponding path program 1 times [2021-10-28 23:32:25,927 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:25,928 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1264035346] [2021-10-28 23:32:25,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:25,928 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:26,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:26,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:26,145 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:26,146 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1264035346] [2021-10-28 23:32:26,153 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1264035346] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:26,154 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:26,155 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:32:26,156 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1721822577] [2021-10-28 23:32:26,156 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:32:26,157 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:26,159 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:32:26,160 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:32:26,161 INFO L87 Difference]: Start difference. First operand 293 states and 417 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:26,248 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:26,249 INFO L93 Difference]: Finished difference Result 603 states and 867 transitions. [2021-10-28 23:32:26,249 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:32:26,250 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2021-10-28 23:32:26,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:26,253 INFO L225 Difference]: With dead ends: 603 [2021-10-28 23:32:26,254 INFO L226 Difference]: Without dead ends: 327 [2021-10-28 23:32:26,255 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:32:26,257 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 327 states. [2021-10-28 23:32:26,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 327 to 269. [2021-10-28 23:32:26,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 269 states, 250 states have (on average 1.524) internal successors, (381), 268 states have internal predecessors, (381), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:26,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 269 states and 381 transitions. [2021-10-28 23:32:26,288 INFO L78 Accepts]: Start accepts. Automaton has 269 states and 381 transitions. Word has length 44 [2021-10-28 23:32:26,289 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:26,289 INFO L470 AbstractCegarLoop]: Abstraction has 269 states and 381 transitions. [2021-10-28 23:32:26,289 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:26,290 INFO L276 IsEmpty]: Start isEmpty. Operand 269 states and 381 transitions. [2021-10-28 23:32:26,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-10-28 23:32:26,295 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:26,295 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:26,295 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-10-28 23:32:26,296 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:26,297 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:26,297 INFO L85 PathProgramCache]: Analyzing trace with hash -1585020226, now seen corresponding path program 1 times [2021-10-28 23:32:26,297 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:26,298 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [84673191] [2021-10-28 23:32:26,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:26,299 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:26,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:26,486 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:26,487 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:26,487 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [84673191] [2021-10-28 23:32:26,488 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [84673191] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:26,489 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:26,489 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:32:26,489 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1708796158] [2021-10-28 23:32:26,491 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:32:26,491 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:26,492 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:32:26,492 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:32:26,493 INFO L87 Difference]: Start difference. First operand 269 states and 381 transitions. Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:26,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:26,566 INFO L93 Difference]: Finished difference Result 750 states and 1074 transitions. [2021-10-28 23:32:26,567 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:32:26,567 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 53 [2021-10-28 23:32:26,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:26,574 INFO L225 Difference]: With dead ends: 750 [2021-10-28 23:32:26,574 INFO L226 Difference]: Without dead ends: 498 [2021-10-28 23:32:26,578 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:32:26,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 498 states. [2021-10-28 23:32:26,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 498 to 304. [2021-10-28 23:32:26,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 304 states, 285 states have (on average 1.5192982456140351) internal successors, (433), 303 states have internal predecessors, (433), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:26,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 304 states to 304 states and 433 transitions. [2021-10-28 23:32:26,606 INFO L78 Accepts]: Start accepts. Automaton has 304 states and 433 transitions. Word has length 53 [2021-10-28 23:32:26,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:26,609 INFO L470 AbstractCegarLoop]: Abstraction has 304 states and 433 transitions. [2021-10-28 23:32:26,609 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:26,610 INFO L276 IsEmpty]: Start isEmpty. Operand 304 states and 433 transitions. [2021-10-28 23:32:26,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-28 23:32:26,618 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:26,619 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:26,619 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-10-28 23:32:26,619 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:26,621 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:26,621 INFO L85 PathProgramCache]: Analyzing trace with hash -1396202520, now seen corresponding path program 1 times [2021-10-28 23:32:26,622 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:26,623 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [86980100] [2021-10-28 23:32:26,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:26,623 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:26,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:26,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:26,734 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:26,735 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [86980100] [2021-10-28 23:32:26,735 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [86980100] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:26,735 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:26,735 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:32:26,736 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1856186868] [2021-10-28 23:32:26,736 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:32:26,737 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:26,737 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:32:26,737 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:32:26,738 INFO L87 Difference]: Start difference. First operand 304 states and 433 transitions. Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:26,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:26,778 INFO L93 Difference]: Finished difference Result 834 states and 1199 transitions. [2021-10-28 23:32:26,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:32:26,779 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-28 23:32:26,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:26,783 INFO L225 Difference]: With dead ends: 834 [2021-10-28 23:32:26,783 INFO L226 Difference]: Without dead ends: 547 [2021-10-28 23:32:26,784 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:32:26,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 547 states. [2021-10-28 23:32:26,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 547 to 329. [2021-10-28 23:32:26,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 329 states, 310 states have (on average 1.5193548387096774) internal successors, (471), 328 states have internal predecessors, (471), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:26,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 471 transitions. [2021-10-28 23:32:26,802 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 471 transitions. Word has length 54 [2021-10-28 23:32:26,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:26,803 INFO L470 AbstractCegarLoop]: Abstraction has 329 states and 471 transitions. [2021-10-28 23:32:26,803 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:26,803 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 471 transitions. [2021-10-28 23:32:26,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-28 23:32:26,805 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:26,805 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:26,805 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-10-28 23:32:26,806 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:26,806 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:26,807 INFO L85 PathProgramCache]: Analyzing trace with hash -716144150, now seen corresponding path program 1 times [2021-10-28 23:32:26,807 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:26,807 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [69436813] [2021-10-28 23:32:26,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:26,808 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:26,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:26,940 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:26,940 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:26,940 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [69436813] [2021-10-28 23:32:26,941 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [69436813] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:26,941 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:26,941 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:32:26,943 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [148613424] [2021-10-28 23:32:26,948 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 23:32:26,949 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:26,950 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 23:32:26,950 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:32:26,950 INFO L87 Difference]: Start difference. First operand 329 states and 471 transitions. Second operand has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:27,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:27,226 INFO L93 Difference]: Finished difference Result 1023 states and 1476 transitions. [2021-10-28 23:32:27,226 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 23:32:27,227 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-28 23:32:27,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:27,232 INFO L225 Difference]: With dead ends: 1023 [2021-10-28 23:32:27,232 INFO L226 Difference]: Without dead ends: 711 [2021-10-28 23:32:27,234 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-28 23:32:27,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 711 states. [2021-10-28 23:32:27,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 711 to 427. [2021-10-28 23:32:27,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 427 states, 408 states have (on average 1.4901960784313726) internal successors, (608), 426 states have internal predecessors, (608), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:27,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 427 states to 427 states and 608 transitions. [2021-10-28 23:32:27,263 INFO L78 Accepts]: Start accepts. Automaton has 427 states and 608 transitions. Word has length 54 [2021-10-28 23:32:27,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:27,264 INFO L470 AbstractCegarLoop]: Abstraction has 427 states and 608 transitions. [2021-10-28 23:32:27,264 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:27,264 INFO L276 IsEmpty]: Start isEmpty. Operand 427 states and 608 transitions. [2021-10-28 23:32:27,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2021-10-28 23:32:27,266 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:27,266 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:27,266 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-10-28 23:32:27,266 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:27,267 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:27,267 INFO L85 PathProgramCache]: Analyzing trace with hash 153208358, now seen corresponding path program 1 times [2021-10-28 23:32:27,267 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:27,268 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2126525086] [2021-10-28 23:32:27,268 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:27,268 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:27,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:27,381 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:27,381 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:27,382 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2126525086] [2021-10-28 23:32:27,382 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2126525086] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:27,382 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:27,382 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:32:27,382 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1011434027] [2021-10-28 23:32:27,383 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 23:32:27,384 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:27,384 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 23:32:27,384 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:32:27,385 INFO L87 Difference]: Start difference. First operand 427 states and 608 transitions. Second operand has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:27,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:27,603 INFO L93 Difference]: Finished difference Result 1027 states and 1476 transitions. [2021-10-28 23:32:27,603 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 23:32:27,604 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 55 [2021-10-28 23:32:27,604 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:27,609 INFO L225 Difference]: With dead ends: 1027 [2021-10-28 23:32:27,610 INFO L226 Difference]: Without dead ends: 715 [2021-10-28 23:32:27,611 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-28 23:32:27,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 715 states. [2021-10-28 23:32:27,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 715 to 435. [2021-10-28 23:32:27,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 435 states, 416 states have (on average 1.4807692307692308) internal successors, (616), 434 states have internal predecessors, (616), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:27,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 435 states to 435 states and 616 transitions. [2021-10-28 23:32:27,664 INFO L78 Accepts]: Start accepts. Automaton has 435 states and 616 transitions. Word has length 55 [2021-10-28 23:32:27,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:27,666 INFO L470 AbstractCegarLoop]: Abstraction has 435 states and 616 transitions. [2021-10-28 23:32:27,667 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:27,667 INFO L276 IsEmpty]: Start isEmpty. Operand 435 states and 616 transitions. [2021-10-28 23:32:27,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2021-10-28 23:32:27,668 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:27,668 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:27,668 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-10-28 23:32:27,669 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:27,669 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:27,669 INFO L85 PathProgramCache]: Analyzing trace with hash -748848364, now seen corresponding path program 1 times [2021-10-28 23:32:27,670 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:27,670 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2056259778] [2021-10-28 23:32:27,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:27,671 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:27,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:27,798 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:27,799 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:27,799 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2056259778] [2021-10-28 23:32:27,799 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2056259778] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:27,800 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:27,800 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:32:27,801 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2101591563] [2021-10-28 23:32:27,802 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:32:27,802 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:27,803 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:32:27,803 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:32:27,803 INFO L87 Difference]: Start difference. First operand 435 states and 616 transitions. Second operand has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:28,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:28,040 INFO L93 Difference]: Finished difference Result 1027 states and 1468 transitions. [2021-10-28 23:32:28,041 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:32:28,041 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 57 [2021-10-28 23:32:28,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:28,048 INFO L225 Difference]: With dead ends: 1027 [2021-10-28 23:32:28,048 INFO L226 Difference]: Without dead ends: 715 [2021-10-28 23:32:28,050 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:32:28,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 715 states. [2021-10-28 23:32:28,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 715 to 435. [2021-10-28 23:32:28,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 435 states, 416 states have (on average 1.4711538461538463) internal successors, (612), 434 states have internal predecessors, (612), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:28,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 435 states to 435 states and 612 transitions. [2021-10-28 23:32:28,086 INFO L78 Accepts]: Start accepts. Automaton has 435 states and 612 transitions. Word has length 57 [2021-10-28 23:32:28,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:28,088 INFO L470 AbstractCegarLoop]: Abstraction has 435 states and 612 transitions. [2021-10-28 23:32:28,088 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:28,088 INFO L276 IsEmpty]: Start isEmpty. Operand 435 states and 612 transitions. [2021-10-28 23:32:28,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2021-10-28 23:32:28,090 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:28,091 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:28,091 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-10-28 23:32:28,091 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:28,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:28,092 INFO L85 PathProgramCache]: Analyzing trace with hash 2035065116, now seen corresponding path program 1 times [2021-10-28 23:32:28,092 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:28,093 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2028060252] [2021-10-28 23:32:28,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:28,093 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:28,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:28,230 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:28,231 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:28,231 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2028060252] [2021-10-28 23:32:28,231 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2028060252] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:28,231 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:28,232 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:32:28,232 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [232896797] [2021-10-28 23:32:28,232 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:32:28,233 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:28,233 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:32:28,234 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:32:28,234 INFO L87 Difference]: Start difference. First operand 435 states and 612 transitions. Second operand has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:28,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:28,287 INFO L93 Difference]: Finished difference Result 875 states and 1255 transitions. [2021-10-28 23:32:28,287 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:32:28,288 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 58 [2021-10-28 23:32:28,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:28,292 INFO L225 Difference]: With dead ends: 875 [2021-10-28 23:32:28,293 INFO L226 Difference]: Without dead ends: 563 [2021-10-28 23:32:28,296 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:32:28,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 563 states. [2021-10-28 23:32:28,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 563 to 430. [2021-10-28 23:32:28,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 430 states, 412 states have (on average 1.4660194174757282) internal successors, (604), 429 states have internal predecessors, (604), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:28,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 430 states to 430 states and 604 transitions. [2021-10-28 23:32:28,353 INFO L78 Accepts]: Start accepts. Automaton has 430 states and 604 transitions. Word has length 58 [2021-10-28 23:32:28,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:28,357 INFO L470 AbstractCegarLoop]: Abstraction has 430 states and 604 transitions. [2021-10-28 23:32:28,357 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:28,357 INFO L276 IsEmpty]: Start isEmpty. Operand 430 states and 604 transitions. [2021-10-28 23:32:28,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2021-10-28 23:32:28,358 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:28,358 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:28,359 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-10-28 23:32:28,359 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:28,360 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:28,360 INFO L85 PathProgramCache]: Analyzing trace with hash -1833641356, now seen corresponding path program 1 times [2021-10-28 23:32:28,360 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:28,362 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [349204538] [2021-10-28 23:32:28,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:28,362 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:28,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:28,470 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:28,470 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:28,470 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [349204538] [2021-10-28 23:32:28,471 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [349204538] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:28,471 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:28,471 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:32:28,471 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [62552023] [2021-10-28 23:32:28,472 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:32:28,472 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:28,473 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:32:28,473 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:32:28,473 INFO L87 Difference]: Start difference. First operand 430 states and 604 transitions. Second operand has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:28,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:28,560 INFO L93 Difference]: Finished difference Result 874 states and 1254 transitions. [2021-10-28 23:32:28,561 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:32:28,561 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 62 [2021-10-28 23:32:28,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:28,565 INFO L225 Difference]: With dead ends: 874 [2021-10-28 23:32:28,565 INFO L226 Difference]: Without dead ends: 567 [2021-10-28 23:32:28,566 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:32:28,567 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 567 states. [2021-10-28 23:32:28,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 567 to 410. [2021-10-28 23:32:28,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 410 states, 396 states have (on average 1.4444444444444444) internal successors, (572), 409 states have internal predecessors, (572), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:28,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 410 states to 410 states and 572 transitions. [2021-10-28 23:32:28,599 INFO L78 Accepts]: Start accepts. Automaton has 410 states and 572 transitions. Word has length 62 [2021-10-28 23:32:28,599 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:28,600 INFO L470 AbstractCegarLoop]: Abstraction has 410 states and 572 transitions. [2021-10-28 23:32:28,600 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:28,600 INFO L276 IsEmpty]: Start isEmpty. Operand 410 states and 572 transitions. [2021-10-28 23:32:28,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2021-10-28 23:32:28,601 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:28,601 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:28,602 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-10-28 23:32:28,602 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:28,602 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:28,603 INFO L85 PathProgramCache]: Analyzing trace with hash -532758708, now seen corresponding path program 1 times [2021-10-28 23:32:28,603 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:28,605 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1233110909] [2021-10-28 23:32:28,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:28,606 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:28,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:28,684 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:28,684 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:28,685 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1233110909] [2021-10-28 23:32:28,685 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1233110909] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:28,685 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:28,685 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:32:28,685 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [331326270] [2021-10-28 23:32:28,686 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:32:28,686 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:28,688 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:32:28,688 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:32:28,689 INFO L87 Difference]: Start difference. First operand 410 states and 572 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:28,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:28,766 INFO L93 Difference]: Finished difference Result 842 states and 1198 transitions. [2021-10-28 23:32:28,766 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:32:28,766 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2021-10-28 23:32:28,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:28,771 INFO L225 Difference]: With dead ends: 842 [2021-10-28 23:32:28,771 INFO L226 Difference]: Without dead ends: 555 [2021-10-28 23:32:28,772 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:32:28,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2021-10-28 23:32:28,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 398. [2021-10-28 23:32:28,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 398 states, 386 states have (on average 1.4352331606217616) internal successors, (554), 397 states have internal predecessors, (554), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:28,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 398 states to 398 states and 554 transitions. [2021-10-28 23:32:28,803 INFO L78 Accepts]: Start accepts. Automaton has 398 states and 554 transitions. Word has length 66 [2021-10-28 23:32:28,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:28,804 INFO L470 AbstractCegarLoop]: Abstraction has 398 states and 554 transitions. [2021-10-28 23:32:28,804 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:28,805 INFO L276 IsEmpty]: Start isEmpty. Operand 398 states and 554 transitions. [2021-10-28 23:32:28,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-10-28 23:32:28,812 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:28,812 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:28,813 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-10-28 23:32:28,813 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:28,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:28,814 INFO L85 PathProgramCache]: Analyzing trace with hash 949999250, now seen corresponding path program 1 times [2021-10-28 23:32:28,814 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:28,814 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1052481157] [2021-10-28 23:32:28,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:28,815 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:28,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:28,920 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:28,921 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:28,921 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1052481157] [2021-10-28 23:32:28,921 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1052481157] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:28,921 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:28,922 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:32:28,922 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1506323163] [2021-10-28 23:32:28,922 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:32:28,923 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:28,923 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:32:28,923 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:32:28,924 INFO L87 Difference]: Start difference. First operand 398 states and 554 transitions. Second operand has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:29,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:29,012 INFO L93 Difference]: Finished difference Result 838 states and 1190 transitions. [2021-10-28 23:32:29,012 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:32:29,013 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 67 [2021-10-28 23:32:29,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:29,016 INFO L225 Difference]: With dead ends: 838 [2021-10-28 23:32:29,017 INFO L226 Difference]: Without dead ends: 563 [2021-10-28 23:32:29,017 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:32:29,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 563 states. [2021-10-28 23:32:29,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 563 to 378. [2021-10-28 23:32:29,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 378 states, 370 states have (on average 1.4108108108108108) internal successors, (522), 377 states have internal predecessors, (522), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:29,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 378 states to 378 states and 522 transitions. [2021-10-28 23:32:29,046 INFO L78 Accepts]: Start accepts. Automaton has 378 states and 522 transitions. Word has length 67 [2021-10-28 23:32:29,047 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:29,047 INFO L470 AbstractCegarLoop]: Abstraction has 378 states and 522 transitions. [2021-10-28 23:32:29,047 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:29,047 INFO L276 IsEmpty]: Start isEmpty. Operand 378 states and 522 transitions. [2021-10-28 23:32:29,048 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2021-10-28 23:32:29,049 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:29,049 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:29,049 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-10-28 23:32:29,049 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:29,050 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:29,050 INFO L85 PathProgramCache]: Analyzing trace with hash -448644128, now seen corresponding path program 1 times [2021-10-28 23:32:29,050 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:29,051 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1324347316] [2021-10-28 23:32:29,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:29,051 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:29,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:29,195 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:29,196 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:29,196 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1324347316] [2021-10-28 23:32:29,196 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1324347316] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:29,196 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:29,197 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:32:29,197 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1302847523] [2021-10-28 23:32:29,197 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:32:29,197 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:29,198 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:32:29,198 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:32:29,199 INFO L87 Difference]: Start difference. First operand 378 states and 522 transitions. Second operand has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:29,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:29,439 INFO L93 Difference]: Finished difference Result 1133 states and 1588 transitions. [2021-10-28 23:32:29,440 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 23:32:29,440 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 72 [2021-10-28 23:32:29,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:29,445 INFO L225 Difference]: With dead ends: 1133 [2021-10-28 23:32:29,446 INFO L226 Difference]: Without dead ends: 878 [2021-10-28 23:32:29,446 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-28 23:32:29,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 878 states. [2021-10-28 23:32:29,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 878 to 428. [2021-10-28 23:32:29,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 428 states, 420 states have (on average 1.4047619047619047) internal successors, (590), 427 states have internal predecessors, (590), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:29,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 428 states to 428 states and 590 transitions. [2021-10-28 23:32:29,488 INFO L78 Accepts]: Start accepts. Automaton has 428 states and 590 transitions. Word has length 72 [2021-10-28 23:32:29,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:29,488 INFO L470 AbstractCegarLoop]: Abstraction has 428 states and 590 transitions. [2021-10-28 23:32:29,489 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:29,489 INFO L276 IsEmpty]: Start isEmpty. Operand 428 states and 590 transitions. [2021-10-28 23:32:29,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2021-10-28 23:32:29,490 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:29,490 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:29,491 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-10-28 23:32:29,491 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:29,491 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:29,492 INFO L85 PathProgramCache]: Analyzing trace with hash 534764451, now seen corresponding path program 1 times [2021-10-28 23:32:29,492 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:29,492 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1153422399] [2021-10-28 23:32:29,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:29,492 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:29,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:29,576 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:29,576 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:29,576 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1153422399] [2021-10-28 23:32:29,576 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1153422399] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:29,577 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:29,577 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:32:29,577 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [969140528] [2021-10-28 23:32:29,577 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:32:29,578 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:29,578 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:32:29,578 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:32:29,579 INFO L87 Difference]: Start difference. First operand 428 states and 590 transitions. Second operand has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:29,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:29,646 INFO L93 Difference]: Finished difference Result 763 states and 1069 transitions. [2021-10-28 23:32:29,646 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:32:29,647 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 73 [2021-10-28 23:32:29,647 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:29,650 INFO L225 Difference]: With dead ends: 763 [2021-10-28 23:32:29,650 INFO L226 Difference]: Without dead ends: 508 [2021-10-28 23:32:29,651 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:32:29,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 508 states. [2021-10-28 23:32:29,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 508 to 424. [2021-10-28 23:32:29,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 424 states, 417 states have (on average 1.3980815347721822) internal successors, (583), 423 states have internal predecessors, (583), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:29,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 424 states to 424 states and 583 transitions. [2021-10-28 23:32:29,692 INFO L78 Accepts]: Start accepts. Automaton has 424 states and 583 transitions. Word has length 73 [2021-10-28 23:32:29,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:29,693 INFO L470 AbstractCegarLoop]: Abstraction has 424 states and 583 transitions. [2021-10-28 23:32:29,693 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:29,693 INFO L276 IsEmpty]: Start isEmpty. Operand 424 states and 583 transitions. [2021-10-28 23:32:29,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2021-10-28 23:32:29,694 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:29,695 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:29,695 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-10-28 23:32:29,695 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:29,696 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:29,696 INFO L85 PathProgramCache]: Analyzing trace with hash -344815767, now seen corresponding path program 1 times [2021-10-28 23:32:29,696 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:29,696 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1152646221] [2021-10-28 23:32:29,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:29,697 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:29,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:29,765 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:29,765 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:29,766 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1152646221] [2021-10-28 23:32:29,766 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1152646221] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:29,766 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:29,766 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:32:29,767 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1344510998] [2021-10-28 23:32:29,767 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:32:29,767 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:29,768 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:32:29,768 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:32:29,769 INFO L87 Difference]: Start difference. First operand 424 states and 583 transitions. Second operand has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:29,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:29,868 INFO L93 Difference]: Finished difference Result 862 states and 1206 transitions. [2021-10-28 23:32:29,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:32:29,869 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 73 [2021-10-28 23:32:29,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:29,872 INFO L225 Difference]: With dead ends: 862 [2021-10-28 23:32:29,873 INFO L226 Difference]: Without dead ends: 594 [2021-10-28 23:32:29,874 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:32:29,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 594 states. [2021-10-28 23:32:29,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 594 to 408. [2021-10-28 23:32:29,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 408 states, 403 states have (on average 1.382133995037221) internal successors, (557), 407 states have internal predecessors, (557), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:29,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 408 states to 408 states and 557 transitions. [2021-10-28 23:32:29,922 INFO L78 Accepts]: Start accepts. Automaton has 408 states and 557 transitions. Word has length 73 [2021-10-28 23:32:29,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:29,922 INFO L470 AbstractCegarLoop]: Abstraction has 408 states and 557 transitions. [2021-10-28 23:32:29,923 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:29,923 INFO L276 IsEmpty]: Start isEmpty. Operand 408 states and 557 transitions. [2021-10-28 23:32:29,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-28 23:32:29,924 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:29,925 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:29,925 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-10-28 23:32:29,925 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:29,926 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:29,926 INFO L85 PathProgramCache]: Analyzing trace with hash 317146558, now seen corresponding path program 1 times [2021-10-28 23:32:29,926 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:29,926 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2104512658] [2021-10-28 23:32:29,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:29,927 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:29,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:30,065 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:30,066 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:30,066 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2104512658] [2021-10-28 23:32:30,066 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2104512658] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:30,067 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:30,067 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-28 23:32:30,067 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [800906422] [2021-10-28 23:32:30,068 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-28 23:32:30,068 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:30,069 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 23:32:30,069 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2021-10-28 23:32:30,069 INFO L87 Difference]: Start difference. First operand 408 states and 557 transitions. Second operand has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:30,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:30,546 INFO L93 Difference]: Finished difference Result 1404 states and 1944 transitions. [2021-10-28 23:32:30,547 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:32:30,547 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-28 23:32:30,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:30,554 INFO L225 Difference]: With dead ends: 1404 [2021-10-28 23:32:30,554 INFO L226 Difference]: Without dead ends: 1147 [2021-10-28 23:32:30,555 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-28 23:32:30,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1147 states. [2021-10-28 23:32:30,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1147 to 436. [2021-10-28 23:32:30,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 436 states, 431 states have (on average 1.3665893271461718) internal successors, (589), 435 states have internal predecessors, (589), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:30,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 436 states to 436 states and 589 transitions. [2021-10-28 23:32:30,612 INFO L78 Accepts]: Start accepts. Automaton has 436 states and 589 transitions. Word has length 76 [2021-10-28 23:32:30,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:30,613 INFO L470 AbstractCegarLoop]: Abstraction has 436 states and 589 transitions. [2021-10-28 23:32:30,613 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:30,613 INFO L276 IsEmpty]: Start isEmpty. Operand 436 states and 589 transitions. [2021-10-28 23:32:30,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-28 23:32:30,615 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:30,615 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:30,615 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-10-28 23:32:30,615 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:30,616 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:30,616 INFO L85 PathProgramCache]: Analyzing trace with hash 917353494, now seen corresponding path program 1 times [2021-10-28 23:32:30,616 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:30,616 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [591922422] [2021-10-28 23:32:30,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:30,617 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:30,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:30,695 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:30,696 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:30,696 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [591922422] [2021-10-28 23:32:30,696 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [591922422] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:30,696 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:30,697 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:32:30,697 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1481518218] [2021-10-28 23:32:30,697 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:32:30,698 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:30,698 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:32:30,699 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:32:30,699 INFO L87 Difference]: Start difference. First operand 436 states and 589 transitions. Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:30,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:30,892 INFO L93 Difference]: Finished difference Result 1115 states and 1519 transitions. [2021-10-28 23:32:30,893 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:32:30,893 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-28 23:32:30,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:30,899 INFO L225 Difference]: With dead ends: 1115 [2021-10-28 23:32:30,900 INFO L226 Difference]: Without dead ends: 852 [2021-10-28 23:32:30,901 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:32:30,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 852 states. [2021-10-28 23:32:31,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 852 to 657. [2021-10-28 23:32:31,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 657 states, 652 states have (on average 1.348159509202454) internal successors, (879), 656 states have internal predecessors, (879), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:31,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 657 states to 657 states and 879 transitions. [2021-10-28 23:32:31,019 INFO L78 Accepts]: Start accepts. Automaton has 657 states and 879 transitions. Word has length 76 [2021-10-28 23:32:31,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:31,019 INFO L470 AbstractCegarLoop]: Abstraction has 657 states and 879 transitions. [2021-10-28 23:32:31,020 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:31,020 INFO L276 IsEmpty]: Start isEmpty. Operand 657 states and 879 transitions. [2021-10-28 23:32:31,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-10-28 23:32:31,022 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:31,022 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:31,022 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-10-28 23:32:31,023 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:31,023 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:31,024 INFO L85 PathProgramCache]: Analyzing trace with hash -480894404, now seen corresponding path program 1 times [2021-10-28 23:32:31,025 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:31,025 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1565780275] [2021-10-28 23:32:31,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:31,025 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:31,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:31,120 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:31,121 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:31,121 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1565780275] [2021-10-28 23:32:31,121 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1565780275] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:31,121 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:31,122 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:32:31,122 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1540069880] [2021-10-28 23:32:31,122 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:32:31,123 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:31,123 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:32:31,124 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:32:31,124 INFO L87 Difference]: Start difference. First operand 657 states and 879 transitions. Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:31,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:31,338 INFO L93 Difference]: Finished difference Result 1021 states and 1390 transitions. [2021-10-28 23:32:31,338 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-28 23:32:31,338 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-10-28 23:32:31,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:31,346 INFO L225 Difference]: With dead ends: 1021 [2021-10-28 23:32:31,346 INFO L226 Difference]: Without dead ends: 1019 [2021-10-28 23:32:31,347 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-28 23:32:31,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1019 states. [2021-10-28 23:32:31,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1019 to 659. [2021-10-28 23:32:31,422 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 659 states, 654 states have (on average 1.3470948012232415) internal successors, (881), 658 states have internal predecessors, (881), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:31,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 659 states to 659 states and 881 transitions. [2021-10-28 23:32:31,426 INFO L78 Accepts]: Start accepts. Automaton has 659 states and 881 transitions. Word has length 77 [2021-10-28 23:32:31,426 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:31,427 INFO L470 AbstractCegarLoop]: Abstraction has 659 states and 881 transitions. [2021-10-28 23:32:31,427 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:31,427 INFO L276 IsEmpty]: Start isEmpty. Operand 659 states and 881 transitions. [2021-10-28 23:32:31,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-10-28 23:32:31,429 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:31,429 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:31,429 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-10-28 23:32:31,430 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:31,430 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:31,430 INFO L85 PathProgramCache]: Analyzing trace with hash 1699767669, now seen corresponding path program 1 times [2021-10-28 23:32:31,431 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:31,431 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1992578952] [2021-10-28 23:32:31,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:31,431 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:31,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:31,565 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:31,566 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:31,566 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1992578952] [2021-10-28 23:32:31,566 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1992578952] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:31,566 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:31,566 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:32:31,567 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1035295485] [2021-10-28 23:32:31,567 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:32:31,567 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:31,568 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:32:31,568 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:32:31,569 INFO L87 Difference]: Start difference. First operand 659 states and 881 transitions. Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:31,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:31,982 INFO L93 Difference]: Finished difference Result 1988 states and 2739 transitions. [2021-10-28 23:32:31,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 23:32:31,983 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-10-28 23:32:31,983 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:31,993 INFO L225 Difference]: With dead ends: 1988 [2021-10-28 23:32:31,994 INFO L226 Difference]: Without dead ends: 1608 [2021-10-28 23:32:31,995 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-28 23:32:31,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1608 states. [2021-10-28 23:32:32,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1608 to 647. [2021-10-28 23:32:32,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 647 states, 642 states have (on average 1.3504672897196262) internal successors, (867), 646 states have internal predecessors, (867), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:32,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 647 states to 647 states and 867 transitions. [2021-10-28 23:32:32,098 INFO L78 Accepts]: Start accepts. Automaton has 647 states and 867 transitions. Word has length 77 [2021-10-28 23:32:32,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:32,099 INFO L470 AbstractCegarLoop]: Abstraction has 647 states and 867 transitions. [2021-10-28 23:32:32,099 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:32,099 INFO L276 IsEmpty]: Start isEmpty. Operand 647 states and 867 transitions. [2021-10-28 23:32:32,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-28 23:32:32,101 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:32,101 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:32,101 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-10-28 23:32:32,102 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:32,102 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:32,103 INFO L85 PathProgramCache]: Analyzing trace with hash 239208754, now seen corresponding path program 1 times [2021-10-28 23:32:32,103 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:32,103 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1148995058] [2021-10-28 23:32:32,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:32,104 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:32,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:32,214 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:32,214 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:32,214 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1148995058] [2021-10-28 23:32:32,215 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1148995058] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:32,215 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:32,215 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:32:32,215 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2024261660] [2021-10-28 23:32:32,216 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:32:32,216 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:32,217 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:32:32,217 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:32:32,218 INFO L87 Difference]: Start difference. First operand 647 states and 867 transitions. Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:32,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:32,513 INFO L93 Difference]: Finished difference Result 1542 states and 2165 transitions. [2021-10-28 23:32:32,513 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:32:32,514 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-28 23:32:32,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:32,522 INFO L225 Difference]: With dead ends: 1542 [2021-10-28 23:32:32,523 INFO L226 Difference]: Without dead ends: 1162 [2021-10-28 23:32:32,524 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-28 23:32:32,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1162 states. [2021-10-28 23:32:32,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1162 to 653. [2021-10-28 23:32:32,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 653 states, 648 states have (on average 1.3472222222222223) internal successors, (873), 652 states have internal predecessors, (873), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:32,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 653 states to 653 states and 873 transitions. [2021-10-28 23:32:32,632 INFO L78 Accepts]: Start accepts. Automaton has 653 states and 873 transitions. Word has length 78 [2021-10-28 23:32:32,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:32,632 INFO L470 AbstractCegarLoop]: Abstraction has 653 states and 873 transitions. [2021-10-28 23:32:32,633 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:32,633 INFO L276 IsEmpty]: Start isEmpty. Operand 653 states and 873 transitions. [2021-10-28 23:32:32,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-28 23:32:32,634 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:32,635 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:32,635 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-10-28 23:32:32,636 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:32,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:32,636 INFO L85 PathProgramCache]: Analyzing trace with hash 341178161, now seen corresponding path program 1 times [2021-10-28 23:32:32,637 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:32,637 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1915638113] [2021-10-28 23:32:32,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:32,637 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:32,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:32,716 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:32,716 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:32,717 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1915638113] [2021-10-28 23:32:32,717 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1915638113] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:32,717 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:32,717 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:32:32,718 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [130981200] [2021-10-28 23:32:32,719 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:32:32,720 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:32,720 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:32:32,721 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:32:32,721 INFO L87 Difference]: Start difference. First operand 653 states and 873 transitions. Second operand has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:32,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:32,950 INFO L93 Difference]: Finished difference Result 1511 states and 2028 transitions. [2021-10-28 23:32:32,950 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:32:32,951 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-28 23:32:32,951 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:32,958 INFO L225 Difference]: With dead ends: 1511 [2021-10-28 23:32:32,958 INFO L226 Difference]: Without dead ends: 1107 [2021-10-28 23:32:32,959 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:32:32,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1107 states. [2021-10-28 23:32:33,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1107 to 851. [2021-10-28 23:32:33,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 851 states, 846 states have (on average 1.339243498817967) internal successors, (1133), 850 states have internal predecessors, (1133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:33,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 851 states to 851 states and 1133 transitions. [2021-10-28 23:32:33,101 INFO L78 Accepts]: Start accepts. Automaton has 851 states and 1133 transitions. Word has length 78 [2021-10-28 23:32:33,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:33,102 INFO L470 AbstractCegarLoop]: Abstraction has 851 states and 1133 transitions. [2021-10-28 23:32:33,102 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:33,102 INFO L276 IsEmpty]: Start isEmpty. Operand 851 states and 1133 transitions. [2021-10-28 23:32:33,104 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-28 23:32:33,104 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:33,104 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:33,104 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-10-28 23:32:33,105 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:33,105 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:33,105 INFO L85 PathProgramCache]: Analyzing trace with hash -1360037685, now seen corresponding path program 1 times [2021-10-28 23:32:33,106 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:33,106 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2082023414] [2021-10-28 23:32:33,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:33,106 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:33,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:33,228 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:33,228 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:33,229 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2082023414] [2021-10-28 23:32:33,229 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2082023414] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:33,229 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:33,229 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:32:33,230 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [959433940] [2021-10-28 23:32:33,230 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:32:33,230 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:33,231 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:32:33,231 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:32:33,232 INFO L87 Difference]: Start difference. First operand 851 states and 1133 transitions. Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:33,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:33,900 INFO L93 Difference]: Finished difference Result 3248 states and 4372 transitions. [2021-10-28 23:32:33,901 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:32:33,901 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-28 23:32:33,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:33,920 INFO L225 Difference]: With dead ends: 3248 [2021-10-28 23:32:33,920 INFO L226 Difference]: Without dead ends: 2713 [2021-10-28 23:32:33,924 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-28 23:32:33,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2713 states. [2021-10-28 23:32:34,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2713 to 901. [2021-10-28 23:32:34,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 901 states, 896 states have (on average 1.3359375) internal successors, (1197), 900 states have internal predecessors, (1197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:34,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 901 states to 901 states and 1197 transitions. [2021-10-28 23:32:34,065 INFO L78 Accepts]: Start accepts. Automaton has 901 states and 1197 transitions. Word has length 78 [2021-10-28 23:32:34,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:34,066 INFO L470 AbstractCegarLoop]: Abstraction has 901 states and 1197 transitions. [2021-10-28 23:32:34,066 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:34,066 INFO L276 IsEmpty]: Start isEmpty. Operand 901 states and 1197 transitions. [2021-10-28 23:32:34,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2021-10-28 23:32:34,068 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:34,068 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:34,068 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-10-28 23:32:34,069 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:34,069 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:34,070 INFO L85 PathProgramCache]: Analyzing trace with hash -504696615, now seen corresponding path program 1 times [2021-10-28 23:32:34,070 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:34,070 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1218212779] [2021-10-28 23:32:34,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:34,070 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:34,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:34,137 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:34,137 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:34,137 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1218212779] [2021-10-28 23:32:34,137 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1218212779] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:34,138 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:34,138 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:32:34,138 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [912424204] [2021-10-28 23:32:34,139 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:32:34,139 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:34,140 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:32:34,141 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:32:34,141 INFO L87 Difference]: Start difference. First operand 901 states and 1197 transitions. Second operand has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:34,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:34,409 INFO L93 Difference]: Finished difference Result 2319 states and 3089 transitions. [2021-10-28 23:32:34,409 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:32:34,409 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 79 [2021-10-28 23:32:34,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:34,420 INFO L225 Difference]: With dead ends: 2319 [2021-10-28 23:32:34,421 INFO L226 Difference]: Without dead ends: 1731 [2021-10-28 23:32:34,422 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:32:34,425 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1731 states. [2021-10-28 23:32:34,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1731 to 1256. [2021-10-28 23:32:34,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1256 states, 1251 states have (on average 1.3245403677058354) internal successors, (1657), 1255 states have internal predecessors, (1657), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:34,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1256 states to 1256 states and 1657 transitions. [2021-10-28 23:32:34,570 INFO L78 Accepts]: Start accepts. Automaton has 1256 states and 1657 transitions. Word has length 79 [2021-10-28 23:32:34,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:34,570 INFO L470 AbstractCegarLoop]: Abstraction has 1256 states and 1657 transitions. [2021-10-28 23:32:34,571 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:34,571 INFO L276 IsEmpty]: Start isEmpty. Operand 1256 states and 1657 transitions. [2021-10-28 23:32:34,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-10-28 23:32:34,573 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:34,573 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:34,573 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-10-28 23:32:34,574 INFO L402 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:34,574 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:34,574 INFO L85 PathProgramCache]: Analyzing trace with hash -676572605, now seen corresponding path program 1 times [2021-10-28 23:32:34,575 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:34,575 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1649392831] [2021-10-28 23:32:34,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:34,575 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:34,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:34,639 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:34,640 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:34,640 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1649392831] [2021-10-28 23:32:34,640 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1649392831] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:34,640 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:34,641 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:32:34,641 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1761843073] [2021-10-28 23:32:34,641 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:32:34,642 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:34,642 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:32:34,642 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:32:34,643 INFO L87 Difference]: Start difference. First operand 1256 states and 1657 transitions. Second operand has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:35,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:35,008 INFO L93 Difference]: Finished difference Result 3064 states and 4044 transitions. [2021-10-28 23:32:35,009 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:32:35,009 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-10-28 23:32:35,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:35,024 INFO L225 Difference]: With dead ends: 3064 [2021-10-28 23:32:35,025 INFO L226 Difference]: Without dead ends: 2078 [2021-10-28 23:32:35,028 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:32:35,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2078 states. [2021-10-28 23:32:35,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2078 to 1258. [2021-10-28 23:32:35,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1258 states, 1253 states have (on average 1.324022346368715) internal successors, (1659), 1257 states have internal predecessors, (1659), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:35,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1258 states to 1258 states and 1659 transitions. [2021-10-28 23:32:35,214 INFO L78 Accepts]: Start accepts. Automaton has 1258 states and 1659 transitions. Word has length 80 [2021-10-28 23:32:35,215 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:35,215 INFO L470 AbstractCegarLoop]: Abstraction has 1258 states and 1659 transitions. [2021-10-28 23:32:35,215 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:35,216 INFO L276 IsEmpty]: Start isEmpty. Operand 1258 states and 1659 transitions. [2021-10-28 23:32:35,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2021-10-28 23:32:35,218 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:35,218 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:35,218 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-10-28 23:32:35,219 INFO L402 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:35,219 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:35,219 INFO L85 PathProgramCache]: Analyzing trace with hash -659983772, now seen corresponding path program 1 times [2021-10-28 23:32:35,220 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:35,220 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [648627313] [2021-10-28 23:32:35,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:35,220 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:35,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:35,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:35,318 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:35,318 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [648627313] [2021-10-28 23:32:35,318 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [648627313] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:35,318 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:35,319 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:32:35,319 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2094071596] [2021-10-28 23:32:35,319 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:32:35,319 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:35,320 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:32:35,320 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:32:35,320 INFO L87 Difference]: Start difference. First operand 1258 states and 1659 transitions. Second operand has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:35,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:35,530 INFO L93 Difference]: Finished difference Result 2600 states and 3430 transitions. [2021-10-28 23:32:35,530 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:32:35,530 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 81 [2021-10-28 23:32:35,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:35,539 INFO L225 Difference]: With dead ends: 2600 [2021-10-28 23:32:35,539 INFO L226 Difference]: Without dead ends: 1418 [2021-10-28 23:32:35,541 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:32:35,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1418 states. [2021-10-28 23:32:35,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1418 to 1055. [2021-10-28 23:32:35,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1055 states, 1050 states have (on average 1.3209523809523809) internal successors, (1387), 1054 states have internal predecessors, (1387), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:35,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1055 states to 1055 states and 1387 transitions. [2021-10-28 23:32:35,677 INFO L78 Accepts]: Start accepts. Automaton has 1055 states and 1387 transitions. Word has length 81 [2021-10-28 23:32:35,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:35,678 INFO L470 AbstractCegarLoop]: Abstraction has 1055 states and 1387 transitions. [2021-10-28 23:32:35,678 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:35,678 INFO L276 IsEmpty]: Start isEmpty. Operand 1055 states and 1387 transitions. [2021-10-28 23:32:35,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2021-10-28 23:32:35,680 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:35,680 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:35,680 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-10-28 23:32:35,680 INFO L402 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:35,681 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:35,681 INFO L85 PathProgramCache]: Analyzing trace with hash -63459148, now seen corresponding path program 1 times [2021-10-28 23:32:35,681 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:35,681 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1680364470] [2021-10-28 23:32:35,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:35,682 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:35,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:35,721 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:35,721 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:35,722 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1680364470] [2021-10-28 23:32:35,722 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1680364470] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:35,722 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:35,722 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:32:35,722 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1417293938] [2021-10-28 23:32:35,723 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:32:35,723 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:35,724 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:32:35,724 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:32:35,724 INFO L87 Difference]: Start difference. First operand 1055 states and 1387 transitions. Second operand has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:36,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:36,045 INFO L93 Difference]: Finished difference Result 2491 states and 3293 transitions. [2021-10-28 23:32:36,046 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:32:36,046 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 82 [2021-10-28 23:32:36,046 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:36,058 INFO L225 Difference]: With dead ends: 2491 [2021-10-28 23:32:36,058 INFO L226 Difference]: Without dead ends: 1585 [2021-10-28 23:32:36,060 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:32:36,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1585 states. [2021-10-28 23:32:36,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1585 to 1061. [2021-10-28 23:32:36,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1061 states, 1056 states have (on average 1.3191287878787878) internal successors, (1393), 1060 states have internal predecessors, (1393), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:36,205 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1061 states to 1061 states and 1393 transitions. [2021-10-28 23:32:36,206 INFO L78 Accepts]: Start accepts. Automaton has 1061 states and 1393 transitions. Word has length 82 [2021-10-28 23:32:36,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:36,206 INFO L470 AbstractCegarLoop]: Abstraction has 1061 states and 1393 transitions. [2021-10-28 23:32:36,206 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:36,207 INFO L276 IsEmpty]: Start isEmpty. Operand 1061 states and 1393 transitions. [2021-10-28 23:32:36,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2021-10-28 23:32:36,208 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:36,208 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:36,209 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-10-28 23:32:36,209 INFO L402 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:36,209 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:36,209 INFO L85 PathProgramCache]: Analyzing trace with hash -753963456, now seen corresponding path program 1 times [2021-10-28 23:32:36,210 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:36,210 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [869093185] [2021-10-28 23:32:36,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:36,210 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:36,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:36,284 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:36,284 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:36,284 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [869093185] [2021-10-28 23:32:36,284 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [869093185] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:36,285 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:36,285 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:32:36,285 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [785887795] [2021-10-28 23:32:36,285 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:32:36,285 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:36,286 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:32:36,286 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:32:36,286 INFO L87 Difference]: Start difference. First operand 1061 states and 1393 transitions. Second operand has 4 states, 4 states have (on average 20.5) internal successors, (82), 4 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:36,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:36,514 INFO L93 Difference]: Finished difference Result 2440 states and 3214 transitions. [2021-10-28 23:32:36,514 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:32:36,515 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.5) internal successors, (82), 4 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 82 [2021-10-28 23:32:36,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:36,533 INFO L225 Difference]: With dead ends: 2440 [2021-10-28 23:32:36,538 INFO L226 Difference]: Without dead ends: 1478 [2021-10-28 23:32:36,540 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:32:36,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1478 states. [2021-10-28 23:32:36,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1478 to 1001. [2021-10-28 23:32:36,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1001 states, 996 states have (on average 1.3142570281124497) internal successors, (1309), 1000 states have internal predecessors, (1309), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:36,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1001 states to 1001 states and 1309 transitions. [2021-10-28 23:32:36,690 INFO L78 Accepts]: Start accepts. Automaton has 1001 states and 1309 transitions. Word has length 82 [2021-10-28 23:32:36,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:36,691 INFO L470 AbstractCegarLoop]: Abstraction has 1001 states and 1309 transitions. [2021-10-28 23:32:36,691 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.5) internal successors, (82), 4 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:36,691 INFO L276 IsEmpty]: Start isEmpty. Operand 1001 states and 1309 transitions. [2021-10-28 23:32:36,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2021-10-28 23:32:36,694 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:36,695 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:36,695 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2021-10-28 23:32:36,695 INFO L402 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:36,696 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:36,696 INFO L85 PathProgramCache]: Analyzing trace with hash -508619245, now seen corresponding path program 1 times [2021-10-28 23:32:36,696 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:36,696 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [144276731] [2021-10-28 23:32:36,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:36,697 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:36,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:36,874 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:36,874 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:36,874 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [144276731] [2021-10-28 23:32:36,874 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [144276731] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:32:36,875 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [396617855] [2021-10-28 23:32:36,875 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:36,875 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:32:36,876 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:32:36,879 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:32:36,912 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-10-28 23:32:37,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:37,128 INFO L263 TraceCheckSpWp]: Trace formula consists of 716 conjuncts, 10 conjunts are in the unsatisfiable core [2021-10-28 23:32:37,138 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:32:37,756 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-28 23:32:37,756 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [396617855] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:37,756 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-28 23:32:37,757 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2021-10-28 23:32:37,757 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1315442538] [2021-10-28 23:32:37,757 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:32:37,757 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:37,758 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:32:37,758 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2021-10-28 23:32:37,758 INFO L87 Difference]: Start difference. First operand 1001 states and 1309 transitions. Second operand has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:38,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:38,273 INFO L93 Difference]: Finished difference Result 2598 states and 3526 transitions. [2021-10-28 23:32:38,274 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:32:38,274 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 128 [2021-10-28 23:32:38,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:38,292 INFO L225 Difference]: With dead ends: 2598 [2021-10-28 23:32:38,292 INFO L226 Difference]: Without dead ends: 1784 [2021-10-28 23:32:38,295 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 125 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2021-10-28 23:32:38,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1784 states. [2021-10-28 23:32:38,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1784 to 1001. [2021-10-28 23:32:38,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1001 states, 996 states have (on average 1.3132530120481927) internal successors, (1308), 1000 states have internal predecessors, (1308), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:38,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1001 states to 1001 states and 1308 transitions. [2021-10-28 23:32:38,512 INFO L78 Accepts]: Start accepts. Automaton has 1001 states and 1308 transitions. Word has length 128 [2021-10-28 23:32:38,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:38,513 INFO L470 AbstractCegarLoop]: Abstraction has 1001 states and 1308 transitions. [2021-10-28 23:32:38,513 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:38,513 INFO L276 IsEmpty]: Start isEmpty. Operand 1001 states and 1308 transitions. [2021-10-28 23:32:38,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2021-10-28 23:32:38,517 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:38,517 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:38,563 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-10-28 23:32:38,733 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2021-10-28 23:32:38,733 INFO L402 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:38,733 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:38,734 INFO L85 PathProgramCache]: Analyzing trace with hash 1477169230, now seen corresponding path program 1 times [2021-10-28 23:32:38,734 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:38,734 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1792600590] [2021-10-28 23:32:38,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:38,734 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:38,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:38,899 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:38,899 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:38,899 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1792600590] [2021-10-28 23:32:38,900 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1792600590] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:32:38,900 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1336818300] [2021-10-28 23:32:38,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:38,900 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:32:38,900 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:32:38,901 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:32:38,921 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-10-28 23:32:39,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:39,153 INFO L263 TraceCheckSpWp]: Trace formula consists of 730 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-28 23:32:39,159 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:32:39,729 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:39,730 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1336818300] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:32:39,730 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:32:39,730 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 13 [2021-10-28 23:32:39,731 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1073685058] [2021-10-28 23:32:39,732 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2021-10-28 23:32:39,732 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:39,732 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-10-28 23:32:39,733 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2021-10-28 23:32:39,733 INFO L87 Difference]: Start difference. First operand 1001 states and 1308 transitions. Second operand has 13 states, 13 states have (on average 19.846153846153847) internal successors, (258), 13 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:51,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:51,826 INFO L93 Difference]: Finished difference Result 16835 states and 22497 transitions. [2021-10-28 23:32:51,827 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 242 states. [2021-10-28 23:32:51,827 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 19.846153846153847) internal successors, (258), 13 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 132 [2021-10-28 23:32:51,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:51,871 INFO L225 Difference]: With dead ends: 16835 [2021-10-28 23:32:51,871 INFO L226 Difference]: Without dead ends: 16027 [2021-10-28 23:32:51,910 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 475 GetRequests, 224 SyntacticMatches, 0 SemanticMatches, 251 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28995 ImplicationChecksByTransitivity, 6.0s TimeCoverageRelationStatistics Valid=8289, Invalid=55467, Unknown=0, NotChecked=0, Total=63756 [2021-10-28 23:32:51,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16027 states. [2021-10-28 23:32:52,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16027 to 2722. [2021-10-28 23:32:52,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2722 states, 2717 states have (on average 1.3106367316893632) internal successors, (3561), 2721 states have internal predecessors, (3561), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:52,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2722 states to 2722 states and 3561 transitions. [2021-10-28 23:32:52,622 INFO L78 Accepts]: Start accepts. Automaton has 2722 states and 3561 transitions. Word has length 132 [2021-10-28 23:32:52,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:52,623 INFO L470 AbstractCegarLoop]: Abstraction has 2722 states and 3561 transitions. [2021-10-28 23:32:52,624 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 19.846153846153847) internal successors, (258), 13 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:52,624 INFO L276 IsEmpty]: Start isEmpty. Operand 2722 states and 3561 transitions. [2021-10-28 23:32:52,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2021-10-28 23:32:52,632 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:52,632 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:52,678 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2021-10-28 23:32:52,845 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2021-10-28 23:32:52,846 INFO L402 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:52,846 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:52,847 INFO L85 PathProgramCache]: Analyzing trace with hash 199325748, now seen corresponding path program 1 times [2021-10-28 23:32:52,847 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:52,847 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [582236798] [2021-10-28 23:32:52,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:52,847 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:52,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:53,070 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:53,071 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:53,071 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [582236798] [2021-10-28 23:32:53,071 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [582236798] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:32:53,071 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1590595066] [2021-10-28 23:32:53,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:53,072 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:32:53,072 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:32:53,073 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:32:53,093 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-10-28 23:32:53,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:53,364 INFO L263 TraceCheckSpWp]: Trace formula consists of 782 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-28 23:32:53,370 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:32:53,858 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:53,859 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1590595066] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:32:53,859 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:32:53,859 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 8 [2021-10-28 23:32:53,859 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2044196167] [2021-10-28 23:32:53,860 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2021-10-28 23:32:53,860 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:53,860 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-10-28 23:32:53,861 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2021-10-28 23:32:53,861 INFO L87 Difference]: Start difference. First operand 2722 states and 3561 transitions. Second operand has 8 states, 8 states have (on average 20.125) internal successors, (161), 8 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:55,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:55,309 INFO L93 Difference]: Finished difference Result 9813 states and 13401 transitions. [2021-10-28 23:32:55,311 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2021-10-28 23:32:55,312 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 20.125) internal successors, (161), 8 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 133 [2021-10-28 23:32:55,312 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:55,328 INFO L225 Difference]: With dead ends: 9813 [2021-10-28 23:32:55,328 INFO L226 Difference]: Without dead ends: 7318 [2021-10-28 23:32:55,334 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 143 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=146, Invalid=360, Unknown=0, NotChecked=0, Total=506 [2021-10-28 23:32:55,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7318 states. [2021-10-28 23:32:55,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7318 to 2327. [2021-10-28 23:32:55,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2327 states, 2322 states have (on average 1.313953488372093) internal successors, (3051), 2326 states have internal predecessors, (3051), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:55,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2327 states to 2327 states and 3051 transitions. [2021-10-28 23:32:55,861 INFO L78 Accepts]: Start accepts. Automaton has 2327 states and 3051 transitions. Word has length 133 [2021-10-28 23:32:55,861 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:55,862 INFO L470 AbstractCegarLoop]: Abstraction has 2327 states and 3051 transitions. [2021-10-28 23:32:55,862 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 20.125) internal successors, (161), 8 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:55,862 INFO L276 IsEmpty]: Start isEmpty. Operand 2327 states and 3051 transitions. [2021-10-28 23:32:55,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2021-10-28 23:32:55,868 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:55,868 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:55,908 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2021-10-28 23:32:56,093 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:32:56,094 INFO L402 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:56,094 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:56,094 INFO L85 PathProgramCache]: Analyzing trace with hash 99406826, now seen corresponding path program 1 times [2021-10-28 23:32:56,095 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:56,095 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1767133376] [2021-10-28 23:32:56,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:56,095 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:56,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:56,227 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2021-10-28 23:32:56,228 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:56,228 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1767133376] [2021-10-28 23:32:56,228 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1767133376] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:32:56,228 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:32:56,228 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-28 23:32:56,228 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1182297906] [2021-10-28 23:32:56,229 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-28 23:32:56,229 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:56,230 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 23:32:56,230 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-10-28 23:32:56,230 INFO L87 Difference]: Start difference. First operand 2327 states and 3051 transitions. Second operand has 7 states, 7 states have (on average 16.571428571428573) internal successors, (116), 7 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:58,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:32:58,168 INFO L93 Difference]: Finished difference Result 13295 states and 17793 transitions. [2021-10-28 23:32:58,168 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-10-28 23:32:58,168 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.571428571428573) internal successors, (116), 7 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 134 [2021-10-28 23:32:58,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:32:58,199 INFO L225 Difference]: With dead ends: 13295 [2021-10-28 23:32:58,199 INFO L226 Difference]: Without dead ends: 11215 [2021-10-28 23:32:58,205 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2021-10-28 23:32:58,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11215 states. [2021-10-28 23:32:58,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11215 to 2747. [2021-10-28 23:32:58,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2747 states, 2742 states have (on average 1.2939460247994166) internal successors, (3548), 2746 states have internal predecessors, (3548), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:58,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2747 states to 2747 states and 3548 transitions. [2021-10-28 23:32:58,868 INFO L78 Accepts]: Start accepts. Automaton has 2747 states and 3548 transitions. Word has length 134 [2021-10-28 23:32:58,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:32:58,869 INFO L470 AbstractCegarLoop]: Abstraction has 2747 states and 3548 transitions. [2021-10-28 23:32:58,869 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.571428571428573) internal successors, (116), 7 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:32:58,869 INFO L276 IsEmpty]: Start isEmpty. Operand 2747 states and 3548 transitions. [2021-10-28 23:32:58,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2021-10-28 23:32:58,878 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:32:58,878 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:32:58,878 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-10-28 23:32:58,879 INFO L402 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:32:58,879 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:32:58,879 INFO L85 PathProgramCache]: Analyzing trace with hash -1092691825, now seen corresponding path program 1 times [2021-10-28 23:32:58,879 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:32:58,880 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1263185258] [2021-10-28 23:32:58,880 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:58,880 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:32:58,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:59,024 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:32:59,025 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:32:59,025 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1263185258] [2021-10-28 23:32:59,025 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1263185258] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:32:59,025 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1660627637] [2021-10-28 23:32:59,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:32:59,026 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:32:59,026 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:32:59,034 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:32:59,054 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-10-28 23:32:59,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:32:59,348 INFO L263 TraceCheckSpWp]: Trace formula consists of 761 conjuncts, 12 conjunts are in the unsatisfiable core [2021-10-28 23:32:59,353 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:32:59,714 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 14 proven. 1 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2021-10-28 23:32:59,714 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1660627637] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:32:59,715 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:32:59,715 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5] total 11 [2021-10-28 23:32:59,716 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [297030291] [2021-10-28 23:32:59,716 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2021-10-28 23:32:59,717 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:32:59,719 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2021-10-28 23:32:59,719 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2021-10-28 23:32:59,719 INFO L87 Difference]: Start difference. First operand 2747 states and 3548 transitions. Second operand has 11 states, 11 states have (on average 21.09090909090909) internal successors, (232), 11 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:01,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:01,584 INFO L93 Difference]: Finished difference Result 5998 states and 7876 transitions. [2021-10-28 23:33:01,584 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2021-10-28 23:33:01,584 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 21.09090909090909) internal successors, (232), 11 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 136 [2021-10-28 23:33:01,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:01,590 INFO L225 Difference]: With dead ends: 5998 [2021-10-28 23:33:01,591 INFO L226 Difference]: Without dead ends: 3346 [2021-10-28 23:33:01,595 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 200 GetRequests, 156 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 621 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=525, Invalid=1545, Unknown=0, NotChecked=0, Total=2070 [2021-10-28 23:33:01,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3346 states. [2021-10-28 23:33:01,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3346 to 1880. [2021-10-28 23:33:01,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1880 states, 1875 states have (on average 1.2816) internal successors, (2403), 1879 states have internal predecessors, (2403), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:01,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1880 states to 1880 states and 2403 transitions. [2021-10-28 23:33:01,917 INFO L78 Accepts]: Start accepts. Automaton has 1880 states and 2403 transitions. Word has length 136 [2021-10-28 23:33:01,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:01,918 INFO L470 AbstractCegarLoop]: Abstraction has 1880 states and 2403 transitions. [2021-10-28 23:33:01,918 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 21.09090909090909) internal successors, (232), 11 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:01,918 INFO L276 IsEmpty]: Start isEmpty. Operand 1880 states and 2403 transitions. [2021-10-28 23:33:01,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2021-10-28 23:33:01,924 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:01,924 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:01,970 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2021-10-28 23:33:02,137 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable31 [2021-10-28 23:33:02,138 INFO L402 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:02,138 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:02,138 INFO L85 PathProgramCache]: Analyzing trace with hash -1966931344, now seen corresponding path program 1 times [2021-10-28 23:33:02,138 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:02,138 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [661806220] [2021-10-28 23:33:02,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:02,139 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:02,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:02,340 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:02,340 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:02,340 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [661806220] [2021-10-28 23:33:02,340 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [661806220] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:33:02,341 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1280548030] [2021-10-28 23:33:02,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:02,341 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:33:02,341 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:33:02,346 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:33:02,361 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-10-28 23:33:02,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:02,754 INFO L263 TraceCheckSpWp]: Trace formula consists of 785 conjuncts, 9 conjunts are in the unsatisfiable core [2021-10-28 23:33:02,758 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:33:03,159 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-28 23:33:03,160 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1280548030] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:03,160 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-28 23:33:03,160 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2021-10-28 23:33:03,160 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [318229309] [2021-10-28 23:33:03,161 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:33:03,161 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:03,162 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:33:03,163 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=181, Unknown=0, NotChecked=0, Total=210 [2021-10-28 23:33:03,163 INFO L87 Difference]: Start difference. First operand 1880 states and 2403 transitions. Second operand has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:03,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:03,982 INFO L93 Difference]: Finished difference Result 5962 states and 7867 transitions. [2021-10-28 23:33:03,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:33:03,983 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 136 [2021-10-28 23:33:03,983 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:03,989 INFO L225 Difference]: With dead ends: 5962 [2021-10-28 23:33:03,989 INFO L226 Difference]: Without dead ends: 4237 [2021-10-28 23:33:03,993 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 133 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=294, Unknown=0, NotChecked=0, Total=342 [2021-10-28 23:33:03,997 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4237 states. [2021-10-28 23:33:04,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4237 to 1880. [2021-10-28 23:33:04,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1880 states, 1875 states have (on average 1.28) internal successors, (2400), 1879 states have internal predecessors, (2400), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:04,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1880 states to 1880 states and 2400 transitions. [2021-10-28 23:33:04,328 INFO L78 Accepts]: Start accepts. Automaton has 1880 states and 2400 transitions. Word has length 136 [2021-10-28 23:33:04,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:04,329 INFO L470 AbstractCegarLoop]: Abstraction has 1880 states and 2400 transitions. [2021-10-28 23:33:04,329 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:04,329 INFO L276 IsEmpty]: Start isEmpty. Operand 1880 states and 2400 transitions. [2021-10-28 23:33:04,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2021-10-28 23:33:04,334 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:04,334 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:04,372 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2021-10-28 23:33:04,561 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:33:04,562 INFO L402 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:04,562 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:04,562 INFO L85 PathProgramCache]: Analyzing trace with hash 2092133653, now seen corresponding path program 1 times [2021-10-28 23:33:04,562 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:04,563 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [768197581] [2021-10-28 23:33:04,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:04,563 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:04,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:04,807 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:04,807 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:04,807 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [768197581] [2021-10-28 23:33:04,807 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [768197581] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:33:04,807 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1355102178] [2021-10-28 23:33:04,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:04,808 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:33:04,808 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:33:04,809 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:33:04,827 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2021-10-28 23:33:05,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:05,308 INFO L263 TraceCheckSpWp]: Trace formula consists of 798 conjuncts, 10 conjunts are in the unsatisfiable core [2021-10-28 23:33:05,312 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:33:05,782 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-28 23:33:05,782 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1355102178] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:05,782 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-28 23:33:05,782 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2021-10-28 23:33:05,783 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1463469431] [2021-10-28 23:33:05,783 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:33:05,783 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:05,784 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:33:05,784 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=181, Unknown=0, NotChecked=0, Total=210 [2021-10-28 23:33:05,784 INFO L87 Difference]: Start difference. First operand 1880 states and 2400 transitions. Second operand has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:06,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:06,633 INFO L93 Difference]: Finished difference Result 5402 states and 7038 transitions. [2021-10-28 23:33:06,633 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 23:33:06,633 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2021-10-28 23:33:06,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:06,638 INFO L225 Difference]: With dead ends: 5402 [2021-10-28 23:33:06,638 INFO L226 Difference]: Without dead ends: 3677 [2021-10-28 23:33:06,641 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 137 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=327, Unknown=0, NotChecked=0, Total=380 [2021-10-28 23:33:06,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3677 states. [2021-10-28 23:33:07,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3677 to 1880. [2021-10-28 23:33:07,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1880 states, 1875 states have (on average 1.2784) internal successors, (2397), 1879 states have internal predecessors, (2397), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:07,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1880 states to 1880 states and 2397 transitions. [2021-10-28 23:33:07,162 INFO L78 Accepts]: Start accepts. Automaton has 1880 states and 2397 transitions. Word has length 140 [2021-10-28 23:33:07,164 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:07,164 INFO L470 AbstractCegarLoop]: Abstraction has 1880 states and 2397 transitions. [2021-10-28 23:33:07,164 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:07,164 INFO L276 IsEmpty]: Start isEmpty. Operand 1880 states and 2397 transitions. [2021-10-28 23:33:07,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2021-10-28 23:33:07,170 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:07,170 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:07,218 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2021-10-28 23:33:07,385 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:33:07,386 INFO L402 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:07,386 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:07,386 INFO L85 PathProgramCache]: Analyzing trace with hash -1655490771, now seen corresponding path program 1 times [2021-10-28 23:33:07,387 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:07,387 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1999224855] [2021-10-28 23:33:07,387 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:07,387 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:07,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:07,642 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:07,643 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:07,643 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1999224855] [2021-10-28 23:33:07,643 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1999224855] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:33:07,643 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [63447337] [2021-10-28 23:33:07,643 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:07,644 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:33:07,644 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:33:07,645 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:33:07,665 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2021-10-28 23:33:08,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:08,093 INFO L263 TraceCheckSpWp]: Trace formula consists of 810 conjuncts, 22 conjunts are in the unsatisfiable core [2021-10-28 23:33:08,096 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:33:09,063 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:09,063 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [63447337] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:33:09,063 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:33:09,063 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 15 [2021-10-28 23:33:09,064 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [587133375] [2021-10-28 23:33:09,065 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2021-10-28 23:33:09,065 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:09,065 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2021-10-28 23:33:09,066 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2021-10-28 23:33:09,066 INFO L87 Difference]: Start difference. First operand 1880 states and 2397 transitions. Second operand has 16 states, 16 states have (on average 12.9375) internal successors, (207), 15 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:11,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:11,062 INFO L93 Difference]: Finished difference Result 5230 states and 6700 transitions. [2021-10-28 23:33:11,063 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2021-10-28 23:33:11,063 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 12.9375) internal successors, (207), 15 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2021-10-28 23:33:11,063 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:11,067 INFO L225 Difference]: With dead ends: 5230 [2021-10-28 23:33:11,067 INFO L226 Difference]: Without dead ends: 3545 [2021-10-28 23:33:11,070 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 173 GetRequests, 136 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 265 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=267, Invalid=1065, Unknown=0, NotChecked=0, Total=1332 [2021-10-28 23:33:11,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3545 states. [2021-10-28 23:33:11,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3545 to 2122. [2021-10-28 23:33:11,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2122 states, 2117 states have (on average 1.274444969296174) internal successors, (2698), 2121 states have internal predecessors, (2698), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:11,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2122 states to 2122 states and 2698 transitions. [2021-10-28 23:33:11,534 INFO L78 Accepts]: Start accepts. Automaton has 2122 states and 2698 transitions. Word has length 143 [2021-10-28 23:33:11,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:11,534 INFO L470 AbstractCegarLoop]: Abstraction has 2122 states and 2698 transitions. [2021-10-28 23:33:11,535 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 12.9375) internal successors, (207), 15 states have internal predecessors, (207), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:11,535 INFO L276 IsEmpty]: Start isEmpty. Operand 2122 states and 2698 transitions. [2021-10-28 23:33:11,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2021-10-28 23:33:11,539 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:11,539 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:11,582 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2021-10-28 23:33:11,756 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable34 [2021-10-28 23:33:11,757 INFO L402 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:11,757 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:11,757 INFO L85 PathProgramCache]: Analyzing trace with hash 508125803, now seen corresponding path program 1 times [2021-10-28 23:33:11,757 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:11,757 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [36908781] [2021-10-28 23:33:11,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:11,758 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:11,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:11,866 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2021-10-28 23:33:11,866 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:11,866 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [36908781] [2021-10-28 23:33:11,866 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [36908781] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:11,866 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:11,867 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:33:11,867 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1667932261] [2021-10-28 23:33:11,867 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 23:33:11,868 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:11,868 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 23:33:11,868 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:33:11,869 INFO L87 Difference]: Start difference. First operand 2122 states and 2698 transitions. Second operand has 5 states, 5 states have (on average 24.8) internal successors, (124), 4 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:12,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:12,283 INFO L93 Difference]: Finished difference Result 3982 states and 5104 transitions. [2021-10-28 23:33:12,284 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:33:12,284 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.8) internal successors, (124), 4 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2021-10-28 23:33:12,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:12,286 INFO L225 Difference]: With dead ends: 3982 [2021-10-28 23:33:12,286 INFO L226 Difference]: Without dead ends: 1994 [2021-10-28 23:33:12,288 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:33:12,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1994 states. [2021-10-28 23:33:12,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1994 to 1994. [2021-10-28 23:33:12,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1994 states, 1989 states have (on average 1.278531925590749) internal successors, (2543), 1993 states have internal predecessors, (2543), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:12,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1994 states to 1994 states and 2543 transitions. [2021-10-28 23:33:12,613 INFO L78 Accepts]: Start accepts. Automaton has 1994 states and 2543 transitions. Word has length 143 [2021-10-28 23:33:12,614 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:12,614 INFO L470 AbstractCegarLoop]: Abstraction has 1994 states and 2543 transitions. [2021-10-28 23:33:12,614 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.8) internal successors, (124), 4 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:12,614 INFO L276 IsEmpty]: Start isEmpty. Operand 1994 states and 2543 transitions. [2021-10-28 23:33:12,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-28 23:33:12,618 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:12,618 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:12,618 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2021-10-28 23:33:12,619 INFO L402 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:12,619 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:12,619 INFO L85 PathProgramCache]: Analyzing trace with hash -529555049, now seen corresponding path program 1 times [2021-10-28 23:33:12,619 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:12,620 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1678251787] [2021-10-28 23:33:12,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:12,620 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:12,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:12,808 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 31 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:12,809 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:12,809 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1678251787] [2021-10-28 23:33:12,809 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1678251787] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:33:12,809 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [473096730] [2021-10-28 23:33:12,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:12,809 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:33:12,809 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:33:12,820 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:33:12,820 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2021-10-28 23:33:13,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:13,288 INFO L263 TraceCheckSpWp]: Trace formula consists of 811 conjuncts, 24 conjunts are in the unsatisfiable core [2021-10-28 23:33:13,290 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:33:14,225 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 31 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:14,226 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [473096730] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:33:14,226 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:33:14,226 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 15 [2021-10-28 23:33:14,226 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [691299467] [2021-10-28 23:33:14,227 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2021-10-28 23:33:14,227 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:14,227 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2021-10-28 23:33:14,228 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2021-10-28 23:33:14,228 INFO L87 Difference]: Start difference. First operand 1994 states and 2543 transitions. Second operand has 16 states, 16 states have (on average 13.375) internal successors, (214), 15 states have internal predecessors, (214), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:16,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:16,717 INFO L93 Difference]: Finished difference Result 6387 states and 8158 transitions. [2021-10-28 23:33:16,717 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2021-10-28 23:33:16,718 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 13.375) internal successors, (214), 15 states have internal predecessors, (214), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-28 23:33:16,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:16,724 INFO L225 Difference]: With dead ends: 6387 [2021-10-28 23:33:16,724 INFO L226 Difference]: Without dead ends: 4588 [2021-10-28 23:33:16,728 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 189 GetRequests, 137 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 645 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=548, Invalid=2104, Unknown=0, NotChecked=0, Total=2652 [2021-10-28 23:33:16,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4588 states. [2021-10-28 23:33:17,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4588 to 2272. [2021-10-28 23:33:17,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2272 states, 2267 states have (on average 1.27437141596824) internal successors, (2889), 2271 states have internal predecessors, (2889), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:17,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2272 states to 2272 states and 2889 transitions. [2021-10-28 23:33:17,096 INFO L78 Accepts]: Start accepts. Automaton has 2272 states and 2889 transitions. Word has length 144 [2021-10-28 23:33:17,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:17,096 INFO L470 AbstractCegarLoop]: Abstraction has 2272 states and 2889 transitions. [2021-10-28 23:33:17,097 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 13.375) internal successors, (214), 15 states have internal predecessors, (214), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:17,097 INFO L276 IsEmpty]: Start isEmpty. Operand 2272 states and 2889 transitions. [2021-10-28 23:33:17,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-28 23:33:17,101 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:17,101 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:17,146 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2021-10-28 23:33:17,329 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable36 [2021-10-28 23:33:17,330 INFO L402 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:17,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:17,330 INFO L85 PathProgramCache]: Analyzing trace with hash -1568139623, now seen corresponding path program 1 times [2021-10-28 23:33:17,330 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:17,330 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [987409709] [2021-10-28 23:33:17,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:17,331 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:17,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:17,394 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2021-10-28 23:33:17,395 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:17,395 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [987409709] [2021-10-28 23:33:17,395 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [987409709] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:17,395 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:17,396 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:33:17,396 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1487061386] [2021-10-28 23:33:17,398 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:33:17,398 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:17,398 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:33:17,399 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:33:17,399 INFO L87 Difference]: Start difference. First operand 2272 states and 2889 transitions. Second operand has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:17,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:17,851 INFO L93 Difference]: Finished difference Result 4197 states and 5372 transitions. [2021-10-28 23:33:17,851 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 23:33:17,851 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-28 23:33:17,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:17,853 INFO L225 Difference]: With dead ends: 4197 [2021-10-28 23:33:17,853 INFO L226 Difference]: Without dead ends: 2061 [2021-10-28 23:33:17,857 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:33:17,859 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2061 states. [2021-10-28 23:33:18,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2061 to 2053. [2021-10-28 23:33:18,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2053 states, 2048 states have (on average 1.27197265625) internal successors, (2605), 2052 states have internal predecessors, (2605), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:18,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2053 states to 2053 states and 2605 transitions. [2021-10-28 23:33:18,252 INFO L78 Accepts]: Start accepts. Automaton has 2053 states and 2605 transitions. Word has length 144 [2021-10-28 23:33:18,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:18,252 INFO L470 AbstractCegarLoop]: Abstraction has 2053 states and 2605 transitions. [2021-10-28 23:33:18,253 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:18,253 INFO L276 IsEmpty]: Start isEmpty. Operand 2053 states and 2605 transitions. [2021-10-28 23:33:18,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-28 23:33:18,256 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:18,256 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:18,257 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2021-10-28 23:33:18,257 INFO L402 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:18,257 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:18,257 INFO L85 PathProgramCache]: Analyzing trace with hash -1816010656, now seen corresponding path program 1 times [2021-10-28 23:33:18,258 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:18,258 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [987199295] [2021-10-28 23:33:18,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:18,258 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:18,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:18,340 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2021-10-28 23:33:18,340 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:18,340 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [987199295] [2021-10-28 23:33:18,340 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [987199295] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:18,341 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:18,341 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:33:18,341 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1484984329] [2021-10-28 23:33:18,341 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:33:18,342 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:18,342 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:33:18,342 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:33:18,343 INFO L87 Difference]: Start difference. First operand 2053 states and 2605 transitions. Second operand has 6 states, 6 states have (on average 19.833333333333332) internal successors, (119), 6 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:19,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:19,832 INFO L93 Difference]: Finished difference Result 9022 states and 11736 transitions. [2021-10-28 23:33:19,833 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2021-10-28 23:33:19,833 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 19.833333333333332) internal successors, (119), 6 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-28 23:33:19,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:19,840 INFO L225 Difference]: With dead ends: 9022 [2021-10-28 23:33:19,840 INFO L226 Difference]: Without dead ends: 7164 [2021-10-28 23:33:19,843 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2021-10-28 23:33:19,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7164 states. [2021-10-28 23:33:20,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7164 to 2406. [2021-10-28 23:33:20,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2406 states, 2401 states have (on average 1.2573927530195752) internal successors, (3019), 2405 states have internal predecessors, (3019), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:20,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2406 states to 2406 states and 3019 transitions. [2021-10-28 23:33:20,275 INFO L78 Accepts]: Start accepts. Automaton has 2406 states and 3019 transitions. Word has length 144 [2021-10-28 23:33:20,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:20,276 INFO L470 AbstractCegarLoop]: Abstraction has 2406 states and 3019 transitions. [2021-10-28 23:33:20,276 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 19.833333333333332) internal successors, (119), 6 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:20,276 INFO L276 IsEmpty]: Start isEmpty. Operand 2406 states and 3019 transitions. [2021-10-28 23:33:20,278 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2021-10-28 23:33:20,279 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:20,279 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:20,279 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2021-10-28 23:33:20,279 INFO L402 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:20,279 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:20,280 INFO L85 PathProgramCache]: Analyzing trace with hash -922037262, now seen corresponding path program 1 times [2021-10-28 23:33:20,280 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:20,280 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [620410485] [2021-10-28 23:33:20,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:20,280 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:20,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:20,534 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 17 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:20,535 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:20,535 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [620410485] [2021-10-28 23:33:20,535 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [620410485] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:33:20,535 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1977633929] [2021-10-28 23:33:20,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:20,536 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:33:20,536 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:33:20,542 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:33:20,561 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2021-10-28 23:33:21,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:21,288 INFO L263 TraceCheckSpWp]: Trace formula consists of 812 conjuncts, 15 conjunts are in the unsatisfiable core [2021-10-28 23:33:21,291 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:33:22,553 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 17 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:22,553 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1977633929] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:33:22,553 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:33:22,554 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6] total 9 [2021-10-28 23:33:22,556 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [355259639] [2021-10-28 23:33:22,559 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2021-10-28 23:33:22,559 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:22,559 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2021-10-28 23:33:22,561 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2021-10-28 23:33:22,562 INFO L87 Difference]: Start difference. First operand 2406 states and 3019 transitions. Second operand has 10 states, 10 states have (on average 23.6) internal successors, (236), 9 states have internal predecessors, (236), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:23,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:23,664 INFO L93 Difference]: Finished difference Result 5572 states and 7059 transitions. [2021-10-28 23:33:23,665 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2021-10-28 23:33:23,665 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 23.6) internal successors, (236), 9 states have internal predecessors, (236), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 145 [2021-10-28 23:33:23,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:23,669 INFO L225 Difference]: With dead ends: 5572 [2021-10-28 23:33:23,669 INFO L226 Difference]: Without dead ends: 3361 [2021-10-28 23:33:23,672 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 139 SyntacticMatches, 4 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=100, Invalid=206, Unknown=0, NotChecked=0, Total=306 [2021-10-28 23:33:23,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3361 states. [2021-10-28 23:33:24,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3361 to 2406. [2021-10-28 23:33:24,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2406 states, 2401 states have (on average 1.252811328613078) internal successors, (3008), 2405 states have internal predecessors, (3008), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:24,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2406 states to 2406 states and 3008 transitions. [2021-10-28 23:33:24,146 INFO L78 Accepts]: Start accepts. Automaton has 2406 states and 3008 transitions. Word has length 145 [2021-10-28 23:33:24,147 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:24,147 INFO L470 AbstractCegarLoop]: Abstraction has 2406 states and 3008 transitions. [2021-10-28 23:33:24,147 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 23.6) internal successors, (236), 9 states have internal predecessors, (236), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:24,148 INFO L276 IsEmpty]: Start isEmpty. Operand 2406 states and 3008 transitions. [2021-10-28 23:33:24,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2021-10-28 23:33:24,152 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:24,153 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:24,204 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2021-10-28 23:33:24,373 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable39 [2021-10-28 23:33:24,374 INFO L402 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:24,374 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:24,374 INFO L85 PathProgramCache]: Analyzing trace with hash -1375736921, now seen corresponding path program 1 times [2021-10-28 23:33:24,375 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:24,375 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1656118282] [2021-10-28 23:33:24,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:24,375 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:24,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:24,493 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:24,493 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:24,494 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1656118282] [2021-10-28 23:33:24,494 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1656118282] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:33:24,494 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [126102518] [2021-10-28 23:33:24,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:24,494 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:33:24,495 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:33:24,496 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:33:24,525 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2021-10-28 23:33:25,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:25,278 INFO L263 TraceCheckSpWp]: Trace formula consists of 810 conjuncts, 6 conjunts are in the unsatisfiable core [2021-10-28 23:33:25,282 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:33:25,718 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:25,718 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [126102518] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:33:25,718 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:33:25,719 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2021-10-28 23:33:25,719 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1584034305] [2021-10-28 23:33:25,719 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-28 23:33:25,719 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:25,722 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 23:33:25,722 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-10-28 23:33:25,723 INFO L87 Difference]: Start difference. First operand 2406 states and 3008 transitions. Second operand has 7 states, 7 states have (on average 20.714285714285715) internal successors, (145), 7 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:27,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:27,233 INFO L93 Difference]: Finished difference Result 8321 states and 10665 transitions. [2021-10-28 23:33:27,234 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2021-10-28 23:33:27,234 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 20.714285714285715) internal successors, (145), 7 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 145 [2021-10-28 23:33:27,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:27,241 INFO L225 Difference]: With dead ends: 8321 [2021-10-28 23:33:27,241 INFO L226 Difference]: Without dead ends: 6110 [2021-10-28 23:33:27,243 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 147 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=194, Unknown=0, NotChecked=0, Total=272 [2021-10-28 23:33:27,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6110 states. [2021-10-28 23:33:28,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6110 to 4184. [2021-10-28 23:33:28,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4184 states, 4179 states have (on average 1.2498205312275663) internal successors, (5223), 4183 states have internal predecessors, (5223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:28,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4184 states to 4184 states and 5223 transitions. [2021-10-28 23:33:28,084 INFO L78 Accepts]: Start accepts. Automaton has 4184 states and 5223 transitions. Word has length 145 [2021-10-28 23:33:28,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:28,084 INFO L470 AbstractCegarLoop]: Abstraction has 4184 states and 5223 transitions. [2021-10-28 23:33:28,084 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 20.714285714285715) internal successors, (145), 7 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:28,085 INFO L276 IsEmpty]: Start isEmpty. Operand 4184 states and 5223 transitions. [2021-10-28 23:33:28,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2021-10-28 23:33:28,088 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:28,088 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:28,116 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2021-10-28 23:33:28,288 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable40 [2021-10-28 23:33:28,289 INFO L402 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:28,289 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:28,289 INFO L85 PathProgramCache]: Analyzing trace with hash -415965278, now seen corresponding path program 1 times [2021-10-28 23:33:28,290 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:28,290 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [60721558] [2021-10-28 23:33:28,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:28,290 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:28,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:28,500 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 45 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:28,500 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:28,500 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [60721558] [2021-10-28 23:33:28,500 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [60721558] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:33:28,501 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [637757420] [2021-10-28 23:33:28,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:28,501 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:33:28,501 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:33:28,502 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:33:28,517 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2021-10-28 23:33:29,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:29,280 INFO L263 TraceCheckSpWp]: Trace formula consists of 821 conjuncts, 12 conjunts are in the unsatisfiable core [2021-10-28 23:33:29,282 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:33:29,637 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2021-10-28 23:33:29,637 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [637757420] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:29,637 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-28 23:33:29,637 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2021-10-28 23:33:29,638 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2118242984] [2021-10-28 23:33:29,638 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:33:29,638 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:29,639 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:33:29,639 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2021-10-28 23:33:29,639 INFO L87 Difference]: Start difference. First operand 4184 states and 5223 transitions. Second operand has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:30,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:30,865 INFO L93 Difference]: Finished difference Result 9281 states and 11744 transitions. [2021-10-28 23:33:30,866 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 23:33:30,866 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 145 [2021-10-28 23:33:30,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:30,872 INFO L225 Difference]: With dead ends: 9281 [2021-10-28 23:33:30,872 INFO L226 Difference]: Without dead ends: 5931 [2021-10-28 23:33:30,876 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 145 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=76, Invalid=386, Unknown=0, NotChecked=0, Total=462 [2021-10-28 23:33:30,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5931 states. [2021-10-28 23:33:31,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5931 to 4184. [2021-10-28 23:33:31,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4184 states, 4179 states have (on average 1.2335486958602537) internal successors, (5155), 4183 states have internal predecessors, (5155), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:31,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4184 states to 4184 states and 5155 transitions. [2021-10-28 23:33:31,673 INFO L78 Accepts]: Start accepts. Automaton has 4184 states and 5155 transitions. Word has length 145 [2021-10-28 23:33:31,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:31,674 INFO L470 AbstractCegarLoop]: Abstraction has 4184 states and 5155 transitions. [2021-10-28 23:33:31,674 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.833333333333332) internal successors, (131), 6 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:31,674 INFO L276 IsEmpty]: Start isEmpty. Operand 4184 states and 5155 transitions. [2021-10-28 23:33:31,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2021-10-28 23:33:31,677 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:31,677 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:31,711 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2021-10-28 23:33:31,893 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:33:31,894 INFO L402 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:31,894 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:31,894 INFO L85 PathProgramCache]: Analyzing trace with hash -601450378, now seen corresponding path program 1 times [2021-10-28 23:33:31,894 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:31,894 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1379641831] [2021-10-28 23:33:31,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:31,895 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:31,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:32,084 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 26 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:32,084 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:32,084 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1379641831] [2021-10-28 23:33:32,085 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1379641831] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:33:32,085 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1295625823] [2021-10-28 23:33:32,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:32,085 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:33:32,086 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:33:32,087 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:33:32,105 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2021-10-28 23:33:33,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:33,122 INFO L263 TraceCheckSpWp]: Trace formula consists of 814 conjuncts, 19 conjunts are in the unsatisfiable core [2021-10-28 23:33:33,126 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:33:33,527 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 26 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:33,527 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1295625823] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:33:33,527 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:33:33,527 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8] total 8 [2021-10-28 23:33:33,527 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1231615357] [2021-10-28 23:33:33,528 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2021-10-28 23:33:33,528 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:33,528 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-10-28 23:33:33,529 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2021-10-28 23:33:33,529 INFO L87 Difference]: Start difference. First operand 4184 states and 5155 transitions. Second operand has 8 states, 8 states have (on average 18.5) internal successors, (148), 8 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:35,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:35,918 INFO L93 Difference]: Finished difference Result 14982 states and 18477 transitions. [2021-10-28 23:33:35,918 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2021-10-28 23:33:35,918 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 18.5) internal successors, (148), 8 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 146 [2021-10-28 23:33:35,919 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:35,930 INFO L225 Difference]: With dead ends: 14982 [2021-10-28 23:33:35,930 INFO L226 Difference]: Without dead ends: 11801 [2021-10-28 23:33:35,934 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 172 GetRequests, 150 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=129, Invalid=423, Unknown=0, NotChecked=0, Total=552 [2021-10-28 23:33:35,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11801 states. [2021-10-28 23:33:37,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11801 to 6811. [2021-10-28 23:33:37,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6811 states, 6806 states have (on average 1.237878342638848) internal successors, (8425), 6810 states have internal predecessors, (8425), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:37,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6811 states to 6811 states and 8425 transitions. [2021-10-28 23:33:37,377 INFO L78 Accepts]: Start accepts. Automaton has 6811 states and 8425 transitions. Word has length 146 [2021-10-28 23:33:37,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:37,380 INFO L470 AbstractCegarLoop]: Abstraction has 6811 states and 8425 transitions. [2021-10-28 23:33:37,380 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 18.5) internal successors, (148), 8 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:37,381 INFO L276 IsEmpty]: Start isEmpty. Operand 6811 states and 8425 transitions. [2021-10-28 23:33:37,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2021-10-28 23:33:37,388 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:37,388 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:37,415 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2021-10-28 23:33:37,597 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42,13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:33:37,598 INFO L402 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:37,598 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:37,598 INFO L85 PathProgramCache]: Analyzing trace with hash -1640034952, now seen corresponding path program 1 times [2021-10-28 23:33:37,598 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:37,598 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [326907506] [2021-10-28 23:33:37,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:37,599 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:37,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:37,648 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-10-28 23:33:37,648 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:37,648 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [326907506] [2021-10-28 23:33:37,648 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [326907506] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:37,648 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:37,649 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:33:37,649 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [297888525] [2021-10-28 23:33:37,649 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:33:37,649 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:37,650 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:33:37,650 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:33:37,650 INFO L87 Difference]: Start difference. First operand 6811 states and 8425 transitions. Second operand has 4 states, 4 states have (on average 31.25) internal successors, (125), 4 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:38,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:38,687 INFO L93 Difference]: Finished difference Result 11214 states and 13923 transitions. [2021-10-28 23:33:38,688 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 23:33:38,688 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 31.25) internal successors, (125), 4 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 146 [2021-10-28 23:33:38,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:38,692 INFO L225 Difference]: With dead ends: 11214 [2021-10-28 23:33:38,692 INFO L226 Difference]: Without dead ends: 4986 [2021-10-28 23:33:38,697 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:33:38,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4986 states. [2021-10-28 23:33:39,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4986 to 4960. [2021-10-28 23:33:39,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4960 states, 4955 states have (on average 1.239556004036327) internal successors, (6142), 4959 states have internal predecessors, (6142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:39,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4960 states to 4960 states and 6142 transitions. [2021-10-28 23:33:39,557 INFO L78 Accepts]: Start accepts. Automaton has 4960 states and 6142 transitions. Word has length 146 [2021-10-28 23:33:39,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:39,557 INFO L470 AbstractCegarLoop]: Abstraction has 4960 states and 6142 transitions. [2021-10-28 23:33:39,557 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 31.25) internal successors, (125), 4 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:39,557 INFO L276 IsEmpty]: Start isEmpty. Operand 4960 states and 6142 transitions. [2021-10-28 23:33:39,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2021-10-28 23:33:39,560 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:39,561 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:39,561 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2021-10-28 23:33:39,561 INFO L402 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:39,561 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:39,561 INFO L85 PathProgramCache]: Analyzing trace with hash -1660310691, now seen corresponding path program 1 times [2021-10-28 23:33:39,561 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:39,561 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [101634217] [2021-10-28 23:33:39,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:39,562 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:39,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:39,781 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 45 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:33:39,782 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:39,782 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [101634217] [2021-10-28 23:33:39,782 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [101634217] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:33:39,782 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1995287881] [2021-10-28 23:33:39,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:39,783 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:33:39,783 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:33:39,786 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:33:39,792 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2021-10-28 23:33:40,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:40,877 INFO L263 TraceCheckSpWp]: Trace formula consists of 834 conjuncts, 8 conjunts are in the unsatisfiable core [2021-10-28 23:33:40,879 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:33:41,279 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2021-10-28 23:33:41,279 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1995287881] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:41,279 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-28 23:33:41,280 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2021-10-28 23:33:41,280 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [889062594] [2021-10-28 23:33:41,280 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:33:41,280 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:41,280 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:33:41,280 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2021-10-28 23:33:41,281 INFO L87 Difference]: Start difference. First operand 4960 states and 6142 transitions. Second operand has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:43,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:43,128 INFO L93 Difference]: Finished difference Result 12895 states and 16091 transitions. [2021-10-28 23:33:43,128 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 23:33:43,129 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 149 [2021-10-28 23:33:43,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:43,136 INFO L225 Difference]: With dead ends: 12895 [2021-10-28 23:33:43,136 INFO L226 Difference]: Without dead ends: 8622 [2021-10-28 23:33:43,141 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 146 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=325, Unknown=0, NotChecked=0, Total=380 [2021-10-28 23:33:43,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8622 states. [2021-10-28 23:33:44,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8622 to 4960. [2021-10-28 23:33:44,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4960 states, 4955 states have (on average 1.2391523713420787) internal successors, (6140), 4959 states have internal predecessors, (6140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:44,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4960 states to 4960 states and 6140 transitions. [2021-10-28 23:33:44,082 INFO L78 Accepts]: Start accepts. Automaton has 4960 states and 6140 transitions. Word has length 149 [2021-10-28 23:33:44,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:44,082 INFO L470 AbstractCegarLoop]: Abstraction has 4960 states and 6140 transitions. [2021-10-28 23:33:44,082 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 22.5) internal successors, (135), 6 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:44,082 INFO L276 IsEmpty]: Start isEmpty. Operand 4960 states and 6140 transitions. [2021-10-28 23:33:44,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2021-10-28 23:33:44,087 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:44,087 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:44,121 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2021-10-28 23:33:44,301 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44,14 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:33:44,302 INFO L402 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:44,302 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:44,302 INFO L85 PathProgramCache]: Analyzing trace with hash -2043778853, now seen corresponding path program 1 times [2021-10-28 23:33:44,302 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:44,302 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1932166687] [2021-10-28 23:33:44,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:44,302 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:44,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:33:44,409 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2021-10-28 23:33:44,409 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:33:44,409 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1932166687] [2021-10-28 23:33:44,409 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1932166687] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:33:44,410 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:33:44,410 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:33:44,410 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [241697865] [2021-10-28 23:33:44,410 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:33:44,411 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:33:44,411 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:33:44,411 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:33:44,411 INFO L87 Difference]: Start difference. First operand 4960 states and 6140 transitions. Second operand has 6 states, 6 states have (on average 24.0) internal successors, (144), 6 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:46,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:33:46,833 INFO L93 Difference]: Finished difference Result 12708 states and 15969 transitions. [2021-10-28 23:33:46,833 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:33:46,833 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 24.0) internal successors, (144), 6 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 150 [2021-10-28 23:33:46,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:33:46,843 INFO L225 Difference]: With dead ends: 12708 [2021-10-28 23:33:46,843 INFO L226 Difference]: Without dead ends: 9846 [2021-10-28 23:33:46,848 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-28 23:33:46,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9846 states. [2021-10-28 23:33:47,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9846 to 5071. [2021-10-28 23:33:47,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5071 states, 5066 states have (on average 1.2376628503750493) internal successors, (6270), 5070 states have internal predecessors, (6270), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:47,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5071 states to 5071 states and 6270 transitions. [2021-10-28 23:33:47,878 INFO L78 Accepts]: Start accepts. Automaton has 5071 states and 6270 transitions. Word has length 150 [2021-10-28 23:33:47,879 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:33:47,879 INFO L470 AbstractCegarLoop]: Abstraction has 5071 states and 6270 transitions. [2021-10-28 23:33:47,879 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 24.0) internal successors, (144), 6 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:33:47,879 INFO L276 IsEmpty]: Start isEmpty. Operand 5071 states and 6270 transitions. [2021-10-28 23:33:47,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2021-10-28 23:33:47,881 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:33:47,882 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:47,882 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2021-10-28 23:33:47,882 INFO L402 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:33:47,882 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:33:47,882 INFO L85 PathProgramCache]: Analyzing trace with hash 1490980259, now seen corresponding path program 1 times [2021-10-28 23:33:47,882 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:33:47,883 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1860424731] [2021-10-28 23:33:47,883 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:33:47,883 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:33:47,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:33:47,934 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:33:48,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:33:48,113 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:33:48,113 INFO L627 BasicCegarLoop]: Counterexample is feasible [2021-10-28 23:33:48,114 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,115 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,116 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,116 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,116 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,116 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,117 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,117 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,117 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,117 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,117 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,118 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,118 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,118 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,118 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,118 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,119 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,119 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,119 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,119 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,119 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,119 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,120 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:33:48,120 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2021-10-28 23:33:48,123 INFO L731 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:33:48,127 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-10-28 23:33:48,403 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.10 11:33:48 BoogieIcfgContainer [2021-10-28 23:33:48,403 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-10-28 23:33:48,404 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-28 23:33:48,404 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-28 23:33:48,404 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-28 23:33:48,404 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 11:32:24" (3/4) ... [2021-10-28 23:33:48,406 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-10-28 23:33:48,639 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/witness.graphml [2021-10-28 23:33:48,639 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-28 23:33:48,640 INFO L168 Benchmark]: Toolchain (without parser) took 85570.15 ms. Allocated memory was 86.0 MB in the beginning and 2.1 GB in the end (delta: 2.0 GB). Free memory was 46.3 MB in the beginning and 1.8 GB in the end (delta: -1.8 GB). Peak memory consumption was 238.1 MB. Max. memory is 16.1 GB. [2021-10-28 23:33:48,641 INFO L168 Benchmark]: CDTParser took 0.25 ms. Allocated memory is still 86.0 MB. Free memory is still 63.3 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-10-28 23:33:48,641 INFO L168 Benchmark]: CACSL2BoogieTranslator took 503.69 ms. Allocated memory was 86.0 MB in the beginning and 104.9 MB in the end (delta: 18.9 MB). Free memory was 46.1 MB in the beginning and 71.1 MB in the end (delta: -25.0 MB). Peak memory consumption was 6.2 MB. Max. memory is 16.1 GB. [2021-10-28 23:33:48,641 INFO L168 Benchmark]: Boogie Procedure Inliner took 122.78 ms. Allocated memory is still 104.9 MB. Free memory was 70.7 MB in the beginning and 65.9 MB in the end (delta: 4.8 MB). Peak memory consumption was 6.3 MB. Max. memory is 16.1 GB. [2021-10-28 23:33:48,642 INFO L168 Benchmark]: Boogie Preprocessor took 72.13 ms. Allocated memory is still 104.9 MB. Free memory was 65.9 MB in the beginning and 62.7 MB in the end (delta: 3.2 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 23:33:48,642 INFO L168 Benchmark]: RCFGBuilder took 1167.89 ms. Allocated memory is still 104.9 MB. Free memory was 62.7 MB in the beginning and 72.7 MB in the end (delta: -10.0 MB). Peak memory consumption was 41.9 MB. Max. memory is 16.1 GB. [2021-10-28 23:33:48,643 INFO L168 Benchmark]: TraceAbstraction took 83457.98 ms. Allocated memory was 104.9 MB in the beginning and 2.1 GB in the end (delta: 2.0 GB). Free memory was 72.2 MB in the beginning and 1.9 GB in the end (delta: -1.8 GB). Peak memory consumption was 192.0 MB. Max. memory is 16.1 GB. [2021-10-28 23:33:48,643 INFO L168 Benchmark]: Witness Printer took 235.25 ms. Allocated memory is still 2.1 GB. Free memory was 1.9 GB in the beginning and 1.8 GB in the end (delta: 49.5 MB). Peak memory consumption was 50.3 MB. Max. memory is 16.1 GB. [2021-10-28 23:33:48,645 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.25 ms. Allocated memory is still 86.0 MB. Free memory is still 63.3 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 503.69 ms. Allocated memory was 86.0 MB in the beginning and 104.9 MB in the end (delta: 18.9 MB). Free memory was 46.1 MB in the beginning and 71.1 MB in the end (delta: -25.0 MB). Peak memory consumption was 6.2 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 122.78 ms. Allocated memory is still 104.9 MB. Free memory was 70.7 MB in the beginning and 65.9 MB in the end (delta: 4.8 MB). Peak memory consumption was 6.3 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 72.13 ms. Allocated memory is still 104.9 MB. Free memory was 65.9 MB in the beginning and 62.7 MB in the end (delta: 3.2 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 1167.89 ms. Allocated memory is still 104.9 MB. Free memory was 62.7 MB in the beginning and 72.7 MB in the end (delta: -10.0 MB). Peak memory consumption was 41.9 MB. Max. memory is 16.1 GB. * TraceAbstraction took 83457.98 ms. Allocated memory was 104.9 MB in the beginning and 2.1 GB in the end (delta: 2.0 GB). Free memory was 72.2 MB in the beginning and 1.9 GB in the end (delta: -1.8 GB). Peak memory consumption was 192.0 MB. Max. memory is 16.1 GB. * Witness Printer took 235.25 ms. Allocated memory is still 2.1 GB. Free memory was 1.9 GB in the beginning and 1.8 GB in the end (delta: 49.5 MB). Peak memory consumption was 50.3 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 619]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L542] int c1 ; [L543] int i2 ; [L546] c1 = 0 [L547] side1Failed = __VERIFIER_nondet_bool() [L548] side2Failed = __VERIFIER_nondet_bool() [L549] side1_written = __VERIFIER_nondet_char() [L550] side2_written = __VERIFIER_nondet_char() [L551] side1Failed_History_0 = __VERIFIER_nondet_bool() [L552] side1Failed_History_1 = __VERIFIER_nondet_bool() [L553] side1Failed_History_2 = __VERIFIER_nondet_bool() [L554] side2Failed_History_0 = __VERIFIER_nondet_bool() [L555] side2Failed_History_1 = __VERIFIER_nondet_bool() [L556] side2Failed_History_2 = __VERIFIER_nondet_bool() [L557] active_side_History_0 = __VERIFIER_nondet_char() [L558] active_side_History_1 = __VERIFIER_nondet_char() [L559] active_side_History_2 = __VERIFIER_nondet_char() [L560] manual_selection_History_0 = __VERIFIER_nondet_char() [L561] manual_selection_History_1 = __VERIFIER_nondet_char() [L562] manual_selection_History_2 = __VERIFIER_nondet_char() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L563] i2 = init() [L58] COND FALSE !(!cond) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L565] cs1_old = nomsg [L566] cs1_new = nomsg [L567] cs2_old = nomsg [L568] cs2_new = nomsg [L569] s1s2_old = nomsg [L570] s1s2_new = nomsg [L571] s1s1_old = nomsg [L572] s1s1_new = nomsg [L573] s2s1_old = nomsg [L574] s2s1_new = nomsg [L575] s2s2_old = nomsg [L576] s2s2_new = nomsg [L577] s1p_old = nomsg [L578] s1p_new = nomsg [L579] s2p_old = nomsg [L580] s2p_new = nomsg [L581] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L582] COND TRUE i2 < 10 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=2, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND TRUE \read(side1Failed) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L409] COND FALSE !((int )side2 == 0) [L412] active_side = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L447] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] COND TRUE ! side2Failed [L451] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND TRUE ! tmp___0 [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L458] tmp___1 = read_side1_failed_history((unsigned char)1) [L459] COND TRUE ! tmp___1 [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L460] tmp___2 = read_side1_failed_history((unsigned char)0) [L461] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L486] tmp___7 = read_side1_failed_history((unsigned char)1) [L487] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L502] tmp___11 = read_side1_failed_history((unsigned char)1) [L503] COND TRUE ! tmp___11 [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L504] tmp___12 = read_side2_failed_history((unsigned char)1) [L505] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L148] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L151] COND FALSE !((int )index == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L154] COND TRUE (int )index == 2 [L155] return (active_side_History_2); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L518] tmp___20 = read_active_side_history((unsigned char)2) [L519] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L537] return (1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L604] c1 = check() [L617] COND FALSE !(! arg) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L606] i2 ++ VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L582] COND TRUE i2 < 10 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND TRUE \read(side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-3, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L350] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L351] COND TRUE (int )side2 != (int )nomsg [L352] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L409] COND TRUE (int )side2 == 0 [L410] active_side = (int8_t )2 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-128, cs1_old=-3, cs2=0, cs2_new=-128, cs2_old=-1, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L447] COND FALSE !(! side1Failed) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] COND TRUE ! side2Failed [L451] tmp = 1 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND FALSE !(! tmp___0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L486] tmp___7 = read_side1_failed_history((unsigned char)1) [L487] COND TRUE \read(tmp___7) [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L488] tmp___8 = read_side2_failed_history((unsigned char)1) [L489] COND TRUE ! tmp___8 [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L490] tmp___5 = read_active_side_history((unsigned char)0) [L491] COND FALSE !(! ((int )tmp___5 == 2)) [L118] COND TRUE (int )index == 0 [L119] return (side2Failed_History_0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L494] tmp___6 = read_side2_failed_history((unsigned char)0) [L495] COND TRUE ! tmp___6 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L496] COND TRUE ! ((int )side2_written == 1) [L497] return (0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L604] c1 = check() [L617] COND TRUE ! arg VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L619] reach_error() VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-128, cs2=0, cs2_new=-1, cs2_old=-128, manual_selection_History_0=-128, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 619]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 297 locations, 23 error locations. Started 1 CEGAR loops. OverallTime: 83.1s, OverallIterations: 47, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 44.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 22435 SDtfs, 49588 SDslu, 61678 SDs, 0 SdLazy, 11075 SolverSat, 716 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2737 GetRequests, 2039 SyntacticMatches, 9 SemanticMatches, 689 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31174 ImplicationChecksByTransitivity, 10.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=6811occurred in iteration=43, InterpolantAutomatonStates: 664, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 13.7s AutomataMinimizationTime, 46 MinimizatonAttempts, 69882 StatesRemovedByMinimization, 43 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.8s SsaConstructionTime, 2.9s SatisfiabilityAnalysisTime, 11.8s InterpolantComputationTime, 6454 NumberOfCodeBlocks, 6454 NumberOfCodeBlocksAsserted, 60 NumberOfCheckSat, 6244 ConstructedInterpolants, 0 QuantifiedInterpolants, 22714 SizeOfPredicates, 57 NumberOfNonLiveVariables, 10284 ConjunctsInSsa, 175 ConjunctsInUnsatCore, 59 InterpolantComputations, 38 PerfectInterpolantSequences, 919/1290 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-10-28 23:33:48,713 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_744c9e6d-3985-445f-89a0-180ccc3f22dc/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...