./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version b2eff8ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/config/AutomizerReach.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 01a21536345230b7194ff5017879c469eb8be909ba72352bb81feb2f101a934f ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.2.1-dev-b2eff8b [2021-10-28 23:16:56,550 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-10-28 23:16:56,552 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-10-28 23:16:56,606 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-10-28 23:16:56,607 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-10-28 23:16:56,609 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-10-28 23:16:56,611 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-10-28 23:16:56,614 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-10-28 23:16:56,616 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-10-28 23:16:56,618 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-10-28 23:16:56,619 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-10-28 23:16:56,621 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-10-28 23:16:56,621 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-10-28 23:16:56,623 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-10-28 23:16:56,625 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-10-28 23:16:56,627 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-10-28 23:16:56,628 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-10-28 23:16:56,629 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-10-28 23:16:56,632 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-10-28 23:16:56,635 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-10-28 23:16:56,638 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-10-28 23:16:56,644 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-10-28 23:16:56,645 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-10-28 23:16:56,646 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-10-28 23:16:56,651 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-10-28 23:16:56,651 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-10-28 23:16:56,652 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-10-28 23:16:56,653 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-10-28 23:16:56,659 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-10-28 23:16:56,660 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-10-28 23:16:56,661 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-10-28 23:16:56,662 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-10-28 23:16:56,663 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-10-28 23:16:56,664 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-10-28 23:16:56,665 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-10-28 23:16:56,665 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-10-28 23:16:56,666 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-10-28 23:16:56,667 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-10-28 23:16:56,667 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-10-28 23:16:56,669 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-10-28 23:16:56,672 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-10-28 23:16:56,673 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/config/svcomp-Reach-32bit-Automizer_Default.epf [2021-10-28 23:16:56,723 INFO L113 SettingsManager]: Loading preferences was successful [2021-10-28 23:16:56,723 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-10-28 23:16:56,723 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-10-28 23:16:56,724 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-10-28 23:16:56,725 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-10-28 23:16:56,725 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-10-28 23:16:56,725 INFO L138 SettingsManager]: * Use SBE=true [2021-10-28 23:16:56,726 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-10-28 23:16:56,726 INFO L138 SettingsManager]: * sizeof long=4 [2021-10-28 23:16:56,726 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-10-28 23:16:56,726 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-10-28 23:16:56,726 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-10-28 23:16:56,727 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2021-10-28 23:16:56,727 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2021-10-28 23:16:56,727 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2021-10-28 23:16:56,727 INFO L138 SettingsManager]: * sizeof long double=12 [2021-10-28 23:16:56,727 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-10-28 23:16:56,728 INFO L138 SettingsManager]: * Use constant arrays=true [2021-10-28 23:16:56,728 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2021-10-28 23:16:56,728 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-10-28 23:16:56,728 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-10-28 23:16:56,728 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2021-10-28 23:16:56,729 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-28 23:16:56,729 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-10-28 23:16:56,729 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2021-10-28 23:16:56,729 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2021-10-28 23:16:56,729 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-10-28 23:16:56,730 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2021-10-28 23:16:56,730 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2021-10-28 23:16:56,730 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2021-10-28 23:16:56,730 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2021-10-28 23:16:56,730 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-10-28 23:16:56,731 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 01a21536345230b7194ff5017879c469eb8be909ba72352bb81feb2f101a934f [2021-10-28 23:16:57,040 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-10-28 23:16:57,080 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-10-28 23:16:57,083 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-10-28 23:16:57,084 INFO L271 PluginConnector]: Initializing CDTParser... [2021-10-28 23:16:57,085 INFO L275 PluginConnector]: CDTParser initialized [2021-10-28 23:16:57,086 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/../../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c [2021-10-28 23:16:57,181 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/data/9894f54c3/a5176a9c4a604b0bb7ca02c0769e92f9/FLAG6b7762877 [2021-10-28 23:16:57,757 INFO L306 CDTParser]: Found 1 translation units. [2021-10-28 23:16:57,758 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c [2021-10-28 23:16:57,783 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/data/9894f54c3/a5176a9c4a604b0bb7ca02c0769e92f9/FLAG6b7762877 [2021-10-28 23:16:58,039 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/data/9894f54c3/a5176a9c4a604b0bb7ca02c0769e92f9 [2021-10-28 23:16:58,042 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-10-28 23:16:58,044 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-10-28 23:16:58,046 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-10-28 23:16:58,046 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-10-28 23:16:58,056 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-10-28 23:16:58,057 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 11:16:58" (1/1) ... [2021-10-28 23:16:58,060 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3e8ce89c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:16:58, skipping insertion in model container [2021-10-28 23:16:58,061 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.10 11:16:58" (1/1) ... [2021-10-28 23:16:58,070 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-10-28 23:16:58,120 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-10-28 23:16:58,394 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c[14684,14697] [2021-10-28 23:16:58,397 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 23:16:58,409 INFO L203 MainTranslator]: Completed pre-run [2021-10-28 23:16:58,476 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c[14684,14697] [2021-10-28 23:16:58,477 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-10-28 23:16:58,496 INFO L208 MainTranslator]: Completed translation [2021-10-28 23:16:58,496 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:16:58 WrapperNode [2021-10-28 23:16:58,496 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-10-28 23:16:58,498 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-10-28 23:16:58,498 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-10-28 23:16:58,498 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-10-28 23:16:58,507 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:16:58" (1/1) ... [2021-10-28 23:16:58,522 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:16:58" (1/1) ... [2021-10-28 23:16:58,585 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-10-28 23:16:58,586 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-10-28 23:16:58,586 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-10-28 23:16:58,586 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-10-28 23:16:58,597 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:16:58" (1/1) ... [2021-10-28 23:16:58,597 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:16:58" (1/1) ... [2021-10-28 23:16:58,607 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:16:58" (1/1) ... [2021-10-28 23:16:58,608 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:16:58" (1/1) ... [2021-10-28 23:16:58,644 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:16:58" (1/1) ... [2021-10-28 23:16:58,666 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:16:58" (1/1) ... [2021-10-28 23:16:58,672 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:16:58" (1/1) ... [2021-10-28 23:16:58,705 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-10-28 23:16:58,706 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-10-28 23:16:58,706 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-10-28 23:16:58,706 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-10-28 23:16:58,725 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:16:58" (1/1) ... [2021-10-28 23:16:58,735 INFO L170 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2021-10-28 23:16:58,748 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:16:58,763 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2021-10-28 23:16:58,789 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2021-10-28 23:16:58,814 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-10-28 23:16:58,815 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-10-28 23:16:58,815 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-10-28 23:16:58,815 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-10-28 23:16:59,932 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-10-28 23:16:59,933 INFO L299 CfgBuilder]: Removed 123 assume(true) statements. [2021-10-28 23:16:59,935 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 11:16:59 BoogieIcfgContainer [2021-10-28 23:16:59,936 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-10-28 23:16:59,938 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2021-10-28 23:16:59,938 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2021-10-28 23:16:59,942 INFO L275 PluginConnector]: TraceAbstraction initialized [2021-10-28 23:16:59,942 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.10 11:16:58" (1/3) ... [2021-10-28 23:16:59,943 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@24f0c1c9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.10 11:16:59, skipping insertion in model container [2021-10-28 23:16:59,944 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.10 11:16:58" (2/3) ... [2021-10-28 23:16:59,944 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@24f0c1c9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.10 11:16:59, skipping insertion in model container [2021-10-28 23:16:59,944 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 11:16:59" (3/3) ... [2021-10-28 23:16:59,946 INFO L111 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_2.ufo.UNBOUNDED.pals.c [2021-10-28 23:16:59,952 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2021-10-28 23:16:59,952 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 23 error locations. [2021-10-28 23:17:00,012 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2021-10-28 23:17:00,020 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2021-10-28 23:17:00,020 INFO L340 AbstractCegarLoop]: Starting to check reachability of 23 error locations. [2021-10-28 23:17:00,046 INFO L276 IsEmpty]: Start isEmpty. Operand has 296 states, 272 states have (on average 1.7058823529411764) internal successors, (464), 295 states have internal predecessors, (464), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:00,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-28 23:17:00,054 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:00,055 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:00,056 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:00,062 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:00,063 INFO L85 PathProgramCache]: Analyzing trace with hash 349506240, now seen corresponding path program 1 times [2021-10-28 23:17:00,074 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:00,074 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [638182876] [2021-10-28 23:17:00,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:00,076 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:00,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:00,273 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:00,274 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:00,274 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [638182876] [2021-10-28 23:17:00,275 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [638182876] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:00,276 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:00,276 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-10-28 23:17:00,278 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2069219199] [2021-10-28 23:17:00,283 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2021-10-28 23:17:00,284 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:00,298 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-10-28 23:17:00,299 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-28 23:17:00,303 INFO L87 Difference]: Start difference. First operand has 296 states, 272 states have (on average 1.7058823529411764) internal successors, (464), 295 states have internal predecessors, (464), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:00,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:00,355 INFO L93 Difference]: Finished difference Result 572 states and 896 transitions. [2021-10-28 23:17:00,355 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-10-28 23:17:00,357 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-28 23:17:00,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:00,371 INFO L225 Difference]: With dead ends: 572 [2021-10-28 23:17:00,375 INFO L226 Difference]: Without dead ends: 292 [2021-10-28 23:17:00,383 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-10-28 23:17:00,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292 states. [2021-10-28 23:17:00,446 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292 to 292. [2021-10-28 23:17:00,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 292 states, 269 states have (on average 1.5910780669144982) internal successors, (428), 291 states have internal predecessors, (428), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:00,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 292 states to 292 states and 428 transitions. [2021-10-28 23:17:00,453 INFO L78 Accepts]: Start accepts. Automaton has 292 states and 428 transitions. Word has length 33 [2021-10-28 23:17:00,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:00,454 INFO L470 AbstractCegarLoop]: Abstraction has 292 states and 428 transitions. [2021-10-28 23:17:00,454 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 16.5) internal successors, (33), 2 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:00,454 INFO L276 IsEmpty]: Start isEmpty. Operand 292 states and 428 transitions. [2021-10-28 23:17:00,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2021-10-28 23:17:00,456 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:00,457 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:00,457 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2021-10-28 23:17:00,457 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:00,458 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:00,459 INFO L85 PathProgramCache]: Analyzing trace with hash -1047215368, now seen corresponding path program 1 times [2021-10-28 23:17:00,459 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:00,459 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1031802048] [2021-10-28 23:17:00,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:00,460 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:00,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:00,615 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:00,616 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:00,616 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1031802048] [2021-10-28 23:17:00,616 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1031802048] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:00,617 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:00,617 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:17:00,617 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1327637098] [2021-10-28 23:17:00,619 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:17:00,619 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:00,620 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:17:00,621 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:17:00,621 INFO L87 Difference]: Start difference. First operand 292 states and 428 transitions. Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:00,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:00,721 INFO L93 Difference]: Finished difference Result 570 states and 830 transitions. [2021-10-28 23:17:00,722 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 23:17:00,722 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2021-10-28 23:17:00,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:00,725 INFO L225 Difference]: With dead ends: 570 [2021-10-28 23:17:00,725 INFO L226 Difference]: Without dead ends: 292 [2021-10-28 23:17:00,727 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:17:00,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292 states. [2021-10-28 23:17:00,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292 to 292. [2021-10-28 23:17:00,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 292 states, 269 states have (on average 1.546468401486989) internal successors, (416), 291 states have internal predecessors, (416), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:00,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 292 states to 292 states and 416 transitions. [2021-10-28 23:17:00,760 INFO L78 Accepts]: Start accepts. Automaton has 292 states and 416 transitions. Word has length 33 [2021-10-28 23:17:00,760 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:00,760 INFO L470 AbstractCegarLoop]: Abstraction has 292 states and 416 transitions. [2021-10-28 23:17:00,760 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:00,761 INFO L276 IsEmpty]: Start isEmpty. Operand 292 states and 416 transitions. [2021-10-28 23:17:00,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2021-10-28 23:17:00,762 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:00,763 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:00,763 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2021-10-28 23:17:00,763 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:00,764 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:00,764 INFO L85 PathProgramCache]: Analyzing trace with hash -600938825, now seen corresponding path program 1 times [2021-10-28 23:17:00,764 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:00,764 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1140106934] [2021-10-28 23:17:00,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:00,783 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:00,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:00,960 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:00,961 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:00,962 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1140106934] [2021-10-28 23:17:00,965 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1140106934] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:00,965 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:00,965 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:17:00,965 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1332671141] [2021-10-28 23:17:00,966 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:17:00,966 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:00,967 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:17:00,967 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:17:00,967 INFO L87 Difference]: Start difference. First operand 292 states and 416 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:01,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:01,023 INFO L93 Difference]: Finished difference Result 600 states and 864 transitions. [2021-10-28 23:17:01,024 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:17:01,024 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2021-10-28 23:17:01,025 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:01,028 INFO L225 Difference]: With dead ends: 600 [2021-10-28 23:17:01,028 INFO L226 Difference]: Without dead ends: 325 [2021-10-28 23:17:01,029 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:17:01,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 325 states. [2021-10-28 23:17:01,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 325 to 268. [2021-10-28 23:17:01,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 268 states, 249 states have (on average 1.5261044176706828) internal successors, (380), 267 states have internal predecessors, (380), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:01,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 268 states to 268 states and 380 transitions. [2021-10-28 23:17:01,046 INFO L78 Accepts]: Start accepts. Automaton has 268 states and 380 transitions. Word has length 44 [2021-10-28 23:17:01,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:01,047 INFO L470 AbstractCegarLoop]: Abstraction has 268 states and 380 transitions. [2021-10-28 23:17:01,047 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:01,047 INFO L276 IsEmpty]: Start isEmpty. Operand 268 states and 380 transitions. [2021-10-28 23:17:01,049 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2021-10-28 23:17:01,049 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:01,050 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:01,050 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2021-10-28 23:17:01,050 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:01,051 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:01,051 INFO L85 PathProgramCache]: Analyzing trace with hash -1585020226, now seen corresponding path program 1 times [2021-10-28 23:17:01,051 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:01,052 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1267461938] [2021-10-28 23:17:01,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:01,052 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:01,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:01,183 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:01,183 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:01,183 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1267461938] [2021-10-28 23:17:01,184 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1267461938] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:01,184 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:01,184 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:17:01,184 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [826365392] [2021-10-28 23:17:01,185 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:17:01,185 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:01,186 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:17:01,186 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:17:01,187 INFO L87 Difference]: Start difference. First operand 268 states and 380 transitions. Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:01,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:01,224 INFO L93 Difference]: Finished difference Result 747 states and 1071 transitions. [2021-10-28 23:17:01,224 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:17:01,225 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 53 [2021-10-28 23:17:01,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:01,229 INFO L225 Difference]: With dead ends: 747 [2021-10-28 23:17:01,229 INFO L226 Difference]: Without dead ends: 496 [2021-10-28 23:17:01,230 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:17:01,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 496 states. [2021-10-28 23:17:01,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 496 to 303. [2021-10-28 23:17:01,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 303 states, 284 states have (on average 1.5211267605633803) internal successors, (432), 302 states have internal predecessors, (432), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:01,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 303 states to 303 states and 432 transitions. [2021-10-28 23:17:01,250 INFO L78 Accepts]: Start accepts. Automaton has 303 states and 432 transitions. Word has length 53 [2021-10-28 23:17:01,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:01,250 INFO L470 AbstractCegarLoop]: Abstraction has 303 states and 432 transitions. [2021-10-28 23:17:01,251 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:01,251 INFO L276 IsEmpty]: Start isEmpty. Operand 303 states and 432 transitions. [2021-10-28 23:17:01,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-28 23:17:01,254 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:01,254 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:01,254 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2021-10-28 23:17:01,255 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:01,255 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:01,255 INFO L85 PathProgramCache]: Analyzing trace with hash -1396202520, now seen corresponding path program 1 times [2021-10-28 23:17:01,255 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:01,256 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1578747761] [2021-10-28 23:17:01,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:01,256 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:01,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:01,332 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:01,333 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:01,333 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1578747761] [2021-10-28 23:17:01,333 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1578747761] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:01,334 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:01,334 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:17:01,334 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2075448944] [2021-10-28 23:17:01,335 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:17:01,335 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:01,336 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:17:01,336 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:17:01,336 INFO L87 Difference]: Start difference. First operand 303 states and 432 transitions. Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:01,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:01,407 INFO L93 Difference]: Finished difference Result 831 states and 1196 transitions. [2021-10-28 23:17:01,409 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:17:01,409 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-28 23:17:01,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:01,414 INFO L225 Difference]: With dead ends: 831 [2021-10-28 23:17:01,414 INFO L226 Difference]: Without dead ends: 545 [2021-10-28 23:17:01,415 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:17:01,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 545 states. [2021-10-28 23:17:01,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 545 to 328. [2021-10-28 23:17:01,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 328 states, 309 states have (on average 1.5210355987055015) internal successors, (470), 327 states have internal predecessors, (470), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:01,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328 states to 328 states and 470 transitions. [2021-10-28 23:17:01,435 INFO L78 Accepts]: Start accepts. Automaton has 328 states and 470 transitions. Word has length 54 [2021-10-28 23:17:01,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:01,435 INFO L470 AbstractCegarLoop]: Abstraction has 328 states and 470 transitions. [2021-10-28 23:17:01,436 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:01,436 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 470 transitions. [2021-10-28 23:17:01,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2021-10-28 23:17:01,439 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:01,439 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:01,440 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2021-10-28 23:17:01,440 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:01,440 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:01,441 INFO L85 PathProgramCache]: Analyzing trace with hash -716144150, now seen corresponding path program 1 times [2021-10-28 23:17:01,441 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:01,441 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2103587705] [2021-10-28 23:17:01,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:01,442 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:01,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:01,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:01,585 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:01,586 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2103587705] [2021-10-28 23:17:01,586 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2103587705] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:01,586 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:01,586 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:17:01,587 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [714810738] [2021-10-28 23:17:01,592 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 23:17:01,592 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:01,593 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 23:17:01,593 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:17:01,594 INFO L87 Difference]: Start difference. First operand 328 states and 470 transitions. Second operand has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:01,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:01,852 INFO L93 Difference]: Finished difference Result 1020 states and 1473 transitions. [2021-10-28 23:17:01,852 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 23:17:01,853 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2021-10-28 23:17:01,855 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:01,867 INFO L225 Difference]: With dead ends: 1020 [2021-10-28 23:17:01,867 INFO L226 Difference]: Without dead ends: 709 [2021-10-28 23:17:01,868 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-28 23:17:01,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 709 states. [2021-10-28 23:17:01,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 709 to 426. [2021-10-28 23:17:01,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 426 states, 407 states have (on average 1.4914004914004915) internal successors, (607), 425 states have internal predecessors, (607), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:01,897 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 426 states to 426 states and 607 transitions. [2021-10-28 23:17:01,897 INFO L78 Accepts]: Start accepts. Automaton has 426 states and 607 transitions. Word has length 54 [2021-10-28 23:17:01,898 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:01,898 INFO L470 AbstractCegarLoop]: Abstraction has 426 states and 607 transitions. [2021-10-28 23:17:01,898 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.8) internal successors, (54), 4 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:01,899 INFO L276 IsEmpty]: Start isEmpty. Operand 426 states and 607 transitions. [2021-10-28 23:17:01,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2021-10-28 23:17:01,906 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:01,906 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:01,906 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2021-10-28 23:17:01,907 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:01,907 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:01,907 INFO L85 PathProgramCache]: Analyzing trace with hash 153208358, now seen corresponding path program 1 times [2021-10-28 23:17:01,908 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:01,913 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [964273072] [2021-10-28 23:17:01,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:01,914 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:01,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:02,043 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:02,043 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:02,043 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [964273072] [2021-10-28 23:17:02,043 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [964273072] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:02,044 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:02,044 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:17:02,044 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [451447640] [2021-10-28 23:17:02,045 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 23:17:02,045 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:02,045 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 23:17:02,046 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:17:02,046 INFO L87 Difference]: Start difference. First operand 426 states and 607 transitions. Second operand has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:02,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:02,273 INFO L93 Difference]: Finished difference Result 1024 states and 1473 transitions. [2021-10-28 23:17:02,274 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-10-28 23:17:02,274 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 55 [2021-10-28 23:17:02,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:02,279 INFO L225 Difference]: With dead ends: 1024 [2021-10-28 23:17:02,279 INFO L226 Difference]: Without dead ends: 713 [2021-10-28 23:17:02,280 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2021-10-28 23:17:02,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 713 states. [2021-10-28 23:17:02,304 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 713 to 434. [2021-10-28 23:17:02,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 434 states, 415 states have (on average 1.4819277108433735) internal successors, (615), 433 states have internal predecessors, (615), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:02,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 434 states to 434 states and 615 transitions. [2021-10-28 23:17:02,308 INFO L78 Accepts]: Start accepts. Automaton has 434 states and 615 transitions. Word has length 55 [2021-10-28 23:17:02,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:02,308 INFO L470 AbstractCegarLoop]: Abstraction has 434 states and 615 transitions. [2021-10-28 23:17:02,308 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 4 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:02,308 INFO L276 IsEmpty]: Start isEmpty. Operand 434 states and 615 transitions. [2021-10-28 23:17:02,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2021-10-28 23:17:02,309 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:02,310 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:02,310 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2021-10-28 23:17:02,310 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:02,310 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:02,311 INFO L85 PathProgramCache]: Analyzing trace with hash -748848364, now seen corresponding path program 1 times [2021-10-28 23:17:02,311 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:02,311 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [781381751] [2021-10-28 23:17:02,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:02,312 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:02,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:02,453 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:02,454 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:02,454 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [781381751] [2021-10-28 23:17:02,454 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [781381751] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:02,454 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:02,455 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:17:02,455 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1356190463] [2021-10-28 23:17:02,455 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:17:02,455 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:02,456 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:17:02,456 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:17:02,456 INFO L87 Difference]: Start difference. First operand 434 states and 615 transitions. Second operand has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:02,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:02,668 INFO L93 Difference]: Finished difference Result 1024 states and 1465 transitions. [2021-10-28 23:17:02,668 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:17:02,668 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 57 [2021-10-28 23:17:02,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:02,674 INFO L225 Difference]: With dead ends: 1024 [2021-10-28 23:17:02,674 INFO L226 Difference]: Without dead ends: 713 [2021-10-28 23:17:02,676 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:17:02,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 713 states. [2021-10-28 23:17:02,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 713 to 434. [2021-10-28 23:17:02,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 434 states, 415 states have (on average 1.472289156626506) internal successors, (611), 433 states have internal predecessors, (611), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:02,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 434 states to 434 states and 611 transitions. [2021-10-28 23:17:02,717 INFO L78 Accepts]: Start accepts. Automaton has 434 states and 611 transitions. Word has length 57 [2021-10-28 23:17:02,718 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:02,718 INFO L470 AbstractCegarLoop]: Abstraction has 434 states and 611 transitions. [2021-10-28 23:17:02,718 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:02,719 INFO L276 IsEmpty]: Start isEmpty. Operand 434 states and 611 transitions. [2021-10-28 23:17:02,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2021-10-28 23:17:02,720 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:02,721 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:02,721 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2021-10-28 23:17:02,722 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:02,722 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:02,722 INFO L85 PathProgramCache]: Analyzing trace with hash 2035065116, now seen corresponding path program 1 times [2021-10-28 23:17:02,723 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:02,723 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1692061623] [2021-10-28 23:17:02,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:02,723 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:02,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:02,839 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:02,839 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:02,840 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1692061623] [2021-10-28 23:17:02,840 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1692061623] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:02,840 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:02,840 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:17:02,840 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [289898754] [2021-10-28 23:17:02,841 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:17:02,841 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:02,842 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:17:02,842 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:17:02,842 INFO L87 Difference]: Start difference. First operand 434 states and 611 transitions. Second operand has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:02,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:02,904 INFO L93 Difference]: Finished difference Result 872 states and 1252 transitions. [2021-10-28 23:17:02,904 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:17:02,904 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 58 [2021-10-28 23:17:02,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:02,908 INFO L225 Difference]: With dead ends: 872 [2021-10-28 23:17:02,908 INFO L226 Difference]: Without dead ends: 561 [2021-10-28 23:17:02,909 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:17:02,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 561 states. [2021-10-28 23:17:02,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 561 to 429. [2021-10-28 23:17:02,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 429 states, 411 states have (on average 1.467153284671533) internal successors, (603), 428 states have internal predecessors, (603), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:02,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 429 states to 429 states and 603 transitions. [2021-10-28 23:17:02,940 INFO L78 Accepts]: Start accepts. Automaton has 429 states and 603 transitions. Word has length 58 [2021-10-28 23:17:02,940 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:02,941 INFO L470 AbstractCegarLoop]: Abstraction has 429 states and 603 transitions. [2021-10-28 23:17:02,941 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:02,941 INFO L276 IsEmpty]: Start isEmpty. Operand 429 states and 603 transitions. [2021-10-28 23:17:02,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2021-10-28 23:17:02,943 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:02,943 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:02,943 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2021-10-28 23:17:02,943 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:02,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:02,944 INFO L85 PathProgramCache]: Analyzing trace with hash -1833641356, now seen corresponding path program 1 times [2021-10-28 23:17:02,944 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:02,945 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [263851078] [2021-10-28 23:17:02,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:02,946 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:02,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:03,056 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:03,056 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:03,056 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [263851078] [2021-10-28 23:17:03,056 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [263851078] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:03,056 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:03,056 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:17:03,057 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [347573433] [2021-10-28 23:17:03,057 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:17:03,057 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:03,058 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:17:03,058 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:17:03,059 INFO L87 Difference]: Start difference. First operand 429 states and 603 transitions. Second operand has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:03,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:03,153 INFO L93 Difference]: Finished difference Result 871 states and 1251 transitions. [2021-10-28 23:17:03,153 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:17:03,153 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 62 [2021-10-28 23:17:03,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:03,157 INFO L225 Difference]: With dead ends: 871 [2021-10-28 23:17:03,157 INFO L226 Difference]: Without dead ends: 565 [2021-10-28 23:17:03,158 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:17:03,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 565 states. [2021-10-28 23:17:03,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 565 to 409. [2021-10-28 23:17:03,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 409 states, 395 states have (on average 1.4455696202531645) internal successors, (571), 408 states have internal predecessors, (571), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:03,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 409 states to 409 states and 571 transitions. [2021-10-28 23:17:03,188 INFO L78 Accepts]: Start accepts. Automaton has 409 states and 571 transitions. Word has length 62 [2021-10-28 23:17:03,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:03,188 INFO L470 AbstractCegarLoop]: Abstraction has 409 states and 571 transitions. [2021-10-28 23:17:03,188 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 20.666666666666668) internal successors, (62), 3 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:03,189 INFO L276 IsEmpty]: Start isEmpty. Operand 409 states and 571 transitions. [2021-10-28 23:17:03,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2021-10-28 23:17:03,190 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:03,190 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:03,190 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2021-10-28 23:17:03,190 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:03,191 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:03,191 INFO L85 PathProgramCache]: Analyzing trace with hash -532758708, now seen corresponding path program 1 times [2021-10-28 23:17:03,191 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:03,193 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [949020035] [2021-10-28 23:17:03,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:03,194 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:03,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:03,286 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:03,286 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:03,286 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [949020035] [2021-10-28 23:17:03,286 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [949020035] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:03,286 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:03,287 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:17:03,287 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1432123951] [2021-10-28 23:17:03,287 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:17:03,288 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:03,289 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:17:03,290 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:17:03,290 INFO L87 Difference]: Start difference. First operand 409 states and 571 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:03,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:03,357 INFO L93 Difference]: Finished difference Result 839 states and 1195 transitions. [2021-10-28 23:17:03,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:17:03,357 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2021-10-28 23:17:03,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:03,362 INFO L225 Difference]: With dead ends: 839 [2021-10-28 23:17:03,362 INFO L226 Difference]: Without dead ends: 553 [2021-10-28 23:17:03,364 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:17:03,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2021-10-28 23:17:03,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 397. [2021-10-28 23:17:03,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 397 states, 385 states have (on average 1.4363636363636363) internal successors, (553), 396 states have internal predecessors, (553), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:03,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 397 states to 397 states and 553 transitions. [2021-10-28 23:17:03,396 INFO L78 Accepts]: Start accepts. Automaton has 397 states and 553 transitions. Word has length 66 [2021-10-28 23:17:03,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:03,397 INFO L470 AbstractCegarLoop]: Abstraction has 397 states and 553 transitions. [2021-10-28 23:17:03,397 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 3 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:03,397 INFO L276 IsEmpty]: Start isEmpty. Operand 397 states and 553 transitions. [2021-10-28 23:17:03,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2021-10-28 23:17:03,398 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:03,398 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:03,398 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2021-10-28 23:17:03,398 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:03,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:03,404 INFO L85 PathProgramCache]: Analyzing trace with hash 949999250, now seen corresponding path program 1 times [2021-10-28 23:17:03,404 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:03,404 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2085484516] [2021-10-28 23:17:03,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:03,405 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:03,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:03,494 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:03,494 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:03,494 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2085484516] [2021-10-28 23:17:03,497 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2085484516] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:03,497 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:03,498 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:17:03,498 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [454085911] [2021-10-28 23:17:03,498 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:17:03,498 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:03,499 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:17:03,499 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:17:03,499 INFO L87 Difference]: Start difference. First operand 397 states and 553 transitions. Second operand has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:03,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:03,584 INFO L93 Difference]: Finished difference Result 835 states and 1187 transitions. [2021-10-28 23:17:03,585 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:17:03,585 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 67 [2021-10-28 23:17:03,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:03,590 INFO L225 Difference]: With dead ends: 835 [2021-10-28 23:17:03,590 INFO L226 Difference]: Without dead ends: 561 [2021-10-28 23:17:03,591 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:17:03,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 561 states. [2021-10-28 23:17:03,618 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 561 to 377. [2021-10-28 23:17:03,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 377 states, 369 states have (on average 1.4119241192411924) internal successors, (521), 376 states have internal predecessors, (521), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:03,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 377 states to 377 states and 521 transitions. [2021-10-28 23:17:03,621 INFO L78 Accepts]: Start accepts. Automaton has 377 states and 521 transitions. Word has length 67 [2021-10-28 23:17:03,622 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:03,622 INFO L470 AbstractCegarLoop]: Abstraction has 377 states and 521 transitions. [2021-10-28 23:17:03,622 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:03,622 INFO L276 IsEmpty]: Start isEmpty. Operand 377 states and 521 transitions. [2021-10-28 23:17:03,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2021-10-28 23:17:03,623 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:03,623 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:03,623 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2021-10-28 23:17:03,624 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:03,624 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:03,624 INFO L85 PathProgramCache]: Analyzing trace with hash -448644128, now seen corresponding path program 1 times [2021-10-28 23:17:03,624 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:03,625 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1073580095] [2021-10-28 23:17:03,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:03,625 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:03,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:03,792 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:03,793 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:03,793 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1073580095] [2021-10-28 23:17:03,793 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1073580095] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:03,793 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:03,793 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:17:03,793 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1291002668] [2021-10-28 23:17:03,794 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:17:03,794 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:03,794 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:17:03,795 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:17:03,795 INFO L87 Difference]: Start difference. First operand 377 states and 521 transitions. Second operand has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:04,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:04,002 INFO L93 Difference]: Finished difference Result 1127 states and 1582 transitions. [2021-10-28 23:17:04,002 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 23:17:04,002 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 72 [2021-10-28 23:17:04,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:04,008 INFO L225 Difference]: With dead ends: 1127 [2021-10-28 23:17:04,009 INFO L226 Difference]: Without dead ends: 873 [2021-10-28 23:17:04,010 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-28 23:17:04,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 873 states. [2021-10-28 23:17:04,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 873 to 427. [2021-10-28 23:17:04,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 427 states, 419 states have (on average 1.405727923627685) internal successors, (589), 426 states have internal predecessors, (589), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:04,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 427 states to 427 states and 589 transitions. [2021-10-28 23:17:04,059 INFO L78 Accepts]: Start accepts. Automaton has 427 states and 589 transitions. Word has length 72 [2021-10-28 23:17:04,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:04,060 INFO L470 AbstractCegarLoop]: Abstraction has 427 states and 589 transitions. [2021-10-28 23:17:04,060 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.0) internal successors, (72), 6 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:04,060 INFO L276 IsEmpty]: Start isEmpty. Operand 427 states and 589 transitions. [2021-10-28 23:17:04,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2021-10-28 23:17:04,061 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:04,062 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:04,062 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2021-10-28 23:17:04,062 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:04,063 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:04,063 INFO L85 PathProgramCache]: Analyzing trace with hash 534764451, now seen corresponding path program 1 times [2021-10-28 23:17:04,063 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:04,063 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1982473441] [2021-10-28 23:17:04,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:04,063 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:04,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:04,153 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:04,153 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:04,153 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1982473441] [2021-10-28 23:17:04,153 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1982473441] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:04,153 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:04,153 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:17:04,154 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1932576261] [2021-10-28 23:17:04,154 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:17:04,154 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:04,155 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:17:04,155 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:17:04,155 INFO L87 Difference]: Start difference. First operand 427 states and 589 transitions. Second operand has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:04,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:04,240 INFO L93 Difference]: Finished difference Result 760 states and 1066 transitions. [2021-10-28 23:17:04,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:17:04,241 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 73 [2021-10-28 23:17:04,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:04,244 INFO L225 Difference]: With dead ends: 760 [2021-10-28 23:17:04,245 INFO L226 Difference]: Without dead ends: 506 [2021-10-28 23:17:04,246 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:17:04,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 506 states. [2021-10-28 23:17:04,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 506 to 423. [2021-10-28 23:17:04,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 423 states, 416 states have (on average 1.3990384615384615) internal successors, (582), 422 states have internal predecessors, (582), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:04,310 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 423 states to 423 states and 582 transitions. [2021-10-28 23:17:04,311 INFO L78 Accepts]: Start accepts. Automaton has 423 states and 582 transitions. Word has length 73 [2021-10-28 23:17:04,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:04,311 INFO L470 AbstractCegarLoop]: Abstraction has 423 states and 582 transitions. [2021-10-28 23:17:04,312 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:04,312 INFO L276 IsEmpty]: Start isEmpty. Operand 423 states and 582 transitions. [2021-10-28 23:17:04,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2021-10-28 23:17:04,313 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:04,313 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:04,313 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2021-10-28 23:17:04,314 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:04,314 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:04,314 INFO L85 PathProgramCache]: Analyzing trace with hash -344815767, now seen corresponding path program 1 times [2021-10-28 23:17:04,314 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:04,315 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [169235821] [2021-10-28 23:17:04,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:04,315 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:04,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:04,392 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:04,392 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:04,393 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [169235821] [2021-10-28 23:17:04,393 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [169235821] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:04,393 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:04,393 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:17:04,393 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1054857620] [2021-10-28 23:17:04,394 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:17:04,394 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:04,394 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:17:04,395 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:17:04,395 INFO L87 Difference]: Start difference. First operand 423 states and 582 transitions. Second operand has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:04,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:04,488 INFO L93 Difference]: Finished difference Result 859 states and 1203 transitions. [2021-10-28 23:17:04,489 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:17:04,489 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 73 [2021-10-28 23:17:04,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:04,493 INFO L225 Difference]: With dead ends: 859 [2021-10-28 23:17:04,493 INFO L226 Difference]: Without dead ends: 592 [2021-10-28 23:17:04,494 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:17:04,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 592 states. [2021-10-28 23:17:04,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 592 to 407. [2021-10-28 23:17:04,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 407 states, 402 states have (on average 1.3830845771144278) internal successors, (556), 406 states have internal predecessors, (556), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:04,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 407 states to 407 states and 556 transitions. [2021-10-28 23:17:04,537 INFO L78 Accepts]: Start accepts. Automaton has 407 states and 556 transitions. Word has length 73 [2021-10-28 23:17:04,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:04,537 INFO L470 AbstractCegarLoop]: Abstraction has 407 states and 556 transitions. [2021-10-28 23:17:04,537 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 24.333333333333332) internal successors, (73), 3 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:04,537 INFO L276 IsEmpty]: Start isEmpty. Operand 407 states and 556 transitions. [2021-10-28 23:17:04,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-28 23:17:04,538 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:04,539 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:04,539 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2021-10-28 23:17:04,539 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:04,539 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:04,540 INFO L85 PathProgramCache]: Analyzing trace with hash 317146558, now seen corresponding path program 1 times [2021-10-28 23:17:04,540 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:04,540 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1752089878] [2021-10-28 23:17:04,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:04,540 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:04,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:04,657 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:04,657 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:04,658 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1752089878] [2021-10-28 23:17:04,658 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1752089878] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:04,658 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:04,658 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-28 23:17:04,658 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [257515270] [2021-10-28 23:17:04,659 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-28 23:17:04,659 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:04,659 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 23:17:04,659 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2021-10-28 23:17:04,660 INFO L87 Difference]: Start difference. First operand 407 states and 556 transitions. Second operand has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:05,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:05,113 INFO L93 Difference]: Finished difference Result 1397 states and 1937 transitions. [2021-10-28 23:17:05,114 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:17:05,114 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-28 23:17:05,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:05,122 INFO L225 Difference]: With dead ends: 1397 [2021-10-28 23:17:05,123 INFO L226 Difference]: Without dead ends: 1141 [2021-10-28 23:17:05,124 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-28 23:17:05,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1141 states. [2021-10-28 23:17:05,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1141 to 435. [2021-10-28 23:17:05,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 435 states, 430 states have (on average 1.3674418604651162) internal successors, (588), 434 states have internal predecessors, (588), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:05,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 435 states to 435 states and 588 transitions. [2021-10-28 23:17:05,184 INFO L78 Accepts]: Start accepts. Automaton has 435 states and 588 transitions. Word has length 76 [2021-10-28 23:17:05,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:05,184 INFO L470 AbstractCegarLoop]: Abstraction has 435 states and 588 transitions. [2021-10-28 23:17:05,184 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 7 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:05,184 INFO L276 IsEmpty]: Start isEmpty. Operand 435 states and 588 transitions. [2021-10-28 23:17:05,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2021-10-28 23:17:05,186 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:05,186 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:05,186 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2021-10-28 23:17:05,187 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:05,187 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:05,187 INFO L85 PathProgramCache]: Analyzing trace with hash 917353494, now seen corresponding path program 1 times [2021-10-28 23:17:05,187 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:05,188 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1543986713] [2021-10-28 23:17:05,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:05,188 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:05,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:05,245 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:05,246 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:05,246 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1543986713] [2021-10-28 23:17:05,246 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1543986713] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:05,246 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:05,246 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:17:05,247 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [629631512] [2021-10-28 23:17:05,247 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:17:05,247 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:05,248 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:17:05,248 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:17:05,249 INFO L87 Difference]: Start difference. First operand 435 states and 588 transitions. Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:05,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:05,429 INFO L93 Difference]: Finished difference Result 1111 states and 1515 transitions. [2021-10-28 23:17:05,429 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:17:05,429 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 76 [2021-10-28 23:17:05,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:05,435 INFO L225 Difference]: With dead ends: 1111 [2021-10-28 23:17:05,435 INFO L226 Difference]: Without dead ends: 849 [2021-10-28 23:17:05,436 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:17:05,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 849 states. [2021-10-28 23:17:05,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 849 to 656. [2021-10-28 23:17:05,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 656 states, 651 states have (on average 1.348694316436252) internal successors, (878), 655 states have internal predecessors, (878), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:05,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 656 states to 656 states and 878 transitions. [2021-10-28 23:17:05,538 INFO L78 Accepts]: Start accepts. Automaton has 656 states and 878 transitions. Word has length 76 [2021-10-28 23:17:05,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:05,539 INFO L470 AbstractCegarLoop]: Abstraction has 656 states and 878 transitions. [2021-10-28 23:17:05,539 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:05,539 INFO L276 IsEmpty]: Start isEmpty. Operand 656 states and 878 transitions. [2021-10-28 23:17:05,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-10-28 23:17:05,541 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:05,541 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:05,541 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2021-10-28 23:17:05,541 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:05,542 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:05,542 INFO L85 PathProgramCache]: Analyzing trace with hash -480894404, now seen corresponding path program 1 times [2021-10-28 23:17:05,542 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:05,542 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [671350943] [2021-10-28 23:17:05,543 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:05,543 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:05,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:05,638 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:05,639 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:05,639 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [671350943] [2021-10-28 23:17:05,639 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [671350943] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:05,639 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:05,639 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:17:05,640 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1552649438] [2021-10-28 23:17:05,640 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:17:05,641 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:05,641 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:17:05,642 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:17:05,642 INFO L87 Difference]: Start difference. First operand 656 states and 878 transitions. Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:05,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:05,878 INFO L93 Difference]: Finished difference Result 1019 states and 1388 transitions. [2021-10-28 23:17:05,879 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-10-28 23:17:05,879 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-10-28 23:17:05,880 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:05,887 INFO L225 Difference]: With dead ends: 1019 [2021-10-28 23:17:05,887 INFO L226 Difference]: Without dead ends: 1017 [2021-10-28 23:17:05,888 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-28 23:17:05,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1017 states. [2021-10-28 23:17:05,962 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1017 to 658. [2021-10-28 23:17:05,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 658 states, 653 states have (on average 1.3476263399693722) internal successors, (880), 657 states have internal predecessors, (880), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:05,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 658 states to 658 states and 880 transitions. [2021-10-28 23:17:05,968 INFO L78 Accepts]: Start accepts. Automaton has 658 states and 880 transitions. Word has length 77 [2021-10-28 23:17:05,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:05,968 INFO L470 AbstractCegarLoop]: Abstraction has 658 states and 880 transitions. [2021-10-28 23:17:05,969 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:05,969 INFO L276 IsEmpty]: Start isEmpty. Operand 658 states and 880 transitions. [2021-10-28 23:17:05,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2021-10-28 23:17:05,971 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:05,971 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:05,971 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2021-10-28 23:17:05,972 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:05,972 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:05,972 INFO L85 PathProgramCache]: Analyzing trace with hash 1699767669, now seen corresponding path program 1 times [2021-10-28 23:17:05,972 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:05,973 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [582266870] [2021-10-28 23:17:05,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:05,973 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:06,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:06,167 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:06,167 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:06,167 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [582266870] [2021-10-28 23:17:06,167 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [582266870] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:06,168 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:06,168 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:17:06,168 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1649055121] [2021-10-28 23:17:06,169 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:17:06,169 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:06,169 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:17:06,170 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:17:06,170 INFO L87 Difference]: Start difference. First operand 658 states and 880 transitions. Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:06,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:06,558 INFO L93 Difference]: Finished difference Result 1981 states and 2732 transitions. [2021-10-28 23:17:06,559 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 23:17:06,559 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 77 [2021-10-28 23:17:06,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:06,569 INFO L225 Difference]: With dead ends: 1981 [2021-10-28 23:17:06,570 INFO L226 Difference]: Without dead ends: 1602 [2021-10-28 23:17:06,571 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2021-10-28 23:17:06,574 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1602 states. [2021-10-28 23:17:06,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1602 to 646. [2021-10-28 23:17:06,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 646 states, 641 states have (on average 1.3510140405616224) internal successors, (866), 645 states have internal predecessors, (866), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:06,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 646 states to 646 states and 866 transitions. [2021-10-28 23:17:06,666 INFO L78 Accepts]: Start accepts. Automaton has 646 states and 866 transitions. Word has length 77 [2021-10-28 23:17:06,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:06,666 INFO L470 AbstractCegarLoop]: Abstraction has 646 states and 866 transitions. [2021-10-28 23:17:06,667 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:06,667 INFO L276 IsEmpty]: Start isEmpty. Operand 646 states and 866 transitions. [2021-10-28 23:17:06,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-28 23:17:06,668 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:06,668 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:06,669 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2021-10-28 23:17:06,669 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:06,670 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:06,670 INFO L85 PathProgramCache]: Analyzing trace with hash 239208754, now seen corresponding path program 1 times [2021-10-28 23:17:06,670 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:06,670 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [703480163] [2021-10-28 23:17:06,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:06,671 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:06,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:06,765 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:06,765 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:06,765 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [703480163] [2021-10-28 23:17:06,765 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [703480163] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:06,765 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:06,766 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:17:06,766 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [119278004] [2021-10-28 23:17:06,766 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:17:06,766 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:06,767 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:17:06,767 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:17:06,767 INFO L87 Difference]: Start difference. First operand 646 states and 866 transitions. Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:07,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:07,017 INFO L93 Difference]: Finished difference Result 1537 states and 2160 transitions. [2021-10-28 23:17:07,017 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:17:07,017 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-28 23:17:07,018 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:07,026 INFO L225 Difference]: With dead ends: 1537 [2021-10-28 23:17:07,026 INFO L226 Difference]: Without dead ends: 1158 [2021-10-28 23:17:07,027 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2021-10-28 23:17:07,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1158 states. [2021-10-28 23:17:07,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1158 to 652. [2021-10-28 23:17:07,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 652 states, 647 states have (on average 1.3477588871715611) internal successors, (872), 651 states have internal predecessors, (872), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:07,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 652 states to 652 states and 872 transitions. [2021-10-28 23:17:07,115 INFO L78 Accepts]: Start accepts. Automaton has 652 states and 872 transitions. Word has length 78 [2021-10-28 23:17:07,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:07,116 INFO L470 AbstractCegarLoop]: Abstraction has 652 states and 872 transitions. [2021-10-28 23:17:07,116 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:07,116 INFO L276 IsEmpty]: Start isEmpty. Operand 652 states and 872 transitions. [2021-10-28 23:17:07,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-28 23:17:07,118 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:07,118 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:07,118 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2021-10-28 23:17:07,118 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:07,119 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:07,119 INFO L85 PathProgramCache]: Analyzing trace with hash 341178161, now seen corresponding path program 1 times [2021-10-28 23:17:07,119 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:07,119 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [779458292] [2021-10-28 23:17:07,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:07,120 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:07,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:07,187 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:07,187 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:07,187 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [779458292] [2021-10-28 23:17:07,187 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [779458292] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:07,188 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:07,188 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:17:07,188 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [667269687] [2021-10-28 23:17:07,189 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:17:07,190 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:07,191 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:17:07,191 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:17:07,191 INFO L87 Difference]: Start difference. First operand 652 states and 872 transitions. Second operand has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:07,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:07,455 INFO L93 Difference]: Finished difference Result 1507 states and 2024 transitions. [2021-10-28 23:17:07,456 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:17:07,456 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-28 23:17:07,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:07,463 INFO L225 Difference]: With dead ends: 1507 [2021-10-28 23:17:07,463 INFO L226 Difference]: Without dead ends: 1104 [2021-10-28 23:17:07,465 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:17:07,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1104 states. [2021-10-28 23:17:07,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1104 to 850. [2021-10-28 23:17:07,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 850 states, 845 states have (on average 1.3396449704142013) internal successors, (1132), 849 states have internal predecessors, (1132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:07,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 850 states to 850 states and 1132 transitions. [2021-10-28 23:17:07,587 INFO L78 Accepts]: Start accepts. Automaton has 850 states and 1132 transitions. Word has length 78 [2021-10-28 23:17:07,587 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:07,587 INFO L470 AbstractCegarLoop]: Abstraction has 850 states and 1132 transitions. [2021-10-28 23:17:07,588 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:07,588 INFO L276 IsEmpty]: Start isEmpty. Operand 850 states and 1132 transitions. [2021-10-28 23:17:07,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2021-10-28 23:17:07,589 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:07,590 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:07,590 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2021-10-28 23:17:07,590 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:07,590 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:07,591 INFO L85 PathProgramCache]: Analyzing trace with hash -1360037685, now seen corresponding path program 1 times [2021-10-28 23:17:07,591 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:07,591 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [966171790] [2021-10-28 23:17:07,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:07,591 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:07,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:07,716 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:07,716 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:07,716 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [966171790] [2021-10-28 23:17:07,716 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [966171790] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:07,717 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:07,717 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:17:07,717 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1491224595] [2021-10-28 23:17:07,717 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:17:07,718 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:07,718 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:17:07,718 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:17:07,719 INFO L87 Difference]: Start difference. First operand 850 states and 1132 transitions. Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:08,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:08,385 INFO L93 Difference]: Finished difference Result 3240 states and 4364 transitions. [2021-10-28 23:17:08,385 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:17:08,386 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 78 [2021-10-28 23:17:08,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:08,402 INFO L225 Difference]: With dead ends: 3240 [2021-10-28 23:17:08,402 INFO L226 Difference]: Without dead ends: 2706 [2021-10-28 23:17:08,405 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-28 23:17:08,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2706 states. [2021-10-28 23:17:08,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2706 to 900. [2021-10-28 23:17:08,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 900 states, 895 states have (on average 1.336312849162011) internal successors, (1196), 899 states have internal predecessors, (1196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:08,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 900 states to 900 states and 1196 transitions. [2021-10-28 23:17:08,542 INFO L78 Accepts]: Start accepts. Automaton has 900 states and 1196 transitions. Word has length 78 [2021-10-28 23:17:08,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:08,542 INFO L470 AbstractCegarLoop]: Abstraction has 900 states and 1196 transitions. [2021-10-28 23:17:08,543 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:08,543 INFO L276 IsEmpty]: Start isEmpty. Operand 900 states and 1196 transitions. [2021-10-28 23:17:08,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2021-10-28 23:17:08,544 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:08,545 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:08,545 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2021-10-28 23:17:08,545 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:08,545 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:08,546 INFO L85 PathProgramCache]: Analyzing trace with hash -504696615, now seen corresponding path program 1 times [2021-10-28 23:17:08,546 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:08,546 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1826001244] [2021-10-28 23:17:08,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:08,546 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:08,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:08,607 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:08,607 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:08,607 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1826001244] [2021-10-28 23:17:08,607 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1826001244] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:08,608 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:08,608 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:17:08,608 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [193665083] [2021-10-28 23:17:08,608 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:17:08,609 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:08,610 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:17:08,610 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:17:08,611 INFO L87 Difference]: Start difference. First operand 900 states and 1196 transitions. Second operand has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:08,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:08,898 INFO L93 Difference]: Finished difference Result 2315 states and 3085 transitions. [2021-10-28 23:17:08,899 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:17:08,899 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 79 [2021-10-28 23:17:08,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:08,910 INFO L225 Difference]: With dead ends: 2315 [2021-10-28 23:17:08,910 INFO L226 Difference]: Without dead ends: 1728 [2021-10-28 23:17:08,912 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:17:08,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1728 states. [2021-10-28 23:17:09,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1728 to 1255. [2021-10-28 23:17:09,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1255 states, 1250 states have (on average 1.3248) internal successors, (1656), 1254 states have internal predecessors, (1656), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:09,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1255 states to 1255 states and 1656 transitions. [2021-10-28 23:17:09,070 INFO L78 Accepts]: Start accepts. Automaton has 1255 states and 1656 transitions. Word has length 79 [2021-10-28 23:17:09,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:09,071 INFO L470 AbstractCegarLoop]: Abstraction has 1255 states and 1656 transitions. [2021-10-28 23:17:09,071 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.75) internal successors, (79), 4 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:09,071 INFO L276 IsEmpty]: Start isEmpty. Operand 1255 states and 1656 transitions. [2021-10-28 23:17:09,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2021-10-28 23:17:09,073 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:09,073 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:09,073 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2021-10-28 23:17:09,074 INFO L402 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:09,074 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:09,074 INFO L85 PathProgramCache]: Analyzing trace with hash -676572605, now seen corresponding path program 1 times [2021-10-28 23:17:09,074 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:09,075 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [190730097] [2021-10-28 23:17:09,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:09,075 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:09,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:09,121 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:09,121 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:09,121 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [190730097] [2021-10-28 23:17:09,122 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [190730097] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:09,122 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:09,122 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:17:09,122 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1654831514] [2021-10-28 23:17:09,123 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:17:09,123 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:09,123 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:17:09,123 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:17:09,124 INFO L87 Difference]: Start difference. First operand 1255 states and 1656 transitions. Second operand has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:09,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:09,463 INFO L93 Difference]: Finished difference Result 3061 states and 4041 transitions. [2021-10-28 23:17:09,464 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:17:09,464 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 80 [2021-10-28 23:17:09,464 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:09,475 INFO L225 Difference]: With dead ends: 3061 [2021-10-28 23:17:09,476 INFO L226 Difference]: Without dead ends: 2076 [2021-10-28 23:17:09,478 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:17:09,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2076 states. [2021-10-28 23:17:09,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2076 to 1257. [2021-10-28 23:17:09,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1257 states, 1252 states have (on average 1.3242811501597445) internal successors, (1658), 1256 states have internal predecessors, (1658), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:09,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1257 states to 1257 states and 1658 transitions. [2021-10-28 23:17:09,645 INFO L78 Accepts]: Start accepts. Automaton has 1257 states and 1658 transitions. Word has length 80 [2021-10-28 23:17:09,646 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:09,646 INFO L470 AbstractCegarLoop]: Abstraction has 1257 states and 1658 transitions. [2021-10-28 23:17:09,646 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:09,646 INFO L276 IsEmpty]: Start isEmpty. Operand 1257 states and 1658 transitions. [2021-10-28 23:17:09,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2021-10-28 23:17:09,648 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:09,648 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:09,648 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2021-10-28 23:17:09,648 INFO L402 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:09,649 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:09,649 INFO L85 PathProgramCache]: Analyzing trace with hash -659983772, now seen corresponding path program 1 times [2021-10-28 23:17:09,649 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:09,649 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [961233661] [2021-10-28 23:17:09,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:09,650 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:09,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:09,733 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:09,733 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:09,733 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [961233661] [2021-10-28 23:17:09,733 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [961233661] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:09,733 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:09,733 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:17:09,734 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [222245698] [2021-10-28 23:17:09,734 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:17:09,734 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:09,734 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:17:09,735 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:17:09,735 INFO L87 Difference]: Start difference. First operand 1257 states and 1658 transitions. Second operand has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:10,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:10,029 INFO L93 Difference]: Finished difference Result 2597 states and 3427 transitions. [2021-10-28 23:17:10,029 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:17:10,030 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 81 [2021-10-28 23:17:10,030 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:10,039 INFO L225 Difference]: With dead ends: 2597 [2021-10-28 23:17:10,039 INFO L226 Difference]: Without dead ends: 1416 [2021-10-28 23:17:10,042 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:17:10,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1416 states. [2021-10-28 23:17:10,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1416 to 1054. [2021-10-28 23:17:10,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1054 states, 1049 states have (on average 1.321258341277407) internal successors, (1386), 1053 states have internal predecessors, (1386), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:10,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1054 states to 1054 states and 1386 transitions. [2021-10-28 23:17:10,203 INFO L78 Accepts]: Start accepts. Automaton has 1054 states and 1386 transitions. Word has length 81 [2021-10-28 23:17:10,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:10,204 INFO L470 AbstractCegarLoop]: Abstraction has 1054 states and 1386 transitions. [2021-10-28 23:17:10,204 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.25) internal successors, (81), 4 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:10,204 INFO L276 IsEmpty]: Start isEmpty. Operand 1054 states and 1386 transitions. [2021-10-28 23:17:10,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2021-10-28 23:17:10,206 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:10,206 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:10,206 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2021-10-28 23:17:10,207 INFO L402 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:10,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:10,207 INFO L85 PathProgramCache]: Analyzing trace with hash -63459148, now seen corresponding path program 1 times [2021-10-28 23:17:10,208 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:10,208 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2086279965] [2021-10-28 23:17:10,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:10,208 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:10,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:10,266 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:10,267 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:10,267 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2086279965] [2021-10-28 23:17:10,267 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2086279965] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:10,267 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:10,268 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-10-28 23:17:10,268 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1884161483] [2021-10-28 23:17:10,269 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2021-10-28 23:17:10,269 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:10,270 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-10-28 23:17:10,270 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:17:10,270 INFO L87 Difference]: Start difference. First operand 1054 states and 1386 transitions. Second operand has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:10,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:10,588 INFO L93 Difference]: Finished difference Result 2488 states and 3290 transitions. [2021-10-28 23:17:10,589 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-10-28 23:17:10,589 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 82 [2021-10-28 23:17:10,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:10,598 INFO L225 Difference]: With dead ends: 2488 [2021-10-28 23:17:10,598 INFO L226 Difference]: Without dead ends: 1583 [2021-10-28 23:17:10,600 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-10-28 23:17:10,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1583 states. [2021-10-28 23:17:10,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1583 to 1060. [2021-10-28 23:17:10,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1060 states, 1055 states have (on average 1.3194312796208532) internal successors, (1392), 1059 states have internal predecessors, (1392), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:10,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1060 states to 1060 states and 1392 transitions. [2021-10-28 23:17:10,740 INFO L78 Accepts]: Start accepts. Automaton has 1060 states and 1392 transitions. Word has length 82 [2021-10-28 23:17:10,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:10,741 INFO L470 AbstractCegarLoop]: Abstraction has 1060 states and 1392 transitions. [2021-10-28 23:17:10,741 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 3 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:10,741 INFO L276 IsEmpty]: Start isEmpty. Operand 1060 states and 1392 transitions. [2021-10-28 23:17:10,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2021-10-28 23:17:10,742 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:10,743 INFO L513 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:10,743 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2021-10-28 23:17:10,743 INFO L402 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:10,744 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:10,744 INFO L85 PathProgramCache]: Analyzing trace with hash -753963456, now seen corresponding path program 1 times [2021-10-28 23:17:10,744 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:10,744 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [466679731] [2021-10-28 23:17:10,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:10,744 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:10,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:10,811 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:10,811 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:10,811 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [466679731] [2021-10-28 23:17:10,811 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [466679731] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:10,812 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:10,812 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:17:10,812 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1670795031] [2021-10-28 23:17:10,812 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:17:10,813 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:10,813 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:17:10,813 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:17:10,813 INFO L87 Difference]: Start difference. First operand 1060 states and 1392 transitions. Second operand has 4 states, 4 states have (on average 20.5) internal successors, (82), 4 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:11,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:11,039 INFO L93 Difference]: Finished difference Result 2437 states and 3211 transitions. [2021-10-28 23:17:11,039 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:17:11,039 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 20.5) internal successors, (82), 4 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 82 [2021-10-28 23:17:11,040 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:11,057 INFO L225 Difference]: With dead ends: 2437 [2021-10-28 23:17:11,062 INFO L226 Difference]: Without dead ends: 1476 [2021-10-28 23:17:11,064 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:17:11,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1476 states. [2021-10-28 23:17:11,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1476 to 1000. [2021-10-28 23:17:11,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1000 states, 995 states have (on average 1.3145728643216081) internal successors, (1308), 999 states have internal predecessors, (1308), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:11,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1000 states to 1000 states and 1308 transitions. [2021-10-28 23:17:11,218 INFO L78 Accepts]: Start accepts. Automaton has 1000 states and 1308 transitions. Word has length 82 [2021-10-28 23:17:11,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:11,218 INFO L470 AbstractCegarLoop]: Abstraction has 1000 states and 1308 transitions. [2021-10-28 23:17:11,219 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 20.5) internal successors, (82), 4 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:11,219 INFO L276 IsEmpty]: Start isEmpty. Operand 1000 states and 1308 transitions. [2021-10-28 23:17:11,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2021-10-28 23:17:11,222 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:11,222 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:11,222 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2021-10-28 23:17:11,223 INFO L402 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:11,223 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:11,223 INFO L85 PathProgramCache]: Analyzing trace with hash 196290815, now seen corresponding path program 1 times [2021-10-28 23:17:11,224 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:11,224 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1229702003] [2021-10-28 23:17:11,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:11,225 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:11,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:11,397 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:11,398 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:11,398 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1229702003] [2021-10-28 23:17:11,398 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1229702003] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:17:11,398 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1574032906] [2021-10-28 23:17:11,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:11,399 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:17:11,399 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:17:11,402 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:17:11,436 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-10-28 23:17:11,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:11,671 INFO L263 TraceCheckSpWp]: Trace formula consists of 712 conjuncts, 10 conjunts are in the unsatisfiable core [2021-10-28 23:17:11,695 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:17:12,318 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2021-10-28 23:17:12,319 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1574032906] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:12,319 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-28 23:17:12,319 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2021-10-28 23:17:12,321 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1482610987] [2021-10-28 23:17:12,322 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:17:12,322 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:12,322 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:17:12,323 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2021-10-28 23:17:12,323 INFO L87 Difference]: Start difference. First operand 1000 states and 1308 transitions. Second operand has 6 states, 6 states have (on average 21.0) internal successors, (126), 6 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:12,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:12,882 INFO L93 Difference]: Finished difference Result 2594 states and 3522 transitions. [2021-10-28 23:17:12,882 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:17:12,883 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.0) internal successors, (126), 6 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 127 [2021-10-28 23:17:12,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:12,902 INFO L225 Difference]: With dead ends: 2594 [2021-10-28 23:17:12,902 INFO L226 Difference]: Without dead ends: 1781 [2021-10-28 23:17:12,904 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 124 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2021-10-28 23:17:12,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1781 states. [2021-10-28 23:17:13,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1781 to 1000. [2021-10-28 23:17:13,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1000 states, 995 states have (on average 1.31356783919598) internal successors, (1307), 999 states have internal predecessors, (1307), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:13,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1000 states to 1000 states and 1307 transitions. [2021-10-28 23:17:13,110 INFO L78 Accepts]: Start accepts. Automaton has 1000 states and 1307 transitions. Word has length 127 [2021-10-28 23:17:13,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:13,110 INFO L470 AbstractCegarLoop]: Abstraction has 1000 states and 1307 transitions. [2021-10-28 23:17:13,110 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.0) internal successors, (126), 6 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:13,111 INFO L276 IsEmpty]: Start isEmpty. Operand 1000 states and 1307 transitions. [2021-10-28 23:17:13,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2021-10-28 23:17:13,114 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:13,114 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:13,161 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-10-28 23:17:13,341 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2021-10-28 23:17:13,341 INFO L402 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:13,342 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:13,342 INFO L85 PathProgramCache]: Analyzing trace with hash 537443172, now seen corresponding path program 1 times [2021-10-28 23:17:13,342 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:13,342 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1193869449] [2021-10-28 23:17:13,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:13,342 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:13,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:13,534 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 18 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:13,534 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:13,534 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1193869449] [2021-10-28 23:17:13,535 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1193869449] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:17:13,535 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [48856881] [2021-10-28 23:17:13,535 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:13,535 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:17:13,536 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:17:13,537 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:17:13,566 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-10-28 23:17:13,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:13,815 INFO L263 TraceCheckSpWp]: Trace formula consists of 726 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-28 23:17:13,824 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:17:14,323 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 16 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:14,324 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [48856881] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:17:14,324 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:17:14,324 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 13 [2021-10-28 23:17:14,325 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1018909637] [2021-10-28 23:17:14,325 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2021-10-28 23:17:14,326 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:14,326 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-10-28 23:17:14,327 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=132, Unknown=0, NotChecked=0, Total=156 [2021-10-28 23:17:14,327 INFO L87 Difference]: Start difference. First operand 1000 states and 1307 transitions. Second operand has 13 states, 13 states have (on average 19.692307692307693) internal successors, (256), 13 states have internal predecessors, (256), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:27,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:27,868 INFO L93 Difference]: Finished difference Result 16786 states and 22448 transitions. [2021-10-28 23:17:27,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 242 states. [2021-10-28 23:17:27,869 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 19.692307692307693) internal successors, (256), 13 states have internal predecessors, (256), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 131 [2021-10-28 23:17:27,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:27,916 INFO L225 Difference]: With dead ends: 16786 [2021-10-28 23:17:27,916 INFO L226 Difference]: Without dead ends: 15979 [2021-10-28 23:17:27,952 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 474 GetRequests, 223 SyntacticMatches, 0 SemanticMatches, 251 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28995 ImplicationChecksByTransitivity, 6.6s TimeCoverageRelationStatistics Valid=8289, Invalid=55467, Unknown=0, NotChecked=0, Total=63756 [2021-10-28 23:17:27,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15979 states. [2021-10-28 23:17:28,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15979 to 2718. [2021-10-28 23:17:28,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2718 states, 2713 states have (on average 1.3110947290821968) internal successors, (3557), 2717 states have internal predecessors, (3557), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:28,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2718 states to 2718 states and 3557 transitions. [2021-10-28 23:17:28,766 INFO L78 Accepts]: Start accepts. Automaton has 2718 states and 3557 transitions. Word has length 131 [2021-10-28 23:17:28,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:28,766 INFO L470 AbstractCegarLoop]: Abstraction has 2718 states and 3557 transitions. [2021-10-28 23:17:28,767 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 19.692307692307693) internal successors, (256), 13 states have internal predecessors, (256), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:28,768 INFO L276 IsEmpty]: Start isEmpty. Operand 2718 states and 3557 transitions. [2021-10-28 23:17:28,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2021-10-28 23:17:28,776 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:28,776 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:28,820 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2021-10-28 23:17:28,989 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2021-10-28 23:17:28,989 INFO L402 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:28,990 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:28,990 INFO L85 PathProgramCache]: Analyzing trace with hash -57966914, now seen corresponding path program 1 times [2021-10-28 23:17:28,990 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:28,991 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [769352127] [2021-10-28 23:17:28,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:28,991 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:29,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:29,268 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:29,268 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:29,268 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [769352127] [2021-10-28 23:17:29,269 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [769352127] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:17:29,269 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2136613475] [2021-10-28 23:17:29,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:29,269 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:17:29,270 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:17:29,271 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:17:29,289 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-10-28 23:17:29,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:29,608 INFO L263 TraceCheckSpWp]: Trace formula consists of 778 conjuncts, 14 conjunts are in the unsatisfiable core [2021-10-28 23:17:29,615 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:17:30,015 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 8 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:30,015 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2136613475] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:17:30,015 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:17:30,016 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 8 [2021-10-28 23:17:30,016 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [744658707] [2021-10-28 23:17:30,016 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2021-10-28 23:17:30,017 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:30,017 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2021-10-28 23:17:30,018 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2021-10-28 23:17:30,018 INFO L87 Difference]: Start difference. First operand 2718 states and 3557 transitions. Second operand has 8 states, 8 states have (on average 20.0) internal successors, (160), 8 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:31,837 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:31,837 INFO L93 Difference]: Finished difference Result 9790 states and 13378 transitions. [2021-10-28 23:17:31,837 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2021-10-28 23:17:31,838 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 20.0) internal successors, (160), 8 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 132 [2021-10-28 23:17:31,838 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:31,852 INFO L225 Difference]: With dead ends: 9790 [2021-10-28 23:17:31,852 INFO L226 Difference]: Without dead ends: 7299 [2021-10-28 23:17:31,858 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 142 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=146, Invalid=360, Unknown=0, NotChecked=0, Total=506 [2021-10-28 23:17:31,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7299 states. [2021-10-28 23:17:32,315 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7299 to 2324. [2021-10-28 23:17:32,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2324 states, 2319 states have (on average 1.314359637774903) internal successors, (3048), 2323 states have internal predecessors, (3048), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:32,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2324 states to 2324 states and 3048 transitions. [2021-10-28 23:17:32,325 INFO L78 Accepts]: Start accepts. Automaton has 2324 states and 3048 transitions. Word has length 132 [2021-10-28 23:17:32,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:32,326 INFO L470 AbstractCegarLoop]: Abstraction has 2324 states and 3048 transitions. [2021-10-28 23:17:32,334 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 20.0) internal successors, (160), 8 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:32,335 INFO L276 IsEmpty]: Start isEmpty. Operand 2324 states and 3048 transitions. [2021-10-28 23:17:32,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2021-10-28 23:17:32,342 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:32,342 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:32,387 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2021-10-28 23:17:32,567 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:17:32,567 INFO L402 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:32,568 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:32,568 INFO L85 PathProgramCache]: Analyzing trace with hash -812401068, now seen corresponding path program 1 times [2021-10-28 23:17:32,568 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:32,568 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [415189922] [2021-10-28 23:17:32,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:32,569 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:32,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:32,792 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2021-10-28 23:17:32,792 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:32,792 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [415189922] [2021-10-28 23:17:32,792 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [415189922] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:32,793 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:32,793 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2021-10-28 23:17:32,793 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1203464661] [2021-10-28 23:17:32,793 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-28 23:17:32,794 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:32,794 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 23:17:32,794 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-10-28 23:17:32,795 INFO L87 Difference]: Start difference. First operand 2324 states and 3048 transitions. Second operand has 7 states, 7 states have (on average 16.428571428571427) internal successors, (115), 7 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:35,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:35,152 INFO L93 Difference]: Finished difference Result 13266 states and 17764 transitions. [2021-10-28 23:17:35,152 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-10-28 23:17:35,152 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 16.428571428571427) internal successors, (115), 7 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 133 [2021-10-28 23:17:35,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:35,171 INFO L225 Difference]: With dead ends: 13266 [2021-10-28 23:17:35,171 INFO L226 Difference]: Without dead ends: 11189 [2021-10-28 23:17:35,177 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2021-10-28 23:17:35,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11189 states. [2021-10-28 23:17:35,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11189 to 2744. [2021-10-28 23:17:35,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2744 states, 2739 states have (on average 1.2942679810149689) internal successors, (3545), 2743 states have internal predecessors, (3545), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:35,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2744 states to 2744 states and 3545 transitions. [2021-10-28 23:17:35,755 INFO L78 Accepts]: Start accepts. Automaton has 2744 states and 3545 transitions. Word has length 133 [2021-10-28 23:17:35,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:35,756 INFO L470 AbstractCegarLoop]: Abstraction has 2744 states and 3545 transitions. [2021-10-28 23:17:35,756 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 16.428571428571427) internal successors, (115), 7 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:35,756 INFO L276 IsEmpty]: Start isEmpty. Operand 2744 states and 3545 transitions. [2021-10-28 23:17:35,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2021-10-28 23:17:35,764 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:35,764 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:35,764 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2021-10-28 23:17:35,765 INFO L402 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:35,765 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:35,766 INFO L85 PathProgramCache]: Analyzing trace with hash -1166749575, now seen corresponding path program 1 times [2021-10-28 23:17:35,766 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:35,766 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1552036587] [2021-10-28 23:17:35,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:35,766 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:35,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:35,926 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 18 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:35,926 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:35,927 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1552036587] [2021-10-28 23:17:35,927 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1552036587] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:17:35,927 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1658186970] [2021-10-28 23:17:35,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:35,928 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:17:35,928 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:17:35,933 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:17:35,953 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-10-28 23:17:36,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:36,303 INFO L263 TraceCheckSpWp]: Trace formula consists of 757 conjuncts, 12 conjunts are in the unsatisfiable core [2021-10-28 23:17:36,307 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:17:36,748 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 14 proven. 1 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2021-10-28 23:17:36,749 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1658186970] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:17:36,749 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:17:36,749 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5] total 11 [2021-10-28 23:17:36,750 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1001062784] [2021-10-28 23:17:36,750 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2021-10-28 23:17:36,751 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:36,751 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2021-10-28 23:17:36,752 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2021-10-28 23:17:36,752 INFO L87 Difference]: Start difference. First operand 2744 states and 3545 transitions. Second operand has 11 states, 11 states have (on average 20.90909090909091) internal successors, (230), 11 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:39,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:39,040 INFO L93 Difference]: Finished difference Result 5987 states and 7865 transitions. [2021-10-28 23:17:39,041 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2021-10-28 23:17:39,041 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 20.90909090909091) internal successors, (230), 11 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 135 [2021-10-28 23:17:39,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:39,049 INFO L225 Difference]: With dead ends: 5987 [2021-10-28 23:17:39,050 INFO L226 Difference]: Without dead ends: 3338 [2021-10-28 23:17:39,054 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 155 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 621 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=525, Invalid=1545, Unknown=0, NotChecked=0, Total=2070 [2021-10-28 23:17:39,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3338 states. [2021-10-28 23:17:39,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3338 to 1878. [2021-10-28 23:17:39,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1878 states, 1873 states have (on average 1.2819006940736786) internal successors, (2401), 1877 states have internal predecessors, (2401), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:39,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1878 states to 1878 states and 2401 transitions. [2021-10-28 23:17:39,409 INFO L78 Accepts]: Start accepts. Automaton has 1878 states and 2401 transitions. Word has length 135 [2021-10-28 23:17:39,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:39,409 INFO L470 AbstractCegarLoop]: Abstraction has 1878 states and 2401 transitions. [2021-10-28 23:17:39,410 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 20.90909090909091) internal successors, (230), 11 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:39,410 INFO L276 IsEmpty]: Start isEmpty. Operand 1878 states and 2401 transitions. [2021-10-28 23:17:39,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2021-10-28 23:17:39,417 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:39,418 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:39,462 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2021-10-28 23:17:39,633 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable31 [2021-10-28 23:17:39,633 INFO L402 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:39,633 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:39,634 INFO L85 PathProgramCache]: Analyzing trace with hash -2040989094, now seen corresponding path program 1 times [2021-10-28 23:17:39,634 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:39,634 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1947101997] [2021-10-28 23:17:39,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:39,634 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:39,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:39,883 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:39,884 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:39,884 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1947101997] [2021-10-28 23:17:39,884 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1947101997] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:17:39,884 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [847969867] [2021-10-28 23:17:39,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:39,885 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:17:39,885 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:17:39,889 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:17:39,916 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-10-28 23:17:40,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:40,289 INFO L263 TraceCheckSpWp]: Trace formula consists of 781 conjuncts, 9 conjunts are in the unsatisfiable core [2021-10-28 23:17:40,292 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:17:40,687 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-28 23:17:40,688 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [847969867] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:40,688 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-28 23:17:40,688 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2021-10-28 23:17:40,688 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1331631997] [2021-10-28 23:17:40,689 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:17:40,689 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:40,689 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:17:40,690 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=181, Unknown=0, NotChecked=0, Total=210 [2021-10-28 23:17:40,690 INFO L87 Difference]: Start difference. First operand 1878 states and 2401 transitions. Second operand has 6 states, 6 states have (on average 21.666666666666668) internal successors, (130), 6 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:41,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:41,628 INFO L93 Difference]: Finished difference Result 5950 states and 7855 transitions. [2021-10-28 23:17:41,628 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:17:41,629 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.666666666666668) internal successors, (130), 6 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 135 [2021-10-28 23:17:41,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:41,634 INFO L225 Difference]: With dead ends: 5950 [2021-10-28 23:17:41,634 INFO L226 Difference]: Without dead ends: 4227 [2021-10-28 23:17:41,639 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 132 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=294, Unknown=0, NotChecked=0, Total=342 [2021-10-28 23:17:41,645 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4227 states. [2021-10-28 23:17:41,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4227 to 1878. [2021-10-28 23:17:41,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1878 states, 1873 states have (on average 1.2802989855846236) internal successors, (2398), 1877 states have internal predecessors, (2398), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:41,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1878 states to 1878 states and 2398 transitions. [2021-10-28 23:17:41,955 INFO L78 Accepts]: Start accepts. Automaton has 1878 states and 2398 transitions. Word has length 135 [2021-10-28 23:17:41,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:41,956 INFO L470 AbstractCegarLoop]: Abstraction has 1878 states and 2398 transitions. [2021-10-28 23:17:41,956 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.666666666666668) internal successors, (130), 6 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:41,956 INFO L276 IsEmpty]: Start isEmpty. Operand 1878 states and 2398 transitions. [2021-10-28 23:17:41,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2021-10-28 23:17:41,960 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:41,961 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:41,992 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2021-10-28 23:17:42,176 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:17:42,177 INFO L402 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:42,177 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:42,177 INFO L85 PathProgramCache]: Analyzing trace with hash 722347797, now seen corresponding path program 1 times [2021-10-28 23:17:42,177 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:42,178 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [739316663] [2021-10-28 23:17:42,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:42,178 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:42,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:42,381 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:42,381 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:42,381 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [739316663] [2021-10-28 23:17:42,382 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [739316663] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:17:42,382 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [415899569] [2021-10-28 23:17:42,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:42,382 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:17:42,382 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:17:42,383 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:17:42,409 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2021-10-28 23:17:42,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:42,827 INFO L263 TraceCheckSpWp]: Trace formula consists of 794 conjuncts, 10 conjunts are in the unsatisfiable core [2021-10-28 23:17:42,830 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:17:43,276 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2021-10-28 23:17:43,276 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [415899569] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:43,278 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-28 23:17:43,278 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15 [2021-10-28 23:17:43,278 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1294068305] [2021-10-28 23:17:43,278 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:17:43,278 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:43,279 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:17:43,279 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=181, Unknown=0, NotChecked=0, Total=210 [2021-10-28 23:17:43,279 INFO L87 Difference]: Start difference. First operand 1878 states and 2398 transitions. Second operand has 6 states, 6 states have (on average 22.333333333333332) internal successors, (134), 6 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:44,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:44,108 INFO L93 Difference]: Finished difference Result 5394 states and 7030 transitions. [2021-10-28 23:17:44,108 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 23:17:44,108 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 22.333333333333332) internal successors, (134), 6 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 139 [2021-10-28 23:17:44,108 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:44,112 INFO L225 Difference]: With dead ends: 5394 [2021-10-28 23:17:44,112 INFO L226 Difference]: Without dead ends: 3671 [2021-10-28 23:17:44,114 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 136 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=53, Invalid=327, Unknown=0, NotChecked=0, Total=380 [2021-10-28 23:17:44,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3671 states. [2021-10-28 23:17:44,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3671 to 1878. [2021-10-28 23:17:44,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1878 states, 1873 states have (on average 1.2786972770955687) internal successors, (2395), 1877 states have internal predecessors, (2395), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:44,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1878 states to 1878 states and 2395 transitions. [2021-10-28 23:17:44,420 INFO L78 Accepts]: Start accepts. Automaton has 1878 states and 2395 transitions. Word has length 139 [2021-10-28 23:17:44,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:44,420 INFO L470 AbstractCegarLoop]: Abstraction has 1878 states and 2395 transitions. [2021-10-28 23:17:44,421 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 22.333333333333332) internal successors, (134), 6 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:44,421 INFO L276 IsEmpty]: Start isEmpty. Operand 1878 states and 2395 transitions. [2021-10-28 23:17:44,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2021-10-28 23:17:44,425 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:44,426 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:44,449 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2021-10-28 23:17:44,626 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable33 [2021-10-28 23:17:44,627 INFO L402 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:44,627 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:44,627 INFO L85 PathProgramCache]: Analyzing trace with hash -1061111299, now seen corresponding path program 1 times [2021-10-28 23:17:44,627 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:44,627 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1399598918] [2021-10-28 23:17:44,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:44,628 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:44,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:44,864 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 26 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:44,865 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:44,865 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1399598918] [2021-10-28 23:17:44,865 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1399598918] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:17:44,865 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [623096730] [2021-10-28 23:17:44,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:44,866 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:17:44,866 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:17:44,867 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:17:44,884 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2021-10-28 23:17:45,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:45,419 INFO L263 TraceCheckSpWp]: Trace formula consists of 806 conjuncts, 15 conjunts are in the unsatisfiable core [2021-10-28 23:17:45,423 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:17:46,857 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 17 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:46,857 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [623096730] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:17:46,857 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:17:46,857 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 6] total 14 [2021-10-28 23:17:46,858 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1753242826] [2021-10-28 23:17:46,858 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2021-10-28 23:17:46,858 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:46,859 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2021-10-28 23:17:46,859 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=177, Unknown=0, NotChecked=0, Total=210 [2021-10-28 23:17:46,859 INFO L87 Difference]: Start difference. First operand 1878 states and 2395 transitions. Second operand has 15 states, 15 states have (on average 16.2) internal successors, (243), 14 states have internal predecessors, (243), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:50,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:50,083 INFO L93 Difference]: Finished difference Result 5843 states and 7527 transitions. [2021-10-28 23:17:50,083 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2021-10-28 23:17:50,083 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 16.2) internal successors, (243), 14 states have internal predecessors, (243), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 142 [2021-10-28 23:17:50,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:50,088 INFO L225 Difference]: With dead ends: 5843 [2021-10-28 23:17:50,089 INFO L226 Difference]: Without dead ends: 4160 [2021-10-28 23:17:50,092 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 209 GetRequests, 136 SyntacticMatches, 2 SemanticMatches, 71 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1627 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=942, Invalid=4314, Unknown=0, NotChecked=0, Total=5256 [2021-10-28 23:17:50,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4160 states. [2021-10-28 23:17:50,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4160 to 2115. [2021-10-28 23:17:50,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2115 states, 2110 states have (on average 1.2691943127962084) internal successors, (2678), 2114 states have internal predecessors, (2678), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:50,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2115 states to 2115 states and 2678 transitions. [2021-10-28 23:17:50,552 INFO L78 Accepts]: Start accepts. Automaton has 2115 states and 2678 transitions. Word has length 142 [2021-10-28 23:17:50,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:50,552 INFO L470 AbstractCegarLoop]: Abstraction has 2115 states and 2678 transitions. [2021-10-28 23:17:50,552 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 16.2) internal successors, (243), 14 states have internal predecessors, (243), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:50,552 INFO L276 IsEmpty]: Start isEmpty. Operand 2115 states and 2678 transitions. [2021-10-28 23:17:50,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2021-10-28 23:17:50,556 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:50,556 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:50,585 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2021-10-28 23:17:50,757 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable34 [2021-10-28 23:17:50,757 INFO L402 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:50,757 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:50,758 INFO L85 PathProgramCache]: Analyzing trace with hash 1545838345, now seen corresponding path program 1 times [2021-10-28 23:17:50,758 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:50,758 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [855735037] [2021-10-28 23:17:50,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:50,758 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:50,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:50,899 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-10-28 23:17:50,899 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:50,899 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [855735037] [2021-10-28 23:17:50,899 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [855735037] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:50,900 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:50,900 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:17:50,900 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1943333187] [2021-10-28 23:17:50,900 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2021-10-28 23:17:50,901 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:50,901 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-10-28 23:17:50,901 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:17:50,902 INFO L87 Difference]: Start difference. First operand 2115 states and 2678 transitions. Second operand has 5 states, 5 states have (on average 24.4) internal successors, (122), 4 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:51,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:51,279 INFO L93 Difference]: Finished difference Result 3968 states and 5065 transitions. [2021-10-28 23:17:51,279 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-10-28 23:17:51,280 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.4) internal successors, (122), 4 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2021-10-28 23:17:51,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:51,282 INFO L225 Difference]: With dead ends: 3968 [2021-10-28 23:17:51,282 INFO L226 Difference]: Without dead ends: 1987 [2021-10-28 23:17:51,285 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2021-10-28 23:17:51,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1987 states. [2021-10-28 23:17:51,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1987 to 1987. [2021-10-28 23:17:51,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1987 states, 1982 states have (on average 1.2734611503531785) internal successors, (2524), 1986 states have internal predecessors, (2524), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:51,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1987 states to 1987 states and 2524 transitions. [2021-10-28 23:17:51,663 INFO L78 Accepts]: Start accepts. Automaton has 1987 states and 2524 transitions. Word has length 143 [2021-10-28 23:17:51,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:51,664 INFO L470 AbstractCegarLoop]: Abstraction has 1987 states and 2524 transitions. [2021-10-28 23:17:51,664 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.4) internal successors, (122), 4 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:51,664 INFO L276 IsEmpty]: Start isEmpty. Operand 1987 states and 2524 transitions. [2021-10-28 23:17:51,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2021-10-28 23:17:51,668 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:51,669 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:51,669 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2021-10-28 23:17:51,669 INFO L402 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:51,669 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:51,670 INFO L85 PathProgramCache]: Analyzing trace with hash 956328512, now seen corresponding path program 1 times [2021-10-28 23:17:51,670 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:51,670 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [805510897] [2021-10-28 23:17:51,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:51,670 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:51,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:51,759 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2021-10-28 23:17:51,759 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:51,759 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [805510897] [2021-10-28 23:17:51,760 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [805510897] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:17:51,760 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:17:51,760 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:17:51,760 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1443217281] [2021-10-28 23:17:51,761 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:17:51,761 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:51,762 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:17:51,762 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:17:51,762 INFO L87 Difference]: Start difference. First operand 1987 states and 2524 transitions. Second operand has 6 states, 6 states have (on average 19.666666666666668) internal successors, (118), 6 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:53,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:17:53,339 INFO L93 Difference]: Finished difference Result 8551 states and 11174 transitions. [2021-10-28 23:17:53,339 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2021-10-28 23:17:53,339 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 19.666666666666668) internal successors, (118), 6 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2021-10-28 23:17:53,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:17:53,347 INFO L225 Difference]: With dead ends: 8551 [2021-10-28 23:17:53,347 INFO L226 Difference]: Without dead ends: 6759 [2021-10-28 23:17:53,350 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2021-10-28 23:17:53,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6759 states. [2021-10-28 23:17:53,852 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6759 to 2340. [2021-10-28 23:17:53,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2340 states, 2335 states have (on average 1.2582441113490364) internal successors, (2938), 2339 states have internal predecessors, (2938), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:53,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2340 states to 2340 states and 2938 transitions. [2021-10-28 23:17:53,863 INFO L78 Accepts]: Start accepts. Automaton has 2340 states and 2938 transitions. Word has length 143 [2021-10-28 23:17:53,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:17:53,864 INFO L470 AbstractCegarLoop]: Abstraction has 2340 states and 2938 transitions. [2021-10-28 23:17:53,864 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 19.666666666666668) internal successors, (118), 6 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:17:53,864 INFO L276 IsEmpty]: Start isEmpty. Operand 2340 states and 2938 transitions. [2021-10-28 23:17:53,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-28 23:17:53,870 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:17:53,870 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:17:53,870 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2021-10-28 23:17:53,871 INFO L402 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:17:53,871 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:17:53,871 INFO L85 PathProgramCache]: Analyzing trace with hash 1126731789, now seen corresponding path program 1 times [2021-10-28 23:17:53,871 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:17:53,872 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [654619775] [2021-10-28 23:17:53,872 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:53,872 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:17:53,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:54,118 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 32 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:54,118 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:17:54,118 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [654619775] [2021-10-28 23:17:54,118 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [654619775] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:17:54,119 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [125920601] [2021-10-28 23:17:54,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:17:54,119 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:17:54,119 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:17:54,120 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:17:54,141 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2021-10-28 23:17:54,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:17:54,849 INFO L263 TraceCheckSpWp]: Trace formula consists of 809 conjuncts, 19 conjunts are in the unsatisfiable core [2021-10-28 23:17:54,853 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:17:55,375 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 34 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:17:55,376 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [125920601] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:17:55,376 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:17:55,376 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8] total 17 [2021-10-28 23:17:55,376 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [924165317] [2021-10-28 23:17:55,377 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2021-10-28 23:17:55,377 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:17:55,378 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2021-10-28 23:17:55,378 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2021-10-28 23:17:55,378 INFO L87 Difference]: Start difference. First operand 2340 states and 2938 transitions. Second operand has 17 states, 17 states have (on average 15.411764705882353) internal successors, (262), 17 states have internal predecessors, (262), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:18:03,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:18:03,812 INFO L93 Difference]: Finished difference Result 15605 states and 19700 transitions. [2021-10-28 23:18:03,812 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 161 states. [2021-10-28 23:18:03,812 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 15.411764705882353) internal successors, (262), 17 states have internal predecessors, (262), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-28 23:18:03,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:18:03,833 INFO L225 Difference]: With dead ends: 15605 [2021-10-28 23:18:03,833 INFO L226 Difference]: Without dead ends: 13460 [2021-10-28 23:18:03,842 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 344 GetRequests, 171 SyntacticMatches, 0 SemanticMatches, 173 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11702 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=3629, Invalid=26821, Unknown=0, NotChecked=0, Total=30450 [2021-10-28 23:18:03,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13460 states. [2021-10-28 23:18:04,930 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13460 to 4490. [2021-10-28 23:18:04,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4490 states, 4485 states have (on average 1.2550724637681159) internal successors, (5629), 4489 states have internal predecessors, (5629), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:18:04,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4490 states to 4490 states and 5629 transitions. [2021-10-28 23:18:04,945 INFO L78 Accepts]: Start accepts. Automaton has 4490 states and 5629 transitions. Word has length 144 [2021-10-28 23:18:04,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:18:04,945 INFO L470 AbstractCegarLoop]: Abstraction has 4490 states and 5629 transitions. [2021-10-28 23:18:04,946 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 15.411764705882353) internal successors, (262), 17 states have internal predecessors, (262), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:18:04,946 INFO L276 IsEmpty]: Start isEmpty. Operand 4490 states and 5629 transitions. [2021-10-28 23:18:04,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-28 23:18:04,955 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:18:04,956 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:18:04,999 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2021-10-28 23:18:05,169 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:18:05,169 INFO L402 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:18:05,170 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:18:05,170 INFO L85 PathProgramCache]: Analyzing trace with hash -2053713263, now seen corresponding path program 1 times [2021-10-28 23:18:05,170 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:18:05,170 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1714215806] [2021-10-28 23:18:05,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:18:05,170 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:18:05,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:18:05,236 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2021-10-28 23:18:05,236 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:18:05,238 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1714215806] [2021-10-28 23:18:05,238 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1714215806] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:18:05,238 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:18:05,238 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:18:05,239 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [53775786] [2021-10-28 23:18:05,239 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:18:05,239 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:18:05,240 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:18:05,240 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:18:05,240 INFO L87 Difference]: Start difference. First operand 4490 states and 5629 transitions. Second operand has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:18:06,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:18:06,189 INFO L93 Difference]: Finished difference Result 8234 states and 10375 transitions. [2021-10-28 23:18:06,189 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 23:18:06,190 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-28 23:18:06,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:18:06,194 INFO L225 Difference]: With dead ends: 8234 [2021-10-28 23:18:06,194 INFO L226 Difference]: Without dead ends: 3927 [2021-10-28 23:18:06,197 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:18:06,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3927 states. [2021-10-28 23:18:06,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3927 to 3911. [2021-10-28 23:18:06,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3911 states, 3906 states have (on average 1.2521761392729134) internal successors, (4891), 3910 states have internal predecessors, (4891), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:18:06,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3911 states to 3911 states and 4891 transitions. [2021-10-28 23:18:06,914 INFO L78 Accepts]: Start accepts. Automaton has 3911 states and 4891 transitions. Word has length 144 [2021-10-28 23:18:06,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:18:06,915 INFO L470 AbstractCegarLoop]: Abstraction has 3911 states and 4891 transitions. [2021-10-28 23:18:06,915 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 29.75) internal successors, (119), 4 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:18:06,915 INFO L276 IsEmpty]: Start isEmpty. Operand 3911 states and 4891 transitions. [2021-10-28 23:18:06,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-28 23:18:06,923 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:18:06,924 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:18:06,924 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2021-10-28 23:18:06,924 INFO L402 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:18:06,925 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:18:06,925 INFO L85 PathProgramCache]: Analyzing trace with hash -1332568633, now seen corresponding path program 1 times [2021-10-28 23:18:06,925 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:18:06,925 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [912830676] [2021-10-28 23:18:06,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:18:06,926 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:18:06,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:18:07,036 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:18:07,036 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:18:07,036 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [912830676] [2021-10-28 23:18:07,037 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [912830676] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:18:07,037 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1013434811] [2021-10-28 23:18:07,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:18:07,037 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:18:07,037 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:18:07,041 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:18:07,043 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2021-10-28 23:18:07,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:18:07,616 INFO L263 TraceCheckSpWp]: Trace formula consists of 806 conjuncts, 6 conjunts are in the unsatisfiable core [2021-10-28 23:18:07,619 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:18:08,074 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:18:08,075 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1013434811] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:18:08,075 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-10-28 23:18:08,075 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2021-10-28 23:18:08,079 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [109185742] [2021-10-28 23:18:08,082 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2021-10-28 23:18:08,082 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:18:08,082 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-10-28 23:18:08,083 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2021-10-28 23:18:08,084 INFO L87 Difference]: Start difference. First operand 3911 states and 4891 transitions. Second operand has 7 states, 7 states have (on average 20.571428571428573) internal successors, (144), 7 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:18:10,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:18:10,449 INFO L93 Difference]: Finished difference Result 14859 states and 18978 transitions. [2021-10-28 23:18:10,449 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2021-10-28 23:18:10,449 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 20.571428571428573) internal successors, (144), 7 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-28 23:18:10,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:18:10,458 INFO L225 Difference]: With dead ends: 14859 [2021-10-28 23:18:10,459 INFO L226 Difference]: Without dead ends: 11247 [2021-10-28 23:18:10,463 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 146 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=194, Unknown=0, NotChecked=0, Total=272 [2021-10-28 23:18:10,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11247 states. [2021-10-28 23:18:11,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11247 to 7251. [2021-10-28 23:18:11,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7251 states, 7246 states have (on average 1.250483025117306) internal successors, (9061), 7250 states have internal predecessors, (9061), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:18:11,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7251 states to 7251 states and 9061 transitions. [2021-10-28 23:18:11,744 INFO L78 Accepts]: Start accepts. Automaton has 7251 states and 9061 transitions. Word has length 144 [2021-10-28 23:18:11,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:18:11,744 INFO L470 AbstractCegarLoop]: Abstraction has 7251 states and 9061 transitions. [2021-10-28 23:18:11,744 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 20.571428571428573) internal successors, (144), 7 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:18:11,744 INFO L276 IsEmpty]: Start isEmpty. Operand 7251 states and 9061 transitions. [2021-10-28 23:18:11,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2021-10-28 23:18:11,753 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:18:11,753 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:18:11,778 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2021-10-28 23:18:11,955 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable39 [2021-10-28 23:18:11,956 INFO L402 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:18:11,956 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:18:11,956 INFO L85 PathProgramCache]: Analyzing trace with hash -372796990, now seen corresponding path program 1 times [2021-10-28 23:18:11,956 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:18:11,957 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1896420659] [2021-10-28 23:18:11,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:18:11,957 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:18:12,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:18:12,097 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 26 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:18:12,097 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:18:12,098 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1896420659] [2021-10-28 23:18:12,098 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1896420659] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:18:12,098 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [775621031] [2021-10-28 23:18:12,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:18:12,098 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:18:12,099 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:18:12,101 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:18:12,122 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2021-10-28 23:18:12,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:18:12,899 INFO L263 TraceCheckSpWp]: Trace formula consists of 817 conjuncts, 12 conjunts are in the unsatisfiable core [2021-10-28 23:18:12,902 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:18:13,334 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2021-10-28 23:18:13,334 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [775621031] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:18:13,334 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-28 23:18:13,334 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2021-10-28 23:18:13,335 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [81910392] [2021-10-28 23:18:13,335 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:18:13,335 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:18:13,335 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:18:13,335 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2021-10-28 23:18:13,336 INFO L87 Difference]: Start difference. First operand 7251 states and 9061 transitions. Second operand has 6 states, 6 states have (on average 21.666666666666668) internal successors, (130), 6 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:18:15,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:18:15,569 INFO L93 Difference]: Finished difference Result 16296 states and 20669 transitions. [2021-10-28 23:18:15,569 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 23:18:15,569 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 21.666666666666668) internal successors, (130), 6 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 144 [2021-10-28 23:18:15,570 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:18:15,582 INFO L225 Difference]: With dead ends: 16296 [2021-10-28 23:18:15,582 INFO L226 Difference]: Without dead ends: 10692 [2021-10-28 23:18:15,588 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 144 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=275, Unknown=0, NotChecked=0, Total=342 [2021-10-28 23:18:15,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10692 states. [2021-10-28 23:18:16,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10692 to 7251. [2021-10-28 23:18:16,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7251 states, 7246 states have (on average 1.236820314656362) internal successors, (8962), 7250 states have internal predecessors, (8962), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:18:16,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7251 states to 7251 states and 8962 transitions. [2021-10-28 23:18:16,845 INFO L78 Accepts]: Start accepts. Automaton has 7251 states and 8962 transitions. Word has length 144 [2021-10-28 23:18:16,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:18:16,846 INFO L470 AbstractCegarLoop]: Abstraction has 7251 states and 8962 transitions. [2021-10-28 23:18:16,846 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.666666666666668) internal successors, (130), 6 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:18:16,846 INFO L276 IsEmpty]: Start isEmpty. Operand 7251 states and 8962 transitions. [2021-10-28 23:18:16,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2021-10-28 23:18:16,853 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:18:16,853 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:18:16,885 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2021-10-28 23:18:17,066 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40,11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:18:17,067 INFO L402 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:18:17,067 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:18:17,067 INFO L85 PathProgramCache]: Analyzing trace with hash 729040484, now seen corresponding path program 1 times [2021-10-28 23:18:17,067 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:18:17,067 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1112823074] [2021-10-28 23:18:17,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:18:17,068 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:18:17,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:18:17,123 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2021-10-28 23:18:17,123 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:18:17,123 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1112823074] [2021-10-28 23:18:17,123 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1112823074] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:18:17,124 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:18:17,124 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-10-28 23:18:17,124 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1732158410] [2021-10-28 23:18:17,124 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2021-10-28 23:18:17,125 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:18:17,125 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-10-28 23:18:17,125 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:18:17,125 INFO L87 Difference]: Start difference. First operand 7251 states and 8962 transitions. Second operand has 4 states, 4 states have (on average 31.0) internal successors, (124), 4 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:18:18,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:18:18,130 INFO L93 Difference]: Finished difference Result 11820 states and 14654 transitions. [2021-10-28 23:18:18,130 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-10-28 23:18:18,130 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 31.0) internal successors, (124), 4 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 145 [2021-10-28 23:18:18,131 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:18:18,136 INFO L225 Difference]: With dead ends: 11820 [2021-10-28 23:18:18,136 INFO L226 Difference]: Without dead ends: 5207 [2021-10-28 23:18:18,143 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-10-28 23:18:18,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5207 states. [2021-10-28 23:18:19,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5207 to 5179. [2021-10-28 23:18:19,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5179 states, 5174 states have (on average 1.2377270970235794) internal successors, (6404), 5178 states have internal predecessors, (6404), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:18:19,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5179 states to 5179 states and 6404 transitions. [2021-10-28 23:18:19,045 INFO L78 Accepts]: Start accepts. Automaton has 5179 states and 6404 transitions. Word has length 145 [2021-10-28 23:18:19,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:18:19,046 INFO L470 AbstractCegarLoop]: Abstraction has 5179 states and 6404 transitions. [2021-10-28 23:18:19,046 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 31.0) internal successors, (124), 4 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:18:19,046 INFO L276 IsEmpty]: Start isEmpty. Operand 5179 states and 6404 transitions. [2021-10-28 23:18:19,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2021-10-28 23:18:19,050 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:18:19,051 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:18:19,051 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41 [2021-10-28 23:18:19,051 INFO L402 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:18:19,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:18:19,052 INFO L85 PathProgramCache]: Analyzing trace with hash -828579161, now seen corresponding path program 1 times [2021-10-28 23:18:19,052 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:18:19,052 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1657704618] [2021-10-28 23:18:19,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:18:19,053 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:18:19,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:18:19,194 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 26 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-10-28 23:18:19,194 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:18:19,194 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1657704618] [2021-10-28 23:18:19,194 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1657704618] provided 0 perfect and 1 imperfect interpolant sequences [2021-10-28 23:18:19,195 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2087437460] [2021-10-28 23:18:19,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:18:19,195 INFO L170 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:18:19,195 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 [2021-10-28 23:18:19,196 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-10-28 23:18:19,205 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2021-10-28 23:18:19,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:18:19,857 INFO L263 TraceCheckSpWp]: Trace formula consists of 830 conjuncts, 8 conjunts are in the unsatisfiable core [2021-10-28 23:18:19,860 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-10-28 23:18:20,250 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2021-10-28 23:18:20,250 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2087437460] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:18:20,251 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2021-10-28 23:18:20,251 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [7] total 12 [2021-10-28 23:18:20,252 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [32062480] [2021-10-28 23:18:20,252 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:18:20,252 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:18:20,253 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:18:20,253 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=110, Unknown=0, NotChecked=0, Total=132 [2021-10-28 23:18:20,253 INFO L87 Difference]: Start difference. First operand 5179 states and 6404 transitions. Second operand has 6 states, 6 states have (on average 22.333333333333332) internal successors, (134), 6 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:18:21,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:18:21,979 INFO L93 Difference]: Finished difference Result 13279 states and 16533 transitions. [2021-10-28 23:18:21,979 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-10-28 23:18:21,980 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 22.333333333333332) internal successors, (134), 6 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 148 [2021-10-28 23:18:21,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:18:21,988 INFO L225 Difference]: With dead ends: 13279 [2021-10-28 23:18:21,988 INFO L226 Difference]: Without dead ends: 8944 [2021-10-28 23:18:21,993 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 160 GetRequests, 145 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=226, Unknown=0, NotChecked=0, Total=272 [2021-10-28 23:18:21,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8944 states. [2021-10-28 23:18:22,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8944 to 5179. [2021-10-28 23:18:22,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5179 states, 5174 states have (on average 1.2373405488983378) internal successors, (6402), 5178 states have internal predecessors, (6402), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:18:22,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5179 states to 5179 states and 6402 transitions. [2021-10-28 23:18:22,938 INFO L78 Accepts]: Start accepts. Automaton has 5179 states and 6402 transitions. Word has length 148 [2021-10-28 23:18:22,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:18:22,939 INFO L470 AbstractCegarLoop]: Abstraction has 5179 states and 6402 transitions. [2021-10-28 23:18:22,939 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 22.333333333333332) internal successors, (134), 6 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:18:22,939 INFO L276 IsEmpty]: Start isEmpty. Operand 5179 states and 6402 transitions. [2021-10-28 23:18:22,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2021-10-28 23:18:22,944 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:18:22,944 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:18:22,973 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2021-10-28 23:18:23,144 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42,12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-10-28 23:18:23,145 INFO L402 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:18:23,145 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:18:23,145 INFO L85 PathProgramCache]: Analyzing trace with hash -572580853, now seen corresponding path program 1 times [2021-10-28 23:18:23,145 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:18:23,146 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [941626871] [2021-10-28 23:18:23,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:18:23,146 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:18:23,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-10-28 23:18:23,302 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2021-10-28 23:18:23,303 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-10-28 23:18:23,303 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [941626871] [2021-10-28 23:18:23,303 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [941626871] provided 1 perfect and 0 imperfect interpolant sequences [2021-10-28 23:18:23,303 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-10-28 23:18:23,303 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-10-28 23:18:23,304 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2065413729] [2021-10-28 23:18:23,304 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2021-10-28 23:18:23,304 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-10-28 23:18:23,305 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-10-28 23:18:23,305 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-10-28 23:18:23,305 INFO L87 Difference]: Start difference. First operand 5179 states and 6402 transitions. Second operand has 6 states, 6 states have (on average 23.833333333333332) internal successors, (143), 6 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:18:25,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-10-28 23:18:25,583 INFO L93 Difference]: Finished difference Result 13168 states and 16527 transitions. [2021-10-28 23:18:25,583 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-10-28 23:18:25,583 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 23.833333333333332) internal successors, (143), 6 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 149 [2021-10-28 23:18:25,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2021-10-28 23:18:25,593 INFO L225 Difference]: With dead ends: 13168 [2021-10-28 23:18:25,593 INFO L226 Difference]: Without dead ends: 10225 [2021-10-28 23:18:25,596 INFO L786 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2021-10-28 23:18:25,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10225 states. [2021-10-28 23:18:26,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10225 to 5305. [2021-10-28 23:18:26,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5305 states, 5300 states have (on average 1.2356603773584907) internal successors, (6549), 5304 states have internal predecessors, (6549), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:18:26,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5305 states to 5305 states and 6549 transitions. [2021-10-28 23:18:26,477 INFO L78 Accepts]: Start accepts. Automaton has 5305 states and 6549 transitions. Word has length 149 [2021-10-28 23:18:26,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2021-10-28 23:18:26,478 INFO L470 AbstractCegarLoop]: Abstraction has 5305 states and 6549 transitions. [2021-10-28 23:18:26,478 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 23.833333333333332) internal successors, (143), 6 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-10-28 23:18:26,478 INFO L276 IsEmpty]: Start isEmpty. Operand 5305 states and 6549 transitions. [2021-10-28 23:18:26,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2021-10-28 23:18:26,482 INFO L505 BasicCegarLoop]: Found error trace [2021-10-28 23:18:26,482 INFO L513 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:18:26,482 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2021-10-28 23:18:26,483 INFO L402 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 20 more)] === [2021-10-28 23:18:26,483 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-10-28 23:18:26,483 INFO L85 PathProgramCache]: Analyzing trace with hash -146521997, now seen corresponding path program 1 times [2021-10-28 23:18:26,483 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-10-28 23:18:26,483 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1696093679] [2021-10-28 23:18:26,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-10-28 23:18:26,483 INFO L128 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-10-28 23:18:26,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:18:26,552 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-10-28 23:18:26,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-10-28 23:18:26,719 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-10-28 23:18:26,719 INFO L627 BasicCegarLoop]: Counterexample is feasible [2021-10-28 23:18:26,720 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr22ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,722 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,723 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,723 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,723 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,723 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr4ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,723 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr5ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,723 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr6ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,724 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr7ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,724 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr8ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,724 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr9ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,724 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr10ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,724 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr11ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,725 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr12ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,725 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr13ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,725 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr14ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,725 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr15ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,725 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr16ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,725 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr17ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,726 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr18ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,726 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr19ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,726 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr20ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,726 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr21ASSERT_VIOLATIONERROR_FUNCTION [2021-10-28 23:18:26,726 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2021-10-28 23:18:26,732 INFO L731 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-10-28 23:18:26,739 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2021-10-28 23:18:27,011 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.10 11:18:27 BoogieIcfgContainer [2021-10-28 23:18:27,011 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2021-10-28 23:18:27,012 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-10-28 23:18:27,012 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-10-28 23:18:27,013 INFO L275 PluginConnector]: Witness Printer initialized [2021-10-28 23:18:27,013 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.10 11:16:59" (3/4) ... [2021-10-28 23:18:27,016 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2021-10-28 23:18:27,295 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/witness.graphml [2021-10-28 23:18:27,296 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-10-28 23:18:27,297 INFO L168 Benchmark]: Toolchain (without parser) took 89252.12 ms. Allocated memory was 102.8 MB in the beginning and 2.2 GB in the end (delta: 2.1 GB). Free memory was 61.4 MB in the beginning and 1.3 GB in the end (delta: -1.2 GB). Peak memory consumption was 853.8 MB. Max. memory is 16.1 GB. [2021-10-28 23:18:27,298 INFO L168 Benchmark]: CDTParser took 0.27 ms. Allocated memory is still 102.8 MB. Free memory was 78.5 MB in the beginning and 78.5 MB in the end (delta: 53.1 kB). There was no memory consumed. Max. memory is 16.1 GB. [2021-10-28 23:18:27,303 INFO L168 Benchmark]: CACSL2BoogieTranslator took 450.74 ms. Allocated memory is still 102.8 MB. Free memory was 61.2 MB in the beginning and 72.1 MB in the end (delta: -10.9 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-10-28 23:18:27,304 INFO L168 Benchmark]: Boogie Procedure Inliner took 87.60 ms. Allocated memory is still 102.8 MB. Free memory was 72.1 MB in the beginning and 67.3 MB in the end (delta: 4.8 MB). Peak memory consumption was 6.3 MB. Max. memory is 16.1 GB. [2021-10-28 23:18:27,304 INFO L168 Benchmark]: Boogie Preprocessor took 119.28 ms. Allocated memory is still 102.8 MB. Free memory was 67.3 MB in the beginning and 63.9 MB in the end (delta: 3.4 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-10-28 23:18:27,305 INFO L168 Benchmark]: RCFGBuilder took 1229.65 ms. Allocated memory was 102.8 MB in the beginning and 123.7 MB in the end (delta: 21.0 MB). Free memory was 63.9 MB in the beginning and 87.8 MB in the end (delta: -23.9 MB). Peak memory consumption was 36.8 MB. Max. memory is 16.1 GB. [2021-10-28 23:18:27,305 INFO L168 Benchmark]: TraceAbstraction took 87073.13 ms. Allocated memory was 123.7 MB in the beginning and 2.2 GB in the end (delta: 2.0 GB). Free memory was 87.4 MB in the beginning and 1.3 GB in the end (delta: -1.2 GB). Peak memory consumption was 808.5 MB. Max. memory is 16.1 GB. [2021-10-28 23:18:27,306 INFO L168 Benchmark]: Witness Printer took 283.59 ms. Allocated memory is still 2.2 GB. Free memory was 1.3 GB in the beginning and 1.3 GB in the end (delta: 49.3 MB). Peak memory consumption was 50.3 MB. Max. memory is 16.1 GB. [2021-10-28 23:18:27,307 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.27 ms. Allocated memory is still 102.8 MB. Free memory was 78.5 MB in the beginning and 78.5 MB in the end (delta: 53.1 kB). There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 450.74 ms. Allocated memory is still 102.8 MB. Free memory was 61.2 MB in the beginning and 72.1 MB in the end (delta: -10.9 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 87.60 ms. Allocated memory is still 102.8 MB. Free memory was 72.1 MB in the beginning and 67.3 MB in the end (delta: 4.8 MB). Peak memory consumption was 6.3 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 119.28 ms. Allocated memory is still 102.8 MB. Free memory was 67.3 MB in the beginning and 63.9 MB in the end (delta: 3.4 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 1229.65 ms. Allocated memory was 102.8 MB in the beginning and 123.7 MB in the end (delta: 21.0 MB). Free memory was 63.9 MB in the beginning and 87.8 MB in the end (delta: -23.9 MB). Peak memory consumption was 36.8 MB. Max. memory is 16.1 GB. * TraceAbstraction took 87073.13 ms. Allocated memory was 123.7 MB in the beginning and 2.2 GB in the end (delta: 2.0 GB). Free memory was 87.4 MB in the beginning and 1.3 GB in the end (delta: -1.2 GB). Peak memory consumption was 808.5 MB. Max. memory is 16.1 GB. * Witness Printer took 283.59 ms. Allocated memory is still 2.2 GB. Free memory was 1.3 GB in the beginning and 1.3 GB in the end (delta: 49.3 MB). Peak memory consumption was 50.3 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 618]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L542] int c1 ; [L543] int i2 ; [L546] c1 = 0 [L547] side1Failed = __VERIFIER_nondet_bool() [L548] side2Failed = __VERIFIER_nondet_bool() [L549] side1_written = __VERIFIER_nondet_char() [L550] side2_written = __VERIFIER_nondet_char() [L551] side1Failed_History_0 = __VERIFIER_nondet_bool() [L552] side1Failed_History_1 = __VERIFIER_nondet_bool() [L553] side1Failed_History_2 = __VERIFIER_nondet_bool() [L554] side2Failed_History_0 = __VERIFIER_nondet_bool() [L555] side2Failed_History_1 = __VERIFIER_nondet_bool() [L556] side2Failed_History_2 = __VERIFIER_nondet_bool() [L557] active_side_History_0 = __VERIFIER_nondet_char() [L558] active_side_History_1 = __VERIFIER_nondet_char() [L559] active_side_History_2 = __VERIFIER_nondet_char() [L560] manual_selection_History_0 = __VERIFIER_nondet_char() [L561] manual_selection_History_1 = __VERIFIER_nondet_char() [L562] manual_selection_History_2 = __VERIFIER_nondet_char() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L563] i2 = init() [L58] COND FALSE !(!cond) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L565] cs1_old = nomsg [L566] cs1_new = nomsg [L567] cs2_old = nomsg [L568] cs2_new = nomsg [L569] s1s2_old = nomsg [L570] s1s2_new = nomsg [L571] s1s1_old = nomsg [L572] s1s1_new = nomsg [L573] s2s1_old = nomsg [L574] s2s1_new = nomsg [L575] s2s2_old = nomsg [L576] s2s2_new = nomsg [L577] s1p_old = nomsg [L578] s1p_new = nomsg [L579] s2p_old = nomsg [L580] s2p_new = nomsg [L581] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L582] COND TRUE 1 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=3, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND TRUE \read(side1Failed) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=2, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L409] COND FALSE !((int )side2 == 0) [L412] active_side = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-3, cs1_old=-1, cs2=0, cs2_new=-3, cs2_old=-1, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L447] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] COND TRUE ! side2Failed [L451] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND TRUE ! tmp___0 [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L458] tmp___1 = read_side1_failed_history((unsigned char)1) [L459] COND TRUE ! tmp___1 [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L460] tmp___2 = read_side1_failed_history((unsigned char)0) [L461] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L486] tmp___7 = read_side1_failed_history((unsigned char)1) [L487] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L502] tmp___11 = read_side1_failed_history((unsigned char)1) [L503] COND TRUE ! tmp___11 [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L504] tmp___12 = read_side2_failed_history((unsigned char)1) [L505] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L148] COND FALSE !((int )index == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L151] COND FALSE !((int )index == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L154] COND TRUE (int )index == 2 [L155] return (active_side_History_2); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L518] tmp___20 = read_active_side_history((unsigned char)2) [L519] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L537] return (1); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L604] c1 = check() [L616] COND FALSE !(! arg) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-3, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L582] COND TRUE 1 [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] EXPR manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] EXPR manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-1, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L277] COND TRUE \read(side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] EXPR nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] EXPR nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] EXPR nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-3, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L347] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L350] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L351] COND TRUE (int )side2 != (int )nomsg [L352] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] EXPR next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] EXPR next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] EXPR next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L409] COND TRUE (int )side2 == 0 [L410] active_side = (int8_t )2 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-2, cs1_old=-3, cs2=0, cs2_new=-2, cs2_old=-1, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=-1, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L447] COND FALSE !(! side1Failed) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L450] COND TRUE ! side2Failed [L451] tmp = 1 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L58] COND FALSE !(!cond) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L178] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND FALSE !(! tmp___0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L88] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L486] tmp___7 = read_side1_failed_history((unsigned char)1) [L487] COND TRUE \read(tmp___7) [L118] COND FALSE !((int )index == 0) VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L488] tmp___8 = read_side2_failed_history((unsigned char)1) [L489] COND TRUE ! tmp___8 [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L490] tmp___5 = read_active_side_history((unsigned char)0) [L491] COND FALSE !(! ((int )tmp___5 == 2)) [L118] COND TRUE (int )index == 0 [L119] return (side2Failed_History_0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L494] tmp___6 = read_side2_failed_history((unsigned char)0) [L495] COND TRUE ! tmp___6 VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L496] COND TRUE ! ((int )side2_written == 1) [L497] return (0); VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L604] c1 = check() [L616] COND TRUE ! arg VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] [L618] reach_error() VAL [active_side_History_0=2, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-2, cs2=0, cs2_new=-1, cs2_old=-2, manual_selection_History_0=-2, manual_selection_History_1=-3, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1_written=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=1, side1Failed_History_2=0, side2_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0] - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 618]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 296 locations, 23 error locations. Started 1 CEGAR loops. OverallTime: 86.7s, OverallIterations: 45, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 52.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 21531 SDtfs, 49487 SDslu, 63295 SDs, 0 SdLazy, 12847 SolverSat, 794 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 8.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2582 GetRequests, 1775 SyntacticMatches, 3 SemanticMatches, 804 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43369 ImplicationChecksByTransitivity, 13.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=7251occurred in iteration=40, InterpolantAutomatonStates: 791, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 13.4s AutomataMinimizationTime, 44 MinimizatonAttempts, 74747 StatesRemovedByMinimization, 41 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.7s SsaConstructionTime, 2.6s SatisfiabilityAnalysisTime, 9.9s InterpolantComputationTime, 5847 NumberOfCodeBlocks, 5847 NumberOfCodeBlocksAsserted, 56 NumberOfCheckSat, 5642 ConstructedInterpolants, 0 QuantifiedInterpolants, 19808 SizeOfPredicates, 40 NumberOfNonLiveVariables, 8616 ConjunctsInSsa, 129 ConjunctsInUnsatCore, 55 InterpolantComputations, 38 PerfectInterpolantSequences, 792/1160 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2021-10-28 23:18:27,374 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0bfe980b-c5ff-472a-9fce-076071ba9582/bin/uautomizer-GMMbpWq8iD/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...