./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-15/array17_alloca.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 9ad7fb26 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-15/array17_alloca.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash c64c4370fd8b6e918e28e5e9f3a24e52a6875ae7268f4c7e3f97f19ee293047c --- Real Ultimate output --- This is Ultimate 0.2.1-dev-9ad7fb2 [2021-11-02 22:34:26,007 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-02 22:34:26,009 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-02 22:34:26,065 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-02 22:34:26,066 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-02 22:34:26,072 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-02 22:34:26,075 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-02 22:34:26,081 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-02 22:34:26,085 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-02 22:34:26,088 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-02 22:34:26,090 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-02 22:34:26,092 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-02 22:34:26,092 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-02 22:34:26,094 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-02 22:34:26,096 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-02 22:34:26,098 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-02 22:34:26,100 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-02 22:34:26,101 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-02 22:34:26,104 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-02 22:34:26,108 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-02 22:34:26,111 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-02 22:34:26,113 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-02 22:34:26,115 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-02 22:34:26,117 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-02 22:34:26,122 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-02 22:34:26,123 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-02 22:34:26,123 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-02 22:34:26,125 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-02 22:34:26,126 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-02 22:34:26,127 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-02 22:34:26,128 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-02 22:34:26,129 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-02 22:34:26,151 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-02 22:34:26,152 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-02 22:34:26,154 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-02 22:34:26,154 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-02 22:34:26,155 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-02 22:34:26,155 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-02 22:34:26,156 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-02 22:34:26,157 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-02 22:34:26,158 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-02 22:34:26,159 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/config/svcomp-Termination-64bit-Automizer_Default.epf [2021-11-02 22:34:26,208 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-02 22:34:26,214 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-02 22:34:26,214 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-02 22:34:26,215 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-02 22:34:26,217 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-02 22:34:26,217 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-02 22:34:26,217 INFO L138 SettingsManager]: * Use SBE=true [2021-11-02 22:34:26,218 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-11-02 22:34:26,218 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-11-02 22:34:26,218 INFO L138 SettingsManager]: * Use old map elimination=false [2021-11-02 22:34:26,220 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-11-02 22:34:26,220 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-11-02 22:34:26,220 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-11-02 22:34:26,221 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-02 22:34:26,221 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-11-02 22:34:26,221 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-02 22:34:26,222 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-02 22:34:26,222 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-11-02 22:34:26,222 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-11-02 22:34:26,222 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-11-02 22:34:26,223 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-02 22:34:26,223 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-11-02 22:34:26,223 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-02 22:34:26,223 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-11-02 22:34:26,224 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-02 22:34:26,224 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-02 22:34:26,226 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-02 22:34:26,227 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-02 22:34:26,227 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-02 22:34:26,228 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-11-02 22:34:26,228 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c64c4370fd8b6e918e28e5e9f3a24e52a6875ae7268f4c7e3f97f19ee293047c [2021-11-02 22:34:26,532 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-02 22:34:26,560 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-02 22:34:26,563 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-02 22:34:26,565 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-02 22:34:26,566 INFO L275 PluginConnector]: CDTParser initialized [2021-11-02 22:34:26,567 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/../../sv-benchmarks/c/termination-15/array17_alloca.i [2021-11-02 22:34:26,647 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/data/341cfc3d6/a0396ed27e3e431da23fd473873adab4/FLAG1af17ee73 [2021-11-02 22:34:27,349 INFO L306 CDTParser]: Found 1 translation units. [2021-11-02 22:34:27,353 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/sv-benchmarks/c/termination-15/array17_alloca.i [2021-11-02 22:34:27,366 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/data/341cfc3d6/a0396ed27e3e431da23fd473873adab4/FLAG1af17ee73 [2021-11-02 22:34:27,561 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/data/341cfc3d6/a0396ed27e3e431da23fd473873adab4 [2021-11-02 22:34:27,564 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-02 22:34:27,569 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-02 22:34:27,574 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-02 22:34:27,576 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-02 22:34:27,581 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-02 22:34:27,582 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.11 10:34:27" (1/1) ... [2021-11-02 22:34:27,586 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@478d9b11 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:34:27, skipping insertion in model container [2021-11-02 22:34:27,588 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.11 10:34:27" (1/1) ... [2021-11-02 22:34:27,597 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-02 22:34:27,641 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-02 22:34:28,126 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-02 22:34:28,149 INFO L203 MainTranslator]: Completed pre-run [2021-11-02 22:34:28,219 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-02 22:34:28,276 INFO L208 MainTranslator]: Completed translation [2021-11-02 22:34:28,277 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:34:28 WrapperNode [2021-11-02 22:34:28,278 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-02 22:34:28,279 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-02 22:34:28,280 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-02 22:34:28,280 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-02 22:34:28,294 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:34:28" (1/1) ... [2021-11-02 22:34:28,328 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:34:28" (1/1) ... [2021-11-02 22:34:28,357 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-02 22:34:28,358 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-02 22:34:28,358 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-02 22:34:28,359 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-02 22:34:28,369 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:34:28" (1/1) ... [2021-11-02 22:34:28,370 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:34:28" (1/1) ... [2021-11-02 22:34:28,373 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:34:28" (1/1) ... [2021-11-02 22:34:28,373 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:34:28" (1/1) ... [2021-11-02 22:34:28,380 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:34:28" (1/1) ... [2021-11-02 22:34:28,385 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:34:28" (1/1) ... [2021-11-02 22:34:28,387 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:34:28" (1/1) ... [2021-11-02 22:34:28,390 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-02 22:34:28,392 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-02 22:34:28,392 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-02 22:34:28,392 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-02 22:34:28,394 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:34:28" (1/1) ... [2021-11-02 22:34:28,417 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:28,433 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:28,448 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:34:28,465 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-11-02 22:34:28,510 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-11-02 22:34:28,510 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-02 22:34:28,511 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-02 22:34:28,511 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-02 22:34:28,511 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-02 22:34:28,511 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-02 22:34:28,771 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-02 22:34:28,772 INFO L299 CfgBuilder]: Removed 6 assume(true) statements. [2021-11-02 22:34:28,774 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.11 10:34:28 BoogieIcfgContainer [2021-11-02 22:34:28,775 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-02 22:34:28,776 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-11-02 22:34:28,776 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-11-02 22:34:28,781 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-11-02 22:34:28,782 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-02 22:34:28,782 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 02.11 10:34:27" (1/3) ... [2021-11-02 22:34:28,784 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@59867983 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 02.11 10:34:28, skipping insertion in model container [2021-11-02 22:34:28,784 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-02 22:34:28,785 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:34:28" (2/3) ... [2021-11-02 22:34:28,785 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@59867983 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 02.11 10:34:28, skipping insertion in model container [2021-11-02 22:34:28,785 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-02 22:34:28,785 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.11 10:34:28" (3/3) ... [2021-11-02 22:34:28,787 INFO L389 chiAutomizerObserver]: Analyzing ICFG array17_alloca.i [2021-11-02 22:34:28,863 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-11-02 22:34:28,863 INFO L360 BuchiCegarLoop]: Hoare is false [2021-11-02 22:34:28,863 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-11-02 22:34:28,864 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-11-02 22:34:28,864 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-11-02 22:34:28,864 INFO L364 BuchiCegarLoop]: Difference is false [2021-11-02 22:34:28,864 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-11-02 22:34:28,864 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-11-02 22:34:28,926 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 14 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:28,959 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:34:28,973 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:28,973 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:28,981 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2021-11-02 22:34:28,981 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:28,981 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-11-02 22:34:28,982 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 14 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:28,985 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:34:29,001 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:29,001 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:29,002 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2021-11-02 22:34:29,002 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:29,010 INFO L791 eck$LassoCheckResult]: Stem: 4#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 8#L-1true havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 14#L367true assume !(main_~length~0 < 1); 12#L367-2true assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 15#L371true assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 17#L373true assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 5#L375-3true [2021-11-02 22:34:29,011 INFO L793 eck$LassoCheckResult]: Loop: 5#L375-3true assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10#L375-2true main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5#L375-3true [2021-11-02 22:34:29,038 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:29,039 INFO L85 PathProgramCache]: Analyzing trace with hash 889572334, now seen corresponding path program 1 times [2021-11-02 22:34:29,050 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:29,051 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1234503689] [2021-11-02 22:34:29,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:29,053 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:29,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:29,219 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:29,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:29,284 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:29,295 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:29,295 INFO L85 PathProgramCache]: Analyzing trace with hash 1955, now seen corresponding path program 1 times [2021-11-02 22:34:29,295 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:29,296 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1017164910] [2021-11-02 22:34:29,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:29,296 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:29,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:29,318 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:29,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:29,344 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:29,351 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:29,351 INFO L85 PathProgramCache]: Analyzing trace with hash 180522064, now seen corresponding path program 1 times [2021-11-02 22:34:29,352 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:29,352 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1304578716] [2021-11-02 22:34:29,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:29,352 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:29,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:29,379 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:29,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:29,408 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:30,005 INFO L210 LassoAnalysis]: Preferences: [2021-11-02 22:34:30,006 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-11-02 22:34:30,006 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-11-02 22:34:30,006 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-11-02 22:34:30,006 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-11-02 22:34:30,007 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:30,007 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-11-02 22:34:30,007 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-11-02 22:34:30,007 INFO L133 ssoRankerPreferences]: Filename of dumped script: array17_alloca.i_Iteration1_Lasso [2021-11-02 22:34:30,008 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-11-02 22:34:30,008 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-11-02 22:34:30,061 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:30,069 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:30,076 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:30,082 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:30,086 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:30,091 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:30,094 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:30,097 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:30,102 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:30,106 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:30,112 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:30,337 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:30,344 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:30,636 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-11-02 22:34:30,643 INFO L490 LassoAnalysis]: Using template 'affine'. [2021-11-02 22:34:30,645 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:30,645 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:30,647 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:34:30,655 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2021-11-02 22:34:30,657 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-02 22:34:30,674 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-02 22:34:30,675 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-02 22:34:30,675 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-02 22:34:30,676 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-02 22:34:30,676 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-02 22:34:30,679 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-02 22:34:30,679 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-02 22:34:30,686 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-02 22:34:30,721 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2021-11-02 22:34:30,722 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:30,722 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:30,725 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:34:30,735 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-02 22:34:30,746 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-02 22:34:30,747 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-02 22:34:30,747 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-02 22:34:30,747 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-02 22:34:30,747 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-02 22:34:30,748 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-02 22:34:30,749 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-02 22:34:30,750 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2021-11-02 22:34:30,751 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-02 22:34:30,801 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2021-11-02 22:34:30,802 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:30,803 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:30,804 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:34:30,816 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-02 22:34:30,829 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-02 22:34:30,829 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-02 22:34:30,830 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-02 22:34:30,830 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-02 22:34:30,830 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-02 22:34:30,832 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-02 22:34:30,832 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-02 22:34:30,836 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2021-11-02 22:34:30,845 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-02 22:34:30,890 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2021-11-02 22:34:30,891 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:30,891 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:30,892 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:34:30,898 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2021-11-02 22:34:30,901 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-02 22:34:30,910 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-02 22:34:30,911 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-02 22:34:30,911 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-02 22:34:30,911 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-02 22:34:30,911 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-02 22:34:30,912 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-02 22:34:30,912 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-02 22:34:30,924 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-02 22:34:30,977 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2021-11-02 22:34:30,978 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:30,978 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:30,981 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:34:30,989 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-02 22:34:30,995 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2021-11-02 22:34:30,999 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-02 22:34:30,999 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-02 22:34:30,999 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-02 22:34:31,000 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-02 22:34:31,007 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-11-02 22:34:31,009 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-11-02 22:34:31,021 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-02 22:34:31,056 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2021-11-02 22:34:31,057 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:31,057 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:31,060 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:34:31,061 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2021-11-02 22:34:31,065 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-02 22:34:31,075 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-02 22:34:31,075 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-02 22:34:31,075 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-02 22:34:31,075 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-02 22:34:31,075 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-02 22:34:31,076 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-02 22:34:31,076 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-02 22:34:31,091 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-02 22:34:31,127 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2021-11-02 22:34:31,128 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:31,128 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:31,129 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:34:31,131 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2021-11-02 22:34:31,132 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-02 22:34:31,142 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-02 22:34:31,142 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-02 22:34:31,143 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-02 22:34:31,143 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-02 22:34:31,143 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-02 22:34:31,143 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-02 22:34:31,144 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-02 22:34:31,145 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-02 22:34:31,174 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2021-11-02 22:34:31,175 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:31,175 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:31,176 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:34:31,182 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2021-11-02 22:34:31,183 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-02 22:34:31,192 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-02 22:34:31,192 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-02 22:34:31,192 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-02 22:34:31,193 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-02 22:34:31,193 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-02 22:34:31,193 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-02 22:34:31,194 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-02 22:34:31,197 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-02 22:34:31,222 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2021-11-02 22:34:31,223 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:31,223 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:31,224 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:34:31,225 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2021-11-02 22:34:31,226 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-02 22:34:31,235 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-02 22:34:31,236 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-02 22:34:31,236 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-02 22:34:31,236 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-02 22:34:31,236 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-02 22:34:31,237 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-02 22:34:31,237 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-02 22:34:31,238 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-02 22:34:31,270 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2021-11-02 22:34:31,270 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:31,270 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:31,271 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:34:31,281 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2021-11-02 22:34:31,282 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-02 22:34:31,293 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-02 22:34:31,293 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-02 22:34:31,294 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-02 22:34:31,294 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-02 22:34:31,294 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-02 22:34:31,295 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-02 22:34:31,295 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-02 22:34:31,321 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-02 22:34:31,361 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2021-11-02 22:34:31,362 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:31,362 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:31,363 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:34:31,364 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2021-11-02 22:34:31,365 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-02 22:34:31,374 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-02 22:34:31,374 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-02 22:34:31,374 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-02 22:34:31,374 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-02 22:34:31,380 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-11-02 22:34:31,381 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-11-02 22:34:31,421 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-02 22:34:31,451 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Ended with exit code 0 [2021-11-02 22:34:31,452 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:31,452 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:31,453 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:34:31,456 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2021-11-02 22:34:31,457 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-02 22:34:31,466 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-02 22:34:31,467 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-02 22:34:31,467 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-02 22:34:31,467 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-02 22:34:31,479 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-11-02 22:34:31,479 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-11-02 22:34:31,505 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2021-11-02 22:34:31,565 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver. [2021-11-02 22:34:31,565 INFO L444 ModelExtractionUtils]: 9 out of 22 variables were initially zero. Simplification set additionally 10 variables to zero. [2021-11-02 22:34:31,567 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:31,568 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:31,577 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:34:31,602 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2021-11-02 22:34:31,603 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2021-11-02 22:34:31,627 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2021-11-02 22:34:31,627 INFO L513 LassoAnalysis]: Proved termination. [2021-11-02 22:34:31,628 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0, ULTIMATE.start_main_~length~0) = -1*ULTIMATE.start_main_~i~0 + 1*ULTIMATE.start_main_~length~0 Supporting invariants [] [2021-11-02 22:34:31,704 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2021-11-02 22:34:31,716 INFO L297 tatePredicateManager]: 3 out of 3 supporting invariants were superfluous and have been removed [2021-11-02 22:34:31,761 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:31,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:31,792 INFO L263 TraceCheckSpWp]: Trace formula consists of 30 conjuncts, 2 conjunts are in the unsatisfiable core [2021-11-02 22:34:31,794 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:34:31,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:31,846 INFO L263 TraceCheckSpWp]: Trace formula consists of 12 conjuncts, 4 conjunts are in the unsatisfiable core [2021-11-02 22:34:31,847 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:34:31,889 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:31,911 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2021-11-02 22:34:31,912 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 14 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:31,978 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 15 states, 14 states have (on average 1.6428571428571428) internal successors, (23), 14 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 34 states and 49 transitions. Complement of second has 7 states. [2021-11-02 22:34:31,979 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2021-11-02 22:34:31,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:31,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 34 transitions. [2021-11-02 22:34:31,984 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 34 transitions. Stem has 6 letters. Loop has 2 letters. [2021-11-02 22:34:31,985 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-11-02 22:34:31,985 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 34 transitions. Stem has 8 letters. Loop has 2 letters. [2021-11-02 22:34:31,985 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-11-02 22:34:31,986 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 34 transitions. Stem has 6 letters. Loop has 4 letters. [2021-11-02 22:34:31,986 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-11-02 22:34:31,987 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 49 transitions. [2021-11-02 22:34:31,991 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:31,996 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 12 states and 16 transitions. [2021-11-02 22:34:31,997 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2021-11-02 22:34:31,998 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2021-11-02 22:34:31,998 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12 states and 16 transitions. [2021-11-02 22:34:31,999 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-02 22:34:31,999 INFO L681 BuchiCegarLoop]: Abstraction has 12 states and 16 transitions. [2021-11-02 22:34:32,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states and 16 transitions. [2021-11-02 22:34:32,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 12. [2021-11-02 22:34:32,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.3333333333333333) internal successors, (16), 11 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:32,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 16 transitions. [2021-11-02 22:34:32,037 INFO L704 BuchiCegarLoop]: Abstraction has 12 states and 16 transitions. [2021-11-02 22:34:32,037 INFO L587 BuchiCegarLoop]: Abstraction has 12 states and 16 transitions. [2021-11-02 22:34:32,037 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-11-02 22:34:32,037 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 16 transitions. [2021-11-02 22:34:32,041 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:32,041 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:32,041 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:32,042 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:34:32,042 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:32,043 INFO L791 eck$LassoCheckResult]: Stem: 118#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 119#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 122#L367 assume !(main_~length~0 < 1); 120#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 121#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 123#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 114#L375-3 assume !(main_~i~0 < main_~length~0); 115#L375-4 main_~j~0 := 1; 112#L380-2 [2021-11-02 22:34:32,044 INFO L793 eck$LassoCheckResult]: Loop: 112#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 113#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 112#L380-2 [2021-11-02 22:34:32,045 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:32,045 INFO L85 PathProgramCache]: Analyzing trace with hash 180522006, now seen corresponding path program 1 times [2021-11-02 22:34:32,045 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:32,046 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2018871127] [2021-11-02 22:34:32,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:32,046 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:32,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:32,172 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:32,173 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:34:32,173 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2018871127] [2021-11-02 22:34:32,174 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2018871127] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-02 22:34:32,174 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-02 22:34:32,174 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-02 22:34:32,175 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [66560561] [2021-11-02 22:34:32,178 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:34:32,179 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:32,179 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 1 times [2021-11-02 22:34:32,179 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:32,179 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [815607082] [2021-11-02 22:34:32,180 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:32,180 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:32,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:32,208 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:32,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:32,218 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:32,327 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:34:32,336 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-02 22:34:32,337 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2021-11-02 22:34:32,339 INFO L87 Difference]: Start difference. First operand 12 states and 16 transitions. cyclomatic complexity: 6 Second operand has 4 states, 4 states have (on average 2.0) internal successors, (8), 4 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:32,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:34:32,374 INFO L93 Difference]: Finished difference Result 13 states and 16 transitions. [2021-11-02 22:34:32,374 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-02 22:34:32,375 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 13 states and 16 transitions. [2021-11-02 22:34:32,376 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:32,377 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 13 states to 13 states and 16 transitions. [2021-11-02 22:34:32,377 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2021-11-02 22:34:32,377 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2021-11-02 22:34:32,377 INFO L73 IsDeterministic]: Start isDeterministic. Operand 13 states and 16 transitions. [2021-11-02 22:34:32,378 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-02 22:34:32,378 INFO L681 BuchiCegarLoop]: Abstraction has 13 states and 16 transitions. [2021-11-02 22:34:32,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states and 16 transitions. [2021-11-02 22:34:32,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 12. [2021-11-02 22:34:32,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.25) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:32,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 15 transitions. [2021-11-02 22:34:32,380 INFO L704 BuchiCegarLoop]: Abstraction has 12 states and 15 transitions. [2021-11-02 22:34:32,380 INFO L587 BuchiCegarLoop]: Abstraction has 12 states and 15 transitions. [2021-11-02 22:34:32,380 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-11-02 22:34:32,380 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 15 transitions. [2021-11-02 22:34:32,381 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:32,381 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:32,381 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:32,382 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:34:32,382 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:32,382 INFO L791 eck$LassoCheckResult]: Stem: 146#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 147#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 154#L367 assume !(main_~length~0 < 1); 148#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 149#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 155#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 150#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 151#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 152#L375-3 assume !(main_~i~0 < main_~length~0); 153#L375-4 main_~j~0 := 1; 144#L380-2 [2021-11-02 22:34:32,383 INFO L793 eck$LassoCheckResult]: Loop: 144#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 145#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 144#L380-2 [2021-11-02 22:34:32,383 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:32,383 INFO L85 PathProgramCache]: Analyzing trace with hash 1683012600, now seen corresponding path program 1 times [2021-11-02 22:34:32,383 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:32,384 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1513741952] [2021-11-02 22:34:32,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:32,384 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:32,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:32,419 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:32,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:32,461 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:32,467 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:32,467 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 2 times [2021-11-02 22:34:32,468 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:32,468 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [643529785] [2021-11-02 22:34:32,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:32,468 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:32,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:32,482 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:32,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:32,495 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:32,498 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:32,499 INFO L85 PathProgramCache]: Analyzing trace with hash -1827560517, now seen corresponding path program 1 times [2021-11-02 22:34:32,500 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:32,501 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2100896938] [2021-11-02 22:34:32,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:32,501 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:32,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:32,598 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:32,599 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:34:32,599 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2100896938] [2021-11-02 22:34:32,599 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2100896938] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:32,599 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [508389019] [2021-11-02 22:34:32,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:32,600 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:34:32,600 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:32,613 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:34:32,701 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2021-11-02 22:34:32,717 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Ended with exit code 0 [2021-11-02 22:34:32,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:32,771 INFO L263 TraceCheckSpWp]: Trace formula consists of 58 conjuncts, 5 conjunts are in the unsatisfiable core [2021-11-02 22:34:32,772 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:34:32,868 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:32,868 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [508389019] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:32,869 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:34:32,869 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5] total 7 [2021-11-02 22:34:32,869 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [292564949] [2021-11-02 22:34:32,993 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:34:32,994 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2021-11-02 22:34:32,996 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2021-11-02 22:34:32,997 INFO L87 Difference]: Start difference. First operand 12 states and 15 transitions. cyclomatic complexity: 5 Second operand has 7 states, 7 states have (on average 2.4285714285714284) internal successors, (17), 7 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:33,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:34:33,107 INFO L93 Difference]: Finished difference Result 24 states and 28 transitions. [2021-11-02 22:34:33,108 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2021-11-02 22:34:33,108 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 24 states and 28 transitions. [2021-11-02 22:34:33,117 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:33,118 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 24 states to 15 states and 17 transitions. [2021-11-02 22:34:33,119 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2021-11-02 22:34:33,119 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2021-11-02 22:34:33,119 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15 states and 17 transitions. [2021-11-02 22:34:33,119 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-02 22:34:33,119 INFO L681 BuchiCegarLoop]: Abstraction has 15 states and 17 transitions. [2021-11-02 22:34:33,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states and 17 transitions. [2021-11-02 22:34:33,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 14. [2021-11-02 22:34:33,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 13 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:33,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 16 transitions. [2021-11-02 22:34:33,124 INFO L704 BuchiCegarLoop]: Abstraction has 14 states and 16 transitions. [2021-11-02 22:34:33,124 INFO L587 BuchiCegarLoop]: Abstraction has 14 states and 16 transitions. [2021-11-02 22:34:33,124 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-11-02 22:34:33,124 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 14 states and 16 transitions. [2021-11-02 22:34:33,125 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:33,125 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:33,125 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:33,126 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:34:33,126 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:33,127 INFO L791 eck$LassoCheckResult]: Stem: 239#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 240#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 243#L367 assume !(main_~length~0 < 1); 241#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 242#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 244#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 235#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 236#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 237#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 238#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 246#L375-3 assume !(main_~i~0 < main_~length~0); 245#L375-4 main_~j~0 := 1; 233#L380-2 [2021-11-02 22:34:33,127 INFO L793 eck$LassoCheckResult]: Loop: 233#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 234#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 233#L380-2 [2021-11-02 22:34:33,127 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:33,127 INFO L85 PathProgramCache]: Analyzing trace with hash -1827505318, now seen corresponding path program 2 times [2021-11-02 22:34:33,128 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:33,128 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2029176051] [2021-11-02 22:34:33,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:33,128 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:33,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:33,171 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:33,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:33,206 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:33,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:33,207 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 3 times [2021-11-02 22:34:33,207 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:33,207 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1100801075] [2021-11-02 22:34:33,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:33,208 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:33,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:33,214 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:33,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:33,220 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:33,221 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:33,221 INFO L85 PathProgramCache]: Analyzing trace with hash 409014941, now seen corresponding path program 2 times [2021-11-02 22:34:33,221 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:33,222 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [153197174] [2021-11-02 22:34:33,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:33,222 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:33,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:33,244 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:33,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:33,267 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:33,748 INFO L210 LassoAnalysis]: Preferences: [2021-11-02 22:34:33,748 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-11-02 22:34:33,748 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-11-02 22:34:33,748 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-11-02 22:34:33,748 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-11-02 22:34:33,748 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:33,748 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-11-02 22:34:33,749 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-11-02 22:34:33,749 INFO L133 ssoRankerPreferences]: Filename of dumped script: array17_alloca.i_Iteration4_Lasso [2021-11-02 22:34:33,749 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-11-02 22:34:33,749 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-11-02 22:34:33,753 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:33,759 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:33,761 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:33,764 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:33,933 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:33,935 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:33,938 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:33,941 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:33,944 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:33,946 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:33,949 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:33,953 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-02 22:34:34,244 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-11-02 22:34:34,244 INFO L490 LassoAnalysis]: Using template 'affine'. [2021-11-02 22:34:34,244 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:34,245 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:34,249 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:34:34,258 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-02 22:34:34,270 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-02 22:34:34,270 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-02 22:34:34,270 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-02 22:34:34,270 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-02 22:34:34,271 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-02 22:34:34,271 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-02 22:34:34,271 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-02 22:34:34,275 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2021-11-02 22:34:34,289 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-02 22:34:34,334 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2021-11-02 22:34:34,335 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:34,335 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:34,337 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:34:34,345 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-02 22:34:34,356 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-02 22:34:34,357 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-02 22:34:34,357 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-02 22:34:34,357 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-02 22:34:34,357 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-02 22:34:34,358 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-02 22:34:34,358 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-02 22:34:34,360 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2021-11-02 22:34:34,381 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-02 22:34:34,428 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Forceful destruction successful, exit code 0 [2021-11-02 22:34:34,429 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:34,429 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:34,430 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:34:34,442 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2021-11-02 22:34:34,443 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-02 22:34:34,454 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-02 22:34:34,455 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-02 22:34:34,455 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-02 22:34:34,455 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-02 22:34:34,459 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-11-02 22:34:34,459 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-11-02 22:34:34,477 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-02 22:34:34,518 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2021-11-02 22:34:34,518 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:34,519 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:34,520 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:34:34,528 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-02 22:34:34,540 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2021-11-02 22:34:34,540 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-02 22:34:34,540 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-02 22:34:34,540 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-02 22:34:34,541 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-02 22:34:34,543 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-11-02 22:34:34,543 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-11-02 22:34:34,547 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-02 22:34:34,572 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Forceful destruction successful, exit code 0 [2021-11-02 22:34:34,573 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:34,573 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:34,574 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:34:34,580 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2021-11-02 22:34:34,581 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-02 22:34:34,590 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-02 22:34:34,590 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-02 22:34:34,591 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-02 22:34:34,591 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-02 22:34:34,591 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-02 22:34:34,592 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-02 22:34:34,592 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-02 22:34:34,594 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-02 22:34:34,622 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Forceful destruction successful, exit code 0 [2021-11-02 22:34:34,622 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:34,623 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:34,623 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:34:34,628 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2021-11-02 22:34:34,629 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-02 22:34:34,638 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-02 22:34:34,639 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-02 22:34:34,639 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-02 22:34:34,639 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-02 22:34:34,644 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-11-02 22:34:34,644 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-11-02 22:34:34,663 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-02 22:34:34,700 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Forceful destruction successful, exit code 0 [2021-11-02 22:34:34,700 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:34,700 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:34,701 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:34:34,703 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2021-11-02 22:34:34,704 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-02 22:34:34,714 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-02 22:34:34,715 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-02 22:34:34,715 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-02 22:34:34,715 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-02 22:34:34,734 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2021-11-02 22:34:34,734 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2021-11-02 22:34:34,761 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2021-11-02 22:34:34,779 INFO L443 ModelExtractionUtils]: Simplification made 8 calls to the SMT solver. [2021-11-02 22:34:34,780 INFO L444 ModelExtractionUtils]: 12 out of 25 variables were initially zero. Simplification set additionally 9 variables to zero. [2021-11-02 22:34:34,780 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:34:34,780 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:34,783 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:34:34,786 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2021-11-02 22:34:34,796 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2021-11-02 22:34:34,798 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2021-11-02 22:34:34,798 INFO L513 LassoAnalysis]: Proved termination. [2021-11-02 22:34:34,798 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~arr~0.offset, v_rep(select #length ULTIMATE.start_main_~arr~0.base)_2, ULTIMATE.start_main_~j~0) = -1*ULTIMATE.start_main_~arr~0.offset + 1*v_rep(select #length ULTIMATE.start_main_~arr~0.base)_2 - 2*ULTIMATE.start_main_~j~0 Supporting invariants [] [2021-11-02 22:34:34,824 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Forceful destruction successful, exit code 0 [2021-11-02 22:34:34,837 INFO L297 tatePredicateManager]: 4 out of 4 supporting invariants were superfluous and have been removed [2021-11-02 22:34:34,850 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:34,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:34,872 INFO L263 TraceCheckSpWp]: Trace formula consists of 53 conjuncts, 2 conjunts are in the unsatisfiable core [2021-11-02 22:34:34,873 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:34:34,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:34,935 INFO L263 TraceCheckSpWp]: Trace formula consists of 17 conjuncts, 5 conjunts are in the unsatisfiable core [2021-11-02 22:34:34,936 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:34:34,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:34,975 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2021-11-02 22:34:34,975 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 14 states and 16 transitions. cyclomatic complexity: 4 Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:34,993 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 14 states and 16 transitions. cyclomatic complexity: 4. Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 18 states and 22 transitions. Complement of second has 5 states. [2021-11-02 22:34:34,994 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2021-11-02 22:34:34,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:34,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 12 transitions. [2021-11-02 22:34:34,994 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 12 transitions. Stem has 12 letters. Loop has 2 letters. [2021-11-02 22:34:34,995 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-11-02 22:34:34,995 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 12 transitions. Stem has 14 letters. Loop has 2 letters. [2021-11-02 22:34:34,995 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-11-02 22:34:34,995 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 12 transitions. Stem has 12 letters. Loop has 4 letters. [2021-11-02 22:34:34,996 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-11-02 22:34:34,996 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 18 states and 22 transitions. [2021-11-02 22:34:34,997 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:34,998 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 18 states to 18 states and 22 transitions. [2021-11-02 22:34:34,998 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2021-11-02 22:34:34,998 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:34:34,998 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 22 transitions. [2021-11-02 22:34:34,998 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:34:34,998 INFO L681 BuchiCegarLoop]: Abstraction has 18 states and 22 transitions. [2021-11-02 22:34:34,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 22 transitions. [2021-11-02 22:34:35,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 18. [2021-11-02 22:34:35,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.2222222222222223) internal successors, (22), 17 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:35,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 22 transitions. [2021-11-02 22:34:35,001 INFO L704 BuchiCegarLoop]: Abstraction has 18 states and 22 transitions. [2021-11-02 22:34:35,001 INFO L587 BuchiCegarLoop]: Abstraction has 18 states and 22 transitions. [2021-11-02 22:34:35,001 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-11-02 22:34:35,002 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18 states and 22 transitions. [2021-11-02 22:34:35,002 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:35,002 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:35,003 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:35,003 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:34:35,003 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:35,004 INFO L791 eck$LassoCheckResult]: Stem: 355#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 356#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 357#L367 assume !(main_~length~0 < 1); 349#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 350#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 358#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 351#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 352#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 353#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 354#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 361#L375-3 assume !(main_~i~0 < main_~length~0); 359#L375-4 main_~j~0 := 1; 360#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 348#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 344#L380-2 [2021-11-02 22:34:35,004 INFO L793 eck$LassoCheckResult]: Loop: 344#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 345#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 344#L380-2 [2021-11-02 22:34:35,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:35,004 INFO L85 PathProgramCache]: Analyzing trace with hash 409014943, now seen corresponding path program 1 times [2021-11-02 22:34:35,005 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:35,005 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [505766119] [2021-11-02 22:34:35,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:35,005 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:35,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:35,326 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:35,327 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:34:35,327 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [505766119] [2021-11-02 22:34:35,327 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [505766119] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:35,327 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1767984378] [2021-11-02 22:34:35,327 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:35,328 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:34:35,328 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:35,329 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:34:35,354 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2021-11-02 22:34:35,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:35,407 INFO L263 TraceCheckSpWp]: Trace formula consists of 68 conjuncts, 16 conjunts are in the unsatisfiable core [2021-11-02 22:34:35,409 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:34:35,489 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:34:35,574 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 33 [2021-11-02 22:34:35,606 INFO L354 Elim1Store]: treesize reduction 25, result has 21.9 percent of original size [2021-11-02 22:34:35,606 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 38 [2021-11-02 22:34:35,779 INFO L354 Elim1Store]: treesize reduction 52, result has 11.9 percent of original size [2021-11-02 22:34:35,780 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 40 treesize of output 24 [2021-11-02 22:34:35,806 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:35,806 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1767984378] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:35,806 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:34:35,806 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8] total 11 [2021-11-02 22:34:35,807 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [340175657] [2021-11-02 22:34:35,807 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:34:35,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:35,824 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 4 times [2021-11-02 22:34:35,824 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:35,824 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1658877103] [2021-11-02 22:34:35,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:35,824 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:35,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:35,846 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:35,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:35,853 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:35,910 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Forceful destruction successful, exit code 0 [2021-11-02 22:34:35,971 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:34:35,972 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2021-11-02 22:34:35,972 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2021-11-02 22:34:35,972 INFO L87 Difference]: Start difference. First operand 18 states and 22 transitions. cyclomatic complexity: 7 Second operand has 12 states, 11 states have (on average 1.7272727272727273) internal successors, (19), 12 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:36,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:34:36,119 INFO L93 Difference]: Finished difference Result 29 states and 36 transitions. [2021-11-02 22:34:36,120 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-11-02 22:34:36,120 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 29 states and 36 transitions. [2021-11-02 22:34:36,121 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:34:36,122 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 29 states to 28 states and 35 transitions. [2021-11-02 22:34:36,122 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:34:36,123 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:34:36,123 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 35 transitions. [2021-11-02 22:34:36,123 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:34:36,123 INFO L681 BuchiCegarLoop]: Abstraction has 28 states and 35 transitions. [2021-11-02 22:34:36,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 35 transitions. [2021-11-02 22:34:36,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 22. [2021-11-02 22:34:36,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.2272727272727273) internal successors, (27), 21 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:36,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 27 transitions. [2021-11-02 22:34:36,127 INFO L704 BuchiCegarLoop]: Abstraction has 22 states and 27 transitions. [2021-11-02 22:34:36,127 INFO L587 BuchiCegarLoop]: Abstraction has 22 states and 27 transitions. [2021-11-02 22:34:36,127 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-11-02 22:34:36,127 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 27 transitions. [2021-11-02 22:34:36,128 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:36,128 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:36,128 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:36,129 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:34:36,129 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:36,129 INFO L791 eck$LassoCheckResult]: Stem: 454#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 455#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 462#L367 assume !(main_~length~0 < 1); 456#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 457#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 463#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 458#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 459#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 460#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 461#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 470#L375-3 assume !(main_~i~0 < main_~length~0); 469#L375-4 main_~j~0 := 1; 468#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 452#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 451#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 453#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 449#L380-2 [2021-11-02 22:34:36,130 INFO L793 eck$LassoCheckResult]: Loop: 449#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 450#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 449#L380-2 [2021-11-02 22:34:36,130 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:36,130 INFO L85 PathProgramCache]: Analyzing trace with hash -2073631454, now seen corresponding path program 1 times [2021-11-02 22:34:36,131 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:36,131 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1650599361] [2021-11-02 22:34:36,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:36,131 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:36,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:36,209 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:36,209 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:34:36,209 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1650599361] [2021-11-02 22:34:36,209 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1650599361] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:36,210 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [820851208] [2021-11-02 22:34:36,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:36,210 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:34:36,210 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:36,211 INFO L229 MonitoredProcess]: Starting monitored process 25 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:34:36,233 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2021-11-02 22:34:36,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:36,308 INFO L263 TraceCheckSpWp]: Trace formula consists of 83 conjuncts, 7 conjunts are in the unsatisfiable core [2021-11-02 22:34:36,310 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:34:36,438 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:36,439 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [820851208] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:36,439 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:34:36,439 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 11 [2021-11-02 22:34:36,440 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1489595584] [2021-11-02 22:34:36,440 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:34:36,441 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:36,441 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 5 times [2021-11-02 22:34:36,441 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:36,441 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1137711608] [2021-11-02 22:34:36,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:36,442 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:36,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:36,449 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:36,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:36,455 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:36,548 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:34:36,548 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2021-11-02 22:34:36,550 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=79, Unknown=0, NotChecked=0, Total=110 [2021-11-02 22:34:36,550 INFO L87 Difference]: Start difference. First operand 22 states and 27 transitions. cyclomatic complexity: 8 Second operand has 11 states, 11 states have (on average 2.090909090909091) internal successors, (23), 11 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:36,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:34:36,640 INFO L93 Difference]: Finished difference Result 25 states and 29 transitions. [2021-11-02 22:34:36,641 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2021-11-02 22:34:36,641 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 25 states and 29 transitions. [2021-11-02 22:34:36,642 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:36,642 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 25 states to 21 states and 25 transitions. [2021-11-02 22:34:36,643 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:34:36,643 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:34:36,643 INFO L73 IsDeterministic]: Start isDeterministic. Operand 21 states and 25 transitions. [2021-11-02 22:34:36,643 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:34:36,643 INFO L681 BuchiCegarLoop]: Abstraction has 21 states and 25 transitions. [2021-11-02 22:34:36,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states and 25 transitions. [2021-11-02 22:34:36,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 20. [2021-11-02 22:34:36,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.2) internal successors, (24), 19 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:36,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 24 transitions. [2021-11-02 22:34:36,646 INFO L704 BuchiCegarLoop]: Abstraction has 20 states and 24 transitions. [2021-11-02 22:34:36,646 INFO L587 BuchiCegarLoop]: Abstraction has 20 states and 24 transitions. [2021-11-02 22:34:36,646 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-11-02 22:34:36,647 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 20 states and 24 transitions. [2021-11-02 22:34:36,647 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:36,647 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:36,647 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:36,648 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:34:36,648 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:36,650 INFO L791 eck$LassoCheckResult]: Stem: 570#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 571#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 574#L367 assume !(main_~length~0 < 1); 572#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 573#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 575#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 566#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 567#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 568#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 569#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 580#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 579#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 578#L375-3 assume !(main_~i~0 < main_~length~0); 576#L375-4 main_~j~0 := 1; 577#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 565#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 561#L380-2 [2021-11-02 22:34:36,650 INFO L793 eck$LassoCheckResult]: Loop: 561#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 562#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 561#L380-2 [2021-11-02 22:34:36,651 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:36,651 INFO L85 PathProgramCache]: Analyzing trace with hash -2020585215, now seen corresponding path program 2 times [2021-11-02 22:34:36,651 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:36,651 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [263154064] [2021-11-02 22:34:36,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:36,652 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:36,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:36,998 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:36,998 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:34:36,998 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [263154064] [2021-11-02 22:34:36,999 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [263154064] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:36,999 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [26386379] [2021-11-02 22:34:36,999 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-11-02 22:34:36,999 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:34:36,999 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:37,002 INFO L229 MonitoredProcess]: Starting monitored process 26 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:34:37,021 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2021-11-02 22:34:37,100 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-11-02 22:34:37,100 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:34:37,101 INFO L263 TraceCheckSpWp]: Trace formula consists of 78 conjuncts, 18 conjunts are in the unsatisfiable core [2021-11-02 22:34:37,103 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:34:37,147 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:34:37,204 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2021-11-02 22:34:37,208 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:34:37,210 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:34:37,213 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 24 [2021-11-02 22:34:37,381 INFO L354 Elim1Store]: treesize reduction 72, result has 20.9 percent of original size [2021-11-02 22:34:37,381 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 44 treesize of output 46 [2021-11-02 22:34:37,535 INFO L354 Elim1Store]: treesize reduction 52, result has 11.9 percent of original size [2021-11-02 22:34:37,535 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 40 treesize of output 24 [2021-11-02 22:34:37,551 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:37,551 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [26386379] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:37,551 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:34:37,552 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 13 [2021-11-02 22:34:37,552 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [100039371] [2021-11-02 22:34:37,553 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:34:37,553 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:37,553 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 6 times [2021-11-02 22:34:37,554 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:37,554 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1125551123] [2021-11-02 22:34:37,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:37,554 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:37,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:37,560 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:37,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:37,565 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:37,654 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:34:37,655 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2021-11-02 22:34:37,655 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2021-11-02 22:34:37,655 INFO L87 Difference]: Start difference. First operand 20 states and 24 transitions. cyclomatic complexity: 7 Second operand has 14 states, 13 states have (on average 1.6153846153846154) internal successors, (21), 14 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:37,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:34:37,902 INFO L93 Difference]: Finished difference Result 22 states and 25 transitions. [2021-11-02 22:34:37,904 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-11-02 22:34:37,904 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 22 states and 25 transitions. [2021-11-02 22:34:37,905 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:37,905 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 22 states to 21 states and 24 transitions. [2021-11-02 22:34:37,906 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:34:37,906 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:34:37,906 INFO L73 IsDeterministic]: Start isDeterministic. Operand 21 states and 24 transitions. [2021-11-02 22:34:37,906 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:34:37,906 INFO L681 BuchiCegarLoop]: Abstraction has 21 states and 24 transitions. [2021-11-02 22:34:37,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states and 24 transitions. [2021-11-02 22:34:37,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 20. [2021-11-02 22:34:37,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.15) internal successors, (23), 19 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:37,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 23 transitions. [2021-11-02 22:34:37,910 INFO L704 BuchiCegarLoop]: Abstraction has 20 states and 23 transitions. [2021-11-02 22:34:37,910 INFO L587 BuchiCegarLoop]: Abstraction has 20 states and 23 transitions. [2021-11-02 22:34:37,910 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-11-02 22:34:37,910 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 20 states and 23 transitions. [2021-11-02 22:34:37,911 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:37,911 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:37,911 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:37,912 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:34:37,912 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:37,913 INFO L791 eck$LassoCheckResult]: Stem: 675#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 676#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 684#L367 assume !(main_~length~0 < 1); 677#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 678#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 685#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 679#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 680#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 681#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 682#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 689#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 688#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 687#L375-3 assume !(main_~i~0 < main_~length~0); 686#L375-4 main_~j~0 := 1; 671#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 672#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 673#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 674#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 683#L380-2 [2021-11-02 22:34:37,913 INFO L793 eck$LassoCheckResult]: Loop: 683#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 690#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 683#L380-2 [2021-11-02 22:34:37,914 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:37,914 INFO L85 PathProgramCache]: Analyzing trace with hash -457174268, now seen corresponding path program 2 times [2021-11-02 22:34:37,914 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:37,914 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1754393294] [2021-11-02 22:34:37,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:37,915 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:37,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:38,125 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:38,125 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:34:38,126 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1754393294] [2021-11-02 22:34:38,126 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1754393294] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:38,126 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1105984588] [2021-11-02 22:34:38,126 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-11-02 22:34:38,126 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:34:38,126 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:38,128 INFO L229 MonitoredProcess]: Starting monitored process 27 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:34:38,136 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2021-11-02 22:34:38,256 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-11-02 22:34:38,257 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:34:38,258 INFO L263 TraceCheckSpWp]: Trace formula consists of 93 conjuncts, 16 conjunts are in the unsatisfiable core [2021-11-02 22:34:38,260 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:34:38,315 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:34:38,375 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 35 [2021-11-02 22:34:38,390 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:34:38,391 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 42 [2021-11-02 22:34:38,548 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:34:38,549 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:34:38,554 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:38,555 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1105984588] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:38,555 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:34:38,555 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 12 [2021-11-02 22:34:38,555 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1180288177] [2021-11-02 22:34:38,556 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:34:38,556 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:38,557 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 7 times [2021-11-02 22:34:38,557 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:38,557 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1622088593] [2021-11-02 22:34:38,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:38,558 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:38,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:38,563 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:38,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:38,569 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:38,655 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:34:38,656 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2021-11-02 22:34:38,656 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2021-11-02 22:34:38,657 INFO L87 Difference]: Start difference. First operand 20 states and 23 transitions. cyclomatic complexity: 6 Second operand has 13 states, 12 states have (on average 2.0) internal successors, (24), 13 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:38,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:34:38,821 INFO L93 Difference]: Finished difference Result 33 states and 39 transitions. [2021-11-02 22:34:38,821 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2021-11-02 22:34:38,822 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 33 states and 39 transitions. [2021-11-02 22:34:38,822 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:34:38,823 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 33 states to 32 states and 38 transitions. [2021-11-02 22:34:38,823 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:34:38,823 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:34:38,824 INFO L73 IsDeterministic]: Start isDeterministic. Operand 32 states and 38 transitions. [2021-11-02 22:34:38,824 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:34:38,824 INFO L681 BuchiCegarLoop]: Abstraction has 32 states and 38 transitions. [2021-11-02 22:34:38,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states and 38 transitions. [2021-11-02 22:34:38,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 26. [2021-11-02 22:34:38,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.1538461538461537) internal successors, (30), 25 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:38,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 30 transitions. [2021-11-02 22:34:38,828 INFO L704 BuchiCegarLoop]: Abstraction has 26 states and 30 transitions. [2021-11-02 22:34:38,828 INFO L587 BuchiCegarLoop]: Abstraction has 26 states and 30 transitions. [2021-11-02 22:34:38,828 INFO L425 BuchiCegarLoop]: ======== Iteration 9============ [2021-11-02 22:34:38,829 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 26 states and 30 transitions. [2021-11-02 22:34:38,829 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:38,829 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:38,830 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:38,830 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:34:38,831 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:38,831 INFO L791 eck$LassoCheckResult]: Stem: 802#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 803#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 809#L367 assume !(main_~length~0 < 1); 804#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 805#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 810#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 798#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 799#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 800#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 801#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 812#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 817#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 813#L375-3 assume !(main_~i~0 < main_~length~0); 814#L375-4 main_~j~0 := 1; 820#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 819#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 797#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 796#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 808#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 806#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 807#L380-2 [2021-11-02 22:34:38,831 INFO L793 eck$LassoCheckResult]: Loop: 807#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 818#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 807#L380-2 [2021-11-02 22:34:38,832 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:38,832 INFO L85 PathProgramCache]: Analyzing trace with hash -1257807801, now seen corresponding path program 3 times [2021-11-02 22:34:38,832 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:38,832 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2089204936] [2021-11-02 22:34:38,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:38,833 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:38,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:38,920 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:38,920 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:34:38,920 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2089204936] [2021-11-02 22:34:38,920 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2089204936] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:38,921 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [739344010] [2021-11-02 22:34:38,921 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-02 22:34:38,921 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:34:38,921 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:38,929 INFO L229 MonitoredProcess]: Starting monitored process 28 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:34:38,932 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2021-11-02 22:34:39,056 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2021-11-02 22:34:39,056 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:34:39,057 INFO L263 TraceCheckSpWp]: Trace formula consists of 108 conjuncts, 9 conjunts are in the unsatisfiable core [2021-11-02 22:34:39,059 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:34:39,226 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:39,226 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [739344010] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:39,226 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:34:39,226 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 14 [2021-11-02 22:34:39,227 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2134038359] [2021-11-02 22:34:39,227 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:34:39,227 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:39,228 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 8 times [2021-11-02 22:34:39,228 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:39,228 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1375986605] [2021-11-02 22:34:39,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:39,228 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:39,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:39,234 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:39,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:39,238 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:39,328 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:34:39,329 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2021-11-02 22:34:39,330 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=135, Unknown=0, NotChecked=0, Total=182 [2021-11-02 22:34:39,330 INFO L87 Difference]: Start difference. First operand 26 states and 30 transitions. cyclomatic complexity: 7 Second operand has 14 states, 14 states have (on average 2.0714285714285716) internal successors, (29), 14 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:39,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:34:39,442 INFO L93 Difference]: Finished difference Result 29 states and 32 transitions. [2021-11-02 22:34:39,443 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-11-02 22:34:39,443 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 29 states and 32 transitions. [2021-11-02 22:34:39,444 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:39,445 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 29 states to 23 states and 26 transitions. [2021-11-02 22:34:39,445 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:34:39,445 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:34:39,445 INFO L73 IsDeterministic]: Start isDeterministic. Operand 23 states and 26 transitions. [2021-11-02 22:34:39,445 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:34:39,445 INFO L681 BuchiCegarLoop]: Abstraction has 23 states and 26 transitions. [2021-11-02 22:34:39,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states and 26 transitions. [2021-11-02 22:34:39,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 22. [2021-11-02 22:34:39,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.1363636363636365) internal successors, (25), 21 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:39,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 25 transitions. [2021-11-02 22:34:39,448 INFO L704 BuchiCegarLoop]: Abstraction has 22 states and 25 transitions. [2021-11-02 22:34:39,448 INFO L587 BuchiCegarLoop]: Abstraction has 22 states and 25 transitions. [2021-11-02 22:34:39,448 INFO L425 BuchiCegarLoop]: ======== Iteration 10============ [2021-11-02 22:34:39,448 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 25 transitions. [2021-11-02 22:34:39,454 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:39,454 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:39,455 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:39,455 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [4, 4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:34:39,456 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:39,457 INFO L791 eck$LassoCheckResult]: Stem: 943#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 944#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 945#L367 assume !(main_~length~0 < 1); 937#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 938#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 946#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 939#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 940#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 941#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 942#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 949#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 953#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 952#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 951#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 950#L375-3 assume !(main_~i~0 < main_~length~0); 947#L375-4 main_~j~0 := 1; 948#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 936#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 934#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 935#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 932#L380-2 [2021-11-02 22:34:39,457 INFO L793 eck$LassoCheckResult]: Loop: 932#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 933#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 932#L380-2 [2021-11-02 22:34:39,458 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:39,458 INFO L85 PathProgramCache]: Analyzing trace with hash -1819979674, now seen corresponding path program 4 times [2021-11-02 22:34:39,459 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:39,459 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1003143295] [2021-11-02 22:34:39,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:39,459 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:39,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:40,365 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:40,366 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:34:40,366 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1003143295] [2021-11-02 22:34:40,366 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1003143295] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:40,366 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1409559828] [2021-11-02 22:34:40,366 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-11-02 22:34:40,366 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:34:40,367 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:40,370 INFO L229 MonitoredProcess]: Starting monitored process 29 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:34:40,385 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2021-11-02 22:34:40,535 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-11-02 22:34:40,535 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:34:40,537 INFO L263 TraceCheckSpWp]: Trace formula consists of 103 conjuncts, 21 conjunts are in the unsatisfiable core [2021-11-02 22:34:40,539 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:34:40,621 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:34:40,711 INFO L354 Elim1Store]: treesize reduction 40, result has 23.1 percent of original size [2021-11-02 22:34:40,712 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 29 [2021-11-02 22:34:40,846 INFO L354 Elim1Store]: treesize reduction 72, result has 20.9 percent of original size [2021-11-02 22:34:40,847 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 33 treesize of output 35 [2021-11-02 22:34:41,072 INFO L354 Elim1Store]: treesize reduction 81, result has 8.0 percent of original size [2021-11-02 22:34:41,073 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 47 treesize of output 24 [2021-11-02 22:34:41,081 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:41,082 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1409559828] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:41,082 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:34:41,082 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 12] total 25 [2021-11-02 22:34:41,083 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [378071475] [2021-11-02 22:34:41,083 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:34:41,084 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:41,084 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 9 times [2021-11-02 22:34:41,084 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:41,084 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1552327857] [2021-11-02 22:34:41,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:41,085 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:41,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:41,091 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:41,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:41,100 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:41,184 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:34:41,185 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2021-11-02 22:34:41,185 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=567, Unknown=0, NotChecked=0, Total=650 [2021-11-02 22:34:41,186 INFO L87 Difference]: Start difference. First operand 22 states and 25 transitions. cyclomatic complexity: 6 Second operand has 26 states, 25 states have (on average 1.44) internal successors, (36), 26 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:42,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:34:42,347 INFO L93 Difference]: Finished difference Result 40 states and 46 transitions. [2021-11-02 22:34:42,347 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2021-11-02 22:34:42,348 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 40 states and 46 transitions. [2021-11-02 22:34:42,351 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:34:42,355 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 40 states to 38 states and 44 transitions. [2021-11-02 22:34:42,355 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:34:42,355 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:34:42,356 INFO L73 IsDeterministic]: Start isDeterministic. Operand 38 states and 44 transitions. [2021-11-02 22:34:42,356 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:34:42,356 INFO L681 BuchiCegarLoop]: Abstraction has 38 states and 44 transitions. [2021-11-02 22:34:42,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states and 44 transitions. [2021-11-02 22:34:42,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 24. [2021-11-02 22:34:42,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.125) internal successors, (27), 23 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:42,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 27 transitions. [2021-11-02 22:34:42,369 INFO L704 BuchiCegarLoop]: Abstraction has 24 states and 27 transitions. [2021-11-02 22:34:42,370 INFO L587 BuchiCegarLoop]: Abstraction has 24 states and 27 transitions. [2021-11-02 22:34:42,370 INFO L425 BuchiCegarLoop]: ======== Iteration 11============ [2021-11-02 22:34:42,370 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 27 transitions. [2021-11-02 22:34:42,371 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:42,371 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:42,371 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:42,372 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [4, 4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:34:42,372 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:42,374 INFO L791 eck$LassoCheckResult]: Stem: 1114#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 1115#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 1125#L367 assume !(main_~length~0 < 1); 1116#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 1117#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 1126#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 1118#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1119#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1120#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1121#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1132#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1131#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1130#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1129#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1128#L375-3 assume !(main_~i~0 < main_~length~0); 1127#L375-4 main_~j~0 := 1; 1110#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1111#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1112#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1113#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1124#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1122#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 1123#L380-2 [2021-11-02 22:34:42,374 INFO L793 eck$LassoCheckResult]: Loop: 1123#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1133#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1123#L380-2 [2021-11-02 22:34:42,375 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:42,375 INFO L85 PathProgramCache]: Analyzing trace with hash -948777687, now seen corresponding path program 5 times [2021-11-02 22:34:42,375 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:42,376 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [612964612] [2021-11-02 22:34:42,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:42,377 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:42,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:42,647 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:42,647 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:34:42,647 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [612964612] [2021-11-02 22:34:42,647 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [612964612] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:42,648 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [873412936] [2021-11-02 22:34:42,648 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-02 22:34:42,648 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:34:42,648 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:42,657 INFO L229 MonitoredProcess]: Starting monitored process 30 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:34:42,672 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2021-11-02 22:34:42,843 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2021-11-02 22:34:42,844 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:34:42,845 INFO L263 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 20 conjunts are in the unsatisfiable core [2021-11-02 22:34:42,848 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:34:42,921 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:34:42,973 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 35 [2021-11-02 22:34:42,993 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:34:42,994 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 42 [2021-11-02 22:34:43,194 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:34:43,194 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:34:43,199 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:43,199 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [873412936] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:43,200 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:34:43,200 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 15 [2021-11-02 22:34:43,200 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [454044588] [2021-11-02 22:34:43,201 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:34:43,201 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:43,201 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 10 times [2021-11-02 22:34:43,202 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:43,202 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1324067084] [2021-11-02 22:34:43,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:43,202 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:43,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:43,208 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:43,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:43,212 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:43,296 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:34:43,297 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2021-11-02 22:34:43,297 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=202, Unknown=0, NotChecked=0, Total=240 [2021-11-02 22:34:43,298 INFO L87 Difference]: Start difference. First operand 24 states and 27 transitions. cyclomatic complexity: 6 Second operand has 16 states, 15 states have (on average 2.0) internal successors, (30), 16 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:43,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:34:43,551 INFO L93 Difference]: Finished difference Result 39 states and 45 transitions. [2021-11-02 22:34:43,551 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2021-11-02 22:34:43,551 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 39 states and 45 transitions. [2021-11-02 22:34:43,552 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:34:43,553 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 39 states to 38 states and 44 transitions. [2021-11-02 22:34:43,553 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:34:43,554 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:34:43,554 INFO L73 IsDeterministic]: Start isDeterministic. Operand 38 states and 44 transitions. [2021-11-02 22:34:43,554 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:34:43,555 INFO L681 BuchiCegarLoop]: Abstraction has 38 states and 44 transitions. [2021-11-02 22:34:43,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states and 44 transitions. [2021-11-02 22:34:43,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 30. [2021-11-02 22:34:43,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 1.1333333333333333) internal successors, (34), 29 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:43,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 34 transitions. [2021-11-02 22:34:43,559 INFO L704 BuchiCegarLoop]: Abstraction has 30 states and 34 transitions. [2021-11-02 22:34:43,559 INFO L587 BuchiCegarLoop]: Abstraction has 30 states and 34 transitions. [2021-11-02 22:34:43,559 INFO L425 BuchiCegarLoop]: ======== Iteration 12============ [2021-11-02 22:34:43,559 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 30 states and 34 transitions. [2021-11-02 22:34:43,560 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:43,560 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:43,560 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:43,561 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [4, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:34:43,561 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:43,561 INFO L791 eck$LassoCheckResult]: Stem: 1263#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 1264#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 1273#L367 assume !(main_~length~0 < 1); 1265#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 1266#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 1274#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 1267#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1268#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1269#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1270#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1284#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1283#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1282#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1280#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1281#L375-3 assume !(main_~i~0 < main_~length~0); 1275#L375-4 main_~j~0 := 1; 1276#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1288#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1287#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1260#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1261#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1262#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1285#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1271#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 1272#L380-2 [2021-11-02 22:34:43,562 INFO L793 eck$LassoCheckResult]: Loop: 1272#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1286#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1272#L380-2 [2021-11-02 22:34:43,562 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:43,562 INFO L85 PathProgramCache]: Analyzing trace with hash -1242290900, now seen corresponding path program 6 times [2021-11-02 22:34:43,563 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:43,563 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1352601866] [2021-11-02 22:34:43,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:43,563 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:43,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:43,681 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 7 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:43,681 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:34:43,681 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1352601866] [2021-11-02 22:34:43,681 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1352601866] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:43,682 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2101074317] [2021-11-02 22:34:43,682 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-11-02 22:34:43,682 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:34:43,682 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:43,686 INFO L229 MonitoredProcess]: Starting monitored process 31 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:34:43,708 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2021-11-02 22:34:43,869 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2021-11-02 22:34:43,869 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:34:43,870 INFO L263 TraceCheckSpWp]: Trace formula consists of 133 conjuncts, 11 conjunts are in the unsatisfiable core [2021-11-02 22:34:43,872 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:34:44,081 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 12 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:44,082 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2101074317] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:44,082 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:34:44,082 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 17 [2021-11-02 22:34:44,082 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2050399534] [2021-11-02 22:34:44,083 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:34:44,083 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:44,084 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 11 times [2021-11-02 22:34:44,084 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:44,084 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [894818854] [2021-11-02 22:34:44,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:44,085 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:44,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:44,090 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:44,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:44,094 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:44,178 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:34:44,179 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2021-11-02 22:34:44,179 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=205, Unknown=0, NotChecked=0, Total=272 [2021-11-02 22:34:44,180 INFO L87 Difference]: Start difference. First operand 30 states and 34 transitions. cyclomatic complexity: 7 Second operand has 17 states, 17 states have (on average 2.0588235294117645) internal successors, (35), 17 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:44,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:34:44,342 INFO L93 Difference]: Finished difference Result 35 states and 38 transitions. [2021-11-02 22:34:44,342 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2021-11-02 22:34:44,343 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 38 transitions. [2021-11-02 22:34:44,343 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:44,344 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 27 states and 30 transitions. [2021-11-02 22:34:44,344 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:34:44,344 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:34:44,344 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 30 transitions. [2021-11-02 22:34:44,344 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:34:44,344 INFO L681 BuchiCegarLoop]: Abstraction has 27 states and 30 transitions. [2021-11-02 22:34:44,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 30 transitions. [2021-11-02 22:34:44,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 26. [2021-11-02 22:34:44,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.1153846153846154) internal successors, (29), 25 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:44,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 29 transitions. [2021-11-02 22:34:44,347 INFO L704 BuchiCegarLoop]: Abstraction has 26 states and 29 transitions. [2021-11-02 22:34:44,347 INFO L587 BuchiCegarLoop]: Abstraction has 26 states and 29 transitions. [2021-11-02 22:34:44,347 INFO L425 BuchiCegarLoop]: ======== Iteration 13============ [2021-11-02 22:34:44,347 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 26 states and 29 transitions. [2021-11-02 22:34:44,347 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:44,347 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:44,347 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:44,348 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [5, 5, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:34:44,348 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:44,349 INFO L791 eck$LassoCheckResult]: Stem: 1427#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 1428#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 1437#L367 assume !(main_~length~0 < 1); 1429#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 1430#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 1438#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 1431#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1432#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1433#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1434#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1447#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1446#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1445#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1444#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1443#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1442#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1441#L375-3 assume !(main_~i~0 < main_~length~0); 1439#L375-4 main_~j~0 := 1; 1440#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1436#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1425#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1426#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1448#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1435#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 1423#L380-2 [2021-11-02 22:34:44,349 INFO L793 eck$LassoCheckResult]: Loop: 1423#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1424#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1423#L380-2 [2021-11-02 22:34:44,349 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:44,349 INFO L85 PathProgramCache]: Analyzing trace with hash -323581557, now seen corresponding path program 7 times [2021-11-02 22:34:44,350 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:44,350 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1979375163] [2021-11-02 22:34:44,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:44,351 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:44,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:44,614 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:44,614 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:34:44,614 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1979375163] [2021-11-02 22:34:44,614 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1979375163] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:44,615 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2046593327] [2021-11-02 22:34:44,615 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-02 22:34:44,615 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:34:44,615 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:44,622 INFO L229 MonitoredProcess]: Starting monitored process 32 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:34:44,641 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2021-11-02 22:34:44,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:44,832 INFO L263 TraceCheckSpWp]: Trace formula consists of 128 conjuncts, 26 conjunts are in the unsatisfiable core [2021-11-02 22:34:44,834 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:34:44,985 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:34:45,074 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:34:45,074 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-11-02 22:34:45,188 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:34:45,208 INFO L354 Elim1Store]: treesize reduction 60, result has 24.1 percent of original size [2021-11-02 22:34:45,209 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 36 treesize of output 38 [2021-11-02 22:34:45,568 INFO L354 Elim1Store]: treesize reduction 52, result has 11.9 percent of original size [2021-11-02 22:34:45,568 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 40 treesize of output 24 [2021-11-02 22:34:45,574 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 0 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:45,575 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2046593327] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:45,575 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:34:45,575 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 15] total 26 [2021-11-02 22:34:45,575 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [109033197] [2021-11-02 22:34:45,577 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:34:45,578 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:45,578 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 12 times [2021-11-02 22:34:45,578 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:45,578 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [747814780] [2021-11-02 22:34:45,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:45,579 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:45,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:45,585 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:45,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:45,590 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:45,677 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:34:45,677 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2021-11-02 22:34:45,678 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=608, Unknown=0, NotChecked=0, Total=702 [2021-11-02 22:34:45,678 INFO L87 Difference]: Start difference. First operand 26 states and 29 transitions. cyclomatic complexity: 6 Second operand has 27 states, 26 states have (on average 1.6923076923076923) internal successors, (44), 27 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:46,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:34:46,131 INFO L93 Difference]: Finished difference Result 30 states and 33 transitions. [2021-11-02 22:34:46,131 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2021-11-02 22:34:46,131 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 33 transitions. [2021-11-02 22:34:46,132 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:46,133 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 29 states and 32 transitions. [2021-11-02 22:34:46,133 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:34:46,133 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:34:46,134 INFO L73 IsDeterministic]: Start isDeterministic. Operand 29 states and 32 transitions. [2021-11-02 22:34:46,135 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:34:46,135 INFO L681 BuchiCegarLoop]: Abstraction has 29 states and 32 transitions. [2021-11-02 22:34:46,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states and 32 transitions. [2021-11-02 22:34:46,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 28. [2021-11-02 22:34:46,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.1071428571428572) internal successors, (31), 27 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:46,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 31 transitions. [2021-11-02 22:34:46,151 INFO L704 BuchiCegarLoop]: Abstraction has 28 states and 31 transitions. [2021-11-02 22:34:46,151 INFO L587 BuchiCegarLoop]: Abstraction has 28 states and 31 transitions. [2021-11-02 22:34:46,151 INFO L425 BuchiCegarLoop]: ======== Iteration 14============ [2021-11-02 22:34:46,151 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 31 transitions. [2021-11-02 22:34:46,152 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:46,152 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:46,152 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:46,155 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [5, 5, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:34:46,158 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:46,159 INFO L791 eck$LassoCheckResult]: Stem: 1592#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 1593#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 1603#L367 assume !(main_~length~0 < 1); 1594#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 1595#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 1604#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 1596#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1597#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1598#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1599#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1612#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1611#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1610#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1609#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1608#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1607#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1606#L375-3 assume !(main_~i~0 < main_~length~0); 1605#L375-4 main_~j~0 := 1; 1588#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1589#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1615#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1602#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1590#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1591#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1614#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1600#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 1601#L380-2 [2021-11-02 22:34:46,159 INFO L793 eck$LassoCheckResult]: Loop: 1601#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1613#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1601#L380-2 [2021-11-02 22:34:46,162 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:46,163 INFO L85 PathProgramCache]: Analyzing trace with hash -1724231410, now seen corresponding path program 8 times [2021-11-02 22:34:46,163 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:46,163 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [844742732] [2021-11-02 22:34:46,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:46,164 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:46,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:46,478 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:46,478 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:34:46,478 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [844742732] [2021-11-02 22:34:46,479 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [844742732] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:46,479 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [254121387] [2021-11-02 22:34:46,479 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-11-02 22:34:46,479 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:34:46,479 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:46,486 INFO L229 MonitoredProcess]: Starting monitored process 33 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:34:46,501 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process [2021-11-02 22:34:46,708 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-11-02 22:34:46,709 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:34:46,710 INFO L263 TraceCheckSpWp]: Trace formula consists of 143 conjuncts, 24 conjunts are in the unsatisfiable core [2021-11-02 22:34:46,712 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:34:46,797 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:34:46,851 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 35 [2021-11-02 22:34:46,865 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:34:46,866 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 42 [2021-11-02 22:34:47,118 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:34:47,119 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:34:47,126 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 0 proven. 37 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:47,126 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [254121387] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:47,126 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:34:47,126 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 18 [2021-11-02 22:34:47,126 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [725691251] [2021-11-02 22:34:47,127 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:34:47,127 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:47,127 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 13 times [2021-11-02 22:34:47,127 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:47,128 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [104921000] [2021-11-02 22:34:47,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:47,128 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:47,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:47,134 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:47,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:47,137 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:47,214 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:34:47,215 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2021-11-02 22:34:47,215 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=296, Unknown=0, NotChecked=0, Total=342 [2021-11-02 22:34:47,215 INFO L87 Difference]: Start difference. First operand 28 states and 31 transitions. cyclomatic complexity: 6 Second operand has 19 states, 18 states have (on average 2.0) internal successors, (36), 19 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:47,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:34:47,470 INFO L93 Difference]: Finished difference Result 45 states and 51 transitions. [2021-11-02 22:34:47,471 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2021-11-02 22:34:47,471 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 45 states and 51 transitions. [2021-11-02 22:34:47,472 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:34:47,473 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 45 states to 44 states and 50 transitions. [2021-11-02 22:34:47,473 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:34:47,473 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:34:47,474 INFO L73 IsDeterministic]: Start isDeterministic. Operand 44 states and 50 transitions. [2021-11-02 22:34:47,474 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:34:47,474 INFO L681 BuchiCegarLoop]: Abstraction has 44 states and 50 transitions. [2021-11-02 22:34:47,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states and 50 transitions. [2021-11-02 22:34:47,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 34. [2021-11-02 22:34:47,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.1176470588235294) internal successors, (38), 33 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:47,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 38 transitions. [2021-11-02 22:34:47,477 INFO L704 BuchiCegarLoop]: Abstraction has 34 states and 38 transitions. [2021-11-02 22:34:47,477 INFO L587 BuchiCegarLoop]: Abstraction has 34 states and 38 transitions. [2021-11-02 22:34:47,478 INFO L425 BuchiCegarLoop]: ======== Iteration 15============ [2021-11-02 22:34:47,478 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 34 states and 38 transitions. [2021-11-02 22:34:47,478 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:47,479 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:47,479 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:47,479 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [5, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:34:47,480 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:47,480 INFO L791 eck$LassoCheckResult]: Stem: 1769#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 1770#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 1776#L367 assume !(main_~length~0 < 1); 1771#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 1772#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 1777#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 1765#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1766#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1767#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1768#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1780#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1787#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1786#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1785#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1784#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1783#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1781#L375-3 assume !(main_~i~0 < main_~length~0); 1778#L375-4 main_~j~0 := 1; 1779#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1793#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1764#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1763#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1775#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1792#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1791#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1790#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1789#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1773#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 1774#L380-2 [2021-11-02 22:34:47,480 INFO L793 eck$LassoCheckResult]: Loop: 1774#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1788#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1774#L380-2 [2021-11-02 22:34:47,481 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:47,481 INFO L85 PathProgramCache]: Analyzing trace with hash 870990801, now seen corresponding path program 9 times [2021-11-02 22:34:47,481 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:47,481 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [747476710] [2021-11-02 22:34:47,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:47,482 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:47,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:47,620 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 13 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:47,620 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:34:47,621 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [747476710] [2021-11-02 22:34:47,621 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [747476710] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:47,621 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [526147677] [2021-11-02 22:34:47,621 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-02 22:34:47,621 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:34:47,622 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:47,625 INFO L229 MonitoredProcess]: Starting monitored process 34 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:34:47,648 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Waiting until timeout for monitored process [2021-11-02 22:34:47,922 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2021-11-02 22:34:47,922 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:34:47,924 INFO L263 TraceCheckSpWp]: Trace formula consists of 158 conjuncts, 13 conjunts are in the unsatisfiable core [2021-11-02 22:34:47,926 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:34:48,155 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 20 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:48,156 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [526147677] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:48,156 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:34:48,156 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 20 [2021-11-02 22:34:48,156 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [312906708] [2021-11-02 22:34:48,157 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:34:48,157 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:48,157 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 14 times [2021-11-02 22:34:48,157 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:48,157 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [86581374] [2021-11-02 22:34:48,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:48,158 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:48,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:48,164 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:48,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:48,168 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:48,261 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:34:48,262 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2021-11-02 22:34:48,262 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2021-11-02 22:34:48,263 INFO L87 Difference]: Start difference. First operand 34 states and 38 transitions. cyclomatic complexity: 7 Second operand has 20 states, 20 states have (on average 2.05) internal successors, (41), 20 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:48,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:34:48,453 INFO L93 Difference]: Finished difference Result 41 states and 44 transitions. [2021-11-02 22:34:48,454 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2021-11-02 22:34:48,454 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 41 states and 44 transitions. [2021-11-02 22:34:48,455 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:48,456 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 41 states to 31 states and 34 transitions. [2021-11-02 22:34:48,456 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:34:48,456 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:34:48,456 INFO L73 IsDeterministic]: Start isDeterministic. Operand 31 states and 34 transitions. [2021-11-02 22:34:48,456 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:34:48,456 INFO L681 BuchiCegarLoop]: Abstraction has 31 states and 34 transitions. [2021-11-02 22:34:48,456 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states and 34 transitions. [2021-11-02 22:34:48,458 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 30. [2021-11-02 22:34:48,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 1.1) internal successors, (33), 29 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:48,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 33 transitions. [2021-11-02 22:34:48,459 INFO L704 BuchiCegarLoop]: Abstraction has 30 states and 33 transitions. [2021-11-02 22:34:48,460 INFO L587 BuchiCegarLoop]: Abstraction has 30 states and 33 transitions. [2021-11-02 22:34:48,460 INFO L425 BuchiCegarLoop]: ======== Iteration 16============ [2021-11-02 22:34:48,460 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 30 states and 33 transitions. [2021-11-02 22:34:48,460 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:48,461 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:48,461 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:48,461 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [6, 6, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:34:48,462 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:48,462 INFO L791 eck$LassoCheckResult]: Stem: 1961#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 1962#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 1968#L367 assume !(main_~length~0 < 1); 1963#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 1964#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 1969#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 1957#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1958#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1959#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1960#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1971#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1982#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1981#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1980#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1979#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1978#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1977#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 1973#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 1972#L375-3 assume !(main_~i~0 < main_~length~0); 1970#L375-4 main_~j~0 := 1; 1953#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1954#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1955#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1956#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1967#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1976#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1975#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1965#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 1966#L380-2 [2021-11-02 22:34:48,462 INFO L793 eck$LassoCheckResult]: Loop: 1966#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 1974#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 1966#L380-2 [2021-11-02 22:34:48,463 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:48,463 INFO L85 PathProgramCache]: Analyzing trace with hash -1012593552, now seen corresponding path program 10 times [2021-11-02 22:34:48,463 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:48,463 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [916186116] [2021-11-02 22:34:48,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:48,464 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:48,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:48,756 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 0 proven. 48 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:48,757 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:34:48,757 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [916186116] [2021-11-02 22:34:48,757 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [916186116] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:48,757 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1562636737] [2021-11-02 22:34:48,757 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-11-02 22:34:48,757 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:34:48,757 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:48,763 INFO L229 MonitoredProcess]: Starting monitored process 35 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:34:48,764 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Waiting until timeout for monitored process [2021-11-02 22:34:49,038 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-11-02 22:34:49,039 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:34:49,040 INFO L263 TraceCheckSpWp]: Trace formula consists of 153 conjuncts, 29 conjunts are in the unsatisfiable core [2021-11-02 22:34:49,042 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:34:49,123 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:34:49,169 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 29 [2021-11-02 22:34:49,182 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:34:49,182 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 36 [2021-11-02 22:34:49,300 INFO L354 Elim1Store]: treesize reduction 80, result has 20.8 percent of original size [2021-11-02 22:34:49,301 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 46 treesize of output 48 [2021-11-02 22:34:49,582 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:34:49,583 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:34:49,588 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 0 proven. 48 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:49,588 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1562636737] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:49,588 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:34:49,588 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 16] total 20 [2021-11-02 22:34:49,588 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1064937738] [2021-11-02 22:34:49,589 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:34:49,589 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:49,589 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 15 times [2021-11-02 22:34:49,589 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:49,589 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1969670292] [2021-11-02 22:34:49,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:49,590 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:49,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:49,594 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:49,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:49,598 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:49,687 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:34:49,688 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2021-11-02 22:34:49,688 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=367, Unknown=0, NotChecked=0, Total=420 [2021-11-02 22:34:49,689 INFO L87 Difference]: Start difference. First operand 30 states and 33 transitions. cyclomatic complexity: 6 Second operand has 21 states, 20 states have (on average 1.95) internal successors, (39), 21 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:50,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:34:50,227 INFO L93 Difference]: Finished difference Result 34 states and 37 transitions. [2021-11-02 22:34:50,227 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2021-11-02 22:34:50,227 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 37 transitions. [2021-11-02 22:34:50,228 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:50,228 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 33 states and 36 transitions. [2021-11-02 22:34:50,229 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:34:50,229 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:34:50,229 INFO L73 IsDeterministic]: Start isDeterministic. Operand 33 states and 36 transitions. [2021-11-02 22:34:50,229 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:34:50,229 INFO L681 BuchiCegarLoop]: Abstraction has 33 states and 36 transitions. [2021-11-02 22:34:50,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states and 36 transitions. [2021-11-02 22:34:50,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 32. [2021-11-02 22:34:50,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.09375) internal successors, (35), 31 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:50,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 35 transitions. [2021-11-02 22:34:50,232 INFO L704 BuchiCegarLoop]: Abstraction has 32 states and 35 transitions. [2021-11-02 22:34:50,232 INFO L587 BuchiCegarLoop]: Abstraction has 32 states and 35 transitions. [2021-11-02 22:34:50,232 INFO L425 BuchiCegarLoop]: ======== Iteration 17============ [2021-11-02 22:34:50,233 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 32 states and 35 transitions. [2021-11-02 22:34:50,233 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:50,233 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:50,233 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:50,234 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [6, 6, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:34:50,234 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:50,235 INFO L791 eck$LassoCheckResult]: Stem: 2138#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 2139#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 2148#L367 assume !(main_~length~0 < 1); 2140#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 2141#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 2149#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 2142#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2143#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2144#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2145#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2159#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2158#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2157#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2156#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2155#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2154#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2153#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2152#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2151#L375-3 assume !(main_~i~0 < main_~length~0); 2150#L375-4 main_~j~0 := 1; 2134#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2135#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 2136#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2137#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 2165#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2164#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 2163#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2162#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 2161#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2146#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 2147#L380-2 [2021-11-02 22:34:50,235 INFO L793 eck$LassoCheckResult]: Loop: 2147#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2160#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 2147#L380-2 [2021-11-02 22:34:50,235 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:50,236 INFO L85 PathProgramCache]: Analyzing trace with hash 1855172275, now seen corresponding path program 11 times [2021-11-02 22:34:50,236 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:50,236 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1436515158] [2021-11-02 22:34:50,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:50,236 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:50,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:50,588 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:50,588 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:34:50,588 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1436515158] [2021-11-02 22:34:50,588 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1436515158] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:50,588 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1254444640] [2021-11-02 22:34:50,588 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-02 22:34:50,589 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:34:50,589 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:50,594 INFO L229 MonitoredProcess]: Starting monitored process 36 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:34:50,613 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Waiting until timeout for monitored process [2021-11-02 22:34:50,956 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2021-11-02 22:34:50,956 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:34:50,958 INFO L263 TraceCheckSpWp]: Trace formula consists of 168 conjuncts, 30 conjunts are in the unsatisfiable core [2021-11-02 22:34:50,960 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:34:51,340 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:34:51,491 INFO L354 Elim1Store]: treesize reduction 40, result has 23.1 percent of original size [2021-11-02 22:34:51,491 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 39 [2021-11-02 22:34:52,331 INFO L354 Elim1Store]: treesize reduction 96, result has 6.8 percent of original size [2021-11-02 22:34:52,332 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 65 treesize of output 37 [2021-11-02 22:34:52,346 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:52,346 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1254444640] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:52,347 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:34:52,347 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 18] total 32 [2021-11-02 22:34:52,347 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [800963958] [2021-11-02 22:34:52,348 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:34:52,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:52,348 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 16 times [2021-11-02 22:34:52,348 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:52,349 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [829936375] [2021-11-02 22:34:52,349 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:52,349 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:52,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:52,355 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:52,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:52,359 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:52,439 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:34:52,439 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2021-11-02 22:34:52,440 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=946, Unknown=0, NotChecked=0, Total=1056 [2021-11-02 22:34:52,441 INFO L87 Difference]: Start difference. First operand 32 states and 35 transitions. cyclomatic complexity: 6 Second operand has 33 states, 32 states have (on average 1.75) internal successors, (56), 33 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:53,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:34:53,257 INFO L93 Difference]: Finished difference Result 51 states and 57 transitions. [2021-11-02 22:34:53,257 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-11-02 22:34:53,258 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 57 transitions. [2021-11-02 22:34:53,258 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:34:53,259 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 50 states and 56 transitions. [2021-11-02 22:34:53,259 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:34:53,259 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:34:53,259 INFO L73 IsDeterministic]: Start isDeterministic. Operand 50 states and 56 transitions. [2021-11-02 22:34:53,260 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:34:53,260 INFO L681 BuchiCegarLoop]: Abstraction has 50 states and 56 transitions. [2021-11-02 22:34:53,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states and 56 transitions. [2021-11-02 22:34:53,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 38. [2021-11-02 22:34:53,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.105263157894737) internal successors, (42), 37 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:53,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 42 transitions. [2021-11-02 22:34:53,263 INFO L704 BuchiCegarLoop]: Abstraction has 38 states and 42 transitions. [2021-11-02 22:34:53,263 INFO L587 BuchiCegarLoop]: Abstraction has 38 states and 42 transitions. [2021-11-02 22:34:53,263 INFO L425 BuchiCegarLoop]: ======== Iteration 18============ [2021-11-02 22:34:53,263 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 38 states and 42 transitions. [2021-11-02 22:34:53,264 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:53,264 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:53,264 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:53,264 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [6, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:34:53,264 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:53,265 INFO L791 eck$LassoCheckResult]: Stem: 2353#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 2354#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 2360#L367 assume !(main_~length~0 < 1); 2355#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 2356#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 2361#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 2349#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2350#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2351#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2352#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2364#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2373#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2372#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2371#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2370#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2369#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2368#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2367#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2365#L375-3 assume !(main_~i~0 < main_~length~0); 2362#L375-4 main_~j~0 := 1; 2363#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2381#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 2348#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2347#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 2359#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2380#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 2379#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2378#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 2377#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2376#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 2375#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2357#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 2358#L380-2 [2021-11-02 22:34:53,265 INFO L793 eck$LassoCheckResult]: Loop: 2358#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2374#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 2358#L380-2 [2021-11-02 22:34:53,265 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:53,265 INFO L85 PathProgramCache]: Analyzing trace with hash 409127990, now seen corresponding path program 12 times [2021-11-02 22:34:53,266 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:53,266 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1893028515] [2021-11-02 22:34:53,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:53,266 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:53,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:53,449 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 21 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:53,449 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:34:53,450 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1893028515] [2021-11-02 22:34:53,450 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1893028515] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:53,450 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [838549990] [2021-11-02 22:34:53,450 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-11-02 22:34:53,450 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:34:53,450 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:53,451 INFO L229 MonitoredProcess]: Starting monitored process 37 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:34:53,453 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Waiting until timeout for monitored process [2021-11-02 22:34:53,781 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2021-11-02 22:34:53,781 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:34:53,783 INFO L263 TraceCheckSpWp]: Trace formula consists of 183 conjuncts, 15 conjunts are in the unsatisfiable core [2021-11-02 22:34:53,784 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:34:54,043 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 30 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:54,043 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [838549990] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:54,043 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:34:54,043 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 23 [2021-11-02 22:34:54,044 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1054195524] [2021-11-02 22:34:54,044 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:34:54,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:54,045 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 17 times [2021-11-02 22:34:54,045 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:54,045 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1572053872] [2021-11-02 22:34:54,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:54,045 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:54,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:54,051 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:54,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:54,055 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:54,145 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:34:54,145 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2021-11-02 22:34:54,146 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=119, Invalid=387, Unknown=0, NotChecked=0, Total=506 [2021-11-02 22:34:54,146 INFO L87 Difference]: Start difference. First operand 38 states and 42 transitions. cyclomatic complexity: 7 Second operand has 23 states, 23 states have (on average 2.0434782608695654) internal successors, (47), 23 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:54,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:34:54,341 INFO L93 Difference]: Finished difference Result 47 states and 50 transitions. [2021-11-02 22:34:54,343 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2021-11-02 22:34:54,343 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 47 states and 50 transitions. [2021-11-02 22:34:54,344 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:54,345 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 47 states to 35 states and 38 transitions. [2021-11-02 22:34:54,345 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:34:54,345 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:34:54,345 INFO L73 IsDeterministic]: Start isDeterministic. Operand 35 states and 38 transitions. [2021-11-02 22:34:54,345 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:34:54,345 INFO L681 BuchiCegarLoop]: Abstraction has 35 states and 38 transitions. [2021-11-02 22:34:54,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states and 38 transitions. [2021-11-02 22:34:54,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 34. [2021-11-02 22:34:54,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.088235294117647) internal successors, (37), 33 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:54,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 37 transitions. [2021-11-02 22:34:54,347 INFO L704 BuchiCegarLoop]: Abstraction has 34 states and 37 transitions. [2021-11-02 22:34:54,347 INFO L587 BuchiCegarLoop]: Abstraction has 34 states and 37 transitions. [2021-11-02 22:34:54,347 INFO L425 BuchiCegarLoop]: ======== Iteration 19============ [2021-11-02 22:34:54,348 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 34 states and 37 transitions. [2021-11-02 22:34:54,348 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:54,348 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:54,348 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:54,349 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [7, 7, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:34:54,349 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:54,349 INFO L791 eck$LassoCheckResult]: Stem: 2568#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 2569#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 2578#L367 assume !(main_~length~0 < 1); 2570#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 2571#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 2579#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 2572#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2573#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2574#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2575#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2581#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2597#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2596#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2595#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2594#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2593#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2592#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2591#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2590#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2583#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2582#L375-3 assume !(main_~i~0 < main_~length~0); 2580#L375-4 main_~j~0 := 1; 2564#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2565#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 2566#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2567#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 2589#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2588#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 2587#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2585#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 2584#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2576#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 2577#L380-2 [2021-11-02 22:34:54,349 INFO L793 eck$LassoCheckResult]: Loop: 2577#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2586#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 2577#L380-2 [2021-11-02 22:34:54,349 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:54,350 INFO L85 PathProgramCache]: Analyzing trace with hash -1534203627, now seen corresponding path program 13 times [2021-11-02 22:34:54,350 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:54,359 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [5233652] [2021-11-02 22:34:54,359 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:54,359 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:54,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:54,760 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 69 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:54,760 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:34:54,760 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [5233652] [2021-11-02 22:34:54,760 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [5233652] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:54,761 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1374631222] [2021-11-02 22:34:54,761 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-02 22:34:54,761 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:34:54,761 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:54,763 INFO L229 MonitoredProcess]: Starting monitored process 38 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:34:54,765 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Waiting until timeout for monitored process [2021-11-02 22:34:55,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:55,074 INFO L263 TraceCheckSpWp]: Trace formula consists of 178 conjuncts, 34 conjunts are in the unsatisfiable core [2021-11-02 22:34:55,078 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:34:55,334 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:34:55,453 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:34:55,455 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-11-02 22:34:55,575 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:34:55,596 INFO L354 Elim1Store]: treesize reduction 60, result has 24.1 percent of original size [2021-11-02 22:34:55,596 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 36 treesize of output 38 [2021-11-02 22:34:56,067 INFO L354 Elim1Store]: treesize reduction 52, result has 11.9 percent of original size [2021-11-02 22:34:56,067 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 40 treesize of output 24 [2021-11-02 22:34:56,072 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 69 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:56,072 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1374631222] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:56,072 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:34:56,073 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 19] total 34 [2021-11-02 22:34:56,073 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1435300692] [2021-11-02 22:34:56,073 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:34:56,074 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:56,074 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 18 times [2021-11-02 22:34:56,074 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:56,074 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [533313989] [2021-11-02 22:34:56,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:56,075 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:56,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:56,118 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:56,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:56,122 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:56,196 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:34:56,197 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2021-11-02 22:34:56,198 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=1068, Unknown=0, NotChecked=0, Total=1190 [2021-11-02 22:34:56,198 INFO L87 Difference]: Start difference. First operand 34 states and 37 transitions. cyclomatic complexity: 6 Second operand has 35 states, 34 states have (on average 1.7647058823529411) internal successors, (60), 35 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:56,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:34:56,848 INFO L93 Difference]: Finished difference Result 38 states and 41 transitions. [2021-11-02 22:34:56,848 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2021-11-02 22:34:56,848 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 38 states and 41 transitions. [2021-11-02 22:34:56,849 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:56,849 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 38 states to 37 states and 40 transitions. [2021-11-02 22:34:56,849 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:34:56,849 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:34:56,850 INFO L73 IsDeterministic]: Start isDeterministic. Operand 37 states and 40 transitions. [2021-11-02 22:34:56,850 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:34:56,850 INFO L681 BuchiCegarLoop]: Abstraction has 37 states and 40 transitions. [2021-11-02 22:34:56,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states and 40 transitions. [2021-11-02 22:34:56,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 36. [2021-11-02 22:34:56,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.0833333333333333) internal successors, (39), 35 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:56,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 39 transitions. [2021-11-02 22:34:56,852 INFO L704 BuchiCegarLoop]: Abstraction has 36 states and 39 transitions. [2021-11-02 22:34:56,852 INFO L587 BuchiCegarLoop]: Abstraction has 36 states and 39 transitions. [2021-11-02 22:34:56,853 INFO L425 BuchiCegarLoop]: ======== Iteration 20============ [2021-11-02 22:34:56,853 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36 states and 39 transitions. [2021-11-02 22:34:56,853 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:56,853 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:56,853 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:56,854 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [7, 7, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:34:56,854 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:56,855 INFO L791 eck$LassoCheckResult]: Stem: 2785#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 2786#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 2796#L367 assume !(main_~length~0 < 1); 2787#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 2788#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 2797#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 2789#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2790#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2791#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2792#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2809#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2808#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2807#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2806#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2805#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2804#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2803#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2802#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2801#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 2800#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 2799#L375-3 assume !(main_~i~0 < main_~length~0); 2798#L375-4 main_~j~0 := 1; 2781#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2782#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 2783#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2784#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 2795#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2816#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 2815#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2814#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 2813#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2811#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 2810#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2793#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 2794#L380-2 [2021-11-02 22:34:56,855 INFO L793 eck$LassoCheckResult]: Loop: 2794#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 2812#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 2794#L380-2 [2021-11-02 22:34:56,855 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:56,855 INFO L85 PathProgramCache]: Analyzing trace with hash -1195903464, now seen corresponding path program 14 times [2021-11-02 22:34:56,856 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:56,856 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1617213722] [2021-11-02 22:34:56,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:56,856 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:56,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:57,230 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:57,231 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:34:57,231 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1617213722] [2021-11-02 22:34:57,231 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1617213722] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:57,231 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2043478963] [2021-11-02 22:34:57,231 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-11-02 22:34:57,231 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:34:57,231 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:57,232 INFO L229 MonitoredProcess]: Starting monitored process 39 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:34:57,234 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Waiting until timeout for monitored process [2021-11-02 22:34:57,570 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-11-02 22:34:57,570 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:34:57,572 INFO L263 TraceCheckSpWp]: Trace formula consists of 193 conjuncts, 32 conjunts are in the unsatisfiable core [2021-11-02 22:34:57,574 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:34:57,679 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:34:57,765 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 35 [2021-11-02 22:34:57,780 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:34:57,780 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 42 [2021-11-02 22:34:58,144 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:34:58,145 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:34:58,148 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 0 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:58,148 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2043478963] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:58,148 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:34:58,148 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 24 [2021-11-02 22:34:58,148 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [694630552] [2021-11-02 22:34:58,149 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:34:58,149 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:58,149 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 19 times [2021-11-02 22:34:58,149 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:58,149 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [547926348] [2021-11-02 22:34:58,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:58,150 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:58,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:58,154 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:58,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:58,158 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:58,225 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:34:58,225 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2021-11-02 22:34:58,226 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=538, Unknown=0, NotChecked=0, Total=600 [2021-11-02 22:34:58,226 INFO L87 Difference]: Start difference. First operand 36 states and 39 transitions. cyclomatic complexity: 6 Second operand has 25 states, 24 states have (on average 2.0) internal successors, (48), 25 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:58,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:34:58,638 INFO L93 Difference]: Finished difference Result 57 states and 63 transitions. [2021-11-02 22:34:58,638 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-11-02 22:34:58,639 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 57 states and 63 transitions. [2021-11-02 22:34:58,639 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:34:58,640 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 57 states to 56 states and 62 transitions. [2021-11-02 22:34:58,640 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:34:58,641 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:34:58,641 INFO L73 IsDeterministic]: Start isDeterministic. Operand 56 states and 62 transitions. [2021-11-02 22:34:58,641 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:34:58,641 INFO L681 BuchiCegarLoop]: Abstraction has 56 states and 62 transitions. [2021-11-02 22:34:58,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states and 62 transitions. [2021-11-02 22:34:58,643 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 42. [2021-11-02 22:34:58,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 1.0952380952380953) internal successors, (46), 41 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:58,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 46 transitions. [2021-11-02 22:34:58,644 INFO L704 BuchiCegarLoop]: Abstraction has 42 states and 46 transitions. [2021-11-02 22:34:58,644 INFO L587 BuchiCegarLoop]: Abstraction has 42 states and 46 transitions. [2021-11-02 22:34:58,645 INFO L425 BuchiCegarLoop]: ======== Iteration 21============ [2021-11-02 22:34:58,645 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 42 states and 46 transitions. [2021-11-02 22:34:58,645 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:58,646 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:58,646 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:58,646 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [7, 7, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:34:58,646 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:58,647 INFO L791 eck$LassoCheckResult]: Stem: 3008#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 3009#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 3019#L367 assume !(main_~length~0 < 1); 3010#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 3011#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 3020#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 3012#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3013#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3014#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3015#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3034#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3033#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3032#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3031#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3030#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3029#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3028#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3027#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3026#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3025#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3023#L375-3 assume !(main_~i~0 < main_~length~0); 3021#L375-4 main_~j~0 := 1; 3022#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3044#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3007#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3006#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3018#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3043#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3042#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3041#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3040#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3039#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3038#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3036#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3035#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3016#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 3017#L380-2 [2021-11-02 22:34:58,647 INFO L793 eck$LassoCheckResult]: Loop: 3017#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3037#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3017#L380-2 [2021-11-02 22:34:58,648 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:58,648 INFO L85 PathProgramCache]: Analyzing trace with hash 1788005979, now seen corresponding path program 15 times [2021-11-02 22:34:58,648 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:58,648 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [127782171] [2021-11-02 22:34:58,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:58,649 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:58,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:34:58,858 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 31 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:58,858 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:34:58,858 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [127782171] [2021-11-02 22:34:58,858 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [127782171] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:58,858 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [344936207] [2021-11-02 22:34:58,858 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-02 22:34:58,859 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:34:58,859 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:34:58,860 INFO L229 MonitoredProcess]: Starting monitored process 40 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:34:58,862 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Waiting until timeout for monitored process [2021-11-02 22:34:59,301 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2021-11-02 22:34:59,301 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:34:59,303 INFO L263 TraceCheckSpWp]: Trace formula consists of 208 conjuncts, 17 conjunts are in the unsatisfiable core [2021-11-02 22:34:59,305 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:34:59,639 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 42 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:34:59,640 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [344936207] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:34:59,640 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:34:59,640 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 26 [2021-11-02 22:34:59,641 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [728829455] [2021-11-02 22:34:59,641 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:34:59,641 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:59,642 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 20 times [2021-11-02 22:34:59,642 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:59,642 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [277186742] [2021-11-02 22:34:59,642 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:59,643 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:59,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:59,651 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:34:59,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:34:59,654 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:34:59,719 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:34:59,720 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2021-11-02 22:34:59,720 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=151, Invalid=499, Unknown=0, NotChecked=0, Total=650 [2021-11-02 22:34:59,720 INFO L87 Difference]: Start difference. First operand 42 states and 46 transitions. cyclomatic complexity: 7 Second operand has 26 states, 26 states have (on average 2.0384615384615383) internal successors, (53), 26 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:59,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:34:59,945 INFO L93 Difference]: Finished difference Result 53 states and 56 transitions. [2021-11-02 22:34:59,946 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2021-11-02 22:34:59,946 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 53 states and 56 transitions. [2021-11-02 22:34:59,947 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:59,947 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 53 states to 39 states and 42 transitions. [2021-11-02 22:34:59,948 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:34:59,948 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:34:59,948 INFO L73 IsDeterministic]: Start isDeterministic. Operand 39 states and 42 transitions. [2021-11-02 22:34:59,948 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:34:59,948 INFO L681 BuchiCegarLoop]: Abstraction has 39 states and 42 transitions. [2021-11-02 22:34:59,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states and 42 transitions. [2021-11-02 22:34:59,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 38. [2021-11-02 22:34:59,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.0789473684210527) internal successors, (41), 37 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:34:59,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 41 transitions. [2021-11-02 22:34:59,951 INFO L704 BuchiCegarLoop]: Abstraction has 38 states and 41 transitions. [2021-11-02 22:34:59,951 INFO L587 BuchiCegarLoop]: Abstraction has 38 states and 41 transitions. [2021-11-02 22:34:59,951 INFO L425 BuchiCegarLoop]: ======== Iteration 22============ [2021-11-02 22:34:59,951 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 38 states and 41 transitions. [2021-11-02 22:34:59,951 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:34:59,951 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:34:59,952 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:34:59,952 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [8, 8, 6, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:34:59,952 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:34:59,953 INFO L791 eck$LassoCheckResult]: Stem: 3258#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 3259#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 3264#L367 assume !(main_~length~0 < 1); 3260#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 3261#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 3265#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 3254#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3255#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3256#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3257#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3267#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3287#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3286#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3285#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3284#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3283#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3282#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3281#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3280#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3279#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3278#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3269#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3268#L375-3 assume !(main_~i~0 < main_~length~0); 3266#L375-4 main_~j~0 := 1; 3250#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3251#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3252#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3253#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3277#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3276#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3275#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3274#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3273#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3272#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3271#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3262#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 3263#L380-2 [2021-11-02 22:34:59,953 INFO L793 eck$LassoCheckResult]: Loop: 3263#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3270#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3263#L380-2 [2021-11-02 22:34:59,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:34:59,953 INFO L85 PathProgramCache]: Analyzing trace with hash -1737871494, now seen corresponding path program 16 times [2021-11-02 22:34:59,953 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:34:59,953 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [858611722] [2021-11-02 22:34:59,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:34:59,954 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:34:59,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:35:00,393 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 0 proven. 94 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:00,393 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:35:00,394 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [858611722] [2021-11-02 22:35:00,394 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [858611722] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:00,394 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1845004904] [2021-11-02 22:35:00,394 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-11-02 22:35:00,394 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:35:00,395 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:35:00,402 INFO L229 MonitoredProcess]: Starting monitored process 41 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:35:00,424 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Waiting until timeout for monitored process [2021-11-02 22:35:01,010 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-11-02 22:35:01,010 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:35:01,012 INFO L263 TraceCheckSpWp]: Trace formula consists of 203 conjuncts, 37 conjunts are in the unsatisfiable core [2021-11-02 22:35:01,013 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:35:01,119 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:35:01,200 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 29 [2021-11-02 22:35:01,214 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:35:01,214 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 36 [2021-11-02 22:35:01,332 INFO L354 Elim1Store]: treesize reduction 80, result has 20.8 percent of original size [2021-11-02 22:35:01,332 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 46 treesize of output 48 [2021-11-02 22:35:01,729 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:35:01,730 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:35:01,734 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 0 proven. 94 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:01,735 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1845004904] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:01,735 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:35:01,735 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 20] total 26 [2021-11-02 22:35:01,735 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1502793942] [2021-11-02 22:35:01,736 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:35:01,736 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:01,736 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 21 times [2021-11-02 22:35:01,737 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:01,737 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1936717207] [2021-11-02 22:35:01,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:01,737 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:01,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:01,744 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:35:01,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:01,747 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:35:01,829 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:35:01,830 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2021-11-02 22:35:01,830 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=633, Unknown=0, NotChecked=0, Total=702 [2021-11-02 22:35:01,831 INFO L87 Difference]: Start difference. First operand 38 states and 41 transitions. cyclomatic complexity: 6 Second operand has 27 states, 26 states have (on average 1.9615384615384615) internal successors, (51), 27 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:02,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:35:02,525 INFO L93 Difference]: Finished difference Result 42 states and 45 transitions. [2021-11-02 22:35:02,526 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2021-11-02 22:35:02,526 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 42 states and 45 transitions. [2021-11-02 22:35:02,526 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:02,527 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 42 states to 41 states and 44 transitions. [2021-11-02 22:35:02,527 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:35:02,527 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:35:02,527 INFO L73 IsDeterministic]: Start isDeterministic. Operand 41 states and 44 transitions. [2021-11-02 22:35:02,527 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:35:02,528 INFO L681 BuchiCegarLoop]: Abstraction has 41 states and 44 transitions. [2021-11-02 22:35:02,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states and 44 transitions. [2021-11-02 22:35:02,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 40. [2021-11-02 22:35:02,532 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 40 states have (on average 1.075) internal successors, (43), 39 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:02,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 43 transitions. [2021-11-02 22:35:02,532 INFO L704 BuchiCegarLoop]: Abstraction has 40 states and 43 transitions. [2021-11-02 22:35:02,532 INFO L587 BuchiCegarLoop]: Abstraction has 40 states and 43 transitions. [2021-11-02 22:35:02,533 INFO L425 BuchiCegarLoop]: ======== Iteration 23============ [2021-11-02 22:35:02,533 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 40 states and 43 transitions. [2021-11-02 22:35:02,533 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:02,533 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:35:02,534 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:35:02,534 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [8, 8, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:35:02,534 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:35:02,535 INFO L791 eck$LassoCheckResult]: Stem: 3485#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 3486#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 3496#L367 assume !(main_~length~0 < 1); 3487#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 3488#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 3497#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 3489#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3490#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3491#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3492#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3511#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3510#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3509#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3508#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3507#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3506#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3505#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3504#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3503#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3502#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3501#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3500#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3499#L375-3 assume !(main_~i~0 < main_~length~0); 3498#L375-4 main_~j~0 := 1; 3481#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3482#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3483#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3484#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3495#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3520#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3519#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3518#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3517#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3516#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3515#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3514#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3513#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3493#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 3494#L380-2 [2021-11-02 22:35:02,535 INFO L793 eck$LassoCheckResult]: Loop: 3494#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3512#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3494#L380-2 [2021-11-02 22:35:02,535 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:02,536 INFO L85 PathProgramCache]: Analyzing trace with hash 647771965, now seen corresponding path program 17 times [2021-11-02 22:35:02,536 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:02,536 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2015315627] [2021-11-02 22:35:02,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:02,537 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:02,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:35:02,979 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 0 proven. 106 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:02,979 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:35:02,980 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2015315627] [2021-11-02 22:35:02,980 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2015315627] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:02,980 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [514988679] [2021-11-02 22:35:02,980 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-02 22:35:02,980 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:35:02,981 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:35:02,989 INFO L229 MonitoredProcess]: Starting monitored process 42 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:35:02,990 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Waiting until timeout for monitored process [2021-11-02 22:35:03,465 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2021-11-02 22:35:03,465 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:35:03,468 INFO L263 TraceCheckSpWp]: Trace formula consists of 218 conjuncts, 36 conjunts are in the unsatisfiable core [2021-11-02 22:35:03,470 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:35:03,574 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:35:03,611 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 35 [2021-11-02 22:35:03,623 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:35:03,623 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 42 [2021-11-02 22:35:04,070 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:35:04,071 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:35:04,074 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 0 proven. 106 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:04,074 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [514988679] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:04,075 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:35:04,075 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 27 [2021-11-02 22:35:04,075 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [595659653] [2021-11-02 22:35:04,075 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:35:04,076 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:04,076 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 22 times [2021-11-02 22:35:04,076 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:04,076 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [82226937] [2021-11-02 22:35:04,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:04,077 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:04,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:04,082 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:35:04,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:04,084 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:35:04,171 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:35:04,171 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2021-11-02 22:35:04,172 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=686, Unknown=0, NotChecked=0, Total=756 [2021-11-02 22:35:04,172 INFO L87 Difference]: Start difference. First operand 40 states and 43 transitions. cyclomatic complexity: 6 Second operand has 28 states, 27 states have (on average 2.0) internal successors, (54), 28 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:04,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:35:04,779 INFO L93 Difference]: Finished difference Result 63 states and 69 transitions. [2021-11-02 22:35:04,780 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2021-11-02 22:35:04,780 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 63 states and 69 transitions. [2021-11-02 22:35:04,781 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:35:04,782 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 63 states to 62 states and 68 transitions. [2021-11-02 22:35:04,782 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:35:04,782 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:35:04,782 INFO L73 IsDeterministic]: Start isDeterministic. Operand 62 states and 68 transitions. [2021-11-02 22:35:04,782 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:35:04,782 INFO L681 BuchiCegarLoop]: Abstraction has 62 states and 68 transitions. [2021-11-02 22:35:04,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states and 68 transitions. [2021-11-02 22:35:04,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 46. [2021-11-02 22:35:04,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.0869565217391304) internal successors, (50), 45 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:04,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 50 transitions. [2021-11-02 22:35:04,785 INFO L704 BuchiCegarLoop]: Abstraction has 46 states and 50 transitions. [2021-11-02 22:35:04,785 INFO L587 BuchiCegarLoop]: Abstraction has 46 states and 50 transitions. [2021-11-02 22:35:04,785 INFO L425 BuchiCegarLoop]: ======== Iteration 24============ [2021-11-02 22:35:04,785 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 46 states and 50 transitions. [2021-11-02 22:35:04,786 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:04,786 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:35:04,786 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:35:04,786 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [8, 8, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:35:04,787 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:35:04,787 INFO L791 eck$LassoCheckResult]: Stem: 3733#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 3734#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 3744#L367 assume !(main_~length~0 < 1); 3735#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 3736#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 3745#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 3737#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3738#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3739#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3740#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3761#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3760#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3759#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3758#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3757#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3756#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3755#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3754#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3753#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3752#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3751#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 3750#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 3748#L375-3 assume !(main_~i~0 < main_~length~0); 3746#L375-4 main_~j~0 := 1; 3747#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3773#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3732#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3731#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3743#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3772#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3771#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3770#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3769#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3768#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3767#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3766#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3765#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3763#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3762#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3741#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 3742#L380-2 [2021-11-02 22:35:04,787 INFO L793 eck$LassoCheckResult]: Loop: 3742#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 3764#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 3742#L380-2 [2021-11-02 22:35:04,787 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:04,787 INFO L85 PathProgramCache]: Analyzing trace with hash -261400000, now seen corresponding path program 18 times [2021-11-02 22:35:04,788 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:04,788 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1525470807] [2021-11-02 22:35:04,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:04,788 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:04,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:35:05,058 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 43 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:05,058 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:35:05,059 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1525470807] [2021-11-02 22:35:05,059 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1525470807] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:05,059 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [491683378] [2021-11-02 22:35:05,059 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-11-02 22:35:05,059 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:35:05,059 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:35:05,062 INFO L229 MonitoredProcess]: Starting monitored process 43 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:35:05,082 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Waiting until timeout for monitored process [2021-11-02 22:35:05,800 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2021-11-02 22:35:05,800 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:35:05,803 INFO L263 TraceCheckSpWp]: Trace formula consists of 233 conjuncts, 19 conjunts are in the unsatisfiable core [2021-11-02 22:35:05,805 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:35:06,141 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 56 proven. 64 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:06,142 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [491683378] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:06,142 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:35:06,142 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 29 [2021-11-02 22:35:06,143 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1142012408] [2021-11-02 22:35:06,143 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:35:06,143 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:06,143 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 23 times [2021-11-02 22:35:06,143 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:06,144 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1690539380] [2021-11-02 22:35:06,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:06,144 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:06,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:06,177 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:35:06,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:06,182 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:35:06,255 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:35:06,256 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2021-11-02 22:35:06,256 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=187, Invalid=625, Unknown=0, NotChecked=0, Total=812 [2021-11-02 22:35:06,256 INFO L87 Difference]: Start difference. First operand 46 states and 50 transitions. cyclomatic complexity: 7 Second operand has 29 states, 29 states have (on average 2.0344827586206895) internal successors, (59), 29 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:06,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:35:06,477 INFO L93 Difference]: Finished difference Result 59 states and 62 transitions. [2021-11-02 22:35:06,485 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2021-11-02 22:35:06,485 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 59 states and 62 transitions. [2021-11-02 22:35:06,486 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:06,487 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 59 states to 43 states and 46 transitions. [2021-11-02 22:35:06,487 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:35:06,487 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:35:06,488 INFO L73 IsDeterministic]: Start isDeterministic. Operand 43 states and 46 transitions. [2021-11-02 22:35:06,488 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:35:06,488 INFO L681 BuchiCegarLoop]: Abstraction has 43 states and 46 transitions. [2021-11-02 22:35:06,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states and 46 transitions. [2021-11-02 22:35:06,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 42. [2021-11-02 22:35:06,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 1.0714285714285714) internal successors, (45), 41 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:06,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 45 transitions. [2021-11-02 22:35:06,491 INFO L704 BuchiCegarLoop]: Abstraction has 42 states and 45 transitions. [2021-11-02 22:35:06,491 INFO L587 BuchiCegarLoop]: Abstraction has 42 states and 45 transitions. [2021-11-02 22:35:06,491 INFO L425 BuchiCegarLoop]: ======== Iteration 25============ [2021-11-02 22:35:06,491 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 42 states and 45 transitions. [2021-11-02 22:35:06,492 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:06,492 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:35:06,492 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:35:06,493 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [9, 9, 7, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:35:06,493 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:35:06,494 INFO L791 eck$LassoCheckResult]: Stem: 4006#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 4007#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 4016#L367 assume !(main_~length~0 < 1); 4008#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 4009#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 4017#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 4010#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4011#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4012#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4013#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4019#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4043#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4042#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4041#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4040#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4039#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4038#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4037#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4036#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4035#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4034#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4033#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4032#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4021#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4020#L375-3 assume !(main_~i~0 < main_~length~0); 4018#L375-4 main_~j~0 := 1; 4002#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4003#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4004#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4005#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4031#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4030#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4029#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4028#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4027#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4026#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4025#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4024#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4023#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4014#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 4015#L380-2 [2021-11-02 22:35:06,494 INFO L793 eck$LassoCheckResult]: Loop: 4015#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4022#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4015#L380-2 [2021-11-02 22:35:06,494 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:06,494 INFO L85 PathProgramCache]: Analyzing trace with hash 99544991, now seen corresponding path program 19 times [2021-11-02 22:35:06,495 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:06,495 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [803296452] [2021-11-02 22:35:06,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:06,495 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:06,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:35:06,983 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 123 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:06,983 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:35:06,983 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [803296452] [2021-11-02 22:35:06,983 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [803296452] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:06,983 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1947856722] [2021-11-02 22:35:06,983 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-02 22:35:06,983 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:35:06,984 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:35:06,985 INFO L229 MonitoredProcess]: Starting monitored process 44 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:35:06,986 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (44)] Waiting until timeout for monitored process [2021-11-02 22:35:07,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:35:07,460 INFO L263 TraceCheckSpWp]: Trace formula consists of 228 conjuncts, 42 conjunts are in the unsatisfiable core [2021-11-02 22:35:07,461 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:35:07,783 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:35:07,904 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:35:07,905 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-11-02 22:35:08,028 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:35:08,044 INFO L354 Elim1Store]: treesize reduction 60, result has 24.1 percent of original size [2021-11-02 22:35:08,045 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 36 treesize of output 38 [2021-11-02 22:35:08,696 INFO L354 Elim1Store]: treesize reduction 52, result has 11.9 percent of original size [2021-11-02 22:35:08,696 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 40 treesize of output 24 [2021-11-02 22:35:08,702 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 0 proven. 123 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:08,702 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1947856722] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:08,702 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:35:08,702 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 23] total 42 [2021-11-02 22:35:08,703 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1750816602] [2021-11-02 22:35:08,703 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:35:08,703 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:08,703 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 24 times [2021-11-02 22:35:08,704 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:08,704 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1323315296] [2021-11-02 22:35:08,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:08,704 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:08,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:08,710 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:35:08,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:08,714 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:35:08,799 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:35:08,800 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2021-11-02 22:35:08,801 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=150, Invalid=1656, Unknown=0, NotChecked=0, Total=1806 [2021-11-02 22:35:08,801 INFO L87 Difference]: Start difference. First operand 42 states and 45 transitions. cyclomatic complexity: 6 Second operand has 43 states, 42 states have (on average 1.8095238095238095) internal successors, (76), 43 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:09,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:35:09,758 INFO L93 Difference]: Finished difference Result 46 states and 49 transitions. [2021-11-02 22:35:09,758 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2021-11-02 22:35:09,759 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 46 states and 49 transitions. [2021-11-02 22:35:09,759 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:09,759 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 46 states to 45 states and 48 transitions. [2021-11-02 22:35:09,759 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:35:09,760 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:35:09,760 INFO L73 IsDeterministic]: Start isDeterministic. Operand 45 states and 48 transitions. [2021-11-02 22:35:09,760 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:35:09,760 INFO L681 BuchiCegarLoop]: Abstraction has 45 states and 48 transitions. [2021-11-02 22:35:09,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states and 48 transitions. [2021-11-02 22:35:09,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 44. [2021-11-02 22:35:09,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 44 states have (on average 1.0681818181818181) internal successors, (47), 43 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:09,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 47 transitions. [2021-11-02 22:35:09,762 INFO L704 BuchiCegarLoop]: Abstraction has 44 states and 47 transitions. [2021-11-02 22:35:09,762 INFO L587 BuchiCegarLoop]: Abstraction has 44 states and 47 transitions. [2021-11-02 22:35:09,762 INFO L425 BuchiCegarLoop]: ======== Iteration 26============ [2021-11-02 22:35:09,762 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 44 states and 47 transitions. [2021-11-02 22:35:09,762 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:09,762 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:35:09,762 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:35:09,763 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [9, 9, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:35:09,763 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:35:09,763 INFO L791 eck$LassoCheckResult]: Stem: 4279#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 4280#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 4286#L367 assume !(main_~length~0 < 1); 4281#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 4282#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 4287#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 4275#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4276#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4277#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4278#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4303#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4302#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4301#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4300#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4299#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4298#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4297#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4296#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4295#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4294#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4293#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4292#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4291#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4290#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4289#L375-3 assume !(main_~i~0 < main_~length~0); 4288#L375-4 main_~j~0 := 1; 4271#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4272#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4273#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4274#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4285#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4314#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4313#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4312#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4311#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4310#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4309#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4308#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4307#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4305#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4304#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4283#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 4284#L380-2 [2021-11-02 22:35:09,763 INFO L793 eck$LassoCheckResult]: Loop: 4284#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4306#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4284#L380-2 [2021-11-02 22:35:09,763 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:09,764 INFO L85 PathProgramCache]: Analyzing trace with hash 1173455394, now seen corresponding path program 20 times [2021-11-02 22:35:09,764 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:09,764 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [213150458] [2021-11-02 22:35:09,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:09,764 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:09,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:35:10,323 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 0 proven. 137 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:10,323 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:35:10,323 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [213150458] [2021-11-02 22:35:10,323 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [213150458] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:10,324 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1468877112] [2021-11-02 22:35:10,324 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-11-02 22:35:10,324 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:35:10,324 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:35:10,329 INFO L229 MonitoredProcess]: Starting monitored process 45 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:35:10,352 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (45)] Waiting until timeout for monitored process [2021-11-02 22:35:10,968 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-11-02 22:35:10,973 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:35:10,975 INFO L263 TraceCheckSpWp]: Trace formula consists of 243 conjuncts, 40 conjunts are in the unsatisfiable core [2021-11-02 22:35:10,977 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:35:11,122 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:35:11,172 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 35 [2021-11-02 22:35:11,186 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:35:11,187 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 42 [2021-11-02 22:35:11,888 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:35:11,888 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:35:11,936 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 0 proven. 137 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:11,936 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1468877112] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:11,937 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:35:11,937 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 30 [2021-11-02 22:35:11,937 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2040305604] [2021-11-02 22:35:11,937 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:35:11,938 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:11,938 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 25 times [2021-11-02 22:35:11,938 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:11,938 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [841507588] [2021-11-02 22:35:11,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:11,938 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:11,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:11,956 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:35:11,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:11,973 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:35:12,074 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:35:12,075 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2021-11-02 22:35:12,075 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=852, Unknown=0, NotChecked=0, Total=930 [2021-11-02 22:35:12,075 INFO L87 Difference]: Start difference. First operand 44 states and 47 transitions. cyclomatic complexity: 6 Second operand has 31 states, 30 states have (on average 2.0) internal successors, (60), 31 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:12,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:35:12,806 INFO L93 Difference]: Finished difference Result 69 states and 75 transitions. [2021-11-02 22:35:12,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2021-11-02 22:35:12,807 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 69 states and 75 transitions. [2021-11-02 22:35:12,808 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:35:12,809 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 69 states to 68 states and 74 transitions. [2021-11-02 22:35:12,809 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:35:12,809 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:35:12,809 INFO L73 IsDeterministic]: Start isDeterministic. Operand 68 states and 74 transitions. [2021-11-02 22:35:12,810 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:35:12,810 INFO L681 BuchiCegarLoop]: Abstraction has 68 states and 74 transitions. [2021-11-02 22:35:12,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states and 74 transitions. [2021-11-02 22:35:12,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 50. [2021-11-02 22:35:12,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 1.08) internal successors, (54), 49 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:12,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 54 transitions. [2021-11-02 22:35:12,813 INFO L704 BuchiCegarLoop]: Abstraction has 50 states and 54 transitions. [2021-11-02 22:35:12,813 INFO L587 BuchiCegarLoop]: Abstraction has 50 states and 54 transitions. [2021-11-02 22:35:12,813 INFO L425 BuchiCegarLoop]: ======== Iteration 27============ [2021-11-02 22:35:12,813 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 50 states and 54 transitions. [2021-11-02 22:35:12,814 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:12,814 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:35:12,814 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:35:12,815 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [9, 9, 9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:35:12,815 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:35:12,815 INFO L791 eck$LassoCheckResult]: Stem: 4552#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 4553#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 4559#L367 assume !(main_~length~0 < 1); 4554#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 4555#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 4560#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 4548#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4549#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4550#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4551#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4563#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4578#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4577#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4576#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4575#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4574#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4573#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4572#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4571#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4570#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4569#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4568#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4567#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4566#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4564#L375-3 assume !(main_~i~0 < main_~length~0); 4561#L375-4 main_~j~0 := 1; 4562#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4592#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4547#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4546#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4558#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4591#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4590#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4589#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4588#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4587#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4586#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4585#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4584#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4583#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4582#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4581#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4580#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4556#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 4557#L380-2 [2021-11-02 22:35:12,815 INFO L793 eck$LassoCheckResult]: Loop: 4557#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4579#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4557#L380-2 [2021-11-02 22:35:12,816 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:12,816 INFO L85 PathProgramCache]: Analyzing trace with hash -1885765659, now seen corresponding path program 21 times [2021-11-02 22:35:12,816 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:12,817 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1438824389] [2021-11-02 22:35:12,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:12,817 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:12,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:35:13,164 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 57 proven. 96 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:13,164 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:35:13,164 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1438824389] [2021-11-02 22:35:13,165 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1438824389] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:13,165 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [272698130] [2021-11-02 22:35:13,165 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-02 22:35:13,165 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:35:13,166 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:35:13,168 INFO L229 MonitoredProcess]: Starting monitored process 46 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:35:13,189 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (46)] Waiting until timeout for monitored process [2021-11-02 22:35:14,008 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2021-11-02 22:35:14,008 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:35:14,011 INFO L263 TraceCheckSpWp]: Trace formula consists of 258 conjuncts, 21 conjunts are in the unsatisfiable core [2021-11-02 22:35:14,013 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:35:14,416 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 72 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:14,416 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [272698130] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:14,416 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:35:14,416 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 32 [2021-11-02 22:35:14,416 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [714372117] [2021-11-02 22:35:14,417 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:35:14,417 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:14,418 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 26 times [2021-11-02 22:35:14,418 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:14,418 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [837691329] [2021-11-02 22:35:14,418 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:14,419 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:14,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:14,428 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:35:14,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:14,431 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:35:14,513 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:35:14,514 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2021-11-02 22:35:14,514 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=227, Invalid=765, Unknown=0, NotChecked=0, Total=992 [2021-11-02 22:35:14,514 INFO L87 Difference]: Start difference. First operand 50 states and 54 transitions. cyclomatic complexity: 7 Second operand has 32 states, 32 states have (on average 2.03125) internal successors, (65), 32 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:14,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:35:14,813 INFO L93 Difference]: Finished difference Result 65 states and 68 transitions. [2021-11-02 22:35:14,813 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2021-11-02 22:35:14,813 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 65 states and 68 transitions. [2021-11-02 22:35:14,814 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:14,814 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 65 states to 47 states and 50 transitions. [2021-11-02 22:35:14,815 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:35:14,815 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:35:14,815 INFO L73 IsDeterministic]: Start isDeterministic. Operand 47 states and 50 transitions. [2021-11-02 22:35:14,815 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:35:14,815 INFO L681 BuchiCegarLoop]: Abstraction has 47 states and 50 transitions. [2021-11-02 22:35:14,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states and 50 transitions. [2021-11-02 22:35:14,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 46. [2021-11-02 22:35:14,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 46 states have (on average 1.065217391304348) internal successors, (49), 45 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:14,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 49 transitions. [2021-11-02 22:35:14,817 INFO L704 BuchiCegarLoop]: Abstraction has 46 states and 49 transitions. [2021-11-02 22:35:14,817 INFO L587 BuchiCegarLoop]: Abstraction has 46 states and 49 transitions. [2021-11-02 22:35:14,817 INFO L425 BuchiCegarLoop]: ======== Iteration 28============ [2021-11-02 22:35:14,817 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 46 states and 49 transitions. [2021-11-02 22:35:14,818 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:14,818 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:35:14,818 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:35:14,818 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 8, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:35:14,818 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:35:14,819 INFO L791 eck$LassoCheckResult]: Stem: 4848#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 4849#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 4858#L367 assume !(main_~length~0 < 1); 4850#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 4851#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 4859#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 4852#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4853#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4854#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4855#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4861#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4889#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4888#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4887#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4886#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4885#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4884#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4883#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4882#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4881#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4880#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4879#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4878#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4877#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4876#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 4863#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 4862#L375-3 assume !(main_~i~0 < main_~length~0); 4860#L375-4 main_~j~0 := 1; 4844#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4845#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4846#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4847#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4875#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4874#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4873#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4872#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4871#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4870#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4869#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4868#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4867#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4865#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4864#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4856#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 4857#L380-2 [2021-11-02 22:35:14,819 INFO L793 eck$LassoCheckResult]: Loop: 4857#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 4866#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 4857#L380-2 [2021-11-02 22:35:14,819 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:14,819 INFO L85 PathProgramCache]: Analyzing trace with hash 1384987012, now seen corresponding path program 22 times [2021-11-02 22:35:14,819 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:14,819 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [27105725] [2021-11-02 22:35:14,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:14,820 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:14,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:35:15,515 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:15,515 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:35:15,516 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [27105725] [2021-11-02 22:35:15,516 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [27105725] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:15,516 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [85251954] [2021-11-02 22:35:15,516 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-11-02 22:35:15,516 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:35:15,516 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:35:15,541 INFO L229 MonitoredProcess]: Starting monitored process 47 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:35:15,593 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (47)] Waiting until timeout for monitored process [2021-11-02 22:35:16,521 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-11-02 22:35:16,521 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:35:16,524 INFO L263 TraceCheckSpWp]: Trace formula consists of 253 conjuncts, 45 conjunts are in the unsatisfiable core [2021-11-02 22:35:16,525 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:35:16,653 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:35:16,698 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 29 [2021-11-02 22:35:16,735 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:35:16,736 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 36 [2021-11-02 22:35:16,865 INFO L354 Elim1Store]: treesize reduction 80, result has 20.8 percent of original size [2021-11-02 22:35:16,866 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 46 treesize of output 48 [2021-11-02 22:35:17,413 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:35:17,413 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:35:17,417 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:17,417 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [85251954] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:17,417 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:35:17,417 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 24] total 32 [2021-11-02 22:35:17,417 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [630012471] [2021-11-02 22:35:17,418 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:35:17,418 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:17,418 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 27 times [2021-11-02 22:35:17,418 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:17,421 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [407934552] [2021-11-02 22:35:17,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:17,421 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:17,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:17,430 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:35:17,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:17,433 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:35:17,523 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:35:17,524 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2021-11-02 22:35:17,525 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=971, Unknown=0, NotChecked=0, Total=1056 [2021-11-02 22:35:17,525 INFO L87 Difference]: Start difference. First operand 46 states and 49 transitions. cyclomatic complexity: 6 Second operand has 33 states, 32 states have (on average 1.96875) internal successors, (63), 33 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:18,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:35:18,549 INFO L93 Difference]: Finished difference Result 50 states and 53 transitions. [2021-11-02 22:35:18,549 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2021-11-02 22:35:18,550 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 50 states and 53 transitions. [2021-11-02 22:35:18,550 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:18,551 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 50 states to 49 states and 52 transitions. [2021-11-02 22:35:18,551 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:35:18,551 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:35:18,552 INFO L73 IsDeterministic]: Start isDeterministic. Operand 49 states and 52 transitions. [2021-11-02 22:35:18,552 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:35:18,552 INFO L681 BuchiCegarLoop]: Abstraction has 49 states and 52 transitions. [2021-11-02 22:35:18,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states and 52 transitions. [2021-11-02 22:35:18,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 48. [2021-11-02 22:35:18,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 48 states have (on average 1.0625) internal successors, (51), 47 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:18,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 51 transitions. [2021-11-02 22:35:18,554 INFO L704 BuchiCegarLoop]: Abstraction has 48 states and 51 transitions. [2021-11-02 22:35:18,555 INFO L587 BuchiCegarLoop]: Abstraction has 48 states and 51 transitions. [2021-11-02 22:35:18,555 INFO L425 BuchiCegarLoop]: ======== Iteration 29============ [2021-11-02 22:35:18,555 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 48 states and 51 transitions. [2021-11-02 22:35:18,555 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:18,556 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:35:18,556 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:35:18,556 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:35:18,557 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:35:18,557 INFO L791 eck$LassoCheckResult]: Stem: 5129#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 5130#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 5140#L367 assume !(main_~length~0 < 1); 5131#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 5132#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 5141#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 5133#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5134#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5135#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5136#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5159#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5158#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5157#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5156#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5155#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5154#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5153#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5152#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5151#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5150#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5149#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5148#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5147#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5146#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5145#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5144#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5143#L375-3 assume !(main_~i~0 < main_~length~0); 5142#L375-4 main_~j~0 := 1; 5125#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5126#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5127#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5128#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5139#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5172#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5171#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5170#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5169#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5168#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5167#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5166#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5165#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5164#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5163#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5162#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5161#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5137#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 5138#L380-2 [2021-11-02 22:35:18,557 INFO L793 eck$LassoCheckResult]: Loop: 5138#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5160#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5138#L380-2 [2021-11-02 22:35:18,558 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:18,558 INFO L85 PathProgramCache]: Analyzing trace with hash -467343673, now seen corresponding path program 23 times [2021-11-02 22:35:18,558 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:18,559 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2008838095] [2021-11-02 22:35:18,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:18,559 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:18,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:35:19,177 INFO L134 CoverageAnalysis]: Checked inductivity of 172 backedges. 0 proven. 172 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:19,178 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:35:19,178 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2008838095] [2021-11-02 22:35:19,178 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2008838095] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:19,178 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1873163131] [2021-11-02 22:35:19,178 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-02 22:35:19,178 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:35:19,179 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:35:19,181 INFO L229 MonitoredProcess]: Starting monitored process 48 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:35:19,182 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Waiting until timeout for monitored process [2021-11-02 22:35:20,117 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 11 check-sat command(s) [2021-11-02 22:35:20,118 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:35:20,122 INFO L263 TraceCheckSpWp]: Trace formula consists of 268 conjuncts, 44 conjunts are in the unsatisfiable core [2021-11-02 22:35:20,124 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:35:20,266 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:35:20,321 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 35 [2021-11-02 22:35:20,338 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:35:20,338 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 42 [2021-11-02 22:35:20,863 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:35:20,863 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:35:20,867 INFO L134 CoverageAnalysis]: Checked inductivity of 172 backedges. 0 proven. 172 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:20,867 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1873163131] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:20,867 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:35:20,867 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 33 [2021-11-02 22:35:20,868 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1237271603] [2021-11-02 22:35:20,868 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:35:20,868 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:20,868 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 28 times [2021-11-02 22:35:20,868 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:20,868 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1793248538] [2021-11-02 22:35:20,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:20,869 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:20,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:20,876 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:35:20,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:20,879 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:35:20,970 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:35:20,971 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2021-11-02 22:35:20,971 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=1036, Unknown=0, NotChecked=0, Total=1122 [2021-11-02 22:35:20,972 INFO L87 Difference]: Start difference. First operand 48 states and 51 transitions. cyclomatic complexity: 6 Second operand has 34 states, 33 states have (on average 2.0) internal successors, (66), 34 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:21,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:35:21,720 INFO L93 Difference]: Finished difference Result 75 states and 81 transitions. [2021-11-02 22:35:21,721 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2021-11-02 22:35:21,721 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 75 states and 81 transitions. [2021-11-02 22:35:21,722 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:35:21,723 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 75 states to 74 states and 80 transitions. [2021-11-02 22:35:21,723 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:35:21,724 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:35:21,724 INFO L73 IsDeterministic]: Start isDeterministic. Operand 74 states and 80 transitions. [2021-11-02 22:35:21,724 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:35:21,724 INFO L681 BuchiCegarLoop]: Abstraction has 74 states and 80 transitions. [2021-11-02 22:35:21,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states and 80 transitions. [2021-11-02 22:35:21,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 54. [2021-11-02 22:35:21,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 54 states have (on average 1.0740740740740742) internal successors, (58), 53 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:21,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 58 transitions. [2021-11-02 22:35:21,728 INFO L704 BuchiCegarLoop]: Abstraction has 54 states and 58 transitions. [2021-11-02 22:35:21,728 INFO L587 BuchiCegarLoop]: Abstraction has 54 states and 58 transitions. [2021-11-02 22:35:21,728 INFO L425 BuchiCegarLoop]: ======== Iteration 30============ [2021-11-02 22:35:21,728 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 54 states and 58 transitions. [2021-11-02 22:35:21,729 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:21,729 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:35:21,729 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:35:21,729 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [10, 10, 10, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:35:21,729 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:35:21,730 INFO L791 eck$LassoCheckResult]: Stem: 5431#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 5432#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 5438#L367 assume !(main_~length~0 < 1); 5433#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 5434#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 5439#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 5427#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5428#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5429#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5430#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5442#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5459#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5458#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5457#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5456#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5455#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5454#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5453#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5452#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5451#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5450#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5449#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5448#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5447#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5446#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5445#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5443#L375-3 assume !(main_~i~0 < main_~length~0); 5440#L375-4 main_~j~0 := 1; 5441#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5475#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5426#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5425#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5437#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5474#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5473#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5472#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5471#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5470#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5469#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5468#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5467#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5466#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5465#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5464#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5463#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5462#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5461#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5435#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 5436#L380-2 [2021-11-02 22:35:21,730 INFO L793 eck$LassoCheckResult]: Loop: 5436#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5460#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5436#L380-2 [2021-11-02 22:35:21,730 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:21,730 INFO L85 PathProgramCache]: Analyzing trace with hash 1854295882, now seen corresponding path program 24 times [2021-11-02 22:35:21,731 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:21,731 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1542705709] [2021-11-02 22:35:21,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:21,731 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:21,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:35:22,080 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 73 proven. 117 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:22,080 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:35:22,080 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1542705709] [2021-11-02 22:35:22,080 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1542705709] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:22,081 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1312618973] [2021-11-02 22:35:22,081 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-11-02 22:35:22,081 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:35:22,081 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:35:22,086 INFO L229 MonitoredProcess]: Starting monitored process 49 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:35:22,087 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (49)] Waiting until timeout for monitored process [2021-11-02 22:35:22,900 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2021-11-02 22:35:22,901 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:35:22,904 INFO L263 TraceCheckSpWp]: Trace formula consists of 283 conjuncts, 23 conjunts are in the unsatisfiable core [2021-11-02 22:35:22,905 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:35:23,427 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 90 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:23,427 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1312618973] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:23,427 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:35:23,427 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 35 [2021-11-02 22:35:23,427 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [354799668] [2021-11-02 22:35:23,428 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:35:23,428 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:23,428 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 29 times [2021-11-02 22:35:23,428 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:23,428 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [537009570] [2021-11-02 22:35:23,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:23,428 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:23,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:23,436 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:35:23,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:23,439 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:35:23,525 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:35:23,526 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2021-11-02 22:35:23,527 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=271, Invalid=919, Unknown=0, NotChecked=0, Total=1190 [2021-11-02 22:35:23,527 INFO L87 Difference]: Start difference. First operand 54 states and 58 transitions. cyclomatic complexity: 7 Second operand has 35 states, 35 states have (on average 2.0285714285714285) internal successors, (71), 35 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:23,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:35:23,898 INFO L93 Difference]: Finished difference Result 71 states and 74 transitions. [2021-11-02 22:35:23,898 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2021-11-02 22:35:23,899 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 71 states and 74 transitions. [2021-11-02 22:35:23,899 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:23,900 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 71 states to 51 states and 54 transitions. [2021-11-02 22:35:23,900 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:35:23,900 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:35:23,900 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 54 transitions. [2021-11-02 22:35:23,901 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:35:23,901 INFO L681 BuchiCegarLoop]: Abstraction has 51 states and 54 transitions. [2021-11-02 22:35:23,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 54 transitions. [2021-11-02 22:35:23,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 50. [2021-11-02 22:35:23,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 50 states have (on average 1.06) internal successors, (53), 49 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:23,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 53 transitions. [2021-11-02 22:35:23,903 INFO L704 BuchiCegarLoop]: Abstraction has 50 states and 53 transitions. [2021-11-02 22:35:23,903 INFO L587 BuchiCegarLoop]: Abstraction has 50 states and 53 transitions. [2021-11-02 22:35:23,903 INFO L425 BuchiCegarLoop]: ======== Iteration 31============ [2021-11-02 22:35:23,903 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 50 states and 53 transitions. [2021-11-02 22:35:23,903 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:23,904 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:35:23,904 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:35:23,904 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [11, 11, 9, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:35:23,904 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:35:23,905 INFO L791 eck$LassoCheckResult]: Stem: 5754#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 5755#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 5764#L367 assume !(main_~length~0 < 1); 5756#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 5757#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 5765#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 5758#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5759#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5760#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5761#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5767#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5799#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5798#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5797#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5796#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5795#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5794#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5793#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5792#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5791#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5790#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5789#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5788#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5787#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5786#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5785#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5784#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 5769#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 5768#L375-3 assume !(main_~i~0 < main_~length~0); 5766#L375-4 main_~j~0 := 1; 5750#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5751#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5752#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5753#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5783#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5782#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5781#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5780#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5779#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5778#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5777#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5776#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5775#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5774#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5773#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5771#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5770#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5762#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 5763#L380-2 [2021-11-02 22:35:23,905 INFO L793 eck$LassoCheckResult]: Loop: 5763#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 5772#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 5763#L380-2 [2021-11-02 22:35:23,905 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:23,905 INFO L85 PathProgramCache]: Analyzing trace with hash 1131552041, now seen corresponding path program 25 times [2021-11-02 22:35:23,905 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:23,906 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1427644014] [2021-11-02 22:35:23,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:23,906 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:23,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:35:24,690 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 0 proven. 193 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:24,691 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:35:24,691 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1427644014] [2021-11-02 22:35:24,691 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1427644014] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:24,691 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [620086210] [2021-11-02 22:35:24,691 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-02 22:35:24,691 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:35:24,691 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:35:24,694 INFO L229 MonitoredProcess]: Starting monitored process 50 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:35:24,695 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (50)] Waiting until timeout for monitored process [2021-11-02 22:35:25,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:35:25,384 INFO L263 TraceCheckSpWp]: Trace formula consists of 278 conjuncts, 50 conjunts are in the unsatisfiable core [2021-11-02 22:35:25,385 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:35:25,863 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:35:25,981 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:35:25,982 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-11-02 22:35:26,119 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:35:26,142 INFO L354 Elim1Store]: treesize reduction 60, result has 24.1 percent of original size [2021-11-02 22:35:26,143 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 36 treesize of output 38 [2021-11-02 22:35:27,300 INFO L354 Elim1Store]: treesize reduction 52, result has 11.9 percent of original size [2021-11-02 22:35:27,301 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 40 treesize of output 24 [2021-11-02 22:35:27,306 INFO L134 CoverageAnalysis]: Checked inductivity of 193 backedges. 0 proven. 193 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:27,307 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [620086210] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:27,307 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:35:27,307 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 27] total 50 [2021-11-02 22:35:27,307 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1057018562] [2021-11-02 22:35:27,308 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:35:27,309 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:27,309 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 30 times [2021-11-02 22:35:27,309 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:27,309 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2130201654] [2021-11-02 22:35:27,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:27,310 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:27,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:27,320 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:35:27,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:27,326 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:35:27,407 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:35:27,407 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2021-11-02 22:35:27,410 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=178, Invalid=2372, Unknown=0, NotChecked=0, Total=2550 [2021-11-02 22:35:27,410 INFO L87 Difference]: Start difference. First operand 50 states and 53 transitions. cyclomatic complexity: 6 Second operand has 51 states, 50 states have (on average 1.84) internal successors, (92), 51 states have internal predecessors, (92), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:28,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:35:28,680 INFO L93 Difference]: Finished difference Result 54 states and 57 transitions. [2021-11-02 22:35:28,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2021-11-02 22:35:28,683 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 54 states and 57 transitions. [2021-11-02 22:35:28,684 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:28,687 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 54 states to 53 states and 56 transitions. [2021-11-02 22:35:28,687 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:35:28,687 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:35:28,687 INFO L73 IsDeterministic]: Start isDeterministic. Operand 53 states and 56 transitions. [2021-11-02 22:35:28,688 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:35:28,688 INFO L681 BuchiCegarLoop]: Abstraction has 53 states and 56 transitions. [2021-11-02 22:35:28,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states and 56 transitions. [2021-11-02 22:35:28,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 52. [2021-11-02 22:35:28,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 1.0576923076923077) internal successors, (55), 51 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:28,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 55 transitions. [2021-11-02 22:35:28,692 INFO L704 BuchiCegarLoop]: Abstraction has 52 states and 55 transitions. [2021-11-02 22:35:28,692 INFO L587 BuchiCegarLoop]: Abstraction has 52 states and 55 transitions. [2021-11-02 22:35:28,692 INFO L425 BuchiCegarLoop]: ======== Iteration 32============ [2021-11-02 22:35:28,692 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 52 states and 55 transitions. [2021-11-02 22:35:28,693 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:28,693 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:35:28,693 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:35:28,694 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [11, 11, 10, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:35:28,694 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:35:28,694 INFO L791 eck$LassoCheckResult]: Stem: 6079#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 6080#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 6086#L367 assume !(main_~length~0 < 1); 6081#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 6082#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 6087#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 6075#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6076#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6077#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6078#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6107#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6106#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6105#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6104#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6103#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6102#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6101#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6100#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6099#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6098#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6097#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6096#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6095#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6094#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6093#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6092#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6091#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6090#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6089#L375-3 assume !(main_~i~0 < main_~length~0); 6088#L375-4 main_~j~0 := 1; 6071#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6072#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6073#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6074#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6085#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6122#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6121#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6120#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6119#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6118#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6117#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6116#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6115#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6114#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6113#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6112#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6111#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6109#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6108#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6083#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 6084#L380-2 [2021-11-02 22:35:28,695 INFO L793 eck$LassoCheckResult]: Loop: 6084#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6110#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6084#L380-2 [2021-11-02 22:35:28,695 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:28,695 INFO L85 PathProgramCache]: Analyzing trace with hash 794785068, now seen corresponding path program 26 times [2021-11-02 22:35:28,695 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:28,696 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1309555799] [2021-11-02 22:35:28,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:28,696 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:28,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:35:29,395 INFO L134 CoverageAnalysis]: Checked inductivity of 211 backedges. 0 proven. 211 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:29,395 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:35:29,395 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1309555799] [2021-11-02 22:35:29,395 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1309555799] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:29,395 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1162063569] [2021-11-02 22:35:29,395 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-11-02 22:35:29,395 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:35:29,396 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:35:29,397 INFO L229 MonitoredProcess]: Starting monitored process 51 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:35:29,398 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (51)] Waiting until timeout for monitored process [2021-11-02 22:35:30,137 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-11-02 22:35:30,138 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:35:30,140 INFO L263 TraceCheckSpWp]: Trace formula consists of 293 conjuncts, 48 conjunts are in the unsatisfiable core [2021-11-02 22:35:30,141 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:35:30,307 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:35:30,356 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 35 [2021-11-02 22:35:30,374 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:35:30,375 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 42 [2021-11-02 22:35:31,108 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:35:31,108 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:35:31,112 INFO L134 CoverageAnalysis]: Checked inductivity of 211 backedges. 0 proven. 211 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:31,112 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1162063569] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:31,113 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:35:31,113 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26] total 36 [2021-11-02 22:35:31,113 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1612871163] [2021-11-02 22:35:31,113 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:35:31,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:31,113 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 31 times [2021-11-02 22:35:31,114 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:31,114 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [238349592] [2021-11-02 22:35:31,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:31,114 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:31,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:31,122 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:35:31,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:31,125 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:35:31,203 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:35:31,203 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2021-11-02 22:35:31,204 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=1238, Unknown=0, NotChecked=0, Total=1332 [2021-11-02 22:35:31,204 INFO L87 Difference]: Start difference. First operand 52 states and 55 transitions. cyclomatic complexity: 6 Second operand has 37 states, 36 states have (on average 2.0) internal successors, (72), 37 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:32,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:35:32,013 INFO L93 Difference]: Finished difference Result 81 states and 87 transitions. [2021-11-02 22:35:32,014 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2021-11-02 22:35:32,014 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 81 states and 87 transitions. [2021-11-02 22:35:32,015 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:35:32,015 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 81 states to 80 states and 86 transitions. [2021-11-02 22:35:32,015 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:35:32,016 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:35:32,016 INFO L73 IsDeterministic]: Start isDeterministic. Operand 80 states and 86 transitions. [2021-11-02 22:35:32,016 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:35:32,016 INFO L681 BuchiCegarLoop]: Abstraction has 80 states and 86 transitions. [2021-11-02 22:35:32,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states and 86 transitions. [2021-11-02 22:35:32,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 58. [2021-11-02 22:35:32,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 58 states, 58 states have (on average 1.0689655172413792) internal successors, (62), 57 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:32,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 62 transitions. [2021-11-02 22:35:32,019 INFO L704 BuchiCegarLoop]: Abstraction has 58 states and 62 transitions. [2021-11-02 22:35:32,019 INFO L587 BuchiCegarLoop]: Abstraction has 58 states and 62 transitions. [2021-11-02 22:35:32,019 INFO L425 BuchiCegarLoop]: ======== Iteration 33============ [2021-11-02 22:35:32,019 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 58 states and 62 transitions. [2021-11-02 22:35:32,020 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:32,020 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:35:32,020 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:35:32,021 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [11, 11, 11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:35:32,021 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:35:32,022 INFO L791 eck$LassoCheckResult]: Stem: 6398#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 6399#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 6409#L367 assume !(main_~length~0 < 1); 6400#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 6401#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 6410#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 6402#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6403#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6404#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6405#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6432#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6431#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6430#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6429#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6428#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6427#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6426#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6425#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6424#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6423#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6422#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6421#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6420#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6419#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6418#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6417#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6416#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6415#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6413#L375-3 assume !(main_~i~0 < main_~length~0); 6411#L375-4 main_~j~0 := 1; 6412#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6450#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6397#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6396#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6408#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6449#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6448#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6447#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6446#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6445#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6444#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6443#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6442#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6441#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6440#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6439#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6438#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6437#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6436#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6434#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6433#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6406#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 6407#L380-2 [2021-11-02 22:35:32,022 INFO L793 eck$LassoCheckResult]: Loop: 6407#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6435#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6407#L380-2 [2021-11-02 22:35:32,022 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:32,022 INFO L85 PathProgramCache]: Analyzing trace with hash -715728785, now seen corresponding path program 27 times [2021-11-02 22:35:32,023 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:32,023 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [315443607] [2021-11-02 22:35:32,023 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:32,023 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:32,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:35:32,347 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 91 proven. 140 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:32,347 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:35:32,347 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [315443607] [2021-11-02 22:35:32,347 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [315443607] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:32,347 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1018748394] [2021-11-02 22:35:32,347 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-02 22:35:32,347 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:35:32,348 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:35:32,349 INFO L229 MonitoredProcess]: Starting monitored process 52 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:35:32,350 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Waiting until timeout for monitored process [2021-11-02 22:35:33,407 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2021-11-02 22:35:33,407 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:35:33,411 INFO L263 TraceCheckSpWp]: Trace formula consists of 308 conjuncts, 25 conjunts are in the unsatisfiable core [2021-11-02 22:35:33,413 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:35:34,056 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 110 proven. 121 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:34,056 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1018748394] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:34,056 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:35:34,056 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26] total 38 [2021-11-02 22:35:34,057 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1586839274] [2021-11-02 22:35:34,057 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:35:34,058 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:34,058 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 32 times [2021-11-02 22:35:34,058 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:34,058 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [691229919] [2021-11-02 22:35:34,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:34,058 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:34,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:34,074 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:35:34,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:34,078 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:35:34,166 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:35:34,167 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2021-11-02 22:35:34,168 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=319, Invalid=1087, Unknown=0, NotChecked=0, Total=1406 [2021-11-02 22:35:34,168 INFO L87 Difference]: Start difference. First operand 58 states and 62 transitions. cyclomatic complexity: 7 Second operand has 38 states, 38 states have (on average 2.026315789473684) internal successors, (77), 38 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:34,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:35:34,546 INFO L93 Difference]: Finished difference Result 77 states and 80 transitions. [2021-11-02 22:35:34,547 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2021-11-02 22:35:34,548 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 77 states and 80 transitions. [2021-11-02 22:35:34,549 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:34,550 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 77 states to 55 states and 58 transitions. [2021-11-02 22:35:34,550 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:35:34,550 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:35:34,551 INFO L73 IsDeterministic]: Start isDeterministic. Operand 55 states and 58 transitions. [2021-11-02 22:35:34,551 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:35:34,551 INFO L681 BuchiCegarLoop]: Abstraction has 55 states and 58 transitions. [2021-11-02 22:35:34,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states and 58 transitions. [2021-11-02 22:35:34,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 54. [2021-11-02 22:35:34,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 54 states, 54 states have (on average 1.0555555555555556) internal successors, (57), 53 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:34,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 57 transitions. [2021-11-02 22:35:34,554 INFO L704 BuchiCegarLoop]: Abstraction has 54 states and 57 transitions. [2021-11-02 22:35:34,554 INFO L587 BuchiCegarLoop]: Abstraction has 54 states and 57 transitions. [2021-11-02 22:35:34,554 INFO L425 BuchiCegarLoop]: ======== Iteration 34============ [2021-11-02 22:35:34,555 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 54 states and 57 transitions. [2021-11-02 22:35:34,555 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:34,555 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:35:34,556 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:35:34,556 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [12, 12, 10, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:35:34,557 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:35:34,557 INFO L791 eck$LassoCheckResult]: Stem: 6756#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 6757#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 6762#L367 assume !(main_~length~0 < 1); 6758#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 6759#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 6763#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 6752#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6753#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6754#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6755#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6765#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6801#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6800#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6799#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6798#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6797#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6796#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6795#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6794#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6793#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6792#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6791#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6790#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6789#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6788#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6787#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6786#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6785#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6784#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 6767#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 6766#L375-3 assume !(main_~i~0 < main_~length~0); 6764#L375-4 main_~j~0 := 1; 6748#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6749#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6750#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6751#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6783#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6782#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6781#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6780#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6779#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6778#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6777#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6776#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6775#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6774#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6773#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6772#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6771#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6770#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6769#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6760#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 6761#L380-2 [2021-11-02 22:35:34,557 INFO L793 eck$LassoCheckResult]: Loop: 6761#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 6768#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 6761#L380-2 [2021-11-02 22:35:34,558 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:34,558 INFO L85 PathProgramCache]: Analyzing trace with hash 512141966, now seen corresponding path program 28 times [2021-11-02 22:35:34,558 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:34,559 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1083327827] [2021-11-02 22:35:34,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:34,559 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:34,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:35:35,292 INFO L134 CoverageAnalysis]: Checked inductivity of 234 backedges. 0 proven. 234 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:35,293 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:35:35,293 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1083327827] [2021-11-02 22:35:35,293 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1083327827] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:35,293 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1830688347] [2021-11-02 22:35:35,293 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-11-02 22:35:35,293 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:35:35,293 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:35:35,296 INFO L229 MonitoredProcess]: Starting monitored process 53 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:35:35,297 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Waiting until timeout for monitored process [2021-11-02 22:35:36,298 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-11-02 22:35:36,299 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:35:36,302 INFO L263 TraceCheckSpWp]: Trace formula consists of 303 conjuncts, 53 conjunts are in the unsatisfiable core [2021-11-02 22:35:36,303 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:35:36,459 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:35:36,504 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 29 [2021-11-02 22:35:36,515 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:35:36,516 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 36 [2021-11-02 22:35:36,618 INFO L354 Elim1Store]: treesize reduction 80, result has 20.8 percent of original size [2021-11-02 22:35:36,618 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 46 treesize of output 48 [2021-11-02 22:35:37,254 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:35:37,254 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:35:37,257 INFO L134 CoverageAnalysis]: Checked inductivity of 234 backedges. 0 proven. 234 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:37,258 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1830688347] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:37,258 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:35:37,258 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 28] total 38 [2021-11-02 22:35:37,258 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [772574128] [2021-11-02 22:35:37,259 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:35:37,259 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:37,259 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 33 times [2021-11-02 22:35:37,259 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:37,259 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [80451922] [2021-11-02 22:35:37,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:37,260 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:37,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:37,267 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:35:37,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:37,269 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:35:37,335 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:35:37,336 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2021-11-02 22:35:37,336 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=1381, Unknown=0, NotChecked=0, Total=1482 [2021-11-02 22:35:37,337 INFO L87 Difference]: Start difference. First operand 54 states and 57 transitions. cyclomatic complexity: 6 Second operand has 39 states, 38 states have (on average 1.9736842105263157) internal successors, (75), 39 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:38,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:35:38,730 INFO L93 Difference]: Finished difference Result 58 states and 61 transitions. [2021-11-02 22:35:38,731 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2021-11-02 22:35:38,731 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 58 states and 61 transitions. [2021-11-02 22:35:38,732 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:38,732 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 58 states to 57 states and 60 transitions. [2021-11-02 22:35:38,733 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:35:38,733 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:35:38,733 INFO L73 IsDeterministic]: Start isDeterministic. Operand 57 states and 60 transitions. [2021-11-02 22:35:38,733 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:35:38,733 INFO L681 BuchiCegarLoop]: Abstraction has 57 states and 60 transitions. [2021-11-02 22:35:38,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states and 60 transitions. [2021-11-02 22:35:38,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 56. [2021-11-02 22:35:38,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 56 states, 56 states have (on average 1.0535714285714286) internal successors, (59), 55 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:38,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 59 transitions. [2021-11-02 22:35:38,736 INFO L704 BuchiCegarLoop]: Abstraction has 56 states and 59 transitions. [2021-11-02 22:35:38,736 INFO L587 BuchiCegarLoop]: Abstraction has 56 states and 59 transitions. [2021-11-02 22:35:38,736 INFO L425 BuchiCegarLoop]: ======== Iteration 35============ [2021-11-02 22:35:38,736 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 56 states and 59 transitions. [2021-11-02 22:35:38,737 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:38,737 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:35:38,737 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:35:38,738 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [12, 12, 11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:35:38,738 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:35:38,739 INFO L791 eck$LassoCheckResult]: Stem: 7083#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 7084#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 7094#L367 assume !(main_~length~0 < 1); 7085#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 7086#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 7095#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 7087#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7088#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7089#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7090#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7117#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7116#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7115#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7114#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7113#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7112#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7111#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7110#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7109#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7108#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7107#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7106#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7105#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7104#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7103#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7102#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7101#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7100#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7099#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7098#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7097#L375-3 assume !(main_~i~0 < main_~length~0); 7096#L375-4 main_~j~0 := 1; 7079#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7080#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7081#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7082#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7093#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7134#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7133#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7132#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7131#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7130#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7129#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7128#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7127#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7126#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7125#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7124#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7123#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7122#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7121#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7120#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7119#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7091#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 7092#L380-2 [2021-11-02 22:35:38,739 INFO L793 eck$LassoCheckResult]: Loop: 7092#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7118#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7092#L380-2 [2021-11-02 22:35:38,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:38,739 INFO L85 PathProgramCache]: Analyzing trace with hash -1752810159, now seen corresponding path program 29 times [2021-11-02 22:35:38,740 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:38,740 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [99637409] [2021-11-02 22:35:38,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:38,740 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:38,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:35:39,565 INFO L134 CoverageAnalysis]: Checked inductivity of 254 backedges. 0 proven. 254 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:39,565 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:35:39,565 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [99637409] [2021-11-02 22:35:39,565 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [99637409] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:39,566 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1969367178] [2021-11-02 22:35:39,566 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-02 22:35:39,566 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:35:39,566 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:35:39,573 INFO L229 MonitoredProcess]: Starting monitored process 54 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:35:39,593 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Waiting until timeout for monitored process [2021-11-02 22:35:40,588 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 13 check-sat command(s) [2021-11-02 22:35:40,588 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:35:40,592 INFO L263 TraceCheckSpWp]: Trace formula consists of 318 conjuncts, 52 conjunts are in the unsatisfiable core [2021-11-02 22:35:40,594 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:35:40,750 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:35:40,804 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 35 [2021-11-02 22:35:40,817 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:35:40,817 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 42 [2021-11-02 22:35:41,589 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:35:41,590 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:35:41,593 INFO L134 CoverageAnalysis]: Checked inductivity of 254 backedges. 0 proven. 254 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:41,593 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1969367178] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:41,594 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:35:41,594 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28] total 39 [2021-11-02 22:35:41,595 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1196075006] [2021-11-02 22:35:41,595 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:35:41,595 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:41,595 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 34 times [2021-11-02 22:35:41,596 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:41,596 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2043253765] [2021-11-02 22:35:41,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:41,596 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:41,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:41,605 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:35:41,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:41,608 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:35:41,693 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:35:41,694 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2021-11-02 22:35:41,695 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=1458, Unknown=0, NotChecked=0, Total=1560 [2021-11-02 22:35:41,695 INFO L87 Difference]: Start difference. First operand 56 states and 59 transitions. cyclomatic complexity: 6 Second operand has 40 states, 39 states have (on average 2.0) internal successors, (78), 40 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:42,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:35:42,743 INFO L93 Difference]: Finished difference Result 87 states and 93 transitions. [2021-11-02 22:35:42,744 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2021-11-02 22:35:42,744 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 87 states and 93 transitions. [2021-11-02 22:35:42,744 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:35:42,745 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 87 states to 86 states and 92 transitions. [2021-11-02 22:35:42,745 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:35:42,745 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:35:42,745 INFO L73 IsDeterministic]: Start isDeterministic. Operand 86 states and 92 transitions. [2021-11-02 22:35:42,746 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:35:42,746 INFO L681 BuchiCegarLoop]: Abstraction has 86 states and 92 transitions. [2021-11-02 22:35:42,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states and 92 transitions. [2021-11-02 22:35:42,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 62. [2021-11-02 22:35:42,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 62 states have (on average 1.064516129032258) internal successors, (66), 61 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:42,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 66 transitions. [2021-11-02 22:35:42,748 INFO L704 BuchiCegarLoop]: Abstraction has 62 states and 66 transitions. [2021-11-02 22:35:42,748 INFO L587 BuchiCegarLoop]: Abstraction has 62 states and 66 transitions. [2021-11-02 22:35:42,748 INFO L425 BuchiCegarLoop]: ======== Iteration 36============ [2021-11-02 22:35:42,748 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 62 states and 66 transitions. [2021-11-02 22:35:42,748 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:42,749 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:35:42,749 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:35:42,749 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [12, 12, 12, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:35:42,750 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:35:42,750 INFO L791 eck$LassoCheckResult]: Stem: 7431#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 7432#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 7442#L367 assume !(main_~length~0 < 1); 7433#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 7434#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 7443#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 7435#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7436#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7437#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7438#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7467#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7466#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7465#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7464#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7463#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7462#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7461#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7460#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7459#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7458#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7457#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7456#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7455#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7454#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7453#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7452#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7451#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7450#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7449#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7448#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7446#L375-3 assume !(main_~i~0 < main_~length~0); 7444#L375-4 main_~j~0 := 1; 7445#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7487#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7430#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7429#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7441#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7486#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7485#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7484#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7483#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7482#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7481#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7480#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7479#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7478#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7477#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7476#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7475#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7474#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7473#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7472#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7471#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7470#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7469#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7439#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 7440#L380-2 [2021-11-02 22:35:42,750 INFO L793 eck$LassoCheckResult]: Loop: 7440#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7468#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7440#L380-2 [2021-11-02 22:35:42,750 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:42,750 INFO L85 PathProgramCache]: Analyzing trace with hash -823383212, now seen corresponding path program 30 times [2021-11-02 22:35:42,751 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:42,751 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [691834538] [2021-11-02 22:35:42,751 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:42,751 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:42,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:35:43,213 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 111 proven. 165 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:43,214 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:35:43,214 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [691834538] [2021-11-02 22:35:43,214 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [691834538] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:43,214 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [311867523] [2021-11-02 22:35:43,215 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-11-02 22:35:43,215 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:35:43,215 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:35:43,221 INFO L229 MonitoredProcess]: Starting monitored process 55 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:35:43,244 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Waiting until timeout for monitored process [2021-11-02 22:35:44,860 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2021-11-02 22:35:44,861 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:35:44,865 INFO L263 TraceCheckSpWp]: Trace formula consists of 333 conjuncts, 27 conjunts are in the unsatisfiable core [2021-11-02 22:35:44,867 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:35:45,452 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 132 proven. 144 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:45,452 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [311867523] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:45,452 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:35:45,452 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28] total 41 [2021-11-02 22:35:45,452 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [191442780] [2021-11-02 22:35:45,453 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:35:45,453 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:45,453 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 35 times [2021-11-02 22:35:45,453 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:45,453 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1846184301] [2021-11-02 22:35:45,453 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:45,454 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:45,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:45,465 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:35:45,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:45,468 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:35:45,546 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:35:45,547 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2021-11-02 22:35:45,548 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=371, Invalid=1269, Unknown=0, NotChecked=0, Total=1640 [2021-11-02 22:35:45,548 INFO L87 Difference]: Start difference. First operand 62 states and 66 transitions. cyclomatic complexity: 7 Second operand has 41 states, 41 states have (on average 2.024390243902439) internal successors, (83), 41 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:45,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:35:45,907 INFO L93 Difference]: Finished difference Result 83 states and 86 transitions. [2021-11-02 22:35:45,908 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2021-11-02 22:35:45,908 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 83 states and 86 transitions. [2021-11-02 22:35:45,908 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:45,909 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 83 states to 59 states and 62 transitions. [2021-11-02 22:35:45,909 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:35:45,909 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:35:45,909 INFO L73 IsDeterministic]: Start isDeterministic. Operand 59 states and 62 transitions. [2021-11-02 22:35:45,909 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:35:45,909 INFO L681 BuchiCegarLoop]: Abstraction has 59 states and 62 transitions. [2021-11-02 22:35:45,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states and 62 transitions. [2021-11-02 22:35:45,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 58. [2021-11-02 22:35:45,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 58 states, 58 states have (on average 1.0517241379310345) internal successors, (61), 57 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:45,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 61 transitions. [2021-11-02 22:35:45,914 INFO L704 BuchiCegarLoop]: Abstraction has 58 states and 61 transitions. [2021-11-02 22:35:45,915 INFO L587 BuchiCegarLoop]: Abstraction has 58 states and 61 transitions. [2021-11-02 22:35:45,915 INFO L425 BuchiCegarLoop]: ======== Iteration 37============ [2021-11-02 22:35:45,915 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 58 states and 61 transitions. [2021-11-02 22:35:45,915 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:45,916 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:35:45,916 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:35:45,917 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [13, 13, 11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:35:45,917 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:35:45,917 INFO L791 eck$LassoCheckResult]: Stem: 7812#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 7813#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 7822#L367 assume !(main_~length~0 < 1); 7814#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 7815#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 7823#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 7816#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7817#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7818#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7819#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7825#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7865#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7864#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7863#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7862#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7861#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7860#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7859#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7858#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7857#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7856#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7855#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7854#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7853#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7852#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7851#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7850#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7849#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7848#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7847#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7846#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 7827#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 7826#L375-3 assume !(main_~i~0 < main_~length~0); 7824#L375-4 main_~j~0 := 1; 7808#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7809#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7810#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7811#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7845#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7844#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7843#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7842#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7841#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7840#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7839#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7838#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7837#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7836#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7835#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7834#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7833#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7832#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7831#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7829#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7828#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7820#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 7821#L380-2 [2021-11-02 22:35:45,917 INFO L793 eck$LassoCheckResult]: Loop: 7821#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 7830#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 7821#L380-2 [2021-11-02 22:35:45,918 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:45,918 INFO L85 PathProgramCache]: Analyzing trace with hash -1955597901, now seen corresponding path program 31 times [2021-11-02 22:35:45,918 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:45,918 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1079224302] [2021-11-02 22:35:45,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:45,919 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:46,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:35:46,851 INFO L134 CoverageAnalysis]: Checked inductivity of 279 backedges. 0 proven. 279 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:46,852 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:35:46,852 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1079224302] [2021-11-02 22:35:46,852 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1079224302] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:46,852 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [857417648] [2021-11-02 22:35:46,852 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-02 22:35:46,852 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:35:46,853 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:35:46,858 INFO L229 MonitoredProcess]: Starting monitored process 56 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:35:46,877 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (56)] Waiting until timeout for monitored process [2021-11-02 22:35:47,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:35:47,802 INFO L263 TraceCheckSpWp]: Trace formula consists of 328 conjuncts, 58 conjunts are in the unsatisfiable core [2021-11-02 22:35:47,803 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:35:48,381 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:35:48,507 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:35:48,508 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 29 [2021-11-02 22:35:48,653 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:35:48,669 INFO L354 Elim1Store]: treesize reduction 60, result has 24.1 percent of original size [2021-11-02 22:35:48,669 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 36 treesize of output 38 [2021-11-02 22:35:49,847 INFO L354 Elim1Store]: treesize reduction 52, result has 11.9 percent of original size [2021-11-02 22:35:49,848 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 40 treesize of output 24 [2021-11-02 22:35:49,852 INFO L134 CoverageAnalysis]: Checked inductivity of 279 backedges. 0 proven. 279 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:49,852 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [857417648] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:49,852 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:35:49,852 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 31] total 58 [2021-11-02 22:35:49,853 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1657416087] [2021-11-02 22:35:49,853 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:35:49,853 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:49,853 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 36 times [2021-11-02 22:35:49,853 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:49,853 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [714986965] [2021-11-02 22:35:49,854 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:49,854 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:49,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:49,862 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:35:49,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:49,864 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:35:49,931 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:35:49,931 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2021-11-02 22:35:49,933 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=206, Invalid=3216, Unknown=0, NotChecked=0, Total=3422 [2021-11-02 22:35:49,933 INFO L87 Difference]: Start difference. First operand 58 states and 61 transitions. cyclomatic complexity: 6 Second operand has 59 states, 58 states have (on average 1.8620689655172413) internal successors, (108), 59 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:51,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:35:51,589 INFO L93 Difference]: Finished difference Result 62 states and 65 transitions. [2021-11-02 22:35:51,590 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2021-11-02 22:35:51,590 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 62 states and 65 transitions. [2021-11-02 22:35:51,590 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:51,591 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 62 states to 61 states and 64 transitions. [2021-11-02 22:35:51,591 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:35:51,591 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:35:51,591 INFO L73 IsDeterministic]: Start isDeterministic. Operand 61 states and 64 transitions. [2021-11-02 22:35:51,591 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:35:51,591 INFO L681 BuchiCegarLoop]: Abstraction has 61 states and 64 transitions. [2021-11-02 22:35:51,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states and 64 transitions. [2021-11-02 22:35:51,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 60. [2021-11-02 22:35:51,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 60 states, 60 states have (on average 1.05) internal successors, (63), 59 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:51,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 63 transitions. [2021-11-02 22:35:51,594 INFO L704 BuchiCegarLoop]: Abstraction has 60 states and 63 transitions. [2021-11-02 22:35:51,594 INFO L587 BuchiCegarLoop]: Abstraction has 60 states and 63 transitions. [2021-11-02 22:35:51,594 INFO L425 BuchiCegarLoop]: ======== Iteration 38============ [2021-11-02 22:35:51,594 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 60 states and 63 transitions. [2021-11-02 22:35:51,595 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:51,595 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:35:51,595 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:35:51,596 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [13, 13, 12, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:35:51,596 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:35:51,596 INFO L791 eck$LassoCheckResult]: Stem: 8185#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 8186#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 8196#L367 assume !(main_~length~0 < 1); 8187#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 8188#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 8197#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 8189#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8190#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8191#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8192#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8221#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8220#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8219#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8218#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8217#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8216#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8215#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8214#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8213#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8212#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8211#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8210#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8209#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8208#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8207#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8206#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8205#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8204#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8203#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8202#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8201#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8200#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8199#L375-3 assume !(main_~i~0 < main_~length~0); 8198#L375-4 main_~j~0 := 1; 8181#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8182#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8183#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8184#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8195#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8240#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8239#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8238#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8237#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8236#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8235#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8234#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8233#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8232#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8231#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8230#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8229#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8228#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8227#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8226#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8225#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8224#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8223#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8193#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 8194#L380-2 [2021-11-02 22:35:51,597 INFO L793 eck$LassoCheckResult]: Loop: 8194#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8222#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8194#L380-2 [2021-11-02 22:35:51,597 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:51,597 INFO L85 PathProgramCache]: Analyzing trace with hash 1866092342, now seen corresponding path program 32 times [2021-11-02 22:35:51,598 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:51,598 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [127004129] [2021-11-02 22:35:51,598 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:51,598 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:51,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:35:52,531 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:52,532 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:35:52,532 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [127004129] [2021-11-02 22:35:52,532 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [127004129] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:52,532 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1843370940] [2021-11-02 22:35:52,532 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-11-02 22:35:52,533 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:35:52,533 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:35:52,538 INFO L229 MonitoredProcess]: Starting monitored process 57 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:35:52,557 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (57)] Waiting until timeout for monitored process [2021-11-02 22:35:53,882 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-11-02 22:35:53,883 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:35:53,885 INFO L263 TraceCheckSpWp]: Trace formula consists of 343 conjuncts, 56 conjunts are in the unsatisfiable core [2021-11-02 22:35:53,887 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:35:54,093 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:35:54,149 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 35 [2021-11-02 22:35:54,161 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:35:54,162 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 42 [2021-11-02 22:35:55,008 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:35:55,009 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:35:55,013 INFO L134 CoverageAnalysis]: Checked inductivity of 301 backedges. 0 proven. 301 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:55,013 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1843370940] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:55,013 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:35:55,013 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30] total 42 [2021-11-02 22:35:55,014 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1397914669] [2021-11-02 22:35:55,014 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:35:55,014 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:55,014 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 37 times [2021-11-02 22:35:55,014 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:55,014 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1555266915] [2021-11-02 22:35:55,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:55,015 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:55,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:55,023 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:35:55,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:55,026 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:35:55,095 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:35:55,096 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2021-11-02 22:35:55,097 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=1696, Unknown=0, NotChecked=0, Total=1806 [2021-11-02 22:35:55,097 INFO L87 Difference]: Start difference. First operand 60 states and 63 transitions. cyclomatic complexity: 6 Second operand has 43 states, 42 states have (on average 2.0) internal successors, (84), 43 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:56,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:35:56,218 INFO L93 Difference]: Finished difference Result 93 states and 99 transitions. [2021-11-02 22:35:56,218 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2021-11-02 22:35:56,219 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 93 states and 99 transitions. [2021-11-02 22:35:56,219 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:35:56,220 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 93 states to 92 states and 98 transitions. [2021-11-02 22:35:56,220 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:35:56,220 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:35:56,220 INFO L73 IsDeterministic]: Start isDeterministic. Operand 92 states and 98 transitions. [2021-11-02 22:35:56,220 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:35:56,220 INFO L681 BuchiCegarLoop]: Abstraction has 92 states and 98 transitions. [2021-11-02 22:35:56,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states and 98 transitions. [2021-11-02 22:35:56,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 66. [2021-11-02 22:35:56,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 66 states have (on average 1.0606060606060606) internal successors, (70), 65 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:56,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 70 transitions. [2021-11-02 22:35:56,222 INFO L704 BuchiCegarLoop]: Abstraction has 66 states and 70 transitions. [2021-11-02 22:35:56,222 INFO L587 BuchiCegarLoop]: Abstraction has 66 states and 70 transitions. [2021-11-02 22:35:56,222 INFO L425 BuchiCegarLoop]: ======== Iteration 39============ [2021-11-02 22:35:56,222 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 66 states and 70 transitions. [2021-11-02 22:35:56,223 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:56,223 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:35:56,223 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:35:56,223 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [13, 13, 13, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:35:56,223 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:35:56,224 INFO L791 eck$LassoCheckResult]: Stem: 8558#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 8559#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 8569#L367 assume !(main_~length~0 < 1); 8560#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 8561#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 8570#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 8562#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8563#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8564#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8565#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8596#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8595#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8594#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8593#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8592#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8591#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8590#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8589#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8588#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8587#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8586#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8585#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8584#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8583#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8582#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8581#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8580#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8579#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8578#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8577#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8576#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8575#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8573#L375-3 assume !(main_~i~0 < main_~length~0); 8571#L375-4 main_~j~0 := 1; 8572#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8618#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8557#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8556#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8568#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8617#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8616#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8615#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8614#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8613#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8612#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8611#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8610#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8609#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8608#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8607#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8606#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8605#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8604#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8603#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8602#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8601#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8600#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8598#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8597#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8566#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 8567#L380-2 [2021-11-02 22:35:56,224 INFO L793 eck$LassoCheckResult]: Loop: 8567#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8599#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8567#L380-2 [2021-11-02 22:35:56,224 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:56,224 INFO L85 PathProgramCache]: Analyzing trace with hash -1981589511, now seen corresponding path program 33 times [2021-11-02 22:35:56,224 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:56,224 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [780330581] [2021-11-02 22:35:56,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:56,224 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:56,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:35:56,770 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 133 proven. 192 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:56,771 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:35:56,771 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [780330581] [2021-11-02 22:35:56,771 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [780330581] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:56,771 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1907548788] [2021-11-02 22:35:56,771 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-02 22:35:56,771 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:35:56,772 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:35:56,777 INFO L229 MonitoredProcess]: Starting monitored process 58 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:35:56,797 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (58)] Waiting until timeout for monitored process [2021-11-02 22:35:58,332 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 14 check-sat command(s) [2021-11-02 22:35:58,332 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:35:58,337 INFO L263 TraceCheckSpWp]: Trace formula consists of 358 conjuncts, 29 conjunts are in the unsatisfiable core [2021-11-02 22:35:58,339 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:35:59,055 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 156 proven. 169 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:35:59,056 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1907548788] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:35:59,056 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:35:59,056 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30] total 44 [2021-11-02 22:35:59,057 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1716697603] [2021-11-02 22:35:59,057 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:35:59,057 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:59,058 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 38 times [2021-11-02 22:35:59,058 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:59,058 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [458351478] [2021-11-02 22:35:59,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:59,058 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:59,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:59,074 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:35:59,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:35:59,076 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:35:59,152 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:35:59,153 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2021-11-02 22:35:59,154 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=427, Invalid=1465, Unknown=0, NotChecked=0, Total=1892 [2021-11-02 22:35:59,154 INFO L87 Difference]: Start difference. First operand 66 states and 70 transitions. cyclomatic complexity: 7 Second operand has 44 states, 44 states have (on average 2.022727272727273) internal successors, (89), 44 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:59,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:35:59,589 INFO L93 Difference]: Finished difference Result 89 states and 92 transitions. [2021-11-02 22:35:59,590 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2021-11-02 22:35:59,590 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 89 states and 92 transitions. [2021-11-02 22:35:59,591 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:59,592 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 89 states to 63 states and 66 transitions. [2021-11-02 22:35:59,592 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:35:59,592 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:35:59,592 INFO L73 IsDeterministic]: Start isDeterministic. Operand 63 states and 66 transitions. [2021-11-02 22:35:59,593 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:35:59,593 INFO L681 BuchiCegarLoop]: Abstraction has 63 states and 66 transitions. [2021-11-02 22:35:59,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states and 66 transitions. [2021-11-02 22:35:59,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 62. [2021-11-02 22:35:59,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 62 states have (on average 1.0483870967741935) internal successors, (65), 61 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:35:59,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 65 transitions. [2021-11-02 22:35:59,595 INFO L704 BuchiCegarLoop]: Abstraction has 62 states and 65 transitions. [2021-11-02 22:35:59,595 INFO L587 BuchiCegarLoop]: Abstraction has 62 states and 65 transitions. [2021-11-02 22:35:59,595 INFO L425 BuchiCegarLoop]: ======== Iteration 40============ [2021-11-02 22:35:59,595 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 62 states and 65 transitions. [2021-11-02 22:35:59,596 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:35:59,596 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:35:59,596 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:35:59,597 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [14, 14, 12, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:35:59,597 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:35:59,597 INFO L791 eck$LassoCheckResult]: Stem: 8966#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 8967#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 8976#L367 assume !(main_~length~0 < 1); 8968#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 8969#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 8977#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 8970#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8971#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8972#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8973#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8979#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9023#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9022#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9021#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9020#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9019#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9018#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9017#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9016#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9015#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9014#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9013#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9012#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9011#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9010#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9009#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9008#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9007#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9006#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9005#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9004#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9003#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9002#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 8981#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 8980#L375-3 assume !(main_~i~0 < main_~length~0); 8978#L375-4 main_~j~0 := 1; 8962#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8963#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8964#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8965#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9001#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9000#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8999#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8998#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8997#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8996#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8995#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8994#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8993#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8992#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8991#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8990#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8989#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8988#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8987#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8986#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8985#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8984#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8983#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8974#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 8975#L380-2 [2021-11-02 22:35:59,597 INFO L793 eck$LassoCheckResult]: Loop: 8975#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 8982#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 8975#L380-2 [2021-11-02 22:35:59,598 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:35:59,598 INFO L85 PathProgramCache]: Analyzing trace with hash 881787544, now seen corresponding path program 34 times [2021-11-02 22:35:59,598 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:35:59,598 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1243059055] [2021-11-02 22:35:59,598 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:35:59,599 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:35:59,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:36:00,666 INFO L134 CoverageAnalysis]: Checked inductivity of 328 backedges. 0 proven. 328 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:36:00,667 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:36:00,667 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1243059055] [2021-11-02 22:36:00,667 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1243059055] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:36:00,667 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1649584710] [2021-11-02 22:36:00,667 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-11-02 22:36:00,667 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:36:00,667 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:36:00,669 INFO L229 MonitoredProcess]: Starting monitored process 59 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:36:00,670 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (59)] Waiting until timeout for monitored process [2021-11-02 22:36:02,053 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-11-02 22:36:02,053 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:36:02,057 INFO L263 TraceCheckSpWp]: Trace formula consists of 353 conjuncts, 61 conjunts are in the unsatisfiable core [2021-11-02 22:36:02,059 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:36:02,234 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:36:02,305 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 29 [2021-11-02 22:36:02,315 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:36:02,315 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 36 [2021-11-02 22:36:02,430 INFO L354 Elim1Store]: treesize reduction 80, result has 20.8 percent of original size [2021-11-02 22:36:02,430 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 46 treesize of output 48 [2021-11-02 22:36:03,256 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:36:03,256 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:36:03,260 INFO L134 CoverageAnalysis]: Checked inductivity of 328 backedges. 0 proven. 328 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:36:03,260 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1649584710] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:36:03,260 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:36:03,261 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 32] total 44 [2021-11-02 22:36:03,261 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [986424898] [2021-11-02 22:36:03,261 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:36:03,261 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:36:03,262 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 39 times [2021-11-02 22:36:03,262 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:36:03,262 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1906627397] [2021-11-02 22:36:03,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:36:03,262 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:36:03,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:36:03,272 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:36:03,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:36:03,275 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:36:03,355 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:36:03,355 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2021-11-02 22:36:03,356 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=1863, Unknown=0, NotChecked=0, Total=1980 [2021-11-02 22:36:03,356 INFO L87 Difference]: Start difference. First operand 62 states and 65 transitions. cyclomatic complexity: 6 Second operand has 45 states, 44 states have (on average 1.9772727272727273) internal successors, (87), 45 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:36:05,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:36:05,090 INFO L93 Difference]: Finished difference Result 66 states and 69 transitions. [2021-11-02 22:36:05,090 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2021-11-02 22:36:05,091 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 66 states and 69 transitions. [2021-11-02 22:36:05,091 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:36:05,091 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 66 states to 65 states and 68 transitions. [2021-11-02 22:36:05,091 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:36:05,092 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:36:05,092 INFO L73 IsDeterministic]: Start isDeterministic. Operand 65 states and 68 transitions. [2021-11-02 22:36:05,092 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:36:05,092 INFO L681 BuchiCegarLoop]: Abstraction has 65 states and 68 transitions. [2021-11-02 22:36:05,092 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states and 68 transitions. [2021-11-02 22:36:05,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 64. [2021-11-02 22:36:05,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 64 states, 64 states have (on average 1.046875) internal successors, (67), 63 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:36:05,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 67 transitions. [2021-11-02 22:36:05,094 INFO L704 BuchiCegarLoop]: Abstraction has 64 states and 67 transitions. [2021-11-02 22:36:05,094 INFO L587 BuchiCegarLoop]: Abstraction has 64 states and 67 transitions. [2021-11-02 22:36:05,094 INFO L425 BuchiCegarLoop]: ======== Iteration 41============ [2021-11-02 22:36:05,094 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 64 states and 67 transitions. [2021-11-02 22:36:05,094 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:36:05,094 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:36:05,094 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:36:05,095 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [14, 14, 13, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:36:05,095 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:36:05,095 INFO L791 eck$LassoCheckResult]: Stem: 9347#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 9348#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 9358#L367 assume !(main_~length~0 < 1); 9349#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 9350#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 9359#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 9351#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9352#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9353#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9354#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9385#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9384#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9383#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9382#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9381#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9380#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9379#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9378#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9377#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9376#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9375#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9374#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9373#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9372#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9371#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9370#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9369#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9368#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9367#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9366#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9365#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9364#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9363#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9362#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9361#L375-3 assume !(main_~i~0 < main_~length~0); 9360#L375-4 main_~j~0 := 1; 9343#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9344#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9345#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9346#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9357#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9406#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9405#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9404#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9403#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9402#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9401#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9400#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9399#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9398#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9397#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9396#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9395#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9394#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9393#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9392#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9391#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9390#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9389#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9388#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9387#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9355#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 9356#L380-2 [2021-11-02 22:36:05,095 INFO L793 eck$LassoCheckResult]: Loop: 9356#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9386#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9356#L380-2 [2021-11-02 22:36:05,095 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:36:05,096 INFO L85 PathProgramCache]: Analyzing trace with hash 1289272027, now seen corresponding path program 35 times [2021-11-02 22:36:05,096 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:36:05,096 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [604739709] [2021-11-02 22:36:05,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:36:05,096 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:36:05,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:36:05,956 INFO L134 CoverageAnalysis]: Checked inductivity of 352 backedges. 0 proven. 352 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:36:05,956 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:36:05,957 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [604739709] [2021-11-02 22:36:05,957 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [604739709] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:36:05,957 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [714167182] [2021-11-02 22:36:05,957 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-02 22:36:05,957 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:36:05,957 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:36:05,959 INFO L229 MonitoredProcess]: Starting monitored process 60 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:36:05,959 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (60)] Waiting until timeout for monitored process [2021-11-02 22:36:07,373 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 15 check-sat command(s) [2021-11-02 22:36:07,373 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:36:07,379 INFO L263 TraceCheckSpWp]: Trace formula consists of 368 conjuncts, 62 conjunts are in the unsatisfiable core [2021-11-02 22:36:07,381 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:36:08,406 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:36:08,579 INFO L354 Elim1Store]: treesize reduction 40, result has 23.1 percent of original size [2021-11-02 22:36:08,579 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 39 [2021-11-02 22:36:10,758 INFO L354 Elim1Store]: treesize reduction 96, result has 6.8 percent of original size [2021-11-02 22:36:10,759 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 65 treesize of output 37 [2021-11-02 22:36:10,765 INFO L134 CoverageAnalysis]: Checked inductivity of 352 backedges. 0 proven. 352 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:36:10,765 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [714167182] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:36:10,765 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:36:10,766 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 34] total 64 [2021-11-02 22:36:10,766 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2073378563] [2021-11-02 22:36:10,766 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:36:10,766 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:36:10,767 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 40 times [2021-11-02 22:36:10,767 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:36:10,767 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1552750578] [2021-11-02 22:36:10,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:36:10,767 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:36:10,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:36:10,785 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:36:10,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:36:10,788 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:36:10,864 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:36:10,864 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2021-11-02 22:36:10,866 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=222, Invalid=3938, Unknown=0, NotChecked=0, Total=4160 [2021-11-02 22:36:10,866 INFO L87 Difference]: Start difference. First operand 64 states and 67 transitions. cyclomatic complexity: 6 Second operand has 65 states, 64 states have (on average 1.875) internal successors, (120), 65 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:36:12,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:36:12,793 INFO L93 Difference]: Finished difference Result 99 states and 105 transitions. [2021-11-02 22:36:12,794 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2021-11-02 22:36:12,794 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 99 states and 105 transitions. [2021-11-02 22:36:12,795 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:36:12,796 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 99 states to 98 states and 104 transitions. [2021-11-02 22:36:12,796 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:36:12,796 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:36:12,796 INFO L73 IsDeterministic]: Start isDeterministic. Operand 98 states and 104 transitions. [2021-11-02 22:36:12,796 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:36:12,797 INFO L681 BuchiCegarLoop]: Abstraction has 98 states and 104 transitions. [2021-11-02 22:36:12,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states and 104 transitions. [2021-11-02 22:36:12,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 70. [2021-11-02 22:36:12,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 70 states, 70 states have (on average 1.0571428571428572) internal successors, (74), 69 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:36:12,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 74 transitions. [2021-11-02 22:36:12,799 INFO L704 BuchiCegarLoop]: Abstraction has 70 states and 74 transitions. [2021-11-02 22:36:12,799 INFO L587 BuchiCegarLoop]: Abstraction has 70 states and 74 transitions. [2021-11-02 22:36:12,799 INFO L425 BuchiCegarLoop]: ======== Iteration 42============ [2021-11-02 22:36:12,799 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 70 states and 74 transitions. [2021-11-02 22:36:12,799 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:36:12,799 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:36:12,800 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:36:12,800 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [14, 14, 14, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:36:12,800 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:36:12,800 INFO L791 eck$LassoCheckResult]: Stem: 9766#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 9767#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 9777#L367 assume !(main_~length~0 < 1); 9768#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 9769#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 9778#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 9770#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9771#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9772#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9773#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9806#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9805#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9804#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9803#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9802#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9801#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9800#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9799#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9798#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9797#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9796#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9795#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9794#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9793#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9792#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9791#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9790#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9789#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9788#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9787#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9786#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9785#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9784#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 9783#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 9781#L375-3 assume !(main_~i~0 < main_~length~0); 9779#L375-4 main_~j~0 := 1; 9780#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9830#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9765#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9764#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9776#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9829#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9828#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9827#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9826#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9825#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9824#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9823#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9822#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9821#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9820#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9819#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9818#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9817#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9816#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9815#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9814#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9813#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9812#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9811#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9810#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9809#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9808#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9774#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 9775#L380-2 [2021-11-02 22:36:12,800 INFO L793 eck$LassoCheckResult]: Loop: 9775#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 9807#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 9775#L380-2 [2021-11-02 22:36:12,801 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:36:12,801 INFO L85 PathProgramCache]: Analyzing trace with hash 2039836254, now seen corresponding path program 36 times [2021-11-02 22:36:12,801 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:36:12,801 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1914300303] [2021-11-02 22:36:12,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:36:12,801 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:36:12,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:36:13,337 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 157 proven. 221 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:36:13,337 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:36:13,337 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1914300303] [2021-11-02 22:36:13,337 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1914300303] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:36:13,338 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1285409222] [2021-11-02 22:36:13,338 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-11-02 22:36:13,338 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:36:13,338 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:36:13,341 INFO L229 MonitoredProcess]: Starting monitored process 61 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:36:13,342 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (61)] Waiting until timeout for monitored process [2021-11-02 22:36:15,256 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 15 check-sat command(s) [2021-11-02 22:36:15,256 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:36:15,262 INFO L263 TraceCheckSpWp]: Trace formula consists of 383 conjuncts, 31 conjunts are in the unsatisfiable core [2021-11-02 22:36:15,263 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:36:15,956 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 182 proven. 196 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:36:15,956 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1285409222] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:36:15,956 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:36:15,957 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32] total 47 [2021-11-02 22:36:15,957 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [548272850] [2021-11-02 22:36:15,957 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:36:15,957 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:36:15,957 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 41 times [2021-11-02 22:36:15,957 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:36:15,958 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [238412290] [2021-11-02 22:36:15,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:36:15,958 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:36:15,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:36:15,968 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:36:15,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:36:15,970 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:36:16,036 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:36:16,037 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2021-11-02 22:36:16,038 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=487, Invalid=1675, Unknown=0, NotChecked=0, Total=2162 [2021-11-02 22:36:16,038 INFO L87 Difference]: Start difference. First operand 70 states and 74 transitions. cyclomatic complexity: 7 Second operand has 47 states, 47 states have (on average 2.021276595744681) internal successors, (95), 47 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:36:16,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:36:16,503 INFO L93 Difference]: Finished difference Result 95 states and 98 transitions. [2021-11-02 22:36:16,503 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2021-11-02 22:36:16,503 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 95 states and 98 transitions. [2021-11-02 22:36:16,504 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:36:16,504 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 95 states to 67 states and 70 transitions. [2021-11-02 22:36:16,505 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:36:16,505 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:36:16,505 INFO L73 IsDeterministic]: Start isDeterministic. Operand 67 states and 70 transitions. [2021-11-02 22:36:16,505 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:36:16,505 INFO L681 BuchiCegarLoop]: Abstraction has 67 states and 70 transitions. [2021-11-02 22:36:16,506 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states and 70 transitions. [2021-11-02 22:36:16,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 66. [2021-11-02 22:36:16,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 66 states have (on average 1.0454545454545454) internal successors, (69), 65 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:36:16,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 69 transitions. [2021-11-02 22:36:16,508 INFO L704 BuchiCegarLoop]: Abstraction has 66 states and 69 transitions. [2021-11-02 22:36:16,508 INFO L587 BuchiCegarLoop]: Abstraction has 66 states and 69 transitions. [2021-11-02 22:36:16,508 INFO L425 BuchiCegarLoop]: ======== Iteration 43============ [2021-11-02 22:36:16,509 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 66 states and 69 transitions. [2021-11-02 22:36:16,509 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:36:16,509 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:36:16,509 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:36:16,510 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [15, 15, 13, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:36:16,510 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:36:16,511 INFO L791 eck$LassoCheckResult]: Stem: 10205#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 10206#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 10211#L367 assume !(main_~length~0 < 1); 10207#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 10208#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 10212#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 10201#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10202#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10203#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10204#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10214#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10262#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10261#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10260#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10259#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10258#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10257#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10256#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10255#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10254#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10253#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10252#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10251#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10250#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10249#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10248#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10247#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10246#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10245#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10244#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10243#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10242#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10241#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10240#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10239#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10216#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10215#L375-3 assume !(main_~i~0 < main_~length~0); 10213#L375-4 main_~j~0 := 1; 10197#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10198#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10199#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10200#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10238#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10237#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10236#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10235#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10234#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10233#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10232#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10231#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10230#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10229#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10228#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10227#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10226#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10225#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10224#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10223#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10222#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10221#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10220#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10219#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10218#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10209#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 10210#L380-2 [2021-11-02 22:36:16,511 INFO L793 eck$LassoCheckResult]: Loop: 10210#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10217#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10210#L380-2 [2021-11-02 22:36:16,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:36:16,512 INFO L85 PathProgramCache]: Analyzing trace with hash 671149373, now seen corresponding path program 37 times [2021-11-02 22:36:16,512 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:36:16,512 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1688721020] [2021-11-02 22:36:16,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:36:16,513 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:36:16,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:36:17,619 INFO L134 CoverageAnalysis]: Checked inductivity of 381 backedges. 0 proven. 381 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:36:17,619 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:36:17,620 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1688721020] [2021-11-02 22:36:17,620 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1688721020] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:36:17,620 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [891313721] [2021-11-02 22:36:17,620 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-02 22:36:17,620 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:36:17,620 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:36:17,623 INFO L229 MonitoredProcess]: Starting monitored process 62 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:36:17,645 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (62)] Waiting until timeout for monitored process [2021-11-02 22:36:18,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:36:18,938 INFO L263 TraceCheckSpWp]: Trace formula consists of 378 conjuncts, 66 conjunts are in the unsatisfiable core [2021-11-02 22:36:18,940 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:36:19,915 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:36:20,051 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:36:20,052 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 29 [2021-11-02 22:36:20,192 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:36:20,208 INFO L354 Elim1Store]: treesize reduction 60, result has 24.1 percent of original size [2021-11-02 22:36:20,209 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 36 treesize of output 38 [2021-11-02 22:36:21,647 INFO L354 Elim1Store]: treesize reduction 52, result has 11.9 percent of original size [2021-11-02 22:36:21,647 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 40 treesize of output 24 [2021-11-02 22:36:21,662 INFO L134 CoverageAnalysis]: Checked inductivity of 381 backedges. 0 proven. 381 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:36:21,663 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [891313721] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:36:21,663 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:36:21,663 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 35] total 66 [2021-11-02 22:36:21,663 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1082839651] [2021-11-02 22:36:21,664 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:36:21,664 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:36:21,664 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 42 times [2021-11-02 22:36:21,665 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:36:21,665 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1631056300] [2021-11-02 22:36:21,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:36:21,665 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:36:21,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:36:21,679 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:36:21,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:36:21,682 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:36:21,767 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:36:21,767 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 67 interpolants. [2021-11-02 22:36:21,769 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=234, Invalid=4188, Unknown=0, NotChecked=0, Total=4422 [2021-11-02 22:36:21,770 INFO L87 Difference]: Start difference. First operand 66 states and 69 transitions. cyclomatic complexity: 6 Second operand has 67 states, 66 states have (on average 1.878787878787879) internal successors, (124), 67 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:36:23,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:36:23,786 INFO L93 Difference]: Finished difference Result 70 states and 73 transitions. [2021-11-02 22:36:23,787 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2021-11-02 22:36:23,787 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 70 states and 73 transitions. [2021-11-02 22:36:23,788 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:36:23,788 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 70 states to 69 states and 72 transitions. [2021-11-02 22:36:23,789 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:36:23,789 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:36:23,789 INFO L73 IsDeterministic]: Start isDeterministic. Operand 69 states and 72 transitions. [2021-11-02 22:36:23,789 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:36:23,790 INFO L681 BuchiCegarLoop]: Abstraction has 69 states and 72 transitions. [2021-11-02 22:36:23,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states and 72 transitions. [2021-11-02 22:36:23,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 68. [2021-11-02 22:36:23,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 68 states, 68 states have (on average 1.0441176470588236) internal successors, (71), 67 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:36:23,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 71 transitions. [2021-11-02 22:36:23,792 INFO L704 BuchiCegarLoop]: Abstraction has 68 states and 71 transitions. [2021-11-02 22:36:23,793 INFO L587 BuchiCegarLoop]: Abstraction has 68 states and 71 transitions. [2021-11-02 22:36:23,793 INFO L425 BuchiCegarLoop]: ======== Iteration 44============ [2021-11-02 22:36:23,793 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 68 states and 71 transitions. [2021-11-02 22:36:23,793 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:36:23,793 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:36:23,793 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:36:23,794 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [15, 15, 14, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:36:23,794 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:36:23,795 INFO L791 eck$LassoCheckResult]: Stem: 10626#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 10627#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 10637#L367 assume !(main_~length~0 < 1); 10628#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 10629#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 10638#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 10630#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10631#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10632#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10633#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10666#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10665#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10664#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10663#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10662#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10661#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10660#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10659#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10658#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10657#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10656#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10655#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10654#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10653#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10652#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10651#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10650#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10649#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10648#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10647#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10646#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10645#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10644#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10643#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10642#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 10641#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 10640#L375-3 assume !(main_~i~0 < main_~length~0); 10639#L375-4 main_~j~0 := 1; 10622#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10623#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10624#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10625#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10636#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10689#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10688#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10687#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10686#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10685#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10684#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10683#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10682#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10681#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10680#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10679#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10678#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10677#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10676#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10675#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10674#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10673#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10672#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10671#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10670#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10669#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10668#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10634#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 10635#L380-2 [2021-11-02 22:36:23,795 INFO L793 eck$LassoCheckResult]: Loop: 10635#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 10667#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 10635#L380-2 [2021-11-02 22:36:23,795 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:36:23,796 INFO L85 PathProgramCache]: Analyzing trace with hash 729452608, now seen corresponding path program 38 times [2021-11-02 22:36:23,796 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:36:23,796 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [466594824] [2021-11-02 22:36:23,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:36:23,797 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:36:23,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:36:24,975 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 0 proven. 407 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:36:24,976 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:36:24,976 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [466594824] [2021-11-02 22:36:24,976 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [466594824] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:36:24,976 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [753130006] [2021-11-02 22:36:24,976 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-11-02 22:36:24,976 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:36:24,977 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:36:24,980 INFO L229 MonitoredProcess]: Starting monitored process 63 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:36:24,997 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (63)] Waiting until timeout for monitored process [2021-11-02 22:36:26,513 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-11-02 22:36:26,513 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:36:26,516 INFO L263 TraceCheckSpWp]: Trace formula consists of 393 conjuncts, 64 conjunts are in the unsatisfiable core [2021-11-02 22:36:26,518 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:36:26,709 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:36:26,756 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 35 [2021-11-02 22:36:26,768 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:36:26,768 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 42 [2021-11-02 22:36:27,826 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:36:27,826 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:36:27,830 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 0 proven. 407 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:36:27,830 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [753130006] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:36:27,831 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:36:27,831 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34] total 48 [2021-11-02 22:36:27,831 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [350012826] [2021-11-02 22:36:27,831 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:36:27,831 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:36:27,832 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 43 times [2021-11-02 22:36:27,832 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:36:27,832 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1329544762] [2021-11-02 22:36:27,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:36:27,832 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:36:27,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:36:27,842 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:36:27,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:36:27,845 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:36:27,914 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:36:27,914 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2021-11-02 22:36:27,915 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=126, Invalid=2226, Unknown=0, NotChecked=0, Total=2352 [2021-11-02 22:36:27,916 INFO L87 Difference]: Start difference. First operand 68 states and 71 transitions. cyclomatic complexity: 6 Second operand has 49 states, 48 states have (on average 2.0) internal successors, (96), 49 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:36:29,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:36:29,371 INFO L93 Difference]: Finished difference Result 105 states and 111 transitions. [2021-11-02 22:36:29,372 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2021-11-02 22:36:29,372 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 105 states and 111 transitions. [2021-11-02 22:36:29,372 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:36:29,373 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 105 states to 104 states and 110 transitions. [2021-11-02 22:36:29,373 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:36:29,373 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:36:29,373 INFO L73 IsDeterministic]: Start isDeterministic. Operand 104 states and 110 transitions. [2021-11-02 22:36:29,374 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:36:29,374 INFO L681 BuchiCegarLoop]: Abstraction has 104 states and 110 transitions. [2021-11-02 22:36:29,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states and 110 transitions. [2021-11-02 22:36:29,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 74. [2021-11-02 22:36:29,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 74 states, 74 states have (on average 1.054054054054054) internal successors, (78), 73 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:36:29,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 78 transitions. [2021-11-02 22:36:29,375 INFO L704 BuchiCegarLoop]: Abstraction has 74 states and 78 transitions. [2021-11-02 22:36:29,375 INFO L587 BuchiCegarLoop]: Abstraction has 74 states and 78 transitions. [2021-11-02 22:36:29,375 INFO L425 BuchiCegarLoop]: ======== Iteration 45============ [2021-11-02 22:36:29,376 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 74 states and 78 transitions. [2021-11-02 22:36:29,376 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:36:29,376 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:36:29,376 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:36:29,377 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [15, 15, 15, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:36:29,377 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:36:29,377 INFO L791 eck$LassoCheckResult]: Stem: 11049#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 11050#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 11060#L367 assume !(main_~length~0 < 1); 11051#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 11052#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 11061#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 11053#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11054#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11055#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11056#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11091#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11090#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11089#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11088#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11087#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11086#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11085#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11084#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11083#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11082#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11081#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11080#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11079#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11078#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11077#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11076#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11075#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11074#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11073#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11072#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11071#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11070#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11069#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11068#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11067#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11066#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11064#L375-3 assume !(main_~i~0 < main_~length~0); 11062#L375-4 main_~j~0 := 1; 11063#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11117#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11048#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11047#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11059#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11116#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11115#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11114#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11113#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11112#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11111#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11110#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11109#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11108#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11107#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11106#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11105#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11104#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11103#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11102#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11101#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11100#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11099#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11098#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11097#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11096#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11095#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11094#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11093#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11057#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 11058#L380-2 [2021-11-02 22:36:29,378 INFO L793 eck$LassoCheckResult]: Loop: 11058#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11092#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11058#L380-2 [2021-11-02 22:36:29,378 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:36:29,378 INFO L85 PathProgramCache]: Analyzing trace with hash 924286595, now seen corresponding path program 39 times [2021-11-02 22:36:29,378 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:36:29,378 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1561455486] [2021-11-02 22:36:29,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:36:29,378 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:36:29,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:36:29,998 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 183 proven. 252 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:36:29,998 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:36:29,998 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1561455486] [2021-11-02 22:36:29,999 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1561455486] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:36:29,999 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [889157655] [2021-11-02 22:36:29,999 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-02 22:36:29,999 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:36:29,999 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:36:30,001 INFO L229 MonitoredProcess]: Starting monitored process 64 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:36:30,004 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (64)] Waiting until timeout for monitored process [2021-11-02 22:36:31,825 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2021-11-02 22:36:31,826 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:36:31,832 INFO L263 TraceCheckSpWp]: Trace formula consists of 408 conjuncts, 33 conjunts are in the unsatisfiable core [2021-11-02 22:36:31,834 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:36:32,783 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 210 proven. 225 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:36:32,784 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [889157655] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:36:32,784 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:36:32,784 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34] total 50 [2021-11-02 22:36:32,784 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1632492307] [2021-11-02 22:36:32,784 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:36:32,785 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:36:32,785 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 44 times [2021-11-02 22:36:32,785 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:36:32,785 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2138022041] [2021-11-02 22:36:32,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:36:32,785 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:36:32,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:36:32,806 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:36:32,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:36:32,809 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:36:32,878 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:36:32,878 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2021-11-02 22:36:32,879 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=551, Invalid=1899, Unknown=0, NotChecked=0, Total=2450 [2021-11-02 22:36:32,880 INFO L87 Difference]: Start difference. First operand 74 states and 78 transitions. cyclomatic complexity: 7 Second operand has 50 states, 50 states have (on average 2.02) internal successors, (101), 50 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:36:33,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:36:33,396 INFO L93 Difference]: Finished difference Result 101 states and 104 transitions. [2021-11-02 22:36:33,396 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2021-11-02 22:36:33,397 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 104 transitions. [2021-11-02 22:36:33,397 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:36:33,398 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 71 states and 74 transitions. [2021-11-02 22:36:33,398 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:36:33,398 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:36:33,398 INFO L73 IsDeterministic]: Start isDeterministic. Operand 71 states and 74 transitions. [2021-11-02 22:36:33,398 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:36:33,398 INFO L681 BuchiCegarLoop]: Abstraction has 71 states and 74 transitions. [2021-11-02 22:36:33,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states and 74 transitions. [2021-11-02 22:36:33,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 70. [2021-11-02 22:36:33,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 70 states, 70 states have (on average 1.042857142857143) internal successors, (73), 69 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:36:33,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 73 transitions. [2021-11-02 22:36:33,401 INFO L704 BuchiCegarLoop]: Abstraction has 70 states and 73 transitions. [2021-11-02 22:36:33,401 INFO L587 BuchiCegarLoop]: Abstraction has 70 states and 73 transitions. [2021-11-02 22:36:33,401 INFO L425 BuchiCegarLoop]: ======== Iteration 46============ [2021-11-02 22:36:33,401 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 70 states and 73 transitions. [2021-11-02 22:36:33,402 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:36:33,402 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:36:33,402 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:36:33,403 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [16, 16, 14, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:36:33,403 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:36:33,404 INFO L791 eck$LassoCheckResult]: Stem: 11515#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 11516#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 11521#L367 assume !(main_~length~0 < 1); 11517#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 11518#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 11522#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 11511#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11512#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11513#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11514#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11524#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11576#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11575#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11574#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11573#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11572#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11571#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11570#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11569#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11568#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11567#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11566#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11565#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11564#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11563#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11562#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11561#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11560#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11559#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11558#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11557#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11556#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11555#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11554#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11553#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11552#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11551#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11526#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11525#L375-3 assume !(main_~i~0 < main_~length~0); 11523#L375-4 main_~j~0 := 1; 11507#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11508#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11509#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11510#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11550#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11549#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11548#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11547#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11546#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11545#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11544#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11543#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11542#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11541#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11540#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11539#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11538#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11537#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11536#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11535#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11534#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11533#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11532#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11531#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11530#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11529#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11528#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11519#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 11520#L380-2 [2021-11-02 22:36:33,404 INFO L793 eck$LassoCheckResult]: Loop: 11520#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11527#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11520#L380-2 [2021-11-02 22:36:33,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:36:33,404 INFO L85 PathProgramCache]: Analyzing trace with hash -123813470, now seen corresponding path program 40 times [2021-11-02 22:36:33,405 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:36:33,405 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [136968847] [2021-11-02 22:36:33,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:36:33,405 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:36:33,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:36:34,446 INFO L134 CoverageAnalysis]: Checked inductivity of 438 backedges. 0 proven. 438 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:36:34,446 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:36:34,446 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [136968847] [2021-11-02 22:36:34,446 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [136968847] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:36:34,446 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [179330795] [2021-11-02 22:36:34,446 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-11-02 22:36:34,446 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:36:34,447 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:36:34,448 INFO L229 MonitoredProcess]: Starting monitored process 65 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:36:34,449 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (65)] Waiting until timeout for monitored process [2021-11-02 22:36:36,237 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-11-02 22:36:36,237 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:36:36,243 INFO L263 TraceCheckSpWp]: Trace formula consists of 403 conjuncts, 69 conjunts are in the unsatisfiable core [2021-11-02 22:36:36,249 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:36:36,443 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:36:36,499 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 29 [2021-11-02 22:36:36,510 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:36:36,510 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 36 [2021-11-02 22:36:36,639 INFO L354 Elim1Store]: treesize reduction 80, result has 20.8 percent of original size [2021-11-02 22:36:36,639 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 46 treesize of output 48 [2021-11-02 22:36:37,680 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:36:37,680 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:36:37,684 INFO L134 CoverageAnalysis]: Checked inductivity of 438 backedges. 0 proven. 438 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:36:37,684 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [179330795] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:36:37,685 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:36:37,685 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 36] total 50 [2021-11-02 22:36:37,685 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1713680570] [2021-11-02 22:36:37,686 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:36:37,686 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:36:37,686 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 45 times [2021-11-02 22:36:37,686 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:36:37,687 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [850729528] [2021-11-02 22:36:37,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:36:37,687 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:36:37,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:36:37,698 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:36:37,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:36:37,701 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:36:37,780 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:36:37,781 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2021-11-02 22:36:37,782 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=133, Invalid=2417, Unknown=0, NotChecked=0, Total=2550 [2021-11-02 22:36:37,782 INFO L87 Difference]: Start difference. First operand 70 states and 73 transitions. cyclomatic complexity: 6 Second operand has 51 states, 50 states have (on average 1.98) internal successors, (99), 51 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:36:40,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:36:40,353 INFO L93 Difference]: Finished difference Result 74 states and 77 transitions. [2021-11-02 22:36:40,354 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2021-11-02 22:36:40,354 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 74 states and 77 transitions. [2021-11-02 22:36:40,354 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:36:40,355 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 74 states to 73 states and 76 transitions. [2021-11-02 22:36:40,355 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:36:40,355 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:36:40,355 INFO L73 IsDeterministic]: Start isDeterministic. Operand 73 states and 76 transitions. [2021-11-02 22:36:40,355 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:36:40,355 INFO L681 BuchiCegarLoop]: Abstraction has 73 states and 76 transitions. [2021-11-02 22:36:40,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states and 76 transitions. [2021-11-02 22:36:40,356 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 72. [2021-11-02 22:36:40,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 72 states, 72 states have (on average 1.0416666666666667) internal successors, (75), 71 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:36:40,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 75 transitions. [2021-11-02 22:36:40,357 INFO L704 BuchiCegarLoop]: Abstraction has 72 states and 75 transitions. [2021-11-02 22:36:40,357 INFO L587 BuchiCegarLoop]: Abstraction has 72 states and 75 transitions. [2021-11-02 22:36:40,358 INFO L425 BuchiCegarLoop]: ======== Iteration 47============ [2021-11-02 22:36:40,358 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 72 states and 75 transitions. [2021-11-02 22:36:40,358 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:36:40,358 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:36:40,359 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:36:40,359 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [16, 16, 15, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:36:40,360 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:36:40,360 INFO L791 eck$LassoCheckResult]: Stem: 11942#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 11943#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 11953#L367 assume !(main_~length~0 < 1); 11944#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 11945#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 11954#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 11946#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11947#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11948#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11949#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11984#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11983#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11982#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11981#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11980#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11979#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11978#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11977#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11976#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11975#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11974#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11973#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11972#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11971#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11970#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11969#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11968#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11967#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11966#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11965#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11964#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11963#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11962#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11961#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11960#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11959#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11958#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 11957#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 11956#L375-3 assume !(main_~i~0 < main_~length~0); 11955#L375-4 main_~j~0 := 1; 11938#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11939#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11940#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11941#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11952#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12009#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12008#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12007#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12006#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12005#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12004#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12003#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12002#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12001#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12000#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11999#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11998#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11997#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11996#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11995#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11994#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11993#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11992#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11991#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11990#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11989#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11988#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11987#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11986#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11950#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 11951#L380-2 [2021-11-02 22:36:40,360 INFO L793 eck$LassoCheckResult]: Loop: 11951#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 11985#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 11951#L380-2 [2021-11-02 22:36:40,361 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:36:40,361 INFO L85 PathProgramCache]: Analyzing trace with hash 1274339173, now seen corresponding path program 41 times [2021-11-02 22:36:40,361 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:36:40,361 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1952429456] [2021-11-02 22:36:40,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:36:40,362 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:36:40,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:36:41,669 INFO L134 CoverageAnalysis]: Checked inductivity of 466 backedges. 0 proven. 466 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:36:41,669 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:36:41,669 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1952429456] [2021-11-02 22:36:41,669 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1952429456] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:36:41,669 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1931411367] [2021-11-02 22:36:41,670 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-02 22:36:41,670 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:36:41,670 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:36:41,671 INFO L229 MonitoredProcess]: Starting monitored process 66 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:36:41,672 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (66)] Waiting until timeout for monitored process [2021-11-02 22:36:43,479 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 17 check-sat command(s) [2021-11-02 22:36:43,479 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:36:43,486 INFO L263 TraceCheckSpWp]: Trace formula consists of 418 conjuncts, 68 conjunts are in the unsatisfiable core [2021-11-02 22:36:43,488 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:36:43,728 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:36:43,778 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 35 [2021-11-02 22:36:43,789 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:36:43,789 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 42 [2021-11-02 22:36:44,952 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:36:44,952 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:36:44,958 INFO L134 CoverageAnalysis]: Checked inductivity of 466 backedges. 0 proven. 466 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:36:44,958 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1931411367] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:36:44,958 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:36:44,958 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36] total 51 [2021-11-02 22:36:44,958 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [715569535] [2021-11-02 22:36:44,959 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:36:44,959 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:36:44,959 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 46 times [2021-11-02 22:36:44,959 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:36:44,960 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [99752232] [2021-11-02 22:36:44,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:36:44,960 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:36:44,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:36:44,973 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:36:44,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:36:44,975 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:36:45,040 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:36:45,041 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2021-11-02 22:36:45,042 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=2518, Unknown=0, NotChecked=0, Total=2652 [2021-11-02 22:36:45,042 INFO L87 Difference]: Start difference. First operand 72 states and 75 transitions. cyclomatic complexity: 6 Second operand has 52 states, 51 states have (on average 2.0) internal successors, (102), 52 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:36:46,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:36:46,700 INFO L93 Difference]: Finished difference Result 111 states and 117 transitions. [2021-11-02 22:36:46,700 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2021-11-02 22:36:46,700 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 111 states and 117 transitions. [2021-11-02 22:36:46,701 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:36:46,701 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 111 states to 110 states and 116 transitions. [2021-11-02 22:36:46,701 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:36:46,701 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:36:46,702 INFO L73 IsDeterministic]: Start isDeterministic. Operand 110 states and 116 transitions. [2021-11-02 22:36:46,702 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:36:46,702 INFO L681 BuchiCegarLoop]: Abstraction has 110 states and 116 transitions. [2021-11-02 22:36:46,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states and 116 transitions. [2021-11-02 22:36:46,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 78. [2021-11-02 22:36:46,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78 states, 78 states have (on average 1.0512820512820513) internal successors, (82), 77 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:36:46,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 82 transitions. [2021-11-02 22:36:46,704 INFO L704 BuchiCegarLoop]: Abstraction has 78 states and 82 transitions. [2021-11-02 22:36:46,705 INFO L587 BuchiCegarLoop]: Abstraction has 78 states and 82 transitions. [2021-11-02 22:36:46,705 INFO L425 BuchiCegarLoop]: ======== Iteration 48============ [2021-11-02 22:36:46,705 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 78 states and 82 transitions. [2021-11-02 22:36:46,705 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:36:46,705 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:36:46,705 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:36:46,706 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [16, 16, 16, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:36:46,706 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:36:46,707 INFO L791 eck$LassoCheckResult]: Stem: 12394#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 12395#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 12401#L367 assume !(main_~length~0 < 1); 12396#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 12397#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 12402#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 12390#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12391#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12392#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12393#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12405#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12434#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12433#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12432#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12431#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12430#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12429#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12428#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12427#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12426#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12425#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12424#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12423#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12422#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12421#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12420#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12419#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12418#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12417#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12416#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12415#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12414#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12413#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12412#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12411#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12410#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12409#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12408#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12406#L375-3 assume !(main_~i~0 < main_~length~0); 12403#L375-4 main_~j~0 := 1; 12404#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12462#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12389#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12388#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12400#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12461#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12460#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12459#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12458#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12457#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12456#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12455#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12454#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12453#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12452#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12451#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12450#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12449#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12448#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12447#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12446#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12445#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12444#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12443#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12442#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12441#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12440#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12439#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12438#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12437#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12436#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12398#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 12399#L380-2 [2021-11-02 22:36:46,707 INFO L793 eck$LassoCheckResult]: Loop: 12399#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12435#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12399#L380-2 [2021-11-02 22:36:46,708 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:36:46,708 INFO L85 PathProgramCache]: Analyzing trace with hash 574265448, now seen corresponding path program 42 times [2021-11-02 22:36:46,708 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:36:46,708 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [38021273] [2021-11-02 22:36:46,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:36:46,709 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:36:46,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:36:47,267 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 211 proven. 285 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:36:47,267 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:36:47,268 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [38021273] [2021-11-02 22:36:47,268 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [38021273] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:36:47,268 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2047122805] [2021-11-02 22:36:47,268 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-11-02 22:36:47,268 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:36:47,268 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:36:47,294 INFO L229 MonitoredProcess]: Starting monitored process 67 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:36:47,295 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (67)] Waiting until timeout for monitored process [2021-11-02 22:36:49,576 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 17 check-sat command(s) [2021-11-02 22:36:49,576 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:36:49,582 INFO L263 TraceCheckSpWp]: Trace formula consists of 433 conjuncts, 35 conjunts are in the unsatisfiable core [2021-11-02 22:36:49,584 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:36:50,556 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 240 proven. 256 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:36:50,557 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2047122805] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:36:50,557 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:36:50,557 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36] total 53 [2021-11-02 22:36:50,557 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [310052753] [2021-11-02 22:36:50,557 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:36:50,557 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:36:50,558 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 47 times [2021-11-02 22:36:50,558 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:36:50,558 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [263209938] [2021-11-02 22:36:50,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:36:50,558 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:36:50,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:36:50,570 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:36:50,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:36:50,574 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:36:50,658 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:36:50,659 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2021-11-02 22:36:50,660 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=619, Invalid=2137, Unknown=0, NotChecked=0, Total=2756 [2021-11-02 22:36:50,660 INFO L87 Difference]: Start difference. First operand 78 states and 82 transitions. cyclomatic complexity: 7 Second operand has 53 states, 53 states have (on average 2.018867924528302) internal successors, (107), 53 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:36:51,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:36:51,194 INFO L93 Difference]: Finished difference Result 107 states and 110 transitions. [2021-11-02 22:36:51,195 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2021-11-02 22:36:51,195 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 107 states and 110 transitions. [2021-11-02 22:36:51,195 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:36:51,196 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 107 states to 75 states and 78 transitions. [2021-11-02 22:36:51,196 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:36:51,196 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:36:51,196 INFO L73 IsDeterministic]: Start isDeterministic. Operand 75 states and 78 transitions. [2021-11-02 22:36:51,196 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:36:51,197 INFO L681 BuchiCegarLoop]: Abstraction has 75 states and 78 transitions. [2021-11-02 22:36:51,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states and 78 transitions. [2021-11-02 22:36:51,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 74. [2021-11-02 22:36:51,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 74 states, 74 states have (on average 1.0405405405405406) internal successors, (77), 73 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:36:51,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 77 transitions. [2021-11-02 22:36:51,198 INFO L704 BuchiCegarLoop]: Abstraction has 74 states and 77 transitions. [2021-11-02 22:36:51,198 INFO L587 BuchiCegarLoop]: Abstraction has 74 states and 77 transitions. [2021-11-02 22:36:51,198 INFO L425 BuchiCegarLoop]: ======== Iteration 49============ [2021-11-02 22:36:51,198 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 74 states and 77 transitions. [2021-11-02 22:36:51,201 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:36:51,201 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:36:51,201 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:36:51,202 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [17, 17, 15, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:36:51,202 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:36:51,202 INFO L791 eck$LassoCheckResult]: Stem: 12879#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 12880#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 12889#L367 assume !(main_~length~0 < 1); 12881#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 12882#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 12890#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 12883#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12884#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12885#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12886#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12892#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12948#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12947#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12946#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12945#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12944#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12943#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12942#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12941#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12940#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12939#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12938#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12937#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12936#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12935#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12934#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12933#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12932#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12931#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12930#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12929#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12928#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12927#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12926#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12925#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12924#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12923#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12922#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12921#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 12894#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 12893#L375-3 assume !(main_~i~0 < main_~length~0); 12891#L375-4 main_~j~0 := 1; 12875#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12876#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12877#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12878#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12920#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12919#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12918#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12917#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12916#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12915#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12914#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12913#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12912#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12911#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12910#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12909#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12908#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12907#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12906#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12905#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12904#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12903#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12902#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12901#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12900#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12899#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12898#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12896#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12895#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12887#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 12888#L380-2 [2021-11-02 22:36:51,203 INFO L793 eck$LassoCheckResult]: Loop: 12888#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 12897#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 12888#L380-2 [2021-11-02 22:36:51,203 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:36:51,203 INFO L85 PathProgramCache]: Analyzing trace with hash -1627549753, now seen corresponding path program 43 times [2021-11-02 22:36:51,204 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:36:51,204 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [434343898] [2021-11-02 22:36:51,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:36:51,204 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:36:51,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:36:52,679 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 499 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:36:52,679 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:36:52,680 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [434343898] [2021-11-02 22:36:52,680 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [434343898] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:36:52,680 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2050488838] [2021-11-02 22:36:52,680 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-02 22:36:52,680 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:36:52,680 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:36:52,682 INFO L229 MonitoredProcess]: Starting monitored process 68 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:36:52,683 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (68)] Waiting until timeout for monitored process [2021-11-02 22:36:54,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:36:54,283 INFO L263 TraceCheckSpWp]: Trace formula consists of 428 conjuncts, 74 conjunts are in the unsatisfiable core [2021-11-02 22:36:54,285 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:36:55,260 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:36:55,412 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:36:55,413 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-11-02 22:36:55,576 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:36:55,593 INFO L354 Elim1Store]: treesize reduction 60, result has 24.1 percent of original size [2021-11-02 22:36:55,593 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 36 treesize of output 38 [2021-11-02 22:36:57,431 INFO L354 Elim1Store]: treesize reduction 52, result has 11.9 percent of original size [2021-11-02 22:36:57,432 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 40 treesize of output 24 [2021-11-02 22:36:57,437 INFO L134 CoverageAnalysis]: Checked inductivity of 499 backedges. 0 proven. 499 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:36:57,437 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2050488838] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:36:57,437 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:36:57,437 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 39] total 74 [2021-11-02 22:36:57,437 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1740055025] [2021-11-02 22:36:57,438 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:36:57,438 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:36:57,438 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 48 times [2021-11-02 22:36:57,438 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:36:57,438 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [938785930] [2021-11-02 22:36:57,438 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:36:57,439 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:36:57,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:36:57,496 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:36:57,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:36:57,499 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:36:57,568 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:36:57,569 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 75 interpolants. [2021-11-02 22:36:57,571 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=262, Invalid=5288, Unknown=0, NotChecked=0, Total=5550 [2021-11-02 22:36:57,571 INFO L87 Difference]: Start difference. First operand 74 states and 77 transitions. cyclomatic complexity: 6 Second operand has 75 states, 74 states have (on average 1.8918918918918919) internal successors, (140), 75 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:37:00,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:37:00,359 INFO L93 Difference]: Finished difference Result 78 states and 81 transitions. [2021-11-02 22:37:00,359 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2021-11-02 22:37:00,359 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 78 states and 81 transitions. [2021-11-02 22:37:00,360 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:37:00,360 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 78 states to 77 states and 80 transitions. [2021-11-02 22:37:00,361 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:37:00,361 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:37:00,361 INFO L73 IsDeterministic]: Start isDeterministic. Operand 77 states and 80 transitions. [2021-11-02 22:37:00,361 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:37:00,361 INFO L681 BuchiCegarLoop]: Abstraction has 77 states and 80 transitions. [2021-11-02 22:37:00,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states and 80 transitions. [2021-11-02 22:37:00,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 76. [2021-11-02 22:37:00,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 76 states, 76 states have (on average 1.0394736842105263) internal successors, (79), 75 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:37:00,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 79 transitions. [2021-11-02 22:37:00,363 INFO L704 BuchiCegarLoop]: Abstraction has 76 states and 79 transitions. [2021-11-02 22:37:00,363 INFO L587 BuchiCegarLoop]: Abstraction has 76 states and 79 transitions. [2021-11-02 22:37:00,363 INFO L425 BuchiCegarLoop]: ======== Iteration 50============ [2021-11-02 22:37:00,363 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 76 states and 79 transitions. [2021-11-02 22:37:00,363 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:37:00,363 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:37:00,363 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:37:00,364 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [17, 17, 16, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:37:00,364 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:37:00,364 INFO L791 eck$LassoCheckResult]: Stem: 13356#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 13357#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 13367#L367 assume !(main_~length~0 < 1); 13358#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 13359#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 13368#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 13360#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13361#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13362#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13363#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13400#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13399#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13398#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13397#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13396#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13395#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13394#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13393#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13392#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13391#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13390#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13389#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13388#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13387#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13386#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13385#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13384#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13383#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13382#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13381#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13380#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13379#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13378#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13377#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13376#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13375#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13374#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13373#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13372#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13371#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13370#L375-3 assume !(main_~i~0 < main_~length~0); 13369#L375-4 main_~j~0 := 1; 13352#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13353#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13354#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13355#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13366#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13427#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13426#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13425#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13424#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13423#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13422#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13421#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13420#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13419#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13418#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13417#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13416#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13415#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13414#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13413#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13412#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13411#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13410#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13409#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13408#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13407#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13406#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13405#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13404#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13403#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13402#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13364#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 13365#L380-2 [2021-11-02 22:37:00,364 INFO L793 eck$LassoCheckResult]: Loop: 13365#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13401#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13365#L380-2 [2021-11-02 22:37:00,364 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:37:00,364 INFO L85 PathProgramCache]: Analyzing trace with hash -707217334, now seen corresponding path program 44 times [2021-11-02 22:37:00,365 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:37:00,365 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [696254362] [2021-11-02 22:37:00,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:37:00,365 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:37:00,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:37:01,776 INFO L134 CoverageAnalysis]: Checked inductivity of 529 backedges. 0 proven. 529 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:37:01,777 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:37:01,777 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [696254362] [2021-11-02 22:37:01,777 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [696254362] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:37:01,777 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1860480477] [2021-11-02 22:37:01,777 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-11-02 22:37:01,778 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:37:01,778 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:37:01,781 INFO L229 MonitoredProcess]: Starting monitored process 69 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:37:01,803 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (69)] Waiting until timeout for monitored process [2021-11-02 22:37:03,774 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-11-02 22:37:03,774 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:37:03,778 INFO L263 TraceCheckSpWp]: Trace formula consists of 443 conjuncts, 72 conjunts are in the unsatisfiable core [2021-11-02 22:37:03,780 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:37:03,999 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:37:04,047 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 35 [2021-11-02 22:37:04,064 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:37:04,065 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 42 [2021-11-02 22:37:05,297 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:37:05,297 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:37:05,303 INFO L134 CoverageAnalysis]: Checked inductivity of 529 backedges. 0 proven. 529 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:37:05,303 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1860480477] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:37:05,303 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:37:05,303 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38] total 54 [2021-11-02 22:37:05,303 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [222548835] [2021-11-02 22:37:05,304 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:37:05,304 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:37:05,304 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 49 times [2021-11-02 22:37:05,304 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:37:05,304 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1749445422] [2021-11-02 22:37:05,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:37:05,304 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:37:05,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:37:05,317 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:37:05,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:37:05,319 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:37:05,385 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:37:05,385 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2021-11-02 22:37:05,386 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=142, Invalid=2828, Unknown=0, NotChecked=0, Total=2970 [2021-11-02 22:37:05,386 INFO L87 Difference]: Start difference. First operand 76 states and 79 transitions. cyclomatic complexity: 6 Second operand has 55 states, 54 states have (on average 2.0) internal successors, (108), 55 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:37:07,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:37:07,313 INFO L93 Difference]: Finished difference Result 117 states and 123 transitions. [2021-11-02 22:37:07,314 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2021-11-02 22:37:07,314 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 117 states and 123 transitions. [2021-11-02 22:37:07,315 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:37:07,316 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 117 states to 116 states and 122 transitions. [2021-11-02 22:37:07,316 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:37:07,316 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:37:07,316 INFO L73 IsDeterministic]: Start isDeterministic. Operand 116 states and 122 transitions. [2021-11-02 22:37:07,316 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:37:07,316 INFO L681 BuchiCegarLoop]: Abstraction has 116 states and 122 transitions. [2021-11-02 22:37:07,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states and 122 transitions. [2021-11-02 22:37:07,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 82. [2021-11-02 22:37:07,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 82 states have (on average 1.048780487804878) internal successors, (86), 81 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:37:07,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 86 transitions. [2021-11-02 22:37:07,318 INFO L704 BuchiCegarLoop]: Abstraction has 82 states and 86 transitions. [2021-11-02 22:37:07,318 INFO L587 BuchiCegarLoop]: Abstraction has 82 states and 86 transitions. [2021-11-02 22:37:07,318 INFO L425 BuchiCegarLoop]: ======== Iteration 51============ [2021-11-02 22:37:07,319 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 82 states and 86 transitions. [2021-11-02 22:37:07,319 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:37:07,319 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:37:07,319 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:37:07,320 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [17, 17, 17, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:37:07,320 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:37:07,320 INFO L791 eck$LassoCheckResult]: Stem: 13829#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 13830#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 13840#L367 assume !(main_~length~0 < 1); 13831#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 13832#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 13841#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 13833#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13834#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13835#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13836#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13875#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13874#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13873#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13872#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13871#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13870#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13869#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13868#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13867#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13866#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13865#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13864#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13863#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13862#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13861#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13860#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13859#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13858#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13857#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13856#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13855#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13854#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13853#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13852#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13851#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13850#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13849#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13848#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13847#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 13846#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 13844#L375-3 assume !(main_~i~0 < main_~length~0); 13842#L375-4 main_~j~0 := 1; 13843#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13905#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13828#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13827#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13839#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13904#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13903#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13902#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13901#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13900#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13899#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13898#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13897#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13896#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13895#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13894#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13893#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13892#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13891#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13890#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13889#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13888#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13887#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13886#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13885#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13884#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13883#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13882#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13881#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13880#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13879#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13877#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13876#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13837#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 13838#L380-2 [2021-11-02 22:37:07,320 INFO L793 eck$LassoCheckResult]: Loop: 13838#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 13878#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 13838#L380-2 [2021-11-02 22:37:07,328 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:37:07,328 INFO L85 PathProgramCache]: Analyzing trace with hash -1031025651, now seen corresponding path program 45 times [2021-11-02 22:37:07,329 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:37:07,329 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1844875957] [2021-11-02 22:37:07,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:37:07,329 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:37:07,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:37:07,962 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 241 proven. 320 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:37:07,962 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:37:07,963 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1844875957] [2021-11-02 22:37:07,963 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1844875957] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:37:07,963 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [920058031] [2021-11-02 22:37:07,963 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-02 22:37:07,964 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:37:07,964 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:37:07,969 INFO L229 MonitoredProcess]: Starting monitored process 70 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:37:07,981 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (70)] Waiting until timeout for monitored process [2021-11-02 22:37:11,012 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 18 check-sat command(s) [2021-11-02 22:37:11,012 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:37:11,021 INFO L263 TraceCheckSpWp]: Trace formula consists of 458 conjuncts, 37 conjunts are in the unsatisfiable core [2021-11-02 22:37:11,022 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:37:11,947 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 272 proven. 289 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:37:11,947 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [920058031] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:37:11,947 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:37:11,947 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38] total 56 [2021-11-02 22:37:11,948 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [313368588] [2021-11-02 22:37:11,948 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:37:11,948 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:37:11,948 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 50 times [2021-11-02 22:37:11,948 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:37:11,949 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1315671398] [2021-11-02 22:37:11,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:37:11,949 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:37:11,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:37:11,962 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:37:11,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:37:11,965 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:37:12,049 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:37:12,050 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2021-11-02 22:37:12,050 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=691, Invalid=2389, Unknown=0, NotChecked=0, Total=3080 [2021-11-02 22:37:12,051 INFO L87 Difference]: Start difference. First operand 82 states and 86 transitions. cyclomatic complexity: 7 Second operand has 56 states, 56 states have (on average 2.017857142857143) internal successors, (113), 56 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:37:12,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:37:12,693 INFO L93 Difference]: Finished difference Result 113 states and 116 transitions. [2021-11-02 22:37:12,693 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2021-11-02 22:37:12,694 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 113 states and 116 transitions. [2021-11-02 22:37:12,694 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:37:12,695 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 113 states to 79 states and 82 transitions. [2021-11-02 22:37:12,695 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:37:12,695 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:37:12,696 INFO L73 IsDeterministic]: Start isDeterministic. Operand 79 states and 82 transitions. [2021-11-02 22:37:12,696 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:37:12,696 INFO L681 BuchiCegarLoop]: Abstraction has 79 states and 82 transitions. [2021-11-02 22:37:12,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states and 82 transitions. [2021-11-02 22:37:12,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 78. [2021-11-02 22:37:12,698 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78 states, 78 states have (on average 1.0384615384615385) internal successors, (81), 77 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:37:12,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 81 transitions. [2021-11-02 22:37:12,698 INFO L704 BuchiCegarLoop]: Abstraction has 78 states and 81 transitions. [2021-11-02 22:37:12,698 INFO L587 BuchiCegarLoop]: Abstraction has 78 states and 81 transitions. [2021-11-02 22:37:12,698 INFO L425 BuchiCegarLoop]: ======== Iteration 52============ [2021-11-02 22:37:12,698 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 78 states and 81 transitions. [2021-11-02 22:37:12,699 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:37:12,699 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:37:12,699 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:37:12,699 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [18, 18, 16, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:37:12,699 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:37:12,699 INFO L791 eck$LassoCheckResult]: Stem: 14349#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 14350#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 14355#L367 assume !(main_~length~0 < 1); 14351#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 14352#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 14356#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 14345#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14346#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14347#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14348#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14358#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14418#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14417#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14416#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14415#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14414#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14413#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14412#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14411#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14410#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14409#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14408#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14407#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14406#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14405#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14404#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14403#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14402#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14401#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14400#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14399#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14398#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14397#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14396#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14395#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14394#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14393#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14392#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14391#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14390#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14389#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14360#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14359#L375-3 assume !(main_~i~0 < main_~length~0); 14357#L375-4 main_~j~0 := 1; 14341#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14342#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14343#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14344#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14388#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14387#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14386#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14385#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14384#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14383#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14382#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14381#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14380#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14379#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14378#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14377#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14376#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14375#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14374#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14373#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14372#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14371#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14370#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14369#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14368#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14367#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14366#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14365#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14364#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14363#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14362#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14353#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 14354#L380-2 [2021-11-02 22:37:12,700 INFO L793 eck$LassoCheckResult]: Loop: 14354#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14361#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14354#L380-2 [2021-11-02 22:37:12,700 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:37:12,700 INFO L85 PathProgramCache]: Analyzing trace with hash 443443116, now seen corresponding path program 46 times [2021-11-02 22:37:12,700 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:37:12,700 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1137808344] [2021-11-02 22:37:12,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:37:12,700 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:37:12,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:37:14,309 INFO L134 CoverageAnalysis]: Checked inductivity of 564 backedges. 0 proven. 564 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:37:14,310 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:37:14,310 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1137808344] [2021-11-02 22:37:14,310 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1137808344] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:37:14,310 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [197599792] [2021-11-02 22:37:14,310 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-11-02 22:37:14,311 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:37:14,311 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:37:14,316 INFO L229 MonitoredProcess]: Starting monitored process 71 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:37:14,333 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (71)] Waiting until timeout for monitored process [2021-11-02 22:37:16,965 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-11-02 22:37:16,966 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:37:16,972 INFO L263 TraceCheckSpWp]: Trace formula consists of 453 conjuncts, 77 conjunts are in the unsatisfiable core [2021-11-02 22:37:16,974 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:37:17,231 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:37:17,275 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 29 [2021-11-02 22:37:17,287 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:37:17,287 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 36 [2021-11-02 22:37:17,411 INFO L354 Elim1Store]: treesize reduction 80, result has 20.8 percent of original size [2021-11-02 22:37:17,411 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 46 treesize of output 48 [2021-11-02 22:37:18,719 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:37:18,720 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:37:18,723 INFO L134 CoverageAnalysis]: Checked inductivity of 564 backedges. 0 proven. 564 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:37:18,723 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [197599792] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:37:18,724 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:37:18,724 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 40] total 56 [2021-11-02 22:37:18,724 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2134125668] [2021-11-02 22:37:18,724 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:37:18,724 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:37:18,725 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 51 times [2021-11-02 22:37:18,725 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:37:18,725 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [136226292] [2021-11-02 22:37:18,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:37:18,725 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:37:18,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:37:18,739 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:37:18,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:37:18,741 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:37:18,809 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:37:18,809 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2021-11-02 22:37:18,809 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=149, Invalid=3043, Unknown=0, NotChecked=0, Total=3192 [2021-11-02 22:37:18,810 INFO L87 Difference]: Start difference. First operand 78 states and 81 transitions. cyclomatic complexity: 6 Second operand has 57 states, 56 states have (on average 1.9821428571428572) internal successors, (111), 57 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:37:21,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:37:21,687 INFO L93 Difference]: Finished difference Result 82 states and 85 transitions. [2021-11-02 22:37:21,687 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2021-11-02 22:37:21,687 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 82 states and 85 transitions. [2021-11-02 22:37:21,687 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:37:21,688 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 82 states to 81 states and 84 transitions. [2021-11-02 22:37:21,689 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:37:21,689 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:37:21,689 INFO L73 IsDeterministic]: Start isDeterministic. Operand 81 states and 84 transitions. [2021-11-02 22:37:21,689 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:37:21,689 INFO L681 BuchiCegarLoop]: Abstraction has 81 states and 84 transitions. [2021-11-02 22:37:21,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states and 84 transitions. [2021-11-02 22:37:21,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 80. [2021-11-02 22:37:21,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 80 states, 80 states have (on average 1.0375) internal successors, (83), 79 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:37:21,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 83 transitions. [2021-11-02 22:37:21,692 INFO L704 BuchiCegarLoop]: Abstraction has 80 states and 83 transitions. [2021-11-02 22:37:21,692 INFO L587 BuchiCegarLoop]: Abstraction has 80 states and 83 transitions. [2021-11-02 22:37:21,693 INFO L425 BuchiCegarLoop]: ======== Iteration 53============ [2021-11-02 22:37:21,693 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 80 states and 83 transitions. [2021-11-02 22:37:21,693 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:37:21,693 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:37:21,694 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:37:21,694 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [18, 18, 17, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:37:21,695 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:37:21,695 INFO L791 eck$LassoCheckResult]: Stem: 14830#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 14831#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 14837#L367 assume !(main_~length~0 < 1); 14832#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 14833#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 14838#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 14826#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14827#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14828#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14829#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14872#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14871#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14870#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14869#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14868#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14867#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14866#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14865#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14864#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14863#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14862#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14861#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14860#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14859#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14858#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14857#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14856#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14855#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14854#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14853#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14852#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14851#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14850#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14849#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14848#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14847#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14846#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14845#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14844#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14843#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14842#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 14841#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 14840#L375-3 assume !(main_~i~0 < main_~length~0); 14839#L375-4 main_~j~0 := 1; 14822#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14823#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14824#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14825#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14836#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14901#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14900#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14899#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14898#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14897#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14896#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14895#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14894#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14893#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14892#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14891#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14890#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14889#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14888#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14887#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14886#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14885#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14884#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14883#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14882#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14881#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14880#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14879#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14878#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14877#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14876#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14874#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14873#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14834#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 14835#L380-2 [2021-11-02 22:37:21,695 INFO L793 eck$LassoCheckResult]: Loop: 14835#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 14875#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 14835#L380-2 [2021-11-02 22:37:21,696 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:37:21,696 INFO L85 PathProgramCache]: Analyzing trace with hash 947071727, now seen corresponding path program 47 times [2021-11-02 22:37:21,696 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:37:21,696 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1561506111] [2021-11-02 22:37:21,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:37:21,697 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:37:21,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:37:23,174 INFO L134 CoverageAnalysis]: Checked inductivity of 596 backedges. 0 proven. 596 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:37:23,174 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:37:23,174 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1561506111] [2021-11-02 22:37:23,175 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1561506111] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:37:23,175 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [928209001] [2021-11-02 22:37:23,175 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-02 22:37:23,175 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:37:23,175 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:37:23,177 INFO L229 MonitoredProcess]: Starting monitored process 72 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:37:23,178 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (72)] Waiting until timeout for monitored process [2021-11-02 22:37:25,502 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 19 check-sat command(s) [2021-11-02 22:37:25,502 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:37:25,510 INFO L263 TraceCheckSpWp]: Trace formula consists of 468 conjuncts, 76 conjunts are in the unsatisfiable core [2021-11-02 22:37:25,512 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:37:25,740 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:37:25,795 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 35 [2021-11-02 22:37:25,806 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:37:25,806 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 42 [2021-11-02 22:37:27,278 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:37:27,279 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:37:27,282 INFO L134 CoverageAnalysis]: Checked inductivity of 596 backedges. 0 proven. 596 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:37:27,283 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [928209001] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:37:27,283 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:37:27,283 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40] total 57 [2021-11-02 22:37:27,283 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [198700144] [2021-11-02 22:37:27,284 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:37:27,284 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:37:27,284 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 52 times [2021-11-02 22:37:27,284 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:37:27,285 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1531395052] [2021-11-02 22:37:27,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:37:27,285 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:37:27,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:37:27,299 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:37:27,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:37:27,301 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:37:27,366 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:37:27,367 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2021-11-02 22:37:27,367 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=150, Invalid=3156, Unknown=0, NotChecked=0, Total=3306 [2021-11-02 22:37:27,367 INFO L87 Difference]: Start difference. First operand 80 states and 83 transitions. cyclomatic complexity: 6 Second operand has 58 states, 57 states have (on average 2.0) internal successors, (114), 58 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:37:29,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:37:29,408 INFO L93 Difference]: Finished difference Result 123 states and 129 transitions. [2021-11-02 22:37:29,408 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2021-11-02 22:37:29,408 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 123 states and 129 transitions. [2021-11-02 22:37:29,409 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:37:29,410 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 123 states to 122 states and 128 transitions. [2021-11-02 22:37:29,410 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:37:29,411 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:37:29,411 INFO L73 IsDeterministic]: Start isDeterministic. Operand 122 states and 128 transitions. [2021-11-02 22:37:29,411 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:37:29,411 INFO L681 BuchiCegarLoop]: Abstraction has 122 states and 128 transitions. [2021-11-02 22:37:29,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states and 128 transitions. [2021-11-02 22:37:29,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 86. [2021-11-02 22:37:29,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 86 states, 86 states have (on average 1.0465116279069768) internal successors, (90), 85 states have internal predecessors, (90), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:37:29,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 90 transitions. [2021-11-02 22:37:29,415 INFO L704 BuchiCegarLoop]: Abstraction has 86 states and 90 transitions. [2021-11-02 22:37:29,415 INFO L587 BuchiCegarLoop]: Abstraction has 86 states and 90 transitions. [2021-11-02 22:37:29,415 INFO L425 BuchiCegarLoop]: ======== Iteration 54============ [2021-11-02 22:37:29,415 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 86 states and 90 transitions. [2021-11-02 22:37:29,416 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:37:29,416 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:37:29,416 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:37:29,417 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [18, 18, 18, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:37:29,417 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:37:29,418 INFO L791 eck$LassoCheckResult]: Stem: 15324#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 15325#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 15335#L367 assume !(main_~length~0 < 1); 15326#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 15327#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 15336#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 15328#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15329#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15330#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15331#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15372#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15371#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15370#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15369#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15368#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15367#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15366#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15365#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15364#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15363#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15362#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15361#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15360#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15359#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15358#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15357#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15356#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15355#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15354#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15353#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15352#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15351#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15350#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15349#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15348#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15347#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15346#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15345#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15344#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15343#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15342#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15341#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15339#L375-3 assume !(main_~i~0 < main_~length~0); 15337#L375-4 main_~j~0 := 1; 15338#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15404#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15323#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15322#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15334#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15403#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15402#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15401#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15400#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15399#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15398#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15397#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15396#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15395#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15394#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15393#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15392#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15391#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15390#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15389#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15388#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15387#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15386#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15385#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15384#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15383#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15382#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15381#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15380#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15379#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15378#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15377#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15376#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15374#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15373#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15332#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 15333#L380-2 [2021-11-02 22:37:29,418 INFO L793 eck$LassoCheckResult]: Loop: 15333#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15375#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15333#L380-2 [2021-11-02 22:37:29,418 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:37:29,418 INFO L85 PathProgramCache]: Analyzing trace with hash -397137550, now seen corresponding path program 48 times [2021-11-02 22:37:29,419 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:37:29,419 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [978614227] [2021-11-02 22:37:29,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:37:29,419 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:37:29,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:37:30,178 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 273 proven. 357 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:37:30,178 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:37:30,178 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [978614227] [2021-11-02 22:37:30,178 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [978614227] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:37:30,178 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1428354761] [2021-11-02 22:37:30,178 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-11-02 22:37:30,179 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:37:30,179 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:37:30,180 INFO L229 MonitoredProcess]: Starting monitored process 73 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:37:30,181 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (73)] Waiting until timeout for monitored process [2021-11-02 22:37:33,052 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2021-11-02 22:37:33,052 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:37:33,061 INFO L263 TraceCheckSpWp]: Trace formula consists of 483 conjuncts, 39 conjunts are in the unsatisfiable core [2021-11-02 22:37:33,063 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:37:34,118 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 306 proven. 324 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:37:34,119 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1428354761] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:37:34,119 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:37:34,119 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40] total 59 [2021-11-02 22:37:34,119 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1027706850] [2021-11-02 22:37:34,119 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:37:34,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:37:34,120 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 53 times [2021-11-02 22:37:34,120 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:37:34,120 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1619268290] [2021-11-02 22:37:34,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:37:34,120 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:37:34,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:37:34,199 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:37:34,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:37:34,202 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:37:34,283 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:37:34,283 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2021-11-02 22:37:34,284 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=767, Invalid=2655, Unknown=0, NotChecked=0, Total=3422 [2021-11-02 22:37:34,284 INFO L87 Difference]: Start difference. First operand 86 states and 90 transitions. cyclomatic complexity: 7 Second operand has 59 states, 59 states have (on average 2.016949152542373) internal successors, (119), 59 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:37:34,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:37:34,932 INFO L93 Difference]: Finished difference Result 119 states and 122 transitions. [2021-11-02 22:37:34,932 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2021-11-02 22:37:34,932 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 119 states and 122 transitions. [2021-11-02 22:37:34,933 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:37:34,933 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 119 states to 83 states and 86 transitions. [2021-11-02 22:37:34,933 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:37:34,933 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:37:34,933 INFO L73 IsDeterministic]: Start isDeterministic. Operand 83 states and 86 transitions. [2021-11-02 22:37:34,934 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:37:34,934 INFO L681 BuchiCegarLoop]: Abstraction has 83 states and 86 transitions. [2021-11-02 22:37:34,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states and 86 transitions. [2021-11-02 22:37:34,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 82. [2021-11-02 22:37:34,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 82 states have (on average 1.0365853658536586) internal successors, (85), 81 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:37:34,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 85 transitions. [2021-11-02 22:37:34,936 INFO L704 BuchiCegarLoop]: Abstraction has 82 states and 85 transitions. [2021-11-02 22:37:34,936 INFO L587 BuchiCegarLoop]: Abstraction has 82 states and 85 transitions. [2021-11-02 22:37:34,937 INFO L425 BuchiCegarLoop]: ======== Iteration 55============ [2021-11-02 22:37:34,937 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 82 states and 85 transitions. [2021-11-02 22:37:34,937 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:37:34,937 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:37:34,938 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:37:34,938 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [19, 19, 17, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:37:34,939 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:37:34,939 INFO L791 eck$LassoCheckResult]: Stem: 15871#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 15872#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 15877#L367 assume !(main_~length~0 < 1); 15873#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 15874#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 15878#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 15867#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15868#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15869#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15870#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15880#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15944#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15943#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15942#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15941#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15940#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15939#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15938#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15937#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15936#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15935#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15934#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15933#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15932#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15931#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15930#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15929#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15928#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15927#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15926#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15925#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15924#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15923#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15922#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15921#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15920#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15919#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15918#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15917#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15916#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15915#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15914#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15913#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 15882#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 15881#L375-3 assume !(main_~i~0 < main_~length~0); 15879#L375-4 main_~j~0 := 1; 15863#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15864#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15865#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15866#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15912#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15911#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15910#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15909#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15908#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15907#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15906#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15905#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15904#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15903#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15902#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15901#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15900#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15899#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15898#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15897#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15896#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15895#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15894#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15893#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15892#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15891#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15890#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15889#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15888#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15887#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15886#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15885#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15884#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15875#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 15876#L380-2 [2021-11-02 22:37:34,939 INFO L793 eck$LassoCheckResult]: Loop: 15876#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 15883#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 15876#L380-2 [2021-11-02 22:37:34,940 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:37:34,940 INFO L85 PathProgramCache]: Analyzing trace with hash -771860143, now seen corresponding path program 49 times [2021-11-02 22:37:34,940 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:37:34,940 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1900690515] [2021-11-02 22:37:34,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:37:34,941 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:37:35,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:37:36,671 INFO L134 CoverageAnalysis]: Checked inductivity of 633 backedges. 0 proven. 633 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:37:36,671 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:37:36,671 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1900690515] [2021-11-02 22:37:36,671 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1900690515] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:37:36,671 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [135592354] [2021-11-02 22:37:36,671 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-02 22:37:36,671 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:37:36,672 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:37:36,673 INFO L229 MonitoredProcess]: Starting monitored process 74 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:37:36,676 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (74)] Waiting until timeout for monitored process [2021-11-02 22:37:38,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:37:38,861 INFO L263 TraceCheckSpWp]: Trace formula consists of 478 conjuncts, 82 conjunts are in the unsatisfiable core [2021-11-02 22:37:38,863 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:37:40,022 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:37:40,181 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:37:40,182 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-11-02 22:37:40,357 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:37:40,373 INFO L354 Elim1Store]: treesize reduction 60, result has 24.1 percent of original size [2021-11-02 22:37:40,374 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 36 treesize of output 38 [2021-11-02 22:37:42,542 INFO L354 Elim1Store]: treesize reduction 52, result has 11.9 percent of original size [2021-11-02 22:37:42,543 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 40 treesize of output 24 [2021-11-02 22:37:42,547 INFO L134 CoverageAnalysis]: Checked inductivity of 633 backedges. 0 proven. 633 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:37:42,547 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [135592354] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:37:42,547 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:37:42,548 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 43] total 82 [2021-11-02 22:37:42,548 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1459495795] [2021-11-02 22:37:42,548 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:37:42,548 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:37:42,549 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 54 times [2021-11-02 22:37:42,549 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:37:42,549 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1368918386] [2021-11-02 22:37:42,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:37:42,549 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:37:42,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:37:42,568 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:37:42,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:37:42,571 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:37:42,639 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:37:42,639 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 83 interpolants. [2021-11-02 22:37:42,640 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=290, Invalid=6516, Unknown=0, NotChecked=0, Total=6806 [2021-11-02 22:37:42,640 INFO L87 Difference]: Start difference. First operand 82 states and 85 transitions. cyclomatic complexity: 6 Second operand has 83 states, 82 states have (on average 1.9024390243902438) internal successors, (156), 83 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:37:46,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:37:46,229 INFO L93 Difference]: Finished difference Result 86 states and 89 transitions. [2021-11-02 22:37:46,229 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2021-11-02 22:37:46,229 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 86 states and 89 transitions. [2021-11-02 22:37:46,229 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:37:46,230 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 86 states to 85 states and 88 transitions. [2021-11-02 22:37:46,230 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:37:46,230 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:37:46,230 INFO L73 IsDeterministic]: Start isDeterministic. Operand 85 states and 88 transitions. [2021-11-02 22:37:46,230 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:37:46,230 INFO L681 BuchiCegarLoop]: Abstraction has 85 states and 88 transitions. [2021-11-02 22:37:46,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states and 88 transitions. [2021-11-02 22:37:46,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 84. [2021-11-02 22:37:46,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 84 states, 84 states have (on average 1.0357142857142858) internal successors, (87), 83 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:37:46,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 87 transitions. [2021-11-02 22:37:46,234 INFO L704 BuchiCegarLoop]: Abstraction has 84 states and 87 transitions. [2021-11-02 22:37:46,234 INFO L587 BuchiCegarLoop]: Abstraction has 84 states and 87 transitions. [2021-11-02 22:37:46,234 INFO L425 BuchiCegarLoop]: ======== Iteration 56============ [2021-11-02 22:37:46,235 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 84 states and 87 transitions. [2021-11-02 22:37:46,235 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:37:46,235 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:37:46,235 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:37:46,237 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [19, 19, 18, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:37:46,237 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:37:46,238 INFO L791 eck$LassoCheckResult]: Stem: 16396#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 16397#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 16407#L367 assume !(main_~length~0 < 1); 16398#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 16399#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 16408#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 16400#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16401#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16402#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16403#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16444#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16443#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16442#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16441#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16440#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16439#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16438#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16437#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16436#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16435#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16434#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16433#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16432#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16431#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16430#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16429#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16428#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16427#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16426#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16425#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16424#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16423#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16422#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16421#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16420#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16419#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16418#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16417#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16416#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16415#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16414#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16413#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16412#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16411#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16410#L375-3 assume !(main_~i~0 < main_~length~0); 16409#L375-4 main_~j~0 := 1; 16392#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16393#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16394#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16395#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16406#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16475#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16474#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16473#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16472#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16471#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16470#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16469#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16468#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16467#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16466#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16465#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16464#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16463#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16462#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16461#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16460#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16459#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16458#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16457#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16456#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16455#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16454#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16453#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16452#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16451#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16450#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16449#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16448#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16447#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16446#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16404#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 16405#L380-2 [2021-11-02 22:37:46,238 INFO L793 eck$LassoCheckResult]: Loop: 16405#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16445#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16405#L380-2 [2021-11-02 22:37:46,239 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:37:46,239 INFO L85 PathProgramCache]: Analyzing trace with hash 1271744340, now seen corresponding path program 50 times [2021-11-02 22:37:46,239 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:37:46,239 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2143445923] [2021-11-02 22:37:46,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:37:46,240 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:37:46,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:37:47,715 INFO L134 CoverageAnalysis]: Checked inductivity of 667 backedges. 0 proven. 667 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:37:47,715 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:37:47,715 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2143445923] [2021-11-02 22:37:47,715 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2143445923] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:37:47,715 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1835315608] [2021-11-02 22:37:47,716 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-11-02 22:37:47,716 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:37:47,716 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:37:47,717 INFO L229 MonitoredProcess]: Starting monitored process 75 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:37:47,718 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (75)] Waiting until timeout for monitored process [2021-11-02 22:37:49,739 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-11-02 22:37:49,739 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:37:49,743 INFO L263 TraceCheckSpWp]: Trace formula consists of 493 conjuncts, 80 conjunts are in the unsatisfiable core [2021-11-02 22:37:49,745 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:37:50,004 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:37:50,058 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 35 [2021-11-02 22:37:50,068 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:37:50,068 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 42 [2021-11-02 22:37:51,577 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:37:51,577 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:37:51,584 INFO L134 CoverageAnalysis]: Checked inductivity of 667 backedges. 0 proven. 667 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:37:51,584 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1835315608] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:37:51,584 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:37:51,585 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42] total 60 [2021-11-02 22:37:51,585 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [439102438] [2021-11-02 22:37:51,585 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:37:51,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:37:51,586 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 55 times [2021-11-02 22:37:51,586 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:37:51,586 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [310578976] [2021-11-02 22:37:51,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:37:51,586 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:37:51,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:37:51,601 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:37:51,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:37:51,603 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:37:51,673 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:37:51,673 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2021-11-02 22:37:51,674 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=158, Invalid=3502, Unknown=0, NotChecked=0, Total=3660 [2021-11-02 22:37:51,674 INFO L87 Difference]: Start difference. First operand 84 states and 87 transitions. cyclomatic complexity: 6 Second operand has 61 states, 60 states have (on average 2.0) internal successors, (120), 61 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:37:54,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:37:54,286 INFO L93 Difference]: Finished difference Result 129 states and 135 transitions. [2021-11-02 22:37:54,287 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2021-11-02 22:37:54,287 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 129 states and 135 transitions. [2021-11-02 22:37:54,287 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:37:54,289 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 129 states to 128 states and 134 transitions. [2021-11-02 22:37:54,289 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:37:54,289 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:37:54,289 INFO L73 IsDeterministic]: Start isDeterministic. Operand 128 states and 134 transitions. [2021-11-02 22:37:54,290 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:37:54,290 INFO L681 BuchiCegarLoop]: Abstraction has 128 states and 134 transitions. [2021-11-02 22:37:54,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states and 134 transitions. [2021-11-02 22:37:54,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 90. [2021-11-02 22:37:54,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 90 states, 90 states have (on average 1.0444444444444445) internal successors, (94), 89 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:37:54,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 94 transitions. [2021-11-02 22:37:54,293 INFO L704 BuchiCegarLoop]: Abstraction has 90 states and 94 transitions. [2021-11-02 22:37:54,293 INFO L587 BuchiCegarLoop]: Abstraction has 90 states and 94 transitions. [2021-11-02 22:37:54,293 INFO L425 BuchiCegarLoop]: ======== Iteration 57============ [2021-11-02 22:37:54,294 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 90 states and 94 transitions. [2021-11-02 22:37:54,295 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:37:54,295 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:37:54,295 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:37:54,296 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [19, 19, 19, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:37:54,296 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:37:54,297 INFO L791 eck$LassoCheckResult]: Stem: 16919#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 16920#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 16930#L367 assume !(main_~length~0 < 1); 16921#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 16922#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 16931#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 16923#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16924#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16925#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16926#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16969#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16968#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16967#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16966#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16965#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16964#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16963#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16962#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16961#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16960#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16959#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16958#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16957#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16956#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16955#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16954#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16953#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16952#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16951#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16950#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16949#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16948#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16947#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16946#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16945#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16944#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16943#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16942#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16941#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16940#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16939#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16938#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16937#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 16936#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 16934#L375-3 assume !(main_~i~0 < main_~length~0); 16932#L375-4 main_~j~0 := 1; 16933#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 17003#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16918#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16917#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16929#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 17002#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 17001#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 17000#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16999#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16998#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16997#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16996#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16995#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16994#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16993#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16992#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16991#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16990#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16989#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16988#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16987#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16986#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16985#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16984#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16983#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16982#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16981#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16980#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16979#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16978#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16977#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16976#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16975#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16974#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16973#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16972#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16971#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16927#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 16928#L380-2 [2021-11-02 22:37:54,297 INFO L793 eck$LassoCheckResult]: Loop: 16928#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 16970#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 16928#L380-2 [2021-11-02 22:37:54,297 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:37:54,298 INFO L85 PathProgramCache]: Analyzing trace with hash -1919369065, now seen corresponding path program 51 times [2021-11-02 22:37:54,298 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:37:54,298 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1682134763] [2021-11-02 22:37:54,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:37:54,298 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:37:54,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:37:55,119 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 307 proven. 396 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:37:55,119 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:37:55,119 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1682134763] [2021-11-02 22:37:55,119 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1682134763] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:37:55,119 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [637995826] [2021-11-02 22:37:55,120 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-02 22:37:55,120 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:37:55,120 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:37:55,121 INFO L229 MonitoredProcess]: Starting monitored process 76 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:37:55,123 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (76)] Waiting until timeout for monitored process [2021-11-02 22:37:58,296 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 20 check-sat command(s) [2021-11-02 22:37:58,296 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:37:58,305 INFO L263 TraceCheckSpWp]: Trace formula consists of 508 conjuncts, 41 conjunts are in the unsatisfiable core [2021-11-02 22:37:58,307 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:37:59,453 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 342 proven. 361 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:37:59,454 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [637995826] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:37:59,454 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:37:59,454 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42] total 62 [2021-11-02 22:37:59,454 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1339103702] [2021-11-02 22:37:59,454 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:37:59,455 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:37:59,455 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 56 times [2021-11-02 22:37:59,455 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:37:59,455 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [169851384] [2021-11-02 22:37:59,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:37:59,455 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:37:59,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:37:59,470 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:37:59,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:37:59,472 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:37:59,536 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:37:59,537 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2021-11-02 22:37:59,538 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=847, Invalid=2935, Unknown=0, NotChecked=0, Total=3782 [2021-11-02 22:37:59,538 INFO L87 Difference]: Start difference. First operand 90 states and 94 transitions. cyclomatic complexity: 7 Second operand has 62 states, 62 states have (on average 2.0161290322580645) internal successors, (125), 62 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:38:00,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:38:00,224 INFO L93 Difference]: Finished difference Result 125 states and 128 transitions. [2021-11-02 22:38:00,225 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2021-11-02 22:38:00,225 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 125 states and 128 transitions. [2021-11-02 22:38:00,225 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:38:00,226 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 125 states to 87 states and 90 transitions. [2021-11-02 22:38:00,226 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:38:00,226 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:38:00,226 INFO L73 IsDeterministic]: Start isDeterministic. Operand 87 states and 90 transitions. [2021-11-02 22:38:00,226 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:38:00,226 INFO L681 BuchiCegarLoop]: Abstraction has 87 states and 90 transitions. [2021-11-02 22:38:00,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states and 90 transitions. [2021-11-02 22:38:00,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 86. [2021-11-02 22:38:00,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 86 states, 86 states have (on average 1.0348837209302326) internal successors, (89), 85 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:38:00,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 89 transitions. [2021-11-02 22:38:00,228 INFO L704 BuchiCegarLoop]: Abstraction has 86 states and 89 transitions. [2021-11-02 22:38:00,228 INFO L587 BuchiCegarLoop]: Abstraction has 86 states and 89 transitions. [2021-11-02 22:38:00,228 INFO L425 BuchiCegarLoop]: ======== Iteration 58============ [2021-11-02 22:38:00,228 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 86 states and 89 transitions. [2021-11-02 22:38:00,229 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:38:00,229 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:38:00,229 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:38:00,229 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [20, 20, 18, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:38:00,230 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:38:00,230 INFO L791 eck$LassoCheckResult]: Stem: 17489#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 17490#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 17499#L367 assume !(main_~length~0 < 1); 17491#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 17492#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 17500#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 17493#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 17494#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 17495#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 17496#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 17502#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 17570#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 17569#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 17568#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 17567#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 17566#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 17565#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 17564#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 17563#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 17562#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 17561#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 17560#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 17559#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 17558#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 17557#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 17556#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 17555#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 17554#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 17553#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 17552#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 17551#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 17550#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 17549#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 17548#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 17547#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 17546#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 17545#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 17544#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 17543#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 17542#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 17541#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 17540#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 17539#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 17538#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 17537#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 17504#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 17503#L375-3 assume !(main_~i~0 < main_~length~0); 17501#L375-4 main_~j~0 := 1; 17485#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 17486#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 17487#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 17488#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 17536#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 17535#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 17534#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 17533#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 17532#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 17531#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 17530#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 17529#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 17528#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 17527#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 17526#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 17525#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 17524#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 17523#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 17522#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 17521#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 17520#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 17519#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 17518#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 17517#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 17516#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 17515#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 17514#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 17513#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 17512#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 17511#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 17510#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 17509#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 17508#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 17506#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 17505#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 17497#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 17498#L380-2 [2021-11-02 22:38:00,230 INFO L793 eck$LassoCheckResult]: Loop: 17498#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 17507#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 17498#L380-2 [2021-11-02 22:38:00,231 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:38:00,231 INFO L85 PathProgramCache]: Analyzing trace with hash -1250528074, now seen corresponding path program 52 times [2021-11-02 22:38:00,231 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:38:00,231 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [904788490] [2021-11-02 22:38:00,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:38:00,232 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:38:00,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:38:01,761 INFO L134 CoverageAnalysis]: Checked inductivity of 706 backedges. 0 proven. 706 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:38:01,762 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:38:01,762 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [904788490] [2021-11-02 22:38:01,762 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [904788490] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:38:01,762 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [449751460] [2021-11-02 22:38:01,762 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-11-02 22:38:01,762 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:38:01,763 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:38:01,764 INFO L229 MonitoredProcess]: Starting monitored process 77 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:38:01,765 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (77)] Waiting until timeout for monitored process [2021-11-02 22:38:04,752 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-11-02 22:38:04,752 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:38:04,760 INFO L263 TraceCheckSpWp]: Trace formula consists of 503 conjuncts, 85 conjunts are in the unsatisfiable core [2021-11-02 22:38:04,761 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:38:05,004 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:38:05,058 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 29 [2021-11-02 22:38:05,068 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:38:05,069 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 36 [2021-11-02 22:38:05,220 INFO L354 Elim1Store]: treesize reduction 80, result has 20.8 percent of original size [2021-11-02 22:38:05,221 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 46 treesize of output 48 [2021-11-02 22:38:06,784 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:38:06,784 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:38:06,788 INFO L134 CoverageAnalysis]: Checked inductivity of 706 backedges. 0 proven. 706 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:38:06,788 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [449751460] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:38:06,788 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:38:06,788 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 44] total 62 [2021-11-02 22:38:06,789 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [200673993] [2021-11-02 22:38:06,793 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:38:06,793 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:38:06,793 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 57 times [2021-11-02 22:38:06,794 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:38:06,794 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [388567081] [2021-11-02 22:38:06,794 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:38:06,794 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:38:06,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:38:06,811 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:38:06,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:38:06,814 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:38:06,885 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:38:06,885 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 63 interpolants. [2021-11-02 22:38:06,886 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=165, Invalid=3741, Unknown=0, NotChecked=0, Total=3906 [2021-11-02 22:38:06,886 INFO L87 Difference]: Start difference. First operand 86 states and 89 transitions. cyclomatic complexity: 6 Second operand has 63 states, 62 states have (on average 1.9838709677419355) internal successors, (123), 63 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:38:10,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:38:10,102 INFO L93 Difference]: Finished difference Result 90 states and 93 transitions. [2021-11-02 22:38:10,102 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2021-11-02 22:38:10,102 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 90 states and 93 transitions. [2021-11-02 22:38:10,102 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:38:10,103 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 90 states to 89 states and 92 transitions. [2021-11-02 22:38:10,103 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:38:10,103 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:38:10,104 INFO L73 IsDeterministic]: Start isDeterministic. Operand 89 states and 92 transitions. [2021-11-02 22:38:10,104 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:38:10,104 INFO L681 BuchiCegarLoop]: Abstraction has 89 states and 92 transitions. [2021-11-02 22:38:10,104 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states and 92 transitions. [2021-11-02 22:38:10,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 88. [2021-11-02 22:38:10,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 88 states have (on average 1.0340909090909092) internal successors, (91), 87 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:38:10,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 91 transitions. [2021-11-02 22:38:10,106 INFO L704 BuchiCegarLoop]: Abstraction has 88 states and 91 transitions. [2021-11-02 22:38:10,107 INFO L587 BuchiCegarLoop]: Abstraction has 88 states and 91 transitions. [2021-11-02 22:38:10,107 INFO L425 BuchiCegarLoop]: ======== Iteration 59============ [2021-11-02 22:38:10,107 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 88 states and 91 transitions. [2021-11-02 22:38:10,107 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:38:10,107 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:38:10,108 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:38:10,108 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [20, 20, 19, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:38:10,109 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:38:10,109 INFO L791 eck$LassoCheckResult]: Stem: 18024#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 18025#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 18031#L367 assume !(main_~length~0 < 1); 18026#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 18027#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 18032#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 18020#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18021#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18022#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18023#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18070#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18069#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18068#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18067#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18066#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18065#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18064#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18063#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18062#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18061#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18060#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18059#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18058#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18057#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18056#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18055#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18054#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18053#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18052#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18051#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18050#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18049#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18048#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18047#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18046#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18045#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18044#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18043#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18042#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18041#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18040#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18039#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18038#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18037#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18036#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18035#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18034#L375-3 assume !(main_~i~0 < main_~length~0); 18033#L375-4 main_~j~0 := 1; 18016#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18017#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18018#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18019#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18030#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18103#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18102#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18101#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18100#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18099#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18098#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18097#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18096#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18095#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18094#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18093#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18092#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18091#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18090#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18089#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18088#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18087#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18086#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18085#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18084#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18083#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18082#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18081#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18080#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18079#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18078#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18077#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18076#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18075#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18074#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18072#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18071#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18028#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 18029#L380-2 [2021-11-02 22:38:10,109 INFO L793 eck$LassoCheckResult]: Loop: 18029#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18073#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18029#L380-2 [2021-11-02 22:38:10,110 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:38:10,110 INFO L85 PathProgramCache]: Analyzing trace with hash 833363321, now seen corresponding path program 53 times [2021-11-02 22:38:10,110 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:38:10,110 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [204673735] [2021-11-02 22:38:10,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:38:10,111 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:38:10,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:38:11,505 INFO L134 CoverageAnalysis]: Checked inductivity of 742 backedges. 0 proven. 742 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:38:11,505 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:38:11,505 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [204673735] [2021-11-02 22:38:11,505 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [204673735] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:38:11,505 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [889375072] [2021-11-02 22:38:11,505 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-02 22:38:11,506 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:38:11,506 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:38:11,507 INFO L229 MonitoredProcess]: Starting monitored process 78 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:38:11,508 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (78)] Waiting until timeout for monitored process [2021-11-02 22:38:13,874 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 21 check-sat command(s) [2021-11-02 22:38:13,875 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:38:13,882 INFO L263 TraceCheckSpWp]: Trace formula consists of 518 conjuncts, 88 conjunts are in the unsatisfiable core [2021-11-02 22:38:13,884 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:38:15,162 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:38:15,332 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:38:15,333 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2021-11-02 22:38:17,536 INFO L354 Elim1Store]: treesize reduction 52, result has 11.9 percent of original size [2021-11-02 22:38:17,537 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 40 treesize of output 24 [2021-11-02 22:38:17,541 INFO L134 CoverageAnalysis]: Checked inductivity of 742 backedges. 0 proven. 742 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:38:17,541 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [889375072] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:38:17,541 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:38:17,542 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 45] total 87 [2021-11-02 22:38:17,542 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1251316906] [2021-11-02 22:38:17,543 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:38:17,543 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:38:17,543 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 58 times [2021-11-02 22:38:17,543 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:38:17,543 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2000588232] [2021-11-02 22:38:17,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:38:17,544 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:38:17,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:38:17,591 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:38:17,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:38:17,595 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:38:17,649 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:38:17,649 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 88 interpolants. [2021-11-02 22:38:17,653 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=302, Invalid=7354, Unknown=0, NotChecked=0, Total=7656 [2021-11-02 22:38:17,653 INFO L87 Difference]: Start difference. First operand 88 states and 91 transitions. cyclomatic complexity: 6 Second operand has 88 states, 87 states have (on average 1.9310344827586208) internal successors, (168), 88 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:38:20,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:38:20,169 INFO L93 Difference]: Finished difference Result 135 states and 141 transitions. [2021-11-02 22:38:20,169 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2021-11-02 22:38:20,170 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 135 states and 141 transitions. [2021-11-02 22:38:20,170 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:38:20,171 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 135 states to 134 states and 140 transitions. [2021-11-02 22:38:20,171 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:38:20,171 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:38:20,171 INFO L73 IsDeterministic]: Start isDeterministic. Operand 134 states and 140 transitions. [2021-11-02 22:38:20,171 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:38:20,171 INFO L681 BuchiCegarLoop]: Abstraction has 134 states and 140 transitions. [2021-11-02 22:38:20,171 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states and 140 transitions. [2021-11-02 22:38:20,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 94. [2021-11-02 22:38:20,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 94 states, 94 states have (on average 1.0425531914893618) internal successors, (98), 93 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:38:20,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 98 transitions. [2021-11-02 22:38:20,174 INFO L704 BuchiCegarLoop]: Abstraction has 94 states and 98 transitions. [2021-11-02 22:38:20,174 INFO L587 BuchiCegarLoop]: Abstraction has 94 states and 98 transitions. [2021-11-02 22:38:20,174 INFO L425 BuchiCegarLoop]: ======== Iteration 60============ [2021-11-02 22:38:20,174 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 94 states and 98 transitions. [2021-11-02 22:38:20,174 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:38:20,175 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:38:20,175 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:38:20,175 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [20, 20, 20, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:38:20,176 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:38:20,176 INFO L791 eck$LassoCheckResult]: Stem: 18592#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 18593#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 18603#L367 assume !(main_~length~0 < 1); 18594#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 18595#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 18604#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 18596#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18597#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18598#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18599#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18644#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18643#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18642#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18641#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18640#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18639#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18638#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18637#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18636#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18635#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18634#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18633#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18632#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18631#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18630#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18629#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18628#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18627#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18626#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18625#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18624#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18623#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18622#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18621#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18620#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18619#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18618#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18617#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18616#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18615#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18614#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18613#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18612#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18611#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18610#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 18609#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 18607#L375-3 assume !(main_~i~0 < main_~length~0); 18605#L375-4 main_~j~0 := 1; 18606#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18680#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18591#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18590#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18602#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18679#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18678#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18677#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18676#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18675#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18674#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18673#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18672#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18671#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18670#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18669#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18668#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18667#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18666#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18665#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18664#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18663#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18662#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18661#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18660#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18659#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18658#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18657#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18656#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18655#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18654#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18653#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18652#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18651#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18650#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18649#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18648#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18646#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18645#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18600#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 18601#L380-2 [2021-11-02 22:38:20,176 INFO L793 eck$LassoCheckResult]: Loop: 18601#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 18647#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 18601#L380-2 [2021-11-02 22:38:20,177 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:38:20,177 INFO L85 PathProgramCache]: Analyzing trace with hash 1998233980, now seen corresponding path program 54 times [2021-11-02 22:38:20,177 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:38:20,177 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1480634680] [2021-11-02 22:38:20,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:38:20,178 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:38:20,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:38:21,092 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 343 proven. 437 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:38:21,092 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:38:21,092 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1480634680] [2021-11-02 22:38:21,093 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1480634680] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:38:21,093 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1157219862] [2021-11-02 22:38:21,093 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-11-02 22:38:21,093 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:38:21,093 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:38:21,095 INFO L229 MonitoredProcess]: Starting monitored process 79 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:38:21,095 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (79)] Waiting until timeout for monitored process [2021-11-02 22:38:26,052 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 21 check-sat command(s) [2021-11-02 22:38:26,052 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:38:26,066 INFO L263 TraceCheckSpWp]: Trace formula consists of 533 conjuncts, 43 conjunts are in the unsatisfiable core [2021-11-02 22:38:26,067 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:38:27,037 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 380 proven. 400 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:38:27,037 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1157219862] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:38:27,037 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:38:27,037 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 44] total 65 [2021-11-02 22:38:27,037 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [449430699] [2021-11-02 22:38:27,037 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:38:27,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:38:27,038 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 59 times [2021-11-02 22:38:27,038 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:38:27,038 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1236212579] [2021-11-02 22:38:27,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:38:27,038 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:38:27,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:38:27,051 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:38:27,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:38:27,053 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:38:27,123 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:38:27,124 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2021-11-02 22:38:27,125 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=931, Invalid=3229, Unknown=0, NotChecked=0, Total=4160 [2021-11-02 22:38:27,125 INFO L87 Difference]: Start difference. First operand 94 states and 98 transitions. cyclomatic complexity: 7 Second operand has 65 states, 65 states have (on average 2.0153846153846153) internal successors, (131), 65 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:38:27,854 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:38:27,854 INFO L93 Difference]: Finished difference Result 131 states and 134 transitions. [2021-11-02 22:38:27,854 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2021-11-02 22:38:27,854 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 131 states and 134 transitions. [2021-11-02 22:38:27,855 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:38:27,856 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 131 states to 91 states and 94 transitions. [2021-11-02 22:38:27,856 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:38:27,856 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:38:27,856 INFO L73 IsDeterministic]: Start isDeterministic. Operand 91 states and 94 transitions. [2021-11-02 22:38:27,856 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:38:27,857 INFO L681 BuchiCegarLoop]: Abstraction has 91 states and 94 transitions. [2021-11-02 22:38:27,857 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states and 94 transitions. [2021-11-02 22:38:27,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 90. [2021-11-02 22:38:27,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 90 states, 90 states have (on average 1.0333333333333334) internal successors, (93), 89 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:38:27,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 93 transitions. [2021-11-02 22:38:27,858 INFO L704 BuchiCegarLoop]: Abstraction has 90 states and 93 transitions. [2021-11-02 22:38:27,858 INFO L587 BuchiCegarLoop]: Abstraction has 90 states and 93 transitions. [2021-11-02 22:38:27,858 INFO L425 BuchiCegarLoop]: ======== Iteration 61============ [2021-11-02 22:38:27,858 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 90 states and 93 transitions. [2021-11-02 22:38:27,859 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:38:27,859 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:38:27,859 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:38:27,860 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [21, 21, 19, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:38:27,860 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:38:27,860 INFO L791 eck$LassoCheckResult]: Stem: 19189#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 19190#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 19199#L367 assume !(main_~length~0 < 1); 19191#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 19192#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 19200#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 19193#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19194#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19195#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19196#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19202#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19274#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19273#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19272#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19271#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19270#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19269#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19268#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19267#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19266#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19265#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19264#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19263#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19262#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19261#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19260#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19259#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19258#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19257#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19256#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19255#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19254#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19253#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19252#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19251#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19250#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19249#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19248#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19247#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19246#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19245#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19244#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19243#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19242#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19241#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19240#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19239#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19204#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19203#L375-3 assume !(main_~i~0 < main_~length~0); 19201#L375-4 main_~j~0 := 1; 19185#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19186#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19187#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19188#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19238#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19237#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19236#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19235#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19234#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19233#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19232#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19231#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19230#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19229#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19228#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19227#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19226#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19225#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19224#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19223#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19222#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19221#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19220#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19219#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19218#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19217#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19216#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19215#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19214#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19213#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19212#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19211#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19210#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19209#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19208#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19206#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19205#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19197#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 19198#L380-2 [2021-11-02 22:38:27,861 INFO L793 eck$LassoCheckResult]: Loop: 19198#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19207#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19198#L380-2 [2021-11-02 22:38:27,861 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:38:27,861 INFO L85 PathProgramCache]: Analyzing trace with hash 509331931, now seen corresponding path program 55 times [2021-11-02 22:38:27,861 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:38:27,862 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [219426200] [2021-11-02 22:38:27,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:38:27,862 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:38:28,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:38:29,248 INFO L134 CoverageAnalysis]: Checked inductivity of 783 backedges. 0 proven. 783 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:38:29,248 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:38:29,249 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [219426200] [2021-11-02 22:38:29,249 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [219426200] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:38:29,249 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [47424062] [2021-11-02 22:38:29,249 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-02 22:38:29,249 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:38:29,249 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:38:29,250 INFO L229 MonitoredProcess]: Starting monitored process 80 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:38:29,251 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (80)] Waiting until timeout for monitored process [2021-11-02 22:38:31,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:38:31,093 INFO L263 TraceCheckSpWp]: Trace formula consists of 528 conjuncts, 90 conjunts are in the unsatisfiable core [2021-11-02 22:38:31,095 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:38:32,201 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:38:32,339 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:38:32,339 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-11-02 22:38:32,480 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:38:32,493 INFO L354 Elim1Store]: treesize reduction 60, result has 24.1 percent of original size [2021-11-02 22:38:32,493 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 36 treesize of output 38 [2021-11-02 22:38:34,627 INFO L354 Elim1Store]: treesize reduction 52, result has 11.9 percent of original size [2021-11-02 22:38:34,628 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 40 treesize of output 24 [2021-11-02 22:38:34,632 INFO L134 CoverageAnalysis]: Checked inductivity of 783 backedges. 0 proven. 783 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:38:34,632 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [47424062] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:38:34,632 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:38:34,632 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [45, 47] total 90 [2021-11-02 22:38:34,632 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [359194890] [2021-11-02 22:38:34,633 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:38:34,633 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:38:34,633 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 60 times [2021-11-02 22:38:34,633 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:38:34,633 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1638245510] [2021-11-02 22:38:34,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:38:34,633 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:38:34,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:38:34,650 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:38:34,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:38:34,652 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:38:34,719 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:38:34,720 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 91 interpolants. [2021-11-02 22:38:34,720 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=318, Invalid=7872, Unknown=0, NotChecked=0, Total=8190 [2021-11-02 22:38:34,721 INFO L87 Difference]: Start difference. First operand 90 states and 93 transitions. cyclomatic complexity: 6 Second operand has 91 states, 90 states have (on average 1.9111111111111112) internal successors, (172), 91 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:38:38,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:38:38,535 INFO L93 Difference]: Finished difference Result 94 states and 97 transitions. [2021-11-02 22:38:38,535 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2021-11-02 22:38:38,535 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 94 states and 97 transitions. [2021-11-02 22:38:38,535 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:38:38,536 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 94 states to 93 states and 96 transitions. [2021-11-02 22:38:38,536 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:38:38,537 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:38:38,537 INFO L73 IsDeterministic]: Start isDeterministic. Operand 93 states and 96 transitions. [2021-11-02 22:38:38,537 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:38:38,537 INFO L681 BuchiCegarLoop]: Abstraction has 93 states and 96 transitions. [2021-11-02 22:38:38,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states and 96 transitions. [2021-11-02 22:38:38,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 92. [2021-11-02 22:38:38,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 92 states, 92 states have (on average 1.0326086956521738) internal successors, (95), 91 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:38:38,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 95 transitions. [2021-11-02 22:38:38,539 INFO L704 BuchiCegarLoop]: Abstraction has 92 states and 95 transitions. [2021-11-02 22:38:38,540 INFO L587 BuchiCegarLoop]: Abstraction has 92 states and 95 transitions. [2021-11-02 22:38:38,540 INFO L425 BuchiCegarLoop]: ======== Iteration 62============ [2021-11-02 22:38:38,540 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 92 states and 95 transitions. [2021-11-02 22:38:38,540 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:38:38,540 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:38:38,541 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:38:38,541 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [21, 21, 20, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:38:38,541 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:38:38,542 INFO L791 eck$LassoCheckResult]: Stem: 19770#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 19771#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 19781#L367 assume !(main_~length~0 < 1); 19772#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 19773#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 19782#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 19774#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19775#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19776#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19777#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19822#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19821#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19820#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19819#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19818#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19817#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19816#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19815#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19814#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19813#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19812#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19811#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19810#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19809#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19808#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19807#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19806#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19805#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19804#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19803#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19802#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19801#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19800#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19799#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19798#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19797#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19796#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19795#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19794#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19793#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19792#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19791#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19790#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19789#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19788#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19787#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19786#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 19785#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 19784#L375-3 assume !(main_~i~0 < main_~length~0); 19783#L375-4 main_~j~0 := 1; 19766#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19767#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19768#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19769#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19780#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19857#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19856#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19855#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19854#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19853#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19852#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19851#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19850#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19849#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19848#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19847#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19846#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19845#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19844#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19843#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19842#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19841#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19840#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19839#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19838#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19837#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19836#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19835#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19834#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19833#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19832#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19831#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19830#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19829#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19828#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19827#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19826#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19825#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19824#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19778#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 19779#L380-2 [2021-11-02 22:38:38,542 INFO L793 eck$LassoCheckResult]: Loop: 19779#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 19823#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 19779#L380-2 [2021-11-02 22:38:38,542 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:38:38,543 INFO L85 PathProgramCache]: Analyzing trace with hash -158286498, now seen corresponding path program 56 times [2021-11-02 22:38:38,543 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:38:38,543 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1738444331] [2021-11-02 22:38:38,543 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:38:38,543 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:38:38,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:38:40,082 INFO L134 CoverageAnalysis]: Checked inductivity of 821 backedges. 0 proven. 821 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:38:40,082 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:38:40,082 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1738444331] [2021-11-02 22:38:40,083 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1738444331] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:38:40,083 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [104900750] [2021-11-02 22:38:40,083 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-11-02 22:38:40,083 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:38:40,083 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:38:40,084 INFO L229 MonitoredProcess]: Starting monitored process 81 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:38:40,085 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (81)] Waiting until timeout for monitored process [2021-11-02 22:38:42,051 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-11-02 22:38:42,051 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:38:42,054 INFO L263 TraceCheckSpWp]: Trace formula consists of 543 conjuncts, 88 conjunts are in the unsatisfiable core [2021-11-02 22:38:42,056 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:38:42,306 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:38:42,346 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 35 [2021-11-02 22:38:42,360 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:38:42,361 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 42 [2021-11-02 22:38:43,813 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:38:43,814 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:38:43,817 INFO L134 CoverageAnalysis]: Checked inductivity of 821 backedges. 0 proven. 821 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:38:43,817 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [104900750] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:38:43,817 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:38:43,817 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 46] total 66 [2021-11-02 22:38:43,817 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [344983636] [2021-11-02 22:38:43,817 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:38:43,818 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:38:43,818 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 61 times [2021-11-02 22:38:43,818 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:38:43,818 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [816299743] [2021-11-02 22:38:43,818 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:38:43,818 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:38:43,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:38:43,834 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:38:43,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:38:43,837 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:38:43,899 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:38:43,900 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 67 interpolants. [2021-11-02 22:38:43,900 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=174, Invalid=4248, Unknown=0, NotChecked=0, Total=4422 [2021-11-02 22:38:43,900 INFO L87 Difference]: Start difference. First operand 92 states and 95 transitions. cyclomatic complexity: 6 Second operand has 67 states, 66 states have (on average 2.0) internal successors, (132), 67 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:38:46,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:38:46,332 INFO L93 Difference]: Finished difference Result 141 states and 147 transitions. [2021-11-02 22:38:46,332 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2021-11-02 22:38:46,333 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 141 states and 147 transitions. [2021-11-02 22:38:46,333 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:38:46,334 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 141 states to 140 states and 146 transitions. [2021-11-02 22:38:46,334 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:38:46,334 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:38:46,334 INFO L73 IsDeterministic]: Start isDeterministic. Operand 140 states and 146 transitions. [2021-11-02 22:38:46,334 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:38:46,334 INFO L681 BuchiCegarLoop]: Abstraction has 140 states and 146 transitions. [2021-11-02 22:38:46,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states and 146 transitions. [2021-11-02 22:38:46,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 98. [2021-11-02 22:38:46,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 98 states have (on average 1.0408163265306123) internal successors, (102), 97 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:38:46,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 102 transitions. [2021-11-02 22:38:46,336 INFO L704 BuchiCegarLoop]: Abstraction has 98 states and 102 transitions. [2021-11-02 22:38:46,336 INFO L587 BuchiCegarLoop]: Abstraction has 98 states and 102 transitions. [2021-11-02 22:38:46,336 INFO L425 BuchiCegarLoop]: ======== Iteration 63============ [2021-11-02 22:38:46,336 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 98 states and 102 transitions. [2021-11-02 22:38:46,336 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:38:46,336 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:38:46,336 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:38:46,337 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [21, 21, 21, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:38:46,337 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:38:46,337 INFO L791 eck$LassoCheckResult]: Stem: 20347#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 20348#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 20354#L367 assume !(main_~length~0 < 1); 20349#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 20350#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 20355#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 20343#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20344#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20345#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20346#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20358#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20397#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20396#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20395#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20394#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20393#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20392#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20391#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20390#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20389#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20388#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20387#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20386#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20385#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20384#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20383#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20382#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20381#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20380#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20379#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20378#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20377#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20376#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20375#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20374#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20373#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20372#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20371#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20370#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20369#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20368#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20367#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20366#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20365#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20364#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20363#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20362#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20361#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20359#L375-3 assume !(main_~i~0 < main_~length~0); 20356#L375-4 main_~j~0 := 1; 20357#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20435#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20342#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20341#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20353#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20434#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20433#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20432#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20431#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20430#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20429#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20428#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20427#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20426#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20425#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20424#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20423#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20422#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20421#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20420#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20419#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20418#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20417#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20416#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20415#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20414#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20413#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20412#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20411#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20410#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20409#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20408#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20407#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20406#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20405#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20404#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20403#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20402#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20401#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20400#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20399#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20351#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 20352#L380-2 [2021-11-02 22:38:46,337 INFO L793 eck$LassoCheckResult]: Loop: 20352#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20398#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20352#L380-2 [2021-11-02 22:38:46,338 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:38:46,338 INFO L85 PathProgramCache]: Analyzing trace with hash -1789469663, now seen corresponding path program 57 times [2021-11-02 22:38:46,338 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:38:46,338 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [53493328] [2021-11-02 22:38:46,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:38:46,339 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:38:46,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:38:47,055 INFO L134 CoverageAnalysis]: Checked inductivity of 861 backedges. 381 proven. 480 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:38:47,055 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:38:47,056 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [53493328] [2021-11-02 22:38:47,056 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [53493328] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:38:47,056 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1376005585] [2021-11-02 22:38:47,056 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-02 22:38:47,056 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:38:47,056 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:38:47,057 INFO L229 MonitoredProcess]: Starting monitored process 82 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:38:47,058 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (82)] Waiting until timeout for monitored process [2021-11-02 22:38:51,933 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 22 check-sat command(s) [2021-11-02 22:38:51,933 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:38:51,945 INFO L263 TraceCheckSpWp]: Trace formula consists of 558 conjuncts, 45 conjunts are in the unsatisfiable core [2021-11-02 22:38:51,947 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:38:53,025 INFO L134 CoverageAnalysis]: Checked inductivity of 861 backedges. 420 proven. 441 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:38:53,026 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1376005585] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:38:53,026 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:38:53,026 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 46] total 68 [2021-11-02 22:38:53,026 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [734223741] [2021-11-02 22:38:53,026 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:38:53,027 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:38:53,027 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 62 times [2021-11-02 22:38:53,027 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:38:53,027 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1420356864] [2021-11-02 22:38:53,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:38:53,027 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:38:53,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:38:53,089 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:38:53,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:38:53,090 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:38:53,142 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:38:53,142 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2021-11-02 22:38:53,143 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1019, Invalid=3537, Unknown=0, NotChecked=0, Total=4556 [2021-11-02 22:38:53,143 INFO L87 Difference]: Start difference. First operand 98 states and 102 transitions. cyclomatic complexity: 7 Second operand has 68 states, 68 states have (on average 2.014705882352941) internal successors, (137), 68 states have internal predecessors, (137), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:38:53,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:38:53,753 INFO L93 Difference]: Finished difference Result 137 states and 140 transitions. [2021-11-02 22:38:53,754 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2021-11-02 22:38:53,754 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 137 states and 140 transitions. [2021-11-02 22:38:53,754 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:38:53,755 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 137 states to 95 states and 98 transitions. [2021-11-02 22:38:53,755 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:38:53,755 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:38:53,755 INFO L73 IsDeterministic]: Start isDeterministic. Operand 95 states and 98 transitions. [2021-11-02 22:38:53,755 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:38:53,755 INFO L681 BuchiCegarLoop]: Abstraction has 95 states and 98 transitions. [2021-11-02 22:38:53,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states and 98 transitions. [2021-11-02 22:38:53,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 94. [2021-11-02 22:38:53,756 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 94 states, 94 states have (on average 1.0319148936170213) internal successors, (97), 93 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:38:53,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 97 transitions. [2021-11-02 22:38:53,757 INFO L704 BuchiCegarLoop]: Abstraction has 94 states and 97 transitions. [2021-11-02 22:38:53,757 INFO L587 BuchiCegarLoop]: Abstraction has 94 states and 97 transitions. [2021-11-02 22:38:53,757 INFO L425 BuchiCegarLoop]: ======== Iteration 64============ [2021-11-02 22:38:53,757 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 94 states and 97 transitions. [2021-11-02 22:38:53,758 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:38:53,758 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:38:53,758 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:38:53,758 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [22, 22, 20, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:38:53,759 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:38:53,759 INFO L791 eck$LassoCheckResult]: Stem: 20967#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 20968#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 20977#L367 assume !(main_~length~0 < 1); 20969#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 20970#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 20978#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 20971#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20972#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20973#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20974#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20980#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21056#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21055#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21054#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21053#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21052#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21051#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21050#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21049#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21048#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21047#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21046#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21045#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21044#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21043#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21042#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21041#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21040#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21039#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21038#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21037#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21036#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21035#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21034#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21033#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21032#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21031#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21030#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21029#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21028#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21027#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21026#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21025#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21024#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21023#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21022#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21021#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21020#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21019#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 20982#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 20981#L375-3 assume !(main_~i~0 < main_~length~0); 20979#L375-4 main_~j~0 := 1; 20963#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20964#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20965#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20966#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21018#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21017#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21016#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21015#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21014#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21013#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21012#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21011#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21010#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21009#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21008#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21007#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21006#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21005#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21004#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21003#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21002#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21001#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21000#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20999#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20998#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20997#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20996#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20995#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20994#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20993#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20992#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20991#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20990#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20989#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20988#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20987#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20986#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20985#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20984#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20975#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 20976#L380-2 [2021-11-02 22:38:53,759 INFO L793 eck$LassoCheckResult]: Loop: 20976#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 20983#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 20976#L380-2 [2021-11-02 22:38:53,759 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:38:53,759 INFO L85 PathProgramCache]: Analyzing trace with hash 1894738112, now seen corresponding path program 58 times [2021-11-02 22:38:53,760 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:38:53,760 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1773113409] [2021-11-02 22:38:53,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:38:53,760 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:38:53,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:38:55,282 INFO L134 CoverageAnalysis]: Checked inductivity of 864 backedges. 0 proven. 864 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:38:55,282 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:38:55,282 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1773113409] [2021-11-02 22:38:55,283 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1773113409] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:38:55,283 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1054347238] [2021-11-02 22:38:55,283 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-11-02 22:38:55,283 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:38:55,283 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:38:55,285 INFO L229 MonitoredProcess]: Starting monitored process 83 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:38:55,286 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (83)] Waiting until timeout for monitored process [2021-11-02 22:38:58,833 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-11-02 22:38:58,834 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:38:58,843 INFO L263 TraceCheckSpWp]: Trace formula consists of 553 conjuncts, 94 conjunts are in the unsatisfiable core [2021-11-02 22:38:58,845 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:38:59,168 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:38:59,245 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 29 [2021-11-02 22:38:59,256 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:38:59,256 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 36 [2021-11-02 22:38:59,409 INFO L354 Elim1Store]: treesize reduction 84, result has 20.8 percent of original size [2021-11-02 22:38:59,410 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 36 treesize of output 38 [2021-11-02 22:39:03,116 INFO L354 Elim1Store]: treesize reduction 90, result has 7.2 percent of original size [2021-11-02 22:39:03,117 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 61 treesize of output 35 [2021-11-02 22:39:03,122 INFO L134 CoverageAnalysis]: Checked inductivity of 864 backedges. 0 proven. 864 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:39:03,122 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1054347238] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:39:03,122 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:39:03,123 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 49] total 71 [2021-11-02 22:39:03,123 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [614109409] [2021-11-02 22:39:03,123 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:39:03,124 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:39:03,124 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 63 times [2021-11-02 22:39:03,124 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:39:03,124 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1420933204] [2021-11-02 22:39:03,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:39:03,125 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:39:03,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:39:03,150 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:39:03,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:39:03,153 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:39:03,230 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:39:03,231 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2021-11-02 22:39:03,231 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=214, Invalid=4898, Unknown=0, NotChecked=0, Total=5112 [2021-11-02 22:39:03,232 INFO L87 Difference]: Start difference. First operand 94 states and 97 transitions. cyclomatic complexity: 6 Second operand has 72 states, 71 states have (on average 1.9154929577464788) internal successors, (136), 72 states have internal predecessors, (136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:39:10,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:39:10,628 INFO L93 Difference]: Finished difference Result 192 states and 201 transitions. [2021-11-02 22:39:10,628 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 72 states. [2021-11-02 22:39:10,628 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 192 states and 201 transitions. [2021-11-02 22:39:10,629 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 6 [2021-11-02 22:39:10,631 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 192 states to 190 states and 199 transitions. [2021-11-02 22:39:10,631 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 22 [2021-11-02 22:39:10,631 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 22 [2021-11-02 22:39:10,631 INFO L73 IsDeterministic]: Start isDeterministic. Operand 190 states and 199 transitions. [2021-11-02 22:39:10,631 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:39:10,631 INFO L681 BuchiCegarLoop]: Abstraction has 190 states and 199 transitions. [2021-11-02 22:39:10,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states and 199 transitions. [2021-11-02 22:39:10,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 102. [2021-11-02 22:39:10,634 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 102 states, 102 states have (on average 1.0490196078431373) internal successors, (107), 101 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:39:10,635 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 107 transitions. [2021-11-02 22:39:10,635 INFO L704 BuchiCegarLoop]: Abstraction has 102 states and 107 transitions. [2021-11-02 22:39:10,635 INFO L587 BuchiCegarLoop]: Abstraction has 102 states and 107 transitions. [2021-11-02 22:39:10,635 INFO L425 BuchiCegarLoop]: ======== Iteration 65============ [2021-11-02 22:39:10,635 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 102 states and 107 transitions. [2021-11-02 22:39:10,636 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:39:10,636 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:39:10,636 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:39:10,637 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [22, 22, 21, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:39:10,637 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:39:10,638 INFO L791 eck$LassoCheckResult]: Stem: 21688#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 21689#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 21699#L367 assume !(main_~length~0 < 1); 21690#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 21691#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 21700#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 21692#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21693#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21694#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21695#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21744#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21743#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21742#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21741#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21740#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21739#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21738#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21737#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21736#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21735#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21734#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21733#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21732#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21731#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21730#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21729#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21728#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21727#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21726#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21725#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21724#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21723#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21722#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21721#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21720#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21719#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21718#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21717#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21716#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21715#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21714#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21713#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21712#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21711#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21710#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21709#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21708#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21707#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21706#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 21705#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 21703#L375-3 assume !(main_~i~0 < main_~length~0); 21701#L375-4 main_~j~0 := 1; 21702#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21782#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21687#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21686#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21698#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21781#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21780#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21779#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21778#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21777#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21776#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21775#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21774#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21773#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21772#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21771#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21770#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21769#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21768#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21767#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21766#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21765#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21764#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21763#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21762#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21761#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21760#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21759#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21758#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21757#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21756#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21755#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21754#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21753#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21752#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21751#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21750#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21749#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21748#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21747#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21746#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21696#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 21697#L380-2 [2021-11-02 22:39:10,638 INFO L793 eck$LassoCheckResult]: Loop: 21697#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 21745#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 21697#L380-2 [2021-11-02 22:39:10,639 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:39:10,639 INFO L85 PathProgramCache]: Analyzing trace with hash -222808317, now seen corresponding path program 59 times [2021-11-02 22:39:10,639 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:39:10,639 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1498759330] [2021-11-02 22:39:10,639 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:39:10,640 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:39:10,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:39:12,565 INFO L134 CoverageAnalysis]: Checked inductivity of 904 backedges. 0 proven. 904 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:39:12,565 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:39:12,565 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1498759330] [2021-11-02 22:39:12,565 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1498759330] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:39:12,566 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [879997954] [2021-11-02 22:39:12,566 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-02 22:39:12,566 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:39:12,566 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:39:12,569 INFO L229 MonitoredProcess]: Starting monitored process 84 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:39:12,570 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (84)] Waiting until timeout for monitored process [2021-11-02 22:39:16,535 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 23 check-sat command(s) [2021-11-02 22:39:16,535 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:39:16,547 INFO L263 TraceCheckSpWp]: Trace formula consists of 568 conjuncts, 92 conjunts are in the unsatisfiable core [2021-11-02 22:39:16,549 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:39:16,851 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:39:16,906 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 35 [2021-11-02 22:39:16,916 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:39:16,916 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 42 [2021-11-02 22:39:18,872 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:39:18,872 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:39:18,876 INFO L134 CoverageAnalysis]: Checked inductivity of 904 backedges. 0 proven. 904 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:39:18,876 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [879997954] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:39:18,876 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:39:18,877 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48] total 69 [2021-11-02 22:39:18,877 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [94346257] [2021-11-02 22:39:18,877 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:39:18,878 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:39:18,878 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 64 times [2021-11-02 22:39:18,878 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:39:18,878 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1163275748] [2021-11-02 22:39:18,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:39:18,878 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:39:18,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:39:18,898 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:39:18,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:39:18,900 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:39:18,966 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:39:18,966 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2021-11-02 22:39:18,967 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=182, Invalid=4648, Unknown=0, NotChecked=0, Total=4830 [2021-11-02 22:39:18,967 INFO L87 Difference]: Start difference. First operand 102 states and 107 transitions. cyclomatic complexity: 8 Second operand has 70 states, 69 states have (on average 2.0) internal successors, (138), 70 states have internal predecessors, (138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:39:21,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:39:21,950 INFO L93 Difference]: Finished difference Result 151 states and 158 transitions. [2021-11-02 22:39:21,951 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2021-11-02 22:39:21,951 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 151 states and 158 transitions. [2021-11-02 22:39:21,951 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:39:21,952 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 151 states to 150 states and 157 transitions. [2021-11-02 22:39:21,952 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2021-11-02 22:39:21,953 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2021-11-02 22:39:21,953 INFO L73 IsDeterministic]: Start isDeterministic. Operand 150 states and 157 transitions. [2021-11-02 22:39:21,953 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:39:21,953 INFO L681 BuchiCegarLoop]: Abstraction has 150 states and 157 transitions. [2021-11-02 22:39:21,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states and 157 transitions. [2021-11-02 22:39:21,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 106. [2021-11-02 22:39:21,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 106 states, 106 states have (on average 1.0471698113207548) internal successors, (111), 105 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:39:21,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 111 transitions. [2021-11-02 22:39:21,955 INFO L704 BuchiCegarLoop]: Abstraction has 106 states and 111 transitions. [2021-11-02 22:39:21,955 INFO L587 BuchiCegarLoop]: Abstraction has 106 states and 111 transitions. [2021-11-02 22:39:21,955 INFO L425 BuchiCegarLoop]: ======== Iteration 66============ [2021-11-02 22:39:21,955 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 106 states and 111 transitions. [2021-11-02 22:39:21,956 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:39:21,956 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:39:21,956 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:39:21,956 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [22, 22, 22, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:39:21,957 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:39:21,957 INFO L791 eck$LassoCheckResult]: Stem: 22297#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 22298#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 22308#L367 assume !(main_~length~0 < 1); 22299#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 22300#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 22309#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 22301#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22302#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22303#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22304#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22353#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22352#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22351#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22350#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22349#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22348#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22347#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22346#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22345#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22344#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22343#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22342#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22341#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22340#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22339#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22338#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22337#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22336#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22335#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22334#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22333#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22332#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22331#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22330#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22329#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22328#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22327#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22326#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22325#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22324#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22323#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22322#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22321#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22320#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22319#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22318#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22317#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22316#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22315#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22314#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22312#L375-3 assume !(main_~i~0 < main_~length~0); 22310#L375-4 main_~j~0 := 1; 22311#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22394#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22296#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22295#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22307#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22392#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22391#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22390#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22389#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22388#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22387#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22386#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22385#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22384#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22383#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22382#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22381#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22380#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22379#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22378#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22377#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22376#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22375#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22374#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22373#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22372#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22371#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22370#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22369#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22368#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22367#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22366#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22365#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22364#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22363#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22362#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22361#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22360#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22359#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22358#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22357#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22356#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22355#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22305#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 22306#L380-2 [2021-11-02 22:39:21,957 INFO L793 eck$LassoCheckResult]: Loop: 22306#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22354#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22306#L380-2 [2021-11-02 22:39:21,957 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:39:21,957 INFO L85 PathProgramCache]: Analyzing trace with hash 629571718, now seen corresponding path program 60 times [2021-11-02 22:39:21,957 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:39:21,957 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [953606628] [2021-11-02 22:39:21,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:39:21,958 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:39:22,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:39:23,176 INFO L134 CoverageAnalysis]: Checked inductivity of 946 backedges. 421 proven. 525 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:39:23,176 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:39:23,177 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [953606628] [2021-11-02 22:39:23,177 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [953606628] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:39:23,177 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1654054881] [2021-11-02 22:39:23,177 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-11-02 22:39:23,177 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:39:23,178 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:39:23,185 INFO L229 MonitoredProcess]: Starting monitored process 85 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:39:23,217 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (85)] Waiting until timeout for monitored process [2021-11-02 22:39:31,865 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 23 check-sat command(s) [2021-11-02 22:39:31,866 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:39:31,882 INFO L263 TraceCheckSpWp]: Trace formula consists of 583 conjuncts, 47 conjunts are in the unsatisfiable core [2021-11-02 22:39:31,885 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:39:33,353 INFO L134 CoverageAnalysis]: Checked inductivity of 946 backedges. 462 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:39:33,353 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1654054881] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:39:33,353 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:39:33,353 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48] total 71 [2021-11-02 22:39:33,354 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [820122102] [2021-11-02 22:39:33,354 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:39:33,354 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:39:33,355 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 65 times [2021-11-02 22:39:33,355 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:39:33,355 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [106479545] [2021-11-02 22:39:33,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:39:33,356 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:39:33,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:39:33,399 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:39:33,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:39:33,401 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:39:33,472 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:39:33,473 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 71 interpolants. [2021-11-02 22:39:33,473 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1111, Invalid=3859, Unknown=0, NotChecked=0, Total=4970 [2021-11-02 22:39:33,474 INFO L87 Difference]: Start difference. First operand 106 states and 111 transitions. cyclomatic complexity: 8 Second operand has 71 states, 71 states have (on average 2.0140845070422535) internal successors, (143), 71 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:39:34,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:39:34,486 INFO L93 Difference]: Finished difference Result 146 states and 150 transitions. [2021-11-02 22:39:34,486 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2021-11-02 22:39:34,486 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 146 states and 150 transitions. [2021-11-02 22:39:34,487 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:39:34,487 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 146 states to 102 states and 106 transitions. [2021-11-02 22:39:34,487 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2021-11-02 22:39:34,487 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2021-11-02 22:39:34,488 INFO L73 IsDeterministic]: Start isDeterministic. Operand 102 states and 106 transitions. [2021-11-02 22:39:34,488 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:39:34,488 INFO L681 BuchiCegarLoop]: Abstraction has 102 states and 106 transitions. [2021-11-02 22:39:34,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states and 106 transitions. [2021-11-02 22:39:34,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 102. [2021-11-02 22:39:34,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 102 states, 102 states have (on average 1.0392156862745099) internal successors, (106), 101 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:39:34,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 106 transitions. [2021-11-02 22:39:34,490 INFO L704 BuchiCegarLoop]: Abstraction has 102 states and 106 transitions. [2021-11-02 22:39:34,490 INFO L587 BuchiCegarLoop]: Abstraction has 102 states and 106 transitions. [2021-11-02 22:39:34,490 INFO L425 BuchiCegarLoop]: ======== Iteration 67============ [2021-11-02 22:39:34,490 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 102 states and 106 transitions. [2021-11-02 22:39:34,490 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:39:34,490 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:39:34,490 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:39:34,491 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [23, 23, 21, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:39:34,491 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:39:34,491 INFO L791 eck$LassoCheckResult]: Stem: 22959#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 22960#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 22965#L367 assume !(main_~length~0 < 1); 22961#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 22962#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 22966#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 22955#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22956#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22957#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 22958#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 22969#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23052#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23051#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23050#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23049#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23048#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23047#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23046#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23045#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23044#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23043#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23042#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23041#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23040#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23039#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23038#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23037#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23036#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23035#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23034#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23033#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23032#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23031#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23030#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23029#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23028#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23027#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23026#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23025#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23024#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23023#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23022#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23021#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23020#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23019#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23018#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23017#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23016#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23015#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23014#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23013#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23012#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23009#L375-3 assume !(main_~i~0 < main_~length~0); 23008#L375-4 main_~j~0 := 1; 22951#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22952#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22953#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22954#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23007#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23006#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23005#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23004#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23003#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23002#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23001#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23000#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22999#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22998#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22997#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22996#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22995#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22994#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22993#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22992#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22991#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22990#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22989#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22988#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22987#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22986#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22985#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22984#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22983#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22982#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22981#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22980#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22979#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22978#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22977#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22976#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22975#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22974#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22973#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22971#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22970#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22963#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 22964#L380-2 [2021-11-02 22:39:34,491 INFO L793 eck$LassoCheckResult]: Loop: 22964#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 22972#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 22964#L380-2 [2021-11-02 22:39:34,492 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:39:34,492 INFO L85 PathProgramCache]: Analyzing trace with hash 2100191589, now seen corresponding path program 61 times [2021-11-02 22:39:34,492 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:39:34,492 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1872811384] [2021-11-02 22:39:34,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:39:34,492 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:39:34,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:39:36,534 INFO L134 CoverageAnalysis]: Checked inductivity of 949 backedges. 0 proven. 949 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:39:36,534 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:39:36,534 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1872811384] [2021-11-02 22:39:36,535 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1872811384] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:39:36,535 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1926407702] [2021-11-02 22:39:36,535 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-02 22:39:36,535 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:39:36,535 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:39:36,538 INFO L229 MonitoredProcess]: Starting monitored process 86 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:39:36,541 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (86)] Waiting until timeout for monitored process [2021-11-02 22:39:39,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:39:39,357 INFO L263 TraceCheckSpWp]: Trace formula consists of 578 conjuncts, 98 conjunts are in the unsatisfiable core [2021-11-02 22:39:39,359 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:39:41,010 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:39:41,203 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:39:41,205 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-11-02 22:39:41,403 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:39:41,419 INFO L354 Elim1Store]: treesize reduction 60, result has 24.1 percent of original size [2021-11-02 22:39:41,419 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 36 treesize of output 38 [2021-11-02 22:39:44,414 INFO L354 Elim1Store]: treesize reduction 52, result has 11.9 percent of original size [2021-11-02 22:39:44,415 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 40 treesize of output 24 [2021-11-02 22:39:44,419 INFO L134 CoverageAnalysis]: Checked inductivity of 949 backedges. 0 proven. 949 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:39:44,419 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1926407702] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:39:44,420 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:39:44,420 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 51] total 98 [2021-11-02 22:39:44,420 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [611222697] [2021-11-02 22:39:44,421 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:39:44,421 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:39:44,421 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 66 times [2021-11-02 22:39:44,421 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:39:44,422 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [517285443] [2021-11-02 22:39:44,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:39:44,422 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:39:44,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:39:44,449 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:39:44,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:39:44,452 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:39:44,536 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:39:44,536 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 99 interpolants. [2021-11-02 22:39:44,537 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=346, Invalid=9356, Unknown=0, NotChecked=0, Total=9702 [2021-11-02 22:39:44,537 INFO L87 Difference]: Start difference. First operand 102 states and 106 transitions. cyclomatic complexity: 7 Second operand has 99 states, 98 states have (on average 1.9183673469387754) internal successors, (188), 99 states have internal predecessors, (188), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:39:50,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:39:50,484 INFO L93 Difference]: Finished difference Result 188 states and 213 transitions. [2021-11-02 22:39:50,484 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2021-11-02 22:39:50,484 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 188 states and 213 transitions. [2021-11-02 22:39:50,485 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 43 [2021-11-02 22:39:50,489 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 188 states to 187 states and 212 transitions. [2021-11-02 22:39:50,489 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 58 [2021-11-02 22:39:50,490 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 58 [2021-11-02 22:39:50,490 INFO L73 IsDeterministic]: Start isDeterministic. Operand 187 states and 212 transitions. [2021-11-02 22:39:50,490 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:39:50,490 INFO L681 BuchiCegarLoop]: Abstraction has 187 states and 212 transitions. [2021-11-02 22:39:50,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states and 212 transitions. [2021-11-02 22:39:50,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 185. [2021-11-02 22:39:50,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 185 states, 185 states have (on average 1.135135135135135) internal successors, (210), 184 states have internal predecessors, (210), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:39:50,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 210 transitions. [2021-11-02 22:39:50,496 INFO L704 BuchiCegarLoop]: Abstraction has 185 states and 210 transitions. [2021-11-02 22:39:50,496 INFO L587 BuchiCegarLoop]: Abstraction has 185 states and 210 transitions. [2021-11-02 22:39:50,496 INFO L425 BuchiCegarLoop]: ======== Iteration 68============ [2021-11-02 22:39:50,496 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 185 states and 210 transitions. [2021-11-02 22:39:50,497 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 42 [2021-11-02 22:39:50,497 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:39:50,497 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:39:50,498 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [24, 24, 20, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:39:50,498 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2021-11-02 22:39:50,498 INFO L791 eck$LassoCheckResult]: Stem: 23680#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 23681#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 23690#L367 assume !(main_~length~0 < 1); 23682#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 23683#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 23691#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 23684#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23685#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23686#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23687#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23736#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23735#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23734#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23733#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23732#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23731#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23730#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23729#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23728#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23727#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23726#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23725#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23724#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23723#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23722#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23721#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23720#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23719#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23718#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23717#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23716#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23715#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23714#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23713#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23712#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23711#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23710#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23709#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23708#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23707#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23706#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23705#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23704#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23703#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23702#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23701#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23700#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23699#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23698#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23697#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23696#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23695#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23693#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 23694#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 23819#L375-3 assume !(main_~i~0 < main_~length~0); 23818#L375-4 main_~j~0 := 1; 23817#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23815#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23813#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23811#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23809#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23807#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23805#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23803#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23801#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23799#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23797#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23795#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23793#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23791#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23789#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23787#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23785#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23783#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23781#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23779#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23777#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23775#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23773#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23771#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23769#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23767#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23765#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23763#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23761#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23759#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23757#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23755#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23753#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23751#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23749#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23747#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23746#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23745#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23737#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23738#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 23824#L380-2 [2021-11-02 22:39:50,498 INFO L793 eck$LassoCheckResult]: Loop: 23824#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23826#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 23825#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 23823#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 23824#L380-2 [2021-11-02 22:39:50,498 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:39:50,498 INFO L85 PathProgramCache]: Analyzing trace with hash 1489432068, now seen corresponding path program 62 times [2021-11-02 22:39:50,499 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:39:50,499 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [834617186] [2021-11-02 22:39:50,499 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:39:50,499 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:39:50,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:39:52,647 INFO L134 CoverageAnalysis]: Checked inductivity of 956 backedges. 2 proven. 954 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:39:52,647 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:39:52,647 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [834617186] [2021-11-02 22:39:52,647 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [834617186] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:39:52,647 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [142675133] [2021-11-02 22:39:52,649 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-11-02 22:39:52,649 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:39:52,649 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:39:52,652 INFO L229 MonitoredProcess]: Starting monitored process 87 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:39:52,671 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (87)] Waiting until timeout for monitored process [2021-11-02 22:39:55,582 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-11-02 22:39:55,582 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:39:55,587 INFO L263 TraceCheckSpWp]: Trace formula consists of 573 conjuncts, 94 conjunts are in the unsatisfiable core [2021-11-02 22:39:55,589 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:39:55,861 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:39:55,930 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 29 [2021-11-02 22:39:55,947 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:39:55,947 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 36 [2021-11-02 22:39:56,045 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 40 [2021-11-02 22:39:56,121 INFO L354 Elim1Store]: treesize reduction 72, result has 20.9 percent of original size [2021-11-02 22:39:56,121 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 98 treesize of output 99 [2021-11-02 22:39:56,277 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 40 [2021-11-02 22:39:56,302 INFO L354 Elim1Store]: treesize reduction 72, result has 20.9 percent of original size [2021-11-02 22:39:56,303 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 98 treesize of output 99 [2021-11-02 22:39:56,538 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 48 [2021-11-02 22:39:56,560 INFO L354 Elim1Store]: treesize reduction 72, result has 20.9 percent of original size [2021-11-02 22:39:56,561 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 106 treesize of output 107 [2021-11-02 22:39:58,507 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:39:58,507 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:39:58,521 INFO L134 CoverageAnalysis]: Checked inductivity of 956 backedges. 4 proven. 952 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:39:58,522 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [142675133] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:39:58,522 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:39:58,522 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 50] total 70 [2021-11-02 22:39:58,522 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [889467145] [2021-11-02 22:39:58,523 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:39:58,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:39:58,523 INFO L85 PathProgramCache]: Analyzing trace with hash 2342473, now seen corresponding path program 1 times [2021-11-02 22:39:58,524 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:39:58,524 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1315801893] [2021-11-02 22:39:58,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:39:58,524 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:39:58,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:39:58,553 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:39:58,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:39:58,557 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:39:58,706 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:39:58,707 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 71 interpolants. [2021-11-02 22:39:58,707 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=4778, Unknown=0, NotChecked=0, Total=4970 [2021-11-02 22:39:58,708 INFO L87 Difference]: Start difference. First operand 185 states and 210 transitions. cyclomatic complexity: 29 Second operand has 71 states, 70 states have (on average 1.9714285714285715) internal successors, (138), 71 states have internal predecessors, (138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:40:03,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:40:03,502 INFO L93 Difference]: Finished difference Result 143 states and 147 transitions. [2021-11-02 22:40:03,502 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2021-11-02 22:40:03,502 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 143 states and 147 transitions. [2021-11-02 22:40:03,503 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:40:03,504 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 143 states to 142 states and 146 transitions. [2021-11-02 22:40:03,504 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2021-11-02 22:40:03,504 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2021-11-02 22:40:03,504 INFO L73 IsDeterministic]: Start isDeterministic. Operand 142 states and 146 transitions. [2021-11-02 22:40:03,504 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:40:03,504 INFO L681 BuchiCegarLoop]: Abstraction has 142 states and 146 transitions. [2021-11-02 22:40:03,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states and 146 transitions. [2021-11-02 22:40:03,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 100. [2021-11-02 22:40:03,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 100 states have (on average 1.03) internal successors, (103), 99 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:40:03,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 103 transitions. [2021-11-02 22:40:03,507 INFO L704 BuchiCegarLoop]: Abstraction has 100 states and 103 transitions. [2021-11-02 22:40:03,507 INFO L587 BuchiCegarLoop]: Abstraction has 100 states and 103 transitions. [2021-11-02 22:40:03,507 INFO L425 BuchiCegarLoop]: ======== Iteration 69============ [2021-11-02 22:40:03,507 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 100 states and 103 transitions. [2021-11-02 22:40:03,507 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:40:03,507 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:40:03,507 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:40:03,508 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [23, 23, 22, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:40:03,508 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:40:03,508 INFO L791 eck$LassoCheckResult]: Stem: 24411#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 24412#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 24422#L367 assume !(main_~length~0 < 1); 24413#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 24414#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 24423#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 24415#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24416#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24417#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24418#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24474#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24473#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24472#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24471#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24470#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24469#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24468#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24467#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24466#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24465#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24464#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24463#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24462#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24461#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24460#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24459#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24458#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24457#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24456#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24455#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24454#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24453#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24452#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24451#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24450#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24449#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24448#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24447#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24446#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24445#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24444#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24443#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24442#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24441#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24440#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24439#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24438#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24437#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24436#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24435#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24434#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 24426#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 24425#L375-3 assume !(main_~i~0 < main_~length~0); 24424#L375-4 main_~j~0 := 1; 24407#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24408#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 24409#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24410#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 24421#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24506#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 24505#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24504#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 24503#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24502#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 24501#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24500#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 24499#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24498#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 24497#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24496#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 24495#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24494#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 24493#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24492#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 24491#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24490#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 24489#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24488#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 24487#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24486#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 24485#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24484#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 24483#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24482#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 24481#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24480#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 24479#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24478#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 24477#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24476#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 24475#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24433#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 24432#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24431#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 24430#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24428#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 24427#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24419#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 24420#L380-2 [2021-11-02 22:40:03,508 INFO L793 eck$LassoCheckResult]: Loop: 24420#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 24429#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 24420#L380-2 [2021-11-02 22:40:03,509 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:40:03,509 INFO L85 PathProgramCache]: Analyzing trace with hash -350512536, now seen corresponding path program 63 times [2021-11-02 22:40:03,509 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:40:03,509 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [499582846] [2021-11-02 22:40:03,509 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:40:03,509 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:40:03,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:40:05,701 INFO L134 CoverageAnalysis]: Checked inductivity of 991 backedges. 0 proven. 991 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:40:05,702 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:40:05,702 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [499582846] [2021-11-02 22:40:05,702 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [499582846] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:40:05,702 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [687388283] [2021-11-02 22:40:05,702 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-02 22:40:05,702 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:40:05,702 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:40:05,707 INFO L229 MonitoredProcess]: Starting monitored process 88 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:40:05,725 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (88)] Waiting until timeout for monitored process [2021-11-02 22:40:11,427 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 24 check-sat command(s) [2021-11-02 22:40:11,427 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:40:11,441 INFO L263 TraceCheckSpWp]: Trace formula consists of 593 conjuncts, 55 conjunts are in the unsatisfiable core [2021-11-02 22:40:11,442 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:40:12,910 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:40:13,092 INFO L354 Elim1Store]: treesize reduction 40, result has 23.1 percent of original size [2021-11-02 22:40:13,093 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 30 treesize of output 29 [2021-11-02 22:40:18,629 INFO L354 Elim1Store]: treesize reduction 96, result has 6.8 percent of original size [2021-11-02 22:40:18,629 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 57 treesize of output 29 [2021-11-02 22:40:18,636 INFO L134 CoverageAnalysis]: Checked inductivity of 991 backedges. 441 proven. 550 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:40:18,637 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [687388283] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:40:18,637 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:40:18,637 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 51] total 99 [2021-11-02 22:40:18,637 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [790652352] [2021-11-02 22:40:18,638 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:40:18,638 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:40:18,639 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 67 times [2021-11-02 22:40:18,639 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:40:18,639 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2009479364] [2021-11-02 22:40:18,639 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:40:18,640 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:40:18,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:40:18,667 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:40:18,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:40:18,670 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:40:18,759 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:40:18,760 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 100 interpolants. [2021-11-02 22:40:18,761 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=944, Invalid=8956, Unknown=0, NotChecked=0, Total=9900 [2021-11-02 22:40:18,761 INFO L87 Difference]: Start difference. First operand 100 states and 103 transitions. cyclomatic complexity: 6 Second operand has 100 states, 99 states have (on average 1.9191919191919191) internal successors, (190), 100 states have internal predecessors, (190), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:40:42,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:40:42,963 INFO L93 Difference]: Finished difference Result 149 states and 154 transitions. [2021-11-02 22:40:42,964 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 74 states. [2021-11-02 22:40:42,964 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 149 states and 154 transitions. [2021-11-02 22:40:42,964 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:40:42,965 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 149 states to 102 states and 105 transitions. [2021-11-02 22:40:42,965 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:40:42,965 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:40:42,966 INFO L73 IsDeterministic]: Start isDeterministic. Operand 102 states and 105 transitions. [2021-11-02 22:40:42,966 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:40:42,966 INFO L681 BuchiCegarLoop]: Abstraction has 102 states and 105 transitions. [2021-11-02 22:40:42,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states and 105 transitions. [2021-11-02 22:40:42,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 102. [2021-11-02 22:40:42,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 102 states, 102 states have (on average 1.0294117647058822) internal successors, (105), 101 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:40:42,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 105 transitions. [2021-11-02 22:40:42,968 INFO L704 BuchiCegarLoop]: Abstraction has 102 states and 105 transitions. [2021-11-02 22:40:42,968 INFO L587 BuchiCegarLoop]: Abstraction has 102 states and 105 transitions. [2021-11-02 22:40:42,968 INFO L425 BuchiCegarLoop]: ======== Iteration 70============ [2021-11-02 22:40:42,968 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 102 states and 105 transitions. [2021-11-02 22:40:42,968 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:40:42,968 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:40:42,968 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:40:42,969 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [24, 24, 22, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:40:42,973 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:40:42,973 INFO L791 eck$LassoCheckResult]: Stem: 25196#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 25197#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 25207#L367 assume !(main_~length~0 < 1); 25198#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 25199#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 25208#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 25200#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25201#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25202#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25203#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25254#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25253#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25252#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25251#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25250#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25249#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25248#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25247#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25246#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25245#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25244#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25243#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25242#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25241#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25240#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25239#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25238#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25237#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25236#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25235#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25234#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25233#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25232#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25231#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25230#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25229#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25228#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25227#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25226#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25225#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25224#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25223#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25222#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25221#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25220#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25219#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25218#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25217#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25216#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25215#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25214#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25213#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25212#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25211#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25210#L375-3 assume !(main_~i~0 < main_~length~0); 25209#L375-4 main_~j~0 := 1; 25192#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25193#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25194#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25195#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25206#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25293#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25292#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25291#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25290#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25289#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25288#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25287#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25286#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25285#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25284#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25283#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25282#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25281#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25280#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25279#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25278#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25277#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25276#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25275#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25274#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25273#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25272#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25271#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25270#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25269#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25268#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25267#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25266#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25265#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25264#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25263#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25262#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25261#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25260#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25259#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25258#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25257#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25256#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25204#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 25205#L380-2 [2021-11-02 22:40:42,974 INFO L793 eck$LassoCheckResult]: Loop: 25205#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25255#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25205#L380-2 [2021-11-02 22:40:42,974 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:40:42,974 INFO L85 PathProgramCache]: Analyzing trace with hash -1613642806, now seen corresponding path program 64 times [2021-11-02 22:40:42,975 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:40:42,975 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1609000727] [2021-11-02 22:40:42,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:40:42,975 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:40:43,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:40:45,050 INFO L134 CoverageAnalysis]: Checked inductivity of 1038 backedges. 0 proven. 1038 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:40:45,050 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:40:45,051 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1609000727] [2021-11-02 22:40:45,051 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1609000727] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:40:45,051 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1606956627] [2021-11-02 22:40:45,051 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-11-02 22:40:45,051 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:40:45,051 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:40:45,053 INFO L229 MonitoredProcess]: Starting monitored process 89 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:40:45,054 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (89)] Waiting until timeout for monitored process [2021-11-02 22:40:49,966 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-11-02 22:40:49,966 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:40:49,976 INFO L263 TraceCheckSpWp]: Trace formula consists of 603 conjuncts, 101 conjunts are in the unsatisfiable core [2021-11-02 22:40:49,978 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:40:50,337 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:40:50,407 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 29 [2021-11-02 22:40:50,420 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:40:50,420 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 36 [2021-11-02 22:40:50,646 INFO L354 Elim1Store]: treesize reduction 80, result has 20.8 percent of original size [2021-11-02 22:40:50,647 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 46 treesize of output 48 [2021-11-02 22:40:52,931 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:40:52,932 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:40:52,936 INFO L134 CoverageAnalysis]: Checked inductivity of 1038 backedges. 0 proven. 1038 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:40:52,937 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1606956627] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:40:52,937 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:40:52,937 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [51, 52] total 74 [2021-11-02 22:40:52,937 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [308137177] [2021-11-02 22:40:52,938 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:40:52,938 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:40:52,938 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 68 times [2021-11-02 22:40:52,938 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:40:52,938 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1790153934] [2021-11-02 22:40:52,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:40:52,939 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:40:52,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:40:52,967 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:40:52,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:40:52,969 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:40:53,056 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:40:53,057 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 75 interpolants. [2021-11-02 22:40:53,057 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=197, Invalid=5353, Unknown=0, NotChecked=0, Total=5550 [2021-11-02 22:40:53,058 INFO L87 Difference]: Start difference. First operand 102 states and 105 transitions. cyclomatic complexity: 6 Second operand has 75 states, 74 states have (on average 1.9864864864864864) internal successors, (147), 75 states have internal predecessors, (147), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:40:58,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:40:58,513 INFO L93 Difference]: Finished difference Result 106 states and 109 transitions. [2021-11-02 22:40:58,513 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2021-11-02 22:40:58,513 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 106 states and 109 transitions. [2021-11-02 22:40:58,514 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:40:58,515 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 106 states to 105 states and 108 transitions. [2021-11-02 22:40:58,515 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:40:58,516 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:40:58,516 INFO L73 IsDeterministic]: Start isDeterministic. Operand 105 states and 108 transitions. [2021-11-02 22:40:58,516 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:40:58,516 INFO L681 BuchiCegarLoop]: Abstraction has 105 states and 108 transitions. [2021-11-02 22:40:58,516 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states and 108 transitions. [2021-11-02 22:40:58,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 104. [2021-11-02 22:40:58,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 104 states, 104 states have (on average 1.0288461538461537) internal successors, (107), 103 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:40:58,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 107 transitions. [2021-11-02 22:40:58,518 INFO L704 BuchiCegarLoop]: Abstraction has 104 states and 107 transitions. [2021-11-02 22:40:58,518 INFO L587 BuchiCegarLoop]: Abstraction has 104 states and 107 transitions. [2021-11-02 22:40:58,519 INFO L425 BuchiCegarLoop]: ======== Iteration 71============ [2021-11-02 22:40:58,519 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 104 states and 107 transitions. [2021-11-02 22:40:58,519 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:40:58,519 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:40:58,519 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:40:58,520 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [24, 24, 23, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:40:58,520 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:40:58,521 INFO L791 eck$LassoCheckResult]: Stem: 25827#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 25828#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 25838#L367 assume !(main_~length~0 < 1); 25829#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 25830#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 25839#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 25831#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25832#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25833#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25834#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25885#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25884#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25883#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25882#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25881#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25880#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25879#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25878#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25877#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25876#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25875#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25874#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25873#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25872#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25871#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25870#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25869#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25868#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25867#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25866#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25865#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25864#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25863#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25862#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25861#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25860#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25859#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25858#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25857#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25856#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25855#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25854#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25853#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25852#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25851#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25850#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25849#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25848#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25847#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25846#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25845#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25844#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25843#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 25842#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 25841#L375-3 assume !(main_~i~0 < main_~length~0); 25840#L375-4 main_~j~0 := 1; 25823#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25824#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25825#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25826#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25837#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25926#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25925#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25924#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25923#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25922#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25921#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25920#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25919#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25918#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25917#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25916#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25915#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25914#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25913#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25912#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25911#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25910#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25909#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25908#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25907#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25906#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25905#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25904#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25903#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25902#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25901#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25900#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25899#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25898#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25897#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25896#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25895#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25894#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25893#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25892#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25891#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25890#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25889#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25888#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25887#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25835#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 25836#L380-2 [2021-11-02 22:40:58,521 INFO L793 eck$LassoCheckResult]: Loop: 25836#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 25886#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 25836#L380-2 [2021-11-02 22:40:58,521 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:40:58,521 INFO L85 PathProgramCache]: Analyzing trace with hash -227543155, now seen corresponding path program 65 times [2021-11-02 22:40:58,521 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:40:58,521 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1648380748] [2021-11-02 22:40:58,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:40:58,522 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:40:58,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:41:00,670 INFO L134 CoverageAnalysis]: Checked inductivity of 1082 backedges. 0 proven. 1082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:41:00,671 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:41:00,671 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1648380748] [2021-11-02 22:41:00,671 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1648380748] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:41:00,671 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1586836743] [2021-11-02 22:41:00,671 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-02 22:41:00,671 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:41:00,672 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:41:00,691 INFO L229 MonitoredProcess]: Starting monitored process 90 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:41:00,728 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (90)] Waiting until timeout for monitored process [2021-11-02 22:41:09,809 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 25 check-sat command(s) [2021-11-02 22:41:09,809 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:41:09,826 INFO L263 TraceCheckSpWp]: Trace formula consists of 618 conjuncts, 100 conjunts are in the unsatisfiable core [2021-11-02 22:41:09,827 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:41:10,131 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:41:10,190 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 35 [2021-11-02 22:41:10,204 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:41:10,204 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 42 [2021-11-02 22:41:12,503 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:41:12,503 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:41:12,507 INFO L134 CoverageAnalysis]: Checked inductivity of 1082 backedges. 0 proven. 1082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:41:12,507 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1586836743] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:41:12,507 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:41:12,507 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [52, 52] total 75 [2021-11-02 22:41:12,507 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [919521350] [2021-11-02 22:41:12,508 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:41:12,508 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:41:12,508 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 69 times [2021-11-02 22:41:12,508 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:41:12,508 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [183312241] [2021-11-02 22:41:12,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:41:12,509 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:41:12,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:41:12,531 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:41:12,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:41:12,533 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:41:12,601 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:41:12,602 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 76 interpolants. [2021-11-02 22:41:12,602 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=198, Invalid=5502, Unknown=0, NotChecked=0, Total=5700 [2021-11-02 22:41:12,602 INFO L87 Difference]: Start difference. First operand 104 states and 107 transitions. cyclomatic complexity: 6 Second operand has 76 states, 75 states have (on average 2.0) internal successors, (150), 76 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:41:16,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:41:16,548 INFO L93 Difference]: Finished difference Result 159 states and 165 transitions. [2021-11-02 22:41:16,549 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2021-11-02 22:41:16,549 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 159 states and 165 transitions. [2021-11-02 22:41:16,550 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:41:16,551 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 159 states to 158 states and 164 transitions. [2021-11-02 22:41:16,551 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:41:16,551 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:41:16,552 INFO L73 IsDeterministic]: Start isDeterministic. Operand 158 states and 164 transitions. [2021-11-02 22:41:16,552 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:41:16,552 INFO L681 BuchiCegarLoop]: Abstraction has 158 states and 164 transitions. [2021-11-02 22:41:16,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states and 164 transitions. [2021-11-02 22:41:16,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 110. [2021-11-02 22:41:16,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 110 states, 110 states have (on average 1.0363636363636364) internal successors, (114), 109 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:41:16,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 114 transitions. [2021-11-02 22:41:16,566 INFO L704 BuchiCegarLoop]: Abstraction has 110 states and 114 transitions. [2021-11-02 22:41:16,566 INFO L587 BuchiCegarLoop]: Abstraction has 110 states and 114 transitions. [2021-11-02 22:41:16,566 INFO L425 BuchiCegarLoop]: ======== Iteration 72============ [2021-11-02 22:41:16,567 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 110 states and 114 transitions. [2021-11-02 22:41:16,567 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:41:16,567 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:41:16,567 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:41:16,568 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [24, 24, 24, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:41:16,568 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:41:16,569 INFO L791 eck$LassoCheckResult]: Stem: 26479#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 26480#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 26486#L367 assume !(main_~length~0 < 1); 26481#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 26482#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 26487#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 26475#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26476#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26477#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26478#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26490#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26535#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26534#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26533#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26532#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26531#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26530#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26529#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26528#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26527#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26526#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26525#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26524#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26523#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26522#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26521#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26520#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26519#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26518#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26517#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26516#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26515#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26514#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26513#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26512#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26511#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26510#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26509#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26508#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26507#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26506#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26505#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26504#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26503#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26502#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26501#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26500#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26499#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26498#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26497#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26496#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26495#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26494#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 26493#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 26491#L375-3 assume !(main_~i~0 < main_~length~0); 26488#L375-4 main_~j~0 := 1; 26489#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26579#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26474#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26473#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26485#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26578#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26577#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26576#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26575#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26574#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26573#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26572#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26571#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26570#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26569#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26568#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26567#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26566#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26565#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26564#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26563#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26562#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26561#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26560#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26559#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26558#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26557#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26556#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26555#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26554#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26553#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26552#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26551#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26550#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26549#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26548#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26547#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26546#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26545#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26544#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26543#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26542#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26541#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26540#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26539#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26538#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26537#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26483#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 26484#L380-2 [2021-11-02 22:41:16,569 INFO L793 eck$LassoCheckResult]: Loop: 26484#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 26536#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 26484#L380-2 [2021-11-02 22:41:16,569 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:41:16,569 INFO L85 PathProgramCache]: Analyzing trace with hash 374359696, now seen corresponding path program 66 times [2021-11-02 22:41:16,569 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:41:16,570 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [127177708] [2021-11-02 22:41:16,570 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:41:16,570 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:41:16,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:41:18,273 INFO L134 CoverageAnalysis]: Checked inductivity of 1128 backedges. 507 proven. 621 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:41:18,274 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:41:18,274 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [127177708] [2021-11-02 22:41:18,274 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [127177708] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:41:18,274 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1638154960] [2021-11-02 22:41:18,274 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-11-02 22:41:18,274 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:41:18,275 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:41:18,281 INFO L229 MonitoredProcess]: Starting monitored process 91 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:41:18,315 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (91)] Waiting until timeout for monitored process [2021-11-02 22:41:27,832 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 25 check-sat command(s) [2021-11-02 22:41:27,833 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:41:27,848 INFO L263 TraceCheckSpWp]: Trace formula consists of 633 conjuncts, 51 conjunts are in the unsatisfiable core [2021-11-02 22:41:27,850 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:41:29,494 INFO L134 CoverageAnalysis]: Checked inductivity of 1128 backedges. 552 proven. 576 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:41:29,495 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1638154960] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:41:29,495 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:41:29,495 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [52, 52] total 77 [2021-11-02 22:41:29,495 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [198242544] [2021-11-02 22:41:29,495 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:41:29,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:41:29,496 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 70 times [2021-11-02 22:41:29,496 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:41:29,496 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1741239099] [2021-11-02 22:41:29,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:41:29,496 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:41:29,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:41:29,609 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:41:29,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:41:29,611 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:41:29,679 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:41:29,680 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 77 interpolants. [2021-11-02 22:41:29,680 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1307, Invalid=4545, Unknown=0, NotChecked=0, Total=5852 [2021-11-02 22:41:29,680 INFO L87 Difference]: Start difference. First operand 110 states and 114 transitions. cyclomatic complexity: 7 Second operand has 77 states, 77 states have (on average 2.012987012987013) internal successors, (155), 77 states have internal predecessors, (155), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:41:30,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:41:30,718 INFO L93 Difference]: Finished difference Result 155 states and 158 transitions. [2021-11-02 22:41:30,718 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2021-11-02 22:41:30,718 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 155 states and 158 transitions. [2021-11-02 22:41:30,719 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:41:30,719 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 155 states to 107 states and 110 transitions. [2021-11-02 22:41:30,719 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:41:30,720 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:41:30,720 INFO L73 IsDeterministic]: Start isDeterministic. Operand 107 states and 110 transitions. [2021-11-02 22:41:30,720 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:41:30,720 INFO L681 BuchiCegarLoop]: Abstraction has 107 states and 110 transitions. [2021-11-02 22:41:30,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states and 110 transitions. [2021-11-02 22:41:30,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 106. [2021-11-02 22:41:30,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 106 states, 106 states have (on average 1.028301886792453) internal successors, (109), 105 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:41:30,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 109 transitions. [2021-11-02 22:41:30,722 INFO L704 BuchiCegarLoop]: Abstraction has 106 states and 109 transitions. [2021-11-02 22:41:30,722 INFO L587 BuchiCegarLoop]: Abstraction has 106 states and 109 transitions. [2021-11-02 22:41:30,722 INFO L425 BuchiCegarLoop]: ======== Iteration 73============ [2021-11-02 22:41:30,722 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 106 states and 109 transitions. [2021-11-02 22:41:30,722 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:41:30,722 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:41:30,723 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:41:30,723 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [25, 25, 23, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:41:30,723 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:41:30,723 INFO L791 eck$LassoCheckResult]: Stem: 27180#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 27181#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 27190#L367 assume !(main_~length~0 < 1); 27182#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 27183#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 27191#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 27184#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27185#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27186#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27187#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27193#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27281#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27280#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27279#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27278#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27277#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27276#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27275#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27274#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27273#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27272#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27271#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27270#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27269#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27268#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27267#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27266#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27265#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27264#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27263#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27262#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27261#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27260#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27259#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27258#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27257#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27256#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27255#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27254#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27253#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27252#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27251#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27250#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27249#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27248#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27247#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27246#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27245#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27244#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27243#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27242#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27241#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27240#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27239#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27238#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27195#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27194#L375-3 assume !(main_~i~0 < main_~length~0); 27192#L375-4 main_~j~0 := 1; 27176#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27177#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27178#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27179#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27237#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27236#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27235#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27234#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27233#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27232#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27231#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27230#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27229#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27228#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27227#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27226#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27225#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27224#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27223#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27222#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27221#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27220#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27219#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27218#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27217#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27216#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27215#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27214#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27213#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27212#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27211#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27210#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27209#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27208#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27207#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27206#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27205#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27204#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27203#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27202#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27201#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27200#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27199#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27197#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27196#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27188#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 27189#L380-2 [2021-11-02 22:41:30,724 INFO L793 eck$LassoCheckResult]: Loop: 27189#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27198#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27189#L380-2 [2021-11-02 22:41:30,724 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:41:30,724 INFO L85 PathProgramCache]: Analyzing trace with hash -1555128337, now seen corresponding path program 67 times [2021-11-02 22:41:30,724 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:41:30,724 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [470756650] [2021-11-02 22:41:30,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:41:30,724 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:41:30,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:41:32,952 INFO L134 CoverageAnalysis]: Checked inductivity of 1131 backedges. 0 proven. 1131 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:41:32,952 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:41:32,953 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [470756650] [2021-11-02 22:41:32,953 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [470756650] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:41:32,953 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [137733063] [2021-11-02 22:41:32,953 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-02 22:41:32,953 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:41:32,953 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:41:32,955 INFO L229 MonitoredProcess]: Starting monitored process 92 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:41:32,956 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (92)] Waiting until timeout for monitored process [2021-11-02 22:41:37,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:41:37,146 INFO L263 TraceCheckSpWp]: Trace formula consists of 628 conjuncts, 106 conjunts are in the unsatisfiable core [2021-11-02 22:41:37,150 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:41:39,599 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:41:39,868 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:41:39,869 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 29 [2021-11-02 22:41:40,150 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:41:40,171 INFO L354 Elim1Store]: treesize reduction 60, result has 24.1 percent of original size [2021-11-02 22:41:40,172 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 36 treesize of output 38 [2021-11-02 22:41:43,945 INFO L354 Elim1Store]: treesize reduction 52, result has 11.9 percent of original size [2021-11-02 22:41:43,946 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 40 treesize of output 24 [2021-11-02 22:41:43,950 INFO L134 CoverageAnalysis]: Checked inductivity of 1131 backedges. 0 proven. 1131 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:41:43,950 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [137733063] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:41:43,950 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:41:43,951 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [53, 55] total 106 [2021-11-02 22:41:43,951 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [318424000] [2021-11-02 22:41:43,951 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:41:43,951 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:41:43,951 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 71 times [2021-11-02 22:41:43,952 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:41:43,952 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [221155458] [2021-11-02 22:41:43,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:41:43,952 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:41:43,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:41:44,036 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:41:44,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:41:44,038 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:41:44,106 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:41:44,106 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 107 interpolants. [2021-11-02 22:41:44,107 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=374, Invalid=10968, Unknown=0, NotChecked=0, Total=11342 [2021-11-02 22:41:44,107 INFO L87 Difference]: Start difference. First operand 106 states and 109 transitions. cyclomatic complexity: 6 Second operand has 107 states, 106 states have (on average 1.9245283018867925) internal successors, (204), 107 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:41:50,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:41:50,111 INFO L93 Difference]: Finished difference Result 110 states and 113 transitions. [2021-11-02 22:41:50,111 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2021-11-02 22:41:50,111 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 110 states and 113 transitions. [2021-11-02 22:41:50,112 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:41:50,113 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 110 states to 109 states and 112 transitions. [2021-11-02 22:41:50,113 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:41:50,113 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:41:50,113 INFO L73 IsDeterministic]: Start isDeterministic. Operand 109 states and 112 transitions. [2021-11-02 22:41:50,113 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:41:50,113 INFO L681 BuchiCegarLoop]: Abstraction has 109 states and 112 transitions. [2021-11-02 22:41:50,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states and 112 transitions. [2021-11-02 22:41:50,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 108. [2021-11-02 22:41:50,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 108 states have (on average 1.0277777777777777) internal successors, (111), 107 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:41:50,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 111 transitions. [2021-11-02 22:41:50,116 INFO L704 BuchiCegarLoop]: Abstraction has 108 states and 111 transitions. [2021-11-02 22:41:50,116 INFO L587 BuchiCegarLoop]: Abstraction has 108 states and 111 transitions. [2021-11-02 22:41:50,116 INFO L425 BuchiCegarLoop]: ======== Iteration 74============ [2021-11-02 22:41:50,116 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 108 states and 111 transitions. [2021-11-02 22:41:50,116 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:41:50,116 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:41:50,116 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:41:50,117 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [25, 25, 24, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:41:50,117 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:41:50,117 INFO L791 eck$LassoCheckResult]: Stem: 27865#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 27866#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 27876#L367 assume !(main_~length~0 < 1); 27867#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 27868#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 27877#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 27869#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27870#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27871#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27872#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27925#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27924#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27923#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27922#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27921#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27920#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27919#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27918#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27917#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27916#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27915#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27914#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27913#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27912#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27911#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27910#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27909#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27908#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27907#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27906#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27905#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27904#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27903#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27902#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27901#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27900#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27899#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27898#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27897#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27896#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27895#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27894#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27893#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27892#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27891#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27890#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27889#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27888#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27887#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27886#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27885#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27884#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27883#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27882#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27881#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 27880#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 27879#L375-3 assume !(main_~i~0 < main_~length~0); 27878#L375-4 main_~j~0 := 1; 27861#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27862#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27863#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27864#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27875#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27968#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27967#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27966#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27965#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27964#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27963#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27962#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27961#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27960#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27959#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27958#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27957#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27956#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27955#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27954#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27953#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27952#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27951#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27950#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27949#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27948#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27947#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27946#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27945#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27944#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27943#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27942#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27941#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27940#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27939#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27938#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27937#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27936#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27935#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27934#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27933#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27932#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27931#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27930#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27929#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27928#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27927#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27873#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 27874#L380-2 [2021-11-02 22:41:50,118 INFO L793 eck$LassoCheckResult]: Loop: 27874#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 27926#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 27874#L380-2 [2021-11-02 22:41:50,118 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:41:50,118 INFO L85 PathProgramCache]: Analyzing trace with hash 170286706, now seen corresponding path program 68 times [2021-11-02 22:41:50,118 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:41:50,118 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2047904768] [2021-11-02 22:41:50,118 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:41:50,119 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:41:50,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:41:53,200 INFO L134 CoverageAnalysis]: Checked inductivity of 1177 backedges. 0 proven. 1177 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:41:53,200 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:41:53,200 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2047904768] [2021-11-02 22:41:53,200 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2047904768] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:41:53,201 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [434393847] [2021-11-02 22:41:53,201 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-11-02 22:41:53,201 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:41:53,201 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:41:53,204 INFO L229 MonitoredProcess]: Starting monitored process 93 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:41:53,221 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (93)] Waiting until timeout for monitored process [2021-11-02 22:41:58,025 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-11-02 22:41:58,025 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:41:58,030 INFO L263 TraceCheckSpWp]: Trace formula consists of 643 conjuncts, 104 conjunts are in the unsatisfiable core [2021-11-02 22:41:58,032 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:41:58,358 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:41:58,417 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 35 [2021-11-02 22:41:58,427 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:41:58,427 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 42 [2021-11-02 22:42:01,125 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:42:01,125 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:42:01,128 INFO L134 CoverageAnalysis]: Checked inductivity of 1177 backedges. 0 proven. 1177 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:42:01,129 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [434393847] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:42:01,129 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:42:01,129 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [54, 54] total 78 [2021-11-02 22:42:01,129 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1669467543] [2021-11-02 22:42:01,130 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:42:01,130 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:42:01,130 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 72 times [2021-11-02 22:42:01,130 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:42:01,130 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [972851263] [2021-11-02 22:42:01,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:01,130 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:42:01,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:42:01,182 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:42:01,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:42:01,184 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:42:01,251 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:42:01,252 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 79 interpolants. [2021-11-02 22:42:01,252 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=206, Invalid=5956, Unknown=0, NotChecked=0, Total=6162 [2021-11-02 22:42:01,252 INFO L87 Difference]: Start difference. First operand 108 states and 111 transitions. cyclomatic complexity: 6 Second operand has 79 states, 78 states have (on average 2.0) internal successors, (156), 79 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:42:06,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:42:06,129 INFO L93 Difference]: Finished difference Result 165 states and 171 transitions. [2021-11-02 22:42:06,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2021-11-02 22:42:06,129 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 165 states and 171 transitions. [2021-11-02 22:42:06,130 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:42:06,132 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 165 states to 164 states and 170 transitions. [2021-11-02 22:42:06,132 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:42:06,132 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:42:06,132 INFO L73 IsDeterministic]: Start isDeterministic. Operand 164 states and 170 transitions. [2021-11-02 22:42:06,132 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:42:06,132 INFO L681 BuchiCegarLoop]: Abstraction has 164 states and 170 transitions. [2021-11-02 22:42:06,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states and 170 transitions. [2021-11-02 22:42:06,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 114. [2021-11-02 22:42:06,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 114 states, 114 states have (on average 1.0350877192982457) internal successors, (118), 113 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:42:06,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 118 transitions. [2021-11-02 22:42:06,136 INFO L704 BuchiCegarLoop]: Abstraction has 114 states and 118 transitions. [2021-11-02 22:42:06,136 INFO L587 BuchiCegarLoop]: Abstraction has 114 states and 118 transitions. [2021-11-02 22:42:06,136 INFO L425 BuchiCegarLoop]: ======== Iteration 75============ [2021-11-02 22:42:06,136 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 114 states and 118 transitions. [2021-11-02 22:42:06,137 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:42:06,137 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:42:06,137 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:42:06,138 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [25, 25, 25, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:42:06,138 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:42:06,138 INFO L791 eck$LassoCheckResult]: Stem: 28542#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 28543#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 28549#L367 assume !(main_~length~0 < 1); 28544#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 28545#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 28550#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 28538#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28539#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28540#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28541#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28553#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28600#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28599#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28598#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28597#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28596#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28595#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28594#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28593#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28592#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28591#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28590#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28589#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28588#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28587#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28586#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28585#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28584#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28583#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28582#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28581#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28580#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28579#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28578#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28577#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28576#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28575#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28574#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28573#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28572#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28571#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28570#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28569#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28568#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28567#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28566#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28565#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28564#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28563#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28562#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28561#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28560#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28559#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28558#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28557#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 28556#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 28554#L375-3 assume !(main_~i~0 < main_~length~0); 28551#L375-4 main_~j~0 := 1; 28552#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28646#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28537#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28536#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28548#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28645#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28644#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28643#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28642#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28641#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28640#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28639#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28638#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28637#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28636#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28635#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28634#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28633#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28632#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28631#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28630#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28629#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28628#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28627#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28626#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28625#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28624#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28623#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28622#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28621#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28620#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28619#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28618#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28617#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28616#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28615#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28614#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28613#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28612#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28611#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28610#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28609#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28608#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28607#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28606#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28605#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28604#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28603#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28602#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28546#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 28547#L380-2 [2021-11-02 22:42:06,139 INFO L793 eck$LassoCheckResult]: Loop: 28547#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 28601#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 28547#L380-2 [2021-11-02 22:42:06,139 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:42:06,139 INFO L85 PathProgramCache]: Analyzing trace with hash 436766773, now seen corresponding path program 69 times [2021-11-02 22:42:06,139 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:42:06,139 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2055244803] [2021-11-02 22:42:06,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:06,140 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:42:06,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:42:07,702 INFO L134 CoverageAnalysis]: Checked inductivity of 1225 backedges. 553 proven. 672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:42:07,702 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:42:07,702 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2055244803] [2021-11-02 22:42:07,702 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2055244803] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:42:07,703 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2105906297] [2021-11-02 22:42:07,703 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-02 22:42:07,703 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:42:07,703 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:42:07,709 INFO L229 MonitoredProcess]: Starting monitored process 94 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:42:07,723 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (94)] Waiting until timeout for monitored process [2021-11-02 22:42:24,139 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 26 check-sat command(s) [2021-11-02 22:42:24,140 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:42:24,169 INFO L263 TraceCheckSpWp]: Trace formula consists of 658 conjuncts, 53 conjunts are in the unsatisfiable core [2021-11-02 22:42:24,171 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:42:26,049 INFO L134 CoverageAnalysis]: Checked inductivity of 1225 backedges. 600 proven. 625 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:42:26,050 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2105906297] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:42:26,050 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:42:26,051 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [54, 54] total 80 [2021-11-02 22:42:26,051 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1173919486] [2021-11-02 22:42:26,052 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:42:26,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:42:26,052 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 73 times [2021-11-02 22:42:26,052 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:42:26,053 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1445304151] [2021-11-02 22:42:26,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:26,053 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:42:26,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:42:26,164 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:42:26,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:42:26,166 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:42:26,241 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:42:26,242 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 80 interpolants. [2021-11-02 22:42:26,242 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1411, Invalid=4909, Unknown=0, NotChecked=0, Total=6320 [2021-11-02 22:42:26,242 INFO L87 Difference]: Start difference. First operand 114 states and 118 transitions. cyclomatic complexity: 7 Second operand has 80 states, 80 states have (on average 2.0125) internal successors, (161), 80 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:42:27,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:42:27,293 INFO L93 Difference]: Finished difference Result 161 states and 164 transitions. [2021-11-02 22:42:27,293 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2021-11-02 22:42:27,294 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 161 states and 164 transitions. [2021-11-02 22:42:27,294 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:42:27,295 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 161 states to 111 states and 114 transitions. [2021-11-02 22:42:27,295 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:42:27,295 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:42:27,295 INFO L73 IsDeterministic]: Start isDeterministic. Operand 111 states and 114 transitions. [2021-11-02 22:42:27,295 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:42:27,295 INFO L681 BuchiCegarLoop]: Abstraction has 111 states and 114 transitions. [2021-11-02 22:42:27,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states and 114 transitions. [2021-11-02 22:42:27,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 110. [2021-11-02 22:42:27,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 110 states, 110 states have (on average 1.0272727272727273) internal successors, (113), 109 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:42:27,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 113 transitions. [2021-11-02 22:42:27,299 INFO L704 BuchiCegarLoop]: Abstraction has 110 states and 113 transitions. [2021-11-02 22:42:27,299 INFO L587 BuchiCegarLoop]: Abstraction has 110 states and 113 transitions. [2021-11-02 22:42:27,299 INFO L425 BuchiCegarLoop]: ======== Iteration 76============ [2021-11-02 22:42:27,299 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 110 states and 113 transitions. [2021-11-02 22:42:27,299 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:42:27,299 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:42:27,299 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:42:27,300 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [26, 26, 24, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:42:27,300 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:42:27,301 INFO L791 eck$LassoCheckResult]: Stem: 29270#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 29271#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 29280#L367 assume !(main_~length~0 < 1); 29272#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 29273#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 29281#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 29274#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29275#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29276#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29277#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29283#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29375#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29374#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29373#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29372#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29371#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29370#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29369#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29368#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29367#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29366#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29365#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29364#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29363#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29362#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29361#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29360#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29359#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29358#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29357#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29356#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29355#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29354#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29353#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29352#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29351#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29350#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29349#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29348#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29347#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29346#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29345#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29344#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29343#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29342#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29341#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29340#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29339#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29338#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29337#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29336#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29335#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29334#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29333#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29332#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29331#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29330#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29285#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29284#L375-3 assume !(main_~i~0 < main_~length~0); 29282#L375-4 main_~j~0 := 1; 29266#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29267#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29268#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29269#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29329#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29328#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29327#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29326#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29325#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29324#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29323#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29322#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29321#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29320#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29319#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29318#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29317#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29316#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29315#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29314#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29313#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29312#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29311#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29310#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29309#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29308#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29307#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29306#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29305#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29304#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29303#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29302#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29301#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29300#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29299#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29298#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29297#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29296#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29295#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29294#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29293#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29292#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29291#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29290#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29289#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29288#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29287#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29278#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 29279#L380-2 [2021-11-02 22:42:27,301 INFO L793 eck$LassoCheckResult]: Loop: 29279#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29286#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29279#L380-2 [2021-11-02 22:42:27,301 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:42:27,301 INFO L85 PathProgramCache]: Analyzing trace with hash 1624638932, now seen corresponding path program 70 times [2021-11-02 22:42:27,301 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:42:27,302 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [886007526] [2021-11-02 22:42:27,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:27,302 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:42:27,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:42:30,641 INFO L134 CoverageAnalysis]: Checked inductivity of 1228 backedges. 0 proven. 1228 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:42:30,641 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:42:30,642 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [886007526] [2021-11-02 22:42:30,642 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [886007526] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:42:30,642 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1760599498] [2021-11-02 22:42:30,642 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2021-11-02 22:42:30,642 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:42:30,642 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:42:30,647 INFO L229 MonitoredProcess]: Starting monitored process 95 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:42:30,665 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (95)] Waiting until timeout for monitored process [2021-11-02 22:42:38,189 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2021-11-02 22:42:38,189 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:42:38,202 INFO L263 TraceCheckSpWp]: Trace formula consists of 653 conjuncts, 109 conjunts are in the unsatisfiable core [2021-11-02 22:42:38,206 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:42:38,604 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:42:38,684 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 29 [2021-11-02 22:42:38,699 INFO L354 Elim1Store]: treesize reduction 31, result has 22.5 percent of original size [2021-11-02 22:42:38,700 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 36 [2021-11-02 22:42:38,936 INFO L354 Elim1Store]: treesize reduction 80, result has 20.8 percent of original size [2021-11-02 22:42:38,937 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 46 treesize of output 48 [2021-11-02 22:42:41,838 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-02 22:42:41,839 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 12 [2021-11-02 22:42:41,842 INFO L134 CoverageAnalysis]: Checked inductivity of 1228 backedges. 0 proven. 1228 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:42:41,842 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1760599498] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:42:41,843 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:42:41,843 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [55, 56] total 80 [2021-11-02 22:42:41,843 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2139717231] [2021-11-02 22:42:41,843 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:42:41,843 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:42:41,844 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 74 times [2021-11-02 22:42:41,844 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:42:41,844 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1299438642] [2021-11-02 22:42:41,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:41,844 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:42:41,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:42:41,869 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:42:41,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:42:41,870 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:42:41,938 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:42:41,939 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 81 interpolants. [2021-11-02 22:42:41,939 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=213, Invalid=6267, Unknown=0, NotChecked=0, Total=6480 [2021-11-02 22:42:41,939 INFO L87 Difference]: Start difference. First operand 110 states and 113 transitions. cyclomatic complexity: 6 Second operand has 81 states, 80 states have (on average 1.9875) internal successors, (159), 81 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:42:50,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:42:50,176 INFO L93 Difference]: Finished difference Result 114 states and 117 transitions. [2021-11-02 22:42:50,177 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2021-11-02 22:42:50,177 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 114 states and 117 transitions. [2021-11-02 22:42:50,178 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:42:50,179 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 114 states to 113 states and 116 transitions. [2021-11-02 22:42:50,179 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:42:50,179 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:42:50,179 INFO L73 IsDeterministic]: Start isDeterministic. Operand 113 states and 116 transitions. [2021-11-02 22:42:50,179 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:42:50,179 INFO L681 BuchiCegarLoop]: Abstraction has 113 states and 116 transitions. [2021-11-02 22:42:50,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states and 116 transitions. [2021-11-02 22:42:50,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 112. [2021-11-02 22:42:50,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 112 states, 112 states have (on average 1.0267857142857142) internal successors, (115), 111 states have internal predecessors, (115), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:42:50,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 115 transitions. [2021-11-02 22:42:50,193 INFO L704 BuchiCegarLoop]: Abstraction has 112 states and 115 transitions. [2021-11-02 22:42:50,193 INFO L587 BuchiCegarLoop]: Abstraction has 112 states and 115 transitions. [2021-11-02 22:42:50,193 INFO L425 BuchiCegarLoop]: ======== Iteration 77============ [2021-11-02 22:42:50,195 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 112 states and 115 transitions. [2021-11-02 22:42:50,196 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:42:50,196 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:42:50,196 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:42:50,197 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [26, 26, 25, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:42:50,197 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:42:50,198 INFO L791 eck$LassoCheckResult]: Stem: 29951#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 29952#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 29962#L367 assume !(main_~length~0 < 1); 29953#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 29954#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 29963#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 29955#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29956#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29957#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29958#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30013#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30012#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30011#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30010#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30009#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30008#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30007#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30006#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30005#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30004#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30003#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30002#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30001#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30000#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29999#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29998#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29997#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29996#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29995#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29994#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29993#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29992#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29991#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29990#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29989#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29988#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29987#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29986#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29985#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29984#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29983#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29982#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29981#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29980#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29979#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29978#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29977#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29976#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29975#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29974#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29973#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29972#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29971#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29970#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29969#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29968#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29967#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 29966#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 29965#L375-3 assume !(main_~i~0 < main_~length~0); 29964#L375-4 main_~j~0 := 1; 29947#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29948#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29949#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29950#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29961#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30058#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30057#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30056#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30055#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30054#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30053#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30052#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30051#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30050#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30049#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30048#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30047#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30046#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30045#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30044#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30043#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30042#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30041#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30040#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30039#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30038#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30037#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30036#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30035#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30034#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30033#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30032#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30031#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30030#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30029#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30028#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30027#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30026#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30025#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30024#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30023#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30022#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30021#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30020#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30019#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30018#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30017#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30016#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30015#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 29959#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 29960#L380-2 [2021-11-02 22:42:50,198 INFO L793 eck$LassoCheckResult]: Loop: 29960#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30014#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 29960#L380-2 [2021-11-02 22:42:50,198 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:42:50,199 INFO L85 PathProgramCache]: Analyzing trace with hash -2090082537, now seen corresponding path program 71 times [2021-11-02 22:42:50,199 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:42:50,199 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [601523478] [2021-11-02 22:42:50,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:50,200 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:42:50,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:42:53,376 INFO L134 CoverageAnalysis]: Checked inductivity of 1276 backedges. 0 proven. 1276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:42:53,376 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:42:53,376 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [601523478] [2021-11-02 22:42:53,376 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [601523478] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:42:53,376 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1038787298] [2021-11-02 22:42:53,376 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-02 22:42:53,376 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:42:53,377 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:42:53,378 INFO L229 MonitoredProcess]: Starting monitored process 96 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:42:53,379 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (96)] Waiting until timeout for monitored process [2021-11-02 22:43:04,671 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 27 check-sat command(s) [2021-11-02 22:43:04,671 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:43:04,694 INFO L263 TraceCheckSpWp]: Trace formula consists of 668 conjuncts, 112 conjunts are in the unsatisfiable core [2021-11-02 22:43:04,696 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:43:06,981 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:43:07,204 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:43:07,205 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2021-11-02 22:43:12,660 INFO L354 Elim1Store]: treesize reduction 52, result has 11.9 percent of original size [2021-11-02 22:43:12,661 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 40 treesize of output 24 [2021-11-02 22:43:12,667 INFO L134 CoverageAnalysis]: Checked inductivity of 1276 backedges. 0 proven. 1276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:43:12,667 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1038787298] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:43:12,668 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:43:12,668 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [56, 57] total 111 [2021-11-02 22:43:12,668 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1316077736] [2021-11-02 22:43:12,669 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:43:12,669 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:43:12,669 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 75 times [2021-11-02 22:43:12,670 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:43:12,670 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [164449103] [2021-11-02 22:43:12,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:43:12,670 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:43:12,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:43:12,765 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:43:12,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:43:12,768 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:43:12,871 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:43:12,872 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 112 interpolants. [2021-11-02 22:43:12,873 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=386, Invalid=12046, Unknown=0, NotChecked=0, Total=12432 [2021-11-02 22:43:12,874 INFO L87 Difference]: Start difference. First operand 112 states and 115 transitions. cyclomatic complexity: 6 Second operand has 112 states, 111 states have (on average 1.945945945945946) internal successors, (216), 112 states have internal predecessors, (216), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:43:19,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:43:19,082 INFO L93 Difference]: Finished difference Result 171 states and 177 transitions. [2021-11-02 22:43:19,082 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2021-11-02 22:43:19,082 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 171 states and 177 transitions. [2021-11-02 22:43:19,083 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2021-11-02 22:43:19,084 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 171 states to 170 states and 176 transitions. [2021-11-02 22:43:19,084 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-02 22:43:19,084 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-02 22:43:19,084 INFO L73 IsDeterministic]: Start isDeterministic. Operand 170 states and 176 transitions. [2021-11-02 22:43:19,084 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:43:19,085 INFO L681 BuchiCegarLoop]: Abstraction has 170 states and 176 transitions. [2021-11-02 22:43:19,085 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states and 176 transitions. [2021-11-02 22:43:19,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 118. [2021-11-02 22:43:19,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 118 states, 118 states have (on average 1.0338983050847457) internal successors, (122), 117 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:43:19,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 122 transitions. [2021-11-02 22:43:19,087 INFO L704 BuchiCegarLoop]: Abstraction has 118 states and 122 transitions. [2021-11-02 22:43:19,087 INFO L587 BuchiCegarLoop]: Abstraction has 118 states and 122 transitions. [2021-11-02 22:43:19,087 INFO L425 BuchiCegarLoop]: ======== Iteration 78============ [2021-11-02 22:43:19,087 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 118 states and 122 transitions. [2021-11-02 22:43:19,087 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:43:19,087 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:43:19,087 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:43:19,088 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [26, 26, 26, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:43:19,088 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:43:19,088 INFO L791 eck$LassoCheckResult]: Stem: 30679#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 30680#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 30690#L367 assume !(main_~length~0 < 1); 30681#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 30682#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 30691#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 30683#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30684#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30685#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30686#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30743#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30742#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30741#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30740#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30739#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30738#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30737#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30736#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30735#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30734#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30733#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30732#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30731#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30730#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30729#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30728#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30727#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30726#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30725#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30724#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30723#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30722#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30721#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30720#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30719#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30718#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30717#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30716#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30715#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30714#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30713#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30712#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30711#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30710#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30709#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30708#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30707#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30706#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30705#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30704#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30703#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30702#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30701#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30700#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30699#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30698#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30697#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 30696#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 30694#L375-3 assume !(main_~i~0 < main_~length~0); 30692#L375-4 main_~j~0 := 1; 30693#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30791#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30678#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30677#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30689#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30790#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30789#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30788#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30787#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30786#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30785#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30784#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30783#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30782#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30781#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30780#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30779#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30778#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30777#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30776#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30775#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30774#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30773#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30772#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30771#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30770#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30769#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30768#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30767#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30766#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30765#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30764#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30763#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30762#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30761#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30760#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30759#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30758#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30757#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30756#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30755#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30754#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30753#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30752#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30751#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30750#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30749#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30748#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30747#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30746#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30745#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30687#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 30688#L380-2 [2021-11-02 22:43:19,089 INFO L793 eck$LassoCheckResult]: Loop: 30688#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 30744#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 30688#L380-2 [2021-11-02 22:43:19,089 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:43:19,089 INFO L85 PathProgramCache]: Analyzing trace with hash 1475376026, now seen corresponding path program 72 times [2021-11-02 22:43:19,089 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:43:19,089 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1548055065] [2021-11-02 22:43:19,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:43:19,089 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:43:19,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:43:20,480 INFO L134 CoverageAnalysis]: Checked inductivity of 1326 backedges. 601 proven. 725 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:43:20,481 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:43:20,481 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1548055065] [2021-11-02 22:43:20,481 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1548055065] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:43:20,481 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1967895123] [2021-11-02 22:43:20,481 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-11-02 22:43:20,481 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:43:20,481 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:43:20,483 INFO L229 MonitoredProcess]: Starting monitored process 97 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:43:20,484 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (97)] Waiting until timeout for monitored process [2021-11-02 22:43:35,162 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 27 check-sat command(s) [2021-11-02 22:43:35,162 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-02 22:43:35,191 INFO L263 TraceCheckSpWp]: Trace formula consists of 683 conjuncts, 55 conjunts are in the unsatisfiable core [2021-11-02 22:43:35,193 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:43:37,768 INFO L134 CoverageAnalysis]: Checked inductivity of 1326 backedges. 650 proven. 676 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:43:37,769 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1967895123] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:43:37,769 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:43:37,769 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [56, 56] total 83 [2021-11-02 22:43:37,769 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1127215760] [2021-11-02 22:43:37,770 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:43:37,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:43:37,770 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 76 times [2021-11-02 22:43:37,770 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:43:37,770 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [722047105] [2021-11-02 22:43:37,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:43:37,771 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:43:37,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:43:37,885 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:43:37,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:43:37,889 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:43:37,977 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:43:37,978 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 83 interpolants. [2021-11-02 22:43:37,979 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1519, Invalid=5287, Unknown=0, NotChecked=0, Total=6806 [2021-11-02 22:43:37,979 INFO L87 Difference]: Start difference. First operand 118 states and 122 transitions. cyclomatic complexity: 7 Second operand has 83 states, 83 states have (on average 2.0120481927710845) internal successors, (167), 83 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:43:39,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:43:39,374 INFO L93 Difference]: Finished difference Result 167 states and 170 transitions. [2021-11-02 22:43:39,375 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2021-11-02 22:43:39,375 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 167 states and 170 transitions. [2021-11-02 22:43:39,376 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:43:39,377 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 167 states to 115 states and 118 transitions. [2021-11-02 22:43:39,377 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2021-11-02 22:43:39,377 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2021-11-02 22:43:39,377 INFO L73 IsDeterministic]: Start isDeterministic. Operand 115 states and 118 transitions. [2021-11-02 22:43:39,378 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-02 22:43:39,378 INFO L681 BuchiCegarLoop]: Abstraction has 115 states and 118 transitions. [2021-11-02 22:43:39,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states and 118 transitions. [2021-11-02 22:43:39,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 114. [2021-11-02 22:43:39,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 114 states, 114 states have (on average 1.0263157894736843) internal successors, (117), 113 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:43:39,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 117 transitions. [2021-11-02 22:43:39,381 INFO L704 BuchiCegarLoop]: Abstraction has 114 states and 117 transitions. [2021-11-02 22:43:39,381 INFO L587 BuchiCegarLoop]: Abstraction has 114 states and 117 transitions. [2021-11-02 22:43:39,381 INFO L425 BuchiCegarLoop]: ======== Iteration 79============ [2021-11-02 22:43:39,382 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 114 states and 117 transitions. [2021-11-02 22:43:39,382 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2021-11-02 22:43:39,382 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:43:39,383 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:43:39,384 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [27, 27, 25, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:43:39,384 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2021-11-02 22:43:39,384 INFO L791 eck$LassoCheckResult]: Stem: 31442#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 31443#L-1 havoc main_#res;havoc main_#t~nondet205, main_#t~malloc206.base, main_#t~malloc206.offset, main_#t~nondet207, main_#t~post209, main_#t~post208, main_#t~mem210, main_#t~mem211, main_#t~post212, main_#t~post213, main_~i~0, main_~j~0, main_~length~0, main_~arr~0.base, main_~arr~0.offset, main_~value~0;havoc main_~i~0;havoc main_~j~0;main_~length~0 := main_#t~nondet205;havoc main_#t~nondet205; 31448#L367 assume !(main_~length~0 < 1); 31444#L367-2 assume !!(main_~length~0 <= 536870911);call main_#t~malloc206.base, main_#t~malloc206.offset := #Ultimate.allocOnStack(4 * main_~length~0);main_~arr~0.base, main_~arr~0.offset := main_#t~malloc206.base, main_#t~malloc206.offset; 31445#L371 assume !(main_~arr~0.base == 0 && main_~arr~0.offset == 0);main_~value~0 := main_#t~nondet207;havoc main_#t~nondet207; 31449#L373 assume !!(main_~value~0 <= 1073741823);main_~i~0 := 0; 31438#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31439#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31440#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31441#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31451#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31547#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31546#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31545#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31544#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31543#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31542#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31541#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31540#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31539#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31538#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31537#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31536#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31535#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31534#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31533#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31532#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31531#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31530#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31529#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31528#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31527#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31526#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31525#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31524#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31523#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31522#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31521#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31520#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31519#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31518#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31517#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31516#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31515#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31514#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31513#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31512#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31511#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31510#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31509#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31508#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31507#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31506#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31505#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31504#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31503#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31502#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31501#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31500#L375-3 assume !!(main_~i~0 < main_~length~0);main_#t~post209 := main_~value~0;main_~value~0 := 1 + main_#t~post209;call write~int(main_#t~post209, main_~arr~0.base, main_~arr~0.offset + 4 * main_~i~0, 4);havoc main_#t~post209; 31453#L375-2 main_#t~post208 := main_~i~0;main_~i~0 := 1 + main_#t~post208;havoc main_#t~post208; 31452#L375-3 assume !(main_~i~0 < main_~length~0); 31450#L375-4 main_~j~0 := 1; 31434#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31435#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31436#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31437#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31499#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31498#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31497#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31496#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31495#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31494#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31493#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31492#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31491#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31490#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31489#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31488#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31487#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31486#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31485#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31484#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31483#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31482#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31481#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31480#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31479#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31478#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31477#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31476#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31475#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31474#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31473#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31472#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31471#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31470#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31469#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31468#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31467#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31466#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31465#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31464#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31463#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31462#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31461#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31460#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31459#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31458#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31457#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31456#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31455#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31446#L380 assume !(main_#t~mem210 > main_#t~mem211);havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post213 := main_~j~0;main_~j~0 := main_#t~post213 - 1;havoc main_#t~post213; 31447#L380-2 [2021-11-02 22:43:39,385 INFO L793 eck$LassoCheckResult]: Loop: 31447#L380-2 assume !!(0 < main_~j~0 && main_~j~0 < main_~length~0);call main_#t~mem210 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * main_~j~0, 4);call main_#t~mem211 := read~int(main_~arr~0.base, main_~arr~0.offset + 4 * (main_~j~0 - 1), 4); 31454#L380 assume main_#t~mem210 > main_#t~mem211;havoc main_#t~mem210;havoc main_#t~mem211;main_#t~post212 := main_~j~0;main_~j~0 := 1 + main_#t~post212;havoc main_#t~post212; 31447#L380-2 [2021-11-02 22:43:39,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:43:39,385 INFO L85 PathProgramCache]: Analyzing trace with hash 559220089, now seen corresponding path program 73 times [2021-11-02 22:43:39,386 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:43:39,386 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1980768153] [2021-11-02 22:43:39,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:43:39,386 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:43:39,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:43:42,774 INFO L134 CoverageAnalysis]: Checked inductivity of 1329 backedges. 0 proven. 1329 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:43:42,774 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:43:42,774 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1980768153] [2021-11-02 22:43:42,774 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1980768153] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:43:42,774 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [21246180] [2021-11-02 22:43:42,775 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-02 22:43:42,775 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:43:42,775 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:43:42,781 INFO L229 MonitoredProcess]: Starting monitored process 98 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:43:42,807 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_283f872b-2795-4b86-ba9e-898c791d41b4/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (98)] Waiting until timeout for monitored process [2021-11-02 22:43:47,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:43:47,276 INFO L263 TraceCheckSpWp]: Trace formula consists of 678 conjuncts, 114 conjunts are in the unsatisfiable core [2021-11-02 22:43:47,278 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:43:49,480 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2021-11-02 22:43:49,692 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:43:49,693 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2021-11-02 22:43:49,919 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-02 22:43:49,937 INFO L354 Elim1Store]: treesize reduction 60, result has 24.1 percent of original size [2021-11-02 22:43:49,937 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 36 treesize of output 38 [2021-11-02 22:43:54,709 INFO L354 Elim1Store]: treesize reduction 52, result has 11.9 percent of original size [2021-11-02 22:43:54,710 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 4 select indices, 4 select index equivalence classes, 1 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 40 treesize of output 24 [2021-11-02 22:43:54,716 INFO L134 CoverageAnalysis]: Checked inductivity of 1329 backedges. 0 proven. 1329 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:43:54,717 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [21246180] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-02 22:43:54,717 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-02 22:43:54,717 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [57, 59] total 114 [2021-11-02 22:43:54,717 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1338358390] [2021-11-02 22:43:54,718 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-02 22:43:54,718 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:43:54,718 INFO L85 PathProgramCache]: Analyzing trace with hash 2436, now seen corresponding path program 77 times [2021-11-02 22:43:54,719 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:43:54,719 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1814229877] [2021-11-02 22:43:54,719 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:43:54,719 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:43:54,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:43:54,762 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:43:54,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:43:54,765 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:43:54,854 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:43:54,855 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 115 interpolants. [2021-11-02 22:43:54,856 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=402, Invalid=12708, Unknown=0, NotChecked=0, Total=13110 [2021-11-02 22:43:54,856 INFO L87 Difference]: Start difference. First operand 114 states and 117 transitions. cyclomatic complexity: 6 Second operand has 115 states, 114 states have (on average 1.9298245614035088) internal successors, (220), 115 states have internal predecessors, (220), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)