./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 9ad7fb26 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3012c2825f53c0db53d950c12df6540de859b34b2bef033c36a98846352dedd3 --- Real Ultimate output --- This is Ultimate 0.2.1-dev-9ad7fb2 [2021-11-02 22:42:00,886 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-02 22:42:00,888 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-02 22:42:00,922 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-02 22:42:00,922 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-02 22:42:00,924 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-02 22:42:00,926 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-02 22:42:00,928 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-02 22:42:00,930 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-02 22:42:00,931 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-02 22:42:00,932 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-02 22:42:00,934 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-02 22:42:00,934 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-02 22:42:00,936 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-02 22:42:00,938 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-02 22:42:00,939 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-02 22:42:00,940 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-02 22:42:00,942 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-02 22:42:00,944 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-02 22:42:00,947 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-02 22:42:00,949 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-02 22:42:00,950 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-02 22:42:00,952 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-02 22:42:00,953 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-02 22:42:00,957 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-02 22:42:00,958 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-02 22:42:00,958 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-02 22:42:00,959 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-02 22:42:00,960 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-02 22:42:00,961 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-02 22:42:00,962 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-02 22:42:00,963 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-02 22:42:00,964 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-02 22:42:00,965 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-02 22:42:00,967 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-02 22:42:00,967 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-02 22:42:00,968 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-02 22:42:00,969 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-02 22:42:00,969 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-02 22:42:00,970 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-02 22:42:00,971 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-02 22:42:00,972 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-11-02 22:42:01,001 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-02 22:42:01,001 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-02 22:42:01,001 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-02 22:42:01,002 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-02 22:42:01,003 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-02 22:42:01,003 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-02 22:42:01,003 INFO L138 SettingsManager]: * Use SBE=true [2021-11-02 22:42:01,004 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-11-02 22:42:01,004 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-11-02 22:42:01,004 INFO L138 SettingsManager]: * Use old map elimination=false [2021-11-02 22:42:01,005 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-11-02 22:42:01,005 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-11-02 22:42:01,005 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-11-02 22:42:01,005 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-02 22:42:01,006 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-02 22:42:01,006 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-11-02 22:42:01,006 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-02 22:42:01,007 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-02 22:42:01,007 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-02 22:42:01,007 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-11-02 22:42:01,007 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-11-02 22:42:01,008 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-11-02 22:42:01,008 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-02 22:42:01,008 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-02 22:42:01,009 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-11-02 22:42:01,009 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-02 22:42:01,009 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-11-02 22:42:01,009 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-02 22:42:01,010 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-02 22:42:01,010 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-02 22:42:01,010 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-02 22:42:01,011 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-02 22:42:01,012 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-11-02 22:42:01,012 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3012c2825f53c0db53d950c12df6540de859b34b2bef033c36a98846352dedd3 [2021-11-02 22:42:01,259 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-02 22:42:01,288 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-02 22:42:01,290 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-02 22:42:01,292 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-02 22:42:01,293 INFO L275 PluginConnector]: CDTParser initialized [2021-11-02 22:42:01,294 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-1.i [2021-11-02 22:42:01,366 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/data/24fe7e471/eacc659100904d099276c12cb941da60/FLAGa8a882c57 [2021-11-02 22:42:02,044 INFO L306 CDTParser]: Found 1 translation units. [2021-11-02 22:42:02,045 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-1.i [2021-11-02 22:42:02,076 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/data/24fe7e471/eacc659100904d099276c12cb941da60/FLAGa8a882c57 [2021-11-02 22:42:02,225 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/data/24fe7e471/eacc659100904d099276c12cb941da60 [2021-11-02 22:42:02,228 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-02 22:42:02,230 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-02 22:42:02,235 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-02 22:42:02,235 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-02 22:42:02,239 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-02 22:42:02,240 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.11 10:42:02" (1/1) ... [2021-11-02 22:42:02,243 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@41d5bcc3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:42:02, skipping insertion in model container [2021-11-02 22:42:02,243 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.11 10:42:02" (1/1) ... [2021-11-02 22:42:02,252 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-02 22:42:02,348 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-02 22:42:03,006 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-1.i[44118,44131] [2021-11-02 22:42:03,016 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-1.i[44660,44673] [2021-11-02 22:42:03,177 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-1.i[56247,56260] [2021-11-02 22:42:03,178 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-1.i[56368,56381] [2021-11-02 22:42:03,187 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-02 22:42:03,198 INFO L203 MainTranslator]: Completed pre-run [2021-11-02 22:42:03,259 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-1.i[44118,44131] [2021-11-02 22:42:03,261 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-1.i[44660,44673] [2021-11-02 22:42:03,406 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-1.i[56247,56260] [2021-11-02 22:42:03,419 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-1.i[56368,56381] [2021-11-02 22:42:03,425 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-02 22:42:03,513 INFO L208 MainTranslator]: Completed translation [2021-11-02 22:42:03,514 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:42:03 WrapperNode [2021-11-02 22:42:03,514 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-02 22:42:03,516 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-02 22:42:03,517 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-02 22:42:03,517 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-02 22:42:03,525 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:42:03" (1/1) ... [2021-11-02 22:42:03,577 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:42:03" (1/1) ... [2021-11-02 22:42:03,681 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-02 22:42:03,682 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-02 22:42:03,682 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-02 22:42:03,682 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-02 22:42:03,692 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:42:03" (1/1) ... [2021-11-02 22:42:03,692 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:42:03" (1/1) ... [2021-11-02 22:42:03,719 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:42:03" (1/1) ... [2021-11-02 22:42:03,720 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:42:03" (1/1) ... [2021-11-02 22:42:03,772 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:42:03" (1/1) ... [2021-11-02 22:42:03,786 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:42:03" (1/1) ... [2021-11-02 22:42:03,808 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:42:03" (1/1) ... [2021-11-02 22:42:03,830 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-02 22:42:03,831 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-02 22:42:03,831 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-02 22:42:03,832 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-02 22:42:03,834 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:42:03" (1/1) ... [2021-11-02 22:42:03,844 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:42:03,857 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:42:03,878 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:42:03,904 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-11-02 22:42:03,936 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2021-11-02 22:42:03,937 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2021-11-02 22:42:03,937 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-02 22:42:03,937 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2021-11-02 22:42:03,937 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-11-02 22:42:03,937 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-02 22:42:03,937 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-11-02 22:42:03,938 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-02 22:42:03,938 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-11-02 22:42:03,938 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-11-02 22:42:03,938 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-02 22:42:03,938 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-02 22:42:03,938 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-02 22:42:04,252 WARN L805 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-11-02 22:42:05,556 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-02 22:42:05,556 INFO L299 CfgBuilder]: Removed 105 assume(true) statements. [2021-11-02 22:42:05,559 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.11 10:42:05 BoogieIcfgContainer [2021-11-02 22:42:05,559 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-02 22:42:05,560 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-11-02 22:42:05,561 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-11-02 22:42:05,564 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-11-02 22:42:05,565 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-02 22:42:05,565 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 02.11 10:42:02" (1/3) ... [2021-11-02 22:42:05,566 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@65ec212a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 02.11 10:42:05, skipping insertion in model container [2021-11-02 22:42:05,567 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-02 22:42:05,567 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:42:03" (2/3) ... [2021-11-02 22:42:05,568 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@65ec212a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 02.11 10:42:05, skipping insertion in model container [2021-11-02 22:42:05,568 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-02 22:42:05,569 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.11 10:42:05" (3/3) ... [2021-11-02 22:42:05,574 INFO L389 chiAutomizerObserver]: Analyzing ICFG uthash_JEN_test6-1.i [2021-11-02 22:42:05,631 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-11-02 22:42:05,632 INFO L360 BuchiCegarLoop]: Hoare is false [2021-11-02 22:42:05,632 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-11-02 22:42:05,632 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-11-02 22:42:05,632 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-11-02 22:42:05,632 INFO L364 BuchiCegarLoop]: Difference is false [2021-11-02 22:42:05,632 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-11-02 22:42:05,633 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-11-02 22:42:05,668 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 218 states, 213 states have (on average 1.6384976525821595) internal successors, (349), 213 states have internal predecessors, (349), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-02 22:42:05,708 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 200 [2021-11-02 22:42:05,708 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:42:05,708 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:42:05,717 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-02 22:42:05,717 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:42:05,717 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-11-02 22:42:05,718 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 218 states, 213 states have (on average 1.6384976525821595) internal successors, (349), 213 states have internal predecessors, (349), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-02 22:42:05,731 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 200 [2021-11-02 22:42:05,731 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:42:05,732 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:42:05,732 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-02 22:42:05,732 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:42:05,739 INFO L791 eck$LassoCheckResult]: Stem: 211#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string30.base, #t~string30.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string30.base, #t~string30.offset, 1);call write~init~int(0, #t~string30.base, 1 + #t~string30.offset, 1);call #t~string31.base, #t~string31.offset := #Ultimate.allocOnStack(21);call ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := #Ultimate.allocOnStack(40);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 137#L-1true havoc main_#res;havoc main_#t~ret45.base, main_#t~ret45.offset, main_#t~mem46, main_#t~mem47, main_#t~mem48, main_#t~mem50, main_#t~mem49, main_#t~mem51, main_#t~mem52, main_#t~mem54, main_#t~mem53, main_#t~mem55, main_#t~mem56, main_#t~mem58, main_#t~mem57, main_#t~mem59, main_#t~mem60, main_#t~switch61, main_#t~mem62, main_#t~mem63, main_#t~mem64, main_#t~mem65, main_#t~mem66, main_#t~mem67, main_#t~mem68, main_#t~mem69, main_#t~mem70, main_#t~mem71, main_#t~mem72, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~ret73.base, main_#t~ret73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76.base, main_#t~mem76.offset, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79.base, main_#t~mem79.offset, main_#t~mem80.base, main_#t~mem80.offset, main_#t~ret81.base, main_#t~ret81.offset, main_#t~mem82.base, main_#t~mem82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86.base, main_#t~mem86.offset, main_#t~mem87.base, main_#t~mem87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91.base, main_#t~mem91.offset, main_#t~mem92, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95.base, main_#t~mem95.offset, main_#t~mem96.base, main_#t~mem96.offset, main_#t~mem97, main_#t~post98, main_#t~mem99.base, main_#t~mem99.offset, main_#t~mem100, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103, main_#t~post104, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem109, main_#t~mem108, main_#t~mem110.base, main_#t~mem110.offset, main_#t~mem111, main_#t~short112, main_#t~mem113.base, main_#t~mem113.offset, main_#t~mem114, main_#t~ret115.base, main_#t~ret115.offset, main_#t~mem116.base, main_#t~mem116.offset, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem118.base, main_#t~mem118.offset, main_#t~mem119, main_#t~mem120.base, main_#t~mem120.offset, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem124, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem128, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127, main_#t~ite129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem140, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem141.base, main_#t~mem141.offset, main_#t~mem142, main_#t~pre143, main_#t~mem144.base, main_#t~mem144.offset, main_#t~mem145, main_#t~mem146.base, main_#t~mem146.offset, main_#t~mem147, main_#t~post148, main_#t~mem152, main_#t~mem150, main_#t~mem149.base, main_#t~mem149.offset, main_#t~mem151, main_#t~mem153, main_#t~post154, main_#t~mem155.base, main_#t~mem155.offset, main_#t~mem156.base, main_#t~mem156.offset, main_#t~mem157.base, main_#t~mem157.offset, main_#t~post131, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133, main_#t~mem158.base, main_#t~mem158.offset, main_#t~mem159.base, main_#t~mem159.offset, main_#t~mem160.base, main_#t~mem160.offset, main_#t~mem161, main_#t~mem162.base, main_#t~mem162.offset, main_#t~mem163, main_#t~mem164.base, main_#t~mem164.offset, main_#t~mem165, main_#t~post166, main_#t~mem167.base, main_#t~mem167.offset, main_#t~mem168.base, main_#t~mem168.offset, main_#t~mem169.base, main_#t~mem169.offset, main_#t~mem170.base, main_#t~mem170.offset, main_#t~mem173, main_#t~mem171.base, main_#t~mem171.offset, main_#t~mem172, main_#t~ite176, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178, main_#t~mem179.base, main_#t~mem179.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem42, main_#t~post43, main_#t~mem44, main_#t~mem184, main_#t~mem183, main_#t~mem185, main_#t~mem186, main_#t~mem188, main_#t~mem187, main_#t~mem189, main_#t~mem190, main_#t~mem192, main_#t~mem191, main_#t~mem193, main_#t~mem194, main_#t~switch195, main_#t~mem196, main_#t~mem197, main_#t~mem198, main_#t~mem199, main_#t~mem200, main_#t~mem201, main_#t~mem202, main_#t~mem203, main_#t~mem204, main_#t~mem205, main_#t~mem206, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem216, main_#t~mem217, main_#t~mem218, main_#t~short219, main_#t~mem220.base, main_#t~mem220.offset, main_#t~ret221, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~short228, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232, main_#t~mem233.base, main_#t~mem233.offset, main_#t~mem234.base, main_#t~mem234.offset, main_#t~mem235.base, main_#t~mem235.offset, main_#t~mem236.base, main_#t~mem236.offset, main_#t~mem237.base, main_#t~mem237.offset, main_#t~mem238.base, main_#t~mem238.offset, main_#t~mem239, main_#t~mem240.base, main_#t~mem240.offset, main_#t~mem241.base, main_#t~mem241.offset, main_#t~mem242.base, main_#t~mem242.offset, main_#t~mem243, main_#t~mem244.base, main_#t~mem244.offset, main_#t~mem245.base, main_#t~mem245.offset, main_#t~mem246.base, main_#t~mem246.offset, main_#t~mem247.base, main_#t~mem247.offset, main_#t~mem248.base, main_#t~mem248.offset, main_#t~mem249, main_#t~mem250.base, main_#t~mem250.offset, main_#t~mem253, main_#t~mem251.base, main_#t~mem251.offset, main_#t~mem252, main_#t~mem254.base, main_#t~mem254.offset, main_#t~mem255.base, main_#t~mem255.offset, main_#t~mem256, main_#t~post257, main_#t~mem258.base, main_#t~mem258.offset, main_#t~mem259.base, main_#t~mem259.offset, main_#t~mem260.base, main_#t~mem260.offset, main_#t~mem261.base, main_#t~mem261.offset, main_#t~mem262.base, main_#t~mem262.offset, main_#t~mem263.base, main_#t~mem263.offset, main_#t~mem264.base, main_#t~mem264.offset, main_#t~mem265.base, main_#t~mem265.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem266.base, main_#t~mem266.offset, main_#t~mem267, main_#t~post268, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem180, main_#t~post181, main_#t~mem182, main_#t~mem269.base, main_#t~mem269.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 10#L989-4true [2021-11-02 22:42:05,739 INFO L793 eck$LassoCheckResult]: Loop: 10#L989-4true call main_#t~mem44 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 5#L989-1true assume !!(main_#t~mem44 < 10);havoc main_#t~mem44;real_malloc_#in~n := 40;havoc real_malloc_#res.base, real_malloc_#res.offset;havoc real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset, real_malloc_~n;real_malloc_~n := real_malloc_#in~n;call real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset := #Ultimate.allocOnHeap(real_malloc_~n);real_malloc_#res.base, real_malloc_#res.offset := real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset;havoc real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset; 87#L979true main_#t~ret45.base, main_#t~ret45.offset := real_malloc_#res.base, real_malloc_#res.offset;main_~user~0.base, main_~user~0.offset := main_#t~ret45.base, main_#t~ret45.offset;havoc main_#t~ret45.base, main_#t~ret45.offset; 11#L991true assume main_~user~0.base == 0 && main_~user~0.offset == 0;assume false; 81#L991-2true call main_#t~mem46 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem46, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem46;call main_#t~mem47 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem48 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem47 * main_#t~mem48, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem47;havoc main_#t~mem48; 200#L996-118true assume !true; 197#L989-3true call main_#t~mem42 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post43 := main_#t~mem42;call write~int(1 + main_#t~post43, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem42;havoc main_#t~post43; 10#L989-4true [2021-11-02 22:42:05,745 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:42:05,745 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2021-11-02 22:42:05,752 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:42:05,753 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1359238853] [2021-11-02 22:42:05,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:05,754 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:42:05,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:42:05,874 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:42:05,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:42:05,933 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:42:05,936 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:42:05,936 INFO L85 PathProgramCache]: Analyzing trace with hash -1530816170, now seen corresponding path program 1 times [2021-11-02 22:42:05,937 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:42:05,937 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [627417546] [2021-11-02 22:42:05,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:05,937 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:42:05,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:42:06,020 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:42:06,020 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:42:06,021 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [627417546] [2021-11-02 22:42:06,021 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [627417546] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-02 22:42:06,021 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-02 22:42:06,022 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-02 22:42:06,022 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1508032172] [2021-11-02 22:42:06,031 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-02 22:42:06,032 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:42:06,057 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-11-02 22:42:06,058 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-11-02 22:42:06,061 INFO L87 Difference]: Start difference. First operand has 218 states, 213 states have (on average 1.6384976525821595) internal successors, (349), 213 states have internal predecessors, (349), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:42:06,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:42:06,101 INFO L93 Difference]: Finished difference Result 214 states and 272 transitions. [2021-11-02 22:42:06,101 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-11-02 22:42:06,103 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 214 states and 272 transitions. [2021-11-02 22:42:06,111 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 195 [2021-11-02 22:42:06,121 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 214 states to 202 states and 260 transitions. [2021-11-02 22:42:06,123 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 202 [2021-11-02 22:42:06,124 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 202 [2021-11-02 22:42:06,125 INFO L73 IsDeterministic]: Start isDeterministic. Operand 202 states and 260 transitions. [2021-11-02 22:42:06,127 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-02 22:42:06,128 INFO L681 BuchiCegarLoop]: Abstraction has 202 states and 260 transitions. [2021-11-02 22:42:06,157 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202 states and 260 transitions. [2021-11-02 22:42:06,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202 to 202. [2021-11-02 22:42:06,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 202 states, 198 states have (on average 1.2828282828282829) internal successors, (254), 197 states have internal predecessors, (254), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-02 22:42:06,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 260 transitions. [2021-11-02 22:42:06,184 INFO L704 BuchiCegarLoop]: Abstraction has 202 states and 260 transitions. [2021-11-02 22:42:06,184 INFO L587 BuchiCegarLoop]: Abstraction has 202 states and 260 transitions. [2021-11-02 22:42:06,184 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-11-02 22:42:06,184 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 202 states and 260 transitions. [2021-11-02 22:42:06,187 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 195 [2021-11-02 22:42:06,188 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:42:06,188 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:42:06,195 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-02 22:42:06,195 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:42:06,196 INFO L791 eck$LassoCheckResult]: Stem: 641#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string30.base, #t~string30.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string30.base, #t~string30.offset, 1);call write~init~int(0, #t~string30.base, 1 + #t~string30.offset, 1);call #t~string31.base, #t~string31.offset := #Ultimate.allocOnStack(21);call ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := #Ultimate.allocOnStack(40);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 620#L-1 havoc main_#res;havoc main_#t~ret45.base, main_#t~ret45.offset, main_#t~mem46, main_#t~mem47, main_#t~mem48, main_#t~mem50, main_#t~mem49, main_#t~mem51, main_#t~mem52, main_#t~mem54, main_#t~mem53, main_#t~mem55, main_#t~mem56, main_#t~mem58, main_#t~mem57, main_#t~mem59, main_#t~mem60, main_#t~switch61, main_#t~mem62, main_#t~mem63, main_#t~mem64, main_#t~mem65, main_#t~mem66, main_#t~mem67, main_#t~mem68, main_#t~mem69, main_#t~mem70, main_#t~mem71, main_#t~mem72, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~ret73.base, main_#t~ret73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76.base, main_#t~mem76.offset, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79.base, main_#t~mem79.offset, main_#t~mem80.base, main_#t~mem80.offset, main_#t~ret81.base, main_#t~ret81.offset, main_#t~mem82.base, main_#t~mem82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86.base, main_#t~mem86.offset, main_#t~mem87.base, main_#t~mem87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91.base, main_#t~mem91.offset, main_#t~mem92, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95.base, main_#t~mem95.offset, main_#t~mem96.base, main_#t~mem96.offset, main_#t~mem97, main_#t~post98, main_#t~mem99.base, main_#t~mem99.offset, main_#t~mem100, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103, main_#t~post104, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem109, main_#t~mem108, main_#t~mem110.base, main_#t~mem110.offset, main_#t~mem111, main_#t~short112, main_#t~mem113.base, main_#t~mem113.offset, main_#t~mem114, main_#t~ret115.base, main_#t~ret115.offset, main_#t~mem116.base, main_#t~mem116.offset, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem118.base, main_#t~mem118.offset, main_#t~mem119, main_#t~mem120.base, main_#t~mem120.offset, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem124, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem128, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127, main_#t~ite129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem140, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem141.base, main_#t~mem141.offset, main_#t~mem142, main_#t~pre143, main_#t~mem144.base, main_#t~mem144.offset, main_#t~mem145, main_#t~mem146.base, main_#t~mem146.offset, main_#t~mem147, main_#t~post148, main_#t~mem152, main_#t~mem150, main_#t~mem149.base, main_#t~mem149.offset, main_#t~mem151, main_#t~mem153, main_#t~post154, main_#t~mem155.base, main_#t~mem155.offset, main_#t~mem156.base, main_#t~mem156.offset, main_#t~mem157.base, main_#t~mem157.offset, main_#t~post131, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133, main_#t~mem158.base, main_#t~mem158.offset, main_#t~mem159.base, main_#t~mem159.offset, main_#t~mem160.base, main_#t~mem160.offset, main_#t~mem161, main_#t~mem162.base, main_#t~mem162.offset, main_#t~mem163, main_#t~mem164.base, main_#t~mem164.offset, main_#t~mem165, main_#t~post166, main_#t~mem167.base, main_#t~mem167.offset, main_#t~mem168.base, main_#t~mem168.offset, main_#t~mem169.base, main_#t~mem169.offset, main_#t~mem170.base, main_#t~mem170.offset, main_#t~mem173, main_#t~mem171.base, main_#t~mem171.offset, main_#t~mem172, main_#t~ite176, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178, main_#t~mem179.base, main_#t~mem179.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem42, main_#t~post43, main_#t~mem44, main_#t~mem184, main_#t~mem183, main_#t~mem185, main_#t~mem186, main_#t~mem188, main_#t~mem187, main_#t~mem189, main_#t~mem190, main_#t~mem192, main_#t~mem191, main_#t~mem193, main_#t~mem194, main_#t~switch195, main_#t~mem196, main_#t~mem197, main_#t~mem198, main_#t~mem199, main_#t~mem200, main_#t~mem201, main_#t~mem202, main_#t~mem203, main_#t~mem204, main_#t~mem205, main_#t~mem206, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem216, main_#t~mem217, main_#t~mem218, main_#t~short219, main_#t~mem220.base, main_#t~mem220.offset, main_#t~ret221, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~short228, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232, main_#t~mem233.base, main_#t~mem233.offset, main_#t~mem234.base, main_#t~mem234.offset, main_#t~mem235.base, main_#t~mem235.offset, main_#t~mem236.base, main_#t~mem236.offset, main_#t~mem237.base, main_#t~mem237.offset, main_#t~mem238.base, main_#t~mem238.offset, main_#t~mem239, main_#t~mem240.base, main_#t~mem240.offset, main_#t~mem241.base, main_#t~mem241.offset, main_#t~mem242.base, main_#t~mem242.offset, main_#t~mem243, main_#t~mem244.base, main_#t~mem244.offset, main_#t~mem245.base, main_#t~mem245.offset, main_#t~mem246.base, main_#t~mem246.offset, main_#t~mem247.base, main_#t~mem247.offset, main_#t~mem248.base, main_#t~mem248.offset, main_#t~mem249, main_#t~mem250.base, main_#t~mem250.offset, main_#t~mem253, main_#t~mem251.base, main_#t~mem251.offset, main_#t~mem252, main_#t~mem254.base, main_#t~mem254.offset, main_#t~mem255.base, main_#t~mem255.offset, main_#t~mem256, main_#t~post257, main_#t~mem258.base, main_#t~mem258.offset, main_#t~mem259.base, main_#t~mem259.offset, main_#t~mem260.base, main_#t~mem260.offset, main_#t~mem261.base, main_#t~mem261.offset, main_#t~mem262.base, main_#t~mem262.offset, main_#t~mem263.base, main_#t~mem263.offset, main_#t~mem264.base, main_#t~mem264.offset, main_#t~mem265.base, main_#t~mem265.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem266.base, main_#t~mem266.offset, main_#t~mem267, main_#t~post268, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem180, main_#t~post181, main_#t~mem182, main_#t~mem269.base, main_#t~mem269.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 453#L989-4 [2021-11-02 22:42:06,198 INFO L793 eck$LassoCheckResult]: Loop: 453#L989-4 call main_#t~mem44 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 444#L989-1 assume !!(main_#t~mem44 < 10);havoc main_#t~mem44;real_malloc_#in~n := 40;havoc real_malloc_#res.base, real_malloc_#res.offset;havoc real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset, real_malloc_~n;real_malloc_~n := real_malloc_#in~n;call real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset := #Ultimate.allocOnHeap(real_malloc_~n);real_malloc_#res.base, real_malloc_#res.offset := real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset;havoc real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset; 446#L979 main_#t~ret45.base, main_#t~ret45.offset := real_malloc_#res.base, real_malloc_#res.offset;main_~user~0.base, main_~user~0.offset := main_#t~ret45.base, main_#t~ret45.offset;havoc main_#t~ret45.base, main_#t~ret45.offset; 454#L991 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 455#L991-2 call main_#t~mem46 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem46, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem46;call main_#t~mem47 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem48 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem47 * main_#t~mem48, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem47;havoc main_#t~mem48; 565#L996-118 havoc main_~_ha_hashv~0; 609#L996-49 goto; 610#L996-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 448#L996-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 472#L996-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch61 := 11 == main_~_hj_k~0; 637#L996-10 assume main_#t~switch61;call main_#t~mem62 := read~int(main_~_hj_key~0.base, 10 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 16777216 * (main_#t~mem62 % 256);havoc main_#t~mem62; 640#L996-12 main_#t~switch61 := main_#t~switch61 || 10 == main_~_hj_k~0; 544#L996-13 assume main_#t~switch61;call main_#t~mem63 := read~int(main_~_hj_key~0.base, 9 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 65536 * (main_#t~mem63 % 256);havoc main_#t~mem63; 545#L996-15 main_#t~switch61 := main_#t~switch61 || 9 == main_~_hj_k~0; 638#L996-16 assume main_#t~switch61;call main_#t~mem64 := read~int(main_~_hj_key~0.base, 8 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 256 * (main_#t~mem64 % 256);havoc main_#t~mem64; 639#L996-18 main_#t~switch61 := main_#t~switch61 || 8 == main_~_hj_k~0; 630#L996-19 assume main_#t~switch61;call main_#t~mem65 := read~int(main_~_hj_key~0.base, 7 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 16777216 * (main_#t~mem65 % 256);havoc main_#t~mem65; 626#L996-21 main_#t~switch61 := main_#t~switch61 || 7 == main_~_hj_k~0; 606#L996-22 assume main_#t~switch61;call main_#t~mem66 := read~int(main_~_hj_key~0.base, 6 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 65536 * (main_#t~mem66 % 256);havoc main_#t~mem66; 607#L996-24 main_#t~switch61 := main_#t~switch61 || 6 == main_~_hj_k~0; 623#L996-25 assume main_#t~switch61;call main_#t~mem67 := read~int(main_~_hj_key~0.base, 5 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 256 * (main_#t~mem67 % 256);havoc main_#t~mem67; 601#L996-27 main_#t~switch61 := main_#t~switch61 || 5 == main_~_hj_k~0; 449#L996-28 assume !main_#t~switch61; 450#L996-30 main_#t~switch61 := main_#t~switch61 || 4 == main_~_hj_k~0; 573#L996-31 assume main_#t~switch61;call main_#t~mem69 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem69 % 256);havoc main_#t~mem69; 591#L996-33 main_#t~switch61 := main_#t~switch61 || 3 == main_~_hj_k~0; 563#L996-34 assume main_#t~switch61;call main_#t~mem70 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem70 % 256);havoc main_#t~mem70; 564#L996-36 main_#t~switch61 := main_#t~switch61 || 2 == main_~_hj_k~0; 526#L996-37 assume main_#t~switch61;call main_#t~mem71 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem71 % 256);havoc main_#t~mem71; 527#L996-39 main_#t~switch61 := main_#t~switch61 || 1 == main_~_hj_k~0; 548#L996-40 assume main_#t~switch61;call main_#t~mem72 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem72 % 256;havoc main_#t~mem72; 574#L996-42 havoc main_#t~switch61; 498#L996-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 499#L996-44 goto; 586#L996-46 goto; 602#L996-48 goto; 628#L996-116 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 629#L996-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem88.base, main_#t~mem88.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem88.base, main_#t~mem88.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem88.base, main_#t~mem88.offset; 553#L996-63 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem89.base, main_#t~mem89.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem90.base, main_#t~mem90.offset := read~$Pointer$(main_#t~mem89.base, 16 + main_#t~mem89.offset, 4);call main_#t~mem91.base, main_#t~mem91.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem92 := read~int(main_#t~mem91.base, 20 + main_#t~mem91.offset, 4);call write~$Pointer$(main_#t~mem90.base, main_#t~mem90.offset - main_#t~mem92, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem89.base, main_#t~mem89.offset;havoc main_#t~mem90.base, main_#t~mem90.offset;havoc main_#t~mem91.base, main_#t~mem91.offset;havoc main_#t~mem92;call main_#t~mem93.base, main_#t~mem93.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem94.base, main_#t~mem94.offset := read~$Pointer$(main_#t~mem93.base, 16 + main_#t~mem93.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem94.base, 8 + main_#t~mem94.offset, 4);havoc main_#t~mem93.base, main_#t~mem93.offset;havoc main_#t~mem94.base, main_#t~mem94.offset;call main_#t~mem95.base, main_#t~mem95.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem95.base, 16 + main_#t~mem95.offset, 4);havoc main_#t~mem95.base, main_#t~mem95.offset; 554#L996-62 goto; 501#L996-114 havoc main_~_ha_bkt~0;call main_#t~mem96.base, main_#t~mem96.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem97 := read~int(main_#t~mem96.base, 12 + main_#t~mem96.offset, 4);main_#t~post98 := main_#t~mem97;call write~int(1 + main_#t~post98, main_#t~mem96.base, 12 + main_#t~mem96.offset, 4);havoc main_#t~mem96.base, main_#t~mem96.offset;havoc main_#t~mem97;havoc main_#t~post98; 543#L996-67 call main_#t~mem99.base, main_#t~mem99.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem100 := read~int(main_#t~mem99.base, 4 + main_#t~mem99.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem100 - 1);havoc main_#t~mem99.base, main_#t~mem99.offset;havoc main_#t~mem100; 598#L996-66 goto; 634#L996-112 call main_#t~mem101.base, main_#t~mem101.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem102.base, main_#t~mem102.offset := read~$Pointer$(main_#t~mem101.base, main_#t~mem101.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem102.base, main_#t~mem102.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem101.base, main_#t~mem101.offset;havoc main_#t~mem102.base, main_#t~mem102.offset;call main_#t~mem103 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post104 := main_#t~mem103;call write~int(1 + main_#t~post104, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem103;havoc main_#t~post104;call main_#t~mem105.base, main_#t~mem105.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem105.base, main_#t~mem105.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem105.base, main_#t~mem105.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem106.base, main_#t~mem106.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 624#L996-69 assume main_#t~mem106.base != 0 || main_#t~mem106.offset != 0;havoc main_#t~mem106.base, main_#t~mem106.offset;call main_#t~mem107.base, main_#t~mem107.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem107.base, 12 + main_#t~mem107.offset, 4);havoc main_#t~mem107.base, main_#t~mem107.offset; 473#L996-71 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem109 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem108 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short112 := main_#t~mem109 % 4294967296 >= 10 * (1 + main_#t~mem108) % 4294967296; 474#L996-72 assume !main_#t~short112; 532#L996-74 assume !main_#t~short112;havoc main_#t~mem109;havoc main_#t~mem108;havoc main_#t~mem110.base, main_#t~mem110.offset;havoc main_#t~mem111;havoc main_#t~short112; 492#L996-111 goto; 487#L996-113 goto; 488#L996-115 goto; 594#L996-117 goto; 595#L989-3 call main_#t~mem42 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post43 := main_#t~mem42;call write~int(1 + main_#t~post43, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem42;havoc main_#t~post43; 453#L989-4 [2021-11-02 22:42:06,199 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:42:06,199 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2021-11-02 22:42:06,199 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:42:06,200 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [209626561] [2021-11-02 22:42:06,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:06,200 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:42:06,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:42:06,225 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:42:06,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:42:06,282 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:42:06,283 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:42:06,283 INFO L85 PathProgramCache]: Analyzing trace with hash 1020807865, now seen corresponding path program 1 times [2021-11-02 22:42:06,283 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:42:06,283 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [565284664] [2021-11-02 22:42:06,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:06,284 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:42:06,321 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-02 22:42:06,324 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [822303591] [2021-11-02 22:42:06,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:06,326 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:42:06,327 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:42:06,329 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:42:06,353 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-11-02 22:42:06,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:42:06,552 INFO L263 TraceCheckSpWp]: Trace formula consists of 301 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-02 22:42:06,561 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:42:06,749 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:42:06,749 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:42:06,749 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [565284664] [2021-11-02 22:42:06,750 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-02 22:42:06,750 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [822303591] [2021-11-02 22:42:06,750 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [822303591] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-02 22:42:06,751 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-02 22:42:06,751 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-02 22:42:06,751 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [407909296] [2021-11-02 22:42:06,752 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-02 22:42:06,752 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:42:06,756 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-02 22:42:06,757 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-02 22:42:06,757 INFO L87 Difference]: Start difference. First operand 202 states and 260 transitions. cyclomatic complexity: 61 Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:42:06,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:42:06,894 INFO L93 Difference]: Finished difference Result 223 states and 281 transitions. [2021-11-02 22:42:06,894 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-02 22:42:06,895 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 223 states and 281 transitions. [2021-11-02 22:42:06,897 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 216 [2021-11-02 22:42:06,902 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 223 states to 223 states and 281 transitions. [2021-11-02 22:42:06,902 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 223 [2021-11-02 22:42:06,904 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 223 [2021-11-02 22:42:06,904 INFO L73 IsDeterministic]: Start isDeterministic. Operand 223 states and 281 transitions. [2021-11-02 22:42:06,911 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-02 22:42:06,912 INFO L681 BuchiCegarLoop]: Abstraction has 223 states and 281 transitions. [2021-11-02 22:42:06,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states and 281 transitions. [2021-11-02 22:42:06,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 222. [2021-11-02 22:42:06,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 222 states, 218 states have (on average 1.2568807339449541) internal successors, (274), 217 states have internal predecessors, (274), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-02 22:42:06,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 280 transitions. [2021-11-02 22:42:06,935 INFO L704 BuchiCegarLoop]: Abstraction has 222 states and 280 transitions. [2021-11-02 22:42:06,935 INFO L587 BuchiCegarLoop]: Abstraction has 222 states and 280 transitions. [2021-11-02 22:42:06,935 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-11-02 22:42:06,936 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 222 states and 280 transitions. [2021-11-02 22:42:06,937 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 215 [2021-11-02 22:42:06,937 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:42:06,938 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:42:06,941 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-02 22:42:06,942 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:42:06,942 INFO L791 eck$LassoCheckResult]: Stem: 1231#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string30.base, #t~string30.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string30.base, #t~string30.offset, 1);call write~init~int(0, #t~string30.base, 1 + #t~string30.offset, 1);call #t~string31.base, #t~string31.offset := #Ultimate.allocOnStack(21);call ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := #Ultimate.allocOnStack(40);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 1208#L-1 havoc main_#res;havoc main_#t~ret45.base, main_#t~ret45.offset, main_#t~mem46, main_#t~mem47, main_#t~mem48, main_#t~mem50, main_#t~mem49, main_#t~mem51, main_#t~mem52, main_#t~mem54, main_#t~mem53, main_#t~mem55, main_#t~mem56, main_#t~mem58, main_#t~mem57, main_#t~mem59, main_#t~mem60, main_#t~switch61, main_#t~mem62, main_#t~mem63, main_#t~mem64, main_#t~mem65, main_#t~mem66, main_#t~mem67, main_#t~mem68, main_#t~mem69, main_#t~mem70, main_#t~mem71, main_#t~mem72, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~ret73.base, main_#t~ret73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76.base, main_#t~mem76.offset, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79.base, main_#t~mem79.offset, main_#t~mem80.base, main_#t~mem80.offset, main_#t~ret81.base, main_#t~ret81.offset, main_#t~mem82.base, main_#t~mem82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86.base, main_#t~mem86.offset, main_#t~mem87.base, main_#t~mem87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91.base, main_#t~mem91.offset, main_#t~mem92, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95.base, main_#t~mem95.offset, main_#t~mem96.base, main_#t~mem96.offset, main_#t~mem97, main_#t~post98, main_#t~mem99.base, main_#t~mem99.offset, main_#t~mem100, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103, main_#t~post104, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem109, main_#t~mem108, main_#t~mem110.base, main_#t~mem110.offset, main_#t~mem111, main_#t~short112, main_#t~mem113.base, main_#t~mem113.offset, main_#t~mem114, main_#t~ret115.base, main_#t~ret115.offset, main_#t~mem116.base, main_#t~mem116.offset, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem118.base, main_#t~mem118.offset, main_#t~mem119, main_#t~mem120.base, main_#t~mem120.offset, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem124, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem128, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127, main_#t~ite129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem140, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem141.base, main_#t~mem141.offset, main_#t~mem142, main_#t~pre143, main_#t~mem144.base, main_#t~mem144.offset, main_#t~mem145, main_#t~mem146.base, main_#t~mem146.offset, main_#t~mem147, main_#t~post148, main_#t~mem152, main_#t~mem150, main_#t~mem149.base, main_#t~mem149.offset, main_#t~mem151, main_#t~mem153, main_#t~post154, main_#t~mem155.base, main_#t~mem155.offset, main_#t~mem156.base, main_#t~mem156.offset, main_#t~mem157.base, main_#t~mem157.offset, main_#t~post131, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133, main_#t~mem158.base, main_#t~mem158.offset, main_#t~mem159.base, main_#t~mem159.offset, main_#t~mem160.base, main_#t~mem160.offset, main_#t~mem161, main_#t~mem162.base, main_#t~mem162.offset, main_#t~mem163, main_#t~mem164.base, main_#t~mem164.offset, main_#t~mem165, main_#t~post166, main_#t~mem167.base, main_#t~mem167.offset, main_#t~mem168.base, main_#t~mem168.offset, main_#t~mem169.base, main_#t~mem169.offset, main_#t~mem170.base, main_#t~mem170.offset, main_#t~mem173, main_#t~mem171.base, main_#t~mem171.offset, main_#t~mem172, main_#t~ite176, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178, main_#t~mem179.base, main_#t~mem179.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem42, main_#t~post43, main_#t~mem44, main_#t~mem184, main_#t~mem183, main_#t~mem185, main_#t~mem186, main_#t~mem188, main_#t~mem187, main_#t~mem189, main_#t~mem190, main_#t~mem192, main_#t~mem191, main_#t~mem193, main_#t~mem194, main_#t~switch195, main_#t~mem196, main_#t~mem197, main_#t~mem198, main_#t~mem199, main_#t~mem200, main_#t~mem201, main_#t~mem202, main_#t~mem203, main_#t~mem204, main_#t~mem205, main_#t~mem206, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem216, main_#t~mem217, main_#t~mem218, main_#t~short219, main_#t~mem220.base, main_#t~mem220.offset, main_#t~ret221, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~short228, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232, main_#t~mem233.base, main_#t~mem233.offset, main_#t~mem234.base, main_#t~mem234.offset, main_#t~mem235.base, main_#t~mem235.offset, main_#t~mem236.base, main_#t~mem236.offset, main_#t~mem237.base, main_#t~mem237.offset, main_#t~mem238.base, main_#t~mem238.offset, main_#t~mem239, main_#t~mem240.base, main_#t~mem240.offset, main_#t~mem241.base, main_#t~mem241.offset, main_#t~mem242.base, main_#t~mem242.offset, main_#t~mem243, main_#t~mem244.base, main_#t~mem244.offset, main_#t~mem245.base, main_#t~mem245.offset, main_#t~mem246.base, main_#t~mem246.offset, main_#t~mem247.base, main_#t~mem247.offset, main_#t~mem248.base, main_#t~mem248.offset, main_#t~mem249, main_#t~mem250.base, main_#t~mem250.offset, main_#t~mem253, main_#t~mem251.base, main_#t~mem251.offset, main_#t~mem252, main_#t~mem254.base, main_#t~mem254.offset, main_#t~mem255.base, main_#t~mem255.offset, main_#t~mem256, main_#t~post257, main_#t~mem258.base, main_#t~mem258.offset, main_#t~mem259.base, main_#t~mem259.offset, main_#t~mem260.base, main_#t~mem260.offset, main_#t~mem261.base, main_#t~mem261.offset, main_#t~mem262.base, main_#t~mem262.offset, main_#t~mem263.base, main_#t~mem263.offset, main_#t~mem264.base, main_#t~mem264.offset, main_#t~mem265.base, main_#t~mem265.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem266.base, main_#t~mem266.offset, main_#t~mem267, main_#t~post268, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem180, main_#t~post181, main_#t~mem182, main_#t~mem269.base, main_#t~mem269.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 1040#L989-4 [2021-11-02 22:42:06,942 INFO L793 eck$LassoCheckResult]: Loop: 1040#L989-4 call main_#t~mem44 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 1031#L989-1 assume !!(main_#t~mem44 < 10);havoc main_#t~mem44;real_malloc_#in~n := 40;havoc real_malloc_#res.base, real_malloc_#res.offset;havoc real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset, real_malloc_~n;real_malloc_~n := real_malloc_#in~n;call real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset := #Ultimate.allocOnHeap(real_malloc_~n);real_malloc_#res.base, real_malloc_#res.offset := real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset;havoc real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset; 1033#L979 main_#t~ret45.base, main_#t~ret45.offset := real_malloc_#res.base, real_malloc_#res.offset;main_~user~0.base, main_~user~0.offset := main_#t~ret45.base, main_#t~ret45.offset;havoc main_#t~ret45.base, main_#t~ret45.offset; 1041#L991 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 1042#L991-2 call main_#t~mem46 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem46, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem46;call main_#t~mem47 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem48 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem47 * main_#t~mem48, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem47;havoc main_#t~mem48; 1152#L996-118 havoc main_~_ha_hashv~0; 1197#L996-49 goto; 1198#L996-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 1035#L996-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 1059#L996-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch61 := 11 == main_~_hj_k~0; 1225#L996-10 assume main_#t~switch61;call main_#t~mem62 := read~int(main_~_hj_key~0.base, 10 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 16777216 * (main_#t~mem62 % 256);havoc main_#t~mem62; 1229#L996-12 main_#t~switch61 := main_#t~switch61 || 10 == main_~_hj_k~0; 1131#L996-13 assume main_#t~switch61;call main_#t~mem63 := read~int(main_~_hj_key~0.base, 9 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 65536 * (main_#t~mem63 % 256);havoc main_#t~mem63; 1132#L996-15 main_#t~switch61 := main_#t~switch61 || 9 == main_~_hj_k~0; 1227#L996-16 assume main_#t~switch61;call main_#t~mem64 := read~int(main_~_hj_key~0.base, 8 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 256 * (main_#t~mem64 % 256);havoc main_#t~mem64; 1228#L996-18 main_#t~switch61 := main_#t~switch61 || 8 == main_~_hj_k~0; 1218#L996-19 assume main_#t~switch61;call main_#t~mem65 := read~int(main_~_hj_key~0.base, 7 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 16777216 * (main_#t~mem65 % 256);havoc main_#t~mem65; 1214#L996-21 main_#t~switch61 := main_#t~switch61 || 7 == main_~_hj_k~0; 1194#L996-22 assume main_#t~switch61;call main_#t~mem66 := read~int(main_~_hj_key~0.base, 6 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 65536 * (main_#t~mem66 % 256);havoc main_#t~mem66; 1195#L996-24 main_#t~switch61 := main_#t~switch61 || 6 == main_~_hj_k~0; 1211#L996-25 assume main_#t~switch61;call main_#t~mem67 := read~int(main_~_hj_key~0.base, 5 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 256 * (main_#t~mem67 % 256);havoc main_#t~mem67; 1189#L996-27 main_#t~switch61 := main_#t~switch61 || 5 == main_~_hj_k~0; 1036#L996-28 assume main_#t~switch61;call main_#t~mem68 := read~int(main_~_hj_key~0.base, 4 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + main_#t~mem68 % 256;havoc main_#t~mem68; 1037#L996-30 main_#t~switch61 := main_#t~switch61 || 4 == main_~_hj_k~0; 1226#L996-31 assume main_#t~switch61;call main_#t~mem69 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem69 % 256);havoc main_#t~mem69; 1179#L996-33 main_#t~switch61 := main_#t~switch61 || 3 == main_~_hj_k~0; 1150#L996-34 assume main_#t~switch61;call main_#t~mem70 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem70 % 256);havoc main_#t~mem70; 1151#L996-36 main_#t~switch61 := main_#t~switch61 || 2 == main_~_hj_k~0; 1113#L996-37 assume main_#t~switch61;call main_#t~mem71 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem71 % 256);havoc main_#t~mem71; 1114#L996-39 main_#t~switch61 := main_#t~switch61 || 1 == main_~_hj_k~0; 1135#L996-40 assume main_#t~switch61;call main_#t~mem72 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem72 % 256;havoc main_#t~mem72; 1162#L996-42 havoc main_#t~switch61; 1085#L996-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 1086#L996-44 goto; 1174#L996-46 goto; 1190#L996-48 goto; 1216#L996-116 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 1217#L996-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem88.base, main_#t~mem88.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem88.base, main_#t~mem88.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem88.base, main_#t~mem88.offset; 1140#L996-63 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem89.base, main_#t~mem89.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem90.base, main_#t~mem90.offset := read~$Pointer$(main_#t~mem89.base, 16 + main_#t~mem89.offset, 4);call main_#t~mem91.base, main_#t~mem91.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem92 := read~int(main_#t~mem91.base, 20 + main_#t~mem91.offset, 4);call write~$Pointer$(main_#t~mem90.base, main_#t~mem90.offset - main_#t~mem92, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem89.base, main_#t~mem89.offset;havoc main_#t~mem90.base, main_#t~mem90.offset;havoc main_#t~mem91.base, main_#t~mem91.offset;havoc main_#t~mem92;call main_#t~mem93.base, main_#t~mem93.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem94.base, main_#t~mem94.offset := read~$Pointer$(main_#t~mem93.base, 16 + main_#t~mem93.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem94.base, 8 + main_#t~mem94.offset, 4);havoc main_#t~mem93.base, main_#t~mem93.offset;havoc main_#t~mem94.base, main_#t~mem94.offset;call main_#t~mem95.base, main_#t~mem95.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem95.base, 16 + main_#t~mem95.offset, 4);havoc main_#t~mem95.base, main_#t~mem95.offset; 1141#L996-62 goto; 1088#L996-114 havoc main_~_ha_bkt~0;call main_#t~mem96.base, main_#t~mem96.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem97 := read~int(main_#t~mem96.base, 12 + main_#t~mem96.offset, 4);main_#t~post98 := main_#t~mem97;call write~int(1 + main_#t~post98, main_#t~mem96.base, 12 + main_#t~mem96.offset, 4);havoc main_#t~mem96.base, main_#t~mem96.offset;havoc main_#t~mem97;havoc main_#t~post98; 1130#L996-67 call main_#t~mem99.base, main_#t~mem99.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem100 := read~int(main_#t~mem99.base, 4 + main_#t~mem99.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem100 - 1);havoc main_#t~mem99.base, main_#t~mem99.offset;havoc main_#t~mem100; 1186#L996-66 goto; 1222#L996-112 call main_#t~mem101.base, main_#t~mem101.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem102.base, main_#t~mem102.offset := read~$Pointer$(main_#t~mem101.base, main_#t~mem101.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem102.base, main_#t~mem102.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem101.base, main_#t~mem101.offset;havoc main_#t~mem102.base, main_#t~mem102.offset;call main_#t~mem103 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post104 := main_#t~mem103;call write~int(1 + main_#t~post104, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem103;havoc main_#t~post104;call main_#t~mem105.base, main_#t~mem105.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem105.base, main_#t~mem105.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem105.base, main_#t~mem105.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem106.base, main_#t~mem106.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 1212#L996-69 assume main_#t~mem106.base != 0 || main_#t~mem106.offset != 0;havoc main_#t~mem106.base, main_#t~mem106.offset;call main_#t~mem107.base, main_#t~mem107.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem107.base, 12 + main_#t~mem107.offset, 4);havoc main_#t~mem107.base, main_#t~mem107.offset; 1060#L996-71 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem109 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem108 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short112 := main_#t~mem109 % 4294967296 >= 10 * (1 + main_#t~mem108) % 4294967296; 1061#L996-72 assume !main_#t~short112; 1119#L996-74 assume !main_#t~short112;havoc main_#t~mem109;havoc main_#t~mem108;havoc main_#t~mem110.base, main_#t~mem110.offset;havoc main_#t~mem111;havoc main_#t~short112; 1077#L996-111 goto; 1074#L996-113 goto; 1075#L996-115 goto; 1182#L996-117 goto; 1183#L989-3 call main_#t~mem42 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post43 := main_#t~mem42;call write~int(1 + main_#t~post43, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem42;havoc main_#t~post43; 1040#L989-4 [2021-11-02 22:42:06,943 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:42:06,943 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2021-11-02 22:42:06,943 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:42:06,944 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1216643073] [2021-11-02 22:42:06,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:06,944 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:42:06,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:42:06,968 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:42:06,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:42:06,993 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:42:06,993 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:42:06,994 INFO L85 PathProgramCache]: Analyzing trace with hash 319207991, now seen corresponding path program 1 times [2021-11-02 22:42:06,994 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:42:06,994 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [476148883] [2021-11-02 22:42:06,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:06,994 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:42:07,008 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-02 22:42:07,008 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1205462108] [2021-11-02 22:42:07,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:07,008 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:42:07,009 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:42:07,010 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:42:07,047 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-11-02 22:42:07,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:42:07,225 INFO L263 TraceCheckSpWp]: Trace formula consists of 307 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-02 22:42:07,228 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:42:07,380 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:42:07,381 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:42:07,382 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [476148883] [2021-11-02 22:42:07,382 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-02 22:42:07,382 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1205462108] [2021-11-02 22:42:07,382 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1205462108] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-02 22:42:07,382 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-02 22:42:07,382 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-02 22:42:07,383 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1518600056] [2021-11-02 22:42:07,383 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-02 22:42:07,383 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:42:07,384 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-02 22:42:07,385 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-02 22:42:07,385 INFO L87 Difference]: Start difference. First operand 222 states and 280 transitions. cyclomatic complexity: 61 Second operand has 4 states, 4 states have (on average 13.25) internal successors, (53), 4 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:42:07,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:42:07,486 INFO L93 Difference]: Finished difference Result 305 states and 384 transitions. [2021-11-02 22:42:07,486 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-02 22:42:07,486 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 305 states and 384 transitions. [2021-11-02 22:42:07,489 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 289 [2021-11-02 22:42:07,493 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 305 states to 305 states and 384 transitions. [2021-11-02 22:42:07,493 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 305 [2021-11-02 22:42:07,494 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 305 [2021-11-02 22:42:07,494 INFO L73 IsDeterministic]: Start isDeterministic. Operand 305 states and 384 transitions. [2021-11-02 22:42:07,495 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-02 22:42:07,495 INFO L681 BuchiCegarLoop]: Abstraction has 305 states and 384 transitions. [2021-11-02 22:42:07,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 305 states and 384 transitions. [2021-11-02 22:42:07,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 305 to 208. [2021-11-02 22:42:07,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 208 states, 204 states have (on average 1.2401960784313726) internal successors, (253), 203 states have internal predecessors, (253), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-02 22:42:07,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 259 transitions. [2021-11-02 22:42:07,505 INFO L704 BuchiCegarLoop]: Abstraction has 208 states and 259 transitions. [2021-11-02 22:42:07,505 INFO L587 BuchiCegarLoop]: Abstraction has 208 states and 259 transitions. [2021-11-02 22:42:07,505 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-11-02 22:42:07,505 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 208 states and 259 transitions. [2021-11-02 22:42:07,507 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 201 [2021-11-02 22:42:07,507 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:42:07,507 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:42:07,508 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-02 22:42:07,508 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:42:07,508 INFO L791 eck$LassoCheckResult]: Stem: 1921#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string30.base, #t~string30.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string30.base, #t~string30.offset, 1);call write~init~int(0, #t~string30.base, 1 + #t~string30.offset, 1);call #t~string31.base, #t~string31.offset := #Ultimate.allocOnStack(21);call ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := #Ultimate.allocOnStack(40);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 1899#L-1 havoc main_#res;havoc main_#t~ret45.base, main_#t~ret45.offset, main_#t~mem46, main_#t~mem47, main_#t~mem48, main_#t~mem50, main_#t~mem49, main_#t~mem51, main_#t~mem52, main_#t~mem54, main_#t~mem53, main_#t~mem55, main_#t~mem56, main_#t~mem58, main_#t~mem57, main_#t~mem59, main_#t~mem60, main_#t~switch61, main_#t~mem62, main_#t~mem63, main_#t~mem64, main_#t~mem65, main_#t~mem66, main_#t~mem67, main_#t~mem68, main_#t~mem69, main_#t~mem70, main_#t~mem71, main_#t~mem72, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~ret73.base, main_#t~ret73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76.base, main_#t~mem76.offset, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79.base, main_#t~mem79.offset, main_#t~mem80.base, main_#t~mem80.offset, main_#t~ret81.base, main_#t~ret81.offset, main_#t~mem82.base, main_#t~mem82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86.base, main_#t~mem86.offset, main_#t~mem87.base, main_#t~mem87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91.base, main_#t~mem91.offset, main_#t~mem92, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95.base, main_#t~mem95.offset, main_#t~mem96.base, main_#t~mem96.offset, main_#t~mem97, main_#t~post98, main_#t~mem99.base, main_#t~mem99.offset, main_#t~mem100, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103, main_#t~post104, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem109, main_#t~mem108, main_#t~mem110.base, main_#t~mem110.offset, main_#t~mem111, main_#t~short112, main_#t~mem113.base, main_#t~mem113.offset, main_#t~mem114, main_#t~ret115.base, main_#t~ret115.offset, main_#t~mem116.base, main_#t~mem116.offset, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem118.base, main_#t~mem118.offset, main_#t~mem119, main_#t~mem120.base, main_#t~mem120.offset, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem124, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem128, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127, main_#t~ite129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem140, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem141.base, main_#t~mem141.offset, main_#t~mem142, main_#t~pre143, main_#t~mem144.base, main_#t~mem144.offset, main_#t~mem145, main_#t~mem146.base, main_#t~mem146.offset, main_#t~mem147, main_#t~post148, main_#t~mem152, main_#t~mem150, main_#t~mem149.base, main_#t~mem149.offset, main_#t~mem151, main_#t~mem153, main_#t~post154, main_#t~mem155.base, main_#t~mem155.offset, main_#t~mem156.base, main_#t~mem156.offset, main_#t~mem157.base, main_#t~mem157.offset, main_#t~post131, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133, main_#t~mem158.base, main_#t~mem158.offset, main_#t~mem159.base, main_#t~mem159.offset, main_#t~mem160.base, main_#t~mem160.offset, main_#t~mem161, main_#t~mem162.base, main_#t~mem162.offset, main_#t~mem163, main_#t~mem164.base, main_#t~mem164.offset, main_#t~mem165, main_#t~post166, main_#t~mem167.base, main_#t~mem167.offset, main_#t~mem168.base, main_#t~mem168.offset, main_#t~mem169.base, main_#t~mem169.offset, main_#t~mem170.base, main_#t~mem170.offset, main_#t~mem173, main_#t~mem171.base, main_#t~mem171.offset, main_#t~mem172, main_#t~ite176, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178, main_#t~mem179.base, main_#t~mem179.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem42, main_#t~post43, main_#t~mem44, main_#t~mem184, main_#t~mem183, main_#t~mem185, main_#t~mem186, main_#t~mem188, main_#t~mem187, main_#t~mem189, main_#t~mem190, main_#t~mem192, main_#t~mem191, main_#t~mem193, main_#t~mem194, main_#t~switch195, main_#t~mem196, main_#t~mem197, main_#t~mem198, main_#t~mem199, main_#t~mem200, main_#t~mem201, main_#t~mem202, main_#t~mem203, main_#t~mem204, main_#t~mem205, main_#t~mem206, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem216, main_#t~mem217, main_#t~mem218, main_#t~short219, main_#t~mem220.base, main_#t~mem220.offset, main_#t~ret221, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~short228, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232, main_#t~mem233.base, main_#t~mem233.offset, main_#t~mem234.base, main_#t~mem234.offset, main_#t~mem235.base, main_#t~mem235.offset, main_#t~mem236.base, main_#t~mem236.offset, main_#t~mem237.base, main_#t~mem237.offset, main_#t~mem238.base, main_#t~mem238.offset, main_#t~mem239, main_#t~mem240.base, main_#t~mem240.offset, main_#t~mem241.base, main_#t~mem241.offset, main_#t~mem242.base, main_#t~mem242.offset, main_#t~mem243, main_#t~mem244.base, main_#t~mem244.offset, main_#t~mem245.base, main_#t~mem245.offset, main_#t~mem246.base, main_#t~mem246.offset, main_#t~mem247.base, main_#t~mem247.offset, main_#t~mem248.base, main_#t~mem248.offset, main_#t~mem249, main_#t~mem250.base, main_#t~mem250.offset, main_#t~mem253, main_#t~mem251.base, main_#t~mem251.offset, main_#t~mem252, main_#t~mem254.base, main_#t~mem254.offset, main_#t~mem255.base, main_#t~mem255.offset, main_#t~mem256, main_#t~post257, main_#t~mem258.base, main_#t~mem258.offset, main_#t~mem259.base, main_#t~mem259.offset, main_#t~mem260.base, main_#t~mem260.offset, main_#t~mem261.base, main_#t~mem261.offset, main_#t~mem262.base, main_#t~mem262.offset, main_#t~mem263.base, main_#t~mem263.offset, main_#t~mem264.base, main_#t~mem264.offset, main_#t~mem265.base, main_#t~mem265.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem266.base, main_#t~mem266.offset, main_#t~mem267, main_#t~post268, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem180, main_#t~post181, main_#t~mem182, main_#t~mem269.base, main_#t~mem269.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 1732#L989-4 [2021-11-02 22:42:07,509 INFO L793 eck$LassoCheckResult]: Loop: 1732#L989-4 call main_#t~mem44 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 1723#L989-1 assume !!(main_#t~mem44 < 10);havoc main_#t~mem44;real_malloc_#in~n := 40;havoc real_malloc_#res.base, real_malloc_#res.offset;havoc real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset, real_malloc_~n;real_malloc_~n := real_malloc_#in~n;call real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset := #Ultimate.allocOnHeap(real_malloc_~n);real_malloc_#res.base, real_malloc_#res.offset := real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset;havoc real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset; 1725#L979 main_#t~ret45.base, main_#t~ret45.offset := real_malloc_#res.base, real_malloc_#res.offset;main_~user~0.base, main_~user~0.offset := main_#t~ret45.base, main_#t~ret45.offset;havoc main_#t~ret45.base, main_#t~ret45.offset; 1733#L991 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 1734#L991-2 call main_#t~mem46 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem46, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem46;call main_#t~mem47 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem48 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem47 * main_#t~mem48, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem47;havoc main_#t~mem48; 1844#L996-118 havoc main_~_ha_hashv~0; 1888#L996-49 goto; 1889#L996-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 1727#L996-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 1753#L996-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch61 := 11 == main_~_hj_k~0; 1916#L996-10 assume !main_#t~switch61; 1920#L996-12 main_#t~switch61 := main_#t~switch61 || 10 == main_~_hj_k~0; 1823#L996-13 assume !main_#t~switch61; 1824#L996-15 main_#t~switch61 := main_#t~switch61 || 9 == main_~_hj_k~0; 1918#L996-16 assume !main_#t~switch61; 1919#L996-18 main_#t~switch61 := main_#t~switch61 || 8 == main_~_hj_k~0; 1909#L996-19 assume !main_#t~switch61; 1905#L996-21 main_#t~switch61 := main_#t~switch61 || 7 == main_~_hj_k~0; 1885#L996-22 assume !main_#t~switch61; 1886#L996-24 main_#t~switch61 := main_#t~switch61 || 6 == main_~_hj_k~0; 1902#L996-25 assume !main_#t~switch61; 1880#L996-27 main_#t~switch61 := main_#t~switch61 || 5 == main_~_hj_k~0; 1728#L996-28 assume !main_#t~switch61; 1729#L996-30 main_#t~switch61 := main_#t~switch61 || 4 == main_~_hj_k~0; 1852#L996-31 assume !main_#t~switch61; 1917#L996-33 main_#t~switch61 := main_#t~switch61 || 3 == main_~_hj_k~0; 1926#L996-34 assume main_#t~switch61;call main_#t~mem70 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem70 % 256);havoc main_#t~mem70; 1843#L996-36 main_#t~switch61 := main_#t~switch61 || 2 == main_~_hj_k~0; 1805#L996-37 assume main_#t~switch61;call main_#t~mem71 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem71 % 256);havoc main_#t~mem71; 1806#L996-39 main_#t~switch61 := main_#t~switch61 || 1 == main_~_hj_k~0; 1827#L996-40 assume main_#t~switch61;call main_#t~mem72 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem72 % 256;havoc main_#t~mem72; 1853#L996-42 havoc main_#t~switch61; 1777#L996-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 1778#L996-44 goto; 1867#L996-46 goto; 1881#L996-48 goto; 1907#L996-116 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 1908#L996-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem88.base, main_#t~mem88.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem88.base, main_#t~mem88.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem88.base, main_#t~mem88.offset; 1833#L996-63 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem89.base, main_#t~mem89.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem90.base, main_#t~mem90.offset := read~$Pointer$(main_#t~mem89.base, 16 + main_#t~mem89.offset, 4);call main_#t~mem91.base, main_#t~mem91.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem92 := read~int(main_#t~mem91.base, 20 + main_#t~mem91.offset, 4);call write~$Pointer$(main_#t~mem90.base, main_#t~mem90.offset - main_#t~mem92, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem89.base, main_#t~mem89.offset;havoc main_#t~mem90.base, main_#t~mem90.offset;havoc main_#t~mem91.base, main_#t~mem91.offset;havoc main_#t~mem92;call main_#t~mem93.base, main_#t~mem93.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem94.base, main_#t~mem94.offset := read~$Pointer$(main_#t~mem93.base, 16 + main_#t~mem93.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem94.base, 8 + main_#t~mem94.offset, 4);havoc main_#t~mem93.base, main_#t~mem93.offset;havoc main_#t~mem94.base, main_#t~mem94.offset;call main_#t~mem95.base, main_#t~mem95.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem95.base, 16 + main_#t~mem95.offset, 4);havoc main_#t~mem95.base, main_#t~mem95.offset; 1834#L996-62 goto; 1780#L996-114 havoc main_~_ha_bkt~0;call main_#t~mem96.base, main_#t~mem96.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem97 := read~int(main_#t~mem96.base, 12 + main_#t~mem96.offset, 4);main_#t~post98 := main_#t~mem97;call write~int(1 + main_#t~post98, main_#t~mem96.base, 12 + main_#t~mem96.offset, 4);havoc main_#t~mem96.base, main_#t~mem96.offset;havoc main_#t~mem97;havoc main_#t~post98; 1822#L996-67 call main_#t~mem99.base, main_#t~mem99.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem100 := read~int(main_#t~mem99.base, 4 + main_#t~mem99.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem100 - 1);havoc main_#t~mem99.base, main_#t~mem99.offset;havoc main_#t~mem100; 1877#L996-66 goto; 1913#L996-112 call main_#t~mem101.base, main_#t~mem101.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem102.base, main_#t~mem102.offset := read~$Pointer$(main_#t~mem101.base, main_#t~mem101.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem102.base, main_#t~mem102.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem101.base, main_#t~mem101.offset;havoc main_#t~mem102.base, main_#t~mem102.offset;call main_#t~mem103 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post104 := main_#t~mem103;call write~int(1 + main_#t~post104, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem103;havoc main_#t~post104;call main_#t~mem105.base, main_#t~mem105.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem105.base, main_#t~mem105.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem105.base, main_#t~mem105.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem106.base, main_#t~mem106.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 1903#L996-69 assume main_#t~mem106.base != 0 || main_#t~mem106.offset != 0;havoc main_#t~mem106.base, main_#t~mem106.offset;call main_#t~mem107.base, main_#t~mem107.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem107.base, 12 + main_#t~mem107.offset, 4);havoc main_#t~mem107.base, main_#t~mem107.offset; 1750#L996-71 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem109 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem108 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short112 := main_#t~mem109 % 4294967296 >= 10 * (1 + main_#t~mem108) % 4294967296; 1751#L996-72 assume !main_#t~short112; 1811#L996-74 assume !main_#t~short112;havoc main_#t~mem109;havoc main_#t~mem108;havoc main_#t~mem110.base, main_#t~mem110.offset;havoc main_#t~mem111;havoc main_#t~short112; 1771#L996-111 goto; 1766#L996-113 goto; 1767#L996-115 goto; 1871#L996-117 goto; 1872#L989-3 call main_#t~mem42 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post43 := main_#t~mem42;call write~int(1 + main_#t~post43, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem42;havoc main_#t~post43; 1732#L989-4 [2021-11-02 22:42:07,509 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:42:07,510 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2021-11-02 22:42:07,510 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:42:07,510 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [404257003] [2021-11-02 22:42:07,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:07,511 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:42:07,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:42:07,535 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:42:07,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:42:07,578 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:42:07,579 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:42:07,579 INFO L85 PathProgramCache]: Analyzing trace with hash -168963001, now seen corresponding path program 1 times [2021-11-02 22:42:07,579 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:42:07,580 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [569944862] [2021-11-02 22:42:07,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:07,580 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:42:07,591 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-02 22:42:07,591 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1095899334] [2021-11-02 22:42:07,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:07,592 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:42:07,592 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:42:07,594 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:42:07,602 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-11-02 22:42:07,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:42:07,763 INFO L263 TraceCheckSpWp]: Trace formula consists of 259 conjuncts, 4 conjunts are in the unsatisfiable core [2021-11-02 22:42:07,770 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:42:07,948 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:42:07,948 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:42:07,949 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [569944862] [2021-11-02 22:42:07,949 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-02 22:42:07,949 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1095899334] [2021-11-02 22:42:07,949 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1095899334] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-02 22:42:07,950 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-02 22:42:07,950 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-02 22:42:07,951 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [260952288] [2021-11-02 22:42:07,951 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-02 22:42:07,952 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:42:07,952 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-11-02 22:42:07,953 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-11-02 22:42:07,954 INFO L87 Difference]: Start difference. First operand 208 states and 259 transitions. cyclomatic complexity: 54 Second operand has 5 states, 5 states have (on average 10.6) internal successors, (53), 5 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:42:08,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:42:08,108 INFO L93 Difference]: Finished difference Result 411 states and 510 transitions. [2021-11-02 22:42:08,108 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-11-02 22:42:08,109 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 411 states and 510 transitions. [2021-11-02 22:42:08,114 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 403 [2021-11-02 22:42:08,119 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 411 states to 411 states and 510 transitions. [2021-11-02 22:42:08,120 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 411 [2021-11-02 22:42:08,121 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 411 [2021-11-02 22:42:08,121 INFO L73 IsDeterministic]: Start isDeterministic. Operand 411 states and 510 transitions. [2021-11-02 22:42:08,122 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-02 22:42:08,122 INFO L681 BuchiCegarLoop]: Abstraction has 411 states and 510 transitions. [2021-11-02 22:42:08,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 411 states and 510 transitions. [2021-11-02 22:42:08,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 411 to 231. [2021-11-02 22:42:08,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 231 states, 227 states have (on average 1.224669603524229) internal successors, (278), 226 states have internal predecessors, (278), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-02 22:42:08,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 231 states to 231 states and 284 transitions. [2021-11-02 22:42:08,139 INFO L704 BuchiCegarLoop]: Abstraction has 231 states and 284 transitions. [2021-11-02 22:42:08,139 INFO L587 BuchiCegarLoop]: Abstraction has 231 states and 284 transitions. [2021-11-02 22:42:08,139 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-11-02 22:42:08,139 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 231 states and 284 transitions. [2021-11-02 22:42:08,141 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 224 [2021-11-02 22:42:08,141 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:42:08,141 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:42:08,142 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-02 22:42:08,142 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:42:08,142 INFO L791 eck$LassoCheckResult]: Stem: 2706#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string30.base, #t~string30.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string30.base, #t~string30.offset, 1);call write~init~int(0, #t~string30.base, 1 + #t~string30.offset, 1);call #t~string31.base, #t~string31.offset := #Ultimate.allocOnStack(21);call ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := #Ultimate.allocOnStack(40);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 2683#L-1 havoc main_#res;havoc main_#t~ret45.base, main_#t~ret45.offset, main_#t~mem46, main_#t~mem47, main_#t~mem48, main_#t~mem50, main_#t~mem49, main_#t~mem51, main_#t~mem52, main_#t~mem54, main_#t~mem53, main_#t~mem55, main_#t~mem56, main_#t~mem58, main_#t~mem57, main_#t~mem59, main_#t~mem60, main_#t~switch61, main_#t~mem62, main_#t~mem63, main_#t~mem64, main_#t~mem65, main_#t~mem66, main_#t~mem67, main_#t~mem68, main_#t~mem69, main_#t~mem70, main_#t~mem71, main_#t~mem72, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~ret73.base, main_#t~ret73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76.base, main_#t~mem76.offset, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79.base, main_#t~mem79.offset, main_#t~mem80.base, main_#t~mem80.offset, main_#t~ret81.base, main_#t~ret81.offset, main_#t~mem82.base, main_#t~mem82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86.base, main_#t~mem86.offset, main_#t~mem87.base, main_#t~mem87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91.base, main_#t~mem91.offset, main_#t~mem92, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95.base, main_#t~mem95.offset, main_#t~mem96.base, main_#t~mem96.offset, main_#t~mem97, main_#t~post98, main_#t~mem99.base, main_#t~mem99.offset, main_#t~mem100, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103, main_#t~post104, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem109, main_#t~mem108, main_#t~mem110.base, main_#t~mem110.offset, main_#t~mem111, main_#t~short112, main_#t~mem113.base, main_#t~mem113.offset, main_#t~mem114, main_#t~ret115.base, main_#t~ret115.offset, main_#t~mem116.base, main_#t~mem116.offset, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem118.base, main_#t~mem118.offset, main_#t~mem119, main_#t~mem120.base, main_#t~mem120.offset, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem124, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem128, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127, main_#t~ite129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem140, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem141.base, main_#t~mem141.offset, main_#t~mem142, main_#t~pre143, main_#t~mem144.base, main_#t~mem144.offset, main_#t~mem145, main_#t~mem146.base, main_#t~mem146.offset, main_#t~mem147, main_#t~post148, main_#t~mem152, main_#t~mem150, main_#t~mem149.base, main_#t~mem149.offset, main_#t~mem151, main_#t~mem153, main_#t~post154, main_#t~mem155.base, main_#t~mem155.offset, main_#t~mem156.base, main_#t~mem156.offset, main_#t~mem157.base, main_#t~mem157.offset, main_#t~post131, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133, main_#t~mem158.base, main_#t~mem158.offset, main_#t~mem159.base, main_#t~mem159.offset, main_#t~mem160.base, main_#t~mem160.offset, main_#t~mem161, main_#t~mem162.base, main_#t~mem162.offset, main_#t~mem163, main_#t~mem164.base, main_#t~mem164.offset, main_#t~mem165, main_#t~post166, main_#t~mem167.base, main_#t~mem167.offset, main_#t~mem168.base, main_#t~mem168.offset, main_#t~mem169.base, main_#t~mem169.offset, main_#t~mem170.base, main_#t~mem170.offset, main_#t~mem173, main_#t~mem171.base, main_#t~mem171.offset, main_#t~mem172, main_#t~ite176, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178, main_#t~mem179.base, main_#t~mem179.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem42, main_#t~post43, main_#t~mem44, main_#t~mem184, main_#t~mem183, main_#t~mem185, main_#t~mem186, main_#t~mem188, main_#t~mem187, main_#t~mem189, main_#t~mem190, main_#t~mem192, main_#t~mem191, main_#t~mem193, main_#t~mem194, main_#t~switch195, main_#t~mem196, main_#t~mem197, main_#t~mem198, main_#t~mem199, main_#t~mem200, main_#t~mem201, main_#t~mem202, main_#t~mem203, main_#t~mem204, main_#t~mem205, main_#t~mem206, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem216, main_#t~mem217, main_#t~mem218, main_#t~short219, main_#t~mem220.base, main_#t~mem220.offset, main_#t~ret221, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~short228, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232, main_#t~mem233.base, main_#t~mem233.offset, main_#t~mem234.base, main_#t~mem234.offset, main_#t~mem235.base, main_#t~mem235.offset, main_#t~mem236.base, main_#t~mem236.offset, main_#t~mem237.base, main_#t~mem237.offset, main_#t~mem238.base, main_#t~mem238.offset, main_#t~mem239, main_#t~mem240.base, main_#t~mem240.offset, main_#t~mem241.base, main_#t~mem241.offset, main_#t~mem242.base, main_#t~mem242.offset, main_#t~mem243, main_#t~mem244.base, main_#t~mem244.offset, main_#t~mem245.base, main_#t~mem245.offset, main_#t~mem246.base, main_#t~mem246.offset, main_#t~mem247.base, main_#t~mem247.offset, main_#t~mem248.base, main_#t~mem248.offset, main_#t~mem249, main_#t~mem250.base, main_#t~mem250.offset, main_#t~mem253, main_#t~mem251.base, main_#t~mem251.offset, main_#t~mem252, main_#t~mem254.base, main_#t~mem254.offset, main_#t~mem255.base, main_#t~mem255.offset, main_#t~mem256, main_#t~post257, main_#t~mem258.base, main_#t~mem258.offset, main_#t~mem259.base, main_#t~mem259.offset, main_#t~mem260.base, main_#t~mem260.offset, main_#t~mem261.base, main_#t~mem261.offset, main_#t~mem262.base, main_#t~mem262.offset, main_#t~mem263.base, main_#t~mem263.offset, main_#t~mem264.base, main_#t~mem264.offset, main_#t~mem265.base, main_#t~mem265.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem266.base, main_#t~mem266.offset, main_#t~mem267, main_#t~post268, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem180, main_#t~post181, main_#t~mem182, main_#t~mem269.base, main_#t~mem269.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 2515#L989-4 [2021-11-02 22:42:08,143 INFO L793 eck$LassoCheckResult]: Loop: 2515#L989-4 call main_#t~mem44 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 2506#L989-1 assume !!(main_#t~mem44 < 10);havoc main_#t~mem44;real_malloc_#in~n := 40;havoc real_malloc_#res.base, real_malloc_#res.offset;havoc real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset, real_malloc_~n;real_malloc_~n := real_malloc_#in~n;call real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset := #Ultimate.allocOnHeap(real_malloc_~n);real_malloc_#res.base, real_malloc_#res.offset := real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset;havoc real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset; 2508#L979 main_#t~ret45.base, main_#t~ret45.offset := real_malloc_#res.base, real_malloc_#res.offset;main_~user~0.base, main_~user~0.offset := main_#t~ret45.base, main_#t~ret45.offset;havoc main_#t~ret45.base, main_#t~ret45.offset; 2516#L991 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 2517#L991-2 call main_#t~mem46 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem46, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem46;call main_#t~mem47 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem48 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem47 * main_#t~mem48, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem47;havoc main_#t~mem48; 2627#L996-118 havoc main_~_ha_hashv~0; 2672#L996-49 goto; 2673#L996-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 2705#L996-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 2732#L996-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch61 := 11 == main_~_hj_k~0; 2731#L996-10 assume !main_#t~switch61; 2730#L996-12 main_#t~switch61 := main_#t~switch61 || 10 == main_~_hj_k~0; 2729#L996-13 assume !main_#t~switch61; 2728#L996-15 main_#t~switch61 := main_#t~switch61 || 9 == main_~_hj_k~0; 2727#L996-16 assume !main_#t~switch61; 2726#L996-18 main_#t~switch61 := main_#t~switch61 || 8 == main_~_hj_k~0; 2725#L996-19 assume !main_#t~switch61; 2724#L996-21 main_#t~switch61 := main_#t~switch61 || 7 == main_~_hj_k~0; 2723#L996-22 assume !main_#t~switch61; 2722#L996-24 main_#t~switch61 := main_#t~switch61 || 6 == main_~_hj_k~0; 2721#L996-25 assume !main_#t~switch61; 2720#L996-27 main_#t~switch61 := main_#t~switch61 || 5 == main_~_hj_k~0; 2719#L996-28 assume !main_#t~switch61; 2718#L996-30 main_#t~switch61 := main_#t~switch61 || 4 == main_~_hj_k~0; 2717#L996-31 assume !main_#t~switch61; 2716#L996-33 main_#t~switch61 := main_#t~switch61 || 3 == main_~_hj_k~0; 2625#L996-34 assume !main_#t~switch61; 2626#L996-36 main_#t~switch61 := main_#t~switch61 || 2 == main_~_hj_k~0; 2588#L996-37 assume !main_#t~switch61; 2589#L996-39 main_#t~switch61 := main_#t~switch61 || 1 == main_~_hj_k~0; 2610#L996-40 assume !main_#t~switch61; 2636#L996-42 havoc main_#t~switch61; 2560#L996-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 2561#L996-44 goto; 2648#L996-46 goto; 2665#L996-48 goto; 2691#L996-116 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 2692#L996-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem88.base, main_#t~mem88.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem88.base, main_#t~mem88.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem88.base, main_#t~mem88.offset; 2615#L996-63 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem89.base, main_#t~mem89.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem90.base, main_#t~mem90.offset := read~$Pointer$(main_#t~mem89.base, 16 + main_#t~mem89.offset, 4);call main_#t~mem91.base, main_#t~mem91.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem92 := read~int(main_#t~mem91.base, 20 + main_#t~mem91.offset, 4);call write~$Pointer$(main_#t~mem90.base, main_#t~mem90.offset - main_#t~mem92, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem89.base, main_#t~mem89.offset;havoc main_#t~mem90.base, main_#t~mem90.offset;havoc main_#t~mem91.base, main_#t~mem91.offset;havoc main_#t~mem92;call main_#t~mem93.base, main_#t~mem93.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem94.base, main_#t~mem94.offset := read~$Pointer$(main_#t~mem93.base, 16 + main_#t~mem93.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem94.base, 8 + main_#t~mem94.offset, 4);havoc main_#t~mem93.base, main_#t~mem93.offset;havoc main_#t~mem94.base, main_#t~mem94.offset;call main_#t~mem95.base, main_#t~mem95.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem95.base, 16 + main_#t~mem95.offset, 4);havoc main_#t~mem95.base, main_#t~mem95.offset; 2616#L996-62 goto; 2563#L996-114 havoc main_~_ha_bkt~0;call main_#t~mem96.base, main_#t~mem96.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem97 := read~int(main_#t~mem96.base, 12 + main_#t~mem96.offset, 4);main_#t~post98 := main_#t~mem97;call write~int(1 + main_#t~post98, main_#t~mem96.base, 12 + main_#t~mem96.offset, 4);havoc main_#t~mem96.base, main_#t~mem96.offset;havoc main_#t~mem97;havoc main_#t~post98; 2605#L996-67 call main_#t~mem99.base, main_#t~mem99.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem100 := read~int(main_#t~mem99.base, 4 + main_#t~mem99.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem100 - 1);havoc main_#t~mem99.base, main_#t~mem99.offset;havoc main_#t~mem100; 2661#L996-66 goto; 2697#L996-112 call main_#t~mem101.base, main_#t~mem101.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem102.base, main_#t~mem102.offset := read~$Pointer$(main_#t~mem101.base, main_#t~mem101.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem102.base, main_#t~mem102.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem101.base, main_#t~mem101.offset;havoc main_#t~mem102.base, main_#t~mem102.offset;call main_#t~mem103 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post104 := main_#t~mem103;call write~int(1 + main_#t~post104, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem103;havoc main_#t~post104;call main_#t~mem105.base, main_#t~mem105.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem105.base, main_#t~mem105.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem105.base, main_#t~mem105.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem106.base, main_#t~mem106.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 2687#L996-69 assume main_#t~mem106.base != 0 || main_#t~mem106.offset != 0;havoc main_#t~mem106.base, main_#t~mem106.offset;call main_#t~mem107.base, main_#t~mem107.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem107.base, 12 + main_#t~mem107.offset, 4);havoc main_#t~mem107.base, main_#t~mem107.offset; 2535#L996-71 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem109 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem108 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short112 := main_#t~mem109 % 4294967296 >= 10 * (1 + main_#t~mem108) % 4294967296; 2536#L996-72 assume !main_#t~short112; 2594#L996-74 assume !main_#t~short112;havoc main_#t~mem109;havoc main_#t~mem108;havoc main_#t~mem110.base, main_#t~mem110.offset;havoc main_#t~mem111;havoc main_#t~short112; 2554#L996-111 goto; 2549#L996-113 goto; 2550#L996-115 goto; 2657#L996-117 goto; 2658#L989-3 call main_#t~mem42 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post43 := main_#t~mem42;call write~int(1 + main_#t~post43, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem42;havoc main_#t~post43; 2515#L989-4 [2021-11-02 22:42:08,143 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:42:08,144 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 5 times [2021-11-02 22:42:08,144 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:42:08,144 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1953799899] [2021-11-02 22:42:08,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:08,145 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:42:08,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:42:08,160 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:42:08,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:42:08,179 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:42:08,180 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:42:08,180 INFO L85 PathProgramCache]: Analyzing trace with hash 89375309, now seen corresponding path program 1 times [2021-11-02 22:42:08,181 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:42:08,181 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1302727887] [2021-11-02 22:42:08,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:08,181 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:42:08,191 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-02 22:42:08,191 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1145820599] [2021-11-02 22:42:08,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:08,192 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:42:08,192 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:42:08,193 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:42:08,213 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-11-02 22:42:08,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:42:08,386 INFO L263 TraceCheckSpWp]: Trace formula consists of 241 conjuncts, 4 conjunts are in the unsatisfiable core [2021-11-02 22:42:08,391 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:42:08,511 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:42:08,511 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:42:08,511 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1302727887] [2021-11-02 22:42:08,511 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-02 22:42:08,512 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1145820599] [2021-11-02 22:42:08,512 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1145820599] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-02 22:42:08,512 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-02 22:42:08,512 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-02 22:42:08,512 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1672540150] [2021-11-02 22:42:08,513 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-02 22:42:08,513 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:42:08,513 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-02 22:42:08,514 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-02 22:42:08,514 INFO L87 Difference]: Start difference. First operand 231 states and 284 transitions. cyclomatic complexity: 56 Second operand has 4 states, 4 states have (on average 13.25) internal successors, (53), 4 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:42:08,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:42:08,562 INFO L93 Difference]: Finished difference Result 295 states and 369 transitions. [2021-11-02 22:42:08,588 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-02 22:42:08,588 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 295 states and 369 transitions. [2021-11-02 22:42:08,591 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 279 [2021-11-02 22:42:08,594 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 295 states to 295 states and 369 transitions. [2021-11-02 22:42:08,594 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 295 [2021-11-02 22:42:08,596 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 295 [2021-11-02 22:42:08,596 INFO L73 IsDeterministic]: Start isDeterministic. Operand 295 states and 369 transitions. [2021-11-02 22:42:08,597 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-02 22:42:08,597 INFO L681 BuchiCegarLoop]: Abstraction has 295 states and 369 transitions. [2021-11-02 22:42:08,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 295 states and 369 transitions. [2021-11-02 22:42:08,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 295 to 199. [2021-11-02 22:42:08,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 199 states, 195 states have (on average 1.2256410256410257) internal successors, (239), 194 states have internal predecessors, (239), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-02 22:42:08,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 245 transitions. [2021-11-02 22:42:08,603 INFO L704 BuchiCegarLoop]: Abstraction has 199 states and 245 transitions. [2021-11-02 22:42:08,603 INFO L587 BuchiCegarLoop]: Abstraction has 199 states and 245 transitions. [2021-11-02 22:42:08,603 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-11-02 22:42:08,603 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 199 states and 245 transitions. [2021-11-02 22:42:08,604 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 192 [2021-11-02 22:42:08,604 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:42:08,604 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:42:08,609 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-02 22:42:08,609 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:42:08,609 INFO L791 eck$LassoCheckResult]: Stem: 3391#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string30.base, #t~string30.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string30.base, #t~string30.offset, 1);call write~init~int(0, #t~string30.base, 1 + #t~string30.offset, 1);call #t~string31.base, #t~string31.offset := #Ultimate.allocOnStack(21);call ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := #Ultimate.allocOnStack(40);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 3370#L-1 havoc main_#res;havoc main_#t~ret45.base, main_#t~ret45.offset, main_#t~mem46, main_#t~mem47, main_#t~mem48, main_#t~mem50, main_#t~mem49, main_#t~mem51, main_#t~mem52, main_#t~mem54, main_#t~mem53, main_#t~mem55, main_#t~mem56, main_#t~mem58, main_#t~mem57, main_#t~mem59, main_#t~mem60, main_#t~switch61, main_#t~mem62, main_#t~mem63, main_#t~mem64, main_#t~mem65, main_#t~mem66, main_#t~mem67, main_#t~mem68, main_#t~mem69, main_#t~mem70, main_#t~mem71, main_#t~mem72, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~ret73.base, main_#t~ret73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76.base, main_#t~mem76.offset, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79.base, main_#t~mem79.offset, main_#t~mem80.base, main_#t~mem80.offset, main_#t~ret81.base, main_#t~ret81.offset, main_#t~mem82.base, main_#t~mem82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86.base, main_#t~mem86.offset, main_#t~mem87.base, main_#t~mem87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91.base, main_#t~mem91.offset, main_#t~mem92, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95.base, main_#t~mem95.offset, main_#t~mem96.base, main_#t~mem96.offset, main_#t~mem97, main_#t~post98, main_#t~mem99.base, main_#t~mem99.offset, main_#t~mem100, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103, main_#t~post104, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem109, main_#t~mem108, main_#t~mem110.base, main_#t~mem110.offset, main_#t~mem111, main_#t~short112, main_#t~mem113.base, main_#t~mem113.offset, main_#t~mem114, main_#t~ret115.base, main_#t~ret115.offset, main_#t~mem116.base, main_#t~mem116.offset, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem118.base, main_#t~mem118.offset, main_#t~mem119, main_#t~mem120.base, main_#t~mem120.offset, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem124, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem128, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127, main_#t~ite129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem140, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem141.base, main_#t~mem141.offset, main_#t~mem142, main_#t~pre143, main_#t~mem144.base, main_#t~mem144.offset, main_#t~mem145, main_#t~mem146.base, main_#t~mem146.offset, main_#t~mem147, main_#t~post148, main_#t~mem152, main_#t~mem150, main_#t~mem149.base, main_#t~mem149.offset, main_#t~mem151, main_#t~mem153, main_#t~post154, main_#t~mem155.base, main_#t~mem155.offset, main_#t~mem156.base, main_#t~mem156.offset, main_#t~mem157.base, main_#t~mem157.offset, main_#t~post131, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133, main_#t~mem158.base, main_#t~mem158.offset, main_#t~mem159.base, main_#t~mem159.offset, main_#t~mem160.base, main_#t~mem160.offset, main_#t~mem161, main_#t~mem162.base, main_#t~mem162.offset, main_#t~mem163, main_#t~mem164.base, main_#t~mem164.offset, main_#t~mem165, main_#t~post166, main_#t~mem167.base, main_#t~mem167.offset, main_#t~mem168.base, main_#t~mem168.offset, main_#t~mem169.base, main_#t~mem169.offset, main_#t~mem170.base, main_#t~mem170.offset, main_#t~mem173, main_#t~mem171.base, main_#t~mem171.offset, main_#t~mem172, main_#t~ite176, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178, main_#t~mem179.base, main_#t~mem179.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem42, main_#t~post43, main_#t~mem44, main_#t~mem184, main_#t~mem183, main_#t~mem185, main_#t~mem186, main_#t~mem188, main_#t~mem187, main_#t~mem189, main_#t~mem190, main_#t~mem192, main_#t~mem191, main_#t~mem193, main_#t~mem194, main_#t~switch195, main_#t~mem196, main_#t~mem197, main_#t~mem198, main_#t~mem199, main_#t~mem200, main_#t~mem201, main_#t~mem202, main_#t~mem203, main_#t~mem204, main_#t~mem205, main_#t~mem206, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem216, main_#t~mem217, main_#t~mem218, main_#t~short219, main_#t~mem220.base, main_#t~mem220.offset, main_#t~ret221, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~short228, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232, main_#t~mem233.base, main_#t~mem233.offset, main_#t~mem234.base, main_#t~mem234.offset, main_#t~mem235.base, main_#t~mem235.offset, main_#t~mem236.base, main_#t~mem236.offset, main_#t~mem237.base, main_#t~mem237.offset, main_#t~mem238.base, main_#t~mem238.offset, main_#t~mem239, main_#t~mem240.base, main_#t~mem240.offset, main_#t~mem241.base, main_#t~mem241.offset, main_#t~mem242.base, main_#t~mem242.offset, main_#t~mem243, main_#t~mem244.base, main_#t~mem244.offset, main_#t~mem245.base, main_#t~mem245.offset, main_#t~mem246.base, main_#t~mem246.offset, main_#t~mem247.base, main_#t~mem247.offset, main_#t~mem248.base, main_#t~mem248.offset, main_#t~mem249, main_#t~mem250.base, main_#t~mem250.offset, main_#t~mem253, main_#t~mem251.base, main_#t~mem251.offset, main_#t~mem252, main_#t~mem254.base, main_#t~mem254.offset, main_#t~mem255.base, main_#t~mem255.offset, main_#t~mem256, main_#t~post257, main_#t~mem258.base, main_#t~mem258.offset, main_#t~mem259.base, main_#t~mem259.offset, main_#t~mem260.base, main_#t~mem260.offset, main_#t~mem261.base, main_#t~mem261.offset, main_#t~mem262.base, main_#t~mem262.offset, main_#t~mem263.base, main_#t~mem263.offset, main_#t~mem264.base, main_#t~mem264.offset, main_#t~mem265.base, main_#t~mem265.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem266.base, main_#t~mem266.offset, main_#t~mem267, main_#t~post268, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem180, main_#t~post181, main_#t~mem182, main_#t~mem269.base, main_#t~mem269.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 3204#L989-4 [2021-11-02 22:42:08,611 INFO L793 eck$LassoCheckResult]: Loop: 3204#L989-4 call main_#t~mem44 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 3197#L989-1 assume !!(main_#t~mem44 < 10);havoc main_#t~mem44;real_malloc_#in~n := 40;havoc real_malloc_#res.base, real_malloc_#res.offset;havoc real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset, real_malloc_~n;real_malloc_~n := real_malloc_#in~n;call real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset := #Ultimate.allocOnHeap(real_malloc_~n);real_malloc_#res.base, real_malloc_#res.offset := real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset;havoc real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset; 3199#L979 main_#t~ret45.base, main_#t~ret45.offset := real_malloc_#res.base, real_malloc_#res.offset;main_~user~0.base, main_~user~0.offset := main_#t~ret45.base, main_#t~ret45.offset;havoc main_#t~ret45.base, main_#t~ret45.offset; 3205#L991 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 3206#L991-2 call main_#t~mem46 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem46, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem46;call main_#t~mem47 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem48 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem47 * main_#t~mem48, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem47;havoc main_#t~mem48; 3316#L996-118 havoc main_~_ha_hashv~0; 3359#L996-49 goto; 3360#L996-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 3222#L996-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 3223#L996-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch61 := 11 == main_~_hj_k~0; 3387#L996-10 assume !main_#t~switch61; 3390#L996-12 main_#t~switch61 := main_#t~switch61 || 10 == main_~_hj_k~0; 3295#L996-13 assume !main_#t~switch61; 3296#L996-15 main_#t~switch61 := main_#t~switch61 || 9 == main_~_hj_k~0; 3388#L996-16 assume !main_#t~switch61; 3389#L996-18 main_#t~switch61 := main_#t~switch61 || 8 == main_~_hj_k~0; 3380#L996-19 assume !main_#t~switch61; 3376#L996-21 main_#t~switch61 := main_#t~switch61 || 7 == main_~_hj_k~0; 3356#L996-22 assume !main_#t~switch61; 3357#L996-24 main_#t~switch61 := main_#t~switch61 || 6 == main_~_hj_k~0; 3373#L996-25 assume !main_#t~switch61; 3351#L996-27 main_#t~switch61 := main_#t~switch61 || 5 == main_~_hj_k~0; 3200#L996-28 assume !main_#t~switch61; 3201#L996-30 main_#t~switch61 := main_#t~switch61 || 4 == main_~_hj_k~0; 3324#L996-31 assume main_#t~switch61;call main_#t~mem69 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem69 % 256);havoc main_#t~mem69; 3341#L996-33 main_#t~switch61 := main_#t~switch61 || 3 == main_~_hj_k~0; 3314#L996-34 assume main_#t~switch61;call main_#t~mem70 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem70 % 256);havoc main_#t~mem70; 3315#L996-36 main_#t~switch61 := main_#t~switch61 || 2 == main_~_hj_k~0; 3277#L996-37 assume main_#t~switch61;call main_#t~mem71 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem71 % 256);havoc main_#t~mem71; 3278#L996-39 main_#t~switch61 := main_#t~switch61 || 1 == main_~_hj_k~0; 3299#L996-40 assume main_#t~switch61;call main_#t~mem72 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem72 % 256;havoc main_#t~mem72; 3325#L996-42 havoc main_#t~switch61; 3249#L996-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 3250#L996-44 goto; 3339#L996-46 goto; 3352#L996-48 goto; 3378#L996-116 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 3379#L996-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem88.base, main_#t~mem88.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem88.base, main_#t~mem88.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem88.base, main_#t~mem88.offset; 3305#L996-63 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem89.base, main_#t~mem89.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem90.base, main_#t~mem90.offset := read~$Pointer$(main_#t~mem89.base, 16 + main_#t~mem89.offset, 4);call main_#t~mem91.base, main_#t~mem91.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem92 := read~int(main_#t~mem91.base, 20 + main_#t~mem91.offset, 4);call write~$Pointer$(main_#t~mem90.base, main_#t~mem90.offset - main_#t~mem92, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem89.base, main_#t~mem89.offset;havoc main_#t~mem90.base, main_#t~mem90.offset;havoc main_#t~mem91.base, main_#t~mem91.offset;havoc main_#t~mem92;call main_#t~mem93.base, main_#t~mem93.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem94.base, main_#t~mem94.offset := read~$Pointer$(main_#t~mem93.base, 16 + main_#t~mem93.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem94.base, 8 + main_#t~mem94.offset, 4);havoc main_#t~mem93.base, main_#t~mem93.offset;havoc main_#t~mem94.base, main_#t~mem94.offset;call main_#t~mem95.base, main_#t~mem95.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem95.base, 16 + main_#t~mem95.offset, 4);havoc main_#t~mem95.base, main_#t~mem95.offset; 3306#L996-62 goto; 3252#L996-114 havoc main_~_ha_bkt~0;call main_#t~mem96.base, main_#t~mem96.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem97 := read~int(main_#t~mem96.base, 12 + main_#t~mem96.offset, 4);main_#t~post98 := main_#t~mem97;call write~int(1 + main_#t~post98, main_#t~mem96.base, 12 + main_#t~mem96.offset, 4);havoc main_#t~mem96.base, main_#t~mem96.offset;havoc main_#t~mem97;havoc main_#t~post98; 3294#L996-67 call main_#t~mem99.base, main_#t~mem99.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem100 := read~int(main_#t~mem99.base, 4 + main_#t~mem99.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem100 - 1);havoc main_#t~mem99.base, main_#t~mem99.offset;havoc main_#t~mem100; 3348#L996-66 goto; 3384#L996-112 call main_#t~mem101.base, main_#t~mem101.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem102.base, main_#t~mem102.offset := read~$Pointer$(main_#t~mem101.base, main_#t~mem101.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem102.base, main_#t~mem102.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem101.base, main_#t~mem101.offset;havoc main_#t~mem102.base, main_#t~mem102.offset;call main_#t~mem103 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post104 := main_#t~mem103;call write~int(1 + main_#t~post104, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem103;havoc main_#t~post104;call main_#t~mem105.base, main_#t~mem105.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem105.base, main_#t~mem105.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem105.base, main_#t~mem105.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem106.base, main_#t~mem106.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 3374#L996-69 assume main_#t~mem106.base != 0 || main_#t~mem106.offset != 0;havoc main_#t~mem106.base, main_#t~mem106.offset;call main_#t~mem107.base, main_#t~mem107.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem107.base, 12 + main_#t~mem107.offset, 4);havoc main_#t~mem107.base, main_#t~mem107.offset; 3224#L996-71 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem109 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem108 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short112 := main_#t~mem109 % 4294967296 >= 10 * (1 + main_#t~mem108) % 4294967296; 3225#L996-72 assume !main_#t~short112; 3283#L996-74 assume !main_#t~short112;havoc main_#t~mem109;havoc main_#t~mem108;havoc main_#t~mem110.base, main_#t~mem110.offset;havoc main_#t~mem111;havoc main_#t~short112; 3243#L996-111 goto; 3238#L996-113 goto; 3239#L996-115 goto; 3344#L996-117 goto; 3345#L989-3 call main_#t~mem42 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post43 := main_#t~mem42;call write~int(1 + main_#t~post43, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem42;havoc main_#t~post43; 3204#L989-4 [2021-11-02 22:42:08,612 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:42:08,612 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 6 times [2021-11-02 22:42:08,613 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:42:08,614 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [737560732] [2021-11-02 22:42:08,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:08,616 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:42:08,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:42:08,643 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:42:08,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:42:08,681 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:42:08,681 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:42:08,681 INFO L85 PathProgramCache]: Analyzing trace with hash -1555166395, now seen corresponding path program 1 times [2021-11-02 22:42:08,682 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:42:08,685 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [206209429] [2021-11-02 22:42:08,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:08,689 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:42:08,700 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-02 22:42:08,701 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [188187513] [2021-11-02 22:42:08,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:42:08,701 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:42:08,704 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:42:08,709 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:42:08,733 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dca00558-482e-4bce-ab31-889366c26d76/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process