./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test3-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 9ad7fb26 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test3-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash f6bf6d70eb07e52125f91259e05d2dabd63dc1b16a64b1f25a229511f6ff83f8 --- Real Ultimate output --- This is Ultimate 0.2.1-dev-9ad7fb2 [2021-11-02 22:14:58,275 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-02 22:14:58,277 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-02 22:14:58,320 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-02 22:14:58,321 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-02 22:14:58,323 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-02 22:14:58,325 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-02 22:14:58,329 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-02 22:14:58,332 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-02 22:14:58,334 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-02 22:14:58,335 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-02 22:14:58,337 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-02 22:14:58,338 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-02 22:14:58,340 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-02 22:14:58,343 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-02 22:14:58,345 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-02 22:14:58,347 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-02 22:14:58,349 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-02 22:14:58,352 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-02 22:14:58,356 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-02 22:14:58,359 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-02 22:14:58,369 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-02 22:14:58,371 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-02 22:14:58,373 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-02 22:14:58,378 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-02 22:14:58,378 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-02 22:14:58,389 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-02 22:14:58,392 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-02 22:14:58,393 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-02 22:14:58,395 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-02 22:14:58,396 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-02 22:14:58,397 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-02 22:14:58,400 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-02 22:14:58,402 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-02 22:14:58,406 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-02 22:14:58,406 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-02 22:14:58,407 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-02 22:14:58,407 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-02 22:14:58,407 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-02 22:14:58,409 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-02 22:14:58,410 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-02 22:14:58,411 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-11-02 22:14:58,473 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-02 22:14:58,473 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-02 22:14:58,475 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-02 22:14:58,475 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-02 22:14:58,478 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-02 22:14:58,479 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-02 22:14:58,479 INFO L138 SettingsManager]: * Use SBE=true [2021-11-02 22:14:58,479 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-11-02 22:14:58,480 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-11-02 22:14:58,480 INFO L138 SettingsManager]: * Use old map elimination=false [2021-11-02 22:14:58,481 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-11-02 22:14:58,482 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-11-02 22:14:58,482 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-11-02 22:14:58,483 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-02 22:14:58,483 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-02 22:14:58,483 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-11-02 22:14:58,483 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-02 22:14:58,484 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-02 22:14:58,484 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-02 22:14:58,484 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-11-02 22:14:58,485 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-11-02 22:14:58,485 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-11-02 22:14:58,485 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-02 22:14:58,485 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-02 22:14:58,486 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-11-02 22:14:58,486 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-02 22:14:58,488 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-11-02 22:14:58,489 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-02 22:14:58,489 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-02 22:14:58,489 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-02 22:14:58,490 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-02 22:14:58,490 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-02 22:14:58,491 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-11-02 22:14:58,492 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f6bf6d70eb07e52125f91259e05d2dabd63dc1b16a64b1f25a229511f6ff83f8 [2021-11-02 22:14:58,868 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-02 22:14:58,898 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-02 22:14:58,901 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-02 22:14:58,903 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-02 22:14:58,905 INFO L275 PluginConnector]: CDTParser initialized [2021-11-02 22:14:58,907 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test3-1.i [2021-11-02 22:14:59,018 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/data/3830ef925/94e5bfb6b80a4c0ca2ab51ce9d36bc96/FLAG7f9d2da3e [2021-11-02 22:14:59,865 INFO L306 CDTParser]: Found 1 translation units. [2021-11-02 22:14:59,868 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test3-1.i [2021-11-02 22:14:59,899 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/data/3830ef925/94e5bfb6b80a4c0ca2ab51ce9d36bc96/FLAG7f9d2da3e [2021-11-02 22:14:59,975 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/data/3830ef925/94e5bfb6b80a4c0ca2ab51ce9d36bc96 [2021-11-02 22:14:59,977 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-02 22:14:59,981 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-02 22:14:59,983 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-02 22:14:59,984 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-02 22:14:59,988 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-02 22:14:59,990 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.11 10:14:59" (1/1) ... [2021-11-02 22:14:59,993 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4996c4a3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:14:59, skipping insertion in model container [2021-11-02 22:14:59,994 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.11 10:14:59" (1/1) ... [2021-11-02 22:15:00,003 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-02 22:15:00,086 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-02 22:15:00,720 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test3-1.i[33021,33034] [2021-11-02 22:15:00,943 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test3-1.i[44590,44603] [2021-11-02 22:15:00,970 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-02 22:15:00,981 INFO L203 MainTranslator]: Completed pre-run [2021-11-02 22:15:01,043 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test3-1.i[33021,33034] [2021-11-02 22:15:01,164 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test3-1.i[44590,44603] [2021-11-02 22:15:01,168 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-02 22:15:01,237 INFO L208 MainTranslator]: Completed translation [2021-11-02 22:15:01,237 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:15:01 WrapperNode [2021-11-02 22:15:01,238 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-02 22:15:01,239 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-02 22:15:01,239 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-02 22:15:01,240 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-02 22:15:01,250 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:15:01" (1/1) ... [2021-11-02 22:15:01,337 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:15:01" (1/1) ... [2021-11-02 22:15:01,403 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-02 22:15:01,404 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-02 22:15:01,405 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-02 22:15:01,405 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-02 22:15:01,420 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:15:01" (1/1) ... [2021-11-02 22:15:01,420 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:15:01" (1/1) ... [2021-11-02 22:15:01,437 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:15:01" (1/1) ... [2021-11-02 22:15:01,437 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:15:01" (1/1) ... [2021-11-02 22:15:01,512 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:15:01" (1/1) ... [2021-11-02 22:15:01,527 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:15:01" (1/1) ... [2021-11-02 22:15:01,533 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:15:01" (1/1) ... [2021-11-02 22:15:01,544 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-02 22:15:01,545 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-02 22:15:01,545 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-02 22:15:01,546 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-02 22:15:01,547 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:15:01" (1/1) ... [2021-11-02 22:15:01,556 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-02 22:15:01,573 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:15:01,588 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-02 22:15:01,616 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-11-02 22:15:01,659 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-11-02 22:15:01,660 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-02 22:15:01,660 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2021-11-02 22:15:01,660 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2021-11-02 22:15:01,661 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-11-02 22:15:01,663 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-11-02 22:15:01,663 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-02 22:15:01,663 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2021-11-02 22:15:01,664 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-11-02 22:15:01,664 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-02 22:15:01,665 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-02 22:15:01,665 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-02 22:15:01,665 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-02 22:15:01,964 WARN L805 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-11-02 22:15:03,735 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-02 22:15:03,735 INFO L299 CfgBuilder]: Removed 79 assume(true) statements. [2021-11-02 22:15:03,739 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.11 10:15:03 BoogieIcfgContainer [2021-11-02 22:15:03,739 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-02 22:15:03,743 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-11-02 22:15:03,743 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-11-02 22:15:03,748 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-11-02 22:15:03,749 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-02 22:15:03,749 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 02.11 10:14:59" (1/3) ... [2021-11-02 22:15:03,751 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@29a016a8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 02.11 10:15:03, skipping insertion in model container [2021-11-02 22:15:03,752 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-02 22:15:03,752 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.11 10:15:01" (2/3) ... [2021-11-02 22:15:03,752 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@29a016a8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 02.11 10:15:03, skipping insertion in model container [2021-11-02 22:15:03,753 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-02 22:15:03,753 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.11 10:15:03" (3/3) ... [2021-11-02 22:15:03,761 INFO L389 chiAutomizerObserver]: Analyzing ICFG uthash_SFH_test3-1.i [2021-11-02 22:15:03,810 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-11-02 22:15:03,810 INFO L360 BuchiCegarLoop]: Hoare is false [2021-11-02 22:15:03,810 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-11-02 22:15:03,811 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-11-02 22:15:03,811 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-11-02 22:15:03,811 INFO L364 BuchiCegarLoop]: Difference is false [2021-11-02 22:15:03,811 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-11-02 22:15:03,811 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-11-02 22:15:03,834 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 195 states, 190 states have (on average 1.7) internal successors, (323), 190 states have internal predecessors, (323), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-02 22:15:03,873 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 183 [2021-11-02 22:15:03,874 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:15:03,874 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:15:03,882 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-02 22:15:03,882 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2021-11-02 22:15:03,883 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-11-02 22:15:03,884 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 195 states, 190 states have (on average 1.7) internal successors, (323), 190 states have internal predecessors, (323), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-02 22:15:03,899 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 183 [2021-11-02 22:15:03,899 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:15:03,899 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:15:03,900 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-02 22:15:03,900 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2021-11-02 22:15:03,908 INFO L791 eck$LassoCheckResult]: Stem: 191#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 134#L-1true havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem149, main_#t~mem148, main_#t~mem150, main_#t~mem151, main_#t~mem153, main_#t~mem152, main_#t~mem154, main_#t~mem155, main_#t~mem157, main_#t~mem156, main_#t~mem158, main_#t~mem159, main_#t~switch160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem172.base, main_#t~mem172.offset, main_#t~mem173, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181, main_#t~mem182, main_#t~mem183, main_#t~short184, main_#t~mem185.base, main_#t~mem185.offset, main_#t~ret186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem191.base, main_#t~mem191.offset, main_#t~mem192.base, main_#t~mem192.offset, main_#t~short193, main_#t~mem194.base, main_#t~mem194.offset, main_#t~mem195.base, main_#t~mem195.offset, main_#t~mem196.base, main_#t~mem196.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~mem199.base, main_#t~mem199.offset, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204.base, main_#t~mem204.offset, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208.base, main_#t~mem208.offset, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem216, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215, main_#t~mem217.base, main_#t~mem217.offset, main_#t~mem218.base, main_#t~mem218.offset, main_#t~mem219, main_#t~post220, main_#t~mem221.base, main_#t~mem221.offset, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225.base, main_#t~mem225.offset, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230, main_#t~post231, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem146, main_#t~mem147, main_#t~mem233, main_#t~mem234, main_#t~mem232.base, main_#t~mem232.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 160#L735-4true [2021-11-02 22:15:03,909 INFO L793 eck$LassoCheckResult]: Loop: 160#L735-4true call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 35#L735-1true assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 13#L737true assume main_~user~0.base == 0 && main_~user~0.offset == 0;assume false; 67#L737-2true call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 55#L742-124true assume !true; 30#L735-3true call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 160#L735-4true [2021-11-02 22:15:03,917 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:15:03,918 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2021-11-02 22:15:03,930 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:15:03,931 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [549868758] [2021-11-02 22:15:03,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:15:03,932 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:15:04,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:15:04,069 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:15:04,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:15:04,136 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:15:04,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:15:04,140 INFO L85 PathProgramCache]: Analyzing trace with hash 1336134572, now seen corresponding path program 1 times [2021-11-02 22:15:04,141 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:15:04,141 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [674238394] [2021-11-02 22:15:04,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:15:04,142 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:15:04,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:15:04,203 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:15:04,203 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:15:04,204 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [674238394] [2021-11-02 22:15:04,205 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [674238394] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-02 22:15:04,205 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-02 22:15:04,205 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-02 22:15:04,206 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1447870209] [2021-11-02 22:15:04,212 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-02 22:15:04,213 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:15:04,231 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-11-02 22:15:04,232 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-11-02 22:15:04,235 INFO L87 Difference]: Start difference. First operand has 195 states, 190 states have (on average 1.7) internal successors, (323), 190 states have internal predecessors, (323), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:15:04,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:15:04,261 INFO L93 Difference]: Finished difference Result 195 states and 256 transitions. [2021-11-02 22:15:04,262 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-11-02 22:15:04,264 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 195 states and 256 transitions. [2021-11-02 22:15:04,272 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 183 [2021-11-02 22:15:04,283 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 195 states to 191 states and 252 transitions. [2021-11-02 22:15:04,284 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 191 [2021-11-02 22:15:04,286 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 191 [2021-11-02 22:15:04,287 INFO L73 IsDeterministic]: Start isDeterministic. Operand 191 states and 252 transitions. [2021-11-02 22:15:04,290 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-02 22:15:04,290 INFO L681 BuchiCegarLoop]: Abstraction has 191 states and 252 transitions. [2021-11-02 22:15:04,311 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states and 252 transitions. [2021-11-02 22:15:04,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 191. [2021-11-02 22:15:04,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 191 states, 187 states have (on average 1.3155080213903743) internal successors, (246), 186 states have internal predecessors, (246), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-02 22:15:04,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 252 transitions. [2021-11-02 22:15:04,341 INFO L704 BuchiCegarLoop]: Abstraction has 191 states and 252 transitions. [2021-11-02 22:15:04,341 INFO L587 BuchiCegarLoop]: Abstraction has 191 states and 252 transitions. [2021-11-02 22:15:04,342 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-11-02 22:15:04,342 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 191 states and 252 transitions. [2021-11-02 22:15:04,346 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 183 [2021-11-02 22:15:04,347 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:15:04,347 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:15:04,348 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-02 22:15:04,349 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:15:04,349 INFO L791 eck$LassoCheckResult]: Stem: 588#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 489#L-1 havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem149, main_#t~mem148, main_#t~mem150, main_#t~mem151, main_#t~mem153, main_#t~mem152, main_#t~mem154, main_#t~mem155, main_#t~mem157, main_#t~mem156, main_#t~mem158, main_#t~mem159, main_#t~switch160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem172.base, main_#t~mem172.offset, main_#t~mem173, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181, main_#t~mem182, main_#t~mem183, main_#t~short184, main_#t~mem185.base, main_#t~mem185.offset, main_#t~ret186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem191.base, main_#t~mem191.offset, main_#t~mem192.base, main_#t~mem192.offset, main_#t~short193, main_#t~mem194.base, main_#t~mem194.offset, main_#t~mem195.base, main_#t~mem195.offset, main_#t~mem196.base, main_#t~mem196.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~mem199.base, main_#t~mem199.offset, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204.base, main_#t~mem204.offset, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208.base, main_#t~mem208.offset, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem216, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215, main_#t~mem217.base, main_#t~mem217.offset, main_#t~mem218.base, main_#t~mem218.offset, main_#t~mem219, main_#t~post220, main_#t~mem221.base, main_#t~mem221.offset, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225.base, main_#t~mem225.offset, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230, main_#t~post231, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem146, main_#t~mem147, main_#t~mem233, main_#t~mem234, main_#t~mem232.base, main_#t~mem232.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 490#L735-4 [2021-11-02 22:15:04,351 INFO L793 eck$LassoCheckResult]: Loop: 490#L735-4 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 522#L735-1 assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 453#L737 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 454#L737-2 call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 550#L742-124 havoc main_~_ha_hashv~0; 551#L742-49 goto; 502#L742-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 503#L742-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 539#L742-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch26 := 11 == main_~_hj_k~0; 573#L742-10 assume main_#t~switch26;call main_#t~mem27 := read~int(main_~_hj_key~0.base, 10 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 16777216 * (main_#t~mem27 % 256);havoc main_#t~mem27; 536#L742-12 main_#t~switch26 := main_#t~switch26 || 10 == main_~_hj_k~0; 515#L742-13 assume main_#t~switch26;call main_#t~mem28 := read~int(main_~_hj_key~0.base, 9 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 65536 * (main_#t~mem28 % 256);havoc main_#t~mem28; 516#L742-15 main_#t~switch26 := main_#t~switch26 || 9 == main_~_hj_k~0; 511#L742-16 assume main_#t~switch26;call main_#t~mem29 := read~int(main_~_hj_key~0.base, 8 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 256 * (main_#t~mem29 % 256);havoc main_#t~mem29; 465#L742-18 main_#t~switch26 := main_#t~switch26 || 8 == main_~_hj_k~0; 466#L742-19 assume main_#t~switch26;call main_#t~mem30 := read~int(main_~_hj_key~0.base, 7 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 16777216 * (main_#t~mem30 % 256);havoc main_#t~mem30; 562#L742-21 main_#t~switch26 := main_#t~switch26 || 7 == main_~_hj_k~0; 582#L742-22 assume !main_#t~switch26; 492#L742-24 main_#t~switch26 := main_#t~switch26 || 6 == main_~_hj_k~0; 493#L742-25 assume main_#t~switch26;call main_#t~mem32 := read~int(main_~_hj_key~0.base, 5 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 256 * (main_#t~mem32 % 256);havoc main_#t~mem32; 519#L742-27 main_#t~switch26 := main_#t~switch26 || 5 == main_~_hj_k~0; 443#L742-28 assume main_#t~switch26;call main_#t~mem33 := read~int(main_~_hj_key~0.base, 4 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + main_#t~mem33 % 256;havoc main_#t~mem33; 406#L742-30 main_#t~switch26 := main_#t~switch26 || 4 == main_~_hj_k~0; 407#L742-31 assume main_#t~switch26;call main_#t~mem34 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem34 % 256);havoc main_#t~mem34; 512#L742-33 main_#t~switch26 := main_#t~switch26 || 3 == main_~_hj_k~0; 400#L742-34 assume main_#t~switch26;call main_#t~mem35 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem35 % 256);havoc main_#t~mem35; 401#L742-36 main_#t~switch26 := main_#t~switch26 || 2 == main_~_hj_k~0; 451#L742-37 assume main_#t~switch26;call main_#t~mem36 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem36 % 256);havoc main_#t~mem36; 553#L742-39 main_#t~switch26 := main_#t~switch26 || 1 == main_~_hj_k~0; 554#L742-40 assume main_#t~switch26;call main_#t~mem37 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem37 % 256;havoc main_#t~mem37; 557#L742-42 havoc main_#t~switch26; 558#L742-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 559#L742-44 goto; 530#L742-46 goto; 531#L742-48 goto; 498#L742-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 499#L742-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset; 569#L742-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_#t~mem56.base, 16 + main_#t~mem56.offset, 4);call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 20 + main_#t~mem58.offset, 4);call write~$Pointer$(main_#t~mem57.base, main_#t~mem57.offset - main_#t~mem59, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57.base, main_#t~mem57.offset;havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem61.base, 8 + main_#t~mem61.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset;havoc main_#t~mem61.base, main_#t~mem61.offset;call main_#t~mem62.base, main_#t~mem62.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem62.base, 16 + main_#t~mem62.offset, 4);havoc main_#t~mem62.base, main_#t~mem62.offset; 578#L742-66 goto; 409#L742-120 havoc main_~_ha_bkt~0;call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64 := read~int(main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);main_#t~post65 := main_#t~mem64;call write~int(1 + main_#t~post65, main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64;havoc main_#t~post65; 501#L742-71 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67 := read~int(main_#t~mem66.base, 4 + main_#t~mem66.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem67 - 1);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67; 475#L742-70 goto; 476#L742-118 call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_#t~mem68.base, main_#t~mem68.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem69.base, main_#t~mem69.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68.base, main_#t~mem68.offset;havoc main_#t~mem69.base, main_#t~mem69.offset;call main_#t~mem70 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post71 := main_#t~mem70;call write~int(1 + main_#t~post71, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem70;havoc main_#t~post71;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem72.base, main_#t~mem72.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem73.base, main_#t~mem73.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 532#L742-73 assume main_#t~mem73.base != 0 || main_#t~mem73.offset != 0;havoc main_#t~mem73.base, main_#t~mem73.offset;call main_#t~mem74.base, main_#t~mem74.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem74.base, 12 + main_#t~mem74.offset, 4);havoc main_#t~mem74.base, main_#t~mem74.offset; 435#L742-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem76 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem75 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short79 := main_#t~mem76 % 4294967296 >= 10 * (1 + main_#t~mem75) % 4294967296; 436#L742-76 assume main_#t~short79;call main_#t~mem77.base, main_#t~mem77.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem78 := read~int(main_#t~mem77.base, 36 + main_#t~mem77.offset, 4);main_#t~short79 := 0 == main_#t~mem78 % 4294967296; 506#L742-78 assume !main_#t~short79;havoc main_#t~mem76;havoc main_#t~mem75;havoc main_#t~mem77.base, main_#t~mem77.offset;havoc main_#t~mem78;havoc main_#t~short79; 524#L742-117 goto; 441#L742-119 goto; 442#L742-121 goto; 497#L742-123 goto; 509#L735-3 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 490#L735-4 [2021-11-02 22:15:04,352 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:15:04,353 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2021-11-02 22:15:04,353 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:15:04,353 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1256746127] [2021-11-02 22:15:04,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:15:04,354 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:15:04,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:15:04,376 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:15:04,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:15:04,406 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:15:04,407 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:15:04,407 INFO L85 PathProgramCache]: Analyzing trace with hash -1570577107, now seen corresponding path program 1 times [2021-11-02 22:15:04,407 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:15:04,408 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1300809736] [2021-11-02 22:15:04,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:15:04,408 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:15:04,427 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-02 22:15:04,428 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1992120957] [2021-11-02 22:15:04,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:15:04,429 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:15:04,429 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:15:04,431 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:15:04,479 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-11-02 22:15:04,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:15:04,715 INFO L263 TraceCheckSpWp]: Trace formula consists of 308 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-02 22:15:04,726 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:15:04,960 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:15:04,961 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:15:04,961 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1300809736] [2021-11-02 22:15:04,961 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-02 22:15:04,963 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1992120957] [2021-11-02 22:15:04,963 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1992120957] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-02 22:15:04,964 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-02 22:15:04,964 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-02 22:15:04,964 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2042488009] [2021-11-02 22:15:04,987 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-02 22:15:04,987 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:15:04,991 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-02 22:15:04,992 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-02 22:15:04,993 INFO L87 Difference]: Start difference. First operand 191 states and 252 transitions. cyclomatic complexity: 65 Second operand has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:15:05,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:15:05,155 INFO L93 Difference]: Finished difference Result 212 states and 273 transitions. [2021-11-02 22:15:05,156 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-02 22:15:05,157 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 212 states and 273 transitions. [2021-11-02 22:15:05,161 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 204 [2021-11-02 22:15:05,171 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 212 states to 212 states and 273 transitions. [2021-11-02 22:15:05,171 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 212 [2021-11-02 22:15:05,174 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 212 [2021-11-02 22:15:05,174 INFO L73 IsDeterministic]: Start isDeterministic. Operand 212 states and 273 transitions. [2021-11-02 22:15:05,184 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-02 22:15:05,185 INFO L681 BuchiCegarLoop]: Abstraction has 212 states and 273 transitions. [2021-11-02 22:15:05,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states and 273 transitions. [2021-11-02 22:15:05,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 211. [2021-11-02 22:15:05,204 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 211 states, 207 states have (on average 1.285024154589372) internal successors, (266), 206 states have internal predecessors, (266), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-02 22:15:05,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 211 states and 272 transitions. [2021-11-02 22:15:05,207 INFO L704 BuchiCegarLoop]: Abstraction has 211 states and 272 transitions. [2021-11-02 22:15:05,207 INFO L587 BuchiCegarLoop]: Abstraction has 211 states and 272 transitions. [2021-11-02 22:15:05,207 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-11-02 22:15:05,208 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 211 states and 272 transitions. [2021-11-02 22:15:05,212 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 203 [2021-11-02 22:15:05,213 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:15:05,213 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:15:05,217 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-02 22:15:05,217 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:15:05,218 INFO L791 eck$LassoCheckResult]: Stem: 1157#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 1053#L-1 havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem149, main_#t~mem148, main_#t~mem150, main_#t~mem151, main_#t~mem153, main_#t~mem152, main_#t~mem154, main_#t~mem155, main_#t~mem157, main_#t~mem156, main_#t~mem158, main_#t~mem159, main_#t~switch160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem172.base, main_#t~mem172.offset, main_#t~mem173, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181, main_#t~mem182, main_#t~mem183, main_#t~short184, main_#t~mem185.base, main_#t~mem185.offset, main_#t~ret186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem191.base, main_#t~mem191.offset, main_#t~mem192.base, main_#t~mem192.offset, main_#t~short193, main_#t~mem194.base, main_#t~mem194.offset, main_#t~mem195.base, main_#t~mem195.offset, main_#t~mem196.base, main_#t~mem196.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~mem199.base, main_#t~mem199.offset, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204.base, main_#t~mem204.offset, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208.base, main_#t~mem208.offset, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem216, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215, main_#t~mem217.base, main_#t~mem217.offset, main_#t~mem218.base, main_#t~mem218.offset, main_#t~mem219, main_#t~post220, main_#t~mem221.base, main_#t~mem221.offset, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225.base, main_#t~mem225.offset, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230, main_#t~post231, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem146, main_#t~mem147, main_#t~mem233, main_#t~mem234, main_#t~mem232.base, main_#t~mem232.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 1054#L735-4 [2021-11-02 22:15:05,219 INFO L793 eck$LassoCheckResult]: Loop: 1054#L735-4 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 1088#L735-1 assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 1017#L737 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 1018#L737-2 call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 1116#L742-124 havoc main_~_ha_hashv~0; 1117#L742-49 goto; 1066#L742-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 1067#L742-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 1106#L742-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch26 := 11 == main_~_hj_k~0; 1140#L742-10 assume main_#t~switch26;call main_#t~mem27 := read~int(main_~_hj_key~0.base, 10 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 16777216 * (main_#t~mem27 % 256);havoc main_#t~mem27; 1141#L742-12 main_#t~switch26 := main_#t~switch26 || 10 == main_~_hj_k~0; 1078#L742-13 assume main_#t~switch26;call main_#t~mem28 := read~int(main_~_hj_key~0.base, 9 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 65536 * (main_#t~mem28 % 256);havoc main_#t~mem28; 1079#L742-15 main_#t~switch26 := main_#t~switch26 || 9 == main_~_hj_k~0; 1075#L742-16 assume main_#t~switch26;call main_#t~mem29 := read~int(main_~_hj_key~0.base, 8 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 256 * (main_#t~mem29 % 256);havoc main_#t~mem29; 1029#L742-18 main_#t~switch26 := main_#t~switch26 || 8 == main_~_hj_k~0; 1030#L742-19 assume main_#t~switch26;call main_#t~mem30 := read~int(main_~_hj_key~0.base, 7 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 16777216 * (main_#t~mem30 % 256);havoc main_#t~mem30; 1130#L742-21 main_#t~switch26 := main_#t~switch26 || 7 == main_~_hj_k~0; 1150#L742-22 assume main_#t~switch26;call main_#t~mem31 := read~int(main_~_hj_key~0.base, 6 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 65536 * (main_#t~mem31 % 256);havoc main_#t~mem31; 1151#L742-24 main_#t~switch26 := main_#t~switch26 || 6 == main_~_hj_k~0; 1084#L742-25 assume main_#t~switch26;call main_#t~mem32 := read~int(main_~_hj_key~0.base, 5 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 256 * (main_#t~mem32 % 256);havoc main_#t~mem32; 1085#L742-27 main_#t~switch26 := main_#t~switch26 || 5 == main_~_hj_k~0; 1005#L742-28 assume main_#t~switch26;call main_#t~mem33 := read~int(main_~_hj_key~0.base, 4 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + main_#t~mem33 % 256;havoc main_#t~mem33; 1006#L742-30 main_#t~switch26 := main_#t~switch26 || 4 == main_~_hj_k~0; 1076#L742-31 assume main_#t~switch26;call main_#t~mem34 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem34 % 256);havoc main_#t~mem34; 1077#L742-33 main_#t~switch26 := main_#t~switch26 || 3 == main_~_hj_k~0; 962#L742-34 assume main_#t~switch26;call main_#t~mem35 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem35 % 256);havoc main_#t~mem35; 963#L742-36 main_#t~switch26 := main_#t~switch26 || 2 == main_~_hj_k~0; 1158#L742-37 assume main_#t~switch26;call main_#t~mem36 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem36 % 256);havoc main_#t~mem36; 1159#L742-39 main_#t~switch26 := main_#t~switch26 || 1 == main_~_hj_k~0; 1160#L742-40 assume main_#t~switch26;call main_#t~mem37 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem37 % 256;havoc main_#t~mem37; 1124#L742-42 havoc main_#t~switch26; 1125#L742-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 1126#L742-44 goto; 1096#L742-46 goto; 1097#L742-48 goto; 1062#L742-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 1063#L742-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset; 1136#L742-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_#t~mem56.base, 16 + main_#t~mem56.offset, 4);call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 20 + main_#t~mem58.offset, 4);call write~$Pointer$(main_#t~mem57.base, main_#t~mem57.offset - main_#t~mem59, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57.base, main_#t~mem57.offset;havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem61.base, 8 + main_#t~mem61.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset;havoc main_#t~mem61.base, main_#t~mem61.offset;call main_#t~mem62.base, main_#t~mem62.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem62.base, 16 + main_#t~mem62.offset, 4);havoc main_#t~mem62.base, main_#t~mem62.offset; 1146#L742-66 goto; 974#L742-120 havoc main_~_ha_bkt~0;call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64 := read~int(main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);main_#t~post65 := main_#t~mem64;call write~int(1 + main_#t~post65, main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64;havoc main_#t~post65; 1065#L742-71 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67 := read~int(main_#t~mem66.base, 4 + main_#t~mem66.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem67 - 1);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67; 1039#L742-70 goto; 1040#L742-118 call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_#t~mem68.base, main_#t~mem68.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem69.base, main_#t~mem69.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68.base, main_#t~mem68.offset;havoc main_#t~mem69.base, main_#t~mem69.offset;call main_#t~mem70 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post71 := main_#t~mem70;call write~int(1 + main_#t~post71, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem70;havoc main_#t~post71;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem72.base, main_#t~mem72.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem73.base, main_#t~mem73.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 1098#L742-73 assume main_#t~mem73.base != 0 || main_#t~mem73.offset != 0;havoc main_#t~mem73.base, main_#t~mem73.offset;call main_#t~mem74.base, main_#t~mem74.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem74.base, 12 + main_#t~mem74.offset, 4);havoc main_#t~mem74.base, main_#t~mem74.offset; 997#L742-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem76 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem75 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short79 := main_#t~mem76 % 4294967296 >= 10 * (1 + main_#t~mem75) % 4294967296; 998#L742-76 assume main_#t~short79;call main_#t~mem77.base, main_#t~mem77.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem78 := read~int(main_#t~mem77.base, 36 + main_#t~mem77.offset, 4);main_#t~short79 := 0 == main_#t~mem78 % 4294967296; 1070#L742-78 assume !main_#t~short79;havoc main_#t~mem76;havoc main_#t~mem75;havoc main_#t~mem77.base, main_#t~mem77.offset;havoc main_#t~mem78;havoc main_#t~short79; 1090#L742-117 goto; 1003#L742-119 goto; 1004#L742-121 goto; 1061#L742-123 goto; 1073#L735-3 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 1054#L735-4 [2021-11-02 22:15:05,220 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:15:05,220 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2021-11-02 22:15:05,220 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:15:05,221 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1308913150] [2021-11-02 22:15:05,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:15:05,222 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:15:05,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:15:05,268 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:15:05,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:15:05,329 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:15:05,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:15:05,331 INFO L85 PathProgramCache]: Analyzing trace with hash -726571605, now seen corresponding path program 1 times [2021-11-02 22:15:05,331 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:15:05,331 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1393396942] [2021-11-02 22:15:05,332 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:15:05,332 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:15:05,344 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-02 22:15:05,345 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1647288616] [2021-11-02 22:15:05,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:15:05,345 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:15:05,345 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:15:05,351 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:15:05,391 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-11-02 22:15:05,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:15:05,596 INFO L263 TraceCheckSpWp]: Trace formula consists of 314 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-02 22:15:05,599 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:15:05,770 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:15:05,770 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:15:05,770 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1393396942] [2021-11-02 22:15:05,770 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-02 22:15:05,771 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1647288616] [2021-11-02 22:15:05,772 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1647288616] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-02 22:15:05,772 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-02 22:15:05,772 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-02 22:15:05,773 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [268505204] [2021-11-02 22:15:05,773 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-02 22:15:05,774 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-02 22:15:05,774 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-02 22:15:05,775 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-02 22:15:05,775 INFO L87 Difference]: Start difference. First operand 211 states and 272 transitions. cyclomatic complexity: 65 Second operand has 4 states, 4 states have (on average 13.0) internal successors, (52), 4 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-02 22:15:05,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-02 22:15:05,890 INFO L93 Difference]: Finished difference Result 301 states and 389 transitions. [2021-11-02 22:15:05,890 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-02 22:15:05,890 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 301 states and 389 transitions. [2021-11-02 22:15:05,894 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 284 [2021-11-02 22:15:05,898 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 301 states to 301 states and 389 transitions. [2021-11-02 22:15:05,898 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 301 [2021-11-02 22:15:05,898 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 301 [2021-11-02 22:15:05,899 INFO L73 IsDeterministic]: Start isDeterministic. Operand 301 states and 389 transitions. [2021-11-02 22:15:05,899 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-02 22:15:05,900 INFO L681 BuchiCegarLoop]: Abstraction has 301 states and 389 transitions. [2021-11-02 22:15:05,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 301 states and 389 transitions. [2021-11-02 22:15:05,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 301 to 197. [2021-11-02 22:15:05,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 197 states, 193 states have (on average 1.2694300518134716) internal successors, (245), 192 states have internal predecessors, (245), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-02 22:15:05,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 251 transitions. [2021-11-02 22:15:05,930 INFO L704 BuchiCegarLoop]: Abstraction has 197 states and 251 transitions. [2021-11-02 22:15:05,930 INFO L587 BuchiCegarLoop]: Abstraction has 197 states and 251 transitions. [2021-11-02 22:15:05,931 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-11-02 22:15:05,931 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 197 states and 251 transitions. [2021-11-02 22:15:05,933 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 189 [2021-11-02 22:15:05,933 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-02 22:15:05,933 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-02 22:15:05,935 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-02 22:15:05,937 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-02 22:15:05,937 INFO L791 eck$LassoCheckResult]: Stem: 1826#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 1726#L-1 havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem149, main_#t~mem148, main_#t~mem150, main_#t~mem151, main_#t~mem153, main_#t~mem152, main_#t~mem154, main_#t~mem155, main_#t~mem157, main_#t~mem156, main_#t~mem158, main_#t~mem159, main_#t~switch160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem172.base, main_#t~mem172.offset, main_#t~mem173, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181, main_#t~mem182, main_#t~mem183, main_#t~short184, main_#t~mem185.base, main_#t~mem185.offset, main_#t~ret186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem191.base, main_#t~mem191.offset, main_#t~mem192.base, main_#t~mem192.offset, main_#t~short193, main_#t~mem194.base, main_#t~mem194.offset, main_#t~mem195.base, main_#t~mem195.offset, main_#t~mem196.base, main_#t~mem196.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~mem199.base, main_#t~mem199.offset, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204.base, main_#t~mem204.offset, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208.base, main_#t~mem208.offset, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem216, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215, main_#t~mem217.base, main_#t~mem217.offset, main_#t~mem218.base, main_#t~mem218.offset, main_#t~mem219, main_#t~post220, main_#t~mem221.base, main_#t~mem221.offset, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225.base, main_#t~mem225.offset, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230, main_#t~post231, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem146, main_#t~mem147, main_#t~mem233, main_#t~mem234, main_#t~mem232.base, main_#t~mem232.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 1727#L735-4 [2021-11-02 22:15:05,938 INFO L793 eck$LassoCheckResult]: Loop: 1727#L735-4 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 1760#L735-1 assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 1690#L737 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 1691#L737-2 call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 1788#L742-124 havoc main_~_ha_hashv~0; 1789#L742-49 goto; 1739#L742-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 1740#L742-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 1777#L742-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch26 := 11 == main_~_hj_k~0; 1811#L742-10 assume !main_#t~switch26; 1774#L742-12 main_#t~switch26 := main_#t~switch26 || 10 == main_~_hj_k~0; 1753#L742-13 assume !main_#t~switch26; 1754#L742-15 main_#t~switch26 := main_#t~switch26 || 9 == main_~_hj_k~0; 1748#L742-16 assume !main_#t~switch26; 1702#L742-18 main_#t~switch26 := main_#t~switch26 || 8 == main_~_hj_k~0; 1703#L742-19 assume !main_#t~switch26; 1804#L742-21 main_#t~switch26 := main_#t~switch26 || 7 == main_~_hj_k~0; 1820#L742-22 assume !main_#t~switch26; 1729#L742-24 main_#t~switch26 := main_#t~switch26 || 6 == main_~_hj_k~0; 1730#L742-25 assume !main_#t~switch26; 1757#L742-27 main_#t~switch26 := main_#t~switch26 || 5 == main_~_hj_k~0; 1681#L742-28 assume !main_#t~switch26; 1642#L742-30 main_#t~switch26 := main_#t~switch26 || 4 == main_~_hj_k~0; 1643#L742-31 assume main_#t~switch26;call main_#t~mem34 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem34 % 256);havoc main_#t~mem34; 1749#L742-33 main_#t~switch26 := main_#t~switch26 || 3 == main_~_hj_k~0; 1636#L742-34 assume main_#t~switch26;call main_#t~mem35 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem35 % 256);havoc main_#t~mem35; 1637#L742-36 main_#t~switch26 := main_#t~switch26 || 2 == main_~_hj_k~0; 1827#L742-37 assume main_#t~switch26;call main_#t~mem36 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem36 % 256);havoc main_#t~mem36; 1828#L742-39 main_#t~switch26 := main_#t~switch26 || 1 == main_~_hj_k~0; 1829#L742-40 assume main_#t~switch26;call main_#t~mem37 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem37 % 256;havoc main_#t~mem37; 1795#L742-42 havoc main_#t~switch26; 1796#L742-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 1797#L742-44 goto; 1768#L742-46 goto; 1769#L742-48 goto; 1735#L742-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 1736#L742-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset; 1809#L742-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_#t~mem56.base, 16 + main_#t~mem56.offset, 4);call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 20 + main_#t~mem58.offset, 4);call write~$Pointer$(main_#t~mem57.base, main_#t~mem57.offset - main_#t~mem59, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57.base, main_#t~mem57.offset;havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem61.base, 8 + main_#t~mem61.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset;havoc main_#t~mem61.base, main_#t~mem61.offset;call main_#t~mem62.base, main_#t~mem62.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem62.base, 16 + main_#t~mem62.offset, 4);havoc main_#t~mem62.base, main_#t~mem62.offset; 1816#L742-66 goto; 1645#L742-120 havoc main_~_ha_bkt~0;call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64 := read~int(main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);main_#t~post65 := main_#t~mem64;call write~int(1 + main_#t~post65, main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64;havoc main_#t~post65; 1738#L742-71 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67 := read~int(main_#t~mem66.base, 4 + main_#t~mem66.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem67 - 1);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67; 1712#L742-70 goto; 1713#L742-118 call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_#t~mem68.base, main_#t~mem68.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem69.base, main_#t~mem69.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68.base, main_#t~mem68.offset;havoc main_#t~mem69.base, main_#t~mem69.offset;call main_#t~mem70 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post71 := main_#t~mem70;call write~int(1 + main_#t~post71, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem70;havoc main_#t~post71;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem72.base, main_#t~mem72.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem73.base, main_#t~mem73.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 1772#L742-73 assume main_#t~mem73.base != 0 || main_#t~mem73.offset != 0;havoc main_#t~mem73.base, main_#t~mem73.offset;call main_#t~mem74.base, main_#t~mem74.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem74.base, 12 + main_#t~mem74.offset, 4);havoc main_#t~mem74.base, main_#t~mem74.offset; 1671#L742-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem76 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem75 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short79 := main_#t~mem76 % 4294967296 >= 10 * (1 + main_#t~mem75) % 4294967296; 1672#L742-76 assume main_#t~short79;call main_#t~mem77.base, main_#t~mem77.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem78 := read~int(main_#t~mem77.base, 36 + main_#t~mem77.offset, 4);main_#t~short79 := 0 == main_#t~mem78 % 4294967296; 1743#L742-78 assume !main_#t~short79;havoc main_#t~mem76;havoc main_#t~mem75;havoc main_#t~mem77.base, main_#t~mem77.offset;havoc main_#t~mem78;havoc main_#t~short79; 1762#L742-117 goto; 1677#L742-119 goto; 1678#L742-121 goto; 1734#L742-123 goto; 1747#L735-3 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 1727#L735-4 [2021-11-02 22:15:05,938 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:15:05,938 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2021-11-02 22:15:05,939 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:15:05,939 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [243159933] [2021-11-02 22:15:05,943 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:15:05,944 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:15:05,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:15:05,985 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:15:06,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:15:06,023 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:15:06,024 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:15:06,024 INFO L85 PathProgramCache]: Analyzing trace with hash 1694021305, now seen corresponding path program 1 times [2021-11-02 22:15:06,025 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:15:06,031 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [615200305] [2021-11-02 22:15:06,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:15:06,032 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:15:06,053 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-02 22:15:06,054 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1747360981] [2021-11-02 22:15:06,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:15:06,054 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:15:06,054 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:15:06,069 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:15:06,093 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-11-02 22:17:04,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:17:04,696 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-02 22:18:26,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-02 22:18:27,122 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-02 22:18:27,123 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-02 22:18:27,123 INFO L85 PathProgramCache]: Analyzing trace with hash -40931685, now seen corresponding path program 1 times [2021-11-02 22:18:27,123 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-02 22:18:27,123 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1584540770] [2021-11-02 22:18:27,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:18:27,124 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-02 22:18:27,145 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-02 22:18:27,146 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1318008771] [2021-11-02 22:18:27,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-02 22:18:27,146 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-02 22:18:27,146 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/z3 [2021-11-02 22:18:27,155 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-02 22:18:27,161 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2f2c58b1-14bd-4030-838a-9dc886f5c4f9/bin/uautomizer-tBqnrhUYjU/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-11-02 22:18:27,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-02 22:18:27,419 INFO L263 TraceCheckSpWp]: Trace formula consists of 316 conjuncts, 5 conjunts are in the unsatisfiable core [2021-11-02 22:18:27,426 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-02 22:18:27,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-02 22:18:27,820 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-02 22:18:27,820 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1584540770] [2021-11-02 22:18:27,820 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-02 22:18:27,820 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1318008771] [2021-11-02 22:18:27,821 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1318008771] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-02 22:18:27,821 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-02 22:18:27,821 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-02 22:18:27,821 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [882173274]