./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-memory-alloca/java_Nested-alloca.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 47ea0209 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-memory-alloca/java_Nested-alloca.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash e23f623e36810418f8259db464ff0229ef2650c877ad54b7024836b278c00de1 --- Real Ultimate output --- This is Ultimate 0.2.1-dev-47ea020 [2021-11-07 08:34:31,989 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-07 08:34:31,993 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-07 08:34:32,053 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-07 08:34:32,054 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-07 08:34:32,059 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-07 08:34:32,061 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-07 08:34:32,065 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-07 08:34:32,068 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-07 08:34:32,073 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-07 08:34:32,075 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-07 08:34:32,077 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-07 08:34:32,077 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-07 08:34:32,080 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-07 08:34:32,083 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-07 08:34:32,088 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-07 08:34:32,091 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-07 08:34:32,092 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-07 08:34:32,095 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-07 08:34:32,103 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-07 08:34:32,105 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-07 08:34:32,107 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-07 08:34:32,110 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-07 08:34:32,111 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-07 08:34:32,121 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-07 08:34:32,122 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-07 08:34:32,122 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-07 08:34:32,125 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-07 08:34:32,125 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-07 08:34:32,127 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-07 08:34:32,127 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-07 08:34:32,129 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-07 08:34:32,131 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-07 08:34:32,132 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-07 08:34:32,134 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-07 08:34:32,134 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-07 08:34:32,135 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-07 08:34:32,136 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-07 08:34:32,136 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-07 08:34:32,137 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-07 08:34:32,138 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-07 08:34:32,139 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/config/svcomp-Termination-64bit-Automizer_Default.epf [2021-11-07 08:34:32,189 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-07 08:34:32,189 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-07 08:34:32,190 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-07 08:34:32,190 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-07 08:34:32,192 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-07 08:34:32,192 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-07 08:34:32,193 INFO L138 SettingsManager]: * Use SBE=true [2021-11-07 08:34:32,193 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-11-07 08:34:32,193 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-11-07 08:34:32,193 INFO L138 SettingsManager]: * Use old map elimination=false [2021-11-07 08:34:32,194 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-11-07 08:34:32,194 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-11-07 08:34:32,195 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-11-07 08:34:32,195 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-07 08:34:32,195 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-11-07 08:34:32,195 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-07 08:34:32,195 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-07 08:34:32,196 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-11-07 08:34:32,196 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-11-07 08:34:32,196 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-11-07 08:34:32,196 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-07 08:34:32,196 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-11-07 08:34:32,197 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-07 08:34:32,197 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-11-07 08:34:32,197 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-07 08:34:32,197 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-07 08:34:32,199 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-07 08:34:32,199 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-07 08:34:32,199 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-07 08:34:32,202 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-11-07 08:34:32,202 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e23f623e36810418f8259db464ff0229ef2650c877ad54b7024836b278c00de1 [2021-11-07 08:34:32,525 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-07 08:34:32,556 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-07 08:34:32,559 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-07 08:34:32,560 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-07 08:34:32,561 INFO L275 PluginConnector]: CDTParser initialized [2021-11-07 08:34:32,562 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/../../sv-benchmarks/c/termination-memory-alloca/java_Nested-alloca.i [2021-11-07 08:34:32,643 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/data/116ea46db/7940e1b17c80490f8d40c7b1f0c87b11/FLAG697902b45 [2021-11-07 08:34:33,342 INFO L306 CDTParser]: Found 1 translation units. [2021-11-07 08:34:33,343 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/sv-benchmarks/c/termination-memory-alloca/java_Nested-alloca.i [2021-11-07 08:34:33,379 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/data/116ea46db/7940e1b17c80490f8d40c7b1f0c87b11/FLAG697902b45 [2021-11-07 08:34:33,569 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/data/116ea46db/7940e1b17c80490f8d40c7b1f0c87b11 [2021-11-07 08:34:33,572 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-07 08:34:33,575 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-07 08:34:33,579 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-07 08:34:33,580 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-07 08:34:33,583 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-07 08:34:33,584 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.11 08:34:33" (1/1) ... [2021-11-07 08:34:33,586 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@592f43f2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:34:33, skipping insertion in model container [2021-11-07 08:34:33,586 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.11 08:34:33" (1/1) ... [2021-11-07 08:34:33,594 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-07 08:34:33,663 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-07 08:34:34,040 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-07 08:34:34,049 INFO L203 MainTranslator]: Completed pre-run [2021-11-07 08:34:34,113 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-07 08:34:34,140 INFO L208 MainTranslator]: Completed translation [2021-11-07 08:34:34,141 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:34:34 WrapperNode [2021-11-07 08:34:34,141 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-07 08:34:34,142 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-07 08:34:34,142 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-07 08:34:34,143 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-07 08:34:34,150 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:34:34" (1/1) ... [2021-11-07 08:34:34,162 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:34:34" (1/1) ... [2021-11-07 08:34:34,196 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-07 08:34:34,197 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-07 08:34:34,197 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-07 08:34:34,197 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-07 08:34:34,205 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:34:34" (1/1) ... [2021-11-07 08:34:34,205 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:34:34" (1/1) ... [2021-11-07 08:34:34,209 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:34:34" (1/1) ... [2021-11-07 08:34:34,209 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:34:34" (1/1) ... [2021-11-07 08:34:34,218 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:34:34" (1/1) ... [2021-11-07 08:34:34,222 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:34:34" (1/1) ... [2021-11-07 08:34:34,224 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:34:34" (1/1) ... [2021-11-07 08:34:34,227 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-07 08:34:34,228 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-07 08:34:34,228 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-07 08:34:34,228 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-07 08:34:34,229 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:34:34" (1/1) ... [2021-11-07 08:34:34,238 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-07 08:34:34,255 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:34:34,278 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-07 08:34:34,293 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-11-07 08:34:34,331 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-11-07 08:34:34,332 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-07 08:34:34,332 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-07 08:34:34,332 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-07 08:34:34,335 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-07 08:34:34,335 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-07 08:34:34,577 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-07 08:34:34,577 INFO L299 CfgBuilder]: Removed 6 assume(true) statements. [2021-11-07 08:34:34,579 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.11 08:34:34 BoogieIcfgContainer [2021-11-07 08:34:34,579 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-07 08:34:34,580 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-11-07 08:34:34,580 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-11-07 08:34:34,583 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-11-07 08:34:34,584 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 08:34:34,584 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 07.11 08:34:33" (1/3) ... [2021-11-07 08:34:34,585 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@307ac023 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 07.11 08:34:34, skipping insertion in model container [2021-11-07 08:34:34,586 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 08:34:34,586 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:34:34" (2/3) ... [2021-11-07 08:34:34,586 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@307ac023 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 07.11 08:34:34, skipping insertion in model container [2021-11-07 08:34:34,586 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 08:34:34,586 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.11 08:34:34" (3/3) ... [2021-11-07 08:34:34,588 INFO L389 chiAutomizerObserver]: Analyzing ICFG java_Nested-alloca.i [2021-11-07 08:34:34,664 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-11-07 08:34:34,670 INFO L360 BuchiCegarLoop]: Hoare is false [2021-11-07 08:34:34,670 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-11-07 08:34:34,671 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-11-07 08:34:34,671 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-11-07 08:34:34,671 INFO L364 BuchiCegarLoop]: Difference is false [2021-11-07 08:34:34,671 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-11-07 08:34:34,680 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-11-07 08:34:34,718 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 12 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:34:34,755 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 6 [2021-11-07 08:34:34,755 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:34:34,755 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:34:34,761 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:34:34,762 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-11-07 08:34:34,762 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-11-07 08:34:34,762 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 12 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:34:34,765 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 6 [2021-11-07 08:34:34,766 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:34:34,766 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:34:34,766 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:34:34,766 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2021-11-07 08:34:34,773 INFO L791 eck$LassoCheckResult]: Stem: 4#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 10#L-1true havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 6#L552-4true [2021-11-07 08:34:34,775 INFO L793 eck$LassoCheckResult]: Loop: 6#L552-4true call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 13#L552-1true assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 12#L553-4true assume !true; 5#L552-3true call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 6#L552-4true [2021-11-07 08:34:34,786 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:34:34,786 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2021-11-07 08:34:34,797 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:34:34,798 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1921365015] [2021-11-07 08:34:34,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:34:34,799 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:34:34,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:34:34,963 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:34:35,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:34:35,031 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:34:35,043 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:34:35,044 INFO L85 PathProgramCache]: Analyzing trace with hash 1113608, now seen corresponding path program 1 times [2021-11-07 08:34:35,044 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:34:35,044 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1496535459] [2021-11-07 08:34:35,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:34:35,045 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:34:35,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:34:35,132 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:34:35,133 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:34:35,134 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1496535459] [2021-11-07 08:34:35,134 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1496535459] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 08:34:35,135 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 08:34:35,135 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-07 08:34:35,135 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1333783074] [2021-11-07 08:34:35,141 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:34:35,142 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:34:35,167 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-11-07 08:34:35,168 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-11-07 08:34:35,171 INFO L87 Difference]: Start difference. First operand has 12 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 11 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 2.0) internal successors, (4), 2 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:34:35,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:34:35,177 INFO L93 Difference]: Finished difference Result 12 states and 13 transitions. [2021-11-07 08:34:35,177 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-11-07 08:34:35,179 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 12 states and 13 transitions. [2021-11-07 08:34:35,181 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 6 [2021-11-07 08:34:35,184 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 12 states to 8 states and 9 transitions. [2021-11-07 08:34:35,185 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2021-11-07 08:34:35,185 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2021-11-07 08:34:35,186 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8 states and 9 transitions. [2021-11-07 08:34:35,187 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:34:35,187 INFO L681 BuchiCegarLoop]: Abstraction has 8 states and 9 transitions. [2021-11-07 08:34:35,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8 states and 9 transitions. [2021-11-07 08:34:35,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8 to 8. [2021-11-07 08:34:35,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 1.125) internal successors, (9), 7 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:34:35,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 9 transitions. [2021-11-07 08:34:35,215 INFO L704 BuchiCegarLoop]: Abstraction has 8 states and 9 transitions. [2021-11-07 08:34:35,215 INFO L587 BuchiCegarLoop]: Abstraction has 8 states and 9 transitions. [2021-11-07 08:34:35,215 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-11-07 08:34:35,215 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8 states and 9 transitions. [2021-11-07 08:34:35,216 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 6 [2021-11-07 08:34:35,216 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:34:35,217 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:34:35,217 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:34:35,217 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2021-11-07 08:34:35,217 INFO L791 eck$LassoCheckResult]: Stem: 32#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 33#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 35#L552-4 [2021-11-07 08:34:35,218 INFO L793 eck$LassoCheckResult]: Loop: 35#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 36#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 38#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 39#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 34#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 35#L552-4 [2021-11-07 08:34:35,218 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:34:35,218 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times [2021-11-07 08:34:35,218 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:34:35,219 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [407997816] [2021-11-07 08:34:35,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:34:35,219 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:34:35,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:34:35,260 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:34:35,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:34:35,280 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:34:35,281 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:34:35,281 INFO L85 PathProgramCache]: Analyzing trace with hash 34512977, now seen corresponding path program 1 times [2021-11-07 08:34:35,281 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:34:35,282 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1892453290] [2021-11-07 08:34:35,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:34:35,282 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:34:35,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:34:35,342 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:34:35,342 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:34:35,342 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1892453290] [2021-11-07 08:34:35,343 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1892453290] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 08:34:35,343 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 08:34:35,343 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-07 08:34:35,343 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1566873694] [2021-11-07 08:34:35,344 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:34:35,344 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:34:35,345 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-07 08:34:35,345 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-07 08:34:35,345 INFO L87 Difference]: Start difference. First operand 8 states and 9 transitions. cyclomatic complexity: 2 Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:34:35,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:34:35,402 INFO L93 Difference]: Finished difference Result 10 states and 11 transitions. [2021-11-07 08:34:35,403 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-07 08:34:35,403 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10 states and 11 transitions. [2021-11-07 08:34:35,404 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 8 [2021-11-07 08:34:35,404 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10 states to 10 states and 11 transitions. [2021-11-07 08:34:35,405 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2021-11-07 08:34:35,405 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2021-11-07 08:34:35,405 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 11 transitions. [2021-11-07 08:34:35,405 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:34:35,405 INFO L681 BuchiCegarLoop]: Abstraction has 10 states and 11 transitions. [2021-11-07 08:34:35,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 11 transitions. [2021-11-07 08:34:35,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2021-11-07 08:34:35,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.1) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:34:35,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 11 transitions. [2021-11-07 08:34:35,408 INFO L704 BuchiCegarLoop]: Abstraction has 10 states and 11 transitions. [2021-11-07 08:34:35,408 INFO L587 BuchiCegarLoop]: Abstraction has 10 states and 11 transitions. [2021-11-07 08:34:35,408 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-11-07 08:34:35,408 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 11 transitions. [2021-11-07 08:34:35,409 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 8 [2021-11-07 08:34:35,409 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:34:35,409 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:34:35,410 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:34:35,410 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1, 1, 1, 1, 1] [2021-11-07 08:34:35,410 INFO L791 eck$LassoCheckResult]: Stem: 61#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 62#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 60#L552-4 [2021-11-07 08:34:35,411 INFO L793 eck$LassoCheckResult]: Loop: 60#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 63#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 67#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 66#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 64#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 65#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 68#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 59#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 60#L552-4 [2021-11-07 08:34:35,411 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:34:35,411 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 3 times [2021-11-07 08:34:35,412 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:34:35,412 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1261032019] [2021-11-07 08:34:35,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:34:35,412 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:34:35,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:34:35,427 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:34:35,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:34:35,446 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:34:35,446 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:34:35,447 INFO L85 PathProgramCache]: Analyzing trace with hash 1680656940, now seen corresponding path program 1 times [2021-11-07 08:34:35,447 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:34:35,447 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1150372020] [2021-11-07 08:34:35,447 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:34:35,448 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:34:35,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:34:35,568 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:34:35,569 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:34:35,569 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1150372020] [2021-11-07 08:34:35,569 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1150372020] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-07 08:34:35,570 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1033604577] [2021-11-07 08:34:35,570 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:34:35,570 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:34:35,571 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:34:35,588 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:34:35,596 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-11-07 08:34:35,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:34:35,644 INFO L263 TraceCheckSpWp]: Trace formula consists of 47 conjuncts, 5 conjunts are in the unsatisfiable core [2021-11-07 08:34:35,646 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 08:34:35,694 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-11-07 08:34:35,799 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:34:35,800 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 90 [2021-11-07 08:34:35,987 INFO L173 IndexEqualityManager]: detected equality via solver [2021-11-07 08:34:35,988 INFO L173 IndexEqualityManager]: detected equality via solver [2021-11-07 08:34:35,990 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-11-07 08:34:36,098 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-07 08:34:36,099 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 22 [2021-11-07 08:34:36,138 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-07 08:34:36,140 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 22 [2021-11-07 08:34:36,187 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 17 [2021-11-07 08:34:36,214 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2021-11-07 08:34:36,232 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:34:36,232 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1033604577] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-07 08:34:36,232 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-07 08:34:36,233 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6] total 10 [2021-11-07 08:34:36,233 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1649500900] [2021-11-07 08:34:36,233 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:34:36,234 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:34:36,234 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2021-11-07 08:34:36,235 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=58, Unknown=0, NotChecked=0, Total=90 [2021-11-07 08:34:36,235 INFO L87 Difference]: Start difference. First operand 10 states and 11 transitions. cyclomatic complexity: 2 Second operand has 10 states, 10 states have (on average 1.3) internal successors, (13), 10 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:34:36,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:34:36,354 INFO L93 Difference]: Finished difference Result 17 states and 18 transitions. [2021-11-07 08:34:36,354 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2021-11-07 08:34:36,354 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 17 states and 18 transitions. [2021-11-07 08:34:36,355 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 15 [2021-11-07 08:34:36,356 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 17 states to 17 states and 18 transitions. [2021-11-07 08:34:36,357 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 17 [2021-11-07 08:34:36,357 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2021-11-07 08:34:36,357 INFO L73 IsDeterministic]: Start isDeterministic. Operand 17 states and 18 transitions. [2021-11-07 08:34:36,357 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:34:36,358 INFO L681 BuchiCegarLoop]: Abstraction has 17 states and 18 transitions. [2021-11-07 08:34:36,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states and 18 transitions. [2021-11-07 08:34:36,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 16. [2021-11-07 08:34:36,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.0625) internal successors, (17), 15 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:34:36,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2021-11-07 08:34:36,360 INFO L704 BuchiCegarLoop]: Abstraction has 16 states and 17 transitions. [2021-11-07 08:34:36,360 INFO L587 BuchiCegarLoop]: Abstraction has 16 states and 17 transitions. [2021-11-07 08:34:36,360 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-11-07 08:34:36,361 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 17 transitions. [2021-11-07 08:34:36,361 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 14 [2021-11-07 08:34:36,362 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:34:36,362 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:34:36,362 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:34:36,363 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [4, 3, 3, 1, 1, 1, 1] [2021-11-07 08:34:36,363 INFO L791 eck$LassoCheckResult]: Stem: 124#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 125#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 127#L552-4 [2021-11-07 08:34:36,363 INFO L793 eck$LassoCheckResult]: Loop: 127#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 128#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 133#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 139#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 129#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 130#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 131#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 132#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 138#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 137#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 135#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 136#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 134#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 126#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 127#L552-4 [2021-11-07 08:34:36,364 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:34:36,364 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 4 times [2021-11-07 08:34:36,364 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:34:36,364 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [890258239] [2021-11-07 08:34:36,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:34:36,365 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:34:36,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:34:36,378 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:34:36,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:34:36,393 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:34:36,393 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:34:36,394 INFO L85 PathProgramCache]: Analyzing trace with hash 1818601484, now seen corresponding path program 2 times [2021-11-07 08:34:36,394 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:34:36,394 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [725326461] [2021-11-07 08:34:36,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:34:36,395 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:34:36,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:34:36,913 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:34:36,918 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:34:36,919 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [725326461] [2021-11-07 08:34:36,920 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [725326461] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-07 08:34:36,921 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [389062807] [2021-11-07 08:34:36,922 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2021-11-07 08:34:36,923 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:34:36,924 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:34:36,929 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:34:36,936 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-11-07 08:34:37,013 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2021-11-07 08:34:37,013 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-07 08:34:37,029 INFO L263 TraceCheckSpWp]: Trace formula consists of 89 conjuncts, 9 conjunts are in the unsatisfiable core [2021-11-07 08:34:37,031 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 08:34:37,040 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-11-07 08:34:37,120 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:34:37,121 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 90 [2021-11-07 08:34:37,190 INFO L173 IndexEqualityManager]: detected equality via solver [2021-11-07 08:34:37,191 INFO L173 IndexEqualityManager]: detected equality via solver [2021-11-07 08:34:37,193 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-11-07 08:34:37,272 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-07 08:34:37,273 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-11-07 08:34:37,419 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-11-07 08:34:37,420 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-11-07 08:34:37,621 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:34:37,622 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-11-07 08:34:37,723 INFO L173 IndexEqualityManager]: detected equality via solver [2021-11-07 08:34:37,725 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 19 [2021-11-07 08:34:37,760 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-11-07 08:34:37,885 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 26 [2021-11-07 08:34:37,901 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-11-07 08:34:37,902 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 26 [2021-11-07 08:34:38,023 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-11-07 08:34:38,024 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-11-07 08:34:38,184 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:34:38,185 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-11-07 08:34:38,241 INFO L173 IndexEqualityManager]: detected equality via solver [2021-11-07 08:34:38,243 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-11-07 08:34:38,345 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2021-11-07 08:34:38,357 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-11-07 08:34:38,357 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-11-07 08:34:38,412 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 17 [2021-11-07 08:34:38,442 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2021-11-07 08:34:38,452 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:34:38,453 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [389062807] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-07 08:34:38,453 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-07 08:34:38,453 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10] total 18 [2021-11-07 08:34:38,454 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [204271807] [2021-11-07 08:34:38,454 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:34:38,454 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:34:38,455 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2021-11-07 08:34:38,456 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=220, Unknown=0, NotChecked=0, Total=306 [2021-11-07 08:34:38,456 INFO L87 Difference]: Start difference. First operand 16 states and 17 transitions. cyclomatic complexity: 2 Second operand has 18 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 18 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:34:38,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:34:38,798 INFO L93 Difference]: Finished difference Result 20 states and 21 transitions. [2021-11-07 08:34:38,799 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2021-11-07 08:34:38,799 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 20 states and 21 transitions. [2021-11-07 08:34:38,800 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 18 [2021-11-07 08:34:38,801 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 20 states to 20 states and 21 transitions. [2021-11-07 08:34:38,801 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2021-11-07 08:34:38,801 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2021-11-07 08:34:38,801 INFO L73 IsDeterministic]: Start isDeterministic. Operand 20 states and 21 transitions. [2021-11-07 08:34:38,802 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:34:38,802 INFO L681 BuchiCegarLoop]: Abstraction has 20 states and 21 transitions. [2021-11-07 08:34:38,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states and 21 transitions. [2021-11-07 08:34:38,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 19. [2021-11-07 08:34:38,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.0526315789473684) internal successors, (20), 18 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:34:38,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 20 transitions. [2021-11-07 08:34:38,804 INFO L704 BuchiCegarLoop]: Abstraction has 19 states and 20 transitions. [2021-11-07 08:34:38,804 INFO L587 BuchiCegarLoop]: Abstraction has 19 states and 20 transitions. [2021-11-07 08:34:38,805 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-11-07 08:34:38,805 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 20 transitions. [2021-11-07 08:34:38,805 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 17 [2021-11-07 08:34:38,806 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:34:38,806 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:34:38,807 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:34:38,807 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [5, 4, 4, 1, 1, 1, 1] [2021-11-07 08:34:38,807 INFO L791 eck$LassoCheckResult]: Stem: 230#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 231#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 229#L552-4 [2021-11-07 08:34:38,807 INFO L793 eck$LassoCheckResult]: Loop: 229#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 232#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 237#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 246#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 233#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 234#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 235#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 236#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 245#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 244#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 243#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 242#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 241#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 239#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 240#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 238#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 228#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 229#L552-4 [2021-11-07 08:34:38,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:34:38,808 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 5 times [2021-11-07 08:34:38,808 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:34:38,809 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1680594697] [2021-11-07 08:34:38,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:34:38,809 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:34:38,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:34:38,840 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:34:38,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:34:38,875 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:34:38,876 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:34:38,876 INFO L85 PathProgramCache]: Analyzing trace with hash 1241080977, now seen corresponding path program 3 times [2021-11-07 08:34:38,876 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:34:38,876 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [586900106] [2021-11-07 08:34:38,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:34:38,877 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:34:38,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:34:39,512 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:34:39,513 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:34:39,513 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [586900106] [2021-11-07 08:34:39,513 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [586900106] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-07 08:34:39,514 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [327640127] [2021-11-07 08:34:39,514 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2021-11-07 08:34:39,514 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:34:39,514 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:34:39,541 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:34:39,558 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-11-07 08:34:39,667 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2021-11-07 08:34:39,668 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-07 08:34:39,669 INFO L263 TraceCheckSpWp]: Trace formula consists of 110 conjuncts, 11 conjunts are in the unsatisfiable core [2021-11-07 08:34:39,671 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 08:34:39,684 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-11-07 08:34:39,762 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:34:39,762 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 90 [2021-11-07 08:34:39,801 INFO L173 IndexEqualityManager]: detected equality via solver [2021-11-07 08:34:39,802 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-11-07 08:34:39,850 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-07 08:34:39,850 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 26 [2021-11-07 08:34:39,958 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-11-07 08:34:39,967 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-11-07 08:34:40,120 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:34:40,121 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-11-07 08:34:40,164 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-11-07 08:34:40,295 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2021-11-07 08:34:40,323 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-11-07 08:34:40,323 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-11-07 08:34:40,480 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-11-07 08:34:40,481 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-11-07 08:34:40,637 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:34:40,638 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-11-07 08:34:40,675 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-11-07 08:34:40,755 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-07 08:34:40,762 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 47 [2021-11-07 08:34:40,890 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-11-07 08:34:40,891 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-11-07 08:34:41,066 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:34:41,066 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-11-07 08:34:41,097 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-11-07 08:34:41,318 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-11-07 08:34:41,319 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-11-07 08:34:41,331 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2021-11-07 08:34:41,401 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 17 [2021-11-07 08:34:41,433 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2021-11-07 08:34:41,447 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:34:41,447 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [327640127] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-07 08:34:41,448 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-07 08:34:41,448 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 12] total 23 [2021-11-07 08:34:41,448 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1466384500] [2021-11-07 08:34:41,449 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:34:41,449 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:34:41,449 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2021-11-07 08:34:41,450 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=135, Invalid=371, Unknown=0, NotChecked=0, Total=506 [2021-11-07 08:34:41,450 INFO L87 Difference]: Start difference. First operand 19 states and 20 transitions. cyclomatic complexity: 2 Second operand has 23 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 23 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:34:41,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:34:41,829 INFO L93 Difference]: Finished difference Result 23 states and 24 transitions. [2021-11-07 08:34:41,830 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2021-11-07 08:34:41,830 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 23 states and 24 transitions. [2021-11-07 08:34:41,831 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 21 [2021-11-07 08:34:41,832 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 23 states to 23 states and 24 transitions. [2021-11-07 08:34:41,832 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 23 [2021-11-07 08:34:41,832 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 23 [2021-11-07 08:34:41,832 INFO L73 IsDeterministic]: Start isDeterministic. Operand 23 states and 24 transitions. [2021-11-07 08:34:41,833 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:34:41,833 INFO L681 BuchiCegarLoop]: Abstraction has 23 states and 24 transitions. [2021-11-07 08:34:41,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states and 24 transitions. [2021-11-07 08:34:41,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 22. [2021-11-07 08:34:41,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.0454545454545454) internal successors, (23), 21 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:34:41,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 23 transitions. [2021-11-07 08:34:41,836 INFO L704 BuchiCegarLoop]: Abstraction has 22 states and 23 transitions. [2021-11-07 08:34:41,836 INFO L587 BuchiCegarLoop]: Abstraction has 22 states and 23 transitions. [2021-11-07 08:34:41,836 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-11-07 08:34:41,837 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 23 transitions. [2021-11-07 08:34:41,837 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 20 [2021-11-07 08:34:41,838 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:34:41,838 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:34:41,838 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:34:41,839 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [6, 5, 5, 1, 1, 1, 1] [2021-11-07 08:34:41,839 INFO L791 eck$LassoCheckResult]: Stem: 356#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 357#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 355#L552-4 [2021-11-07 08:34:41,839 INFO L793 eck$LassoCheckResult]: Loop: 355#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 358#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 363#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 375#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 359#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 360#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 361#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 362#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 374#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 373#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 372#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 371#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 370#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 369#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 368#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 367#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 365#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 366#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 364#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 354#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 355#L552-4 [2021-11-07 08:34:41,839 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:34:41,840 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 6 times [2021-11-07 08:34:41,840 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:34:41,840 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1841112829] [2021-11-07 08:34:41,840 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:34:41,841 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:34:41,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:34:41,866 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:34:41,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:34:41,895 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:34:41,895 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:34:41,895 INFO L85 PathProgramCache]: Analyzing trace with hash 1966644716, now seen corresponding path program 4 times [2021-11-07 08:34:41,896 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:34:41,896 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1813010239] [2021-11-07 08:34:41,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:34:41,896 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:34:41,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:34:41,932 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:34:41,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:34:42,001 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:34:42,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:34:42,006 INFO L85 PathProgramCache]: Analyzing trace with hash -872207186, now seen corresponding path program 1 times [2021-11-07 08:34:42,006 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:34:42,007 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [884123036] [2021-11-07 08:34:42,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:34:42,008 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:34:42,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:34:42,292 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:34:42,292 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:34:42,292 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [884123036] [2021-11-07 08:34:42,292 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [884123036] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-07 08:34:42,292 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1349475849] [2021-11-07 08:34:42,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:34:42,292 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:34:42,293 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:34:42,301 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:34:42,320 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-11-07 08:34:42,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:34:42,419 INFO L263 TraceCheckSpWp]: Trace formula consists of 178 conjuncts, 21 conjunts are in the unsatisfiable core [2021-11-07 08:34:42,421 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 08:34:42,431 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2021-11-07 08:34:42,444 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-11-07 08:34:42,462 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-07 08:34:42,465 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 22 [2021-11-07 08:34:42,489 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-11-07 08:34:42,542 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-07 08:34:42,545 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 22 [2021-11-07 08:34:42,558 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-11-07 08:34:42,592 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-07 08:34:42,595 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 22 [2021-11-07 08:34:42,607 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-11-07 08:34:42,641 INFO L190 IndexEqualityManager]: detected not equals via solver [2021-11-07 08:34:42,644 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 22 [2021-11-07 08:34:42,656 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-11-07 08:34:42,716 INFO L354 Elim1Store]: treesize reduction 62, result has 23.5 percent of original size [2021-11-07 08:34:42,717 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 118 treesize of output 66 [2021-11-07 08:34:42,744 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2021-11-07 08:34:42,763 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-11-07 08:34:42,780 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-11-07 08:34:42,785 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 40 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:34:42,786 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1349475849] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-07 08:34:42,786 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-07 08:34:42,786 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 12] total 24 [2021-11-07 08:34:42,790 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2051571288] [2021-11-07 08:34:54,436 WARN L207 SmtUtils]: Spent 11.64 s on a formula simplification. DAG size of input: 169 DAG size of output: 158 [2021-11-07 08:34:56,295 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:34:56,296 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2021-11-07 08:34:56,296 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=397, Unknown=0, NotChecked=0, Total=552 [2021-11-07 08:34:56,297 INFO L87 Difference]: Start difference. First operand 22 states and 23 transitions. cyclomatic complexity: 2 Second operand has 24 states, 24 states have (on average 1.5833333333333333) internal successors, (38), 24 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:34:56,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:34:56,527 INFO L93 Difference]: Finished difference Result 26 states and 27 transitions. [2021-11-07 08:34:56,527 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2021-11-07 08:34:56,527 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 26 states and 27 transitions. [2021-11-07 08:34:56,528 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 24 [2021-11-07 08:34:56,529 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 26 states to 26 states and 27 transitions. [2021-11-07 08:34:56,529 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 26 [2021-11-07 08:34:56,529 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 26 [2021-11-07 08:34:56,530 INFO L73 IsDeterministic]: Start isDeterministic. Operand 26 states and 27 transitions. [2021-11-07 08:34:56,530 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:34:56,530 INFO L681 BuchiCegarLoop]: Abstraction has 26 states and 27 transitions. [2021-11-07 08:34:56,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states and 27 transitions. [2021-11-07 08:34:56,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 25. [2021-11-07 08:34:56,532 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.04) internal successors, (26), 24 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:34:56,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 26 transitions. [2021-11-07 08:34:56,533 INFO L704 BuchiCegarLoop]: Abstraction has 25 states and 26 transitions. [2021-11-07 08:34:56,533 INFO L587 BuchiCegarLoop]: Abstraction has 25 states and 26 transitions. [2021-11-07 08:34:56,533 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-11-07 08:34:56,533 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 25 states and 26 transitions. [2021-11-07 08:34:56,534 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 23 [2021-11-07 08:34:56,534 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:34:56,534 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:34:56,535 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:34:56,535 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [7, 6, 6, 1, 1, 1, 1] [2021-11-07 08:34:56,535 INFO L791 eck$LassoCheckResult]: Stem: 506#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 507#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 509#L552-4 [2021-11-07 08:34:56,536 INFO L793 eck$LassoCheckResult]: Loop: 509#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 510#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 515#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 530#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 511#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 512#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 513#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 514#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 529#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 528#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 527#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 526#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 525#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 524#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 523#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 522#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 521#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 520#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 519#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 517#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 518#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 516#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 508#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 509#L552-4 [2021-11-07 08:34:56,536 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:34:56,536 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 7 times [2021-11-07 08:34:56,536 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:34:56,536 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1721283248] [2021-11-07 08:34:56,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:34:56,537 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:34:56,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:34:56,545 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:34:56,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:34:56,553 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:34:56,554 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:34:56,554 INFO L85 PathProgramCache]: Analyzing trace with hash 665592497, now seen corresponding path program 5 times [2021-11-07 08:34:56,554 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:34:56,554 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2026917124] [2021-11-07 08:34:56,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:34:56,555 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:34:56,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:34:57,430 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:34:57,430 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:34:57,430 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2026917124] [2021-11-07 08:34:57,430 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2026917124] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-07 08:34:57,430 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1381889975] [2021-11-07 08:34:57,431 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2021-11-07 08:34:57,431 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:34:57,431 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:34:57,439 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:34:57,440 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-11-07 08:34:57,678 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2021-11-07 08:34:57,679 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-07 08:34:57,680 INFO L263 TraceCheckSpWp]: Trace formula consists of 152 conjuncts, 17 conjunts are in the unsatisfiable core [2021-11-07 08:34:57,682 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 08:34:57,689 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-11-07 08:34:57,736 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:34:57,736 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 90 [2021-11-07 08:34:57,785 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-07 08:34:57,786 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 17 [2021-11-07 08:34:57,894 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2021-11-07 08:34:57,917 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2021-11-07 08:34:58,065 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-11-07 08:34:58,065 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-11-07 08:34:58,222 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:34:58,223 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-11-07 08:34:58,256 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-11-07 08:34:58,327 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-07 08:34:58,328 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 47 [2021-11-07 08:34:58,448 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-11-07 08:34:58,449 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-11-07 08:34:58,612 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:34:58,612 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-11-07 08:34:58,663 INFO L173 IndexEqualityManager]: detected equality via solver [2021-11-07 08:34:58,663 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-11-07 08:34:58,764 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 47 [2021-11-07 08:34:58,813 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-11-07 08:34:58,813 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 47 [2021-11-07 08:34:58,955 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-11-07 08:34:58,955 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-11-07 08:34:59,118 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:34:59,118 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-11-07 08:34:59,143 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-11-07 08:34:59,258 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 47 [2021-11-07 08:34:59,293 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-11-07 08:34:59,294 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 47 [2021-11-07 08:34:59,475 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-11-07 08:34:59,475 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-11-07 08:34:59,650 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:34:59,650 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-11-07 08:34:59,667 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-11-07 08:34:59,791 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-11-07 08:34:59,791 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 59 treesize of output 39 [2021-11-07 08:34:59,813 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 39 [2021-11-07 08:34:59,955 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-11-07 08:34:59,955 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-11-07 08:35:00,139 INFO L354 Elim1Store]: treesize reduction 62, result has 23.5 percent of original size [2021-11-07 08:35:00,139 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 123 treesize of output 71 [2021-11-07 08:35:00,157 WARN L234 Elim1Store]: Array PQE input equivalent to false [2021-11-07 08:35:00,168 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-07 08:35:00,169 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-11-07 08:35:00,202 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-11-07 08:35:00,240 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-11-07 08:35:00,244 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:35:00,245 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1381889975] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-07 08:35:00,245 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-07 08:35:00,245 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 17] total 34 [2021-11-07 08:35:00,245 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2029261758] [2021-11-07 08:35:00,246 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:35:00,246 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:35:00,247 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2021-11-07 08:35:00,248 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=1005, Unknown=0, NotChecked=0, Total=1122 [2021-11-07 08:35:00,248 INFO L87 Difference]: Start difference. First operand 25 states and 26 transitions. cyclomatic complexity: 2 Second operand has 34 states, 34 states have (on average 1.2352941176470589) internal successors, (42), 34 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:35:00,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:35:00,940 INFO L93 Difference]: Finished difference Result 29 states and 30 transitions. [2021-11-07 08:35:00,940 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2021-11-07 08:35:00,940 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 29 states and 30 transitions. [2021-11-07 08:35:00,941 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 27 [2021-11-07 08:35:00,942 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 29 states to 29 states and 30 transitions. [2021-11-07 08:35:00,942 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 29 [2021-11-07 08:35:00,942 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 29 [2021-11-07 08:35:00,942 INFO L73 IsDeterministic]: Start isDeterministic. Operand 29 states and 30 transitions. [2021-11-07 08:35:00,942 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:35:00,942 INFO L681 BuchiCegarLoop]: Abstraction has 29 states and 30 transitions. [2021-11-07 08:35:00,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states and 30 transitions. [2021-11-07 08:35:00,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 28. [2021-11-07 08:35:00,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 27 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:35:00,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 29 transitions. [2021-11-07 08:35:00,945 INFO L704 BuchiCegarLoop]: Abstraction has 28 states and 29 transitions. [2021-11-07 08:35:00,945 INFO L587 BuchiCegarLoop]: Abstraction has 28 states and 29 transitions. [2021-11-07 08:35:00,945 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-11-07 08:35:00,945 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 29 transitions. [2021-11-07 08:35:00,946 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 26 [2021-11-07 08:35:00,946 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:35:00,946 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:35:00,946 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:35:00,946 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [8, 7, 7, 1, 1, 1, 1] [2021-11-07 08:35:00,947 INFO L791 eck$LassoCheckResult]: Stem: 679#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 680#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 678#L552-4 [2021-11-07 08:35:00,947 INFO L793 eck$LassoCheckResult]: Loop: 678#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 681#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 686#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 704#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 682#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 683#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 684#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 685#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 703#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 702#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 701#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 700#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 699#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 698#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 697#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 696#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 695#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 694#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 693#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 692#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 691#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 690#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 688#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 689#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 687#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 677#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 678#L552-4 [2021-11-07 08:35:00,952 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:35:00,952 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 8 times [2021-11-07 08:35:00,952 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:35:00,954 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1472141858] [2021-11-07 08:35:00,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:35:00,954 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:35:00,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:35:00,968 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:35:00,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:35:00,988 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:35:00,989 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:35:00,989 INFO L85 PathProgramCache]: Analyzing trace with hash -1196184628, now seen corresponding path program 6 times [2021-11-07 08:35:00,989 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:35:00,990 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [832798148] [2021-11-07 08:35:00,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:35:00,990 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:35:01,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:35:02,207 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:35:02,208 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:35:02,208 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [832798148] [2021-11-07 08:35:02,208 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [832798148] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-07 08:35:02,208 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1431828169] [2021-11-07 08:35:02,208 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2021-11-07 08:35:02,208 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:35:02,208 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:35:02,213 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:35:02,224 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2021-11-07 08:35:02,569 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2021-11-07 08:35:02,570 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2021-11-07 08:35:02,571 INFO L263 TraceCheckSpWp]: Trace formula consists of 173 conjuncts, 19 conjunts are in the unsatisfiable core [2021-11-07 08:35:02,573 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 08:35:02,579 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-11-07 08:35:02,648 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:35:02,648 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 90 [2021-11-07 08:35:02,665 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-11-07 08:35:02,708 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-07 08:35:02,709 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-11-07 08:35:02,741 WARN L234 Elim1Store]: Array PQE input equivalent to false [2021-11-07 08:35:02,860 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-11-07 08:35:02,860 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-11-07 08:35:03,026 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:35:03,027 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-11-07 08:35:03,049 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-11-07 08:35:03,123 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-07 08:35:03,124 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-11-07 08:35:03,150 WARN L234 Elim1Store]: Array PQE input equivalent to false [2021-11-07 08:35:03,262 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-11-07 08:35:03,262 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-11-07 08:35:03,400 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:35:03,401 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-11-07 08:35:03,453 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-11-07 08:35:03,577 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-11-07 08:35:03,577 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 26 [2021-11-07 08:35:03,585 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 26 [2021-11-07 08:35:03,698 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-11-07 08:35:03,699 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-11-07 08:35:03,834 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:35:03,835 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-11-07 08:35:03,858 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-11-07 08:35:03,902 WARN L234 Elim1Store]: Array PQE input equivalent to false [2021-11-07 08:35:03,947 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 47 [2021-11-07 08:35:03,961 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-11-07 08:35:03,961 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 47 [2021-11-07 08:35:04,086 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-11-07 08:35:04,086 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-11-07 08:35:04,229 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:35:04,229 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-11-07 08:35:04,295 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-11-07 08:35:04,426 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2021-11-07 08:35:04,443 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-11-07 08:35:04,444 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-11-07 08:35:04,562 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-11-07 08:35:04,562 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-11-07 08:35:04,698 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:35:04,698 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-11-07 08:35:04,726 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-11-07 08:35:04,864 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-11-07 08:35:04,865 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 47 [2021-11-07 08:35:04,892 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 47 [2021-11-07 08:35:05,026 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-11-07 08:35:05,027 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-11-07 08:35:05,200 INFO L354 Elim1Store]: treesize reduction 62, result has 23.5 percent of original size [2021-11-07 08:35:05,201 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 123 treesize of output 71 [2021-11-07 08:35:05,245 INFO L354 Elim1Store]: treesize reduction 3, result has 75.0 percent of original size [2021-11-07 08:35:05,245 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 31 [2021-11-07 08:35:05,278 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-11-07 08:35:05,313 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-11-07 08:35:05,317 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 0 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:35:05,318 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1431828169] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-07 08:35:05,318 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-07 08:35:05,318 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 19] total 39 [2021-11-07 08:35:05,318 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [856791371] [2021-11-07 08:35:05,319 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:35:05,319 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:35:05,319 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2021-11-07 08:35:05,320 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=1348, Unknown=0, NotChecked=0, Total=1482 [2021-11-07 08:35:05,320 INFO L87 Difference]: Start difference. First operand 28 states and 29 transitions. cyclomatic complexity: 2 Second operand has 39 states, 39 states have (on average 1.2307692307692308) internal successors, (48), 39 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:35:06,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:35:06,177 INFO L93 Difference]: Finished difference Result 32 states and 33 transitions. [2021-11-07 08:35:06,177 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2021-11-07 08:35:06,177 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 32 states and 33 transitions. [2021-11-07 08:35:06,178 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 30 [2021-11-07 08:35:06,179 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 32 states to 32 states and 33 transitions. [2021-11-07 08:35:06,179 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 32 [2021-11-07 08:35:06,179 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 32 [2021-11-07 08:35:06,180 INFO L73 IsDeterministic]: Start isDeterministic. Operand 32 states and 33 transitions. [2021-11-07 08:35:06,180 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:35:06,180 INFO L681 BuchiCegarLoop]: Abstraction has 32 states and 33 transitions. [2021-11-07 08:35:06,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states and 33 transitions. [2021-11-07 08:35:06,182 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 31. [2021-11-07 08:35:06,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.032258064516129) internal successors, (32), 30 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:35:06,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 32 transitions. [2021-11-07 08:35:06,183 INFO L704 BuchiCegarLoop]: Abstraction has 31 states and 32 transitions. [2021-11-07 08:35:06,184 INFO L587 BuchiCegarLoop]: Abstraction has 31 states and 32 transitions. [2021-11-07 08:35:06,184 INFO L425 BuchiCegarLoop]: ======== Iteration 9============ [2021-11-07 08:35:06,184 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 31 states and 32 transitions. [2021-11-07 08:35:06,185 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 29 [2021-11-07 08:35:06,185 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:35:06,185 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:35:06,185 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:35:06,186 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [9, 8, 8, 1, 1, 1, 1] [2021-11-07 08:35:06,186 INFO L791 eck$LassoCheckResult]: Stem: 876#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 877#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 875#L552-4 [2021-11-07 08:35:06,186 INFO L793 eck$LassoCheckResult]: Loop: 875#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 878#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 883#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 904#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 879#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 880#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 881#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 882#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 903#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 902#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 901#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 900#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 899#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 898#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 897#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 896#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 895#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 894#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 893#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 892#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 891#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 890#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 889#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 888#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 887#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 885#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 886#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 884#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 874#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 875#L552-4 [2021-11-07 08:35:06,187 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:35:06,187 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 9 times [2021-11-07 08:35:06,187 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:35:06,187 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1000278149] [2021-11-07 08:35:06,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:35:06,187 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:35:06,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:35:06,197 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:35:06,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:35:06,205 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:35:06,205 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:35:06,205 INFO L85 PathProgramCache]: Analyzing trace with hash -190854959, now seen corresponding path program 7 times [2021-11-07 08:35:06,206 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:35:06,206 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2070970539] [2021-11-07 08:35:06,206 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:35:06,206 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:35:06,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:35:07,430 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:35:07,430 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:35:07,430 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2070970539] [2021-11-07 08:35:07,430 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2070970539] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-07 08:35:07,430 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [410403122] [2021-11-07 08:35:07,431 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2021-11-07 08:35:07,431 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:35:07,431 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:35:07,432 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:35:07,433 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2021-11-07 08:35:07,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:35:07,631 INFO L263 TraceCheckSpWp]: Trace formula consists of 194 conjuncts, 21 conjunts are in the unsatisfiable core [2021-11-07 08:35:07,633 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 08:35:07,638 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2021-11-07 08:35:07,685 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:35:07,685 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 90 [2021-11-07 08:35:07,700 WARN L234 Elim1Store]: Array PQE input equivalent to false [2021-11-07 08:35:07,722 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-07 08:35:07,722 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 9 [2021-11-07 08:35:07,759 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2021-11-07 08:35:07,921 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-11-07 08:35:07,922 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-11-07 08:35:08,076 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:35:08,076 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-11-07 08:35:08,110 INFO L173 IndexEqualityManager]: detected equality via solver [2021-11-07 08:35:08,110 INFO L173 IndexEqualityManager]: detected equality via solver [2021-11-07 08:35:08,111 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 19 [2021-11-07 08:35:08,132 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-11-07 08:35:08,158 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-07 08:35:08,158 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 67 treesize of output 47 [2021-11-07 08:35:08,275 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-11-07 08:35:08,276 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-11-07 08:35:08,442 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:35:08,442 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-11-07 08:35:08,532 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-11-07 08:35:08,627 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 39 [2021-11-07 08:35:08,656 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-11-07 08:35:08,656 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 59 treesize of output 39 [2021-11-07 08:35:08,811 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-11-07 08:35:08,812 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 64 [2021-11-07 08:35:09,014 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:35:09,015 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-11-07 08:35:09,073 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2021-11-07 08:35:09,162 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-11-07 08:35:09,163 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-11-07 08:35:09,172 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 18 [2021-11-07 08:35:09,314 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-11-07 08:35:09,314 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-11-07 08:35:09,451 INFO L354 Elim1Store]: treesize reduction 34, result has 58.0 percent of original size [2021-11-07 08:35:09,451 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 139 treesize of output 111 [2021-11-07 08:35:09,509 INFO L173 IndexEqualityManager]: detected equality via solver [2021-11-07 08:35:09,510 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 19 [2021-11-07 08:35:09,581 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2021-11-07 08:35:09,656 INFO L354 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2021-11-07 08:35:09,657 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 26 [2021-11-07 08:35:09,672 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 26 [2021-11-07 08:35:09,804 INFO L354 Elim1Store]: treesize reduction 18, result has 60.9 percent of original size [2021-11-07 08:35:09,805 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 61 [2021-11-07 08:35:09,960 INFO L354 Elim1Store]: treesize reduction 62, result has 23.5 percent of original size [2021-11-07 08:35:09,960 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 62 [2021-11-07 08:35:09,975 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-07 08:35:09,975 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 7 [2021-11-07 08:35:10,034 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-11-07 08:35:10,104 INFO L354 Elim1Store]: treesize reduction 62, result has 23.5 percent of original size [2021-11-07 08:35:10,104 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 114 treesize of output 62 [2021-11-07 08:35:10,118 WARN L234 Elim1Store]: Array PQE input equivalent to false [2021-11-07 08:35:10,130 INFO L354 Elim1Store]: treesize reduction 11, result has 8.3 percent of original size [2021-11-07 08:35:10,130 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 18 [2021-11-07 08:35:10,177 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-11-07 08:35:10,250 INFO L354 Elim1Store]: treesize reduction 62, result has 23.5 percent of original size [2021-11-07 08:35:10,250 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 2 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 4 new quantified variables, introduced 5 case distinctions, treesize of input 123 treesize of output 71 [2021-11-07 08:35:10,319 INFO L354 Elim1Store]: treesize reduction 3, result has 75.0 percent of original size [2021-11-07 08:35:10,319 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 31 [2021-11-07 08:35:10,369 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2021-11-07 08:35:10,407 INFO L388 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2021-11-07 08:35:10,412 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:35:10,412 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [410403122] provided 0 perfect and 1 imperfect interpolant sequences [2021-11-07 08:35:10,412 INFO L186 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2021-11-07 08:35:10,413 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 21] total 44 [2021-11-07 08:35:10,413 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [685635331] [2021-11-07 08:35:10,413 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:35:10,413 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:35:10,414 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2021-11-07 08:35:10,420 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=170, Invalid=1722, Unknown=0, NotChecked=0, Total=1892 [2021-11-07 08:35:10,420 INFO L87 Difference]: Start difference. First operand 31 states and 32 transitions. cyclomatic complexity: 2 Second operand has 44 states, 44 states have (on average 1.2272727272727273) internal successors, (54), 44 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:35:11,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:35:11,207 INFO L93 Difference]: Finished difference Result 35 states and 36 transitions. [2021-11-07 08:35:11,208 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2021-11-07 08:35:11,208 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 36 transitions. [2021-11-07 08:35:11,209 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 33 [2021-11-07 08:35:11,209 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 35 states and 36 transitions. [2021-11-07 08:35:11,210 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 35 [2021-11-07 08:35:11,210 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 35 [2021-11-07 08:35:11,210 INFO L73 IsDeterministic]: Start isDeterministic. Operand 35 states and 36 transitions. [2021-11-07 08:35:11,211 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:35:11,211 INFO L681 BuchiCegarLoop]: Abstraction has 35 states and 36 transitions. [2021-11-07 08:35:11,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states and 36 transitions. [2021-11-07 08:35:11,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 34. [2021-11-07 08:35:11,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.0294117647058822) internal successors, (35), 33 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:35:11,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 35 transitions. [2021-11-07 08:35:11,215 INFO L704 BuchiCegarLoop]: Abstraction has 34 states and 35 transitions. [2021-11-07 08:35:11,215 INFO L587 BuchiCegarLoop]: Abstraction has 34 states and 35 transitions. [2021-11-07 08:35:11,215 INFO L425 BuchiCegarLoop]: ======== Iteration 10============ [2021-11-07 08:35:11,215 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 34 states and 35 transitions. [2021-11-07 08:35:11,216 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 32 [2021-11-07 08:35:11,216 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:35:11,217 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:35:11,217 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:35:11,218 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [10, 9, 9, 1, 1, 1, 1] [2021-11-07 08:35:11,218 INFO L791 eck$LassoCheckResult]: Stem: 1087#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier; 1088#L-1 havoc main_#res;havoc main_#t~malloc2.base, main_#t~malloc2.offset, main_#t~malloc3.base, main_#t~malloc3.offset, main_#t~malloc4.base, main_#t~malloc4.offset, main_#t~mem10, main_#t~mem11, main_#t~mem8, main_#t~mem9, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem12, main_~i~0.base, main_~i~0.offset, main_~j~0.base, main_~j~0.offset, main_~c~0.base, main_~c~0.offset;call main_#t~malloc2.base, main_#t~malloc2.offset := #Ultimate.allocOnStack(4);main_~i~0.base, main_~i~0.offset := main_#t~malloc2.base, main_#t~malloc2.offset;call main_#t~malloc3.base, main_#t~malloc3.offset := #Ultimate.allocOnStack(4);main_~j~0.base, main_~j~0.offset := main_#t~malloc3.base, main_#t~malloc3.offset;call main_#t~malloc4.base, main_#t~malloc4.offset := #Ultimate.allocOnStack(4);main_~c~0.base, main_~c~0.offset := main_#t~malloc4.base, main_#t~malloc4.offset;call write~int(0, main_~c~0.base, main_~c~0.offset, 4);call write~int(0, main_~i~0.base, main_~i~0.offset, 4); 1090#L552-4 [2021-11-07 08:35:11,218 INFO L793 eck$LassoCheckResult]: Loop: 1090#L552-4 call main_#t~mem7 := read~int(main_~i~0.base, main_~i~0.offset, 4); 1091#L552-1 assume !!(main_#t~mem7 < 10);havoc main_#t~mem7;call write~int(3, main_~j~0.base, main_~j~0.offset, 4); 1096#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1120#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1092#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1093#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1094#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1095#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1119#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1118#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1117#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1116#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1115#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1114#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1113#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1112#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1111#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1110#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1109#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1108#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1107#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1106#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1105#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1104#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1103#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1102#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1101#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1100#L553-1 assume !!(main_#t~mem9 < 12);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(main_#t~mem10 - 1, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem10;call main_#t~mem11 := read~int(main_~c~0.base, main_~c~0.offset, 4);call write~int(1 + main_#t~mem11, main_~c~0.base, main_~c~0.offset, 4);havoc main_#t~mem11; 1098#L553-3 call main_#t~mem8 := read~int(main_~j~0.base, main_~j~0.offset, 4);call write~int(2 + main_#t~mem8, main_~j~0.base, main_~j~0.offset, 4);havoc main_#t~mem8; 1099#L553-4 call main_#t~mem9 := read~int(main_~j~0.base, main_~j~0.offset, 4); 1097#L553-1 assume !(main_#t~mem9 < 12);havoc main_#t~mem9; 1089#L552-3 call main_#t~mem5 := read~int(main_~i~0.base, main_~i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~i~0.base, main_~i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 1090#L552-4 [2021-11-07 08:35:11,219 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:35:11,219 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 10 times [2021-11-07 08:35:11,219 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:35:11,219 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [207038889] [2021-11-07 08:35:11,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:35:11,220 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:35:11,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:35:11,229 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:35:11,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:35:11,237 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:35:11,238 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:35:11,238 INFO L85 PathProgramCache]: Analyzing trace with hash 778359212, now seen corresponding path program 8 times [2021-11-07 08:35:11,238 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:35:11,239 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1403023749] [2021-11-07 08:35:11,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:35:11,239 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:35:11,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:35:11,280 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:35:11,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:35:11,327 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:35:11,328 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:35:11,328 INFO L85 PathProgramCache]: Analyzing trace with hash 320163182, now seen corresponding path program 2 times [2021-11-07 08:35:11,328 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:35:11,328 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1062486255] [2021-11-07 08:35:11,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:35:11,329 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:35:11,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:35:11,372 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:35:11,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:35:11,433 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:36:25,184 WARN L207 SmtUtils]: Spent 1.23 m on a formula simplification. DAG size of input: 257 DAG size of output: 247 [2021-11-07 08:36:33,958 INFO L210 LassoAnalysis]: Preferences: [2021-11-07 08:36:33,958 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-11-07 08:36:33,958 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-11-07 08:36:33,958 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-11-07 08:36:33,959 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-11-07 08:36:33,959 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-07 08:36:33,959 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-11-07 08:36:33,959 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-11-07 08:36:33,959 INFO L133 ssoRankerPreferences]: Filename of dumped script: java_Nested-alloca.i_Iteration10_Lasso [2021-11-07 08:36:33,959 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-11-07 08:36:33,959 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-11-07 08:36:33,968 FATAL L? ?]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer has thrown an exception: java.lang.ArithmeticException: integer overflow at java.base/java.lang.Math.toIntExact(Math.java:1071) at de.uni_freiburg.informatik.ultimate.lassoranker.LassoAnalysis$PreprocessingBenchmark.(LassoAnalysis.java:551) at de.uni_freiburg.informatik.ultimate.lassoranker.variables.LassoBuilder.preprocess(LassoBuilder.java:255) at de.uni_freiburg.informatik.ultimate.lassoranker.LassoAnalysis.preprocess(LassoAnalysis.java:280) at de.uni_freiburg.informatik.ultimate.lassoranker.LassoAnalysis.(LassoAnalysis.java:229) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck.synthesize(LassoCheck.java:609) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck$LassoCheckResult.checkLassoTermination(LassoCheck.java:953) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck$LassoCheckResult.(LassoCheck.java:862) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.LassoCheck.(LassoCheck.java:252) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiCegarLoop.iterate(BuchiCegarLoop.java:457) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver.doTerminationAnalysis(BuchiAutomizerObserver.java:143) at de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver.finish(BuchiAutomizerObserver.java:398) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:320) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2021-11-07 08:36:33,976 INFO L168 Benchmark]: Toolchain (without parser) took 120401.21 ms. Allocated memory was 100.7 MB in the beginning and 155.2 MB in the end (delta: 54.5 MB). Free memory was 61.6 MB in the beginning and 79.2 MB in the end (delta: -17.6 MB). Peak memory consumption was 108.6 MB. Max. memory is 16.1 GB. [2021-11-07 08:36:33,976 INFO L168 Benchmark]: CDTParser took 0.30 ms. Allocated memory is still 100.7 MB. Free memory is still 79.4 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-11-07 08:36:33,977 INFO L168 Benchmark]: CACSL2BoogieTranslator took 562.03 ms. Allocated memory is still 100.7 MB. Free memory was 61.4 MB in the beginning and 74.8 MB in the end (delta: -13.4 MB). Peak memory consumption was 17.4 MB. Max. memory is 16.1 GB. [2021-11-07 08:36:33,977 INFO L168 Benchmark]: Boogie Procedure Inliner took 54.06 ms. Allocated memory is still 100.7 MB. Free memory was 74.8 MB in the beginning and 73.2 MB in the end (delta: 1.6 MB). There was no memory consumed. Max. memory is 16.1 GB. [2021-11-07 08:36:33,977 INFO L168 Benchmark]: Boogie Preprocessor took 30.08 ms. Allocated memory is still 100.7 MB. Free memory was 73.2 MB in the beginning and 71.9 MB in the end (delta: 1.3 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-11-07 08:36:33,978 INFO L168 Benchmark]: RCFGBuilder took 351.50 ms. Allocated memory is still 100.7 MB. Free memory was 71.9 MB in the beginning and 61.6 MB in the end (delta: 10.3 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. [2021-11-07 08:36:33,979 INFO L168 Benchmark]: BuchiAutomizer took 119395.22 ms. Allocated memory was 100.7 MB in the beginning and 155.2 MB in the end (delta: 54.5 MB). Free memory was 61.6 MB in the beginning and 79.2 MB in the end (delta: -17.7 MB). Peak memory consumption was 105.9 MB. Max. memory is 16.1 GB. [2021-11-07 08:36:33,981 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.30 ms. Allocated memory is still 100.7 MB. Free memory is still 79.4 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 562.03 ms. Allocated memory is still 100.7 MB. Free memory was 61.4 MB in the beginning and 74.8 MB in the end (delta: -13.4 MB). Peak memory consumption was 17.4 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 54.06 ms. Allocated memory is still 100.7 MB. Free memory was 74.8 MB in the beginning and 73.2 MB in the end (delta: 1.6 MB). There was no memory consumed. Max. memory is 16.1 GB. * Boogie Preprocessor took 30.08 ms. Allocated memory is still 100.7 MB. Free memory was 73.2 MB in the beginning and 71.9 MB in the end (delta: 1.3 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 351.50 ms. Allocated memory is still 100.7 MB. Free memory was 71.9 MB in the beginning and 61.6 MB in the end (delta: 10.3 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. * BuchiAutomizer took 119395.22 ms. Allocated memory was 100.7 MB in the beginning and 155.2 MB in the end (delta: 54.5 MB). Free memory was 61.6 MB in the beginning and 79.2 MB in the end (delta: -17.7 MB). Peak memory consumption was 105.9 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer: - ExceptionOrErrorResult: ArithmeticException: integer overflow de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer: ArithmeticException: integer overflow: java.base/java.lang.Math.toIntExact(Math.java:1071) RESULT: Ultimate could not prove your program: Toolchain returned no result. [2021-11-07 08:36:34,023 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2021-11-07 08:36:34,234 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2021-11-07 08:36:34,436 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2021-11-07 08:36:34,633 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2021-11-07 08:36:34,833 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2021-11-07 08:36:35,034 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2021-11-07 08:36:35,234 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2021-11-07 08:36:35,440 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis No suitable file found in config dir /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5a395619-4cfe-4f6a-b668-fc6d9c248e9a/bin/uautomizer-AkOaLMaTGY/config using search string *Termination*64bit*_Bitvector*.epf No suitable settings file found using Termination*64bit*_Bitvector ERROR: UNSUPPORTED PROPERTY Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: ArithmeticException: integer overflow