./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test3-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 47ea0209 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test3-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 6560568361eacef24363f4e5a58f5226b4c8bc2851167e042d4f8ce61eb0aa48 --- Real Ultimate output --- This is Ultimate 0.2.1-dev-47ea020 [2021-11-07 08:28:42,586 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-07 08:28:42,588 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-07 08:28:42,625 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-07 08:28:42,626 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-07 08:28:42,627 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-07 08:28:42,630 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-07 08:28:42,633 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-07 08:28:42,636 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-07 08:28:42,638 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-07 08:28:42,639 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-07 08:28:42,641 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-07 08:28:42,642 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-07 08:28:42,644 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-07 08:28:42,646 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-07 08:28:42,649 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-07 08:28:42,650 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-07 08:28:42,652 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-07 08:28:42,655 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-07 08:28:42,659 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-07 08:28:42,662 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-07 08:28:42,664 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-07 08:28:42,666 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-07 08:28:42,668 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-07 08:28:42,673 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-07 08:28:42,674 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-07 08:28:42,675 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-07 08:28:42,676 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-07 08:28:42,677 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-07 08:28:42,679 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-07 08:28:42,679 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-07 08:28:42,681 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-07 08:28:42,682 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-07 08:28:42,684 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-07 08:28:42,685 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-07 08:28:42,686 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-07 08:28:42,687 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-07 08:28:42,688 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-07 08:28:42,688 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-07 08:28:42,689 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-07 08:28:42,690 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-07 08:28:42,691 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-11-07 08:28:42,723 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-07 08:28:42,724 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-07 08:28:42,724 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-07 08:28:42,724 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-07 08:28:42,726 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-07 08:28:42,726 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-07 08:28:42,727 INFO L138 SettingsManager]: * Use SBE=true [2021-11-07 08:28:42,727 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-11-07 08:28:42,727 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-11-07 08:28:42,728 INFO L138 SettingsManager]: * Use old map elimination=false [2021-11-07 08:28:42,728 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-11-07 08:28:42,728 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-11-07 08:28:42,728 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-11-07 08:28:42,729 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-07 08:28:42,729 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-07 08:28:42,729 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-11-07 08:28:42,730 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-07 08:28:42,730 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-07 08:28:42,730 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-07 08:28:42,730 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-11-07 08:28:42,731 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-11-07 08:28:42,731 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-11-07 08:28:42,731 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-07 08:28:42,732 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-07 08:28:42,732 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-11-07 08:28:42,732 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-07 08:28:42,732 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-11-07 08:28:42,733 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-07 08:28:42,733 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-07 08:28:42,733 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-07 08:28:42,734 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-07 08:28:42,734 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-07 08:28:42,736 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-11-07 08:28:42,736 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6560568361eacef24363f4e5a58f5226b4c8bc2851167e042d4f8ce61eb0aa48 [2021-11-07 08:28:43,052 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-07 08:28:43,084 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-07 08:28:43,088 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-07 08:28:43,090 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-07 08:28:43,091 INFO L275 PluginConnector]: CDTParser initialized [2021-11-07 08:28:43,093 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test3-2.i [2021-11-07 08:28:43,218 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/data/828d665f8/22a15770e26c4542a35462498d96bead/FLAG290c67cd5 [2021-11-07 08:28:44,022 INFO L306 CDTParser]: Found 1 translation units. [2021-11-07 08:28:44,023 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test3-2.i [2021-11-07 08:28:44,045 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/data/828d665f8/22a15770e26c4542a35462498d96bead/FLAG290c67cd5 [2021-11-07 08:28:44,222 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/data/828d665f8/22a15770e26c4542a35462498d96bead [2021-11-07 08:28:44,225 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-07 08:28:44,226 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-07 08:28:44,243 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-07 08:28:44,243 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-07 08:28:44,254 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-07 08:28:44,255 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.11 08:28:44" (1/1) ... [2021-11-07 08:28:44,257 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@14fdb104 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:28:44, skipping insertion in model container [2021-11-07 08:28:44,257 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.11 08:28:44" (1/1) ... [2021-11-07 08:28:44,270 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-07 08:28:44,339 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-07 08:28:44,872 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test3-2.i[33021,33034] [2021-11-07 08:28:45,083 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test3-2.i[44590,44603] [2021-11-07 08:28:45,127 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-07 08:28:45,139 INFO L203 MainTranslator]: Completed pre-run [2021-11-07 08:28:45,197 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test3-2.i[33021,33034] [2021-11-07 08:28:45,275 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test3-2.i[44590,44603] [2021-11-07 08:28:45,288 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-07 08:28:45,344 INFO L208 MainTranslator]: Completed translation [2021-11-07 08:28:45,345 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:28:45 WrapperNode [2021-11-07 08:28:45,345 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-07 08:28:45,346 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-07 08:28:45,347 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-07 08:28:45,347 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-07 08:28:45,356 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:28:45" (1/1) ... [2021-11-07 08:28:45,411 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:28:45" (1/1) ... [2021-11-07 08:28:45,536 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-07 08:28:45,537 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-07 08:28:45,537 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-07 08:28:45,537 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-07 08:28:45,546 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:28:45" (1/1) ... [2021-11-07 08:28:45,547 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:28:45" (1/1) ... [2021-11-07 08:28:45,565 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:28:45" (1/1) ... [2021-11-07 08:28:45,565 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:28:45" (1/1) ... [2021-11-07 08:28:45,640 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:28:45" (1/1) ... [2021-11-07 08:28:45,680 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:28:45" (1/1) ... [2021-11-07 08:28:45,701 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:28:45" (1/1) ... [2021-11-07 08:28:45,717 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-07 08:28:45,718 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-07 08:28:45,718 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-07 08:28:45,718 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-07 08:28:45,721 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:28:45" (1/1) ... [2021-11-07 08:28:45,730 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-07 08:28:45,746 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:28:45,768 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-07 08:28:45,785 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-11-07 08:28:45,826 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-11-07 08:28:45,826 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-07 08:28:45,826 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2021-11-07 08:28:45,827 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2021-11-07 08:28:45,827 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-11-07 08:28:45,827 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-11-07 08:28:45,827 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-07 08:28:45,828 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2021-11-07 08:28:45,828 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-11-07 08:28:45,829 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-07 08:28:45,829 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-07 08:28:45,829 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-07 08:28:45,829 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-07 08:28:46,111 WARN L805 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-11-07 08:28:47,755 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-07 08:28:47,755 INFO L299 CfgBuilder]: Removed 88 assume(true) statements. [2021-11-07 08:28:47,760 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.11 08:28:47 BoogieIcfgContainer [2021-11-07 08:28:47,760 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-07 08:28:47,764 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-11-07 08:28:47,764 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-11-07 08:28:47,768 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-11-07 08:28:47,769 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 08:28:47,770 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 07.11 08:28:44" (1/3) ... [2021-11-07 08:28:47,772 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3af03548 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 07.11 08:28:47, skipping insertion in model container [2021-11-07 08:28:47,772 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 08:28:47,772 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:28:45" (2/3) ... [2021-11-07 08:28:47,773 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3af03548 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 07.11 08:28:47, skipping insertion in model container [2021-11-07 08:28:47,773 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 08:28:47,773 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.11 08:28:47" (3/3) ... [2021-11-07 08:28:47,778 INFO L389 chiAutomizerObserver]: Analyzing ICFG uthash_FNV_test3-2.i [2021-11-07 08:28:47,845 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-11-07 08:28:47,845 INFO L360 BuchiCegarLoop]: Hoare is false [2021-11-07 08:28:47,847 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-11-07 08:28:47,847 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-11-07 08:28:47,847 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-11-07 08:28:47,847 INFO L364 BuchiCegarLoop]: Difference is false [2021-11-07 08:28:47,847 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-11-07 08:28:47,847 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-11-07 08:28:47,878 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 224 states, 219 states have (on average 1.6986301369863013) internal successors, (372), 219 states have internal predecessors, (372), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:28:47,923 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 209 [2021-11-07 08:28:47,923 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:28:47,924 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:28:47,932 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:28:47,938 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2021-11-07 08:28:47,939 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-11-07 08:28:47,940 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 224 states, 219 states have (on average 1.6986301369863013) internal successors, (372), 219 states have internal predecessors, (372), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:28:47,965 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 209 [2021-11-07 08:28:47,966 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:28:47,966 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:28:47,967 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:28:47,968 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2021-11-07 08:28:47,976 INFO L791 eck$LassoCheckResult]: Stem: 217#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 152#L-1true havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem149, main_#t~mem148, main_#t~mem150, main_#t~mem151, main_#t~mem153, main_#t~mem152, main_#t~mem154, main_#t~mem155, main_#t~mem157, main_#t~mem156, main_#t~mem158, main_#t~mem159, main_#t~switch160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem172.base, main_#t~mem172.offset, main_#t~mem173, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181, main_#t~mem182, main_#t~mem183, main_#t~short184, main_#t~mem185.base, main_#t~mem185.offset, main_#t~ret186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem191.base, main_#t~mem191.offset, main_#t~mem192.base, main_#t~mem192.offset, main_#t~short193, main_#t~mem194.base, main_#t~mem194.offset, main_#t~mem195.base, main_#t~mem195.offset, main_#t~mem196.base, main_#t~mem196.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~mem199.base, main_#t~mem199.offset, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204.base, main_#t~mem204.offset, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208.base, main_#t~mem208.offset, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem216, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215, main_#t~mem217.base, main_#t~mem217.offset, main_#t~mem218.base, main_#t~mem218.offset, main_#t~mem219, main_#t~post220, main_#t~mem221.base, main_#t~mem221.offset, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225.base, main_#t~mem225.offset, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230, main_#t~post231, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem146, main_#t~mem147, main_#t~mem233, main_#t~mem234, main_#t~mem232.base, main_#t~mem232.offset, main_#t~ite236.base, main_#t~ite236.offset, main_#t~mem235.base, main_#t~mem235.offset, main_#t~mem239.base, main_#t~mem239.offset, main_#t~mem240.base, main_#t~mem240.offset, main_#t~short241, main_#t~mem242.base, main_#t~mem242.offset, main_#t~mem243.base, main_#t~mem243.offset, main_#t~mem244.base, main_#t~mem244.offset, main_#t~mem245.base, main_#t~mem245.offset, main_#t~mem246.base, main_#t~mem246.offset, main_#t~mem247.base, main_#t~mem247.offset, main_#t~mem248.base, main_#t~mem248.offset, main_#t~mem249.base, main_#t~mem249.offset, main_#t~mem250, main_#t~mem251.base, main_#t~mem251.offset, main_#t~mem252.base, main_#t~mem252.offset, main_#t~mem253.base, main_#t~mem253.offset, main_#t~mem254, main_#t~mem255.base, main_#t~mem255.offset, main_#t~mem256.base, main_#t~mem256.offset, main_#t~mem257.base, main_#t~mem257.offset, main_#t~mem258.base, main_#t~mem258.offset, main_#t~mem259.base, main_#t~mem259.offset, main_#t~mem260, main_#t~mem261.base, main_#t~mem261.offset, main_#t~mem264, main_#t~mem262.base, main_#t~mem262.offset, main_#t~mem263, main_#t~mem265.base, main_#t~mem265.offset, main_#t~mem266.base, main_#t~mem266.offset, main_#t~mem267, main_#t~post268, main_#t~mem269.base, main_#t~mem269.offset, main_#t~mem270.base, main_#t~mem270.offset, main_#t~mem271.base, main_#t~mem271.offset, main_#t~mem272.base, main_#t~mem272.offset, main_#t~mem273.base, main_#t~mem273.offset, main_#t~mem274.base, main_#t~mem274.offset, main_#t~mem275.base, main_#t~mem275.offset, main_#t~mem276.base, main_#t~mem276.offset, main_~_hd_head~1.base, main_~_hd_head~1.offset, main_#t~mem277.base, main_#t~mem277.offset, main_#t~mem278, main_#t~post279, main_~_hd_bkt~1, main_~_hd_hh_del~1.base, main_~_hd_hh_del~1.offset, main_#t~ite238.base, main_#t~ite238.offset, main_#t~mem237.base, main_#t~mem237.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 183#L735-4true [2021-11-07 08:28:47,977 INFO L793 eck$LassoCheckResult]: Loop: 183#L735-4true call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 42#L735-1true assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 16#L737true assume main_~user~0.base == 0 && main_~user~0.offset == 0;assume false; 75#L737-2true call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 62#L742-124true assume !true; 34#L735-3true call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 183#L735-4true [2021-11-07 08:28:47,988 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:28:47,989 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2021-11-07 08:28:47,999 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:28:48,001 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [286285190] [2021-11-07 08:28:48,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:28:48,003 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:28:48,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:28:48,167 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:28:48,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:28:48,236 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:28:48,240 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:28:48,240 INFO L85 PathProgramCache]: Analyzing trace with hash 1336134572, now seen corresponding path program 1 times [2021-11-07 08:28:48,240 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:28:48,241 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [857561022] [2021-11-07 08:28:48,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:28:48,241 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:28:48,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:28:48,312 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:28:48,318 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:28:48,318 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [857561022] [2021-11-07 08:28:48,319 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [857561022] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 08:28:48,320 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 08:28:48,320 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-07 08:28:48,320 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1064147055] [2021-11-07 08:28:48,326 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:28:48,327 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:28:48,345 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-11-07 08:28:48,346 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-11-07 08:28:48,350 INFO L87 Difference]: Start difference. First operand has 224 states, 219 states have (on average 1.6986301369863013) internal successors, (372), 219 states have internal predecessors, (372), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:28:48,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:28:48,376 INFO L93 Difference]: Finished difference Result 224 states and 296 transitions. [2021-11-07 08:28:48,376 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-11-07 08:28:48,378 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 224 states and 296 transitions. [2021-11-07 08:28:48,387 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 209 [2021-11-07 08:28:48,398 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 224 states to 220 states and 292 transitions. [2021-11-07 08:28:48,399 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 220 [2021-11-07 08:28:48,401 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 220 [2021-11-07 08:28:48,402 INFO L73 IsDeterministic]: Start isDeterministic. Operand 220 states and 292 transitions. [2021-11-07 08:28:48,405 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:28:48,405 INFO L681 BuchiCegarLoop]: Abstraction has 220 states and 292 transitions. [2021-11-07 08:28:48,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states and 292 transitions. [2021-11-07 08:28:48,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 220. [2021-11-07 08:28:48,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 220 states, 216 states have (on average 1.3240740740740742) internal successors, (286), 215 states have internal predecessors, (286), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:28:48,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 292 transitions. [2021-11-07 08:28:48,456 INFO L704 BuchiCegarLoop]: Abstraction has 220 states and 292 transitions. [2021-11-07 08:28:48,457 INFO L587 BuchiCegarLoop]: Abstraction has 220 states and 292 transitions. [2021-11-07 08:28:48,457 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-11-07 08:28:48,457 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 220 states and 292 transitions. [2021-11-07 08:28:48,461 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 209 [2021-11-07 08:28:48,462 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:28:48,462 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:28:48,463 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:28:48,464 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 08:28:48,464 INFO L791 eck$LassoCheckResult]: Stem: 675#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 654#L-1 havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem149, main_#t~mem148, main_#t~mem150, main_#t~mem151, main_#t~mem153, main_#t~mem152, main_#t~mem154, main_#t~mem155, main_#t~mem157, main_#t~mem156, main_#t~mem158, main_#t~mem159, main_#t~switch160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem172.base, main_#t~mem172.offset, main_#t~mem173, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181, main_#t~mem182, main_#t~mem183, main_#t~short184, main_#t~mem185.base, main_#t~mem185.offset, main_#t~ret186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem191.base, main_#t~mem191.offset, main_#t~mem192.base, main_#t~mem192.offset, main_#t~short193, main_#t~mem194.base, main_#t~mem194.offset, main_#t~mem195.base, main_#t~mem195.offset, main_#t~mem196.base, main_#t~mem196.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~mem199.base, main_#t~mem199.offset, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204.base, main_#t~mem204.offset, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208.base, main_#t~mem208.offset, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem216, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215, main_#t~mem217.base, main_#t~mem217.offset, main_#t~mem218.base, main_#t~mem218.offset, main_#t~mem219, main_#t~post220, main_#t~mem221.base, main_#t~mem221.offset, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225.base, main_#t~mem225.offset, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230, main_#t~post231, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem146, main_#t~mem147, main_#t~mem233, main_#t~mem234, main_#t~mem232.base, main_#t~mem232.offset, main_#t~ite236.base, main_#t~ite236.offset, main_#t~mem235.base, main_#t~mem235.offset, main_#t~mem239.base, main_#t~mem239.offset, main_#t~mem240.base, main_#t~mem240.offset, main_#t~short241, main_#t~mem242.base, main_#t~mem242.offset, main_#t~mem243.base, main_#t~mem243.offset, main_#t~mem244.base, main_#t~mem244.offset, main_#t~mem245.base, main_#t~mem245.offset, main_#t~mem246.base, main_#t~mem246.offset, main_#t~mem247.base, main_#t~mem247.offset, main_#t~mem248.base, main_#t~mem248.offset, main_#t~mem249.base, main_#t~mem249.offset, main_#t~mem250, main_#t~mem251.base, main_#t~mem251.offset, main_#t~mem252.base, main_#t~mem252.offset, main_#t~mem253.base, main_#t~mem253.offset, main_#t~mem254, main_#t~mem255.base, main_#t~mem255.offset, main_#t~mem256.base, main_#t~mem256.offset, main_#t~mem257.base, main_#t~mem257.offset, main_#t~mem258.base, main_#t~mem258.offset, main_#t~mem259.base, main_#t~mem259.offset, main_#t~mem260, main_#t~mem261.base, main_#t~mem261.offset, main_#t~mem264, main_#t~mem262.base, main_#t~mem262.offset, main_#t~mem263, main_#t~mem265.base, main_#t~mem265.offset, main_#t~mem266.base, main_#t~mem266.offset, main_#t~mem267, main_#t~post268, main_#t~mem269.base, main_#t~mem269.offset, main_#t~mem270.base, main_#t~mem270.offset, main_#t~mem271.base, main_#t~mem271.offset, main_#t~mem272.base, main_#t~mem272.offset, main_#t~mem273.base, main_#t~mem273.offset, main_#t~mem274.base, main_#t~mem274.offset, main_#t~mem275.base, main_#t~mem275.offset, main_#t~mem276.base, main_#t~mem276.offset, main_~_hd_head~1.base, main_~_hd_head~1.offset, main_#t~mem277.base, main_#t~mem277.offset, main_#t~mem278, main_#t~post279, main_~_hd_bkt~1, main_~_hd_hh_del~1.base, main_~_hd_hh_del~1.offset, main_#t~ite238.base, main_#t~ite238.offset, main_#t~mem237.base, main_#t~mem237.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 517#L735-4 [2021-11-07 08:28:48,466 INFO L793 eck$LassoCheckResult]: Loop: 517#L735-4 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 529#L735-1 assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 487#L737 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 488#L737-2 call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 562#L742-124 havoc main_~_ha_hashv~0; 563#L742-49 goto; 509#L742-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 510#L742-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 550#L742-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch26 := 11 == main_~_hj_k~0; 669#L742-10 assume main_#t~switch26;call main_#t~mem27 := read~int(main_~_hj_key~0.base, 10 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 16777216 * (main_#t~mem27 % 256);havoc main_#t~mem27; 549#L742-12 main_#t~switch26 := main_#t~switch26 || 10 == main_~_hj_k~0; 523#L742-13 assume main_#t~switch26;call main_#t~mem28 := read~int(main_~_hj_key~0.base, 9 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 65536 * (main_#t~mem28 % 256);havoc main_#t~mem28; 524#L742-15 main_#t~switch26 := main_#t~switch26 || 9 == main_~_hj_k~0; 610#L742-16 assume main_#t~switch26;call main_#t~mem29 := read~int(main_~_hj_key~0.base, 8 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 256 * (main_#t~mem29 % 256);havoc main_#t~mem29; 489#L742-18 main_#t~switch26 := main_#t~switch26 || 8 == main_~_hj_k~0; 490#L742-19 assume main_#t~switch26;call main_#t~mem30 := read~int(main_~_hj_key~0.base, 7 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 16777216 * (main_#t~mem30 % 256);havoc main_#t~mem30; 574#L742-21 main_#t~switch26 := main_#t~switch26 || 7 == main_~_hj_k~0; 605#L742-22 assume !main_#t~switch26; 655#L742-24 main_#t~switch26 := main_#t~switch26 || 6 == main_~_hj_k~0; 656#L742-25 assume main_#t~switch26;call main_#t~mem32 := read~int(main_~_hj_key~0.base, 5 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 256 * (main_#t~mem32 % 256);havoc main_#t~mem32; 559#L742-27 main_#t~switch26 := main_#t~switch26 || 5 == main_~_hj_k~0; 560#L742-28 assume main_#t~switch26;call main_#t~mem33 := read~int(main_~_hj_key~0.base, 4 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + main_#t~mem33 % 256;havoc main_#t~mem33; 627#L742-30 main_#t~switch26 := main_#t~switch26 || 4 == main_~_hj_k~0; 628#L742-31 assume main_#t~switch26;call main_#t~mem34 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem34 % 256);havoc main_#t~mem34; 538#L742-33 main_#t~switch26 := main_#t~switch26 || 3 == main_~_hj_k~0; 539#L742-34 assume main_#t~switch26;call main_#t~mem35 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem35 % 256);havoc main_#t~mem35; 625#L742-36 main_#t~switch26 := main_#t~switch26 || 2 == main_~_hj_k~0; 615#L742-37 assume main_#t~switch26;call main_#t~mem36 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem36 % 256);havoc main_#t~mem36; 568#L742-39 main_#t~switch26 := main_#t~switch26 || 1 == main_~_hj_k~0; 569#L742-40 assume main_#t~switch26;call main_#t~mem37 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem37 % 256;havoc main_#t~mem37; 619#L742-42 havoc main_#t~switch26; 666#L742-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 604#L742-44 goto; 544#L742-46 goto; 545#L742-48 goto; 507#L742-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 508#L742-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset; 668#L742-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_#t~mem56.base, 16 + main_#t~mem56.offset, 4);call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 20 + main_#t~mem58.offset, 4);call write~$Pointer$(main_#t~mem57.base, main_#t~mem57.offset - main_#t~mem59, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57.base, main_#t~mem57.offset;havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem61.base, 8 + main_#t~mem61.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset;havoc main_#t~mem61.base, main_#t~mem61.offset;call main_#t~mem62.base, main_#t~mem62.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem62.base, 16 + main_#t~mem62.offset, 4);havoc main_#t~mem62.base, main_#t~mem62.offset; 593#L742-66 goto; 594#L742-120 havoc main_~_ha_bkt~0;call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64 := read~int(main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);main_#t~post65 := main_#t~mem64;call write~int(1 + main_#t~post65, main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64;havoc main_#t~post65; 609#L742-71 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67 := read~int(main_#t~mem66.base, 4 + main_#t~mem66.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem67 - 1);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67; 647#L742-70 goto; 648#L742-118 call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_#t~mem68.base, main_#t~mem68.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem69.base, main_#t~mem69.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68.base, main_#t~mem68.offset;havoc main_#t~mem69.base, main_#t~mem69.offset;call main_#t~mem70 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post71 := main_#t~mem70;call write~int(1 + main_#t~post71, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem70;havoc main_#t~post71;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem72.base, main_#t~mem72.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem73.base, main_#t~mem73.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 546#L742-73 assume main_#t~mem73.base != 0 || main_#t~mem73.offset != 0;havoc main_#t~mem73.base, main_#t~mem73.offset;call main_#t~mem74.base, main_#t~mem74.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem74.base, 12 + main_#t~mem74.offset, 4);havoc main_#t~mem74.base, main_#t~mem74.offset; 477#L742-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem76 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem75 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short79 := main_#t~mem76 % 4294967296 >= 10 * (1 + main_#t~mem75) % 4294967296; 478#L742-76 assume main_#t~short79;call main_#t~mem77.base, main_#t~mem77.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem78 := read~int(main_#t~mem77.base, 36 + main_#t~mem77.offset, 4);main_#t~short79 := 0 == main_#t~mem78 % 4294967296; 531#L742-78 assume !main_#t~short79;havoc main_#t~mem76;havoc main_#t~mem75;havoc main_#t~mem77.base, main_#t~mem77.offset;havoc main_#t~mem78;havoc main_#t~short79; 533#L742-117 goto; 481#L742-119 goto; 482#L742-121 goto; 567#L742-123 goto; 516#L735-3 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 517#L735-4 [2021-11-07 08:28:48,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:28:48,468 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2021-11-07 08:28:48,468 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:28:48,468 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1491926259] [2021-11-07 08:28:48,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:28:48,469 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:28:48,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:28:48,499 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:28:48,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:28:48,556 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:28:48,557 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:28:48,558 INFO L85 PathProgramCache]: Analyzing trace with hash -1570577107, now seen corresponding path program 1 times [2021-11-07 08:28:48,558 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:28:48,559 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1285533188] [2021-11-07 08:28:48,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:28:48,561 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:28:48,585 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 08:28:48,585 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [318044613] [2021-11-07 08:28:48,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:28:48,586 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:28:48,586 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:28:48,588 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:28:48,595 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-11-07 08:28:48,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:28:48,787 INFO L263 TraceCheckSpWp]: Trace formula consists of 308 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-07 08:28:48,790 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 08:28:49,053 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:28:49,053 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:28:49,053 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1285533188] [2021-11-07 08:28:49,054 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-07 08:28:49,054 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [318044613] [2021-11-07 08:28:49,054 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [318044613] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 08:28:49,054 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 08:28:49,055 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-07 08:28:49,055 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1565732510] [2021-11-07 08:28:49,055 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:28:49,056 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:28:49,056 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-07 08:28:49,057 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-07 08:28:49,057 INFO L87 Difference]: Start difference. First operand 220 states and 292 transitions. cyclomatic complexity: 77 Second operand has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:28:49,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:28:49,254 INFO L93 Difference]: Finished difference Result 241 states and 313 transitions. [2021-11-07 08:28:49,256 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-07 08:28:49,256 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 241 states and 313 transitions. [2021-11-07 08:28:49,260 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 230 [2021-11-07 08:28:49,264 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 241 states to 241 states and 313 transitions. [2021-11-07 08:28:49,265 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 241 [2021-11-07 08:28:49,265 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 241 [2021-11-07 08:28:49,266 INFO L73 IsDeterministic]: Start isDeterministic. Operand 241 states and 313 transitions. [2021-11-07 08:28:49,274 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:28:49,275 INFO L681 BuchiCegarLoop]: Abstraction has 241 states and 313 transitions. [2021-11-07 08:28:49,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 241 states and 313 transitions. [2021-11-07 08:28:49,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 241 to 240. [2021-11-07 08:28:49,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 240 states, 236 states have (on average 1.2966101694915255) internal successors, (306), 235 states have internal predecessors, (306), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:28:49,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 240 states to 240 states and 312 transitions. [2021-11-07 08:28:49,299 INFO L704 BuchiCegarLoop]: Abstraction has 240 states and 312 transitions. [2021-11-07 08:28:49,299 INFO L587 BuchiCegarLoop]: Abstraction has 240 states and 312 transitions. [2021-11-07 08:28:49,299 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-11-07 08:28:49,300 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 240 states and 312 transitions. [2021-11-07 08:28:49,302 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 229 [2021-11-07 08:28:49,302 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:28:49,302 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:28:49,304 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:28:49,304 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 08:28:49,304 INFO L791 eck$LassoCheckResult]: Stem: 1298#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 1275#L-1 havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem149, main_#t~mem148, main_#t~mem150, main_#t~mem151, main_#t~mem153, main_#t~mem152, main_#t~mem154, main_#t~mem155, main_#t~mem157, main_#t~mem156, main_#t~mem158, main_#t~mem159, main_#t~switch160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem172.base, main_#t~mem172.offset, main_#t~mem173, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181, main_#t~mem182, main_#t~mem183, main_#t~short184, main_#t~mem185.base, main_#t~mem185.offset, main_#t~ret186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem191.base, main_#t~mem191.offset, main_#t~mem192.base, main_#t~mem192.offset, main_#t~short193, main_#t~mem194.base, main_#t~mem194.offset, main_#t~mem195.base, main_#t~mem195.offset, main_#t~mem196.base, main_#t~mem196.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~mem199.base, main_#t~mem199.offset, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204.base, main_#t~mem204.offset, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208.base, main_#t~mem208.offset, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem216, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215, main_#t~mem217.base, main_#t~mem217.offset, main_#t~mem218.base, main_#t~mem218.offset, main_#t~mem219, main_#t~post220, main_#t~mem221.base, main_#t~mem221.offset, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225.base, main_#t~mem225.offset, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230, main_#t~post231, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem146, main_#t~mem147, main_#t~mem233, main_#t~mem234, main_#t~mem232.base, main_#t~mem232.offset, main_#t~ite236.base, main_#t~ite236.offset, main_#t~mem235.base, main_#t~mem235.offset, main_#t~mem239.base, main_#t~mem239.offset, main_#t~mem240.base, main_#t~mem240.offset, main_#t~short241, main_#t~mem242.base, main_#t~mem242.offset, main_#t~mem243.base, main_#t~mem243.offset, main_#t~mem244.base, main_#t~mem244.offset, main_#t~mem245.base, main_#t~mem245.offset, main_#t~mem246.base, main_#t~mem246.offset, main_#t~mem247.base, main_#t~mem247.offset, main_#t~mem248.base, main_#t~mem248.offset, main_#t~mem249.base, main_#t~mem249.offset, main_#t~mem250, main_#t~mem251.base, main_#t~mem251.offset, main_#t~mem252.base, main_#t~mem252.offset, main_#t~mem253.base, main_#t~mem253.offset, main_#t~mem254, main_#t~mem255.base, main_#t~mem255.offset, main_#t~mem256.base, main_#t~mem256.offset, main_#t~mem257.base, main_#t~mem257.offset, main_#t~mem258.base, main_#t~mem258.offset, main_#t~mem259.base, main_#t~mem259.offset, main_#t~mem260, main_#t~mem261.base, main_#t~mem261.offset, main_#t~mem264, main_#t~mem262.base, main_#t~mem262.offset, main_#t~mem263, main_#t~mem265.base, main_#t~mem265.offset, main_#t~mem266.base, main_#t~mem266.offset, main_#t~mem267, main_#t~post268, main_#t~mem269.base, main_#t~mem269.offset, main_#t~mem270.base, main_#t~mem270.offset, main_#t~mem271.base, main_#t~mem271.offset, main_#t~mem272.base, main_#t~mem272.offset, main_#t~mem273.base, main_#t~mem273.offset, main_#t~mem274.base, main_#t~mem274.offset, main_#t~mem275.base, main_#t~mem275.offset, main_#t~mem276.base, main_#t~mem276.offset, main_~_hd_head~1.base, main_~_hd_head~1.offset, main_#t~mem277.base, main_#t~mem277.offset, main_#t~mem278, main_#t~post279, main_~_hd_bkt~1, main_~_hd_hh_del~1.base, main_~_hd_hh_del~1.offset, main_#t~ite238.base, main_#t~ite238.offset, main_#t~mem237.base, main_#t~mem237.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 1137#L735-4 [2021-11-07 08:28:49,305 INFO L793 eck$LassoCheckResult]: Loop: 1137#L735-4 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 1149#L735-1 assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 1107#L737 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 1108#L737-2 call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 1182#L742-124 havoc main_~_ha_hashv~0; 1183#L742-49 goto; 1129#L742-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 1130#L742-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 1170#L742-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch26 := 11 == main_~_hj_k~0; 1291#L742-10 assume main_#t~switch26;call main_#t~mem27 := read~int(main_~_hj_key~0.base, 10 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 16777216 * (main_#t~mem27 % 256);havoc main_#t~mem27; 1169#L742-12 main_#t~switch26 := main_#t~switch26 || 10 == main_~_hj_k~0; 1145#L742-13 assume main_#t~switch26;call main_#t~mem28 := read~int(main_~_hj_key~0.base, 9 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 65536 * (main_#t~mem28 % 256);havoc main_#t~mem28; 1146#L742-15 main_#t~switch26 := main_#t~switch26 || 9 == main_~_hj_k~0; 1231#L742-16 assume main_#t~switch26;call main_#t~mem29 := read~int(main_~_hj_key~0.base, 8 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 256 * (main_#t~mem29 % 256);havoc main_#t~mem29; 1109#L742-18 main_#t~switch26 := main_#t~switch26 || 8 == main_~_hj_k~0; 1110#L742-19 assume main_#t~switch26;call main_#t~mem30 := read~int(main_~_hj_key~0.base, 7 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 16777216 * (main_#t~mem30 % 256);havoc main_#t~mem30; 1194#L742-21 main_#t~switch26 := main_#t~switch26 || 7 == main_~_hj_k~0; 1225#L742-22 assume main_#t~switch26;call main_#t~mem31 := read~int(main_~_hj_key~0.base, 6 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 65536 * (main_#t~mem31 % 256);havoc main_#t~mem31; 1276#L742-24 main_#t~switch26 := main_#t~switch26 || 6 == main_~_hj_k~0; 1277#L742-25 assume main_#t~switch26;call main_#t~mem32 := read~int(main_~_hj_key~0.base, 5 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 256 * (main_#t~mem32 % 256);havoc main_#t~mem32; 1284#L742-27 main_#t~switch26 := main_#t~switch26 || 5 == main_~_hj_k~0; 1256#L742-28 assume main_#t~switch26;call main_#t~mem33 := read~int(main_~_hj_key~0.base, 4 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + main_#t~mem33 % 256;havoc main_#t~mem33; 1247#L742-30 main_#t~switch26 := main_#t~switch26 || 4 == main_~_hj_k~0; 1248#L742-31 assume main_#t~switch26;call main_#t~mem34 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem34 % 256);havoc main_#t~mem34; 1158#L742-33 main_#t~switch26 := main_#t~switch26 || 3 == main_~_hj_k~0; 1159#L742-34 assume main_#t~switch26;call main_#t~mem35 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem35 % 256);havoc main_#t~mem35; 1245#L742-36 main_#t~switch26 := main_#t~switch26 || 2 == main_~_hj_k~0; 1237#L742-37 assume main_#t~switch26;call main_#t~mem36 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem36 % 256);havoc main_#t~mem36; 1188#L742-39 main_#t~switch26 := main_#t~switch26 || 1 == main_~_hj_k~0; 1189#L742-40 assume main_#t~switch26;call main_#t~mem37 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem37 % 256;havoc main_#t~mem37; 1240#L742-42 havoc main_#t~switch26; 1288#L742-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 1224#L742-44 goto; 1164#L742-46 goto; 1165#L742-48 goto; 1127#L742-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 1128#L742-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset; 1290#L742-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_#t~mem56.base, 16 + main_#t~mem56.offset, 4);call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 20 + main_#t~mem58.offset, 4);call write~$Pointer$(main_#t~mem57.base, main_#t~mem57.offset - main_#t~mem59, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57.base, main_#t~mem57.offset;havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem61.base, 8 + main_#t~mem61.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset;havoc main_#t~mem61.base, main_#t~mem61.offset;call main_#t~mem62.base, main_#t~mem62.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem62.base, 16 + main_#t~mem62.offset, 4);havoc main_#t~mem62.base, main_#t~mem62.offset; 1213#L742-66 goto; 1214#L742-120 havoc main_~_ha_bkt~0;call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64 := read~int(main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);main_#t~post65 := main_#t~mem64;call write~int(1 + main_#t~post65, main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64;havoc main_#t~post65; 1229#L742-71 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67 := read~int(main_#t~mem66.base, 4 + main_#t~mem66.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem67 - 1);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67; 1268#L742-70 goto; 1269#L742-118 call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_#t~mem68.base, main_#t~mem68.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem69.base, main_#t~mem69.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68.base, main_#t~mem68.offset;havoc main_#t~mem69.base, main_#t~mem69.offset;call main_#t~mem70 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post71 := main_#t~mem70;call write~int(1 + main_#t~post71, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem70;havoc main_#t~post71;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem72.base, main_#t~mem72.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem73.base, main_#t~mem73.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 1168#L742-73 assume main_#t~mem73.base != 0 || main_#t~mem73.offset != 0;havoc main_#t~mem73.base, main_#t~mem73.offset;call main_#t~mem74.base, main_#t~mem74.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem74.base, 12 + main_#t~mem74.offset, 4);havoc main_#t~mem74.base, main_#t~mem74.offset; 1097#L742-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem76 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem75 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short79 := main_#t~mem76 % 4294967296 >= 10 * (1 + main_#t~mem75) % 4294967296; 1098#L742-76 assume main_#t~short79;call main_#t~mem77.base, main_#t~mem77.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem78 := read~int(main_#t~mem77.base, 36 + main_#t~mem77.offset, 4);main_#t~short79 := 0 == main_#t~mem78 % 4294967296; 1151#L742-78 assume !main_#t~short79;havoc main_#t~mem76;havoc main_#t~mem75;havoc main_#t~mem77.base, main_#t~mem77.offset;havoc main_#t~mem78;havoc main_#t~short79; 1153#L742-117 goto; 1101#L742-119 goto; 1102#L742-121 goto; 1186#L742-123 goto; 1136#L735-3 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 1137#L735-4 [2021-11-07 08:28:49,306 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:28:49,306 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2021-11-07 08:28:49,306 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:28:49,306 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [905256435] [2021-11-07 08:28:49,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:28:49,307 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:28:49,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:28:49,358 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:28:49,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:28:49,414 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:28:49,415 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:28:49,416 INFO L85 PathProgramCache]: Analyzing trace with hash -726571605, now seen corresponding path program 1 times [2021-11-07 08:28:49,416 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:28:49,417 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [65133011] [2021-11-07 08:28:49,418 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:28:49,418 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:28:49,446 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 08:28:49,446 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [699860823] [2021-11-07 08:28:49,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:28:49,447 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:28:49,447 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:28:49,452 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:28:49,475 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-11-07 08:28:49,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:28:49,679 INFO L263 TraceCheckSpWp]: Trace formula consists of 314 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-07 08:28:49,684 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 08:28:49,844 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:28:49,844 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:28:49,844 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [65133011] [2021-11-07 08:28:49,845 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-07 08:28:49,845 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [699860823] [2021-11-07 08:28:49,846 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [699860823] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 08:28:49,846 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 08:28:49,846 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-07 08:28:49,847 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1507068251] [2021-11-07 08:28:49,848 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:28:49,848 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:28:49,848 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-07 08:28:49,849 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-07 08:28:49,849 INFO L87 Difference]: Start difference. First operand 240 states and 312 transitions. cyclomatic complexity: 77 Second operand has 4 states, 4 states have (on average 13.0) internal successors, (52), 4 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:28:49,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:28:49,966 INFO L93 Difference]: Finished difference Result 359 states and 469 transitions. [2021-11-07 08:28:49,966 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-07 08:28:49,967 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 359 states and 469 transitions. [2021-11-07 08:28:49,970 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 336 [2021-11-07 08:28:49,976 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 359 states to 359 states and 469 transitions. [2021-11-07 08:28:49,977 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 359 [2021-11-07 08:28:49,978 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 359 [2021-11-07 08:28:49,978 INFO L73 IsDeterministic]: Start isDeterministic. Operand 359 states and 469 transitions. [2021-11-07 08:28:49,986 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:28:49,986 INFO L681 BuchiCegarLoop]: Abstraction has 359 states and 469 transitions. [2021-11-07 08:28:49,987 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 359 states and 469 transitions. [2021-11-07 08:28:50,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 359 to 226. [2021-11-07 08:28:50,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 226 states, 222 states have (on average 1.2837837837837838) internal successors, (285), 221 states have internal predecessors, (285), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:28:50,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 226 states to 226 states and 291 transitions. [2021-11-07 08:28:50,007 INFO L704 BuchiCegarLoop]: Abstraction has 226 states and 291 transitions. [2021-11-07 08:28:50,008 INFO L587 BuchiCegarLoop]: Abstraction has 226 states and 291 transitions. [2021-11-07 08:28:50,008 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-11-07 08:28:50,008 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 226 states and 291 transitions. [2021-11-07 08:28:50,009 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 215 [2021-11-07 08:28:50,010 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:28:50,010 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:28:50,021 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:28:50,022 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 08:28:50,022 INFO L791 eck$LassoCheckResult]: Stem: 2059#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 2037#L-1 havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem149, main_#t~mem148, main_#t~mem150, main_#t~mem151, main_#t~mem153, main_#t~mem152, main_#t~mem154, main_#t~mem155, main_#t~mem157, main_#t~mem156, main_#t~mem158, main_#t~mem159, main_#t~switch160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem172.base, main_#t~mem172.offset, main_#t~mem173, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181, main_#t~mem182, main_#t~mem183, main_#t~short184, main_#t~mem185.base, main_#t~mem185.offset, main_#t~ret186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem191.base, main_#t~mem191.offset, main_#t~mem192.base, main_#t~mem192.offset, main_#t~short193, main_#t~mem194.base, main_#t~mem194.offset, main_#t~mem195.base, main_#t~mem195.offset, main_#t~mem196.base, main_#t~mem196.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~mem199.base, main_#t~mem199.offset, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204.base, main_#t~mem204.offset, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208.base, main_#t~mem208.offset, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem216, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215, main_#t~mem217.base, main_#t~mem217.offset, main_#t~mem218.base, main_#t~mem218.offset, main_#t~mem219, main_#t~post220, main_#t~mem221.base, main_#t~mem221.offset, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225.base, main_#t~mem225.offset, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230, main_#t~post231, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem146, main_#t~mem147, main_#t~mem233, main_#t~mem234, main_#t~mem232.base, main_#t~mem232.offset, main_#t~ite236.base, main_#t~ite236.offset, main_#t~mem235.base, main_#t~mem235.offset, main_#t~mem239.base, main_#t~mem239.offset, main_#t~mem240.base, main_#t~mem240.offset, main_#t~short241, main_#t~mem242.base, main_#t~mem242.offset, main_#t~mem243.base, main_#t~mem243.offset, main_#t~mem244.base, main_#t~mem244.offset, main_#t~mem245.base, main_#t~mem245.offset, main_#t~mem246.base, main_#t~mem246.offset, main_#t~mem247.base, main_#t~mem247.offset, main_#t~mem248.base, main_#t~mem248.offset, main_#t~mem249.base, main_#t~mem249.offset, main_#t~mem250, main_#t~mem251.base, main_#t~mem251.offset, main_#t~mem252.base, main_#t~mem252.offset, main_#t~mem253.base, main_#t~mem253.offset, main_#t~mem254, main_#t~mem255.base, main_#t~mem255.offset, main_#t~mem256.base, main_#t~mem256.offset, main_#t~mem257.base, main_#t~mem257.offset, main_#t~mem258.base, main_#t~mem258.offset, main_#t~mem259.base, main_#t~mem259.offset, main_#t~mem260, main_#t~mem261.base, main_#t~mem261.offset, main_#t~mem264, main_#t~mem262.base, main_#t~mem262.offset, main_#t~mem263, main_#t~mem265.base, main_#t~mem265.offset, main_#t~mem266.base, main_#t~mem266.offset, main_#t~mem267, main_#t~post268, main_#t~mem269.base, main_#t~mem269.offset, main_#t~mem270.base, main_#t~mem270.offset, main_#t~mem271.base, main_#t~mem271.offset, main_#t~mem272.base, main_#t~mem272.offset, main_#t~mem273.base, main_#t~mem273.offset, main_#t~mem274.base, main_#t~mem274.offset, main_#t~mem275.base, main_#t~mem275.offset, main_#t~mem276.base, main_#t~mem276.offset, main_~_hd_head~1.base, main_~_hd_head~1.offset, main_#t~mem277.base, main_#t~mem277.offset, main_#t~mem278, main_#t~post279, main_~_hd_bkt~1, main_~_hd_hh_del~1.base, main_~_hd_hh_del~1.offset, main_#t~ite238.base, main_#t~ite238.offset, main_#t~mem237.base, main_#t~mem237.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 1898#L735-4 [2021-11-07 08:28:50,023 INFO L793 eck$LassoCheckResult]: Loop: 1898#L735-4 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 1910#L735-1 assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 1868#L737 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 1869#L737-2 call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 1945#L742-124 havoc main_~_ha_hashv~0; 1946#L742-49 goto; 1890#L742-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 1891#L742-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 1932#L742-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch26 := 11 == main_~_hj_k~0; 2053#L742-10 assume !main_#t~switch26; 1930#L742-12 main_#t~switch26 := main_#t~switch26 || 10 == main_~_hj_k~0; 1906#L742-13 assume !main_#t~switch26; 1907#L742-15 main_#t~switch26 := main_#t~switch26 || 9 == main_~_hj_k~0; 1992#L742-16 assume !main_#t~switch26; 1870#L742-18 main_#t~switch26 := main_#t~switch26 || 8 == main_~_hj_k~0; 1871#L742-19 assume !main_#t~switch26; 1955#L742-21 main_#t~switch26 := main_#t~switch26 || 7 == main_~_hj_k~0; 1986#L742-22 assume !main_#t~switch26; 2038#L742-24 main_#t~switch26 := main_#t~switch26 || 6 == main_~_hj_k~0; 2039#L742-25 assume !main_#t~switch26; 1938#L742-27 main_#t~switch26 := main_#t~switch26 || 5 == main_~_hj_k~0; 1939#L742-28 assume !main_#t~switch26; 2010#L742-30 main_#t~switch26 := main_#t~switch26 || 4 == main_~_hj_k~0; 2011#L742-31 assume !main_#t~switch26; 2045#L742-33 main_#t~switch26 := main_#t~switch26 || 3 == main_~_hj_k~0; 2060#L742-34 assume main_#t~switch26;call main_#t~mem35 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem35 % 256);havoc main_#t~mem35; 2008#L742-36 main_#t~switch26 := main_#t~switch26 || 2 == main_~_hj_k~0; 1996#L742-37 assume main_#t~switch26;call main_#t~mem36 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem36 % 256);havoc main_#t~mem36; 1997#L742-39 main_#t~switch26 := main_#t~switch26 || 1 == main_~_hj_k~0; 2001#L742-40 assume main_#t~switch26;call main_#t~mem37 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem37 % 256;havoc main_#t~mem37; 2002#L742-42 havoc main_#t~switch26; 2050#L742-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 1985#L742-44 goto; 1925#L742-46 goto; 1926#L742-48 goto; 1888#L742-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 1889#L742-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset; 2052#L742-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_#t~mem56.base, 16 + main_#t~mem56.offset, 4);call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 20 + main_#t~mem58.offset, 4);call write~$Pointer$(main_#t~mem57.base, main_#t~mem57.offset - main_#t~mem59, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57.base, main_#t~mem57.offset;havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem61.base, 8 + main_#t~mem61.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset;havoc main_#t~mem61.base, main_#t~mem61.offset;call main_#t~mem62.base, main_#t~mem62.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem62.base, 16 + main_#t~mem62.offset, 4);havoc main_#t~mem62.base, main_#t~mem62.offset; 1972#L742-66 goto; 1973#L742-120 havoc main_~_ha_bkt~0;call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64 := read~int(main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);main_#t~post65 := main_#t~mem64;call write~int(1 + main_#t~post65, main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64;havoc main_#t~post65; 1990#L742-71 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67 := read~int(main_#t~mem66.base, 4 + main_#t~mem66.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem67 - 1);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67; 2030#L742-70 goto; 2031#L742-118 call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_#t~mem68.base, main_#t~mem68.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem69.base, main_#t~mem69.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68.base, main_#t~mem68.offset;havoc main_#t~mem69.base, main_#t~mem69.offset;call main_#t~mem70 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post71 := main_#t~mem70;call write~int(1 + main_#t~post71, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem70;havoc main_#t~post71;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem72.base, main_#t~mem72.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem73.base, main_#t~mem73.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 1927#L742-73 assume main_#t~mem73.base != 0 || main_#t~mem73.offset != 0;havoc main_#t~mem73.base, main_#t~mem73.offset;call main_#t~mem74.base, main_#t~mem74.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem74.base, 12 + main_#t~mem74.offset, 4);havoc main_#t~mem74.base, main_#t~mem74.offset; 1858#L742-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem76 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem75 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short79 := main_#t~mem76 % 4294967296 >= 10 * (1 + main_#t~mem75) % 4294967296; 1859#L742-76 assume main_#t~short79;call main_#t~mem77.base, main_#t~mem77.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem78 := read~int(main_#t~mem77.base, 36 + main_#t~mem77.offset, 4);main_#t~short79 := 0 == main_#t~mem78 % 4294967296; 1912#L742-78 assume !main_#t~short79;havoc main_#t~mem76;havoc main_#t~mem75;havoc main_#t~mem77.base, main_#t~mem77.offset;havoc main_#t~mem78;havoc main_#t~short79; 1914#L742-117 goto; 1862#L742-119 goto; 1863#L742-121 goto; 1948#L742-123 goto; 1897#L735-3 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 1898#L735-4 [2021-11-07 08:28:50,023 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:28:50,023 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2021-11-07 08:28:50,023 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:28:50,024 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1062664045] [2021-11-07 08:28:50,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:28:50,029 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:28:50,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:28:50,068 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:28:50,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:28:50,107 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:28:50,108 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:28:50,108 INFO L85 PathProgramCache]: Analyzing trace with hash -1214742597, now seen corresponding path program 1 times [2021-11-07 08:28:50,109 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:28:50,116 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [703512746] [2021-11-07 08:28:50,116 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:28:50,116 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:28:50,137 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 08:28:50,137 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [309355914] [2021-11-07 08:28:50,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:28:50,137 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:28:50,138 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:28:50,176 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:28:50,198 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-11-07 08:28:50,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:28:50,399 INFO L263 TraceCheckSpWp]: Trace formula consists of 266 conjuncts, 4 conjunts are in the unsatisfiable core [2021-11-07 08:28:50,401 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 08:28:50,589 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:28:50,590 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:28:50,590 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [703512746] [2021-11-07 08:28:50,590 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-07 08:28:50,590 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [309355914] [2021-11-07 08:28:50,590 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [309355914] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 08:28:50,591 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 08:28:50,591 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-07 08:28:50,591 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [478378778] [2021-11-07 08:28:50,591 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:28:50,592 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:28:50,592 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-11-07 08:28:50,592 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-11-07 08:28:50,593 INFO L87 Difference]: Start difference. First operand 226 states and 291 transitions. cyclomatic complexity: 70 Second operand has 5 states, 5 states have (on average 10.4) internal successors, (52), 5 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:28:50,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:28:50,745 INFO L93 Difference]: Finished difference Result 447 states and 574 transitions. [2021-11-07 08:28:50,746 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-11-07 08:28:50,746 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 447 states and 574 transitions. [2021-11-07 08:28:50,751 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 431 [2021-11-07 08:28:50,756 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 447 states to 447 states and 574 transitions. [2021-11-07 08:28:50,757 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 447 [2021-11-07 08:28:50,757 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 447 [2021-11-07 08:28:50,757 INFO L73 IsDeterministic]: Start isDeterministic. Operand 447 states and 574 transitions. [2021-11-07 08:28:50,758 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:28:50,759 INFO L681 BuchiCegarLoop]: Abstraction has 447 states and 574 transitions. [2021-11-07 08:28:50,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 447 states and 574 transitions. [2021-11-07 08:28:50,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 447 to 249. [2021-11-07 08:28:50,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 249 states, 245 states have (on average 1.2653061224489797) internal successors, (310), 244 states have internal predecessors, (310), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:28:50,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 249 states to 249 states and 316 transitions. [2021-11-07 08:28:50,770 INFO L704 BuchiCegarLoop]: Abstraction has 249 states and 316 transitions. [2021-11-07 08:28:50,770 INFO L587 BuchiCegarLoop]: Abstraction has 249 states and 316 transitions. [2021-11-07 08:28:50,770 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-11-07 08:28:50,770 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 249 states and 316 transitions. [2021-11-07 08:28:50,772 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 238 [2021-11-07 08:28:50,772 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:28:50,772 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:28:50,773 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:28:50,773 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 08:28:50,773 INFO L791 eck$LassoCheckResult]: Stem: 2895#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 2873#L-1 havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem149, main_#t~mem148, main_#t~mem150, main_#t~mem151, main_#t~mem153, main_#t~mem152, main_#t~mem154, main_#t~mem155, main_#t~mem157, main_#t~mem156, main_#t~mem158, main_#t~mem159, main_#t~switch160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem172.base, main_#t~mem172.offset, main_#t~mem173, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181, main_#t~mem182, main_#t~mem183, main_#t~short184, main_#t~mem185.base, main_#t~mem185.offset, main_#t~ret186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem191.base, main_#t~mem191.offset, main_#t~mem192.base, main_#t~mem192.offset, main_#t~short193, main_#t~mem194.base, main_#t~mem194.offset, main_#t~mem195.base, main_#t~mem195.offset, main_#t~mem196.base, main_#t~mem196.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~mem199.base, main_#t~mem199.offset, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204.base, main_#t~mem204.offset, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208.base, main_#t~mem208.offset, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem216, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215, main_#t~mem217.base, main_#t~mem217.offset, main_#t~mem218.base, main_#t~mem218.offset, main_#t~mem219, main_#t~post220, main_#t~mem221.base, main_#t~mem221.offset, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225.base, main_#t~mem225.offset, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230, main_#t~post231, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem146, main_#t~mem147, main_#t~mem233, main_#t~mem234, main_#t~mem232.base, main_#t~mem232.offset, main_#t~ite236.base, main_#t~ite236.offset, main_#t~mem235.base, main_#t~mem235.offset, main_#t~mem239.base, main_#t~mem239.offset, main_#t~mem240.base, main_#t~mem240.offset, main_#t~short241, main_#t~mem242.base, main_#t~mem242.offset, main_#t~mem243.base, main_#t~mem243.offset, main_#t~mem244.base, main_#t~mem244.offset, main_#t~mem245.base, main_#t~mem245.offset, main_#t~mem246.base, main_#t~mem246.offset, main_#t~mem247.base, main_#t~mem247.offset, main_#t~mem248.base, main_#t~mem248.offset, main_#t~mem249.base, main_#t~mem249.offset, main_#t~mem250, main_#t~mem251.base, main_#t~mem251.offset, main_#t~mem252.base, main_#t~mem252.offset, main_#t~mem253.base, main_#t~mem253.offset, main_#t~mem254, main_#t~mem255.base, main_#t~mem255.offset, main_#t~mem256.base, main_#t~mem256.offset, main_#t~mem257.base, main_#t~mem257.offset, main_#t~mem258.base, main_#t~mem258.offset, main_#t~mem259.base, main_#t~mem259.offset, main_#t~mem260, main_#t~mem261.base, main_#t~mem261.offset, main_#t~mem264, main_#t~mem262.base, main_#t~mem262.offset, main_#t~mem263, main_#t~mem265.base, main_#t~mem265.offset, main_#t~mem266.base, main_#t~mem266.offset, main_#t~mem267, main_#t~post268, main_#t~mem269.base, main_#t~mem269.offset, main_#t~mem270.base, main_#t~mem270.offset, main_#t~mem271.base, main_#t~mem271.offset, main_#t~mem272.base, main_#t~mem272.offset, main_#t~mem273.base, main_#t~mem273.offset, main_#t~mem274.base, main_#t~mem274.offset, main_#t~mem275.base, main_#t~mem275.offset, main_#t~mem276.base, main_#t~mem276.offset, main_~_hd_head~1.base, main_~_hd_head~1.offset, main_#t~mem277.base, main_#t~mem277.offset, main_#t~mem278, main_#t~post279, main_~_hd_bkt~1, main_~_hd_hh_del~1.base, main_~_hd_hh_del~1.offset, main_#t~ite238.base, main_#t~ite238.offset, main_#t~mem237.base, main_#t~mem237.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 2732#L735-4 [2021-11-07 08:28:50,773 INFO L793 eck$LassoCheckResult]: Loop: 2732#L735-4 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 2744#L735-1 assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 2702#L737 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 2703#L737-2 call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 2778#L742-124 havoc main_~_ha_hashv~0; 2779#L742-49 goto; 2724#L742-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 2725#L742-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 2918#L742-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch26 := 11 == main_~_hj_k~0; 2917#L742-10 assume !main_#t~switch26; 2916#L742-12 main_#t~switch26 := main_#t~switch26 || 10 == main_~_hj_k~0; 2915#L742-13 assume !main_#t~switch26; 2914#L742-15 main_#t~switch26 := main_#t~switch26 || 9 == main_~_hj_k~0; 2913#L742-16 assume !main_#t~switch26; 2912#L742-18 main_#t~switch26 := main_#t~switch26 || 8 == main_~_hj_k~0; 2911#L742-19 assume !main_#t~switch26; 2910#L742-21 main_#t~switch26 := main_#t~switch26 || 7 == main_~_hj_k~0; 2909#L742-22 assume !main_#t~switch26; 2908#L742-24 main_#t~switch26 := main_#t~switch26 || 6 == main_~_hj_k~0; 2907#L742-25 assume !main_#t~switch26; 2906#L742-27 main_#t~switch26 := main_#t~switch26 || 5 == main_~_hj_k~0; 2905#L742-28 assume !main_#t~switch26; 2904#L742-30 main_#t~switch26 := main_#t~switch26 || 4 == main_~_hj_k~0; 2903#L742-31 assume main_#t~switch26;call main_#t~mem34 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem34 % 256);havoc main_#t~mem34; 2753#L742-33 main_#t~switch26 := main_#t~switch26 || 3 == main_~_hj_k~0; 2754#L742-34 assume main_#t~switch26;call main_#t~mem35 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem35 % 256);havoc main_#t~mem35; 2843#L742-36 main_#t~switch26 := main_#t~switch26 || 2 == main_~_hj_k~0; 2854#L742-37 assume main_#t~switch26;call main_#t~mem36 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem36 % 256);havoc main_#t~mem36; 2784#L742-39 main_#t~switch26 := main_#t~switch26 || 1 == main_~_hj_k~0; 2785#L742-40 assume main_#t~switch26;call main_#t~mem37 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem37 % 256;havoc main_#t~mem37; 2837#L742-42 havoc main_#t~switch26; 2886#L742-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 2820#L742-44 goto; 2759#L742-46 goto; 2760#L742-48 goto; 2722#L742-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 2723#L742-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset; 2888#L742-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_#t~mem56.base, 16 + main_#t~mem56.offset, 4);call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 20 + main_#t~mem58.offset, 4);call write~$Pointer$(main_#t~mem57.base, main_#t~mem57.offset - main_#t~mem59, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57.base, main_#t~mem57.offset;havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem61.base, 8 + main_#t~mem61.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset;havoc main_#t~mem61.base, main_#t~mem61.offset;call main_#t~mem62.base, main_#t~mem62.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem62.base, 16 + main_#t~mem62.offset, 4);havoc main_#t~mem62.base, main_#t~mem62.offset; 2809#L742-66 goto; 2810#L742-120 havoc main_~_ha_bkt~0;call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64 := read~int(main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);main_#t~post65 := main_#t~mem64;call write~int(1 + main_#t~post65, main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64;havoc main_#t~post65; 2825#L742-71 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67 := read~int(main_#t~mem66.base, 4 + main_#t~mem66.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem67 - 1);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67; 2866#L742-70 goto; 2867#L742-118 call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_#t~mem68.base, main_#t~mem68.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem69.base, main_#t~mem69.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68.base, main_#t~mem68.offset;havoc main_#t~mem69.base, main_#t~mem69.offset;call main_#t~mem70 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post71 := main_#t~mem70;call write~int(1 + main_#t~post71, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem70;havoc main_#t~post71;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem72.base, main_#t~mem72.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem73.base, main_#t~mem73.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 2761#L742-73 assume main_#t~mem73.base != 0 || main_#t~mem73.offset != 0;havoc main_#t~mem73.base, main_#t~mem73.offset;call main_#t~mem74.base, main_#t~mem74.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem74.base, 12 + main_#t~mem74.offset, 4);havoc main_#t~mem74.base, main_#t~mem74.offset; 2692#L742-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem76 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem75 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short79 := main_#t~mem76 % 4294967296 >= 10 * (1 + main_#t~mem75) % 4294967296; 2693#L742-76 assume main_#t~short79;call main_#t~mem77.base, main_#t~mem77.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem78 := read~int(main_#t~mem77.base, 36 + main_#t~mem77.offset, 4);main_#t~short79 := 0 == main_#t~mem78 % 4294967296; 2746#L742-78 assume !main_#t~short79;havoc main_#t~mem76;havoc main_#t~mem75;havoc main_#t~mem77.base, main_#t~mem77.offset;havoc main_#t~mem78;havoc main_#t~short79; 2748#L742-117 goto; 2696#L742-119 goto; 2697#L742-121 goto; 2783#L742-123 goto; 2731#L735-3 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 2732#L735-4 [2021-11-07 08:28:50,774 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:28:50,774 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 5 times [2021-11-07 08:28:50,774 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:28:50,775 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [68524153] [2021-11-07 08:28:50,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:28:50,775 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:28:50,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:28:50,789 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:28:50,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:28:50,816 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:28:50,819 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:28:50,819 INFO L85 PathProgramCache]: Analyzing trace with hash 1694021305, now seen corresponding path program 1 times [2021-11-07 08:28:50,819 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:28:50,819 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1771270638] [2021-11-07 08:28:50,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:28:50,820 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:28:50,838 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 08:28:50,838 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [821445688] [2021-11-07 08:28:50,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:28:50,839 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:28:50,839 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:28:50,841 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:28:50,863 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-11-07 08:28:56,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:28:56,446 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:29:30,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:29:30,518 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:29:30,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:29:30,519 INFO L85 PathProgramCache]: Analyzing trace with hash -40931685, now seen corresponding path program 1 times [2021-11-07 08:29:30,520 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:29:30,520 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [528430896] [2021-11-07 08:29:30,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:29:30,521 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:29:30,538 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 08:29:30,539 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1813812741] [2021-11-07 08:29:30,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:29:30,539 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:29:30,540 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:29:30,541 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:29:30,550 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf746b44-e798-4046-9363-8b359d78967e/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2021-11-07 08:29:30,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:29:30,849 INFO L263 TraceCheckSpWp]: Trace formula consists of 316 conjuncts, 5 conjunts are in the unsatisfiable core [2021-11-07 08:29:30,866 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 08:29:31,252 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:29:31,252 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:29:31,252 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [528430896] [2021-11-07 08:29:31,253 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-07 08:29:31,253 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1813812741] [2021-11-07 08:29:31,253 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1813812741] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 08:29:31,253 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 08:29:31,254 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-07 08:29:31,254 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1117879579]