./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test2-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 47ea0209 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test2-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 816e37c4bcf3aac0429d508c13e4e6eeab848e29c3869a32879e05a2b79a73a3 --- Real Ultimate output --- This is Ultimate 0.2.1-dev-47ea020 [2021-11-07 07:42:25,555 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-07 07:42:25,558 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-07 07:42:25,613 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-07 07:42:25,613 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-07 07:42:25,618 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-07 07:42:25,620 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-07 07:42:25,624 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-07 07:42:25,626 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-07 07:42:25,632 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-07 07:42:25,633 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-07 07:42:25,635 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-07 07:42:25,635 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-07 07:42:25,638 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-07 07:42:25,640 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-07 07:42:25,645 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-07 07:42:25,646 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-07 07:42:25,647 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-07 07:42:25,650 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-07 07:42:25,658 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-07 07:42:25,659 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-07 07:42:25,661 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-07 07:42:25,664 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-07 07:42:25,665 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-07 07:42:25,674 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-07 07:42:25,674 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-07 07:42:25,675 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-07 07:42:25,676 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-07 07:42:25,677 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-07 07:42:25,679 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-07 07:42:25,679 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-07 07:42:25,680 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-07 07:42:25,682 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-07 07:42:25,683 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-07 07:42:25,684 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-07 07:42:25,684 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-07 07:42:25,685 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-07 07:42:25,685 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-07 07:42:25,686 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-07 07:42:25,686 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-07 07:42:25,687 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-07 07:42:25,688 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-11-07 07:42:25,736 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-07 07:42:25,736 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-07 07:42:25,736 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-07 07:42:25,737 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-07 07:42:25,738 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-07 07:42:25,738 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-07 07:42:25,738 INFO L138 SettingsManager]: * Use SBE=true [2021-11-07 07:42:25,739 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-11-07 07:42:25,739 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-11-07 07:42:25,739 INFO L138 SettingsManager]: * Use old map elimination=false [2021-11-07 07:42:25,740 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-11-07 07:42:25,740 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-11-07 07:42:25,740 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-11-07 07:42:25,741 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-07 07:42:25,741 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-07 07:42:25,741 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-11-07 07:42:25,741 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-07 07:42:25,741 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-07 07:42:25,741 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-07 07:42:25,742 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-11-07 07:42:25,742 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-11-07 07:42:25,742 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-11-07 07:42:25,742 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-07 07:42:25,742 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-07 07:42:25,743 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-11-07 07:42:25,743 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-07 07:42:25,744 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-11-07 07:42:25,744 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-07 07:42:25,745 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-07 07:42:25,745 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-07 07:42:25,745 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-07 07:42:25,745 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-07 07:42:25,746 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-11-07 07:42:25,747 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 816e37c4bcf3aac0429d508c13e4e6eeab848e29c3869a32879e05a2b79a73a3 [2021-11-07 07:42:26,040 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-07 07:42:26,061 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-07 07:42:26,063 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-07 07:42:26,065 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-07 07:42:26,066 INFO L275 PluginConnector]: CDTParser initialized [2021-11-07 07:42:26,067 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test2-2.i [2021-11-07 07:42:26,137 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/data/26f6c0a6c/a6e716de983a426ba013683bcd4e5cdd/FLAG7ce1cef3c [2021-11-07 07:42:26,795 INFO L306 CDTParser]: Found 1 translation units. [2021-11-07 07:42:26,798 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test2-2.i [2021-11-07 07:42:26,815 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/data/26f6c0a6c/a6e716de983a426ba013683bcd4e5cdd/FLAG7ce1cef3c [2021-11-07 07:42:26,993 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/data/26f6c0a6c/a6e716de983a426ba013683bcd4e5cdd [2021-11-07 07:42:26,995 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-07 07:42:26,998 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-07 07:42:27,001 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-07 07:42:27,002 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-07 07:42:27,005 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-07 07:42:27,006 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.11 07:42:26" (1/1) ... [2021-11-07 07:42:27,008 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3b89f996 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:42:27, skipping insertion in model container [2021-11-07 07:42:27,008 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.11 07:42:26" (1/1) ... [2021-11-07 07:42:27,015 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-07 07:42:27,096 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-07 07:42:27,624 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test2-2.i[37019,37032] [2021-11-07 07:42:27,759 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test2-2.i[47352,47365] [2021-11-07 07:42:27,774 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-07 07:42:27,782 INFO L203 MainTranslator]: Completed pre-run [2021-11-07 07:42:27,811 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test2-2.i[37019,37032] [2021-11-07 07:42:27,853 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test2-2.i[47352,47365] [2021-11-07 07:42:27,863 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-07 07:42:27,910 INFO L208 MainTranslator]: Completed translation [2021-11-07 07:42:27,910 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:42:27 WrapperNode [2021-11-07 07:42:27,910 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-07 07:42:27,912 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-07 07:42:27,912 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-07 07:42:27,912 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-07 07:42:27,919 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:42:27" (1/1) ... [2021-11-07 07:42:27,949 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:42:27" (1/1) ... [2021-11-07 07:42:28,048 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-07 07:42:28,049 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-07 07:42:28,049 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-07 07:42:28,050 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-07 07:42:28,058 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:42:27" (1/1) ... [2021-11-07 07:42:28,058 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:42:27" (1/1) ... [2021-11-07 07:42:28,069 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:42:27" (1/1) ... [2021-11-07 07:42:28,070 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:42:27" (1/1) ... [2021-11-07 07:42:28,127 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:42:27" (1/1) ... [2021-11-07 07:42:28,141 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:42:27" (1/1) ... [2021-11-07 07:42:28,150 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:42:27" (1/1) ... [2021-11-07 07:42:28,169 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-07 07:42:28,171 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-07 07:42:28,172 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-07 07:42:28,172 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-07 07:42:28,173 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:42:27" (1/1) ... [2021-11-07 07:42:28,180 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-07 07:42:28,194 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 07:42:28,212 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-07 07:42:28,247 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-11-07 07:42:28,265 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2021-11-07 07:42:28,265 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2021-11-07 07:42:28,265 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-07 07:42:28,265 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2021-11-07 07:42:28,265 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-11-07 07:42:28,266 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-07 07:42:28,266 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-11-07 07:42:28,267 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-07 07:42:28,267 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-11-07 07:42:28,267 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-11-07 07:42:28,267 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-07 07:42:28,267 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-07 07:42:28,268 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-07 07:42:28,560 WARN L805 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-11-07 07:42:29,807 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-07 07:42:29,808 INFO L299 CfgBuilder]: Removed 79 assume(true) statements. [2021-11-07 07:42:29,810 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.11 07:42:29 BoogieIcfgContainer [2021-11-07 07:42:29,810 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-07 07:42:29,811 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-11-07 07:42:29,811 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-11-07 07:42:29,814 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-11-07 07:42:29,815 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 07:42:29,815 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 07.11 07:42:26" (1/3) ... [2021-11-07 07:42:29,817 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5ebf3e85 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 07.11 07:42:29, skipping insertion in model container [2021-11-07 07:42:29,817 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 07:42:29,817 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:42:27" (2/3) ... [2021-11-07 07:42:29,817 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@5ebf3e85 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 07.11 07:42:29, skipping insertion in model container [2021-11-07 07:42:29,817 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 07:42:29,818 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.11 07:42:29" (3/3) ... [2021-11-07 07:42:29,819 INFO L389 chiAutomizerObserver]: Analyzing ICFG uthash_JEN_test2-2.i [2021-11-07 07:42:29,862 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-11-07 07:42:29,862 INFO L360 BuchiCegarLoop]: Hoare is false [2021-11-07 07:42:29,862 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-11-07 07:42:29,862 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-11-07 07:42:29,862 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-11-07 07:42:29,862 INFO L364 BuchiCegarLoop]: Difference is false [2021-11-07 07:42:29,863 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-11-07 07:42:29,863 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-11-07 07:42:29,886 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 199 states, 194 states have (on average 1.6958762886597938) internal successors, (329), 194 states have internal predecessors, (329), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 07:42:29,942 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 185 [2021-11-07 07:42:29,942 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 07:42:29,942 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 07:42:29,954 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 07:42:29,954 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2021-11-07 07:42:29,954 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-11-07 07:42:29,958 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 199 states, 194 states have (on average 1.6958762886597938) internal successors, (329), 194 states have internal predecessors, (329), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 07:42:29,974 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 185 [2021-11-07 07:42:29,975 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 07:42:29,975 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 07:42:29,975 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 07:42:29,976 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2021-11-07 07:42:29,981 INFO L791 eck$LassoCheckResult]: Stem: 187#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 120#L-1true havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem149, main_#t~mem148, main_#t~mem150, main_#t~mem151, main_#t~mem153, main_#t~mem152, main_#t~mem154, main_#t~mem155, main_#t~mem157, main_#t~mem156, main_#t~mem158, main_#t~mem159, main_#t~switch160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem172.base, main_#t~mem172.offset, main_#t~mem173, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181, main_#t~mem182, main_#t~mem183, main_#t~short184, main_#t~mem185.base, main_#t~mem185.offset, main_#t~ret186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem191, main_#t~mem192, main_#t~mem146, main_#t~mem147, main_#t~ite194.base, main_#t~ite194.offset, main_#t~mem193.base, main_#t~mem193.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~short199, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202.base, main_#t~mem202.offset, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204.base, main_#t~mem204.offset, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206.base, main_#t~mem206.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem216.base, main_#t~mem216.offset, main_#t~mem217.base, main_#t~mem217.offset, main_#t~mem218, main_#t~mem219.base, main_#t~mem219.offset, main_#t~mem222, main_#t~mem220.base, main_#t~mem220.offset, main_#t~mem221, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225, main_#t~post226, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232.base, main_#t~mem232.offset, main_#t~mem233.base, main_#t~mem233.offset, main_#t~mem234.base, main_#t~mem234.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem235.base, main_#t~mem235.offset, main_#t~mem236, main_#t~post237, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~ite196.base, main_#t~ite196.offset, main_#t~mem195.base, main_#t~mem195.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 66#L814-4true [2021-11-07 07:42:29,982 INFO L793 eck$LassoCheckResult]: Loop: 66#L814-4true call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 155#L814-1true assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 141#L816true assume main_~user~0.base == 0 && main_~user~0.offset == 0;assume false; 142#L816-2true call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 83#L821-124true assume !true; 27#L814-3true call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 66#L814-4true [2021-11-07 07:42:29,987 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 07:42:29,988 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2021-11-07 07:42:29,997 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 07:42:29,997 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1940999693] [2021-11-07 07:42:29,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:42:29,998 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 07:42:30,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 07:42:30,126 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 07:42:30,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 07:42:30,227 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 07:42:30,230 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 07:42:30,230 INFO L85 PathProgramCache]: Analyzing trace with hash 1336134572, now seen corresponding path program 1 times [2021-11-07 07:42:30,231 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 07:42:30,232 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [401153104] [2021-11-07 07:42:30,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:42:30,232 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 07:42:30,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 07:42:30,326 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 07:42:30,326 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 07:42:30,326 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [401153104] [2021-11-07 07:42:30,327 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [401153104] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 07:42:30,327 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 07:42:30,328 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-07 07:42:30,328 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1724152034] [2021-11-07 07:42:30,333 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 07:42:30,334 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 07:42:30,348 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-11-07 07:42:30,349 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-11-07 07:42:30,352 INFO L87 Difference]: Start difference. First operand has 199 states, 194 states have (on average 1.6958762886597938) internal successors, (329), 194 states have internal predecessors, (329), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 07:42:30,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 07:42:30,372 INFO L93 Difference]: Finished difference Result 199 states and 262 transitions. [2021-11-07 07:42:30,373 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-11-07 07:42:30,375 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 199 states and 262 transitions. [2021-11-07 07:42:30,381 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 185 [2021-11-07 07:42:30,389 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 199 states to 195 states and 258 transitions. [2021-11-07 07:42:30,390 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 195 [2021-11-07 07:42:30,392 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 195 [2021-11-07 07:42:30,392 INFO L73 IsDeterministic]: Start isDeterministic. Operand 195 states and 258 transitions. [2021-11-07 07:42:30,395 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 07:42:30,396 INFO L681 BuchiCegarLoop]: Abstraction has 195 states and 258 transitions. [2021-11-07 07:42:30,413 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states and 258 transitions. [2021-11-07 07:42:30,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 195. [2021-11-07 07:42:30,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 195 states, 191 states have (on average 1.3193717277486912) internal successors, (252), 190 states have internal predecessors, (252), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 07:42:30,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 258 transitions. [2021-11-07 07:42:30,437 INFO L704 BuchiCegarLoop]: Abstraction has 195 states and 258 transitions. [2021-11-07 07:42:30,437 INFO L587 BuchiCegarLoop]: Abstraction has 195 states and 258 transitions. [2021-11-07 07:42:30,438 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-11-07 07:42:30,438 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 195 states and 258 transitions. [2021-11-07 07:42:30,441 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 185 [2021-11-07 07:42:30,441 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 07:42:30,441 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 07:42:30,443 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 07:42:30,443 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 07:42:30,443 INFO L791 eck$LassoCheckResult]: Stem: 599#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 568#L-1 havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem149, main_#t~mem148, main_#t~mem150, main_#t~mem151, main_#t~mem153, main_#t~mem152, main_#t~mem154, main_#t~mem155, main_#t~mem157, main_#t~mem156, main_#t~mem158, main_#t~mem159, main_#t~switch160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem172.base, main_#t~mem172.offset, main_#t~mem173, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181, main_#t~mem182, main_#t~mem183, main_#t~short184, main_#t~mem185.base, main_#t~mem185.offset, main_#t~ret186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem191, main_#t~mem192, main_#t~mem146, main_#t~mem147, main_#t~ite194.base, main_#t~ite194.offset, main_#t~mem193.base, main_#t~mem193.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~short199, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202.base, main_#t~mem202.offset, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204.base, main_#t~mem204.offset, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206.base, main_#t~mem206.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem216.base, main_#t~mem216.offset, main_#t~mem217.base, main_#t~mem217.offset, main_#t~mem218, main_#t~mem219.base, main_#t~mem219.offset, main_#t~mem222, main_#t~mem220.base, main_#t~mem220.offset, main_#t~mem221, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225, main_#t~post226, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232.base, main_#t~mem232.offset, main_#t~mem233.base, main_#t~mem233.offset, main_#t~mem234.base, main_#t~mem234.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem235.base, main_#t~mem235.offset, main_#t~mem236, main_#t~post237, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~ite196.base, main_#t~ite196.offset, main_#t~mem195.base, main_#t~mem195.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 454#L814-4 [2021-11-07 07:42:30,445 INFO L793 eck$LassoCheckResult]: Loop: 454#L814-4 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 512#L814-1 assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 579#L816 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 580#L816-2 call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 527#L821-124 havoc main_~_ha_hashv~0; 528#L821-49 goto; 569#L821-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 530#L821-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 554#L821-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch26 := 11 == main_~_hj_k~0; 551#L821-10 assume main_#t~switch26;call main_#t~mem27 := read~int(main_~_hj_key~0.base, 10 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 16777216 * (main_#t~mem27 % 256);havoc main_#t~mem27; 505#L821-12 main_#t~switch26 := main_#t~switch26 || 10 == main_~_hj_k~0; 506#L821-13 assume main_#t~switch26;call main_#t~mem28 := read~int(main_~_hj_key~0.base, 9 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 65536 * (main_#t~mem28 % 256);havoc main_#t~mem28; 567#L821-15 main_#t~switch26 := main_#t~switch26 || 9 == main_~_hj_k~0; 525#L821-16 assume main_#t~switch26;call main_#t~mem29 := read~int(main_~_hj_key~0.base, 8 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 256 * (main_#t~mem29 % 256);havoc main_#t~mem29; 511#L821-18 main_#t~switch26 := main_#t~switch26 || 8 == main_~_hj_k~0; 406#L821-19 assume main_#t~switch26;call main_#t~mem30 := read~int(main_~_hj_key~0.base, 7 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 16777216 * (main_#t~mem30 % 256);havoc main_#t~mem30; 407#L821-21 main_#t~switch26 := main_#t~switch26 || 7 == main_~_hj_k~0; 449#L821-22 assume !main_#t~switch26; 450#L821-24 main_#t~switch26 := main_#t~switch26 || 6 == main_~_hj_k~0; 587#L821-25 assume main_#t~switch26;call main_#t~mem32 := read~int(main_~_hj_key~0.base, 5 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 256 * (main_#t~mem32 % 256);havoc main_#t~mem32; 588#L821-27 main_#t~switch26 := main_#t~switch26 || 5 == main_~_hj_k~0; 556#L821-28 assume main_#t~switch26;call main_#t~mem33 := read~int(main_~_hj_key~0.base, 4 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + main_#t~mem33 % 256;havoc main_#t~mem33; 557#L821-30 main_#t~switch26 := main_#t~switch26 || 4 == main_~_hj_k~0; 586#L821-31 assume main_#t~switch26;call main_#t~mem34 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem34 % 256);havoc main_#t~mem34; 462#L821-33 main_#t~switch26 := main_#t~switch26 || 3 == main_~_hj_k~0; 444#L821-34 assume main_#t~switch26;call main_#t~mem35 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem35 % 256);havoc main_#t~mem35; 426#L821-36 main_#t~switch26 := main_#t~switch26 || 2 == main_~_hj_k~0; 427#L821-37 assume main_#t~switch26;call main_#t~mem36 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem36 % 256);havoc main_#t~mem36; 476#L821-39 main_#t~switch26 := main_#t~switch26 || 1 == main_~_hj_k~0; 422#L821-40 assume main_#t~switch26;call main_#t~mem37 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem37 % 256;havoc main_#t~mem37; 423#L821-42 havoc main_#t~switch26; 558#L821-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 540#L821-44 goto; 509#L821-46 goto; 510#L821-48 goto; 482#L821-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 483#L821-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset; 416#L821-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_#t~mem56.base, 16 + main_#t~mem56.offset, 4);call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 20 + main_#t~mem58.offset, 4);call write~$Pointer$(main_#t~mem57.base, main_#t~mem57.offset - main_#t~mem59, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57.base, main_#t~mem57.offset;havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem61.base, 8 + main_#t~mem61.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset;havoc main_#t~mem61.base, main_#t~mem61.offset;call main_#t~mem62.base, main_#t~mem62.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem62.base, 16 + main_#t~mem62.offset, 4);havoc main_#t~mem62.base, main_#t~mem62.offset; 417#L821-66 goto; 585#L821-120 havoc main_~_ha_bkt~0;call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64 := read~int(main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);main_#t~post65 := main_#t~mem64;call write~int(1 + main_#t~post65, main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64;havoc main_#t~post65; 546#L821-71 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67 := read~int(main_#t~mem66.base, 4 + main_#t~mem66.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem67 - 1);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67; 489#L821-70 goto; 490#L821-118 call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_#t~mem68.base, main_#t~mem68.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem69.base, main_#t~mem69.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68.base, main_#t~mem68.offset;havoc main_#t~mem69.base, main_#t~mem69.offset;call main_#t~mem70 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post71 := main_#t~mem70;call write~int(1 + main_#t~post71, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem70;havoc main_#t~post71;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem72.base, main_#t~mem72.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem73.base, main_#t~mem73.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 494#L821-73 assume main_#t~mem73.base != 0 || main_#t~mem73.offset != 0;havoc main_#t~mem73.base, main_#t~mem73.offset;call main_#t~mem74.base, main_#t~mem74.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem74.base, 12 + main_#t~mem74.offset, 4);havoc main_#t~mem74.base, main_#t~mem74.offset; 498#L821-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem76 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem75 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short79 := main_#t~mem76 % 4294967296 >= 10 * (1 + main_#t~mem75) % 4294967296; 499#L821-76 assume main_#t~short79;call main_#t~mem77.base, main_#t~mem77.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem78 := read~int(main_#t~mem77.base, 36 + main_#t~mem77.offset, 4);main_#t~short79 := 0 == main_#t~mem78 % 4294967296; 581#L821-78 assume !main_#t~short79;havoc main_#t~mem76;havoc main_#t~mem75;havoc main_#t~mem77.base, main_#t~mem77.offset;havoc main_#t~mem78;havoc main_#t~short79; 420#L821-117 goto; 421#L821-119 goto; 566#L821-121 goto; 591#L821-123 goto; 453#L814-3 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 454#L814-4 [2021-11-07 07:42:30,446 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 07:42:30,446 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2021-11-07 07:42:30,447 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 07:42:30,447 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2083307326] [2021-11-07 07:42:30,447 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:42:30,448 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 07:42:30,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 07:42:30,467 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 07:42:30,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 07:42:30,492 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 07:42:30,493 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 07:42:30,493 INFO L85 PathProgramCache]: Analyzing trace with hash -1570577107, now seen corresponding path program 1 times [2021-11-07 07:42:30,494 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 07:42:30,494 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [775311659] [2021-11-07 07:42:30,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:42:30,495 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 07:42:30,510 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 07:42:30,511 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [623105517] [2021-11-07 07:42:30,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:42:30,512 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 07:42:30,512 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 07:42:30,514 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 07:42:30,533 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-11-07 07:42:30,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 07:42:30,707 INFO L263 TraceCheckSpWp]: Trace formula consists of 308 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-07 07:42:30,718 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 07:42:30,934 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 07:42:30,935 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 07:42:30,935 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [775311659] [2021-11-07 07:42:30,935 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-07 07:42:30,937 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [623105517] [2021-11-07 07:42:30,938 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [623105517] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 07:42:30,938 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 07:42:30,938 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-07 07:42:30,938 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1495351538] [2021-11-07 07:42:30,939 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 07:42:30,939 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 07:42:30,940 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-07 07:42:30,940 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-07 07:42:30,941 INFO L87 Difference]: Start difference. First operand 195 states and 258 transitions. cyclomatic complexity: 67 Second operand has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 07:42:31,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 07:42:31,054 INFO L93 Difference]: Finished difference Result 216 states and 279 transitions. [2021-11-07 07:42:31,054 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-07 07:42:31,055 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 216 states and 279 transitions. [2021-11-07 07:42:31,057 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 206 [2021-11-07 07:42:31,060 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 216 states to 216 states and 279 transitions. [2021-11-07 07:42:31,061 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 216 [2021-11-07 07:42:31,061 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 216 [2021-11-07 07:42:31,061 INFO L73 IsDeterministic]: Start isDeterministic. Operand 216 states and 279 transitions. [2021-11-07 07:42:31,063 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 07:42:31,063 INFO L681 BuchiCegarLoop]: Abstraction has 216 states and 279 transitions. [2021-11-07 07:42:31,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states and 279 transitions. [2021-11-07 07:42:31,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 215. [2021-11-07 07:42:31,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 215 states, 211 states have (on average 1.2890995260663507) internal successors, (272), 210 states have internal predecessors, (272), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 07:42:31,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 215 states to 215 states and 278 transitions. [2021-11-07 07:42:31,075 INFO L704 BuchiCegarLoop]: Abstraction has 215 states and 278 transitions. [2021-11-07 07:42:31,075 INFO L587 BuchiCegarLoop]: Abstraction has 215 states and 278 transitions. [2021-11-07 07:42:31,075 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-11-07 07:42:31,076 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 215 states and 278 transitions. [2021-11-07 07:42:31,077 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 205 [2021-11-07 07:42:31,077 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 07:42:31,077 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 07:42:31,079 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 07:42:31,079 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 07:42:31,079 INFO L791 eck$LassoCheckResult]: Stem: 1173#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 1142#L-1 havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem149, main_#t~mem148, main_#t~mem150, main_#t~mem151, main_#t~mem153, main_#t~mem152, main_#t~mem154, main_#t~mem155, main_#t~mem157, main_#t~mem156, main_#t~mem158, main_#t~mem159, main_#t~switch160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem172.base, main_#t~mem172.offset, main_#t~mem173, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181, main_#t~mem182, main_#t~mem183, main_#t~short184, main_#t~mem185.base, main_#t~mem185.offset, main_#t~ret186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem191, main_#t~mem192, main_#t~mem146, main_#t~mem147, main_#t~ite194.base, main_#t~ite194.offset, main_#t~mem193.base, main_#t~mem193.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~short199, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202.base, main_#t~mem202.offset, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204.base, main_#t~mem204.offset, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206.base, main_#t~mem206.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem216.base, main_#t~mem216.offset, main_#t~mem217.base, main_#t~mem217.offset, main_#t~mem218, main_#t~mem219.base, main_#t~mem219.offset, main_#t~mem222, main_#t~mem220.base, main_#t~mem220.offset, main_#t~mem221, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225, main_#t~post226, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232.base, main_#t~mem232.offset, main_#t~mem233.base, main_#t~mem233.offset, main_#t~mem234.base, main_#t~mem234.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem235.base, main_#t~mem235.offset, main_#t~mem236, main_#t~post237, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~ite196.base, main_#t~ite196.offset, main_#t~mem195.base, main_#t~mem195.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 1024#L814-4 [2021-11-07 07:42:31,080 INFO L793 eck$LassoCheckResult]: Loop: 1024#L814-4 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 1083#L814-1 assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 1153#L816 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 1154#L816-2 call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 1099#L821-124 havoc main_~_ha_hashv~0; 1100#L821-49 goto; 1143#L821-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 1102#L821-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 1127#L821-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch26 := 11 == main_~_hj_k~0; 1123#L821-10 assume !main_#t~switch26; 1075#L821-12 main_#t~switch26 := main_#t~switch26 || 10 == main_~_hj_k~0; 1076#L821-13 assume main_#t~switch26;call main_#t~mem28 := read~int(main_~_hj_key~0.base, 9 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 65536 * (main_#t~mem28 % 256);havoc main_#t~mem28; 1141#L821-15 main_#t~switch26 := main_#t~switch26 || 9 == main_~_hj_k~0; 1096#L821-16 assume main_#t~switch26;call main_#t~mem29 := read~int(main_~_hj_key~0.base, 8 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 256 * (main_#t~mem29 % 256);havoc main_#t~mem29; 1097#L821-18 main_#t~switch26 := main_#t~switch26 || 8 == main_~_hj_k~0; 976#L821-19 assume main_#t~switch26;call main_#t~mem30 := read~int(main_~_hj_key~0.base, 7 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 16777216 * (main_#t~mem30 % 256);havoc main_#t~mem30; 977#L821-21 main_#t~switch26 := main_#t~switch26 || 7 == main_~_hj_k~0; 1019#L821-22 assume main_#t~switch26;call main_#t~mem31 := read~int(main_~_hj_key~0.base, 6 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 65536 * (main_#t~mem31 % 256);havoc main_#t~mem31; 1020#L821-24 main_#t~switch26 := main_#t~switch26 || 6 == main_~_hj_k~0; 1161#L821-25 assume main_#t~switch26;call main_#t~mem32 := read~int(main_~_hj_key~0.base, 5 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 256 * (main_#t~mem32 % 256);havoc main_#t~mem32; 1162#L821-27 main_#t~switch26 := main_#t~switch26 || 5 == main_~_hj_k~0; 1129#L821-28 assume main_#t~switch26;call main_#t~mem33 := read~int(main_~_hj_key~0.base, 4 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + main_#t~mem33 % 256;havoc main_#t~mem33; 1130#L821-30 main_#t~switch26 := main_#t~switch26 || 4 == main_~_hj_k~0; 1160#L821-31 assume main_#t~switch26;call main_#t~mem34 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem34 % 256);havoc main_#t~mem34; 1032#L821-33 main_#t~switch26 := main_#t~switch26 || 3 == main_~_hj_k~0; 1014#L821-34 assume main_#t~switch26;call main_#t~mem35 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem35 % 256);havoc main_#t~mem35; 996#L821-36 main_#t~switch26 := main_#t~switch26 || 2 == main_~_hj_k~0; 997#L821-37 assume main_#t~switch26;call main_#t~mem36 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem36 % 256);havoc main_#t~mem36; 1046#L821-39 main_#t~switch26 := main_#t~switch26 || 1 == main_~_hj_k~0; 992#L821-40 assume main_#t~switch26;call main_#t~mem37 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem37 % 256;havoc main_#t~mem37; 993#L821-42 havoc main_#t~switch26; 1131#L821-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 1112#L821-44 goto; 1079#L821-46 goto; 1080#L821-48 goto; 1052#L821-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 1053#L821-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset; 986#L821-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_#t~mem56.base, 16 + main_#t~mem56.offset, 4);call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 20 + main_#t~mem58.offset, 4);call write~$Pointer$(main_#t~mem57.base, main_#t~mem57.offset - main_#t~mem59, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57.base, main_#t~mem57.offset;havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem61.base, 8 + main_#t~mem61.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset;havoc main_#t~mem61.base, main_#t~mem61.offset;call main_#t~mem62.base, main_#t~mem62.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem62.base, 16 + main_#t~mem62.offset, 4);havoc main_#t~mem62.base, main_#t~mem62.offset; 987#L821-66 goto; 1159#L821-120 havoc main_~_ha_bkt~0;call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64 := read~int(main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);main_#t~post65 := main_#t~mem64;call write~int(1 + main_#t~post65, main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64;havoc main_#t~post65; 1118#L821-71 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67 := read~int(main_#t~mem66.base, 4 + main_#t~mem66.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem67 - 1);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67; 1059#L821-70 goto; 1060#L821-118 call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_#t~mem68.base, main_#t~mem68.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem69.base, main_#t~mem69.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68.base, main_#t~mem68.offset;havoc main_#t~mem69.base, main_#t~mem69.offset;call main_#t~mem70 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post71 := main_#t~mem70;call write~int(1 + main_#t~post71, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem70;havoc main_#t~post71;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem72.base, main_#t~mem72.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem73.base, main_#t~mem73.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 1064#L821-73 assume main_#t~mem73.base != 0 || main_#t~mem73.offset != 0;havoc main_#t~mem73.base, main_#t~mem73.offset;call main_#t~mem74.base, main_#t~mem74.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem74.base, 12 + main_#t~mem74.offset, 4);havoc main_#t~mem74.base, main_#t~mem74.offset; 1068#L821-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem76 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem75 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short79 := main_#t~mem76 % 4294967296 >= 10 * (1 + main_#t~mem75) % 4294967296; 1069#L821-76 assume main_#t~short79;call main_#t~mem77.base, main_#t~mem77.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem78 := read~int(main_#t~mem77.base, 36 + main_#t~mem77.offset, 4);main_#t~short79 := 0 == main_#t~mem78 % 4294967296; 1155#L821-78 assume !main_#t~short79;havoc main_#t~mem76;havoc main_#t~mem75;havoc main_#t~mem77.base, main_#t~mem77.offset;havoc main_#t~mem78;havoc main_#t~short79; 990#L821-117 goto; 991#L821-119 goto; 1139#L821-121 goto; 1165#L821-123 goto; 1023#L814-3 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 1024#L814-4 [2021-11-07 07:42:31,080 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 07:42:31,080 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2021-11-07 07:42:31,081 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 07:42:31,081 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1633257139] [2021-11-07 07:42:31,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:42:31,081 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 07:42:31,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 07:42:31,098 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 07:42:31,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 07:42:31,118 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 07:42:31,118 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 07:42:31,119 INFO L85 PathProgramCache]: Analyzing trace with hash -1623964883, now seen corresponding path program 1 times [2021-11-07 07:42:31,119 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 07:42:31,119 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [464417188] [2021-11-07 07:42:31,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:42:31,120 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 07:42:31,131 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 07:42:31,131 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2086999033] [2021-11-07 07:42:31,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:42:31,132 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 07:42:31,132 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 07:42:31,134 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 07:42:31,161 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-11-07 07:42:31,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 07:42:31,315 INFO L263 TraceCheckSpWp]: Trace formula consists of 308 conjuncts, 4 conjunts are in the unsatisfiable core [2021-11-07 07:42:31,318 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 07:42:31,519 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 07:42:31,519 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 07:42:31,519 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [464417188] [2021-11-07 07:42:31,519 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-07 07:42:31,520 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2086999033] [2021-11-07 07:42:31,520 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2086999033] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 07:42:31,520 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 07:42:31,520 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-07 07:42:31,520 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1053215749] [2021-11-07 07:42:31,521 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 07:42:31,521 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 07:42:31,521 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-11-07 07:42:31,522 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-11-07 07:42:31,522 INFO L87 Difference]: Start difference. First operand 215 states and 278 transitions. cyclomatic complexity: 67 Second operand has 5 states, 5 states have (on average 10.4) internal successors, (52), 5 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 07:42:31,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 07:42:31,670 INFO L93 Difference]: Finished difference Result 309 states and 401 transitions. [2021-11-07 07:42:31,671 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-07 07:42:31,671 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 309 states and 401 transitions. [2021-11-07 07:42:31,673 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 288 [2021-11-07 07:42:31,676 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 309 states to 309 states and 401 transitions. [2021-11-07 07:42:31,676 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 309 [2021-11-07 07:42:31,677 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 309 [2021-11-07 07:42:31,677 INFO L73 IsDeterministic]: Start isDeterministic. Operand 309 states and 401 transitions. [2021-11-07 07:42:31,678 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 07:42:31,678 INFO L681 BuchiCegarLoop]: Abstraction has 309 states and 401 transitions. [2021-11-07 07:42:31,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309 states and 401 transitions. [2021-11-07 07:42:31,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309 to 201. [2021-11-07 07:42:31,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 201 states, 197 states have (on average 1.2741116751269035) internal successors, (251), 196 states have internal predecessors, (251), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 07:42:31,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 257 transitions. [2021-11-07 07:42:31,690 INFO L704 BuchiCegarLoop]: Abstraction has 201 states and 257 transitions. [2021-11-07 07:42:31,690 INFO L587 BuchiCegarLoop]: Abstraction has 201 states and 257 transitions. [2021-11-07 07:42:31,690 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-11-07 07:42:31,691 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 201 states and 257 transitions. [2021-11-07 07:42:31,692 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 191 [2021-11-07 07:42:31,692 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 07:42:31,692 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 07:42:31,693 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 07:42:31,693 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 07:42:31,693 INFO L791 eck$LassoCheckResult]: Stem: 1855#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 1823#L-1 havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem149, main_#t~mem148, main_#t~mem150, main_#t~mem151, main_#t~mem153, main_#t~mem152, main_#t~mem154, main_#t~mem155, main_#t~mem157, main_#t~mem156, main_#t~mem158, main_#t~mem159, main_#t~switch160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem172.base, main_#t~mem172.offset, main_#t~mem173, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181, main_#t~mem182, main_#t~mem183, main_#t~short184, main_#t~mem185.base, main_#t~mem185.offset, main_#t~ret186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem191, main_#t~mem192, main_#t~mem146, main_#t~mem147, main_#t~ite194.base, main_#t~ite194.offset, main_#t~mem193.base, main_#t~mem193.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~short199, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202.base, main_#t~mem202.offset, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204.base, main_#t~mem204.offset, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206.base, main_#t~mem206.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem216.base, main_#t~mem216.offset, main_#t~mem217.base, main_#t~mem217.offset, main_#t~mem218, main_#t~mem219.base, main_#t~mem219.offset, main_#t~mem222, main_#t~mem220.base, main_#t~mem220.offset, main_#t~mem221, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225, main_#t~post226, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232.base, main_#t~mem232.offset, main_#t~mem233.base, main_#t~mem233.offset, main_#t~mem234.base, main_#t~mem234.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem235.base, main_#t~mem235.offset, main_#t~mem236, main_#t~post237, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~ite196.base, main_#t~ite196.offset, main_#t~mem195.base, main_#t~mem195.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 1709#L814-4 [2021-11-07 07:42:31,694 INFO L793 eck$LassoCheckResult]: Loop: 1709#L814-4 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 1768#L814-1 assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 1834#L816 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 1835#L816-2 call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 1782#L821-124 havoc main_~_ha_hashv~0; 1783#L821-49 goto; 1824#L821-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 1787#L821-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 1809#L821-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch26 := 11 == main_~_hj_k~0; 1806#L821-10 assume !main_#t~switch26; 1760#L821-12 main_#t~switch26 := main_#t~switch26 || 10 == main_~_hj_k~0; 1761#L821-13 assume !main_#t~switch26; 1822#L821-15 main_#t~switch26 := main_#t~switch26 || 9 == main_~_hj_k~0; 1780#L821-16 assume !main_#t~switch26; 1766#L821-18 main_#t~switch26 := main_#t~switch26 || 8 == main_~_hj_k~0; 1661#L821-19 assume !main_#t~switch26; 1662#L821-21 main_#t~switch26 := main_#t~switch26 || 7 == main_~_hj_k~0; 1704#L821-22 assume !main_#t~switch26; 1705#L821-24 main_#t~switch26 := main_#t~switch26 || 6 == main_~_hj_k~0; 1843#L821-25 assume !main_#t~switch26; 1844#L821-27 main_#t~switch26 := main_#t~switch26 || 5 == main_~_hj_k~0; 1811#L821-28 assume !main_#t~switch26; 1812#L821-30 main_#t~switch26 := main_#t~switch26 || 4 == main_~_hj_k~0; 1841#L821-31 assume !main_#t~switch26; 1842#L821-33 main_#t~switch26 := main_#t~switch26 || 3 == main_~_hj_k~0; 1861#L821-34 assume main_#t~switch26;call main_#t~mem35 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem35 % 256);havoc main_#t~mem35; 1681#L821-36 main_#t~switch26 := main_#t~switch26 || 2 == main_~_hj_k~0; 1682#L821-37 assume main_#t~switch26;call main_#t~mem36 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem36 % 256);havoc main_#t~mem36; 1731#L821-39 main_#t~switch26 := main_#t~switch26 || 1 == main_~_hj_k~0; 1677#L821-40 assume main_#t~switch26;call main_#t~mem37 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem37 % 256;havoc main_#t~mem37; 1678#L821-42 havoc main_#t~switch26; 1813#L821-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 1795#L821-44 goto; 1764#L821-46 goto; 1765#L821-48 goto; 1737#L821-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 1738#L821-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset; 1671#L821-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_#t~mem56.base, 16 + main_#t~mem56.offset, 4);call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 20 + main_#t~mem58.offset, 4);call write~$Pointer$(main_#t~mem57.base, main_#t~mem57.offset - main_#t~mem59, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57.base, main_#t~mem57.offset;havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem61.base, 8 + main_#t~mem61.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset;havoc main_#t~mem61.base, main_#t~mem61.offset;call main_#t~mem62.base, main_#t~mem62.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem62.base, 16 + main_#t~mem62.offset, 4);havoc main_#t~mem62.base, main_#t~mem62.offset; 1672#L821-66 goto; 1840#L821-120 havoc main_~_ha_bkt~0;call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64 := read~int(main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);main_#t~post65 := main_#t~mem64;call write~int(1 + main_#t~post65, main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64;havoc main_#t~post65; 1801#L821-71 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67 := read~int(main_#t~mem66.base, 4 + main_#t~mem66.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem67 - 1);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67; 1744#L821-70 goto; 1745#L821-118 call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_#t~mem68.base, main_#t~mem68.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem69.base, main_#t~mem69.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68.base, main_#t~mem68.offset;havoc main_#t~mem69.base, main_#t~mem69.offset;call main_#t~mem70 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post71 := main_#t~mem70;call write~int(1 + main_#t~post71, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem70;havoc main_#t~post71;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem72.base, main_#t~mem72.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem73.base, main_#t~mem73.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 1749#L821-73 assume main_#t~mem73.base != 0 || main_#t~mem73.offset != 0;havoc main_#t~mem73.base, main_#t~mem73.offset;call main_#t~mem74.base, main_#t~mem74.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem74.base, 12 + main_#t~mem74.offset, 4);havoc main_#t~mem74.base, main_#t~mem74.offset; 1753#L821-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem76 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem75 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short79 := main_#t~mem76 % 4294967296 >= 10 * (1 + main_#t~mem75) % 4294967296; 1754#L821-76 assume main_#t~short79;call main_#t~mem77.base, main_#t~mem77.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem78 := read~int(main_#t~mem77.base, 36 + main_#t~mem77.offset, 4);main_#t~short79 := 0 == main_#t~mem78 % 4294967296; 1836#L821-78 assume !main_#t~short79;havoc main_#t~mem76;havoc main_#t~mem75;havoc main_#t~mem77.base, main_#t~mem77.offset;havoc main_#t~mem78;havoc main_#t~short79; 1675#L821-117 goto; 1676#L821-119 goto; 1821#L821-121 goto; 1847#L821-123 goto; 1708#L814-3 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 1709#L814-4 [2021-11-07 07:42:31,694 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 07:42:31,694 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2021-11-07 07:42:31,695 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 07:42:31,695 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1185120814] [2021-11-07 07:42:31,695 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:42:31,695 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 07:42:31,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 07:42:31,709 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 07:42:31,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 07:42:31,746 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 07:42:31,746 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 07:42:31,746 INFO L85 PathProgramCache]: Analyzing trace with hash -1214742597, now seen corresponding path program 1 times [2021-11-07 07:42:31,747 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 07:42:31,750 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1841149952] [2021-11-07 07:42:31,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:42:31,751 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 07:42:31,767 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 07:42:31,767 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1214629237] [2021-11-07 07:42:31,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:42:31,768 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 07:42:31,768 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 07:42:31,792 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 07:42:31,811 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-11-07 07:42:32,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 07:42:32,019 INFO L263 TraceCheckSpWp]: Trace formula consists of 266 conjuncts, 4 conjunts are in the unsatisfiable core [2021-11-07 07:42:32,027 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 07:42:32,160 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 07:42:32,160 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 07:42:32,165 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1841149952] [2021-11-07 07:42:32,165 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-07 07:42:32,165 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1214629237] [2021-11-07 07:42:32,166 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1214629237] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 07:42:32,166 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 07:42:32,166 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-07 07:42:32,166 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [876877620] [2021-11-07 07:42:32,167 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 07:42:32,167 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 07:42:32,167 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-11-07 07:42:32,168 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-11-07 07:42:32,168 INFO L87 Difference]: Start difference. First operand 201 states and 257 transitions. cyclomatic complexity: 60 Second operand has 5 states, 5 states have (on average 10.4) internal successors, (52), 5 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 07:42:32,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 07:42:32,310 INFO L93 Difference]: Finished difference Result 397 states and 506 transitions. [2021-11-07 07:42:32,310 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-11-07 07:42:32,310 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 397 states and 506 transitions. [2021-11-07 07:42:32,316 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 383 [2021-11-07 07:42:32,320 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 397 states to 397 states and 506 transitions. [2021-11-07 07:42:32,321 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 397 [2021-11-07 07:42:32,321 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 397 [2021-11-07 07:42:32,321 INFO L73 IsDeterministic]: Start isDeterministic. Operand 397 states and 506 transitions. [2021-11-07 07:42:32,322 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 07:42:32,323 INFO L681 BuchiCegarLoop]: Abstraction has 397 states and 506 transitions. [2021-11-07 07:42:32,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 397 states and 506 transitions. [2021-11-07 07:42:32,333 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 397 to 224. [2021-11-07 07:42:32,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 224 states, 220 states have (on average 1.2545454545454546) internal successors, (276), 219 states have internal predecessors, (276), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 07:42:32,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 282 transitions. [2021-11-07 07:42:32,335 INFO L704 BuchiCegarLoop]: Abstraction has 224 states and 282 transitions. [2021-11-07 07:42:32,335 INFO L587 BuchiCegarLoop]: Abstraction has 224 states and 282 transitions. [2021-11-07 07:42:32,336 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-11-07 07:42:32,336 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 224 states and 282 transitions. [2021-11-07 07:42:32,337 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 214 [2021-11-07 07:42:32,337 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 07:42:32,337 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 07:42:32,338 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 07:42:32,339 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 07:42:32,339 INFO L791 eck$LassoCheckResult]: Stem: 2619#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 2586#L-1 havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem149, main_#t~mem148, main_#t~mem150, main_#t~mem151, main_#t~mem153, main_#t~mem152, main_#t~mem154, main_#t~mem155, main_#t~mem157, main_#t~mem156, main_#t~mem158, main_#t~mem159, main_#t~switch160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem172.base, main_#t~mem172.offset, main_#t~mem173, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181, main_#t~mem182, main_#t~mem183, main_#t~short184, main_#t~mem185.base, main_#t~mem185.offset, main_#t~ret186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem191, main_#t~mem192, main_#t~mem146, main_#t~mem147, main_#t~ite194.base, main_#t~ite194.offset, main_#t~mem193.base, main_#t~mem193.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~short199, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202.base, main_#t~mem202.offset, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204.base, main_#t~mem204.offset, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206.base, main_#t~mem206.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem216.base, main_#t~mem216.offset, main_#t~mem217.base, main_#t~mem217.offset, main_#t~mem218, main_#t~mem219.base, main_#t~mem219.offset, main_#t~mem222, main_#t~mem220.base, main_#t~mem220.offset, main_#t~mem221, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225, main_#t~post226, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232.base, main_#t~mem232.offset, main_#t~mem233.base, main_#t~mem233.offset, main_#t~mem234.base, main_#t~mem234.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem235.base, main_#t~mem235.offset, main_#t~mem236, main_#t~post237, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~ite196.base, main_#t~ite196.offset, main_#t~mem195.base, main_#t~mem195.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 2469#L814-4 [2021-11-07 07:42:32,339 INFO L793 eck$LassoCheckResult]: Loop: 2469#L814-4 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 2529#L814-1 assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 2597#L816 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 2598#L816-2 call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 2549#L821-124 havoc main_~_ha_hashv~0; 2550#L821-49 goto; 2587#L821-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 2618#L821-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 2640#L821-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch26 := 11 == main_~_hj_k~0; 2639#L821-10 assume !main_#t~switch26; 2638#L821-12 main_#t~switch26 := main_#t~switch26 || 10 == main_~_hj_k~0; 2637#L821-13 assume !main_#t~switch26; 2636#L821-15 main_#t~switch26 := main_#t~switch26 || 9 == main_~_hj_k~0; 2635#L821-16 assume !main_#t~switch26; 2634#L821-18 main_#t~switch26 := main_#t~switch26 || 8 == main_~_hj_k~0; 2633#L821-19 assume !main_#t~switch26; 2632#L821-21 main_#t~switch26 := main_#t~switch26 || 7 == main_~_hj_k~0; 2631#L821-22 assume !main_#t~switch26; 2630#L821-24 main_#t~switch26 := main_#t~switch26 || 6 == main_~_hj_k~0; 2629#L821-25 assume !main_#t~switch26; 2628#L821-27 main_#t~switch26 := main_#t~switch26 || 5 == main_~_hj_k~0; 2627#L821-28 assume !main_#t~switch26; 2626#L821-30 main_#t~switch26 := main_#t~switch26 || 4 == main_~_hj_k~0; 2604#L821-31 assume !main_#t~switch26; 2477#L821-33 main_#t~switch26 := main_#t~switch26 || 3 == main_~_hj_k~0; 2458#L821-34 assume !main_#t~switch26; 2459#L821-36 main_#t~switch26 := main_#t~switch26 || 2 == main_~_hj_k~0; 2491#L821-37 assume !main_#t~switch26; 2492#L821-39 main_#t~switch26 := main_#t~switch26 || 1 == main_~_hj_k~0; 2436#L821-40 assume !main_#t~switch26; 2437#L821-42 havoc main_#t~switch26; 2576#L821-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 2558#L821-44 goto; 2525#L821-46 goto; 2526#L821-48 goto; 2498#L821-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 2499#L821-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset; 2429#L821-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_#t~mem56.base, 16 + main_#t~mem56.offset, 4);call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 20 + main_#t~mem58.offset, 4);call write~$Pointer$(main_#t~mem57.base, main_#t~mem57.offset - main_#t~mem59, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57.base, main_#t~mem57.offset;havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem61.base, 8 + main_#t~mem61.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset;havoc main_#t~mem61.base, main_#t~mem61.offset;call main_#t~mem62.base, main_#t~mem62.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem62.base, 16 + main_#t~mem62.offset, 4);havoc main_#t~mem62.base, main_#t~mem62.offset; 2430#L821-66 goto; 2603#L821-120 havoc main_~_ha_bkt~0;call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64 := read~int(main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);main_#t~post65 := main_#t~mem64;call write~int(1 + main_#t~post65, main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64;havoc main_#t~post65; 2564#L821-71 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67 := read~int(main_#t~mem66.base, 4 + main_#t~mem66.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem67 - 1);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67; 2505#L821-70 goto; 2506#L821-118 call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_#t~mem68.base, main_#t~mem68.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem69.base, main_#t~mem69.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68.base, main_#t~mem68.offset;havoc main_#t~mem69.base, main_#t~mem69.offset;call main_#t~mem70 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post71 := main_#t~mem70;call write~int(1 + main_#t~post71, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem70;havoc main_#t~post71;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem72.base, main_#t~mem72.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem73.base, main_#t~mem73.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 2510#L821-73 assume main_#t~mem73.base != 0 || main_#t~mem73.offset != 0;havoc main_#t~mem73.base, main_#t~mem73.offset;call main_#t~mem74.base, main_#t~mem74.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem74.base, 12 + main_#t~mem74.offset, 4);havoc main_#t~mem74.base, main_#t~mem74.offset; 2514#L821-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem76 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem75 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short79 := main_#t~mem76 % 4294967296 >= 10 * (1 + main_#t~mem75) % 4294967296; 2515#L821-76 assume main_#t~short79;call main_#t~mem77.base, main_#t~mem77.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem78 := read~int(main_#t~mem77.base, 36 + main_#t~mem77.offset, 4);main_#t~short79 := 0 == main_#t~mem78 % 4294967296; 2599#L821-78 assume !main_#t~short79;havoc main_#t~mem76;havoc main_#t~mem75;havoc main_#t~mem77.base, main_#t~mem77.offset;havoc main_#t~mem78;havoc main_#t~short79; 2434#L821-117 goto; 2435#L821-119 goto; 2584#L821-121 goto; 2610#L821-123 goto; 2468#L814-3 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 2469#L814-4 [2021-11-07 07:42:32,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 07:42:32,340 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 5 times [2021-11-07 07:42:32,340 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 07:42:32,340 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [192667882] [2021-11-07 07:42:32,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:42:32,341 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 07:42:32,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 07:42:32,353 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 07:42:32,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 07:42:32,370 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 07:42:32,371 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 07:42:32,371 INFO L85 PathProgramCache]: Analyzing trace with hash -956404287, now seen corresponding path program 1 times [2021-11-07 07:42:32,371 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 07:42:32,371 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1989971520] [2021-11-07 07:42:32,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:42:32,372 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 07:42:32,380 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 07:42:32,381 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [891659548] [2021-11-07 07:42:32,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:42:32,381 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 07:42:32,381 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 07:42:32,383 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 07:42:32,409 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-11-07 07:42:32,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 07:42:32,571 INFO L263 TraceCheckSpWp]: Trace formula consists of 248 conjuncts, 4 conjunts are in the unsatisfiable core [2021-11-07 07:42:32,573 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 07:42:32,713 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 07:42:32,713 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 07:42:32,713 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1989971520] [2021-11-07 07:42:32,713 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-07 07:42:32,714 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [891659548] [2021-11-07 07:42:32,714 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [891659548] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 07:42:32,714 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 07:42:32,714 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-07 07:42:32,715 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [385235290] [2021-11-07 07:42:32,715 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 07:42:32,715 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 07:42:32,716 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-07 07:42:32,716 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-07 07:42:32,716 INFO L87 Difference]: Start difference. First operand 224 states and 282 transitions. cyclomatic complexity: 62 Second operand has 4 states, 4 states have (on average 13.0) internal successors, (52), 4 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 07:42:32,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 07:42:32,789 INFO L93 Difference]: Finished difference Result 299 states and 386 transitions. [2021-11-07 07:42:32,790 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-07 07:42:32,790 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 299 states and 386 transitions. [2021-11-07 07:42:32,793 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 278 [2021-11-07 07:42:32,796 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 299 states to 299 states and 386 transitions. [2021-11-07 07:42:32,796 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 299 [2021-11-07 07:42:32,797 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 299 [2021-11-07 07:42:32,797 INFO L73 IsDeterministic]: Start isDeterministic. Operand 299 states and 386 transitions. [2021-11-07 07:42:32,797 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 07:42:32,798 INFO L681 BuchiCegarLoop]: Abstraction has 299 states and 386 transitions. [2021-11-07 07:42:32,798 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 299 states and 386 transitions. [2021-11-07 07:42:32,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 299 to 192. [2021-11-07 07:42:32,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 192 states, 188 states have (on average 1.2606382978723405) internal successors, (237), 187 states have internal predecessors, (237), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 07:42:32,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 243 transitions. [2021-11-07 07:42:32,805 INFO L704 BuchiCegarLoop]: Abstraction has 192 states and 243 transitions. [2021-11-07 07:42:32,805 INFO L587 BuchiCegarLoop]: Abstraction has 192 states and 243 transitions. [2021-11-07 07:42:32,805 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-11-07 07:42:32,805 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 192 states and 243 transitions. [2021-11-07 07:42:32,807 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 182 [2021-11-07 07:42:32,807 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 07:42:32,807 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 07:42:32,808 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 07:42:32,808 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 07:42:32,808 INFO L791 eck$LassoCheckResult]: Stem: 3292#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 3190#L-1 havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem149, main_#t~mem148, main_#t~mem150, main_#t~mem151, main_#t~mem153, main_#t~mem152, main_#t~mem154, main_#t~mem155, main_#t~mem157, main_#t~mem156, main_#t~mem158, main_#t~mem159, main_#t~switch160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem172.base, main_#t~mem172.offset, main_#t~mem173, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181, main_#t~mem182, main_#t~mem183, main_#t~short184, main_#t~mem185.base, main_#t~mem185.offset, main_#t~ret186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem191, main_#t~mem192, main_#t~mem146, main_#t~mem147, main_#t~ite194.base, main_#t~ite194.offset, main_#t~mem193.base, main_#t~mem193.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~short199, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202.base, main_#t~mem202.offset, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204.base, main_#t~mem204.offset, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206.base, main_#t~mem206.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem216.base, main_#t~mem216.offset, main_#t~mem217.base, main_#t~mem217.offset, main_#t~mem218, main_#t~mem219.base, main_#t~mem219.offset, main_#t~mem222, main_#t~mem220.base, main_#t~mem220.offset, main_#t~mem221, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225, main_#t~post226, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232.base, main_#t~mem232.offset, main_#t~mem233.base, main_#t~mem233.offset, main_#t~mem234.base, main_#t~mem234.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem235.base, main_#t~mem235.offset, main_#t~mem236, main_#t~post237, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~ite196.base, main_#t~ite196.offset, main_#t~mem195.base, main_#t~mem195.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 3191#L814-4 [2021-11-07 07:42:32,808 INFO L793 eck$LassoCheckResult]: Loop: 3191#L814-4 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 3258#L814-1 assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 3241#L816 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 3242#L816-2 call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 3243#L821-124 havoc main_~_ha_hashv~0; 3196#L821-49 goto; 3197#L821-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 3163#L821-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 3164#L821-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch26 := 11 == main_~_hj_k~0; 3155#L821-10 assume !main_#t~switch26; 3156#L821-12 main_#t~switch26 := main_#t~switch26 || 10 == main_~_hj_k~0; 3188#L821-13 assume !main_#t~switch26; 3189#L821-15 main_#t~switch26 := main_#t~switch26 || 9 == main_~_hj_k~0; 3274#L821-16 assume !main_#t~switch26; 3284#L821-18 main_#t~switch26 := main_#t~switch26 || 8 == main_~_hj_k~0; 3107#L821-19 assume !main_#t~switch26; 3108#L821-21 main_#t~switch26 := main_#t~switch26 || 7 == main_~_hj_k~0; 3202#L821-22 assume !main_#t~switch26; 3203#L821-24 main_#t~switch26 := main_#t~switch26 || 6 == main_~_hj_k~0; 3254#L821-25 assume !main_#t~switch26; 3255#L821-27 main_#t~switch26 := main_#t~switch26 || 5 == main_~_hj_k~0; 3167#L821-28 assume !main_#t~switch26; 3168#L821-30 main_#t~switch26 := main_#t~switch26 || 4 == main_~_hj_k~0; 3252#L821-31 assume main_#t~switch26;call main_#t~mem34 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem34 % 256);havoc main_#t~mem34; 3223#L821-33 main_#t~switch26 := main_#t~switch26 || 3 == main_~_hj_k~0; 3193#L821-34 assume main_#t~switch26;call main_#t~mem35 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem35 % 256);havoc main_#t~mem35; 3140#L821-36 main_#t~switch26 := main_#t~switch26 || 2 == main_~_hj_k~0; 3141#L821-37 assume main_#t~switch26;call main_#t~mem36 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem36 % 256);havoc main_#t~mem36; 3237#L821-39 main_#t~switch26 := main_#t~switch26 || 1 == main_~_hj_k~0; 3135#L821-40 assume main_#t~switch26;call main_#t~mem37 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem37 % 256;havoc main_#t~mem37; 3136#L821-42 havoc main_#t~switch26; 3169#L821-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 3109#L821-44 goto; 3110#L821-46 goto; 3200#L821-48 goto; 3201#L821-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 3111#L821-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset; 3112#L821-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_#t~mem56.base, 16 + main_#t~mem56.offset, 4);call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 20 + main_#t~mem58.offset, 4);call write~$Pointer$(main_#t~mem57.base, main_#t~mem57.offset - main_#t~mem59, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57.base, main_#t~mem57.offset;havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem61.base, 8 + main_#t~mem61.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset;havoc main_#t~mem61.base, main_#t~mem61.offset;call main_#t~mem62.base, main_#t~mem62.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem62.base, 16 + main_#t~mem62.offset, 4);havoc main_#t~mem62.base, main_#t~mem62.offset; 3130#L821-66 goto; 3251#L821-120 havoc main_~_ha_bkt~0;call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64 := read~int(main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);main_#t~post65 := main_#t~mem64;call write~int(1 + main_#t~post65, main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64;havoc main_#t~post65; 3125#L821-71 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67 := read~int(main_#t~mem66.base, 4 + main_#t~mem66.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem67 - 1);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67; 3126#L821-70 goto; 3268#L821-118 call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_#t~mem68.base, main_#t~mem68.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem69.base, main_#t~mem69.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68.base, main_#t~mem68.offset;havoc main_#t~mem69.base, main_#t~mem69.offset;call main_#t~mem70 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post71 := main_#t~mem70;call write~int(1 + main_#t~post71, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem70;havoc main_#t~post71;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem72.base, main_#t~mem72.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem73.base, main_#t~mem73.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 3142#L821-73 assume main_#t~mem73.base != 0 || main_#t~mem73.offset != 0;havoc main_#t~mem73.base, main_#t~mem73.offset;call main_#t~mem74.base, main_#t~mem74.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem74.base, 12 + main_#t~mem74.offset, 4);havoc main_#t~mem74.base, main_#t~mem74.offset; 3143#L821-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem76 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem75 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short79 := main_#t~mem76 % 4294967296 >= 10 * (1 + main_#t~mem75) % 4294967296; 3244#L821-76 assume main_#t~short79;call main_#t~mem77.base, main_#t~mem77.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem78 := read~int(main_#t~mem77.base, 36 + main_#t~mem77.offset, 4);main_#t~short79 := 0 == main_#t~mem78 % 4294967296; 3245#L821-78 assume !main_#t~short79;havoc main_#t~mem76;havoc main_#t~mem75;havoc main_#t~mem77.base, main_#t~mem77.offset;havoc main_#t~mem78;havoc main_#t~short79; 3133#L821-117 goto; 3134#L821-119 goto; 3187#L821-121 goto; 3263#L821-123 goto; 3208#L814-3 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 3191#L814-4 [2021-11-07 07:42:32,809 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 07:42:32,809 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 6 times [2021-11-07 07:42:32,809 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 07:42:32,809 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1699375530] [2021-11-07 07:42:32,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:42:32,810 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 07:42:32,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 07:42:32,822 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 07:42:32,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 07:42:32,846 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 07:42:32,847 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 07:42:32,847 INFO L85 PathProgramCache]: Analyzing trace with hash 1694021305, now seen corresponding path program 1 times [2021-11-07 07:42:32,847 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 07:42:32,847 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1231304837] [2021-11-07 07:42:32,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:42:32,848 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 07:42:32,857 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 07:42:32,857 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1171923685] [2021-11-07 07:42:32,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:42:32,858 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 07:42:32,858 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 07:42:32,875 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 07:42:32,879 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_5e9596b9-841d-40b6-8f34-be521b770fce/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process