./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 47ea0209 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4a058bd9944921e52018f99044f11f694f824f3f09daf510330544b4558ba193 --- Real Ultimate output --- This is Ultimate 0.2.1-dev-47ea020 [2021-11-07 08:31:31,742 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-07 08:31:31,746 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-07 08:31:31,815 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-07 08:31:31,816 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-07 08:31:31,822 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-07 08:31:31,824 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-07 08:31:31,829 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-07 08:31:31,832 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-07 08:31:31,838 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-07 08:31:31,840 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-07 08:31:31,842 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-07 08:31:31,842 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-07 08:31:31,845 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-07 08:31:31,848 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-07 08:31:31,852 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-07 08:31:31,854 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-07 08:31:31,855 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-07 08:31:31,858 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-07 08:31:31,867 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-07 08:31:31,869 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-07 08:31:31,871 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-07 08:31:31,875 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-07 08:31:31,876 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-07 08:31:31,888 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-07 08:31:31,889 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-07 08:31:31,889 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-07 08:31:31,891 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-07 08:31:31,892 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-07 08:31:31,894 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-07 08:31:31,894 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-07 08:31:31,895 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-07 08:31:31,898 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-07 08:31:31,899 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-07 08:31:31,901 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-07 08:31:31,901 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-07 08:31:31,902 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-07 08:31:31,902 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-07 08:31:31,902 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-07 08:31:31,903 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-07 08:31:31,904 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-07 08:31:31,905 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-11-07 08:31:31,956 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-07 08:31:31,956 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-07 08:31:31,957 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-07 08:31:31,957 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-07 08:31:31,958 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-07 08:31:31,959 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-07 08:31:31,959 INFO L138 SettingsManager]: * Use SBE=true [2021-11-07 08:31:31,959 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-11-07 08:31:31,959 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-11-07 08:31:31,959 INFO L138 SettingsManager]: * Use old map elimination=false [2021-11-07 08:31:31,961 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-11-07 08:31:31,961 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-11-07 08:31:31,961 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-11-07 08:31:31,961 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-07 08:31:31,962 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-07 08:31:31,962 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-11-07 08:31:31,962 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-07 08:31:31,962 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-07 08:31:31,962 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-07 08:31:31,963 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-11-07 08:31:31,963 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-11-07 08:31:31,963 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-11-07 08:31:31,963 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-07 08:31:31,963 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-07 08:31:31,964 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-11-07 08:31:31,964 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-07 08:31:31,966 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-11-07 08:31:31,966 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-07 08:31:31,966 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-07 08:31:31,966 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-07 08:31:31,967 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-07 08:31:31,967 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-07 08:31:31,968 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-11-07 08:31:31,968 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4a058bd9944921e52018f99044f11f694f824f3f09daf510330544b4558ba193 [2021-11-07 08:31:32,364 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-07 08:31:32,410 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-07 08:31:32,413 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-07 08:31:32,414 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-07 08:31:32,415 INFO L275 PluginConnector]: CDTParser initialized [2021-11-07 08:31:32,416 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i [2021-11-07 08:31:32,499 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/data/c7e2b3abd/3fecb892c4c94d3da2e848bb294fac29/FLAG270994775 [2021-11-07 08:31:33,312 INFO L306 CDTParser]: Found 1 translation units. [2021-11-07 08:31:33,313 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i [2021-11-07 08:31:33,341 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/data/c7e2b3abd/3fecb892c4c94d3da2e848bb294fac29/FLAG270994775 [2021-11-07 08:31:33,494 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/data/c7e2b3abd/3fecb892c4c94d3da2e848bb294fac29 [2021-11-07 08:31:33,498 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-07 08:31:33,500 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-07 08:31:33,502 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-07 08:31:33,502 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-07 08:31:33,506 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-07 08:31:33,507 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.11 08:31:33" (1/1) ... [2021-11-07 08:31:33,509 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3c55df33 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:31:33, skipping insertion in model container [2021-11-07 08:31:33,509 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.11 08:31:33" (1/1) ... [2021-11-07 08:31:33,518 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-07 08:31:33,592 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-07 08:31:34,314 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i[44118,44131] [2021-11-07 08:31:34,330 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i[44660,44673] [2021-11-07 08:31:34,460 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i[56247,56260] [2021-11-07 08:31:34,461 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i[56368,56381] [2021-11-07 08:31:34,481 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-07 08:31:34,495 INFO L203 MainTranslator]: Completed pre-run [2021-11-07 08:31:34,541 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i[44118,44131] [2021-11-07 08:31:34,544 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i[44660,44673] [2021-11-07 08:31:34,670 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i[56247,56260] [2021-11-07 08:31:34,671 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i[56368,56381] [2021-11-07 08:31:34,696 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-07 08:31:34,832 INFO L208 MainTranslator]: Completed translation [2021-11-07 08:31:34,833 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:31:34 WrapperNode [2021-11-07 08:31:34,833 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-07 08:31:34,834 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-07 08:31:34,835 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-07 08:31:34,835 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-07 08:31:34,844 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:31:34" (1/1) ... [2021-11-07 08:31:34,912 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:31:34" (1/1) ... [2021-11-07 08:31:35,004 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-07 08:31:35,005 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-07 08:31:35,006 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-07 08:31:35,006 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-07 08:31:35,016 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:31:34" (1/1) ... [2021-11-07 08:31:35,017 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:31:34" (1/1) ... [2021-11-07 08:31:35,028 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:31:34" (1/1) ... [2021-11-07 08:31:35,029 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:31:34" (1/1) ... [2021-11-07 08:31:35,113 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:31:34" (1/1) ... [2021-11-07 08:31:35,149 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:31:34" (1/1) ... [2021-11-07 08:31:35,157 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:31:34" (1/1) ... [2021-11-07 08:31:35,177 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-07 08:31:35,191 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-07 08:31:35,192 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-07 08:31:35,192 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-07 08:31:35,193 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:31:34" (1/1) ... [2021-11-07 08:31:35,202 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-07 08:31:35,215 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:31:35,236 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-07 08:31:35,256 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-11-07 08:31:35,300 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2021-11-07 08:31:35,301 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2021-11-07 08:31:35,301 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-07 08:31:35,301 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2021-11-07 08:31:35,301 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-11-07 08:31:35,301 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-07 08:31:35,302 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-11-07 08:31:35,303 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-07 08:31:35,303 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-11-07 08:31:35,303 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-11-07 08:31:35,303 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-07 08:31:35,303 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-07 08:31:35,304 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-07 08:31:35,581 WARN L805 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-11-07 08:31:37,329 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-07 08:31:37,329 INFO L299 CfgBuilder]: Removed 118 assume(true) statements. [2021-11-07 08:31:37,332 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.11 08:31:37 BoogieIcfgContainer [2021-11-07 08:31:37,332 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-07 08:31:37,334 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-11-07 08:31:37,334 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-11-07 08:31:37,338 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-11-07 08:31:37,339 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 08:31:37,339 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 07.11 08:31:33" (1/3) ... [2021-11-07 08:31:37,341 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7147c74e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 07.11 08:31:37, skipping insertion in model container [2021-11-07 08:31:37,341 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 08:31:37,341 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:31:34" (2/3) ... [2021-11-07 08:31:37,342 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7147c74e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 07.11 08:31:37, skipping insertion in model container [2021-11-07 08:31:37,343 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 08:31:37,344 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.11 08:31:37" (3/3) ... [2021-11-07 08:31:37,349 INFO L389 chiAutomizerObserver]: Analyzing ICFG uthash_JEN_test6-2.i [2021-11-07 08:31:37,413 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-11-07 08:31:37,413 INFO L360 BuchiCegarLoop]: Hoare is false [2021-11-07 08:31:37,414 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-11-07 08:31:37,414 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-11-07 08:31:37,414 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-11-07 08:31:37,414 INFO L364 BuchiCegarLoop]: Difference is false [2021-11-07 08:31:37,414 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-11-07 08:31:37,415 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-11-07 08:31:37,453 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 253 states, 248 states have (on average 1.6370967741935485) internal successors, (406), 248 states have internal predecessors, (406), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:31:37,500 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 232 [2021-11-07 08:31:37,500 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:31:37,500 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:31:37,509 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:31:37,509 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2021-11-07 08:31:37,509 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-11-07 08:31:37,511 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 253 states, 248 states have (on average 1.6370967741935485) internal successors, (406), 248 states have internal predecessors, (406), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:31:37,525 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 232 [2021-11-07 08:31:37,525 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:31:37,526 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:31:37,526 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:31:37,527 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2021-11-07 08:31:37,535 INFO L791 eck$LassoCheckResult]: Stem: 246#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string30.base, #t~string30.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string30.base, #t~string30.offset, 1);call write~init~int(0, #t~string30.base, 1 + #t~string30.offset, 1);call #t~string31.base, #t~string31.offset := #Ultimate.allocOnStack(21);call ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := #Ultimate.allocOnStack(40);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 158#L-1true havoc main_#res;havoc main_#t~ret45.base, main_#t~ret45.offset, main_#t~mem46, main_#t~mem47, main_#t~mem48, main_#t~mem50, main_#t~mem49, main_#t~mem51, main_#t~mem52, main_#t~mem54, main_#t~mem53, main_#t~mem55, main_#t~mem56, main_#t~mem58, main_#t~mem57, main_#t~mem59, main_#t~mem60, main_#t~switch61, main_#t~mem62, main_#t~mem63, main_#t~mem64, main_#t~mem65, main_#t~mem66, main_#t~mem67, main_#t~mem68, main_#t~mem69, main_#t~mem70, main_#t~mem71, main_#t~mem72, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~ret73.base, main_#t~ret73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76.base, main_#t~mem76.offset, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79.base, main_#t~mem79.offset, main_#t~mem80.base, main_#t~mem80.offset, main_#t~ret81.base, main_#t~ret81.offset, main_#t~mem82.base, main_#t~mem82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86.base, main_#t~mem86.offset, main_#t~mem87.base, main_#t~mem87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91.base, main_#t~mem91.offset, main_#t~mem92, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95.base, main_#t~mem95.offset, main_#t~mem96.base, main_#t~mem96.offset, main_#t~mem97, main_#t~post98, main_#t~mem99.base, main_#t~mem99.offset, main_#t~mem100, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103, main_#t~post104, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem109, main_#t~mem108, main_#t~mem110.base, main_#t~mem110.offset, main_#t~mem111, main_#t~short112, main_#t~mem113.base, main_#t~mem113.offset, main_#t~mem114, main_#t~ret115.base, main_#t~ret115.offset, main_#t~mem116.base, main_#t~mem116.offset, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem118.base, main_#t~mem118.offset, main_#t~mem119, main_#t~mem120.base, main_#t~mem120.offset, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem124, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem128, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127, main_#t~ite129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem140, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem141.base, main_#t~mem141.offset, main_#t~mem142, main_#t~pre143, main_#t~mem144.base, main_#t~mem144.offset, main_#t~mem145, main_#t~mem146.base, main_#t~mem146.offset, main_#t~mem147, main_#t~post148, main_#t~mem152, main_#t~mem150, main_#t~mem149.base, main_#t~mem149.offset, main_#t~mem151, main_#t~mem153, main_#t~post154, main_#t~mem155.base, main_#t~mem155.offset, main_#t~mem156.base, main_#t~mem156.offset, main_#t~mem157.base, main_#t~mem157.offset, main_#t~post131, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133, main_#t~mem158.base, main_#t~mem158.offset, main_#t~mem159.base, main_#t~mem159.offset, main_#t~mem160.base, main_#t~mem160.offset, main_#t~mem161, main_#t~mem162.base, main_#t~mem162.offset, main_#t~mem163, main_#t~mem164.base, main_#t~mem164.offset, main_#t~mem165, main_#t~post166, main_#t~mem167.base, main_#t~mem167.offset, main_#t~mem168.base, main_#t~mem168.offset, main_#t~mem169.base, main_#t~mem169.offset, main_#t~mem170.base, main_#t~mem170.offset, main_#t~mem173, main_#t~mem171.base, main_#t~mem171.offset, main_#t~mem172, main_#t~ite176, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178, main_#t~mem179.base, main_#t~mem179.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem42, main_#t~post43, main_#t~mem44, main_#t~mem184, main_#t~mem183, main_#t~mem185, main_#t~mem186, main_#t~mem188, main_#t~mem187, main_#t~mem189, main_#t~mem190, main_#t~mem192, main_#t~mem191, main_#t~mem193, main_#t~mem194, main_#t~switch195, main_#t~mem196, main_#t~mem197, main_#t~mem198, main_#t~mem199, main_#t~mem200, main_#t~mem201, main_#t~mem202, main_#t~mem203, main_#t~mem204, main_#t~mem205, main_#t~mem206, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem216, main_#t~mem217, main_#t~mem218, main_#t~short219, main_#t~mem220.base, main_#t~mem220.offset, main_#t~ret221, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~short228, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232, main_#t~mem233.base, main_#t~mem233.offset, main_#t~mem234.base, main_#t~mem234.offset, main_#t~mem235.base, main_#t~mem235.offset, main_#t~mem236.base, main_#t~mem236.offset, main_#t~mem237.base, main_#t~mem237.offset, main_#t~mem238.base, main_#t~mem238.offset, main_#t~mem239, main_#t~mem240.base, main_#t~mem240.offset, main_#t~mem241.base, main_#t~mem241.offset, main_#t~mem242.base, main_#t~mem242.offset, main_#t~mem243, main_#t~mem244.base, main_#t~mem244.offset, main_#t~mem245.base, main_#t~mem245.offset, main_#t~mem246.base, main_#t~mem246.offset, main_#t~mem247.base, main_#t~mem247.offset, main_#t~mem248.base, main_#t~mem248.offset, main_#t~mem249, main_#t~mem250.base, main_#t~mem250.offset, main_#t~mem253, main_#t~mem251.base, main_#t~mem251.offset, main_#t~mem252, main_#t~mem254.base, main_#t~mem254.offset, main_#t~mem255.base, main_#t~mem255.offset, main_#t~mem256, main_#t~post257, main_#t~mem258.base, main_#t~mem258.offset, main_#t~mem259.base, main_#t~mem259.offset, main_#t~mem260.base, main_#t~mem260.offset, main_#t~mem261.base, main_#t~mem261.offset, main_#t~mem262.base, main_#t~mem262.offset, main_#t~mem263.base, main_#t~mem263.offset, main_#t~mem264.base, main_#t~mem264.offset, main_#t~mem265.base, main_#t~mem265.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem266.base, main_#t~mem266.offset, main_#t~mem267, main_#t~post268, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem180, main_#t~post181, main_#t~mem182, main_#t~mem269.base, main_#t~mem269.offset, main_#t~ite271.base, main_#t~ite271.offset, main_#t~mem270.base, main_#t~mem270.offset, main_#t~mem274.base, main_#t~mem274.offset, main_#t~mem275.base, main_#t~mem275.offset, main_#t~short276, main_#t~mem277.base, main_#t~mem277.offset, main_#t~mem278.base, main_#t~mem278.offset, main_#t~mem279.base, main_#t~mem279.offset, main_#t~mem280, main_#t~mem281.base, main_#t~mem281.offset, main_#t~mem282.base, main_#t~mem282.offset, main_#t~mem283.base, main_#t~mem283.offset, main_#t~mem284.base, main_#t~mem284.offset, main_#t~mem285.base, main_#t~mem285.offset, main_#t~mem286.base, main_#t~mem286.offset, main_#t~mem287, main_#t~mem288.base, main_#t~mem288.offset, main_#t~mem289.base, main_#t~mem289.offset, main_#t~mem290.base, main_#t~mem290.offset, main_#t~mem291, main_#t~mem292.base, main_#t~mem292.offset, main_#t~mem293.base, main_#t~mem293.offset, main_#t~mem294.base, main_#t~mem294.offset, main_#t~mem295.base, main_#t~mem295.offset, main_#t~mem296.base, main_#t~mem296.offset, main_#t~mem297, main_#t~mem298.base, main_#t~mem298.offset, main_#t~mem301, main_#t~mem299.base, main_#t~mem299.offset, main_#t~mem300, main_#t~mem302.base, main_#t~mem302.offset, main_#t~mem303.base, main_#t~mem303.offset, main_#t~mem304, main_#t~post305, main_#t~mem306.base, main_#t~mem306.offset, main_#t~mem307.base, main_#t~mem307.offset, main_#t~mem308.base, main_#t~mem308.offset, main_#t~mem309.base, main_#t~mem309.offset, main_#t~mem310.base, main_#t~mem310.offset, main_#t~mem311.base, main_#t~mem311.offset, main_#t~mem312.base, main_#t~mem312.offset, main_#t~mem313.base, main_#t~mem313.offset, main_~_hd_head~1.base, main_~_hd_head~1.offset, main_#t~mem314.base, main_#t~mem314.offset, main_#t~mem315, main_#t~post316, main_~_hd_bkt~1, main_~_hd_hh_del~1.base, main_~_hd_hh_del~1.offset, main_#t~ite273.base, main_#t~ite273.offset, main_#t~mem272.base, main_#t~mem272.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 11#L989-4true [2021-11-07 08:31:37,536 INFO L793 eck$LassoCheckResult]: Loop: 11#L989-4true call main_#t~mem44 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 5#L989-1true assume !!(main_#t~mem44 < 10);havoc main_#t~mem44;real_malloc_#in~n := 40;havoc real_malloc_#res.base, real_malloc_#res.offset;havoc real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset, real_malloc_~n;real_malloc_~n := real_malloc_#in~n;call real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset := #Ultimate.allocOnHeap(real_malloc_~n);real_malloc_#res.base, real_malloc_#res.offset := real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset;havoc real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset; 97#L979true main_#t~ret45.base, main_#t~ret45.offset := real_malloc_#res.base, real_malloc_#res.offset;main_~user~0.base, main_~user~0.offset := main_#t~ret45.base, main_#t~ret45.offset;havoc main_#t~ret45.base, main_#t~ret45.offset; 12#L991true assume main_~user~0.base == 0 && main_~user~0.offset == 0;assume false; 90#L991-2true call main_#t~mem46 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem46, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem46;call main_#t~mem47 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem48 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem47 * main_#t~mem48, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem47;havoc main_#t~mem48; 234#L996-118true assume !true; 231#L989-3true call main_#t~mem42 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post43 := main_#t~mem42;call write~int(1 + main_#t~post43, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem42;havoc main_#t~post43; 11#L989-4true [2021-11-07 08:31:37,542 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:31:37,543 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2021-11-07 08:31:37,554 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:31:37,554 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [242219625] [2021-11-07 08:31:37,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:31:37,556 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:31:37,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:31:37,703 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:31:37,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:31:37,777 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:31:37,780 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:31:37,780 INFO L85 PathProgramCache]: Analyzing trace with hash -1530816170, now seen corresponding path program 1 times [2021-11-07 08:31:37,780 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:31:37,781 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1102860474] [2021-11-07 08:31:37,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:31:37,781 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:31:37,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:31:37,849 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:31:37,850 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:31:37,850 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1102860474] [2021-11-07 08:31:37,851 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1102860474] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 08:31:37,851 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 08:31:37,851 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-07 08:31:37,852 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [116834730] [2021-11-07 08:31:37,857 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:31:37,858 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:31:37,875 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-11-07 08:31:37,876 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-11-07 08:31:37,879 INFO L87 Difference]: Start difference. First operand has 253 states, 248 states have (on average 1.6370967741935485) internal successors, (406), 248 states have internal predecessors, (406), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:31:37,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:31:37,904 INFO L93 Difference]: Finished difference Result 249 states and 318 transitions. [2021-11-07 08:31:37,905 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-11-07 08:31:37,907 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 249 states and 318 transitions. [2021-11-07 08:31:37,913 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 227 [2021-11-07 08:31:37,924 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 249 states to 245 states and 314 transitions. [2021-11-07 08:31:37,926 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 245 [2021-11-07 08:31:37,927 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 245 [2021-11-07 08:31:37,928 INFO L73 IsDeterministic]: Start isDeterministic. Operand 245 states and 314 transitions. [2021-11-07 08:31:37,932 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:31:37,932 INFO L681 BuchiCegarLoop]: Abstraction has 245 states and 314 transitions. [2021-11-07 08:31:37,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 245 states and 314 transitions. [2021-11-07 08:31:37,980 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 245 to 245. [2021-11-07 08:31:37,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 245 states, 241 states have (on average 1.2780082987551866) internal successors, (308), 240 states have internal predecessors, (308), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:31:37,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 245 states to 245 states and 314 transitions. [2021-11-07 08:31:37,985 INFO L704 BuchiCegarLoop]: Abstraction has 245 states and 314 transitions. [2021-11-07 08:31:37,986 INFO L587 BuchiCegarLoop]: Abstraction has 245 states and 314 transitions. [2021-11-07 08:31:37,986 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-11-07 08:31:37,986 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 245 states and 314 transitions. [2021-11-07 08:31:37,989 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 227 [2021-11-07 08:31:37,989 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:31:37,989 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:31:37,992 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:31:37,992 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 08:31:37,993 INFO L791 eck$LassoCheckResult]: Stem: 754#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string30.base, #t~string30.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string30.base, #t~string30.offset, 1);call write~init~int(0, #t~string30.base, 1 + #t~string30.offset, 1);call #t~string31.base, #t~string31.offset := #Ultimate.allocOnStack(21);call ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := #Ultimate.allocOnStack(40);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 725#L-1 havoc main_#res;havoc main_#t~ret45.base, main_#t~ret45.offset, main_#t~mem46, main_#t~mem47, main_#t~mem48, main_#t~mem50, main_#t~mem49, main_#t~mem51, main_#t~mem52, main_#t~mem54, main_#t~mem53, main_#t~mem55, main_#t~mem56, main_#t~mem58, main_#t~mem57, main_#t~mem59, main_#t~mem60, main_#t~switch61, main_#t~mem62, main_#t~mem63, main_#t~mem64, main_#t~mem65, main_#t~mem66, main_#t~mem67, main_#t~mem68, main_#t~mem69, main_#t~mem70, main_#t~mem71, main_#t~mem72, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~ret73.base, main_#t~ret73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76.base, main_#t~mem76.offset, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79.base, main_#t~mem79.offset, main_#t~mem80.base, main_#t~mem80.offset, main_#t~ret81.base, main_#t~ret81.offset, main_#t~mem82.base, main_#t~mem82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86.base, main_#t~mem86.offset, main_#t~mem87.base, main_#t~mem87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91.base, main_#t~mem91.offset, main_#t~mem92, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95.base, main_#t~mem95.offset, main_#t~mem96.base, main_#t~mem96.offset, main_#t~mem97, main_#t~post98, main_#t~mem99.base, main_#t~mem99.offset, main_#t~mem100, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103, main_#t~post104, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem109, main_#t~mem108, main_#t~mem110.base, main_#t~mem110.offset, main_#t~mem111, main_#t~short112, main_#t~mem113.base, main_#t~mem113.offset, main_#t~mem114, main_#t~ret115.base, main_#t~ret115.offset, main_#t~mem116.base, main_#t~mem116.offset, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem118.base, main_#t~mem118.offset, main_#t~mem119, main_#t~mem120.base, main_#t~mem120.offset, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem124, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem128, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127, main_#t~ite129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem140, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem141.base, main_#t~mem141.offset, main_#t~mem142, main_#t~pre143, main_#t~mem144.base, main_#t~mem144.offset, main_#t~mem145, main_#t~mem146.base, main_#t~mem146.offset, main_#t~mem147, main_#t~post148, main_#t~mem152, main_#t~mem150, main_#t~mem149.base, main_#t~mem149.offset, main_#t~mem151, main_#t~mem153, main_#t~post154, main_#t~mem155.base, main_#t~mem155.offset, main_#t~mem156.base, main_#t~mem156.offset, main_#t~mem157.base, main_#t~mem157.offset, main_#t~post131, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133, main_#t~mem158.base, main_#t~mem158.offset, main_#t~mem159.base, main_#t~mem159.offset, main_#t~mem160.base, main_#t~mem160.offset, main_#t~mem161, main_#t~mem162.base, main_#t~mem162.offset, main_#t~mem163, main_#t~mem164.base, main_#t~mem164.offset, main_#t~mem165, main_#t~post166, main_#t~mem167.base, main_#t~mem167.offset, main_#t~mem168.base, main_#t~mem168.offset, main_#t~mem169.base, main_#t~mem169.offset, main_#t~mem170.base, main_#t~mem170.offset, main_#t~mem173, main_#t~mem171.base, main_#t~mem171.offset, main_#t~mem172, main_#t~ite176, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178, main_#t~mem179.base, main_#t~mem179.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem42, main_#t~post43, main_#t~mem44, main_#t~mem184, main_#t~mem183, main_#t~mem185, main_#t~mem186, main_#t~mem188, main_#t~mem187, main_#t~mem189, main_#t~mem190, main_#t~mem192, main_#t~mem191, main_#t~mem193, main_#t~mem194, main_#t~switch195, main_#t~mem196, main_#t~mem197, main_#t~mem198, main_#t~mem199, main_#t~mem200, main_#t~mem201, main_#t~mem202, main_#t~mem203, main_#t~mem204, main_#t~mem205, main_#t~mem206, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem216, main_#t~mem217, main_#t~mem218, main_#t~short219, main_#t~mem220.base, main_#t~mem220.offset, main_#t~ret221, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~short228, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232, main_#t~mem233.base, main_#t~mem233.offset, main_#t~mem234.base, main_#t~mem234.offset, main_#t~mem235.base, main_#t~mem235.offset, main_#t~mem236.base, main_#t~mem236.offset, main_#t~mem237.base, main_#t~mem237.offset, main_#t~mem238.base, main_#t~mem238.offset, main_#t~mem239, main_#t~mem240.base, main_#t~mem240.offset, main_#t~mem241.base, main_#t~mem241.offset, main_#t~mem242.base, main_#t~mem242.offset, main_#t~mem243, main_#t~mem244.base, main_#t~mem244.offset, main_#t~mem245.base, main_#t~mem245.offset, main_#t~mem246.base, main_#t~mem246.offset, main_#t~mem247.base, main_#t~mem247.offset, main_#t~mem248.base, main_#t~mem248.offset, main_#t~mem249, main_#t~mem250.base, main_#t~mem250.offset, main_#t~mem253, main_#t~mem251.base, main_#t~mem251.offset, main_#t~mem252, main_#t~mem254.base, main_#t~mem254.offset, main_#t~mem255.base, main_#t~mem255.offset, main_#t~mem256, main_#t~post257, main_#t~mem258.base, main_#t~mem258.offset, main_#t~mem259.base, main_#t~mem259.offset, main_#t~mem260.base, main_#t~mem260.offset, main_#t~mem261.base, main_#t~mem261.offset, main_#t~mem262.base, main_#t~mem262.offset, main_#t~mem263.base, main_#t~mem263.offset, main_#t~mem264.base, main_#t~mem264.offset, main_#t~mem265.base, main_#t~mem265.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem266.base, main_#t~mem266.offset, main_#t~mem267, main_#t~post268, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem180, main_#t~post181, main_#t~mem182, main_#t~mem269.base, main_#t~mem269.offset, main_#t~ite271.base, main_#t~ite271.offset, main_#t~mem270.base, main_#t~mem270.offset, main_#t~mem274.base, main_#t~mem274.offset, main_#t~mem275.base, main_#t~mem275.offset, main_#t~short276, main_#t~mem277.base, main_#t~mem277.offset, main_#t~mem278.base, main_#t~mem278.offset, main_#t~mem279.base, main_#t~mem279.offset, main_#t~mem280, main_#t~mem281.base, main_#t~mem281.offset, main_#t~mem282.base, main_#t~mem282.offset, main_#t~mem283.base, main_#t~mem283.offset, main_#t~mem284.base, main_#t~mem284.offset, main_#t~mem285.base, main_#t~mem285.offset, main_#t~mem286.base, main_#t~mem286.offset, main_#t~mem287, main_#t~mem288.base, main_#t~mem288.offset, main_#t~mem289.base, main_#t~mem289.offset, main_#t~mem290.base, main_#t~mem290.offset, main_#t~mem291, main_#t~mem292.base, main_#t~mem292.offset, main_#t~mem293.base, main_#t~mem293.offset, main_#t~mem294.base, main_#t~mem294.offset, main_#t~mem295.base, main_#t~mem295.offset, main_#t~mem296.base, main_#t~mem296.offset, main_#t~mem297, main_#t~mem298.base, main_#t~mem298.offset, main_#t~mem301, main_#t~mem299.base, main_#t~mem299.offset, main_#t~mem300, main_#t~mem302.base, main_#t~mem302.offset, main_#t~mem303.base, main_#t~mem303.offset, main_#t~mem304, main_#t~post305, main_#t~mem306.base, main_#t~mem306.offset, main_#t~mem307.base, main_#t~mem307.offset, main_#t~mem308.base, main_#t~mem308.offset, main_#t~mem309.base, main_#t~mem309.offset, main_#t~mem310.base, main_#t~mem310.offset, main_#t~mem311.base, main_#t~mem311.offset, main_#t~mem312.base, main_#t~mem312.offset, main_#t~mem313.base, main_#t~mem313.offset, main_~_hd_head~1.base, main_~_hd_head~1.offset, main_#t~mem314.base, main_#t~mem314.offset, main_#t~mem315, main_#t~post316, main_~_hd_bkt~1, main_~_hd_hh_del~1.base, main_~_hd_hh_del~1.offset, main_#t~ite273.base, main_#t~ite273.offset, main_#t~mem272.base, main_#t~mem272.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 525#L989-4 [2021-11-07 08:31:38,002 INFO L793 eck$LassoCheckResult]: Loop: 525#L989-4 call main_#t~mem44 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 514#L989-1 assume !!(main_#t~mem44 < 10);havoc main_#t~mem44;real_malloc_#in~n := 40;havoc real_malloc_#res.base, real_malloc_#res.offset;havoc real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset, real_malloc_~n;real_malloc_~n := real_malloc_#in~n;call real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset := #Ultimate.allocOnHeap(real_malloc_~n);real_malloc_#res.base, real_malloc_#res.offset := real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset;havoc real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset; 516#L979 main_#t~ret45.base, main_#t~ret45.offset := real_malloc_#res.base, real_malloc_#res.offset;main_~user~0.base, main_~user~0.offset := main_#t~ret45.base, main_#t~ret45.offset;havoc main_#t~ret45.base, main_#t~ret45.offset; 526#L991 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 527#L991-2 call main_#t~mem46 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem46, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem46;call main_#t~mem47 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem48 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem47 * main_#t~mem48, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem47;havoc main_#t~mem48; 653#L996-118 havoc main_~_ha_hashv~0; 709#L996-49 goto; 710#L996-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 518#L996-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 550#L996-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch61 := 11 == main_~_hj_k~0; 746#L996-10 assume main_#t~switch61;call main_#t~mem62 := read~int(main_~_hj_key~0.base, 10 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 16777216 * (main_#t~mem62 % 256);havoc main_#t~mem62; 753#L996-12 main_#t~switch61 := main_#t~switch61 || 10 == main_~_hj_k~0; 627#L996-13 assume main_#t~switch61;call main_#t~mem63 := read~int(main_~_hj_key~0.base, 9 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 65536 * (main_#t~mem63 % 256);havoc main_#t~mem63; 628#L996-15 main_#t~switch61 := main_#t~switch61 || 9 == main_~_hj_k~0; 749#L996-16 assume main_#t~switch61;call main_#t~mem64 := read~int(main_~_hj_key~0.base, 8 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 256 * (main_#t~mem64 % 256);havoc main_#t~mem64; 750#L996-18 main_#t~switch61 := main_#t~switch61 || 8 == main_~_hj_k~0; 737#L996-19 assume main_#t~switch61;call main_#t~mem65 := read~int(main_~_hj_key~0.base, 7 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 16777216 * (main_#t~mem65 % 256);havoc main_#t~mem65; 732#L996-21 main_#t~switch61 := main_#t~switch61 || 7 == main_~_hj_k~0; 706#L996-22 assume main_#t~switch61;call main_#t~mem66 := read~int(main_~_hj_key~0.base, 6 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 65536 * (main_#t~mem66 % 256);havoc main_#t~mem66; 707#L996-24 main_#t~switch61 := main_#t~switch61 || 6 == main_~_hj_k~0; 728#L996-25 assume main_#t~switch61;call main_#t~mem67 := read~int(main_~_hj_key~0.base, 5 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 256 * (main_#t~mem67 % 256);havoc main_#t~mem67; 695#L996-27 main_#t~switch61 := main_#t~switch61 || 5 == main_~_hj_k~0; 519#L996-28 assume !main_#t~switch61; 520#L996-30 main_#t~switch61 := main_#t~switch61 || 4 == main_~_hj_k~0; 663#L996-31 assume main_#t~switch61;call main_#t~mem69 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem69 % 256);havoc main_#t~mem69; 684#L996-33 main_#t~switch61 := main_#t~switch61 || 3 == main_~_hj_k~0; 647#L996-34 assume main_#t~switch61;call main_#t~mem70 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem70 % 256);havoc main_#t~mem70; 648#L996-36 main_#t~switch61 := main_#t~switch61 || 2 == main_~_hj_k~0; 608#L996-37 assume main_#t~switch61;call main_#t~mem71 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem71 % 256);havoc main_#t~mem71; 609#L996-39 main_#t~switch61 := main_#t~switch61 || 1 == main_~_hj_k~0; 631#L996-40 assume main_#t~switch61;call main_#t~mem72 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem72 % 256;havoc main_#t~mem72; 664#L996-42 havoc main_#t~switch61; 577#L996-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 578#L996-44 goto; 679#L996-46 goto; 697#L996-48 goto; 735#L996-116 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 736#L996-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem88.base, main_#t~mem88.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem88.base, main_#t~mem88.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem88.base, main_#t~mem88.offset; 637#L996-63 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem89.base, main_#t~mem89.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem90.base, main_#t~mem90.offset := read~$Pointer$(main_#t~mem89.base, 16 + main_#t~mem89.offset, 4);call main_#t~mem91.base, main_#t~mem91.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem92 := read~int(main_#t~mem91.base, 20 + main_#t~mem91.offset, 4);call write~$Pointer$(main_#t~mem90.base, main_#t~mem90.offset - main_#t~mem92, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem89.base, main_#t~mem89.offset;havoc main_#t~mem90.base, main_#t~mem90.offset;havoc main_#t~mem91.base, main_#t~mem91.offset;havoc main_#t~mem92;call main_#t~mem93.base, main_#t~mem93.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem94.base, main_#t~mem94.offset := read~$Pointer$(main_#t~mem93.base, 16 + main_#t~mem93.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem94.base, 8 + main_#t~mem94.offset, 4);havoc main_#t~mem93.base, main_#t~mem93.offset;havoc main_#t~mem94.base, main_#t~mem94.offset;call main_#t~mem95.base, main_#t~mem95.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem95.base, 16 + main_#t~mem95.offset, 4);havoc main_#t~mem95.base, main_#t~mem95.offset; 638#L996-62 goto; 582#L996-114 havoc main_~_ha_bkt~0;call main_#t~mem96.base, main_#t~mem96.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem97 := read~int(main_#t~mem96.base, 12 + main_#t~mem96.offset, 4);main_#t~post98 := main_#t~mem97;call write~int(1 + main_#t~post98, main_#t~mem96.base, 12 + main_#t~mem96.offset, 4);havoc main_#t~mem96.base, main_#t~mem96.offset;havoc main_#t~mem97;havoc main_#t~post98; 626#L996-67 call main_#t~mem99.base, main_#t~mem99.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem100 := read~int(main_#t~mem99.base, 4 + main_#t~mem99.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem100 - 1);havoc main_#t~mem99.base, main_#t~mem99.offset;havoc main_#t~mem100; 692#L996-66 goto; 742#L996-112 call main_#t~mem101.base, main_#t~mem101.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem102.base, main_#t~mem102.offset := read~$Pointer$(main_#t~mem101.base, main_#t~mem101.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem102.base, main_#t~mem102.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem101.base, main_#t~mem101.offset;havoc main_#t~mem102.base, main_#t~mem102.offset;call main_#t~mem103 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post104 := main_#t~mem103;call write~int(1 + main_#t~post104, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem103;havoc main_#t~post104;call main_#t~mem105.base, main_#t~mem105.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem105.base, main_#t~mem105.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem105.base, main_#t~mem105.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem106.base, main_#t~mem106.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 729#L996-69 assume main_#t~mem106.base != 0 || main_#t~mem106.offset != 0;havoc main_#t~mem106.base, main_#t~mem106.offset;call main_#t~mem107.base, main_#t~mem107.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem107.base, 12 + main_#t~mem107.offset, 4);havoc main_#t~mem107.base, main_#t~mem107.offset; 551#L996-71 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem109 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem108 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short112 := main_#t~mem109 % 4294967296 >= 10 * (1 + main_#t~mem108) % 4294967296; 552#L996-72 assume !main_#t~short112; 614#L996-74 assume !main_#t~short112;havoc main_#t~mem109;havoc main_#t~mem108;havoc main_#t~mem110.base, main_#t~mem110.offset;havoc main_#t~mem111;havoc main_#t~short112; 571#L996-111 goto; 566#L996-113 goto; 567#L996-115 goto; 687#L996-117 goto; 688#L989-3 call main_#t~mem42 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post43 := main_#t~mem42;call write~int(1 + main_#t~post43, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem42;havoc main_#t~post43; 525#L989-4 [2021-11-07 08:31:38,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:31:38,004 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2021-11-07 08:31:38,005 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:31:38,006 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1133038313] [2021-11-07 08:31:38,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:31:38,009 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:31:38,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:31:38,057 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:31:38,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:31:38,142 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:31:38,145 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:31:38,145 INFO L85 PathProgramCache]: Analyzing trace with hash 1020807865, now seen corresponding path program 1 times [2021-11-07 08:31:38,145 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:31:38,150 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [189730772] [2021-11-07 08:31:38,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:31:38,150 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:31:38,188 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 08:31:38,189 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [693664049] [2021-11-07 08:31:38,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:31:38,190 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:31:38,190 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:31:38,199 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:31:38,222 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-11-07 08:31:38,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:31:38,457 INFO L263 TraceCheckSpWp]: Trace formula consists of 301 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-07 08:31:38,462 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 08:31:38,733 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:31:38,733 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:31:38,733 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [189730772] [2021-11-07 08:31:38,734 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-07 08:31:38,734 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [693664049] [2021-11-07 08:31:38,734 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [693664049] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 08:31:38,734 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 08:31:38,735 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-07 08:31:38,735 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [560755768] [2021-11-07 08:31:38,735 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:31:38,736 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:31:38,736 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-07 08:31:38,737 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-07 08:31:38,737 INFO L87 Difference]: Start difference. First operand 245 states and 314 transitions. cyclomatic complexity: 73 Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:31:38,854 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:31:38,854 INFO L93 Difference]: Finished difference Result 266 states and 335 transitions. [2021-11-07 08:31:38,855 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-07 08:31:38,855 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 266 states and 335 transitions. [2021-11-07 08:31:38,858 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 248 [2021-11-07 08:31:38,863 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 266 states to 266 states and 335 transitions. [2021-11-07 08:31:38,863 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 266 [2021-11-07 08:31:38,864 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 266 [2021-11-07 08:31:38,864 INFO L73 IsDeterministic]: Start isDeterministic. Operand 266 states and 335 transitions. [2021-11-07 08:31:38,866 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:31:38,866 INFO L681 BuchiCegarLoop]: Abstraction has 266 states and 335 transitions. [2021-11-07 08:31:38,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 266 states and 335 transitions. [2021-11-07 08:31:38,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 266 to 265. [2021-11-07 08:31:38,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 265 states, 261 states have (on average 1.2567049808429118) internal successors, (328), 260 states have internal predecessors, (328), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:31:38,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 265 states to 265 states and 334 transitions. [2021-11-07 08:31:38,883 INFO L704 BuchiCegarLoop]: Abstraction has 265 states and 334 transitions. [2021-11-07 08:31:38,883 INFO L587 BuchiCegarLoop]: Abstraction has 265 states and 334 transitions. [2021-11-07 08:31:38,883 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-11-07 08:31:38,884 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 265 states and 334 transitions. [2021-11-07 08:31:38,886 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 247 [2021-11-07 08:31:38,886 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:31:38,886 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:31:38,887 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:31:38,888 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 08:31:38,888 INFO L791 eck$LassoCheckResult]: Stem: 1430#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string30.base, #t~string30.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string30.base, #t~string30.offset, 1);call write~init~int(0, #t~string30.base, 1 + #t~string30.offset, 1);call #t~string31.base, #t~string31.offset := #Ultimate.allocOnStack(21);call ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := #Ultimate.allocOnStack(40);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 1399#L-1 havoc main_#res;havoc main_#t~ret45.base, main_#t~ret45.offset, main_#t~mem46, main_#t~mem47, main_#t~mem48, main_#t~mem50, main_#t~mem49, main_#t~mem51, main_#t~mem52, main_#t~mem54, main_#t~mem53, main_#t~mem55, main_#t~mem56, main_#t~mem58, main_#t~mem57, main_#t~mem59, main_#t~mem60, main_#t~switch61, main_#t~mem62, main_#t~mem63, main_#t~mem64, main_#t~mem65, main_#t~mem66, main_#t~mem67, main_#t~mem68, main_#t~mem69, main_#t~mem70, main_#t~mem71, main_#t~mem72, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~ret73.base, main_#t~ret73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76.base, main_#t~mem76.offset, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79.base, main_#t~mem79.offset, main_#t~mem80.base, main_#t~mem80.offset, main_#t~ret81.base, main_#t~ret81.offset, main_#t~mem82.base, main_#t~mem82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86.base, main_#t~mem86.offset, main_#t~mem87.base, main_#t~mem87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91.base, main_#t~mem91.offset, main_#t~mem92, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95.base, main_#t~mem95.offset, main_#t~mem96.base, main_#t~mem96.offset, main_#t~mem97, main_#t~post98, main_#t~mem99.base, main_#t~mem99.offset, main_#t~mem100, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103, main_#t~post104, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem109, main_#t~mem108, main_#t~mem110.base, main_#t~mem110.offset, main_#t~mem111, main_#t~short112, main_#t~mem113.base, main_#t~mem113.offset, main_#t~mem114, main_#t~ret115.base, main_#t~ret115.offset, main_#t~mem116.base, main_#t~mem116.offset, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem118.base, main_#t~mem118.offset, main_#t~mem119, main_#t~mem120.base, main_#t~mem120.offset, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem124, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem128, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127, main_#t~ite129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem140, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem141.base, main_#t~mem141.offset, main_#t~mem142, main_#t~pre143, main_#t~mem144.base, main_#t~mem144.offset, main_#t~mem145, main_#t~mem146.base, main_#t~mem146.offset, main_#t~mem147, main_#t~post148, main_#t~mem152, main_#t~mem150, main_#t~mem149.base, main_#t~mem149.offset, main_#t~mem151, main_#t~mem153, main_#t~post154, main_#t~mem155.base, main_#t~mem155.offset, main_#t~mem156.base, main_#t~mem156.offset, main_#t~mem157.base, main_#t~mem157.offset, main_#t~post131, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133, main_#t~mem158.base, main_#t~mem158.offset, main_#t~mem159.base, main_#t~mem159.offset, main_#t~mem160.base, main_#t~mem160.offset, main_#t~mem161, main_#t~mem162.base, main_#t~mem162.offset, main_#t~mem163, main_#t~mem164.base, main_#t~mem164.offset, main_#t~mem165, main_#t~post166, main_#t~mem167.base, main_#t~mem167.offset, main_#t~mem168.base, main_#t~mem168.offset, main_#t~mem169.base, main_#t~mem169.offset, main_#t~mem170.base, main_#t~mem170.offset, main_#t~mem173, main_#t~mem171.base, main_#t~mem171.offset, main_#t~mem172, main_#t~ite176, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178, main_#t~mem179.base, main_#t~mem179.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem42, main_#t~post43, main_#t~mem44, main_#t~mem184, main_#t~mem183, main_#t~mem185, main_#t~mem186, main_#t~mem188, main_#t~mem187, main_#t~mem189, main_#t~mem190, main_#t~mem192, main_#t~mem191, main_#t~mem193, main_#t~mem194, main_#t~switch195, main_#t~mem196, main_#t~mem197, main_#t~mem198, main_#t~mem199, main_#t~mem200, main_#t~mem201, main_#t~mem202, main_#t~mem203, main_#t~mem204, main_#t~mem205, main_#t~mem206, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem216, main_#t~mem217, main_#t~mem218, main_#t~short219, main_#t~mem220.base, main_#t~mem220.offset, main_#t~ret221, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~short228, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232, main_#t~mem233.base, main_#t~mem233.offset, main_#t~mem234.base, main_#t~mem234.offset, main_#t~mem235.base, main_#t~mem235.offset, main_#t~mem236.base, main_#t~mem236.offset, main_#t~mem237.base, main_#t~mem237.offset, main_#t~mem238.base, main_#t~mem238.offset, main_#t~mem239, main_#t~mem240.base, main_#t~mem240.offset, main_#t~mem241.base, main_#t~mem241.offset, main_#t~mem242.base, main_#t~mem242.offset, main_#t~mem243, main_#t~mem244.base, main_#t~mem244.offset, main_#t~mem245.base, main_#t~mem245.offset, main_#t~mem246.base, main_#t~mem246.offset, main_#t~mem247.base, main_#t~mem247.offset, main_#t~mem248.base, main_#t~mem248.offset, main_#t~mem249, main_#t~mem250.base, main_#t~mem250.offset, main_#t~mem253, main_#t~mem251.base, main_#t~mem251.offset, main_#t~mem252, main_#t~mem254.base, main_#t~mem254.offset, main_#t~mem255.base, main_#t~mem255.offset, main_#t~mem256, main_#t~post257, main_#t~mem258.base, main_#t~mem258.offset, main_#t~mem259.base, main_#t~mem259.offset, main_#t~mem260.base, main_#t~mem260.offset, main_#t~mem261.base, main_#t~mem261.offset, main_#t~mem262.base, main_#t~mem262.offset, main_#t~mem263.base, main_#t~mem263.offset, main_#t~mem264.base, main_#t~mem264.offset, main_#t~mem265.base, main_#t~mem265.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem266.base, main_#t~mem266.offset, main_#t~mem267, main_#t~post268, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem180, main_#t~post181, main_#t~mem182, main_#t~mem269.base, main_#t~mem269.offset, main_#t~ite271.base, main_#t~ite271.offset, main_#t~mem270.base, main_#t~mem270.offset, main_#t~mem274.base, main_#t~mem274.offset, main_#t~mem275.base, main_#t~mem275.offset, main_#t~short276, main_#t~mem277.base, main_#t~mem277.offset, main_#t~mem278.base, main_#t~mem278.offset, main_#t~mem279.base, main_#t~mem279.offset, main_#t~mem280, main_#t~mem281.base, main_#t~mem281.offset, main_#t~mem282.base, main_#t~mem282.offset, main_#t~mem283.base, main_#t~mem283.offset, main_#t~mem284.base, main_#t~mem284.offset, main_#t~mem285.base, main_#t~mem285.offset, main_#t~mem286.base, main_#t~mem286.offset, main_#t~mem287, main_#t~mem288.base, main_#t~mem288.offset, main_#t~mem289.base, main_#t~mem289.offset, main_#t~mem290.base, main_#t~mem290.offset, main_#t~mem291, main_#t~mem292.base, main_#t~mem292.offset, main_#t~mem293.base, main_#t~mem293.offset, main_#t~mem294.base, main_#t~mem294.offset, main_#t~mem295.base, main_#t~mem295.offset, main_#t~mem296.base, main_#t~mem296.offset, main_#t~mem297, main_#t~mem298.base, main_#t~mem298.offset, main_#t~mem301, main_#t~mem299.base, main_#t~mem299.offset, main_#t~mem300, main_#t~mem302.base, main_#t~mem302.offset, main_#t~mem303.base, main_#t~mem303.offset, main_#t~mem304, main_#t~post305, main_#t~mem306.base, main_#t~mem306.offset, main_#t~mem307.base, main_#t~mem307.offset, main_#t~mem308.base, main_#t~mem308.offset, main_#t~mem309.base, main_#t~mem309.offset, main_#t~mem310.base, main_#t~mem310.offset, main_#t~mem311.base, main_#t~mem311.offset, main_#t~mem312.base, main_#t~mem312.offset, main_#t~mem313.base, main_#t~mem313.offset, main_~_hd_head~1.base, main_~_hd_head~1.offset, main_#t~mem314.base, main_#t~mem314.offset, main_#t~mem315, main_#t~post316, main_~_hd_bkt~1, main_~_hd_hh_del~1.base, main_~_hd_hh_del~1.offset, main_#t~ite273.base, main_#t~ite273.offset, main_#t~mem272.base, main_#t~mem272.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 1198#L989-4 [2021-11-07 08:31:38,888 INFO L793 eck$LassoCheckResult]: Loop: 1198#L989-4 call main_#t~mem44 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 1187#L989-1 assume !!(main_#t~mem44 < 10);havoc main_#t~mem44;real_malloc_#in~n := 40;havoc real_malloc_#res.base, real_malloc_#res.offset;havoc real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset, real_malloc_~n;real_malloc_~n := real_malloc_#in~n;call real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset := #Ultimate.allocOnHeap(real_malloc_~n);real_malloc_#res.base, real_malloc_#res.offset := real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset;havoc real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset; 1189#L979 main_#t~ret45.base, main_#t~ret45.offset := real_malloc_#res.base, real_malloc_#res.offset;main_~user~0.base, main_~user~0.offset := main_#t~ret45.base, main_#t~ret45.offset;havoc main_#t~ret45.base, main_#t~ret45.offset; 1199#L991 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 1200#L991-2 call main_#t~mem46 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem46, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem46;call main_#t~mem47 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem48 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem47 * main_#t~mem48, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem47;havoc main_#t~mem48; 1327#L996-118 havoc main_~_ha_hashv~0; 1383#L996-49 goto; 1384#L996-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 1191#L996-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 1225#L996-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch61 := 11 == main_~_hj_k~0; 1421#L996-10 assume main_#t~switch61;call main_#t~mem62 := read~int(main_~_hj_key~0.base, 10 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 16777216 * (main_#t~mem62 % 256);havoc main_#t~mem62; 1428#L996-12 main_#t~switch61 := main_#t~switch61 || 10 == main_~_hj_k~0; 1300#L996-13 assume main_#t~switch61;call main_#t~mem63 := read~int(main_~_hj_key~0.base, 9 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 65536 * (main_#t~mem63 % 256);havoc main_#t~mem63; 1301#L996-15 main_#t~switch61 := main_#t~switch61 || 9 == main_~_hj_k~0; 1424#L996-16 assume main_#t~switch61;call main_#t~mem64 := read~int(main_~_hj_key~0.base, 8 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 256 * (main_#t~mem64 % 256);havoc main_#t~mem64; 1425#L996-18 main_#t~switch61 := main_#t~switch61 || 8 == main_~_hj_k~0; 1411#L996-19 assume main_#t~switch61;call main_#t~mem65 := read~int(main_~_hj_key~0.base, 7 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 16777216 * (main_#t~mem65 % 256);havoc main_#t~mem65; 1406#L996-21 main_#t~switch61 := main_#t~switch61 || 7 == main_~_hj_k~0; 1380#L996-22 assume main_#t~switch61;call main_#t~mem66 := read~int(main_~_hj_key~0.base, 6 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 65536 * (main_#t~mem66 % 256);havoc main_#t~mem66; 1381#L996-24 main_#t~switch61 := main_#t~switch61 || 6 == main_~_hj_k~0; 1402#L996-25 assume main_#t~switch61;call main_#t~mem67 := read~int(main_~_hj_key~0.base, 5 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 256 * (main_#t~mem67 % 256);havoc main_#t~mem67; 1371#L996-27 main_#t~switch61 := main_#t~switch61 || 5 == main_~_hj_k~0; 1192#L996-28 assume main_#t~switch61;call main_#t~mem68 := read~int(main_~_hj_key~0.base, 4 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + main_#t~mem68 % 256;havoc main_#t~mem68; 1193#L996-30 main_#t~switch61 := main_#t~switch61 || 4 == main_~_hj_k~0; 1338#L996-31 assume main_#t~switch61;call main_#t~mem69 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem69 % 256);havoc main_#t~mem69; 1358#L996-33 main_#t~switch61 := main_#t~switch61 || 3 == main_~_hj_k~0; 1321#L996-34 assume main_#t~switch61;call main_#t~mem70 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem70 % 256);havoc main_#t~mem70; 1322#L996-36 main_#t~switch61 := main_#t~switch61 || 2 == main_~_hj_k~0; 1281#L996-37 assume main_#t~switch61;call main_#t~mem71 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem71 % 256);havoc main_#t~mem71; 1282#L996-39 main_#t~switch61 := main_#t~switch61 || 1 == main_~_hj_k~0; 1412#L996-40 assume main_#t~switch61;call main_#t~mem72 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem72 % 256;havoc main_#t~mem72; 1337#L996-42 havoc main_#t~switch61; 1250#L996-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 1251#L996-44 goto; 1353#L996-46 goto; 1370#L996-48 goto; 1409#L996-116 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 1410#L996-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem88.base, main_#t~mem88.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem88.base, main_#t~mem88.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem88.base, main_#t~mem88.offset; 1308#L996-63 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem89.base, main_#t~mem89.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem90.base, main_#t~mem90.offset := read~$Pointer$(main_#t~mem89.base, 16 + main_#t~mem89.offset, 4);call main_#t~mem91.base, main_#t~mem91.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem92 := read~int(main_#t~mem91.base, 20 + main_#t~mem91.offset, 4);call write~$Pointer$(main_#t~mem90.base, main_#t~mem90.offset - main_#t~mem92, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem89.base, main_#t~mem89.offset;havoc main_#t~mem90.base, main_#t~mem90.offset;havoc main_#t~mem91.base, main_#t~mem91.offset;havoc main_#t~mem92;call main_#t~mem93.base, main_#t~mem93.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem94.base, main_#t~mem94.offset := read~$Pointer$(main_#t~mem93.base, 16 + main_#t~mem93.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem94.base, 8 + main_#t~mem94.offset, 4);havoc main_#t~mem93.base, main_#t~mem93.offset;havoc main_#t~mem94.base, main_#t~mem94.offset;call main_#t~mem95.base, main_#t~mem95.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem95.base, 16 + main_#t~mem95.offset, 4);havoc main_#t~mem95.base, main_#t~mem95.offset; 1309#L996-62 goto; 1255#L996-114 havoc main_~_ha_bkt~0;call main_#t~mem96.base, main_#t~mem96.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem97 := read~int(main_#t~mem96.base, 12 + main_#t~mem96.offset, 4);main_#t~post98 := main_#t~mem97;call write~int(1 + main_#t~post98, main_#t~mem96.base, 12 + main_#t~mem96.offset, 4);havoc main_#t~mem96.base, main_#t~mem96.offset;havoc main_#t~mem97;havoc main_#t~post98; 1297#L996-67 call main_#t~mem99.base, main_#t~mem99.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem100 := read~int(main_#t~mem99.base, 4 + main_#t~mem99.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem100 - 1);havoc main_#t~mem99.base, main_#t~mem99.offset;havoc main_#t~mem100; 1365#L996-66 goto; 1415#L996-112 call main_#t~mem101.base, main_#t~mem101.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem102.base, main_#t~mem102.offset := read~$Pointer$(main_#t~mem101.base, main_#t~mem101.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem102.base, main_#t~mem102.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem101.base, main_#t~mem101.offset;havoc main_#t~mem102.base, main_#t~mem102.offset;call main_#t~mem103 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post104 := main_#t~mem103;call write~int(1 + main_#t~post104, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem103;havoc main_#t~post104;call main_#t~mem105.base, main_#t~mem105.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem105.base, main_#t~mem105.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem105.base, main_#t~mem105.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem106.base, main_#t~mem106.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 1403#L996-69 assume main_#t~mem106.base != 0 || main_#t~mem106.offset != 0;havoc main_#t~mem106.base, main_#t~mem106.offset;call main_#t~mem107.base, main_#t~mem107.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem107.base, 12 + main_#t~mem107.offset, 4);havoc main_#t~mem107.base, main_#t~mem107.offset; 1222#L996-71 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem109 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem108 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short112 := main_#t~mem109 % 4294967296 >= 10 * (1 + main_#t~mem108) % 4294967296; 1223#L996-72 assume !main_#t~short112; 1287#L996-74 assume !main_#t~short112;havoc main_#t~mem109;havoc main_#t~mem108;havoc main_#t~mem110.base, main_#t~mem110.offset;havoc main_#t~mem111;havoc main_#t~short112; 1242#L996-111 goto; 1239#L996-113 goto; 1240#L996-115 goto; 1359#L996-117 goto; 1360#L989-3 call main_#t~mem42 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post43 := main_#t~mem42;call write~int(1 + main_#t~post43, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem42;havoc main_#t~post43; 1198#L989-4 [2021-11-07 08:31:38,889 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:31:38,889 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2021-11-07 08:31:38,890 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:31:38,890 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1016396143] [2021-11-07 08:31:38,890 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:31:38,890 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:31:38,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:31:38,915 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:31:38,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:31:38,946 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:31:38,947 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:31:38,947 INFO L85 PathProgramCache]: Analyzing trace with hash 319207991, now seen corresponding path program 1 times [2021-11-07 08:31:38,947 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:31:38,948 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1189899220] [2021-11-07 08:31:38,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:31:38,948 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:31:38,964 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 08:31:38,964 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1610325278] [2021-11-07 08:31:38,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:31:38,965 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:31:38,965 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:31:38,970 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:31:38,994 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-11-07 08:31:39,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:31:39,212 INFO L263 TraceCheckSpWp]: Trace formula consists of 307 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-07 08:31:39,215 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 08:31:39,377 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:31:39,377 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:31:39,378 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1189899220] [2021-11-07 08:31:39,378 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-07 08:31:39,378 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1610325278] [2021-11-07 08:31:39,378 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1610325278] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 08:31:39,378 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 08:31:39,379 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-07 08:31:39,379 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1679034934] [2021-11-07 08:31:39,379 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:31:39,380 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:31:39,380 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-07 08:31:39,381 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-07 08:31:39,381 INFO L87 Difference]: Start difference. First operand 265 states and 334 transitions. cyclomatic complexity: 73 Second operand has 4 states, 4 states have (on average 13.25) internal successors, (53), 4 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:31:39,499 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:31:39,499 INFO L93 Difference]: Finished difference Result 391 states and 492 transitions. [2021-11-07 08:31:39,500 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-07 08:31:39,500 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 391 states and 492 transitions. [2021-11-07 08:31:39,505 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 353 [2021-11-07 08:31:39,510 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 391 states to 391 states and 492 transitions. [2021-11-07 08:31:39,510 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 391 [2021-11-07 08:31:39,511 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 391 [2021-11-07 08:31:39,511 INFO L73 IsDeterministic]: Start isDeterministic. Operand 391 states and 492 transitions. [2021-11-07 08:31:39,513 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:31:39,513 INFO L681 BuchiCegarLoop]: Abstraction has 391 states and 492 transitions. [2021-11-07 08:31:39,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 391 states and 492 transitions. [2021-11-07 08:31:39,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 391 to 251. [2021-11-07 08:31:39,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 251 states, 247 states have (on average 1.242914979757085) internal successors, (307), 246 states have internal predecessors, (307), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:31:39,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 251 states to 251 states and 313 transitions. [2021-11-07 08:31:39,552 INFO L704 BuchiCegarLoop]: Abstraction has 251 states and 313 transitions. [2021-11-07 08:31:39,552 INFO L587 BuchiCegarLoop]: Abstraction has 251 states and 313 transitions. [2021-11-07 08:31:39,552 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-11-07 08:31:39,552 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 251 states and 313 transitions. [2021-11-07 08:31:39,554 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 233 [2021-11-07 08:31:39,554 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:31:39,554 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:31:39,556 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:31:39,556 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 08:31:39,556 INFO L791 eck$LassoCheckResult]: Stem: 2249#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string30.base, #t~string30.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string30.base, #t~string30.offset, 1);call write~init~int(0, #t~string30.base, 1 + #t~string30.offset, 1);call #t~string31.base, #t~string31.offset := #Ultimate.allocOnStack(21);call ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := #Ultimate.allocOnStack(40);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 2219#L-1 havoc main_#res;havoc main_#t~ret45.base, main_#t~ret45.offset, main_#t~mem46, main_#t~mem47, main_#t~mem48, main_#t~mem50, main_#t~mem49, main_#t~mem51, main_#t~mem52, main_#t~mem54, main_#t~mem53, main_#t~mem55, main_#t~mem56, main_#t~mem58, main_#t~mem57, main_#t~mem59, main_#t~mem60, main_#t~switch61, main_#t~mem62, main_#t~mem63, main_#t~mem64, main_#t~mem65, main_#t~mem66, main_#t~mem67, main_#t~mem68, main_#t~mem69, main_#t~mem70, main_#t~mem71, main_#t~mem72, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~ret73.base, main_#t~ret73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76.base, main_#t~mem76.offset, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79.base, main_#t~mem79.offset, main_#t~mem80.base, main_#t~mem80.offset, main_#t~ret81.base, main_#t~ret81.offset, main_#t~mem82.base, main_#t~mem82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86.base, main_#t~mem86.offset, main_#t~mem87.base, main_#t~mem87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91.base, main_#t~mem91.offset, main_#t~mem92, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95.base, main_#t~mem95.offset, main_#t~mem96.base, main_#t~mem96.offset, main_#t~mem97, main_#t~post98, main_#t~mem99.base, main_#t~mem99.offset, main_#t~mem100, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103, main_#t~post104, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem109, main_#t~mem108, main_#t~mem110.base, main_#t~mem110.offset, main_#t~mem111, main_#t~short112, main_#t~mem113.base, main_#t~mem113.offset, main_#t~mem114, main_#t~ret115.base, main_#t~ret115.offset, main_#t~mem116.base, main_#t~mem116.offset, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem118.base, main_#t~mem118.offset, main_#t~mem119, main_#t~mem120.base, main_#t~mem120.offset, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem124, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem128, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127, main_#t~ite129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem140, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem141.base, main_#t~mem141.offset, main_#t~mem142, main_#t~pre143, main_#t~mem144.base, main_#t~mem144.offset, main_#t~mem145, main_#t~mem146.base, main_#t~mem146.offset, main_#t~mem147, main_#t~post148, main_#t~mem152, main_#t~mem150, main_#t~mem149.base, main_#t~mem149.offset, main_#t~mem151, main_#t~mem153, main_#t~post154, main_#t~mem155.base, main_#t~mem155.offset, main_#t~mem156.base, main_#t~mem156.offset, main_#t~mem157.base, main_#t~mem157.offset, main_#t~post131, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133, main_#t~mem158.base, main_#t~mem158.offset, main_#t~mem159.base, main_#t~mem159.offset, main_#t~mem160.base, main_#t~mem160.offset, main_#t~mem161, main_#t~mem162.base, main_#t~mem162.offset, main_#t~mem163, main_#t~mem164.base, main_#t~mem164.offset, main_#t~mem165, main_#t~post166, main_#t~mem167.base, main_#t~mem167.offset, main_#t~mem168.base, main_#t~mem168.offset, main_#t~mem169.base, main_#t~mem169.offset, main_#t~mem170.base, main_#t~mem170.offset, main_#t~mem173, main_#t~mem171.base, main_#t~mem171.offset, main_#t~mem172, main_#t~ite176, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178, main_#t~mem179.base, main_#t~mem179.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem42, main_#t~post43, main_#t~mem44, main_#t~mem184, main_#t~mem183, main_#t~mem185, main_#t~mem186, main_#t~mem188, main_#t~mem187, main_#t~mem189, main_#t~mem190, main_#t~mem192, main_#t~mem191, main_#t~mem193, main_#t~mem194, main_#t~switch195, main_#t~mem196, main_#t~mem197, main_#t~mem198, main_#t~mem199, main_#t~mem200, main_#t~mem201, main_#t~mem202, main_#t~mem203, main_#t~mem204, main_#t~mem205, main_#t~mem206, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214.base, main_#t~mem214.offset, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem216, main_#t~mem217, main_#t~mem218, main_#t~short219, main_#t~mem220.base, main_#t~mem220.offset, main_#t~ret221, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~short228, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232, main_#t~mem233.base, main_#t~mem233.offset, main_#t~mem234.base, main_#t~mem234.offset, main_#t~mem235.base, main_#t~mem235.offset, main_#t~mem236.base, main_#t~mem236.offset, main_#t~mem237.base, main_#t~mem237.offset, main_#t~mem238.base, main_#t~mem238.offset, main_#t~mem239, main_#t~mem240.base, main_#t~mem240.offset, main_#t~mem241.base, main_#t~mem241.offset, main_#t~mem242.base, main_#t~mem242.offset, main_#t~mem243, main_#t~mem244.base, main_#t~mem244.offset, main_#t~mem245.base, main_#t~mem245.offset, main_#t~mem246.base, main_#t~mem246.offset, main_#t~mem247.base, main_#t~mem247.offset, main_#t~mem248.base, main_#t~mem248.offset, main_#t~mem249, main_#t~mem250.base, main_#t~mem250.offset, main_#t~mem253, main_#t~mem251.base, main_#t~mem251.offset, main_#t~mem252, main_#t~mem254.base, main_#t~mem254.offset, main_#t~mem255.base, main_#t~mem255.offset, main_#t~mem256, main_#t~post257, main_#t~mem258.base, main_#t~mem258.offset, main_#t~mem259.base, main_#t~mem259.offset, main_#t~mem260.base, main_#t~mem260.offset, main_#t~mem261.base, main_#t~mem261.offset, main_#t~mem262.base, main_#t~mem262.offset, main_#t~mem263.base, main_#t~mem263.offset, main_#t~mem264.base, main_#t~mem264.offset, main_#t~mem265.base, main_#t~mem265.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem266.base, main_#t~mem266.offset, main_#t~mem267, main_#t~post268, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem180, main_#t~post181, main_#t~mem182, main_#t~mem269.base, main_#t~mem269.offset, main_#t~ite271.base, main_#t~ite271.offset, main_#t~mem270.base, main_#t~mem270.offset, main_#t~mem274.base, main_#t~mem274.offset, main_#t~mem275.base, main_#t~mem275.offset, main_#t~short276, main_#t~mem277.base, main_#t~mem277.offset, main_#t~mem278.base, main_#t~mem278.offset, main_#t~mem279.base, main_#t~mem279.offset, main_#t~mem280, main_#t~mem281.base, main_#t~mem281.offset, main_#t~mem282.base, main_#t~mem282.offset, main_#t~mem283.base, main_#t~mem283.offset, main_#t~mem284.base, main_#t~mem284.offset, main_#t~mem285.base, main_#t~mem285.offset, main_#t~mem286.base, main_#t~mem286.offset, main_#t~mem287, main_#t~mem288.base, main_#t~mem288.offset, main_#t~mem289.base, main_#t~mem289.offset, main_#t~mem290.base, main_#t~mem290.offset, main_#t~mem291, main_#t~mem292.base, main_#t~mem292.offset, main_#t~mem293.base, main_#t~mem293.offset, main_#t~mem294.base, main_#t~mem294.offset, main_#t~mem295.base, main_#t~mem295.offset, main_#t~mem296.base, main_#t~mem296.offset, main_#t~mem297, main_#t~mem298.base, main_#t~mem298.offset, main_#t~mem301, main_#t~mem299.base, main_#t~mem299.offset, main_#t~mem300, main_#t~mem302.base, main_#t~mem302.offset, main_#t~mem303.base, main_#t~mem303.offset, main_#t~mem304, main_#t~post305, main_#t~mem306.base, main_#t~mem306.offset, main_#t~mem307.base, main_#t~mem307.offset, main_#t~mem308.base, main_#t~mem308.offset, main_#t~mem309.base, main_#t~mem309.offset, main_#t~mem310.base, main_#t~mem310.offset, main_#t~mem311.base, main_#t~mem311.offset, main_#t~mem312.base, main_#t~mem312.offset, main_#t~mem313.base, main_#t~mem313.offset, main_~_hd_head~1.base, main_~_hd_head~1.offset, main_#t~mem314.base, main_#t~mem314.offset, main_#t~mem315, main_#t~post316, main_~_hd_bkt~1, main_~_hd_hh_del~1.base, main_~_hd_hh_del~1.offset, main_#t~ite273.base, main_#t~ite273.offset, main_#t~mem272.base, main_#t~mem272.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 2019#L989-4 [2021-11-07 08:31:39,557 INFO L793 eck$LassoCheckResult]: Loop: 2019#L989-4 call main_#t~mem44 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 2008#L989-1 assume !!(main_#t~mem44 < 10);havoc main_#t~mem44;real_malloc_#in~n := 40;havoc real_malloc_#res.base, real_malloc_#res.offset;havoc real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset, real_malloc_~n;real_malloc_~n := real_malloc_#in~n;call real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset := #Ultimate.allocOnHeap(real_malloc_~n);real_malloc_#res.base, real_malloc_#res.offset := real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset;havoc real_malloc_#t~malloc41.base, real_malloc_#t~malloc41.offset; 2010#L979 main_#t~ret45.base, main_#t~ret45.offset := real_malloc_#res.base, real_malloc_#res.offset;main_~user~0.base, main_~user~0.offset := main_#t~ret45.base, main_#t~ret45.offset;havoc main_#t~ret45.base, main_#t~ret45.offset; 2020#L991 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 2021#L991-2 call main_#t~mem46 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem46, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem46;call main_#t~mem47 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem48 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem47 * main_#t~mem48, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem47;havoc main_#t~mem48; 2147#L996-118 havoc main_~_ha_hashv~0; 2203#L996-49 goto; 2204#L996-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 2012#L996-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 2044#L996-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch61 := 11 == main_~_hj_k~0; 2240#L996-10 assume !main_#t~switch61; 2248#L996-12 main_#t~switch61 := main_#t~switch61 || 10 == main_~_hj_k~0; 2121#L996-13 assume !main_#t~switch61; 2122#L996-15 main_#t~switch61 := main_#t~switch61 || 9 == main_~_hj_k~0; 2244#L996-16 assume !main_#t~switch61; 2245#L996-18 main_#t~switch61 := main_#t~switch61 || 8 == main_~_hj_k~0; 2231#L996-19 assume !main_#t~switch61; 2226#L996-21 main_#t~switch61 := main_#t~switch61 || 7 == main_~_hj_k~0; 2200#L996-22 assume !main_#t~switch61; 2201#L996-24 main_#t~switch61 := main_#t~switch61 || 6 == main_~_hj_k~0; 2222#L996-25 assume !main_#t~switch61; 2189#L996-27 main_#t~switch61 := main_#t~switch61 || 5 == main_~_hj_k~0; 2013#L996-28 assume !main_#t~switch61; 2014#L996-30 main_#t~switch61 := main_#t~switch61 || 4 == main_~_hj_k~0; 2157#L996-31 assume main_#t~switch61;call main_#t~mem69 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem69 % 256);havoc main_#t~mem69; 2178#L996-33 main_#t~switch61 := main_#t~switch61 || 3 == main_~_hj_k~0; 2141#L996-34 assume main_#t~switch61;call main_#t~mem70 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem70 % 256);havoc main_#t~mem70; 2142#L996-36 main_#t~switch61 := main_#t~switch61 || 2 == main_~_hj_k~0; 2102#L996-37 assume main_#t~switch61;call main_#t~mem71 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem71 % 256);havoc main_#t~mem71; 2103#L996-39 main_#t~switch61 := main_#t~switch61 || 1 == main_~_hj_k~0; 2125#L996-40 assume main_#t~switch61;call main_#t~mem72 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem72 % 256;havoc main_#t~mem72; 2158#L996-42 havoc main_#t~switch61; 2071#L996-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 2072#L996-44 goto; 2173#L996-46 goto; 2191#L996-48 goto; 2229#L996-116 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 2230#L996-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem88.base, main_#t~mem88.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem88.base, main_#t~mem88.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem88.base, main_#t~mem88.offset; 2131#L996-63 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem89.base, main_#t~mem89.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem90.base, main_#t~mem90.offset := read~$Pointer$(main_#t~mem89.base, 16 + main_#t~mem89.offset, 4);call main_#t~mem91.base, main_#t~mem91.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem92 := read~int(main_#t~mem91.base, 20 + main_#t~mem91.offset, 4);call write~$Pointer$(main_#t~mem90.base, main_#t~mem90.offset - main_#t~mem92, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem89.base, main_#t~mem89.offset;havoc main_#t~mem90.base, main_#t~mem90.offset;havoc main_#t~mem91.base, main_#t~mem91.offset;havoc main_#t~mem92;call main_#t~mem93.base, main_#t~mem93.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem94.base, main_#t~mem94.offset := read~$Pointer$(main_#t~mem93.base, 16 + main_#t~mem93.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem94.base, 8 + main_#t~mem94.offset, 4);havoc main_#t~mem93.base, main_#t~mem93.offset;havoc main_#t~mem94.base, main_#t~mem94.offset;call main_#t~mem95.base, main_#t~mem95.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem95.base, 16 + main_#t~mem95.offset, 4);havoc main_#t~mem95.base, main_#t~mem95.offset; 2132#L996-62 goto; 2076#L996-114 havoc main_~_ha_bkt~0;call main_#t~mem96.base, main_#t~mem96.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem97 := read~int(main_#t~mem96.base, 12 + main_#t~mem96.offset, 4);main_#t~post98 := main_#t~mem97;call write~int(1 + main_#t~post98, main_#t~mem96.base, 12 + main_#t~mem96.offset, 4);havoc main_#t~mem96.base, main_#t~mem96.offset;havoc main_#t~mem97;havoc main_#t~post98; 2120#L996-67 call main_#t~mem99.base, main_#t~mem99.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem100 := read~int(main_#t~mem99.base, 4 + main_#t~mem99.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem100 - 1);havoc main_#t~mem99.base, main_#t~mem99.offset;havoc main_#t~mem100; 2186#L996-66 goto; 2236#L996-112 call main_#t~mem101.base, main_#t~mem101.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem102.base, main_#t~mem102.offset := read~$Pointer$(main_#t~mem101.base, main_#t~mem101.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem102.base, main_#t~mem102.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem101.base, main_#t~mem101.offset;havoc main_#t~mem102.base, main_#t~mem102.offset;call main_#t~mem103 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post104 := main_#t~mem103;call write~int(1 + main_#t~post104, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem103;havoc main_#t~post104;call main_#t~mem105.base, main_#t~mem105.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem105.base, main_#t~mem105.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem105.base, main_#t~mem105.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem106.base, main_#t~mem106.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 2223#L996-69 assume main_#t~mem106.base != 0 || main_#t~mem106.offset != 0;havoc main_#t~mem106.base, main_#t~mem106.offset;call main_#t~mem107.base, main_#t~mem107.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem107.base, 12 + main_#t~mem107.offset, 4);havoc main_#t~mem107.base, main_#t~mem107.offset; 2045#L996-71 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem109 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem108 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short112 := main_#t~mem109 % 4294967296 >= 10 * (1 + main_#t~mem108) % 4294967296; 2046#L996-72 assume !main_#t~short112; 2108#L996-74 assume !main_#t~short112;havoc main_#t~mem109;havoc main_#t~mem108;havoc main_#t~mem110.base, main_#t~mem110.offset;havoc main_#t~mem111;havoc main_#t~short112; 2065#L996-111 goto; 2060#L996-113 goto; 2061#L996-115 goto; 2181#L996-117 goto; 2182#L989-3 call main_#t~mem42 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post43 := main_#t~mem42;call write~int(1 + main_#t~post43, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem42;havoc main_#t~post43; 2019#L989-4 [2021-11-07 08:31:39,557 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:31:39,557 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2021-11-07 08:31:39,558 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:31:39,558 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1939811709] [2021-11-07 08:31:39,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:31:39,558 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:31:39,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:31:39,601 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:31:39,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:31:39,682 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:31:39,682 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:31:39,683 INFO L85 PathProgramCache]: Analyzing trace with hash -1555166395, now seen corresponding path program 1 times [2021-11-07 08:31:39,683 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:31:39,683 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [59143884] [2021-11-07 08:31:39,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:31:39,684 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:31:39,709 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 08:31:39,710 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [606315244] [2021-11-07 08:31:39,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:31:39,710 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:31:39,711 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:31:39,758 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:31:39,778 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_8cff19eb-45cc-4793-9a5c-4b1036660c45/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process