./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test2-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 47ea0209 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test2-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 5eb0e4c4138981b5d0263d433279609e9b809291f20fa6c19565d53ef342ae2b --- Real Ultimate output --- This is Ultimate 0.2.1-dev-47ea020 [2021-11-07 08:43:26,023 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-07 08:43:26,025 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-07 08:43:26,082 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-07 08:43:26,083 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-07 08:43:26,089 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-07 08:43:26,092 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-07 08:43:26,097 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-07 08:43:26,100 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-07 08:43:26,106 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-07 08:43:26,108 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-07 08:43:26,110 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-07 08:43:26,111 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-07 08:43:26,114 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-07 08:43:26,117 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-07 08:43:26,123 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-07 08:43:26,125 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-07 08:43:26,126 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-07 08:43:26,130 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-07 08:43:26,141 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-07 08:43:26,143 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-07 08:43:26,145 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-07 08:43:26,150 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-07 08:43:26,152 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-07 08:43:26,157 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-07 08:43:26,158 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-07 08:43:26,158 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-07 08:43:26,161 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-07 08:43:26,162 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-07 08:43:26,164 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-07 08:43:26,166 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-07 08:43:26,167 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-07 08:43:26,170 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-07 08:43:26,171 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-07 08:43:26,174 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-07 08:43:26,174 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-07 08:43:26,175 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-07 08:43:26,176 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-07 08:43:26,176 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-07 08:43:26,177 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-07 08:43:26,178 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-07 08:43:26,180 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-11-07 08:43:26,249 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-07 08:43:26,249 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-07 08:43:26,250 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-07 08:43:26,251 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-07 08:43:26,253 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-07 08:43:26,253 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-07 08:43:26,253 INFO L138 SettingsManager]: * Use SBE=true [2021-11-07 08:43:26,254 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-11-07 08:43:26,254 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-11-07 08:43:26,254 INFO L138 SettingsManager]: * Use old map elimination=false [2021-11-07 08:43:26,256 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-11-07 08:43:26,256 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-11-07 08:43:26,257 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-11-07 08:43:26,257 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-07 08:43:26,257 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-07 08:43:26,257 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-11-07 08:43:26,258 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-07 08:43:26,258 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-07 08:43:26,258 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-07 08:43:26,259 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-11-07 08:43:26,259 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-11-07 08:43:26,259 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-11-07 08:43:26,260 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-07 08:43:26,260 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-07 08:43:26,260 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-11-07 08:43:26,260 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-07 08:43:26,262 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-11-07 08:43:26,263 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-07 08:43:26,263 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-07 08:43:26,264 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-07 08:43:26,264 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-07 08:43:26,264 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-07 08:43:26,267 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-11-07 08:43:26,267 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5eb0e4c4138981b5d0263d433279609e9b809291f20fa6c19565d53ef342ae2b [2021-11-07 08:43:26,644 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-07 08:43:26,670 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-07 08:43:26,673 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-07 08:43:26,675 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-07 08:43:26,676 INFO L275 PluginConnector]: CDTParser initialized [2021-11-07 08:43:26,677 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/../../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test2-1.i [2021-11-07 08:43:26,768 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/data/506b08d10/55c95237124a407cac23293f9b1d2df7/FLAGd0d483361 [2021-11-07 08:43:27,559 INFO L306 CDTParser]: Found 1 translation units. [2021-11-07 08:43:27,572 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test2-1.i [2021-11-07 08:43:27,606 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/data/506b08d10/55c95237124a407cac23293f9b1d2df7/FLAGd0d483361 [2021-11-07 08:43:27,715 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/data/506b08d10/55c95237124a407cac23293f9b1d2df7 [2021-11-07 08:43:27,718 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-07 08:43:27,720 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-07 08:43:27,724 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-07 08:43:27,725 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-07 08:43:27,730 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-07 08:43:27,732 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.11 08:43:27" (1/1) ... [2021-11-07 08:43:27,735 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6043f840 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:43:27, skipping insertion in model container [2021-11-07 08:43:27,735 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.11 08:43:27" (1/1) ... [2021-11-07 08:43:27,745 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-07 08:43:27,815 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-07 08:43:28,428 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test2-1.i[37019,37032] [2021-11-07 08:43:28,599 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test2-1.i[47352,47365] [2021-11-07 08:43:28,608 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-07 08:43:28,633 INFO L203 MainTranslator]: Completed pre-run [2021-11-07 08:43:28,713 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test2-1.i[37019,37032] [2021-11-07 08:43:28,844 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test2-1.i[47352,47365] [2021-11-07 08:43:28,847 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-07 08:43:28,914 INFO L208 MainTranslator]: Completed translation [2021-11-07 08:43:28,915 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:43:28 WrapperNode [2021-11-07 08:43:28,915 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-07 08:43:28,917 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-07 08:43:28,917 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-07 08:43:28,917 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-07 08:43:28,928 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:43:28" (1/1) ... [2021-11-07 08:43:29,009 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:43:28" (1/1) ... [2021-11-07 08:43:29,119 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-07 08:43:29,120 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-07 08:43:29,120 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-07 08:43:29,120 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-07 08:43:29,131 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:43:28" (1/1) ... [2021-11-07 08:43:29,131 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:43:28" (1/1) ... [2021-11-07 08:43:29,141 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:43:28" (1/1) ... [2021-11-07 08:43:29,142 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:43:28" (1/1) ... [2021-11-07 08:43:29,200 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:43:28" (1/1) ... [2021-11-07 08:43:29,232 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:43:28" (1/1) ... [2021-11-07 08:43:29,237 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:43:28" (1/1) ... [2021-11-07 08:43:29,252 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-07 08:43:29,253 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-07 08:43:29,253 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-07 08:43:29,253 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-07 08:43:29,257 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:43:28" (1/1) ... [2021-11-07 08:43:29,268 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-07 08:43:29,291 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:43:29,310 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-07 08:43:29,336 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-11-07 08:43:29,371 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2021-11-07 08:43:29,371 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2021-11-07 08:43:29,372 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-07 08:43:29,372 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2021-11-07 08:43:29,372 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-11-07 08:43:29,372 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-07 08:43:29,372 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-11-07 08:43:29,372 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-07 08:43:29,372 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-11-07 08:43:29,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-11-07 08:43:29,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-07 08:43:29,373 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-07 08:43:29,373 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-07 08:43:29,672 WARN L805 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-11-07 08:43:31,174 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-07 08:43:31,175 INFO L299 CfgBuilder]: Removed 70 assume(true) statements. [2021-11-07 08:43:31,177 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.11 08:43:31 BoogieIcfgContainer [2021-11-07 08:43:31,178 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-07 08:43:31,181 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-11-07 08:43:31,182 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-11-07 08:43:31,186 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-11-07 08:43:31,187 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 08:43:31,187 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 07.11 08:43:27" (1/3) ... [2021-11-07 08:43:31,189 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@59d19659 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 07.11 08:43:31, skipping insertion in model container [2021-11-07 08:43:31,189 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 08:43:31,189 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:43:28" (2/3) ... [2021-11-07 08:43:31,190 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@59d19659 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 07.11 08:43:31, skipping insertion in model container [2021-11-07 08:43:31,190 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 08:43:31,190 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.11 08:43:31" (3/3) ... [2021-11-07 08:43:31,194 INFO L389 chiAutomizerObserver]: Analyzing ICFG uthash_OAT_test2-1.i [2021-11-07 08:43:31,265 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-11-07 08:43:31,266 INFO L360 BuchiCegarLoop]: Hoare is false [2021-11-07 08:43:31,267 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-11-07 08:43:31,267 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-11-07 08:43:31,267 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-11-07 08:43:31,268 INFO L364 BuchiCegarLoop]: Difference is false [2021-11-07 08:43:31,268 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-11-07 08:43:31,268 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-11-07 08:43:31,307 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 170 states, 165 states have (on average 1.696969696969697) internal successors, (280), 165 states have internal predecessors, (280), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:43:31,367 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 159 [2021-11-07 08:43:31,367 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:43:31,367 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:43:31,381 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:43:31,382 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2021-11-07 08:43:31,382 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-11-07 08:43:31,386 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 170 states, 165 states have (on average 1.696969696969697) internal successors, (280), 165 states have internal predecessors, (280), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:43:31,412 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 159 [2021-11-07 08:43:31,412 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:43:31,412 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:43:31,413 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:43:31,413 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2021-11-07 08:43:31,422 INFO L791 eck$LassoCheckResult]: Stem: 149#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 44#L-1true havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem149, main_#t~mem148, main_#t~mem150, main_#t~mem151, main_#t~mem153, main_#t~mem152, main_#t~mem154, main_#t~mem155, main_#t~mem157, main_#t~mem156, main_#t~mem158, main_#t~mem159, main_#t~switch160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem172.base, main_#t~mem172.offset, main_#t~mem173, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181, main_#t~mem182, main_#t~mem183, main_#t~short184, main_#t~mem185.base, main_#t~mem185.offset, main_#t~ret186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem191, main_#t~mem192, main_#t~mem146, main_#t~mem147, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 130#L814-4true [2021-11-07 08:43:31,423 INFO L793 eck$LassoCheckResult]: Loop: 130#L814-4true call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 95#L814-1true assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 78#L816true assume main_~user~0.base == 0 && main_~user~0.offset == 0;assume false; 79#L816-2true call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 160#L821-124true assume !true; 56#L814-3true call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 130#L814-4true [2021-11-07 08:43:31,429 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:43:31,430 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2021-11-07 08:43:31,438 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:43:31,439 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [352857566] [2021-11-07 08:43:31,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:43:31,441 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:43:31,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:43:31,575 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:43:31,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:43:31,638 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:43:31,641 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:43:31,642 INFO L85 PathProgramCache]: Analyzing trace with hash 1336134572, now seen corresponding path program 1 times [2021-11-07 08:43:31,642 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:43:31,643 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1055092171] [2021-11-07 08:43:31,643 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:43:31,643 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:43:31,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:43:31,705 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:43:31,706 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:43:31,706 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1055092171] [2021-11-07 08:43:31,707 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1055092171] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 08:43:31,707 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 08:43:31,708 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-07 08:43:31,708 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [781391278] [2021-11-07 08:43:31,714 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:43:31,715 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:43:31,733 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-11-07 08:43:31,734 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-11-07 08:43:31,737 INFO L87 Difference]: Start difference. First operand has 170 states, 165 states have (on average 1.696969696969697) internal successors, (280), 165 states have internal predecessors, (280), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:43:31,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:43:31,759 INFO L93 Difference]: Finished difference Result 170 states and 222 transitions. [2021-11-07 08:43:31,759 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-11-07 08:43:31,761 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 170 states and 222 transitions. [2021-11-07 08:43:31,769 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 159 [2021-11-07 08:43:31,778 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 170 states to 166 states and 218 transitions. [2021-11-07 08:43:31,779 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 166 [2021-11-07 08:43:31,780 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 166 [2021-11-07 08:43:31,803 INFO L73 IsDeterministic]: Start isDeterministic. Operand 166 states and 218 transitions. [2021-11-07 08:43:31,811 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:43:31,811 INFO L681 BuchiCegarLoop]: Abstraction has 166 states and 218 transitions. [2021-11-07 08:43:31,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states and 218 transitions. [2021-11-07 08:43:31,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 166. [2021-11-07 08:43:31,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 166 states, 162 states have (on average 1.308641975308642) internal successors, (212), 161 states have internal predecessors, (212), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:43:31,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 218 transitions. [2021-11-07 08:43:31,876 INFO L704 BuchiCegarLoop]: Abstraction has 166 states and 218 transitions. [2021-11-07 08:43:31,877 INFO L587 BuchiCegarLoop]: Abstraction has 166 states and 218 transitions. [2021-11-07 08:43:31,877 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-11-07 08:43:31,877 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 166 states and 218 transitions. [2021-11-07 08:43:31,884 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 159 [2021-11-07 08:43:31,885 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:43:31,885 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:43:31,888 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:43:31,888 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 08:43:31,888 INFO L791 eck$LassoCheckResult]: Stem: 510#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 426#L-1 havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem149, main_#t~mem148, main_#t~mem150, main_#t~mem151, main_#t~mem153, main_#t~mem152, main_#t~mem154, main_#t~mem155, main_#t~mem157, main_#t~mem156, main_#t~mem158, main_#t~mem159, main_#t~switch160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem172.base, main_#t~mem172.offset, main_#t~mem173, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181, main_#t~mem182, main_#t~mem183, main_#t~short184, main_#t~mem185.base, main_#t~mem185.offset, main_#t~ret186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem191, main_#t~mem192, main_#t~mem146, main_#t~mem147, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 427#L814-4 [2021-11-07 08:43:31,893 INFO L793 eck$LassoCheckResult]: Loop: 427#L814-4 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 482#L814-1 assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 467#L816 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 468#L816-2 call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 471#L821-124 havoc main_~_ha_hashv~0; 432#L821-49 goto; 433#L821-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 398#L821-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 399#L821-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch26 := 11 == main_~_hj_k~0; 390#L821-10 assume main_#t~switch26;call main_#t~mem27 := read~int(main_~_hj_key~0.base, 10 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 16777216 * (main_#t~mem27 % 256);havoc main_#t~mem27; 391#L821-12 main_#t~switch26 := main_#t~switch26 || 10 == main_~_hj_k~0; 424#L821-13 assume main_#t~switch26;call main_#t~mem28 := read~int(main_~_hj_key~0.base, 9 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 65536 * (main_#t~mem28 % 256);havoc main_#t~mem28; 425#L821-15 main_#t~switch26 := main_#t~switch26 || 9 == main_~_hj_k~0; 495#L821-16 assume main_#t~switch26;call main_#t~mem29 := read~int(main_~_hj_key~0.base, 8 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 256 * (main_#t~mem29 % 256);havoc main_#t~mem29; 504#L821-18 main_#t~switch26 := main_#t~switch26 || 8 == main_~_hj_k~0; 350#L821-19 assume main_#t~switch26;call main_#t~mem30 := read~int(main_~_hj_key~0.base, 7 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 16777216 * (main_#t~mem30 % 256);havoc main_#t~mem30; 351#L821-21 main_#t~switch26 := main_#t~switch26 || 7 == main_~_hj_k~0; 438#L821-22 assume !main_#t~switch26; 439#L821-24 main_#t~switch26 := main_#t~switch26 || 6 == main_~_hj_k~0; 480#L821-25 assume main_#t~switch26;call main_#t~mem32 := read~int(main_~_hj_key~0.base, 5 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 256 * (main_#t~mem32 % 256);havoc main_#t~mem32; 481#L821-27 main_#t~switch26 := main_#t~switch26 || 5 == main_~_hj_k~0; 403#L821-28 assume main_#t~switch26;call main_#t~mem33 := read~int(main_~_hj_key~0.base, 4 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + main_#t~mem33 % 256;havoc main_#t~mem33; 404#L821-30 main_#t~switch26 := main_#t~switch26 || 4 == main_~_hj_k~0; 479#L821-31 assume main_#t~switch26;call main_#t~mem34 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem34 % 256);havoc main_#t~mem34; 456#L821-33 main_#t~switch26 := main_#t~switch26 || 3 == main_~_hj_k~0; 429#L821-34 assume main_#t~switch26;call main_#t~mem35 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem35 % 256);havoc main_#t~mem35; 377#L821-36 main_#t~switch26 := main_#t~switch26 || 2 == main_~_hj_k~0; 378#L821-37 assume main_#t~switch26;call main_#t~mem36 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem36 % 256);havoc main_#t~mem36; 463#L821-39 main_#t~switch26 := main_#t~switch26 || 1 == main_~_hj_k~0; 370#L821-40 assume main_#t~switch26;call main_#t~mem37 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem37 % 256;havoc main_#t~mem37; 371#L821-42 havoc main_#t~switch26; 405#L821-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 355#L821-44 goto; 356#L821-46 goto; 436#L821-48 goto; 437#L821-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 352#L821-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset; 353#L821-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_#t~mem56.base, 16 + main_#t~mem56.offset, 4);call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 20 + main_#t~mem58.offset, 4);call write~$Pointer$(main_#t~mem57.base, main_#t~mem57.offset - main_#t~mem59, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57.base, main_#t~mem57.offset;havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem61.base, 8 + main_#t~mem61.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset;havoc main_#t~mem61.base, main_#t~mem61.offset;call main_#t~mem62.base, main_#t~mem62.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem62.base, 16 + main_#t~mem62.offset, 4);havoc main_#t~mem62.base, main_#t~mem62.offset; 365#L821-66 goto; 475#L821-120 havoc main_~_ha_bkt~0;call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64 := read~int(main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);main_#t~post65 := main_#t~mem64;call write~int(1 + main_#t~post65, main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64;havoc main_#t~post65; 363#L821-71 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67 := read~int(main_#t~mem66.base, 4 + main_#t~mem66.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem67 - 1);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67; 364#L821-70 goto; 489#L821-118 call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_#t~mem68.base, main_#t~mem68.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem69.base, main_#t~mem69.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68.base, main_#t~mem68.offset;havoc main_#t~mem69.base, main_#t~mem69.offset;call main_#t~mem70 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post71 := main_#t~mem70;call write~int(1 + main_#t~post71, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem70;havoc main_#t~post71;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem72.base, main_#t~mem72.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem73.base, main_#t~mem73.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 375#L821-73 assume main_#t~mem73.base != 0 || main_#t~mem73.offset != 0;havoc main_#t~mem73.base, main_#t~mem73.offset;call main_#t~mem74.base, main_#t~mem74.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem74.base, 12 + main_#t~mem74.offset, 4);havoc main_#t~mem74.base, main_#t~mem74.offset; 376#L821-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem76 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem75 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short79 := main_#t~mem76 % 4294967296 >= 10 * (1 + main_#t~mem75) % 4294967296; 469#L821-76 assume main_#t~short79;call main_#t~mem77.base, main_#t~mem77.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem78 := read~int(main_#t~mem77.base, 36 + main_#t~mem77.offset, 4);main_#t~short79 := 0 == main_#t~mem78 % 4294967296; 470#L821-78 assume !main_#t~short79;havoc main_#t~mem76;havoc main_#t~mem75;havoc main_#t~mem77.base, main_#t~mem77.offset;havoc main_#t~mem78;havoc main_#t~short79; 366#L821-117 goto; 367#L821-119 goto; 421#L821-121 goto; 483#L821-123 goto; 443#L814-3 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 427#L814-4 [2021-11-07 08:43:31,894 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:43:31,894 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2021-11-07 08:43:31,895 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:43:31,895 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [489807316] [2021-11-07 08:43:31,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:43:31,896 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:43:31,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:43:31,930 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:43:31,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:43:31,977 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:43:31,986 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:43:31,986 INFO L85 PathProgramCache]: Analyzing trace with hash -1570577107, now seen corresponding path program 1 times [2021-11-07 08:43:31,986 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:43:31,987 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2023940882] [2021-11-07 08:43:31,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:43:31,988 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:43:32,028 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 08:43:32,028 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [333189530] [2021-11-07 08:43:32,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:43:32,029 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:43:32,029 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:43:32,031 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:43:32,059 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-11-07 08:43:32,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:43:32,296 INFO L263 TraceCheckSpWp]: Trace formula consists of 308 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-07 08:43:32,302 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 08:43:32,549 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:43:32,549 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:43:32,550 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2023940882] [2021-11-07 08:43:32,550 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-07 08:43:32,550 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [333189530] [2021-11-07 08:43:32,550 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [333189530] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 08:43:32,551 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 08:43:32,551 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-07 08:43:32,551 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [594793720] [2021-11-07 08:43:32,552 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:43:32,552 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:43:32,552 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-07 08:43:32,553 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-07 08:43:32,553 INFO L87 Difference]: Start difference. First operand 166 states and 218 transitions. cyclomatic complexity: 55 Second operand has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:43:32,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:43:32,726 INFO L93 Difference]: Finished difference Result 187 states and 239 transitions. [2021-11-07 08:43:32,726 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-07 08:43:32,727 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 187 states and 239 transitions. [2021-11-07 08:43:32,732 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 180 [2021-11-07 08:43:32,737 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 187 states to 187 states and 239 transitions. [2021-11-07 08:43:32,738 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 187 [2021-11-07 08:43:32,738 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 187 [2021-11-07 08:43:32,739 INFO L73 IsDeterministic]: Start isDeterministic. Operand 187 states and 239 transitions. [2021-11-07 08:43:32,740 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:43:32,740 INFO L681 BuchiCegarLoop]: Abstraction has 187 states and 239 transitions. [2021-11-07 08:43:32,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states and 239 transitions. [2021-11-07 08:43:32,755 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 186. [2021-11-07 08:43:32,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 186 states, 182 states have (on average 1.2747252747252746) internal successors, (232), 181 states have internal predecessors, (232), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:43:32,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 238 transitions. [2021-11-07 08:43:32,763 INFO L704 BuchiCegarLoop]: Abstraction has 186 states and 238 transitions. [2021-11-07 08:43:32,763 INFO L587 BuchiCegarLoop]: Abstraction has 186 states and 238 transitions. [2021-11-07 08:43:32,763 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-11-07 08:43:32,763 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 186 states and 238 transitions. [2021-11-07 08:43:32,765 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 179 [2021-11-07 08:43:32,765 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:43:32,765 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:43:32,766 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:43:32,767 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 08:43:32,767 INFO L791 eck$LassoCheckResult]: Stem: 1025#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 939#L-1 havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem149, main_#t~mem148, main_#t~mem150, main_#t~mem151, main_#t~mem153, main_#t~mem152, main_#t~mem154, main_#t~mem155, main_#t~mem157, main_#t~mem156, main_#t~mem158, main_#t~mem159, main_#t~switch160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem172.base, main_#t~mem172.offset, main_#t~mem173, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181, main_#t~mem182, main_#t~mem183, main_#t~short184, main_#t~mem185.base, main_#t~mem185.offset, main_#t~ret186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem191, main_#t~mem192, main_#t~mem146, main_#t~mem147, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 940#L814-4 [2021-11-07 08:43:32,768 INFO L793 eck$LassoCheckResult]: Loop: 940#L814-4 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 995#L814-1 assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 980#L816 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 981#L816-2 call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 984#L821-124 havoc main_~_ha_hashv~0; 945#L821-49 goto; 946#L821-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 911#L821-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 912#L821-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch26 := 11 == main_~_hj_k~0; 902#L821-10 assume main_#t~switch26;call main_#t~mem27 := read~int(main_~_hj_key~0.base, 10 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 16777216 * (main_#t~mem27 % 256);havoc main_#t~mem27; 903#L821-12 main_#t~switch26 := main_#t~switch26 || 10 == main_~_hj_k~0; 937#L821-13 assume main_#t~switch26;call main_#t~mem28 := read~int(main_~_hj_key~0.base, 9 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 65536 * (main_#t~mem28 % 256);havoc main_#t~mem28; 938#L821-15 main_#t~switch26 := main_#t~switch26 || 9 == main_~_hj_k~0; 1008#L821-16 assume main_#t~switch26;call main_#t~mem29 := read~int(main_~_hj_key~0.base, 8 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 256 * (main_#t~mem29 % 256);havoc main_#t~mem29; 1026#L821-18 main_#t~switch26 := main_#t~switch26 || 8 == main_~_hj_k~0; 862#L821-19 assume main_#t~switch26;call main_#t~mem30 := read~int(main_~_hj_key~0.base, 7 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 16777216 * (main_#t~mem30 % 256);havoc main_#t~mem30; 863#L821-21 main_#t~switch26 := main_#t~switch26 || 7 == main_~_hj_k~0; 951#L821-22 assume main_#t~switch26;call main_#t~mem31 := read~int(main_~_hj_key~0.base, 6 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 65536 * (main_#t~mem31 % 256);havoc main_#t~mem31; 952#L821-24 main_#t~switch26 := main_#t~switch26 || 6 == main_~_hj_k~0; 993#L821-25 assume main_#t~switch26;call main_#t~mem32 := read~int(main_~_hj_key~0.base, 5 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 256 * (main_#t~mem32 % 256);havoc main_#t~mem32; 994#L821-27 main_#t~switch26 := main_#t~switch26 || 5 == main_~_hj_k~0; 916#L821-28 assume main_#t~switch26;call main_#t~mem33 := read~int(main_~_hj_key~0.base, 4 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + main_#t~mem33 % 256;havoc main_#t~mem33; 917#L821-30 main_#t~switch26 := main_#t~switch26 || 4 == main_~_hj_k~0; 992#L821-31 assume main_#t~switch26;call main_#t~mem34 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem34 % 256);havoc main_#t~mem34; 969#L821-33 main_#t~switch26 := main_#t~switch26 || 3 == main_~_hj_k~0; 942#L821-34 assume main_#t~switch26;call main_#t~mem35 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem35 % 256);havoc main_#t~mem35; 889#L821-36 main_#t~switch26 := main_#t~switch26 || 2 == main_~_hj_k~0; 890#L821-37 assume main_#t~switch26;call main_#t~mem36 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem36 % 256);havoc main_#t~mem36; 976#L821-39 main_#t~switch26 := main_#t~switch26 || 1 == main_~_hj_k~0; 882#L821-40 assume main_#t~switch26;call main_#t~mem37 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem37 % 256;havoc main_#t~mem37; 883#L821-42 havoc main_#t~switch26; 918#L821-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 867#L821-44 goto; 868#L821-46 goto; 949#L821-48 goto; 950#L821-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 864#L821-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset; 865#L821-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_#t~mem56.base, 16 + main_#t~mem56.offset, 4);call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 20 + main_#t~mem58.offset, 4);call write~$Pointer$(main_#t~mem57.base, main_#t~mem57.offset - main_#t~mem59, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57.base, main_#t~mem57.offset;havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem61.base, 8 + main_#t~mem61.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset;havoc main_#t~mem61.base, main_#t~mem61.offset;call main_#t~mem62.base, main_#t~mem62.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem62.base, 16 + main_#t~mem62.offset, 4);havoc main_#t~mem62.base, main_#t~mem62.offset; 877#L821-66 goto; 988#L821-120 havoc main_~_ha_bkt~0;call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64 := read~int(main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);main_#t~post65 := main_#t~mem64;call write~int(1 + main_#t~post65, main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64;havoc main_#t~post65; 875#L821-71 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67 := read~int(main_#t~mem66.base, 4 + main_#t~mem66.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem67 - 1);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67; 876#L821-70 goto; 1002#L821-118 call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_#t~mem68.base, main_#t~mem68.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem69.base, main_#t~mem69.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68.base, main_#t~mem68.offset;havoc main_#t~mem69.base, main_#t~mem69.offset;call main_#t~mem70 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post71 := main_#t~mem70;call write~int(1 + main_#t~post71, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem70;havoc main_#t~post71;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem72.base, main_#t~mem72.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem73.base, main_#t~mem73.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 887#L821-73 assume main_#t~mem73.base != 0 || main_#t~mem73.offset != 0;havoc main_#t~mem73.base, main_#t~mem73.offset;call main_#t~mem74.base, main_#t~mem74.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem74.base, 12 + main_#t~mem74.offset, 4);havoc main_#t~mem74.base, main_#t~mem74.offset; 888#L821-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem76 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem75 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short79 := main_#t~mem76 % 4294967296 >= 10 * (1 + main_#t~mem75) % 4294967296; 982#L821-76 assume main_#t~short79;call main_#t~mem77.base, main_#t~mem77.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem78 := read~int(main_#t~mem77.base, 36 + main_#t~mem77.offset, 4);main_#t~short79 := 0 == main_#t~mem78 % 4294967296; 983#L821-78 assume !main_#t~short79;havoc main_#t~mem76;havoc main_#t~mem75;havoc main_#t~mem77.base, main_#t~mem77.offset;havoc main_#t~mem78;havoc main_#t~short79; 878#L821-117 goto; 879#L821-119 goto; 934#L821-121 goto; 996#L821-123 goto; 956#L814-3 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 940#L814-4 [2021-11-07 08:43:32,768 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:43:32,769 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2021-11-07 08:43:32,769 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:43:32,769 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1537954511] [2021-11-07 08:43:32,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:43:32,770 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:43:32,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:43:32,792 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:43:32,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:43:32,819 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:43:32,820 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:43:32,820 INFO L85 PathProgramCache]: Analyzing trace with hash -726571605, now seen corresponding path program 1 times [2021-11-07 08:43:32,820 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:43:32,821 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [962064225] [2021-11-07 08:43:32,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:43:32,821 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:43:32,836 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 08:43:32,837 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [40431902] [2021-11-07 08:43:32,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:43:32,837 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:43:32,838 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:43:32,840 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:43:32,920 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-11-07 08:43:33,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:43:33,153 INFO L263 TraceCheckSpWp]: Trace formula consists of 314 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-07 08:43:33,163 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 08:43:33,351 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:43:33,352 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:43:33,352 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [962064225] [2021-11-07 08:43:33,352 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-07 08:43:33,353 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [40431902] [2021-11-07 08:43:33,354 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [40431902] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 08:43:33,355 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 08:43:33,355 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-07 08:43:33,356 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [135515457] [2021-11-07 08:43:33,356 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:43:33,357 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:43:33,357 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-07 08:43:33,358 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-07 08:43:33,358 INFO L87 Difference]: Start difference. First operand 186 states and 238 transitions. cyclomatic complexity: 55 Second operand has 4 states, 4 states have (on average 13.0) internal successors, (52), 4 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:43:33,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:43:33,492 INFO L93 Difference]: Finished difference Result 251 states and 321 transitions. [2021-11-07 08:43:33,493 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-07 08:43:33,493 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 251 states and 321 transitions. [2021-11-07 08:43:33,497 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 236 [2021-11-07 08:43:33,503 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 251 states to 251 states and 321 transitions. [2021-11-07 08:43:33,503 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 251 [2021-11-07 08:43:33,505 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 251 [2021-11-07 08:43:33,506 INFO L73 IsDeterministic]: Start isDeterministic. Operand 251 states and 321 transitions. [2021-11-07 08:43:33,517 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:43:33,517 INFO L681 BuchiCegarLoop]: Abstraction has 251 states and 321 transitions. [2021-11-07 08:43:33,518 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 251 states and 321 transitions. [2021-11-07 08:43:33,538 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 251 to 172. [2021-11-07 08:43:33,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 172 states, 168 states have (on average 1.255952380952381) internal successors, (211), 167 states have internal predecessors, (211), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:43:33,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 217 transitions. [2021-11-07 08:43:33,541 INFO L704 BuchiCegarLoop]: Abstraction has 172 states and 217 transitions. [2021-11-07 08:43:33,541 INFO L587 BuchiCegarLoop]: Abstraction has 172 states and 217 transitions. [2021-11-07 08:43:33,541 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-11-07 08:43:33,542 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 172 states and 217 transitions. [2021-11-07 08:43:33,543 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 165 [2021-11-07 08:43:33,543 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:43:33,543 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:43:33,548 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:43:33,549 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 08:43:33,549 INFO L791 eck$LassoCheckResult]: Stem: 1623#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 1537#L-1 havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem149, main_#t~mem148, main_#t~mem150, main_#t~mem151, main_#t~mem153, main_#t~mem152, main_#t~mem154, main_#t~mem155, main_#t~mem157, main_#t~mem156, main_#t~mem158, main_#t~mem159, main_#t~switch160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem172.base, main_#t~mem172.offset, main_#t~mem173, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181, main_#t~mem182, main_#t~mem183, main_#t~short184, main_#t~mem185.base, main_#t~mem185.offset, main_#t~ret186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem191, main_#t~mem192, main_#t~mem146, main_#t~mem147, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 1538#L814-4 [2021-11-07 08:43:33,550 INFO L793 eck$LassoCheckResult]: Loop: 1538#L814-4 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 1595#L814-1 assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 1579#L816 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 1580#L816-2 call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 1581#L821-124 havoc main_~_ha_hashv~0; 1543#L821-49 goto; 1544#L821-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 1509#L821-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 1510#L821-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch26 := 11 == main_~_hj_k~0; 1501#L821-10 assume !main_#t~switch26; 1502#L821-12 main_#t~switch26 := main_#t~switch26 || 10 == main_~_hj_k~0; 1535#L821-13 assume !main_#t~switch26; 1536#L821-15 main_#t~switch26 := main_#t~switch26 || 9 == main_~_hj_k~0; 1608#L821-16 assume !main_#t~switch26; 1617#L821-18 main_#t~switch26 := main_#t~switch26 || 8 == main_~_hj_k~0; 1459#L821-19 assume !main_#t~switch26; 1460#L821-21 main_#t~switch26 := main_#t~switch26 || 7 == main_~_hj_k~0; 1549#L821-22 assume !main_#t~switch26; 1550#L821-24 main_#t~switch26 := main_#t~switch26 || 6 == main_~_hj_k~0; 1593#L821-25 assume !main_#t~switch26; 1594#L821-27 main_#t~switch26 := main_#t~switch26 || 5 == main_~_hj_k~0; 1514#L821-28 assume !main_#t~switch26; 1515#L821-30 main_#t~switch26 := main_#t~switch26 || 4 == main_~_hj_k~0; 1590#L821-31 assume main_#t~switch26;call main_#t~mem34 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem34 % 256);havoc main_#t~mem34; 1591#L821-33 main_#t~switch26 := main_#t~switch26 || 3 == main_~_hj_k~0; 1540#L821-34 assume main_#t~switch26;call main_#t~mem35 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem35 % 256);havoc main_#t~mem35; 1486#L821-36 main_#t~switch26 := main_#t~switch26 || 2 == main_~_hj_k~0; 1487#L821-37 assume main_#t~switch26;call main_#t~mem36 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem36 % 256);havoc main_#t~mem36; 1575#L821-39 main_#t~switch26 := main_#t~switch26 || 1 == main_~_hj_k~0; 1481#L821-40 assume main_#t~switch26;call main_#t~mem37 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem37 % 256;havoc main_#t~mem37; 1482#L821-42 havoc main_#t~switch26; 1516#L821-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 1463#L821-44 goto; 1464#L821-46 goto; 1547#L821-48 goto; 1548#L821-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 1465#L821-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset; 1466#L821-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_#t~mem56.base, 16 + main_#t~mem56.offset, 4);call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 20 + main_#t~mem58.offset, 4);call write~$Pointer$(main_#t~mem57.base, main_#t~mem57.offset - main_#t~mem59, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57.base, main_#t~mem57.offset;havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem61.base, 8 + main_#t~mem61.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset;havoc main_#t~mem61.base, main_#t~mem61.offset;call main_#t~mem62.base, main_#t~mem62.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem62.base, 16 + main_#t~mem62.offset, 4);havoc main_#t~mem62.base, main_#t~mem62.offset; 1476#L821-66 goto; 1589#L821-120 havoc main_~_ha_bkt~0;call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64 := read~int(main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);main_#t~post65 := main_#t~mem64;call write~int(1 + main_#t~post65, main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64;havoc main_#t~post65; 1474#L821-71 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67 := read~int(main_#t~mem66.base, 4 + main_#t~mem66.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem67 - 1);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67; 1475#L821-70 goto; 1602#L821-118 call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_#t~mem68.base, main_#t~mem68.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem69.base, main_#t~mem69.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68.base, main_#t~mem68.offset;havoc main_#t~mem69.base, main_#t~mem69.offset;call main_#t~mem70 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post71 := main_#t~mem70;call write~int(1 + main_#t~post71, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem70;havoc main_#t~post71;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem72.base, main_#t~mem72.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem73.base, main_#t~mem73.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 1488#L821-73 assume main_#t~mem73.base != 0 || main_#t~mem73.offset != 0;havoc main_#t~mem73.base, main_#t~mem73.offset;call main_#t~mem74.base, main_#t~mem74.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem74.base, 12 + main_#t~mem74.offset, 4);havoc main_#t~mem74.base, main_#t~mem74.offset; 1489#L821-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem76 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem75 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short79 := main_#t~mem76 % 4294967296 >= 10 * (1 + main_#t~mem75) % 4294967296; 1582#L821-76 assume main_#t~short79;call main_#t~mem77.base, main_#t~mem77.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem78 := read~int(main_#t~mem77.base, 36 + main_#t~mem77.offset, 4);main_#t~short79 := 0 == main_#t~mem78 % 4294967296; 1583#L821-78 assume !main_#t~short79;havoc main_#t~mem76;havoc main_#t~mem75;havoc main_#t~mem77.base, main_#t~mem77.offset;havoc main_#t~mem78;havoc main_#t~short79; 1479#L821-117 goto; 1480#L821-119 goto; 1534#L821-121 goto; 1598#L821-123 goto; 1555#L814-3 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 1538#L814-4 [2021-11-07 08:43:33,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:43:33,551 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2021-11-07 08:43:33,552 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:43:33,553 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [530588871] [2021-11-07 08:43:33,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:43:33,558 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:43:33,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:43:33,607 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:43:33,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:43:33,643 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:43:33,645 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:43:33,645 INFO L85 PathProgramCache]: Analyzing trace with hash 1694021305, now seen corresponding path program 1 times [2021-11-07 08:43:33,645 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:43:33,656 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1752306719] [2021-11-07 08:43:33,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:43:33,657 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:43:33,677 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 08:43:33,683 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [442456338] [2021-11-07 08:43:33,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:43:33,684 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:43:33,684 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:43:33,692 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:43:33,710 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cb4687f5-a013-482e-ba6d-6466b2b0f7fa/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process