./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test7-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 47ea0209 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test7-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 67499ec0709cfdcc368630c5b1d94f26157589b8bf16f22cf5d62554760c6dd7 --- Real Ultimate output --- This is Ultimate 0.2.1-dev-47ea020 [2021-11-07 08:04:49,386 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-07 08:04:49,388 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-07 08:04:49,435 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-07 08:04:49,436 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-07 08:04:49,437 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-07 08:04:49,439 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-07 08:04:49,442 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-07 08:04:49,445 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-07 08:04:49,447 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-07 08:04:49,448 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-07 08:04:49,450 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-07 08:04:49,451 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-07 08:04:49,452 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-07 08:04:49,454 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-07 08:04:49,456 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-07 08:04:49,457 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-07 08:04:49,459 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-07 08:04:49,461 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-07 08:04:49,464 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-07 08:04:49,466 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-07 08:04:49,468 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-07 08:04:49,470 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-07 08:04:49,472 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-07 08:04:49,476 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-07 08:04:49,477 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-07 08:04:49,477 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-07 08:04:49,478 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-07 08:04:49,479 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-07 08:04:49,481 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-07 08:04:49,481 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-07 08:04:49,482 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-07 08:04:49,483 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-07 08:04:49,485 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-07 08:04:49,486 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-07 08:04:49,487 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-07 08:04:49,488 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-07 08:04:49,488 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-07 08:04:49,489 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-07 08:04:49,490 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-07 08:04:49,491 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-07 08:04:49,494 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-11-07 08:04:49,545 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-07 08:04:49,546 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-07 08:04:49,546 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-07 08:04:49,547 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-07 08:04:49,549 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-07 08:04:49,549 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-07 08:04:49,549 INFO L138 SettingsManager]: * Use SBE=true [2021-11-07 08:04:49,550 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-11-07 08:04:49,550 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-11-07 08:04:49,550 INFO L138 SettingsManager]: * Use old map elimination=false [2021-11-07 08:04:49,551 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-11-07 08:04:49,552 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-11-07 08:04:49,552 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-11-07 08:04:49,552 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-07 08:04:49,552 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-07 08:04:49,553 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-11-07 08:04:49,553 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-07 08:04:49,553 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-07 08:04:49,554 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-07 08:04:49,554 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-11-07 08:04:49,554 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-11-07 08:04:49,554 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-11-07 08:04:49,555 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-07 08:04:49,555 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-07 08:04:49,555 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-11-07 08:04:49,556 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-07 08:04:49,558 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-11-07 08:04:49,558 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-07 08:04:49,558 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-07 08:04:49,559 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-07 08:04:49,559 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-07 08:04:49,560 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-07 08:04:49,561 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-11-07 08:04:49,561 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 67499ec0709cfdcc368630c5b1d94f26157589b8bf16f22cf5d62554760c6dd7 [2021-11-07 08:04:49,908 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-07 08:04:49,960 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-07 08:04:49,963 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-07 08:04:49,965 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-07 08:04:49,966 INFO L275 PluginConnector]: CDTParser initialized [2021-11-07 08:04:49,968 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test7-1.i [2021-11-07 08:04:50,066 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/data/44915c8e7/9c9e209c5c7e4df2ae3e5cf727d2adee/FLAG6839a0798 [2021-11-07 08:04:50,865 INFO L306 CDTParser]: Found 1 translation units. [2021-11-07 08:04:50,866 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test7-1.i [2021-11-07 08:04:50,889 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/data/44915c8e7/9c9e209c5c7e4df2ae3e5cf727d2adee/FLAG6839a0798 [2021-11-07 08:04:51,067 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/data/44915c8e7/9c9e209c5c7e4df2ae3e5cf727d2adee [2021-11-07 08:04:51,070 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-07 08:04:51,072 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-07 08:04:51,074 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-07 08:04:51,074 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-07 08:04:51,081 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-07 08:04:51,082 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.11 08:04:51" (1/1) ... [2021-11-07 08:04:51,084 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@378a6cc6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:04:51, skipping insertion in model container [2021-11-07 08:04:51,085 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.11 08:04:51" (1/1) ... [2021-11-07 08:04:51,094 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-07 08:04:51,175 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-07 08:04:51,744 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test7-1.i[33021,33034] [2021-11-07 08:04:51,878 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test7-1.i[44124,44137] [2021-11-07 08:04:51,889 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test7-1.i[44245,44258] [2021-11-07 08:04:51,898 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-07 08:04:51,918 INFO L203 MainTranslator]: Completed pre-run [2021-11-07 08:04:51,953 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test7-1.i[33021,33034] [2021-11-07 08:04:52,017 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test7-1.i[44124,44137] [2021-11-07 08:04:52,018 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test7-1.i[44245,44258] [2021-11-07 08:04:52,023 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-07 08:04:52,082 INFO L208 MainTranslator]: Completed translation [2021-11-07 08:04:52,083 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:04:52 WrapperNode [2021-11-07 08:04:52,083 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-07 08:04:52,085 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-07 08:04:52,085 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-07 08:04:52,086 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-07 08:04:52,095 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:04:52" (1/1) ... [2021-11-07 08:04:52,162 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:04:52" (1/1) ... [2021-11-07 08:04:52,264 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-07 08:04:52,265 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-07 08:04:52,265 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-07 08:04:52,265 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-07 08:04:52,277 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:04:52" (1/1) ... [2021-11-07 08:04:52,278 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:04:52" (1/1) ... [2021-11-07 08:04:52,299 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:04:52" (1/1) ... [2021-11-07 08:04:52,300 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:04:52" (1/1) ... [2021-11-07 08:04:52,356 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:04:52" (1/1) ... [2021-11-07 08:04:52,371 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:04:52" (1/1) ... [2021-11-07 08:04:52,377 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:04:52" (1/1) ... [2021-11-07 08:04:52,388 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-07 08:04:52,389 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-07 08:04:52,389 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-07 08:04:52,389 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-07 08:04:52,390 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:04:52" (1/1) ... [2021-11-07 08:04:52,417 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-07 08:04:52,435 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:04:52,458 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-07 08:04:52,484 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-11-07 08:04:52,518 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-11-07 08:04:52,518 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-07 08:04:52,520 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2021-11-07 08:04:52,520 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2021-11-07 08:04:52,521 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-11-07 08:04:52,521 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-11-07 08:04:52,521 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-07 08:04:52,522 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2021-11-07 08:04:52,522 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-11-07 08:04:52,522 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-07 08:04:52,522 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-07 08:04:52,522 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-07 08:04:52,523 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-07 08:04:52,875 WARN L805 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-11-07 08:04:54,381 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-07 08:04:54,382 INFO L299 CfgBuilder]: Removed 67 assume(true) statements. [2021-11-07 08:04:54,385 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.11 08:04:54 BoogieIcfgContainer [2021-11-07 08:04:54,385 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-07 08:04:54,386 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-11-07 08:04:54,386 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-11-07 08:04:54,390 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-11-07 08:04:54,391 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 08:04:54,392 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 07.11 08:04:51" (1/3) ... [2021-11-07 08:04:54,393 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@64654731 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 07.11 08:04:54, skipping insertion in model container [2021-11-07 08:04:54,393 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 08:04:54,393 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:04:52" (2/3) ... [2021-11-07 08:04:54,394 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@64654731 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 07.11 08:04:54, skipping insertion in model container [2021-11-07 08:04:54,394 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 08:04:54,394 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.11 08:04:54" (3/3) ... [2021-11-07 08:04:54,396 INFO L389 chiAutomizerObserver]: Analyzing ICFG uthash_SAX_test7-1.i [2021-11-07 08:04:54,451 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-11-07 08:04:54,451 INFO L360 BuchiCegarLoop]: Hoare is false [2021-11-07 08:04:54,451 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-11-07 08:04:54,451 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-11-07 08:04:54,452 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-11-07 08:04:54,452 INFO L364 BuchiCegarLoop]: Difference is false [2021-11-07 08:04:54,452 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-11-07 08:04:54,452 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-11-07 08:04:54,478 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 183 states, 178 states have (on average 1.6910112359550562) internal successors, (301), 178 states have internal predecessors, (301), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:04:54,521 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 171 [2021-11-07 08:04:54,521 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:04:54,521 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:04:54,530 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:04:54,531 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2021-11-07 08:04:54,531 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-11-07 08:04:54,532 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 183 states, 178 states have (on average 1.6910112359550562) internal successors, (301), 178 states have internal predecessors, (301), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:04:54,545 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 171 [2021-11-07 08:04:54,545 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:04:54,545 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:04:54,546 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:04:54,546 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2021-11-07 08:04:54,554 INFO L791 eck$LassoCheckResult]: Stem: 167#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21); 65#L-1true havoc main_#res;havoc main_#t~malloc8.base, main_#t~malloc8.offset, main_#t~mem9, main_#t~mem10, main_#t~mem11, main_#t~mem13, main_#t~mem12, main_#t~mem14, main_#t~mem15, main_#t~mem17, main_#t~mem16, main_#t~mem18, main_#t~mem19, main_#t~mem21, main_#t~mem20, main_#t~mem22, main_#t~mem23, main_#t~switch24, main_#t~mem25, main_#t~mem26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc36.base, main_#t~malloc36.offset, main_#t~mem37.base, main_#t~mem37.offset, main_#t~mem38.base, main_#t~mem38.offset, main_#t~memset~res39.base, main_#t~memset~res39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~mem41.base, main_#t~mem41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~malloc45.base, main_#t~malloc45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~mem47.base, main_#t~mem47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~memset~res52.base, main_#t~memset~res52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~mem54.base, main_#t~mem54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59.base, main_#t~mem59.offset, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62, main_#t~post63, main_#t~mem64.base, main_#t~mem64.offset, main_#t~mem65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67.base, main_#t~mem67.offset, main_#t~mem68, main_#t~post69, main_#t~mem70.base, main_#t~mem70.offset, main_#t~mem71.base, main_#t~mem71.offset, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem74, main_#t~mem73, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76, main_#t~short77, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79, main_#t~malloc80.base, main_#t~malloc80.offset, main_#t~mem81.base, main_#t~mem81.offset, main_#t~mem82.base, main_#t~mem82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84, main_#t~memset~res85.base, main_#t~memset~res85.offset, main_#t~mem86.base, main_#t~mem86.offset, main_#t~mem87.base, main_#t~mem87.offset, main_#t~mem90, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89, main_#t~mem91.base, main_#t~mem91.offset, main_#t~mem94, main_#t~mem92.base, main_#t~mem92.offset, main_#t~mem93, main_#t~ite95, main_#t~mem96.base, main_#t~mem96.offset, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem106, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem108, main_#t~pre109, main_#t~mem110.base, main_#t~mem110.offset, main_#t~mem111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~post114, main_#t~mem118, main_#t~mem116, main_#t~mem115.base, main_#t~mem115.offset, main_#t~mem117, main_#t~mem119, main_#t~post120, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123.base, main_#t~mem123.offset, main_#t~post97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem99, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~post130, main_#t~mem131.base, main_#t~mem131.offset, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem137, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136, main_#t~ite140, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem141.base, main_#t~mem141.offset, main_#t~mem142, main_#t~mem143.base, main_#t~mem143.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem148, main_#t~mem147, main_#t~mem149, main_#t~mem150, main_#t~mem152, main_#t~mem151, main_#t~mem153, main_#t~mem154, main_#t~mem156, main_#t~mem155, main_#t~mem157, main_#t~mem158, main_#t~switch159, main_#t~mem160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem171.base, main_#t~mem171.offset, main_#t~mem172, main_#t~mem173.base, main_#t~mem173.offset, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180, main_#t~mem181, main_#t~mem182, main_#t~short183, main_#t~mem184.base, main_#t~mem184.offset, main_#t~ret185, main_#t~mem186.base, main_#t~mem186.offset, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem190.base, main_#t~mem190.offset, main_#t~mem191.base, main_#t~mem191.offset, main_#t~short192, main_#t~mem193.base, main_#t~mem193.offset, main_#t~mem194.base, main_#t~mem194.offset, main_#t~mem195.base, main_#t~mem195.offset, main_#t~mem196.base, main_#t~mem196.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~mem199.base, main_#t~mem199.offset, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201, main_#t~mem202.base, main_#t~mem202.offset, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204.base, main_#t~mem204.offset, main_#t~mem205, main_#t~mem206.base, main_#t~mem206.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208.base, main_#t~mem208.offset, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem215, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214, main_#t~mem216.base, main_#t~mem216.offset, main_#t~mem217.base, main_#t~mem217.offset, main_#t~mem218, main_#t~post219, main_#t~mem220.base, main_#t~mem220.offset, main_#t~mem221.base, main_#t~mem221.offset, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225.base, main_#t~mem225.offset, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem228.base, main_#t~mem228.offset, main_#t~mem229, main_#t~post230, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem144, main_#t~post145, main_#t~mem146, main_#t~mem231.base, main_#t~mem231.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 140#L715-4true [2021-11-07 08:04:54,555 INFO L793 eck$LassoCheckResult]: Loop: 140#L715-4true call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 117#L715-1true assume !!(main_#t~mem7 < 1000);havoc main_#t~mem7;call main_#t~malloc8.base, main_#t~malloc8.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc8.base, main_#t~malloc8.offset;havoc main_#t~malloc8.base, main_#t~malloc8.offset; 38#L717true assume main_~user~0.base == 0 && main_~user~0.offset == 0;assume false; 143#L717-2true call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem9, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem10 * main_#t~mem11, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem10;havoc main_#t~mem11; 128#L722-124true assume !true; 80#L715-3true call main_#t~mem5 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 140#L715-4true [2021-11-07 08:04:54,562 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:04:54,562 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2021-11-07 08:04:54,574 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:04:54,575 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [728571567] [2021-11-07 08:04:54,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:04:54,576 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:04:54,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:04:54,714 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:04:54,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:04:54,785 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:04:54,789 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:04:54,789 INFO L85 PathProgramCache]: Analyzing trace with hash 1336134572, now seen corresponding path program 1 times [2021-11-07 08:04:54,790 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:04:54,790 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1217526444] [2021-11-07 08:04:54,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:04:54,791 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:04:54,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:04:54,855 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:04:54,856 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:04:54,856 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1217526444] [2021-11-07 08:04:54,857 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1217526444] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 08:04:54,857 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 08:04:54,858 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-07 08:04:54,858 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2120013677] [2021-11-07 08:04:54,864 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:04:54,865 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:04:54,882 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-11-07 08:04:54,883 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-11-07 08:04:54,886 INFO L87 Difference]: Start difference. First operand has 183 states, 178 states have (on average 1.6910112359550562) internal successors, (301), 178 states have internal predecessors, (301), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:04:54,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:04:54,909 INFO L93 Difference]: Finished difference Result 182 states and 237 transitions. [2021-11-07 08:04:54,909 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-11-07 08:04:54,911 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 182 states and 237 transitions. [2021-11-07 08:04:54,924 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 169 [2021-11-07 08:04:54,934 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 182 states to 176 states and 231 transitions. [2021-11-07 08:04:54,935 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 176 [2021-11-07 08:04:54,936 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 176 [2021-11-07 08:04:54,943 INFO L73 IsDeterministic]: Start isDeterministic. Operand 176 states and 231 transitions. [2021-11-07 08:04:54,947 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:04:54,947 INFO L681 BuchiCegarLoop]: Abstraction has 176 states and 231 transitions. [2021-11-07 08:04:54,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states and 231 transitions. [2021-11-07 08:04:55,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 176. [2021-11-07 08:04:55,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 176 states, 172 states have (on average 1.308139534883721) internal successors, (225), 171 states have internal predecessors, (225), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:04:55,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 231 transitions. [2021-11-07 08:04:55,008 INFO L704 BuchiCegarLoop]: Abstraction has 176 states and 231 transitions. [2021-11-07 08:04:55,008 INFO L587 BuchiCegarLoop]: Abstraction has 176 states and 231 transitions. [2021-11-07 08:04:55,008 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-11-07 08:04:55,008 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 176 states and 231 transitions. [2021-11-07 08:04:55,017 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 169 [2021-11-07 08:04:55,017 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:04:55,017 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:04:55,021 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:04:55,021 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 08:04:55,021 INFO L791 eck$LassoCheckResult]: Stem: 548#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21); 480#L-1 havoc main_#res;havoc main_#t~malloc8.base, main_#t~malloc8.offset, main_#t~mem9, main_#t~mem10, main_#t~mem11, main_#t~mem13, main_#t~mem12, main_#t~mem14, main_#t~mem15, main_#t~mem17, main_#t~mem16, main_#t~mem18, main_#t~mem19, main_#t~mem21, main_#t~mem20, main_#t~mem22, main_#t~mem23, main_#t~switch24, main_#t~mem25, main_#t~mem26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc36.base, main_#t~malloc36.offset, main_#t~mem37.base, main_#t~mem37.offset, main_#t~mem38.base, main_#t~mem38.offset, main_#t~memset~res39.base, main_#t~memset~res39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~mem41.base, main_#t~mem41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~malloc45.base, main_#t~malloc45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~mem47.base, main_#t~mem47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~memset~res52.base, main_#t~memset~res52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~mem54.base, main_#t~mem54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59.base, main_#t~mem59.offset, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62, main_#t~post63, main_#t~mem64.base, main_#t~mem64.offset, main_#t~mem65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67.base, main_#t~mem67.offset, main_#t~mem68, main_#t~post69, main_#t~mem70.base, main_#t~mem70.offset, main_#t~mem71.base, main_#t~mem71.offset, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem74, main_#t~mem73, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76, main_#t~short77, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79, main_#t~malloc80.base, main_#t~malloc80.offset, main_#t~mem81.base, main_#t~mem81.offset, main_#t~mem82.base, main_#t~mem82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84, main_#t~memset~res85.base, main_#t~memset~res85.offset, main_#t~mem86.base, main_#t~mem86.offset, main_#t~mem87.base, main_#t~mem87.offset, main_#t~mem90, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89, main_#t~mem91.base, main_#t~mem91.offset, main_#t~mem94, main_#t~mem92.base, main_#t~mem92.offset, main_#t~mem93, main_#t~ite95, main_#t~mem96.base, main_#t~mem96.offset, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem106, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem108, main_#t~pre109, main_#t~mem110.base, main_#t~mem110.offset, main_#t~mem111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~post114, main_#t~mem118, main_#t~mem116, main_#t~mem115.base, main_#t~mem115.offset, main_#t~mem117, main_#t~mem119, main_#t~post120, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123.base, main_#t~mem123.offset, main_#t~post97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem99, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~post130, main_#t~mem131.base, main_#t~mem131.offset, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem137, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136, main_#t~ite140, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem141.base, main_#t~mem141.offset, main_#t~mem142, main_#t~mem143.base, main_#t~mem143.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem148, main_#t~mem147, main_#t~mem149, main_#t~mem150, main_#t~mem152, main_#t~mem151, main_#t~mem153, main_#t~mem154, main_#t~mem156, main_#t~mem155, main_#t~mem157, main_#t~mem158, main_#t~switch159, main_#t~mem160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem171.base, main_#t~mem171.offset, main_#t~mem172, main_#t~mem173.base, main_#t~mem173.offset, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180, main_#t~mem181, main_#t~mem182, main_#t~short183, main_#t~mem184.base, main_#t~mem184.offset, main_#t~ret185, main_#t~mem186.base, main_#t~mem186.offset, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem190.base, main_#t~mem190.offset, main_#t~mem191.base, main_#t~mem191.offset, main_#t~short192, main_#t~mem193.base, main_#t~mem193.offset, main_#t~mem194.base, main_#t~mem194.offset, main_#t~mem195.base, main_#t~mem195.offset, main_#t~mem196.base, main_#t~mem196.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~mem199.base, main_#t~mem199.offset, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201, main_#t~mem202.base, main_#t~mem202.offset, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204.base, main_#t~mem204.offset, main_#t~mem205, main_#t~mem206.base, main_#t~mem206.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208.base, main_#t~mem208.offset, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem215, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214, main_#t~mem216.base, main_#t~mem216.offset, main_#t~mem217.base, main_#t~mem217.offset, main_#t~mem218, main_#t~post219, main_#t~mem220.base, main_#t~mem220.offset, main_#t~mem221.base, main_#t~mem221.offset, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225.base, main_#t~mem225.offset, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem228.base, main_#t~mem228.offset, main_#t~mem229, main_#t~post230, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem144, main_#t~post145, main_#t~mem146, main_#t~mem231.base, main_#t~mem231.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 481#L715-4 [2021-11-07 08:04:55,031 INFO L793 eck$LassoCheckResult]: Loop: 481#L715-4 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 528#L715-1 assume !!(main_#t~mem7 < 1000);havoc main_#t~mem7;call main_#t~malloc8.base, main_#t~malloc8.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc8.base, main_#t~malloc8.offset;havoc main_#t~malloc8.base, main_#t~malloc8.offset; 443#L717 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 444#L717-2 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem9, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem10 * main_#t~mem11, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem10;havoc main_#t~mem11; 536#L722-124 havoc main_~_ha_hashv~0; 537#L722-49 goto; 476#L722-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 424#L722-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 425#L722-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch24 := 11 == main_~_hj_k~0; 486#L722-10 assume main_#t~switch24;call main_#t~mem25 := read~int(main_~_hj_key~0.base, 10 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 16777216 * (main_#t~mem25 % 256);havoc main_#t~mem25; 501#L722-12 main_#t~switch24 := main_#t~switch24 || 10 == main_~_hj_k~0; 458#L722-13 assume main_#t~switch24;call main_#t~mem26 := read~int(main_~_hj_key~0.base, 9 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 65536 * (main_#t~mem26 % 256);havoc main_#t~mem26; 459#L722-15 main_#t~switch24 := main_#t~switch24 || 9 == main_~_hj_k~0; 494#L722-16 assume main_#t~switch24;call main_#t~mem27 := read~int(main_~_hj_key~0.base, 8 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 256 * (main_#t~mem27 % 256);havoc main_#t~mem27; 521#L722-18 main_#t~switch24 := main_#t~switch24 || 8 == main_~_hj_k~0; 418#L722-19 assume main_#t~switch24;call main_#t~mem28 := read~int(main_~_hj_key~0.base, 7 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 16777216 * (main_#t~mem28 % 256);havoc main_#t~mem28; 419#L722-21 main_#t~switch24 := main_#t~switch24 || 7 == main_~_hj_k~0; 527#L722-22 assume !main_#t~switch24; 522#L722-24 main_#t~switch24 := main_#t~switch24 || 6 == main_~_hj_k~0; 523#L722-25 assume main_#t~switch24;call main_#t~mem30 := read~int(main_~_hj_key~0.base, 5 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 256 * (main_#t~mem30 % 256);havoc main_#t~mem30; 460#L722-27 main_#t~switch24 := main_#t~switch24 || 5 == main_~_hj_k~0; 461#L722-28 assume main_#t~switch24;call main_#t~mem31 := read~int(main_~_hj_key~0.base, 4 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + main_#t~mem31 % 256;havoc main_#t~mem31; 534#L722-30 main_#t~switch24 := main_#t~switch24 || 4 == main_~_hj_k~0; 535#L722-31 assume main_#t~switch24;call main_#t~mem32 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem32 % 256);havoc main_#t~mem32; 484#L722-33 main_#t~switch24 := main_#t~switch24 || 3 == main_~_hj_k~0; 427#L722-34 assume main_#t~switch24;call main_#t~mem33 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem33 % 256);havoc main_#t~mem33; 428#L722-36 main_#t~switch24 := main_#t~switch24 || 2 == main_~_hj_k~0; 515#L722-37 assume main_#t~switch24;call main_#t~mem34 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem34 % 256);havoc main_#t~mem34; 376#L722-39 main_#t~switch24 := main_#t~switch24 || 1 == main_~_hj_k~0; 377#L722-40 assume main_#t~switch24;call main_#t~mem35 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem35 % 256;havoc main_#t~mem35; 505#L722-42 havoc main_#t~switch24; 506#L722-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 530#L722-44 goto; 403#L722-46 goto; 404#L722-48 goto; 546#L722-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 545#L722-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem53.base, main_#t~mem53.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem53.base, main_#t~mem53.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem53.base, main_#t~mem53.offset; 519#L722-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem54.base, main_#t~mem54.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_#t~mem54.base, 16 + main_#t~mem54.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57 := read~int(main_#t~mem56.base, 20 + main_#t~mem56.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset - main_#t~mem57, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem54.base, main_#t~mem54.offset;havoc main_#t~mem55.base, main_#t~mem55.offset;havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57;call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59.base, main_#t~mem59.offset := read~$Pointer$(main_#t~mem58.base, 16 + main_#t~mem58.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem59.base, 8 + main_#t~mem59.offset, 4);havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59.base, main_#t~mem59.offset;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset; 520#L722-66 goto; 488#L722-120 havoc main_~_ha_bkt~0;call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem62 := read~int(main_#t~mem61.base, 12 + main_#t~mem61.offset, 4);main_#t~post63 := main_#t~mem62;call write~int(1 + main_#t~post63, main_#t~mem61.base, 12 + main_#t~mem61.offset, 4);havoc main_#t~mem61.base, main_#t~mem61.offset;havoc main_#t~mem62;havoc main_#t~post63; 477#L722-71 call main_#t~mem64.base, main_#t~mem64.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem65 := read~int(main_#t~mem64.base, 4 + main_#t~mem64.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem65 - 1);havoc main_#t~mem64.base, main_#t~mem64.offset;havoc main_#t~mem65; 478#L722-70 goto; 541#L722-118 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67.base, main_#t~mem67.offset := read~$Pointer$(main_#t~mem66.base, main_#t~mem66.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem67.base, main_#t~mem67.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67.base, main_#t~mem67.offset;call main_#t~mem68 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post69 := main_#t~mem68;call write~int(1 + main_#t~post69, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem68;havoc main_#t~post69;call main_#t~mem70.base, main_#t~mem70.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem70.base, main_#t~mem70.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem70.base, main_#t~mem70.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem71.base, main_#t~mem71.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 407#L722-73 assume main_#t~mem71.base != 0 || main_#t~mem71.offset != 0;havoc main_#t~mem71.base, main_#t~mem71.offset;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem72.base, 12 + main_#t~mem72.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset; 408#L722-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem74 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem73 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short77 := main_#t~mem74 % 4294967296 >= 10 * (1 + main_#t~mem73) % 4294967296; 497#L722-76 assume main_#t~short77;call main_#t~mem75.base, main_#t~mem75.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem76 := read~int(main_#t~mem75.base, 36 + main_#t~mem75.offset, 4);main_#t~short77 := 0 == main_#t~mem76 % 4294967296; 373#L722-78 assume !main_#t~short77;havoc main_#t~mem74;havoc main_#t~mem73;havoc main_#t~mem75.base, main_#t~mem75.offset;havoc main_#t~mem76;havoc main_#t~short77; 375#L722-117 goto; 469#L722-119 goto; 491#L722-121 goto; 388#L722-123 goto; 389#L715-3 call main_#t~mem5 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 481#L715-4 [2021-11-07 08:04:55,033 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:04:55,034 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2021-11-07 08:04:55,035 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:04:55,035 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1767480549] [2021-11-07 08:04:55,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:04:55,036 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:04:55,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:04:55,085 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:04:55,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:04:55,119 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:04:55,119 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:04:55,120 INFO L85 PathProgramCache]: Analyzing trace with hash -1570577107, now seen corresponding path program 1 times [2021-11-07 08:04:55,120 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:04:55,120 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [185450845] [2021-11-07 08:04:55,121 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:04:55,121 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:04:55,141 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 08:04:55,141 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [264215516] [2021-11-07 08:04:55,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:04:55,142 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:04:55,142 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:04:55,144 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:04:55,175 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-11-07 08:04:55,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:04:55,374 INFO L263 TraceCheckSpWp]: Trace formula consists of 308 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-07 08:04:55,379 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 08:04:55,624 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:04:55,624 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:04:55,626 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [185450845] [2021-11-07 08:04:55,627 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-07 08:04:55,628 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [264215516] [2021-11-07 08:04:55,629 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [264215516] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 08:04:55,629 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 08:04:55,629 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-07 08:04:55,630 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [13876665] [2021-11-07 08:04:55,631 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:04:55,632 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:04:55,636 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-07 08:04:55,636 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-07 08:04:55,637 INFO L87 Difference]: Start difference. First operand 176 states and 231 transitions. cyclomatic complexity: 58 Second operand has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:04:55,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:04:55,783 INFO L93 Difference]: Finished difference Result 197 states and 252 transitions. [2021-11-07 08:04:55,783 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-07 08:04:55,784 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 197 states and 252 transitions. [2021-11-07 08:04:55,789 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 190 [2021-11-07 08:04:55,798 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 197 states to 197 states and 252 transitions. [2021-11-07 08:04:55,799 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 197 [2021-11-07 08:04:55,801 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 197 [2021-11-07 08:04:55,801 INFO L73 IsDeterministic]: Start isDeterministic. Operand 197 states and 252 transitions. [2021-11-07 08:04:55,810 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:04:55,810 INFO L681 BuchiCegarLoop]: Abstraction has 197 states and 252 transitions. [2021-11-07 08:04:55,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states and 252 transitions. [2021-11-07 08:04:55,829 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 196. [2021-11-07 08:04:55,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 196 states, 192 states have (on average 1.2760416666666667) internal successors, (245), 191 states have internal predecessors, (245), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:04:55,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 251 transitions. [2021-11-07 08:04:55,836 INFO L704 BuchiCegarLoop]: Abstraction has 196 states and 251 transitions. [2021-11-07 08:04:55,836 INFO L587 BuchiCegarLoop]: Abstraction has 196 states and 251 transitions. [2021-11-07 08:04:55,836 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-11-07 08:04:55,837 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 196 states and 251 transitions. [2021-11-07 08:04:55,838 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 189 [2021-11-07 08:04:55,838 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:04:55,839 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:04:55,842 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:04:55,843 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 08:04:55,843 INFO L791 eck$LassoCheckResult]: Stem: 1084#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21); 1012#L-1 havoc main_#res;havoc main_#t~malloc8.base, main_#t~malloc8.offset, main_#t~mem9, main_#t~mem10, main_#t~mem11, main_#t~mem13, main_#t~mem12, main_#t~mem14, main_#t~mem15, main_#t~mem17, main_#t~mem16, main_#t~mem18, main_#t~mem19, main_#t~mem21, main_#t~mem20, main_#t~mem22, main_#t~mem23, main_#t~switch24, main_#t~mem25, main_#t~mem26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc36.base, main_#t~malloc36.offset, main_#t~mem37.base, main_#t~mem37.offset, main_#t~mem38.base, main_#t~mem38.offset, main_#t~memset~res39.base, main_#t~memset~res39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~mem41.base, main_#t~mem41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~malloc45.base, main_#t~malloc45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~mem47.base, main_#t~mem47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~memset~res52.base, main_#t~memset~res52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~mem54.base, main_#t~mem54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59.base, main_#t~mem59.offset, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62, main_#t~post63, main_#t~mem64.base, main_#t~mem64.offset, main_#t~mem65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67.base, main_#t~mem67.offset, main_#t~mem68, main_#t~post69, main_#t~mem70.base, main_#t~mem70.offset, main_#t~mem71.base, main_#t~mem71.offset, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem74, main_#t~mem73, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76, main_#t~short77, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79, main_#t~malloc80.base, main_#t~malloc80.offset, main_#t~mem81.base, main_#t~mem81.offset, main_#t~mem82.base, main_#t~mem82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84, main_#t~memset~res85.base, main_#t~memset~res85.offset, main_#t~mem86.base, main_#t~mem86.offset, main_#t~mem87.base, main_#t~mem87.offset, main_#t~mem90, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89, main_#t~mem91.base, main_#t~mem91.offset, main_#t~mem94, main_#t~mem92.base, main_#t~mem92.offset, main_#t~mem93, main_#t~ite95, main_#t~mem96.base, main_#t~mem96.offset, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem106, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem108, main_#t~pre109, main_#t~mem110.base, main_#t~mem110.offset, main_#t~mem111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~post114, main_#t~mem118, main_#t~mem116, main_#t~mem115.base, main_#t~mem115.offset, main_#t~mem117, main_#t~mem119, main_#t~post120, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123.base, main_#t~mem123.offset, main_#t~post97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem99, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~post130, main_#t~mem131.base, main_#t~mem131.offset, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem137, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136, main_#t~ite140, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem141.base, main_#t~mem141.offset, main_#t~mem142, main_#t~mem143.base, main_#t~mem143.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem148, main_#t~mem147, main_#t~mem149, main_#t~mem150, main_#t~mem152, main_#t~mem151, main_#t~mem153, main_#t~mem154, main_#t~mem156, main_#t~mem155, main_#t~mem157, main_#t~mem158, main_#t~switch159, main_#t~mem160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem171.base, main_#t~mem171.offset, main_#t~mem172, main_#t~mem173.base, main_#t~mem173.offset, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180, main_#t~mem181, main_#t~mem182, main_#t~short183, main_#t~mem184.base, main_#t~mem184.offset, main_#t~ret185, main_#t~mem186.base, main_#t~mem186.offset, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem190.base, main_#t~mem190.offset, main_#t~mem191.base, main_#t~mem191.offset, main_#t~short192, main_#t~mem193.base, main_#t~mem193.offset, main_#t~mem194.base, main_#t~mem194.offset, main_#t~mem195.base, main_#t~mem195.offset, main_#t~mem196.base, main_#t~mem196.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~mem199.base, main_#t~mem199.offset, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201, main_#t~mem202.base, main_#t~mem202.offset, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204.base, main_#t~mem204.offset, main_#t~mem205, main_#t~mem206.base, main_#t~mem206.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208.base, main_#t~mem208.offset, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem215, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214, main_#t~mem216.base, main_#t~mem216.offset, main_#t~mem217.base, main_#t~mem217.offset, main_#t~mem218, main_#t~post219, main_#t~mem220.base, main_#t~mem220.offset, main_#t~mem221.base, main_#t~mem221.offset, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225.base, main_#t~mem225.offset, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem228.base, main_#t~mem228.offset, main_#t~mem229, main_#t~post230, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem144, main_#t~post145, main_#t~mem146, main_#t~mem231.base, main_#t~mem231.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 1013#L715-4 [2021-11-07 08:04:55,844 INFO L793 eck$LassoCheckResult]: Loop: 1013#L715-4 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 1064#L715-1 assume !!(main_#t~mem7 < 1000);havoc main_#t~mem7;call main_#t~malloc8.base, main_#t~malloc8.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc8.base, main_#t~malloc8.offset;havoc main_#t~malloc8.base, main_#t~malloc8.offset; 975#L717 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 976#L717-2 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem9, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem10 * main_#t~mem11, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem10;havoc main_#t~mem11; 1072#L722-124 havoc main_~_ha_hashv~0; 1073#L722-49 goto; 1006#L722-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 954#L722-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 955#L722-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch24 := 11 == main_~_hj_k~0; 1019#L722-10 assume !main_#t~switch24; 1063#L722-12 main_#t~switch24 := main_#t~switch24 || 10 == main_~_hj_k~0; 1086#L722-13 assume main_#t~switch24;call main_#t~mem26 := read~int(main_~_hj_key~0.base, 9 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 65536 * (main_#t~mem26 % 256);havoc main_#t~mem26; 985#L722-15 main_#t~switch24 := main_#t~switch24 || 9 == main_~_hj_k~0; 1027#L722-16 assume main_#t~switch24;call main_#t~mem27 := read~int(main_~_hj_key~0.base, 8 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 256 * (main_#t~mem27 % 256);havoc main_#t~mem27; 1056#L722-18 main_#t~switch24 := main_#t~switch24 || 8 == main_~_hj_k~0; 945#L722-19 assume main_#t~switch24;call main_#t~mem28 := read~int(main_~_hj_key~0.base, 7 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 16777216 * (main_#t~mem28 % 256);havoc main_#t~mem28; 946#L722-21 main_#t~switch24 := main_#t~switch24 || 7 == main_~_hj_k~0; 1061#L722-22 assume main_#t~switch24;call main_#t~mem29 := read~int(main_~_hj_key~0.base, 6 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 65536 * (main_#t~mem29 % 256);havoc main_#t~mem29; 1057#L722-24 main_#t~switch24 := main_#t~switch24 || 6 == main_~_hj_k~0; 1058#L722-25 assume main_#t~switch24;call main_#t~mem30 := read~int(main_~_hj_key~0.base, 5 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 256 * (main_#t~mem30 % 256);havoc main_#t~mem30; 986#L722-27 main_#t~switch24 := main_#t~switch24 || 5 == main_~_hj_k~0; 987#L722-28 assume main_#t~switch24;call main_#t~mem31 := read~int(main_~_hj_key~0.base, 4 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + main_#t~mem31 % 256;havoc main_#t~mem31; 1069#L722-30 main_#t~switch24 := main_#t~switch24 || 4 == main_~_hj_k~0; 1070#L722-31 assume main_#t~switch24;call main_#t~mem32 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem32 % 256);havoc main_#t~mem32; 1085#L722-33 main_#t~switch24 := main_#t~switch24 || 3 == main_~_hj_k~0; 957#L722-34 assume main_#t~switch24;call main_#t~mem33 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem33 % 256);havoc main_#t~mem33; 958#L722-36 main_#t~switch24 := main_#t~switch24 || 2 == main_~_hj_k~0; 1049#L722-37 assume main_#t~switch24;call main_#t~mem34 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem34 % 256);havoc main_#t~mem34; 1050#L722-39 main_#t~switch24 := main_#t~switch24 || 1 == main_~_hj_k~0; 1055#L722-40 assume main_#t~switch24;call main_#t~mem35 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem35 % 256;havoc main_#t~mem35; 1040#L722-42 havoc main_#t~switch24; 1041#L722-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 1068#L722-44 goto; 935#L722-46 goto; 936#L722-48 goto; 1082#L722-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 1081#L722-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem53.base, main_#t~mem53.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem53.base, main_#t~mem53.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem53.base, main_#t~mem53.offset; 1053#L722-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem54.base, main_#t~mem54.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_#t~mem54.base, 16 + main_#t~mem54.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57 := read~int(main_#t~mem56.base, 20 + main_#t~mem56.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset - main_#t~mem57, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem54.base, main_#t~mem54.offset;havoc main_#t~mem55.base, main_#t~mem55.offset;havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57;call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59.base, main_#t~mem59.offset := read~$Pointer$(main_#t~mem58.base, 16 + main_#t~mem58.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem59.base, 8 + main_#t~mem59.offset, 4);havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59.base, main_#t~mem59.offset;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset; 1054#L722-66 goto; 1023#L722-120 havoc main_~_ha_bkt~0;call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem62 := read~int(main_#t~mem61.base, 12 + main_#t~mem61.offset, 4);main_#t~post63 := main_#t~mem62;call write~int(1 + main_#t~post63, main_#t~mem61.base, 12 + main_#t~mem61.offset, 4);havoc main_#t~mem61.base, main_#t~mem61.offset;havoc main_#t~mem62;havoc main_#t~post63; 1009#L722-71 call main_#t~mem64.base, main_#t~mem64.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem65 := read~int(main_#t~mem64.base, 4 + main_#t~mem64.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem65 - 1);havoc main_#t~mem64.base, main_#t~mem64.offset;havoc main_#t~mem65; 1010#L722-70 goto; 1077#L722-118 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67.base, main_#t~mem67.offset := read~$Pointer$(main_#t~mem66.base, main_#t~mem66.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem67.base, main_#t~mem67.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67.base, main_#t~mem67.offset;call main_#t~mem68 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post69 := main_#t~mem68;call write~int(1 + main_#t~post69, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem68;havoc main_#t~post69;call main_#t~mem70.base, main_#t~mem70.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem70.base, main_#t~mem70.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem70.base, main_#t~mem70.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem71.base, main_#t~mem71.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 939#L722-73 assume main_#t~mem71.base != 0 || main_#t~mem71.offset != 0;havoc main_#t~mem71.base, main_#t~mem71.offset;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem72.base, 12 + main_#t~mem72.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset; 940#L722-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem74 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem73 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short77 := main_#t~mem74 % 4294967296 >= 10 * (1 + main_#t~mem73) % 4294967296; 1030#L722-76 assume main_#t~short77;call main_#t~mem75.base, main_#t~mem75.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem76 := read~int(main_#t~mem75.base, 36 + main_#t~mem75.offset, 4);main_#t~short77 := 0 == main_#t~mem76 % 4294967296; 905#L722-78 assume !main_#t~short77;havoc main_#t~mem74;havoc main_#t~mem73;havoc main_#t~mem75.base, main_#t~mem75.offset;havoc main_#t~mem76;havoc main_#t~short77; 907#L722-117 goto; 1003#L722-119 goto; 1024#L722-121 goto; 924#L722-123 goto; 925#L715-3 call main_#t~mem5 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 1013#L715-4 [2021-11-07 08:04:55,844 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:04:55,845 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2021-11-07 08:04:55,845 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:04:55,846 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1014004678] [2021-11-07 08:04:55,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:04:55,847 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:04:55,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:04:55,917 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:04:55,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:04:55,958 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:04:55,962 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:04:55,963 INFO L85 PathProgramCache]: Analyzing trace with hash -1623964883, now seen corresponding path program 1 times [2021-11-07 08:04:55,963 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:04:55,965 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1230791770] [2021-11-07 08:04:55,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:04:55,966 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:04:55,989 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 08:04:55,990 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [492532258] [2021-11-07 08:04:55,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:04:55,990 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:04:55,991 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:04:55,994 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:04:56,017 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-11-07 08:04:56,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:04:56,234 INFO L263 TraceCheckSpWp]: Trace formula consists of 308 conjuncts, 4 conjunts are in the unsatisfiable core [2021-11-07 08:04:56,244 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 08:04:56,449 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:04:56,449 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:04:56,450 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1230791770] [2021-11-07 08:04:56,450 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-07 08:04:56,451 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [492532258] [2021-11-07 08:04:56,451 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [492532258] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 08:04:56,452 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 08:04:56,452 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-07 08:04:56,452 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2006284508] [2021-11-07 08:04:56,453 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:04:56,453 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:04:56,466 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-11-07 08:04:56,466 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-11-07 08:04:56,467 INFO L87 Difference]: Start difference. First operand 196 states and 251 transitions. cyclomatic complexity: 58 Second operand has 5 states, 5 states have (on average 10.4) internal successors, (52), 5 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:04:56,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:04:56,624 INFO L93 Difference]: Finished difference Result 271 states and 347 transitions. [2021-11-07 08:04:56,625 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-07 08:04:56,625 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 271 states and 347 transitions. [2021-11-07 08:04:56,632 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 256 [2021-11-07 08:04:56,636 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 271 states to 271 states and 347 transitions. [2021-11-07 08:04:56,636 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 271 [2021-11-07 08:04:56,636 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 271 [2021-11-07 08:04:56,637 INFO L73 IsDeterministic]: Start isDeterministic. Operand 271 states and 347 transitions. [2021-11-07 08:04:56,638 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:04:56,638 INFO L681 BuchiCegarLoop]: Abstraction has 271 states and 347 transitions. [2021-11-07 08:04:56,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 271 states and 347 transitions. [2021-11-07 08:04:56,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 271 to 182. [2021-11-07 08:04:56,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 182 states, 178 states have (on average 1.2584269662921348) internal successors, (224), 177 states have internal predecessors, (224), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:04:56,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 230 transitions. [2021-11-07 08:04:56,661 INFO L704 BuchiCegarLoop]: Abstraction has 182 states and 230 transitions. [2021-11-07 08:04:56,661 INFO L587 BuchiCegarLoop]: Abstraction has 182 states and 230 transitions. [2021-11-07 08:04:56,662 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-11-07 08:04:56,662 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 182 states and 230 transitions. [2021-11-07 08:04:56,663 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 175 [2021-11-07 08:04:56,663 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:04:56,663 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:04:56,664 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:04:56,664 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 08:04:56,665 INFO L791 eck$LassoCheckResult]: Stem: 1710#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21); 1640#L-1 havoc main_#res;havoc main_#t~malloc8.base, main_#t~malloc8.offset, main_#t~mem9, main_#t~mem10, main_#t~mem11, main_#t~mem13, main_#t~mem12, main_#t~mem14, main_#t~mem15, main_#t~mem17, main_#t~mem16, main_#t~mem18, main_#t~mem19, main_#t~mem21, main_#t~mem20, main_#t~mem22, main_#t~mem23, main_#t~switch24, main_#t~mem25, main_#t~mem26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc36.base, main_#t~malloc36.offset, main_#t~mem37.base, main_#t~mem37.offset, main_#t~mem38.base, main_#t~mem38.offset, main_#t~memset~res39.base, main_#t~memset~res39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~mem41.base, main_#t~mem41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~malloc45.base, main_#t~malloc45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~mem47.base, main_#t~mem47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~memset~res52.base, main_#t~memset~res52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~mem54.base, main_#t~mem54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59.base, main_#t~mem59.offset, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62, main_#t~post63, main_#t~mem64.base, main_#t~mem64.offset, main_#t~mem65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67.base, main_#t~mem67.offset, main_#t~mem68, main_#t~post69, main_#t~mem70.base, main_#t~mem70.offset, main_#t~mem71.base, main_#t~mem71.offset, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem74, main_#t~mem73, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76, main_#t~short77, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79, main_#t~malloc80.base, main_#t~malloc80.offset, main_#t~mem81.base, main_#t~mem81.offset, main_#t~mem82.base, main_#t~mem82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84, main_#t~memset~res85.base, main_#t~memset~res85.offset, main_#t~mem86.base, main_#t~mem86.offset, main_#t~mem87.base, main_#t~mem87.offset, main_#t~mem90, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89, main_#t~mem91.base, main_#t~mem91.offset, main_#t~mem94, main_#t~mem92.base, main_#t~mem92.offset, main_#t~mem93, main_#t~ite95, main_#t~mem96.base, main_#t~mem96.offset, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem106, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem108, main_#t~pre109, main_#t~mem110.base, main_#t~mem110.offset, main_#t~mem111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~post114, main_#t~mem118, main_#t~mem116, main_#t~mem115.base, main_#t~mem115.offset, main_#t~mem117, main_#t~mem119, main_#t~post120, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123.base, main_#t~mem123.offset, main_#t~post97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem99, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~post130, main_#t~mem131.base, main_#t~mem131.offset, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem137, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136, main_#t~ite140, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem141.base, main_#t~mem141.offset, main_#t~mem142, main_#t~mem143.base, main_#t~mem143.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem5, main_#t~post6, main_#t~mem7, main_#t~mem148, main_#t~mem147, main_#t~mem149, main_#t~mem150, main_#t~mem152, main_#t~mem151, main_#t~mem153, main_#t~mem154, main_#t~mem156, main_#t~mem155, main_#t~mem157, main_#t~mem158, main_#t~switch159, main_#t~mem160, main_#t~mem161, main_#t~mem162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem171.base, main_#t~mem171.offset, main_#t~mem172, main_#t~mem173.base, main_#t~mem173.offset, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180, main_#t~mem181, main_#t~mem182, main_#t~short183, main_#t~mem184.base, main_#t~mem184.offset, main_#t~ret185, main_#t~mem186.base, main_#t~mem186.offset, main_#t~mem187.base, main_#t~mem187.offset, main_#t~mem188.base, main_#t~mem188.offset, main_#t~mem189, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem190.base, main_#t~mem190.offset, main_#t~mem191.base, main_#t~mem191.offset, main_#t~short192, main_#t~mem193.base, main_#t~mem193.offset, main_#t~mem194.base, main_#t~mem194.offset, main_#t~mem195.base, main_#t~mem195.offset, main_#t~mem196.base, main_#t~mem196.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~mem199.base, main_#t~mem199.offset, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201, main_#t~mem202.base, main_#t~mem202.offset, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204.base, main_#t~mem204.offset, main_#t~mem205, main_#t~mem206.base, main_#t~mem206.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208.base, main_#t~mem208.offset, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem215, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214, main_#t~mem216.base, main_#t~mem216.offset, main_#t~mem217.base, main_#t~mem217.offset, main_#t~mem218, main_#t~post219, main_#t~mem220.base, main_#t~mem220.offset, main_#t~mem221.base, main_#t~mem221.offset, main_#t~mem222.base, main_#t~mem222.offset, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225.base, main_#t~mem225.offset, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem228.base, main_#t~mem228.offset, main_#t~mem229, main_#t~post230, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem144, main_#t~post145, main_#t~mem146, main_#t~mem231.base, main_#t~mem231.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 1641#L715-4 [2021-11-07 08:04:56,665 INFO L793 eck$LassoCheckResult]: Loop: 1641#L715-4 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 1688#L715-1 assume !!(main_#t~mem7 < 1000);havoc main_#t~mem7;call main_#t~malloc8.base, main_#t~malloc8.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc8.base, main_#t~malloc8.offset;havoc main_#t~malloc8.base, main_#t~malloc8.offset; 1603#L717 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 1604#L717-2 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem9, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem9;call main_#t~mem10 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem10 * main_#t~mem11, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem10;havoc main_#t~mem11; 1696#L722-124 havoc main_~_ha_hashv~0; 1697#L722-49 goto; 1634#L722-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 1582#L722-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 1583#L722-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch24 := 11 == main_~_hj_k~0; 1646#L722-10 assume !main_#t~switch24; 1661#L722-12 main_#t~switch24 := main_#t~switch24 || 10 == main_~_hj_k~0; 1612#L722-13 assume !main_#t~switch24; 1613#L722-15 main_#t~switch24 := main_#t~switch24 || 9 == main_~_hj_k~0; 1654#L722-16 assume !main_#t~switch24; 1681#L722-18 main_#t~switch24 := main_#t~switch24 || 8 == main_~_hj_k~0; 1573#L722-19 assume !main_#t~switch24; 1574#L722-21 main_#t~switch24 := main_#t~switch24 || 7 == main_~_hj_k~0; 1686#L722-22 assume !main_#t~switch24; 1682#L722-24 main_#t~switch24 := main_#t~switch24 || 6 == main_~_hj_k~0; 1683#L722-25 assume !main_#t~switch24; 1614#L722-27 main_#t~switch24 := main_#t~switch24 || 5 == main_~_hj_k~0; 1615#L722-28 assume !main_#t~switch24; 1693#L722-30 main_#t~switch24 := main_#t~switch24 || 4 == main_~_hj_k~0; 1694#L722-31 assume main_#t~switch24;call main_#t~mem32 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem32 % 256);havoc main_#t~mem32; 1644#L722-33 main_#t~switch24 := main_#t~switch24 || 3 == main_~_hj_k~0; 1585#L722-34 assume main_#t~switch24;call main_#t~mem33 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem33 % 256);havoc main_#t~mem33; 1586#L722-36 main_#t~switch24 := main_#t~switch24 || 2 == main_~_hj_k~0; 1676#L722-37 assume main_#t~switch24;call main_#t~mem34 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem34 % 256);havoc main_#t~mem34; 1536#L722-39 main_#t~switch24 := main_#t~switch24 || 1 == main_~_hj_k~0; 1537#L722-40 assume main_#t~switch24;call main_#t~mem35 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem35 % 256;havoc main_#t~mem35; 1667#L722-42 havoc main_#t~switch24; 1668#L722-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 1692#L722-44 goto; 1563#L722-46 goto; 1564#L722-48 goto; 1708#L722-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 1707#L722-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem53.base, main_#t~mem53.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem53.base, main_#t~mem53.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem53.base, main_#t~mem53.offset; 1679#L722-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem54.base, main_#t~mem54.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_#t~mem54.base, 16 + main_#t~mem54.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57 := read~int(main_#t~mem56.base, 20 + main_#t~mem56.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset - main_#t~mem57, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem54.base, main_#t~mem54.offset;havoc main_#t~mem55.base, main_#t~mem55.offset;havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57;call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59.base, main_#t~mem59.offset := read~$Pointer$(main_#t~mem58.base, 16 + main_#t~mem58.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem59.base, 8 + main_#t~mem59.offset, 4);havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59.base, main_#t~mem59.offset;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset; 1680#L722-66 goto; 1650#L722-120 havoc main_~_ha_bkt~0;call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem62 := read~int(main_#t~mem61.base, 12 + main_#t~mem61.offset, 4);main_#t~post63 := main_#t~mem62;call write~int(1 + main_#t~post63, main_#t~mem61.base, 12 + main_#t~mem61.offset, 4);havoc main_#t~mem61.base, main_#t~mem61.offset;havoc main_#t~mem62;havoc main_#t~post63; 1637#L722-71 call main_#t~mem64.base, main_#t~mem64.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem65 := read~int(main_#t~mem64.base, 4 + main_#t~mem64.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem65 - 1);havoc main_#t~mem64.base, main_#t~mem64.offset;havoc main_#t~mem65; 1638#L722-70 goto; 1703#L722-118 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67.base, main_#t~mem67.offset := read~$Pointer$(main_#t~mem66.base, main_#t~mem66.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem67.base, main_#t~mem67.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67.base, main_#t~mem67.offset;call main_#t~mem68 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post69 := main_#t~mem68;call write~int(1 + main_#t~post69, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem68;havoc main_#t~post69;call main_#t~mem70.base, main_#t~mem70.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem70.base, main_#t~mem70.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem70.base, main_#t~mem70.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem71.base, main_#t~mem71.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 1567#L722-73 assume main_#t~mem71.base != 0 || main_#t~mem71.offset != 0;havoc main_#t~mem71.base, main_#t~mem71.offset;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem72.base, 12 + main_#t~mem72.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset; 1568#L722-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem74 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem73 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short77 := main_#t~mem74 % 4294967296 >= 10 * (1 + main_#t~mem73) % 4294967296; 1657#L722-76 assume main_#t~short77;call main_#t~mem75.base, main_#t~mem75.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem76 := read~int(main_#t~mem75.base, 36 + main_#t~mem75.offset, 4);main_#t~short77 := 0 == main_#t~mem76 % 4294967296; 1533#L722-78 assume !main_#t~short77;havoc main_#t~mem74;havoc main_#t~mem73;havoc main_#t~mem75.base, main_#t~mem75.offset;havoc main_#t~mem76;havoc main_#t~short77; 1535#L722-117 goto; 1631#L722-119 goto; 1651#L722-121 goto; 1552#L722-123 goto; 1553#L715-3 call main_#t~mem5 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post6 := main_#t~mem5;call write~int(1 + main_#t~post6, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem5;havoc main_#t~post6; 1641#L715-4 [2021-11-07 08:04:56,665 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:04:56,666 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2021-11-07 08:04:56,666 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:04:56,666 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [62511780] [2021-11-07 08:04:56,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:04:56,667 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:04:56,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:04:56,684 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:04:56,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:04:56,706 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:04:56,706 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:04:56,707 INFO L85 PathProgramCache]: Analyzing trace with hash 1694021305, now seen corresponding path program 1 times [2021-11-07 08:04:56,707 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:04:56,707 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1937835784] [2021-11-07 08:04:56,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:04:56,708 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:04:56,719 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 08:04:56,720 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [179489505] [2021-11-07 08:04:56,720 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:04:56,720 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:04:56,721 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:04:56,742 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:04:56,745 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b03098b6-9214-43e4-8153-cfa2fb947954/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process