./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test1-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 47ea0209 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test1-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 1447114af8a4b489e3ec713f117f7a92d9cc93e5175903910b61bfe512c41aed --- Real Ultimate output --- This is Ultimate 0.2.1-dev-47ea020 [2021-11-07 08:08:25,099 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-07 08:08:25,102 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-07 08:08:25,167 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-07 08:08:25,168 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-07 08:08:25,174 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-07 08:08:25,178 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-07 08:08:25,184 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-07 08:08:25,188 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-07 08:08:25,198 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-07 08:08:25,200 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-07 08:08:25,202 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-07 08:08:25,203 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-07 08:08:25,204 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-07 08:08:25,206 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-07 08:08:25,208 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-07 08:08:25,216 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-07 08:08:25,217 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-07 08:08:25,221 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-07 08:08:25,234 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-07 08:08:25,237 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-07 08:08:25,240 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-07 08:08:25,248 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-07 08:08:25,251 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-07 08:08:25,256 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-07 08:08:25,257 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-07 08:08:25,257 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-07 08:08:25,260 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-07 08:08:25,261 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-07 08:08:25,263 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-07 08:08:25,265 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-07 08:08:25,266 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-07 08:08:25,269 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-07 08:08:25,271 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-07 08:08:25,273 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-07 08:08:25,274 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-07 08:08:25,275 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-07 08:08:25,275 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-07 08:08:25,275 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-07 08:08:25,277 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-07 08:08:25,278 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-07 08:08:25,279 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-11-07 08:08:25,348 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-07 08:08:25,349 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-07 08:08:25,350 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-07 08:08:25,351 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-07 08:08:25,352 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-07 08:08:25,353 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-07 08:08:25,353 INFO L138 SettingsManager]: * Use SBE=true [2021-11-07 08:08:25,354 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-11-07 08:08:25,354 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-11-07 08:08:25,354 INFO L138 SettingsManager]: * Use old map elimination=false [2021-11-07 08:08:25,356 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-11-07 08:08:25,356 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-11-07 08:08:25,357 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-11-07 08:08:25,357 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-07 08:08:25,357 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-07 08:08:25,358 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-11-07 08:08:25,358 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-07 08:08:25,358 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-07 08:08:25,358 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-07 08:08:25,359 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-11-07 08:08:25,359 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-11-07 08:08:25,359 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-11-07 08:08:25,360 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-07 08:08:25,360 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-07 08:08:25,360 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-11-07 08:08:25,360 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-07 08:08:25,362 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-11-07 08:08:25,363 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-07 08:08:25,363 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-07 08:08:25,364 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-07 08:08:25,364 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-07 08:08:25,365 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-07 08:08:25,366 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-11-07 08:08:25,366 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 1447114af8a4b489e3ec713f117f7a92d9cc93e5175903910b61bfe512c41aed [2021-11-07 08:08:25,756 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-07 08:08:25,783 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-07 08:08:25,787 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-07 08:08:25,788 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-07 08:08:25,789 INFO L275 PluginConnector]: CDTParser initialized [2021-11-07 08:08:25,791 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test1-2.i [2021-11-07 08:08:25,875 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/data/b70e872db/06e0b4218ab84f87a782b70928edad19/FLAGc63270c07 [2021-11-07 08:08:26,572 INFO L306 CDTParser]: Found 1 translation units. [2021-11-07 08:08:26,576 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test1-2.i [2021-11-07 08:08:26,609 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/data/b70e872db/06e0b4218ab84f87a782b70928edad19/FLAGc63270c07 [2021-11-07 08:08:26,763 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/data/b70e872db/06e0b4218ab84f87a782b70928edad19 [2021-11-07 08:08:26,768 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-07 08:08:26,773 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-07 08:08:26,775 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-07 08:08:26,776 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-07 08:08:26,780 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-07 08:08:26,781 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.11 08:08:26" (1/1) ... [2021-11-07 08:08:26,784 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4f94a4f8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:08:26, skipping insertion in model container [2021-11-07 08:08:26,784 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.11 08:08:26" (1/1) ... [2021-11-07 08:08:26,793 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-07 08:08:26,903 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-07 08:08:27,416 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test1-2.i[33021,33034] [2021-11-07 08:08:27,522 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-07 08:08:27,534 INFO L203 MainTranslator]: Completed pre-run [2021-11-07 08:08:27,591 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test1-2.i[33021,33034] [2021-11-07 08:08:27,734 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-07 08:08:27,806 INFO L208 MainTranslator]: Completed translation [2021-11-07 08:08:27,807 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:08:27 WrapperNode [2021-11-07 08:08:27,808 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-07 08:08:27,810 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-07 08:08:27,810 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-07 08:08:27,810 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-07 08:08:27,820 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:08:27" (1/1) ... [2021-11-07 08:08:27,876 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:08:27" (1/1) ... [2021-11-07 08:08:27,954 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-07 08:08:27,955 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-07 08:08:27,955 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-07 08:08:27,955 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-07 08:08:27,966 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:08:27" (1/1) ... [2021-11-07 08:08:27,967 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:08:27" (1/1) ... [2021-11-07 08:08:27,980 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:08:27" (1/1) ... [2021-11-07 08:08:27,981 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:08:27" (1/1) ... [2021-11-07 08:08:28,060 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:08:27" (1/1) ... [2021-11-07 08:08:28,075 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:08:27" (1/1) ... [2021-11-07 08:08:28,080 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:08:27" (1/1) ... [2021-11-07 08:08:28,090 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-07 08:08:28,091 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-07 08:08:28,092 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-07 08:08:28,092 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-07 08:08:28,093 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:08:27" (1/1) ... [2021-11-07 08:08:28,121 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-07 08:08:28,134 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:08:28,150 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-07 08:08:28,170 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-11-07 08:08:28,208 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-11-07 08:08:28,208 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-07 08:08:28,208 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2021-11-07 08:08:28,208 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2021-11-07 08:08:28,209 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-11-07 08:08:28,209 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-11-07 08:08:28,209 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-07 08:08:28,209 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-11-07 08:08:28,209 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-07 08:08:28,210 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-07 08:08:28,210 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-07 08:08:28,210 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-07 08:08:28,422 WARN L805 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-11-07 08:08:29,967 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-07 08:08:29,968 INFO L299 CfgBuilder]: Removed 66 assume(true) statements. [2021-11-07 08:08:29,971 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.11 08:08:29 BoogieIcfgContainer [2021-11-07 08:08:29,972 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-07 08:08:29,975 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-11-07 08:08:29,975 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-11-07 08:08:29,979 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-11-07 08:08:29,980 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 08:08:29,980 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 07.11 08:08:26" (1/3) ... [2021-11-07 08:08:29,982 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7c92e267 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 07.11 08:08:29, skipping insertion in model container [2021-11-07 08:08:29,983 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 08:08:29,983 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 08:08:27" (2/3) ... [2021-11-07 08:08:29,983 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7c92e267 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 07.11 08:08:29, skipping insertion in model container [2021-11-07 08:08:29,984 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 08:08:29,984 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.11 08:08:29" (3/3) ... [2021-11-07 08:08:29,986 INFO L389 chiAutomizerObserver]: Analyzing ICFG uthash_SFH_test1-2.i [2021-11-07 08:08:30,048 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-11-07 08:08:30,048 INFO L360 BuchiCegarLoop]: Hoare is false [2021-11-07 08:08:30,049 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-11-07 08:08:30,049 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-11-07 08:08:30,049 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-11-07 08:08:30,049 INFO L364 BuchiCegarLoop]: Difference is false [2021-11-07 08:08:30,050 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-11-07 08:08:30,050 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-11-07 08:08:30,092 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 152 states, 147 states have (on average 1.6938775510204083) internal successors, (249), 147 states have internal predecessors, (249), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:08:30,164 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 138 [2021-11-07 08:08:30,164 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:08:30,165 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:08:30,190 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:08:30,190 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2021-11-07 08:08:30,190 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-11-07 08:08:30,191 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 152 states, 147 states have (on average 1.6938775510204083) internal successors, (249), 147 states have internal predecessors, (249), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:08:30,215 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 138 [2021-11-07 08:08:30,216 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:08:30,216 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:08:30,216 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:08:30,217 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2021-11-07 08:08:30,227 INFO L791 eck$LassoCheckResult]: Stem: 138#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 48#L-1true havoc main_#res;havoc main_#t~malloc8.base, main_#t~malloc8.offset, main_#t~mem10, main_#t~mem9, main_#t~mem11, main_#t~mem12, main_#t~mem14, main_#t~mem13, main_#t~mem15, main_#t~mem16, main_#t~mem18, main_#t~mem17, main_#t~mem19, main_#t~mem20, main_#t~switch21, main_#t~mem22, main_#t~mem23, main_#t~mem24, main_#t~mem25, main_#t~mem26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc33.base, main_#t~malloc33.offset, main_#t~mem34.base, main_#t~mem34.offset, main_#t~mem35.base, main_#t~mem35.offset, main_#t~memset~res36.base, main_#t~memset~res36.offset, main_#t~mem37.base, main_#t~mem37.offset, main_#t~mem38.base, main_#t~mem38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~mem41.base, main_#t~mem41.offset, main_#t~malloc42.base, main_#t~malloc42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~mem47.base, main_#t~mem47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~memset~res49.base, main_#t~memset~res49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~mem54, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~post60, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64.base, main_#t~mem64.offset, main_#t~mem65, main_#t~post66, main_#t~mem67.base, main_#t~mem67.offset, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem71, main_#t~mem70, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73, main_#t~short74, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76, main_#t~malloc77.base, main_#t~malloc77.offset, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79.base, main_#t~mem79.offset, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~memset~res82.base, main_#t~memset~res82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem87, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem91, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem90, main_#t~ite92, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem97.base, main_#t~mem97.offset, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem99.base, main_#t~mem99.offset, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem103, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105, main_#t~pre106, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem108, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~post111, main_#t~mem115, main_#t~mem113, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem114, main_#t~mem116, main_#t~post117, main_#t~mem118.base, main_#t~mem118.offset, main_#t~mem119.base, main_#t~mem119.offset, main_#t~mem120.base, main_#t~mem120.offset, main_#t~post94, main_#t~mem95.base, main_#t~mem95.offset, main_#t~mem96, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem126, main_#t~post127, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129.base, main_#t~mem129.offset, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131.base, main_#t~mem131.offset, main_#t~mem134, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133, main_#t~ite137, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem140.base, main_#t~mem140.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~post7, main_#t~mem142, main_#t~mem143, main_#t~mem141.base, main_#t~mem141.offset, main_#t~ite145.base, main_#t~ite145.offset, main_#t~mem144.base, main_#t~mem144.offset, main_#t~mem148.base, main_#t~mem148.offset, main_#t~mem149.base, main_#t~mem149.offset, main_#t~short150, main_#t~mem151.base, main_#t~mem151.offset, main_#t~mem152.base, main_#t~mem152.offset, main_#t~mem153.base, main_#t~mem153.offset, main_#t~mem154.base, main_#t~mem154.offset, main_#t~mem155.base, main_#t~mem155.offset, main_#t~mem156.base, main_#t~mem156.offset, main_#t~mem157.base, main_#t~mem157.offset, main_#t~mem158.base, main_#t~mem158.offset, main_#t~mem159, main_#t~mem160.base, main_#t~mem160.offset, main_#t~mem161.base, main_#t~mem161.offset, main_#t~mem162.base, main_#t~mem162.offset, main_#t~mem163, main_#t~mem164.base, main_#t~mem164.offset, main_#t~mem165.base, main_#t~mem165.offset, main_#t~mem166.base, main_#t~mem166.offset, main_#t~mem167.base, main_#t~mem167.offset, main_#t~mem168.base, main_#t~mem168.offset, main_#t~mem169, main_#t~mem170.base, main_#t~mem170.offset, main_#t~mem173, main_#t~mem171.base, main_#t~mem171.offset, main_#t~mem172, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176, main_#t~post177, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181.base, main_#t~mem181.offset, main_#t~mem182.base, main_#t~mem182.offset, main_#t~mem183.base, main_#t~mem183.offset, main_#t~mem184.base, main_#t~mem184.offset, main_#t~mem185.base, main_#t~mem185.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem186.base, main_#t~mem186.offset, main_#t~mem187, main_#t~post188, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~ite147.base, main_#t~ite147.offset, main_#t~mem146.base, main_#t~mem146.offset, main_~i~0, main_~user~0.base, main_~user~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;havoc main_~i~0;havoc main_~user~0.base, main_~user~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;main_~i~0 := 0; 123#L750-3true [2021-11-07 08:08:30,228 INFO L793 eck$LassoCheckResult]: Loop: 123#L750-3true assume !!(main_~i~0 < 10);call main_#t~malloc8.base, main_#t~malloc8.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc8.base, main_#t~malloc8.offset;havoc main_#t~malloc8.base, main_#t~malloc8.offset; 83#L752true assume main_~user~0.base == 0 && main_~user~0.offset == 0;assume false; 85#L752-2true call write~int(main_~i~0, main_~user~0.base, main_~user~0.offset, 4);call write~int(main_~i~0 * main_~i~0, main_~user~0.base, 4 + main_~user~0.offset, 4); 106#L757-124true assume !true; 58#L750-2true main_#t~post7 := main_~i~0;main_~i~0 := 1 + main_#t~post7;havoc main_#t~post7; 123#L750-3true [2021-11-07 08:08:30,239 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:08:30,239 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2021-11-07 08:08:30,251 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:08:30,252 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1859835818] [2021-11-07 08:08:30,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:08:30,254 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:08:30,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:08:30,410 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:08:30,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:08:30,513 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:08:30,517 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:08:30,517 INFO L85 PathProgramCache]: Analyzing trace with hash 46868472, now seen corresponding path program 1 times [2021-11-07 08:08:30,517 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:08:30,518 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2059395787] [2021-11-07 08:08:30,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:08:30,518 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:08:30,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:08:30,630 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:08:30,630 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:08:30,631 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2059395787] [2021-11-07 08:08:30,631 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2059395787] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 08:08:30,632 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 08:08:30,632 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-07 08:08:30,633 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1816284924] [2021-11-07 08:08:30,638 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:08:30,640 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:08:30,657 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-11-07 08:08:30,658 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-11-07 08:08:30,661 INFO L87 Difference]: Start difference. First operand has 152 states, 147 states have (on average 1.6938775510204083) internal successors, (249), 147 states have internal predecessors, (249), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 2.5) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:08:30,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:08:30,684 INFO L93 Difference]: Finished difference Result 152 states and 201 transitions. [2021-11-07 08:08:30,684 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-11-07 08:08:30,686 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 152 states and 201 transitions. [2021-11-07 08:08:30,693 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 138 [2021-11-07 08:08:30,701 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 152 states to 148 states and 197 transitions. [2021-11-07 08:08:30,703 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 148 [2021-11-07 08:08:30,704 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 148 [2021-11-07 08:08:30,705 INFO L73 IsDeterministic]: Start isDeterministic. Operand 148 states and 197 transitions. [2021-11-07 08:08:30,708 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:08:30,708 INFO L681 BuchiCegarLoop]: Abstraction has 148 states and 197 transitions. [2021-11-07 08:08:30,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states and 197 transitions. [2021-11-07 08:08:30,769 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 148. [2021-11-07 08:08:30,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 148 states, 144 states have (on average 1.3263888888888888) internal successors, (191), 143 states have internal predecessors, (191), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:08:30,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 197 transitions. [2021-11-07 08:08:30,780 INFO L704 BuchiCegarLoop]: Abstraction has 148 states and 197 transitions. [2021-11-07 08:08:30,780 INFO L587 BuchiCegarLoop]: Abstraction has 148 states and 197 transitions. [2021-11-07 08:08:30,780 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-11-07 08:08:30,780 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 148 states and 197 transitions. [2021-11-07 08:08:30,792 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 138 [2021-11-07 08:08:30,792 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:08:30,792 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:08:30,794 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:08:30,794 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 08:08:30,794 INFO L791 eck$LassoCheckResult]: Stem: 457#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 390#L-1 havoc main_#res;havoc main_#t~malloc8.base, main_#t~malloc8.offset, main_#t~mem10, main_#t~mem9, main_#t~mem11, main_#t~mem12, main_#t~mem14, main_#t~mem13, main_#t~mem15, main_#t~mem16, main_#t~mem18, main_#t~mem17, main_#t~mem19, main_#t~mem20, main_#t~switch21, main_#t~mem22, main_#t~mem23, main_#t~mem24, main_#t~mem25, main_#t~mem26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc33.base, main_#t~malloc33.offset, main_#t~mem34.base, main_#t~mem34.offset, main_#t~mem35.base, main_#t~mem35.offset, main_#t~memset~res36.base, main_#t~memset~res36.offset, main_#t~mem37.base, main_#t~mem37.offset, main_#t~mem38.base, main_#t~mem38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~mem41.base, main_#t~mem41.offset, main_#t~malloc42.base, main_#t~malloc42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~mem47.base, main_#t~mem47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~memset~res49.base, main_#t~memset~res49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~mem54, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~post60, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64.base, main_#t~mem64.offset, main_#t~mem65, main_#t~post66, main_#t~mem67.base, main_#t~mem67.offset, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem71, main_#t~mem70, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73, main_#t~short74, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76, main_#t~malloc77.base, main_#t~malloc77.offset, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79.base, main_#t~mem79.offset, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~memset~res82.base, main_#t~memset~res82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem87, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem91, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem90, main_#t~ite92, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem97.base, main_#t~mem97.offset, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem99.base, main_#t~mem99.offset, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem103, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105, main_#t~pre106, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem108, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~post111, main_#t~mem115, main_#t~mem113, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem114, main_#t~mem116, main_#t~post117, main_#t~mem118.base, main_#t~mem118.offset, main_#t~mem119.base, main_#t~mem119.offset, main_#t~mem120.base, main_#t~mem120.offset, main_#t~post94, main_#t~mem95.base, main_#t~mem95.offset, main_#t~mem96, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem126, main_#t~post127, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129.base, main_#t~mem129.offset, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131.base, main_#t~mem131.offset, main_#t~mem134, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133, main_#t~ite137, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem140.base, main_#t~mem140.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~post7, main_#t~mem142, main_#t~mem143, main_#t~mem141.base, main_#t~mem141.offset, main_#t~ite145.base, main_#t~ite145.offset, main_#t~mem144.base, main_#t~mem144.offset, main_#t~mem148.base, main_#t~mem148.offset, main_#t~mem149.base, main_#t~mem149.offset, main_#t~short150, main_#t~mem151.base, main_#t~mem151.offset, main_#t~mem152.base, main_#t~mem152.offset, main_#t~mem153.base, main_#t~mem153.offset, main_#t~mem154.base, main_#t~mem154.offset, main_#t~mem155.base, main_#t~mem155.offset, main_#t~mem156.base, main_#t~mem156.offset, main_#t~mem157.base, main_#t~mem157.offset, main_#t~mem158.base, main_#t~mem158.offset, main_#t~mem159, main_#t~mem160.base, main_#t~mem160.offset, main_#t~mem161.base, main_#t~mem161.offset, main_#t~mem162.base, main_#t~mem162.offset, main_#t~mem163, main_#t~mem164.base, main_#t~mem164.offset, main_#t~mem165.base, main_#t~mem165.offset, main_#t~mem166.base, main_#t~mem166.offset, main_#t~mem167.base, main_#t~mem167.offset, main_#t~mem168.base, main_#t~mem168.offset, main_#t~mem169, main_#t~mem170.base, main_#t~mem170.offset, main_#t~mem173, main_#t~mem171.base, main_#t~mem171.offset, main_#t~mem172, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176, main_#t~post177, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181.base, main_#t~mem181.offset, main_#t~mem182.base, main_#t~mem182.offset, main_#t~mem183.base, main_#t~mem183.offset, main_#t~mem184.base, main_#t~mem184.offset, main_#t~mem185.base, main_#t~mem185.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem186.base, main_#t~mem186.offset, main_#t~mem187, main_#t~post188, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~ite147.base, main_#t~ite147.offset, main_#t~mem146.base, main_#t~mem146.offset, main_~i~0, main_~user~0.base, main_~user~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;havoc main_~i~0;havoc main_~user~0.base, main_~user~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;main_~i~0 := 0; 391#L750-3 [2021-11-07 08:08:30,796 INFO L793 eck$LassoCheckResult]: Loop: 391#L750-3 assume !!(main_~i~0 < 10);call main_#t~malloc8.base, main_#t~malloc8.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc8.base, main_#t~malloc8.offset;havoc main_#t~malloc8.base, main_#t~malloc8.offset; 429#L752 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 430#L752-2 call write~int(main_~i~0, main_~user~0.base, main_~user~0.offset, 4);call write~int(main_~i~0 * main_~i~0, main_~user~0.base, 4 + main_~user~0.offset, 4); 432#L757-124 havoc main_~_ha_hashv~0; 431#L757-49 goto; 416#L757-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 316#L757-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 317#L757-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch21 := 11 == main_~_hj_k~0; 375#L757-10 assume main_#t~switch21;call main_#t~mem22 := read~int(main_~_hj_key~0.base, 10 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 16777216 * (main_#t~mem22 % 256);havoc main_#t~mem22; 455#L757-12 main_#t~switch21 := main_#t~switch21 || 10 == main_~_hj_k~0; 360#L757-13 assume main_#t~switch21;call main_#t~mem23 := read~int(main_~_hj_key~0.base, 9 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 65536 * (main_#t~mem23 % 256);havoc main_#t~mem23; 314#L757-15 main_#t~switch21 := main_#t~switch21 || 9 == main_~_hj_k~0; 315#L757-16 assume main_#t~switch21;call main_#t~mem24 := read~int(main_~_hj_key~0.base, 8 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 256 * (main_#t~mem24 % 256);havoc main_#t~mem24; 448#L757-18 main_#t~switch21 := main_#t~switch21 || 8 == main_~_hj_k~0; 434#L757-19 assume main_#t~switch21;call main_#t~mem25 := read~int(main_~_hj_key~0.base, 7 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 16777216 * (main_#t~mem25 % 256);havoc main_#t~mem25; 348#L757-21 main_#t~switch21 := main_#t~switch21 || 7 == main_~_hj_k~0; 349#L757-22 assume !main_#t~switch21; 415#L757-24 main_#t~switch21 := main_#t~switch21 || 6 == main_~_hj_k~0; 379#L757-25 assume main_#t~switch21;call main_#t~mem27 := read~int(main_~_hj_key~0.base, 5 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 256 * (main_#t~mem27 % 256);havoc main_#t~mem27; 380#L757-27 main_#t~switch21 := main_#t~switch21 || 5 == main_~_hj_k~0; 454#L757-28 assume main_#t~switch21;call main_#t~mem28 := read~int(main_~_hj_key~0.base, 4 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + main_#t~mem28 % 256;havoc main_#t~mem28; 452#L757-30 main_#t~switch21 := main_#t~switch21 || 4 == main_~_hj_k~0; 451#L757-31 assume main_#t~switch21;call main_#t~mem29 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem29 % 256);havoc main_#t~mem29; 329#L757-33 main_#t~switch21 := main_#t~switch21 || 3 == main_~_hj_k~0; 330#L757-34 assume main_#t~switch21;call main_#t~mem30 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem30 % 256);havoc main_#t~mem30; 411#L757-36 main_#t~switch21 := main_#t~switch21 || 2 == main_~_hj_k~0; 394#L757-37 assume main_#t~switch21;call main_#t~mem31 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem31 % 256);havoc main_#t~mem31; 395#L757-39 main_#t~switch21 := main_#t~switch21 || 1 == main_~_hj_k~0; 352#L757-40 assume main_#t~switch21;call main_#t~mem32 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem32 % 256;havoc main_#t~mem32; 335#L757-42 havoc main_#t~switch21; 336#L757-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 389#L757-44 goto; 439#L757-46 goto; 440#L757-48 goto; 385#L757-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 386#L757-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem50.base, main_#t~mem50.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem50.base, main_#t~mem50.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem50.base, main_#t~mem50.offset; 443#L757-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem51.base, main_#t~mem51.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem52.base, main_#t~mem52.offset := read~$Pointer$(main_#t~mem51.base, 16 + main_#t~mem51.offset, 4);call main_#t~mem53.base, main_#t~mem53.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem54 := read~int(main_#t~mem53.base, 20 + main_#t~mem53.offset, 4);call write~$Pointer$(main_#t~mem52.base, main_#t~mem52.offset - main_#t~mem54, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem51.base, main_#t~mem51.offset;havoc main_#t~mem52.base, main_#t~mem52.offset;havoc main_#t~mem53.base, main_#t~mem53.offset;havoc main_#t~mem54;call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_#t~mem55.base, 16 + main_#t~mem55.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem56.base, 8 + main_#t~mem56.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset;havoc main_#t~mem56.base, main_#t~mem56.offset;call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem57.base, 16 + main_#t~mem57.offset, 4);havoc main_#t~mem57.base, main_#t~mem57.offset; 444#L757-66 goto; 353#L757-120 havoc main_~_ha_bkt~0;call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 12 + main_#t~mem58.offset, 4);main_#t~post60 := main_#t~mem59;call write~int(1 + main_#t~post60, main_#t~mem58.base, 12 + main_#t~mem58.offset, 4);havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;havoc main_#t~post60; 413#L757-71 call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem62 := read~int(main_#t~mem61.base, 4 + main_#t~mem61.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem62 - 1);havoc main_#t~mem61.base, main_#t~mem61.offset;havoc main_#t~mem62; 414#L757-70 goto; 426#L757-118 call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64.base, main_#t~mem64.offset := read~$Pointer$(main_#t~mem63.base, main_#t~mem63.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem64.base, main_#t~mem64.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64.base, main_#t~mem64.offset;call main_#t~mem65 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post66 := main_#t~mem65;call write~int(1 + main_#t~post66, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem65;havoc main_#t~post66;call main_#t~mem67.base, main_#t~mem67.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem67.base, main_#t~mem67.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem67.base, main_#t~mem67.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 433#L757-73 assume main_#t~mem68.base != 0 || main_#t~mem68.offset != 0;havoc main_#t~mem68.base, main_#t~mem68.offset;call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem69.base, 12 + main_#t~mem69.offset, 4);havoc main_#t~mem69.base, main_#t~mem69.offset; 369#L757-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem71 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem70 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short74 := main_#t~mem71 % 4294967296 >= 10 * (1 + main_#t~mem70) % 4294967296; 370#L757-76 assume main_#t~short74;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem73 := read~int(main_#t~mem72.base, 36 + main_#t~mem72.offset, 4);main_#t~short74 := 0 == main_#t~mem73 % 4294967296; 446#L757-78 assume !main_#t~short74;havoc main_#t~mem71;havoc main_#t~mem70;havoc main_#t~mem72.base, main_#t~mem72.offset;havoc main_#t~mem73;havoc main_#t~short74; 356#L757-117 goto; 357#L757-119 goto; 364#L757-121 goto; 365#L757-123 goto; 403#L750-2 main_#t~post7 := main_~i~0;main_~i~0 := 1 + main_#t~post7;havoc main_#t~post7; 391#L750-3 [2021-11-07 08:08:30,797 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:08:30,797 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2021-11-07 08:08:30,798 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:08:30,798 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1948089691] [2021-11-07 08:08:30,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:08:30,798 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:08:30,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:08:30,817 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:08:30,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:08:30,842 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:08:30,843 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:08:30,844 INFO L85 PathProgramCache]: Analyzing trace with hash 155189657, now seen corresponding path program 1 times [2021-11-07 08:08:30,844 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:08:30,844 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1318457421] [2021-11-07 08:08:30,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:08:30,845 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:08:30,872 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 08:08:30,873 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2035527653] [2021-11-07 08:08:30,873 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:08:30,873 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:08:30,874 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:08:30,882 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:08:30,905 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-11-07 08:08:31,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:08:31,159 INFO L263 TraceCheckSpWp]: Trace formula consists of 293 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-07 08:08:31,163 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 08:08:31,427 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:08:31,428 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:08:31,429 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1318457421] [2021-11-07 08:08:31,429 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-07 08:08:31,429 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2035527653] [2021-11-07 08:08:31,430 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2035527653] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 08:08:31,430 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 08:08:31,431 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-07 08:08:31,431 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1676667992] [2021-11-07 08:08:31,433 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:08:31,433 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:08:31,434 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-07 08:08:31,434 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-07 08:08:31,435 INFO L87 Difference]: Start difference. First operand 148 states and 197 transitions. cyclomatic complexity: 53 Second operand has 3 states, 3 states have (on average 17.0) internal successors, (51), 3 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:08:31,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:08:31,605 INFO L93 Difference]: Finished difference Result 169 states and 218 transitions. [2021-11-07 08:08:31,611 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-07 08:08:31,611 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 169 states and 218 transitions. [2021-11-07 08:08:31,614 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 159 [2021-11-07 08:08:31,618 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 169 states to 169 states and 218 transitions. [2021-11-07 08:08:31,621 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 169 [2021-11-07 08:08:31,623 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 169 [2021-11-07 08:08:31,624 INFO L73 IsDeterministic]: Start isDeterministic. Operand 169 states and 218 transitions. [2021-11-07 08:08:31,626 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:08:31,628 INFO L681 BuchiCegarLoop]: Abstraction has 169 states and 218 transitions. [2021-11-07 08:08:31,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states and 218 transitions. [2021-11-07 08:08:31,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 168. [2021-11-07 08:08:31,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 168 states, 164 states have (on average 1.2865853658536586) internal successors, (211), 163 states have internal predecessors, (211), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:08:31,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 217 transitions. [2021-11-07 08:08:31,644 INFO L704 BuchiCegarLoop]: Abstraction has 168 states and 217 transitions. [2021-11-07 08:08:31,644 INFO L587 BuchiCegarLoop]: Abstraction has 168 states and 217 transitions. [2021-11-07 08:08:31,644 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-11-07 08:08:31,645 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 168 states and 217 transitions. [2021-11-07 08:08:31,646 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 158 [2021-11-07 08:08:31,647 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:08:31,647 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:08:31,651 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:08:31,651 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 08:08:31,651 INFO L791 eck$LassoCheckResult]: Stem: 935#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 864#L-1 havoc main_#res;havoc main_#t~malloc8.base, main_#t~malloc8.offset, main_#t~mem10, main_#t~mem9, main_#t~mem11, main_#t~mem12, main_#t~mem14, main_#t~mem13, main_#t~mem15, main_#t~mem16, main_#t~mem18, main_#t~mem17, main_#t~mem19, main_#t~mem20, main_#t~switch21, main_#t~mem22, main_#t~mem23, main_#t~mem24, main_#t~mem25, main_#t~mem26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc33.base, main_#t~malloc33.offset, main_#t~mem34.base, main_#t~mem34.offset, main_#t~mem35.base, main_#t~mem35.offset, main_#t~memset~res36.base, main_#t~memset~res36.offset, main_#t~mem37.base, main_#t~mem37.offset, main_#t~mem38.base, main_#t~mem38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~mem41.base, main_#t~mem41.offset, main_#t~malloc42.base, main_#t~malloc42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~mem47.base, main_#t~mem47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~memset~res49.base, main_#t~memset~res49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~mem54, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~post60, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64.base, main_#t~mem64.offset, main_#t~mem65, main_#t~post66, main_#t~mem67.base, main_#t~mem67.offset, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem71, main_#t~mem70, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73, main_#t~short74, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76, main_#t~malloc77.base, main_#t~malloc77.offset, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79.base, main_#t~mem79.offset, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~memset~res82.base, main_#t~memset~res82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem87, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem91, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem90, main_#t~ite92, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem97.base, main_#t~mem97.offset, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem99.base, main_#t~mem99.offset, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem103, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105, main_#t~pre106, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem108, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~post111, main_#t~mem115, main_#t~mem113, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem114, main_#t~mem116, main_#t~post117, main_#t~mem118.base, main_#t~mem118.offset, main_#t~mem119.base, main_#t~mem119.offset, main_#t~mem120.base, main_#t~mem120.offset, main_#t~post94, main_#t~mem95.base, main_#t~mem95.offset, main_#t~mem96, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem126, main_#t~post127, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129.base, main_#t~mem129.offset, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131.base, main_#t~mem131.offset, main_#t~mem134, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133, main_#t~ite137, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem140.base, main_#t~mem140.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~post7, main_#t~mem142, main_#t~mem143, main_#t~mem141.base, main_#t~mem141.offset, main_#t~ite145.base, main_#t~ite145.offset, main_#t~mem144.base, main_#t~mem144.offset, main_#t~mem148.base, main_#t~mem148.offset, main_#t~mem149.base, main_#t~mem149.offset, main_#t~short150, main_#t~mem151.base, main_#t~mem151.offset, main_#t~mem152.base, main_#t~mem152.offset, main_#t~mem153.base, main_#t~mem153.offset, main_#t~mem154.base, main_#t~mem154.offset, main_#t~mem155.base, main_#t~mem155.offset, main_#t~mem156.base, main_#t~mem156.offset, main_#t~mem157.base, main_#t~mem157.offset, main_#t~mem158.base, main_#t~mem158.offset, main_#t~mem159, main_#t~mem160.base, main_#t~mem160.offset, main_#t~mem161.base, main_#t~mem161.offset, main_#t~mem162.base, main_#t~mem162.offset, main_#t~mem163, main_#t~mem164.base, main_#t~mem164.offset, main_#t~mem165.base, main_#t~mem165.offset, main_#t~mem166.base, main_#t~mem166.offset, main_#t~mem167.base, main_#t~mem167.offset, main_#t~mem168.base, main_#t~mem168.offset, main_#t~mem169, main_#t~mem170.base, main_#t~mem170.offset, main_#t~mem173, main_#t~mem171.base, main_#t~mem171.offset, main_#t~mem172, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176, main_#t~post177, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181.base, main_#t~mem181.offset, main_#t~mem182.base, main_#t~mem182.offset, main_#t~mem183.base, main_#t~mem183.offset, main_#t~mem184.base, main_#t~mem184.offset, main_#t~mem185.base, main_#t~mem185.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem186.base, main_#t~mem186.offset, main_#t~mem187, main_#t~post188, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~ite147.base, main_#t~ite147.offset, main_#t~mem146.base, main_#t~mem146.offset, main_~i~0, main_~user~0.base, main_~user~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;havoc main_~i~0;havoc main_~user~0.base, main_~user~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;main_~i~0 := 0; 865#L750-3 [2021-11-07 08:08:31,652 INFO L793 eck$LassoCheckResult]: Loop: 865#L750-3 assume !!(main_~i~0 < 10);call main_#t~malloc8.base, main_#t~malloc8.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc8.base, main_#t~malloc8.offset;havoc main_#t~malloc8.base, main_#t~malloc8.offset; 903#L752 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 904#L752-2 call write~int(main_~i~0, main_~user~0.base, main_~user~0.offset, 4);call write~int(main_~i~0 * main_~i~0, main_~user~0.base, 4 + main_~user~0.offset, 4); 906#L757-124 havoc main_~_ha_hashv~0; 905#L757-49 goto; 890#L757-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 789#L757-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 790#L757-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch21 := 11 == main_~_hj_k~0; 849#L757-10 assume main_#t~switch21;call main_#t~mem22 := read~int(main_~_hj_key~0.base, 10 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 16777216 * (main_#t~mem22 % 256);havoc main_#t~mem22; 930#L757-12 main_#t~switch21 := main_#t~switch21 || 10 == main_~_hj_k~0; 833#L757-13 assume main_#t~switch21;call main_#t~mem23 := read~int(main_~_hj_key~0.base, 9 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 65536 * (main_#t~mem23 % 256);havoc main_#t~mem23; 834#L757-15 main_#t~switch21 := main_#t~switch21 || 9 == main_~_hj_k~0; 920#L757-16 assume main_#t~switch21;call main_#t~mem24 := read~int(main_~_hj_key~0.base, 8 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 256 * (main_#t~mem24 % 256);havoc main_#t~mem24; 921#L757-18 main_#t~switch21 := main_#t~switch21 || 8 == main_~_hj_k~0; 908#L757-19 assume main_#t~switch21;call main_#t~mem25 := read~int(main_~_hj_key~0.base, 7 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 16777216 * (main_#t~mem25 % 256);havoc main_#t~mem25; 821#L757-21 main_#t~switch21 := main_#t~switch21 || 7 == main_~_hj_k~0; 822#L757-22 assume main_#t~switch21;call main_#t~mem26 := read~int(main_~_hj_key~0.base, 6 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 65536 * (main_#t~mem26 % 256);havoc main_#t~mem26; 887#L757-24 main_#t~switch21 := main_#t~switch21 || 6 == main_~_hj_k~0; 853#L757-25 assume main_#t~switch21;call main_#t~mem27 := read~int(main_~_hj_key~0.base, 5 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 256 * (main_#t~mem27 % 256);havoc main_#t~mem27; 854#L757-27 main_#t~switch21 := main_#t~switch21 || 5 == main_~_hj_k~0; 929#L757-28 assume main_#t~switch21;call main_#t~mem28 := read~int(main_~_hj_key~0.base, 4 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + main_#t~mem28 % 256;havoc main_#t~mem28; 927#L757-30 main_#t~switch21 := main_#t~switch21 || 4 == main_~_hj_k~0; 926#L757-31 assume main_#t~switch21;call main_#t~mem29 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem29 % 256);havoc main_#t~mem29; 802#L757-33 main_#t~switch21 := main_#t~switch21 || 3 == main_~_hj_k~0; 803#L757-34 assume main_#t~switch21;call main_#t~mem30 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem30 % 256);havoc main_#t~mem30; 885#L757-36 main_#t~switch21 := main_#t~switch21 || 2 == main_~_hj_k~0; 868#L757-37 assume main_#t~switch21;call main_#t~mem31 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem31 % 256);havoc main_#t~mem31; 869#L757-39 main_#t~switch21 := main_#t~switch21 || 1 == main_~_hj_k~0; 825#L757-40 assume main_#t~switch21;call main_#t~mem32 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem32 % 256;havoc main_#t~mem32; 808#L757-42 havoc main_#t~switch21; 809#L757-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 861#L757-44 goto; 913#L757-46 goto; 914#L757-48 goto; 862#L757-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 863#L757-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem50.base, main_#t~mem50.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem50.base, main_#t~mem50.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem50.base, main_#t~mem50.offset; 917#L757-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem51.base, main_#t~mem51.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem52.base, main_#t~mem52.offset := read~$Pointer$(main_#t~mem51.base, 16 + main_#t~mem51.offset, 4);call main_#t~mem53.base, main_#t~mem53.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem54 := read~int(main_#t~mem53.base, 20 + main_#t~mem53.offset, 4);call write~$Pointer$(main_#t~mem52.base, main_#t~mem52.offset - main_#t~mem54, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem51.base, main_#t~mem51.offset;havoc main_#t~mem52.base, main_#t~mem52.offset;havoc main_#t~mem53.base, main_#t~mem53.offset;havoc main_#t~mem54;call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_#t~mem55.base, 16 + main_#t~mem55.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem56.base, 8 + main_#t~mem56.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset;havoc main_#t~mem56.base, main_#t~mem56.offset;call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem57.base, 16 + main_#t~mem57.offset, 4);havoc main_#t~mem57.base, main_#t~mem57.offset; 918#L757-66 goto; 827#L757-120 havoc main_~_ha_bkt~0;call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 12 + main_#t~mem58.offset, 4);main_#t~post60 := main_#t~mem59;call write~int(1 + main_#t~post60, main_#t~mem58.base, 12 + main_#t~mem58.offset, 4);havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;havoc main_#t~post60; 888#L757-71 call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem62 := read~int(main_#t~mem61.base, 4 + main_#t~mem61.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem62 - 1);havoc main_#t~mem61.base, main_#t~mem61.offset;havoc main_#t~mem62; 889#L757-70 goto; 902#L757-118 call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64.base, main_#t~mem64.offset := read~$Pointer$(main_#t~mem63.base, main_#t~mem63.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem64.base, main_#t~mem64.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64.base, main_#t~mem64.offset;call main_#t~mem65 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post66 := main_#t~mem65;call write~int(1 + main_#t~post66, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem65;havoc main_#t~post66;call main_#t~mem67.base, main_#t~mem67.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem67.base, main_#t~mem67.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem67.base, main_#t~mem67.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 907#L757-73 assume main_#t~mem68.base != 0 || main_#t~mem68.offset != 0;havoc main_#t~mem68.base, main_#t~mem68.offset;call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem69.base, 12 + main_#t~mem69.offset, 4);havoc main_#t~mem69.base, main_#t~mem69.offset; 845#L757-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem71 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem70 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short74 := main_#t~mem71 % 4294967296 >= 10 * (1 + main_#t~mem70) % 4294967296; 846#L757-76 assume main_#t~short74;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem73 := read~int(main_#t~mem72.base, 36 + main_#t~mem72.offset, 4);main_#t~short74 := 0 == main_#t~mem73 % 4294967296; 922#L757-78 assume !main_#t~short74;havoc main_#t~mem71;havoc main_#t~mem70;havoc main_#t~mem72.base, main_#t~mem72.offset;havoc main_#t~mem73;havoc main_#t~short74; 829#L757-117 goto; 830#L757-119 goto; 841#L757-121 goto; 842#L757-123 goto; 879#L750-2 main_#t~post7 := main_~i~0;main_~i~0 := 1 + main_#t~post7;havoc main_#t~post7; 865#L750-3 [2021-11-07 08:08:31,653 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:08:31,653 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2021-11-07 08:08:31,653 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:08:31,653 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1499925909] [2021-11-07 08:08:31,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:08:31,655 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:08:31,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:08:31,710 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:08:31,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:08:31,753 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:08:31,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:08:31,754 INFO L85 PathProgramCache]: Analyzing trace with hash 999195159, now seen corresponding path program 1 times [2021-11-07 08:08:31,755 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:08:31,755 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [297221429] [2021-11-07 08:08:31,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:08:31,756 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:08:31,770 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 08:08:31,771 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1626420503] [2021-11-07 08:08:31,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:08:31,772 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:08:31,772 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:08:31,811 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:08:31,838 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-11-07 08:08:32,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 08:08:32,017 INFO L263 TraceCheckSpWp]: Trace formula consists of 299 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-07 08:08:32,022 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 08:08:32,208 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 08:08:32,208 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 08:08:32,209 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [297221429] [2021-11-07 08:08:32,209 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-07 08:08:32,209 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1626420503] [2021-11-07 08:08:32,210 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1626420503] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 08:08:32,210 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 08:08:32,210 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-07 08:08:32,211 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [838283116] [2021-11-07 08:08:32,211 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 08:08:32,212 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 08:08:32,212 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-07 08:08:32,213 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-07 08:08:32,213 INFO L87 Difference]: Start difference. First operand 168 states and 217 transitions. cyclomatic complexity: 53 Second operand has 4 states, 4 states have (on average 12.75) internal successors, (51), 4 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 08:08:32,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 08:08:32,335 INFO L93 Difference]: Finished difference Result 215 states and 279 transitions. [2021-11-07 08:08:32,335 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-07 08:08:32,336 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 215 states and 279 transitions. [2021-11-07 08:08:32,339 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 195 [2021-11-07 08:08:32,343 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 215 states to 215 states and 279 transitions. [2021-11-07 08:08:32,343 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 215 [2021-11-07 08:08:32,344 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 215 [2021-11-07 08:08:32,344 INFO L73 IsDeterministic]: Start isDeterministic. Operand 215 states and 279 transitions. [2021-11-07 08:08:32,346 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 08:08:32,346 INFO L681 BuchiCegarLoop]: Abstraction has 215 states and 279 transitions. [2021-11-07 08:08:32,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 215 states and 279 transitions. [2021-11-07 08:08:32,356 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 215 to 154. [2021-11-07 08:08:32,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 154 states, 150 states have (on average 1.2666666666666666) internal successors, (190), 149 states have internal predecessors, (190), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 08:08:32,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 196 transitions. [2021-11-07 08:08:32,361 INFO L704 BuchiCegarLoop]: Abstraction has 154 states and 196 transitions. [2021-11-07 08:08:32,361 INFO L587 BuchiCegarLoop]: Abstraction has 154 states and 196 transitions. [2021-11-07 08:08:32,361 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-11-07 08:08:32,362 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 154 states and 196 transitions. [2021-11-07 08:08:32,363 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 144 [2021-11-07 08:08:32,364 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 08:08:32,364 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 08:08:32,365 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 08:08:32,367 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 08:08:32,367 INFO L791 eck$LassoCheckResult]: Stem: 1473#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 1405#L-1 havoc main_#res;havoc main_#t~malloc8.base, main_#t~malloc8.offset, main_#t~mem10, main_#t~mem9, main_#t~mem11, main_#t~mem12, main_#t~mem14, main_#t~mem13, main_#t~mem15, main_#t~mem16, main_#t~mem18, main_#t~mem17, main_#t~mem19, main_#t~mem20, main_#t~switch21, main_#t~mem22, main_#t~mem23, main_#t~mem24, main_#t~mem25, main_#t~mem26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc33.base, main_#t~malloc33.offset, main_#t~mem34.base, main_#t~mem34.offset, main_#t~mem35.base, main_#t~mem35.offset, main_#t~memset~res36.base, main_#t~memset~res36.offset, main_#t~mem37.base, main_#t~mem37.offset, main_#t~mem38.base, main_#t~mem38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~mem41.base, main_#t~mem41.offset, main_#t~malloc42.base, main_#t~malloc42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~mem47.base, main_#t~mem47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~memset~res49.base, main_#t~memset~res49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~mem54, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~post60, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64.base, main_#t~mem64.offset, main_#t~mem65, main_#t~post66, main_#t~mem67.base, main_#t~mem67.offset, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem71, main_#t~mem70, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73, main_#t~short74, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76, main_#t~malloc77.base, main_#t~malloc77.offset, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79.base, main_#t~mem79.offset, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~memset~res82.base, main_#t~memset~res82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem87, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem91, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem90, main_#t~ite92, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem97.base, main_#t~mem97.offset, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem99.base, main_#t~mem99.offset, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem103, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105, main_#t~pre106, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem108, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~post111, main_#t~mem115, main_#t~mem113, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem114, main_#t~mem116, main_#t~post117, main_#t~mem118.base, main_#t~mem118.offset, main_#t~mem119.base, main_#t~mem119.offset, main_#t~mem120.base, main_#t~mem120.offset, main_#t~post94, main_#t~mem95.base, main_#t~mem95.offset, main_#t~mem96, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem126, main_#t~post127, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129.base, main_#t~mem129.offset, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131.base, main_#t~mem131.offset, main_#t~mem134, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133, main_#t~ite137, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem140.base, main_#t~mem140.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~post7, main_#t~mem142, main_#t~mem143, main_#t~mem141.base, main_#t~mem141.offset, main_#t~ite145.base, main_#t~ite145.offset, main_#t~mem144.base, main_#t~mem144.offset, main_#t~mem148.base, main_#t~mem148.offset, main_#t~mem149.base, main_#t~mem149.offset, main_#t~short150, main_#t~mem151.base, main_#t~mem151.offset, main_#t~mem152.base, main_#t~mem152.offset, main_#t~mem153.base, main_#t~mem153.offset, main_#t~mem154.base, main_#t~mem154.offset, main_#t~mem155.base, main_#t~mem155.offset, main_#t~mem156.base, main_#t~mem156.offset, main_#t~mem157.base, main_#t~mem157.offset, main_#t~mem158.base, main_#t~mem158.offset, main_#t~mem159, main_#t~mem160.base, main_#t~mem160.offset, main_#t~mem161.base, main_#t~mem161.offset, main_#t~mem162.base, main_#t~mem162.offset, main_#t~mem163, main_#t~mem164.base, main_#t~mem164.offset, main_#t~mem165.base, main_#t~mem165.offset, main_#t~mem166.base, main_#t~mem166.offset, main_#t~mem167.base, main_#t~mem167.offset, main_#t~mem168.base, main_#t~mem168.offset, main_#t~mem169, main_#t~mem170.base, main_#t~mem170.offset, main_#t~mem173, main_#t~mem171.base, main_#t~mem171.offset, main_#t~mem172, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175.base, main_#t~mem175.offset, main_#t~mem176, main_#t~post177, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181.base, main_#t~mem181.offset, main_#t~mem182.base, main_#t~mem182.offset, main_#t~mem183.base, main_#t~mem183.offset, main_#t~mem184.base, main_#t~mem184.offset, main_#t~mem185.base, main_#t~mem185.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem186.base, main_#t~mem186.offset, main_#t~mem187, main_#t~post188, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~ite147.base, main_#t~ite147.offset, main_#t~mem146.base, main_#t~mem146.offset, main_~i~0, main_~user~0.base, main_~user~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;havoc main_~i~0;havoc main_~user~0.base, main_~user~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;main_~i~0 := 0; 1406#L750-3 [2021-11-07 08:08:32,368 INFO L793 eck$LassoCheckResult]: Loop: 1406#L750-3 assume !!(main_~i~0 < 10);call main_#t~malloc8.base, main_#t~malloc8.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc8.base, main_#t~malloc8.offset;havoc main_#t~malloc8.base, main_#t~malloc8.offset; 1444#L752 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 1445#L752-2 call write~int(main_~i~0, main_~user~0.base, main_~user~0.offset, 4);call write~int(main_~i~0 * main_~i~0, main_~user~0.base, 4 + main_~user~0.offset, 4); 1447#L757-124 havoc main_~_ha_hashv~0; 1446#L757-49 goto; 1431#L757-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 1331#L757-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 1332#L757-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch21 := 11 == main_~_hj_k~0; 1390#L757-10 assume !main_#t~switch21; 1471#L757-12 main_#t~switch21 := main_#t~switch21 || 10 == main_~_hj_k~0; 1375#L757-13 assume !main_#t~switch21; 1329#L757-15 main_#t~switch21 := main_#t~switch21 || 9 == main_~_hj_k~0; 1330#L757-16 assume !main_#t~switch21; 1461#L757-18 main_#t~switch21 := main_#t~switch21 || 8 == main_~_hj_k~0; 1449#L757-19 assume !main_#t~switch21; 1363#L757-21 main_#t~switch21 := main_#t~switch21 || 7 == main_~_hj_k~0; 1364#L757-22 assume !main_#t~switch21; 1428#L757-24 main_#t~switch21 := main_#t~switch21 || 6 == main_~_hj_k~0; 1394#L757-25 assume !main_#t~switch21; 1395#L757-27 main_#t~switch21 := main_#t~switch21 || 5 == main_~_hj_k~0; 1470#L757-28 assume !main_#t~switch21; 1468#L757-30 main_#t~switch21 := main_#t~switch21 || 4 == main_~_hj_k~0; 1466#L757-31 assume main_#t~switch21;call main_#t~mem29 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem29 % 256);havoc main_#t~mem29; 1344#L757-33 main_#t~switch21 := main_#t~switch21 || 3 == main_~_hj_k~0; 1345#L757-34 assume main_#t~switch21;call main_#t~mem30 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem30 % 256);havoc main_#t~mem30; 1426#L757-36 main_#t~switch21 := main_#t~switch21 || 2 == main_~_hj_k~0; 1409#L757-37 assume main_#t~switch21;call main_#t~mem31 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem31 % 256);havoc main_#t~mem31; 1410#L757-39 main_#t~switch21 := main_#t~switch21 || 1 == main_~_hj_k~0; 1367#L757-40 assume main_#t~switch21;call main_#t~mem32 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem32 % 256;havoc main_#t~mem32; 1350#L757-42 havoc main_#t~switch21; 1351#L757-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 1400#L757-44 goto; 1454#L757-46 goto; 1455#L757-48 goto; 1401#L757-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 1402#L757-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem50.base, main_#t~mem50.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem50.base, main_#t~mem50.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem50.base, main_#t~mem50.offset; 1458#L757-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem51.base, main_#t~mem51.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem52.base, main_#t~mem52.offset := read~$Pointer$(main_#t~mem51.base, 16 + main_#t~mem51.offset, 4);call main_#t~mem53.base, main_#t~mem53.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem54 := read~int(main_#t~mem53.base, 20 + main_#t~mem53.offset, 4);call write~$Pointer$(main_#t~mem52.base, main_#t~mem52.offset - main_#t~mem54, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem51.base, main_#t~mem51.offset;havoc main_#t~mem52.base, main_#t~mem52.offset;havoc main_#t~mem53.base, main_#t~mem53.offset;havoc main_#t~mem54;call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_#t~mem55.base, 16 + main_#t~mem55.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem56.base, 8 + main_#t~mem56.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset;havoc main_#t~mem56.base, main_#t~mem56.offset;call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem57.base, 16 + main_#t~mem57.offset, 4);havoc main_#t~mem57.base, main_#t~mem57.offset; 1459#L757-66 goto; 1369#L757-120 havoc main_~_ha_bkt~0;call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 12 + main_#t~mem58.offset, 4);main_#t~post60 := main_#t~mem59;call write~int(1 + main_#t~post60, main_#t~mem58.base, 12 + main_#t~mem58.offset, 4);havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;havoc main_#t~post60; 1429#L757-71 call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem62 := read~int(main_#t~mem61.base, 4 + main_#t~mem61.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem62 - 1);havoc main_#t~mem61.base, main_#t~mem61.offset;havoc main_#t~mem62; 1430#L757-70 goto; 1443#L757-118 call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64.base, main_#t~mem64.offset := read~$Pointer$(main_#t~mem63.base, main_#t~mem63.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem64.base, main_#t~mem64.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64.base, main_#t~mem64.offset;call main_#t~mem65 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post66 := main_#t~mem65;call write~int(1 + main_#t~post66, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem65;havoc main_#t~post66;call main_#t~mem67.base, main_#t~mem67.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem67.base, main_#t~mem67.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem67.base, main_#t~mem67.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 1448#L757-73 assume main_#t~mem68.base != 0 || main_#t~mem68.offset != 0;havoc main_#t~mem68.base, main_#t~mem68.offset;call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem69.base, 12 + main_#t~mem69.offset, 4);havoc main_#t~mem69.base, main_#t~mem69.offset; 1386#L757-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem71 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem70 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short74 := main_#t~mem71 % 4294967296 >= 10 * (1 + main_#t~mem70) % 4294967296; 1387#L757-76 assume main_#t~short74;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem73 := read~int(main_#t~mem72.base, 36 + main_#t~mem72.offset, 4);main_#t~short74 := 0 == main_#t~mem73 % 4294967296; 1462#L757-78 assume !main_#t~short74;havoc main_#t~mem71;havoc main_#t~mem70;havoc main_#t~mem72.base, main_#t~mem72.offset;havoc main_#t~mem73;havoc main_#t~short74; 1371#L757-117 goto; 1372#L757-119 goto; 1381#L757-121 goto; 1382#L757-123 goto; 1420#L750-2 main_#t~post7 := main_~i~0;main_~i~0 := 1 + main_#t~post7;havoc main_#t~post7; 1406#L750-3 [2021-11-07 08:08:32,369 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:08:32,369 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2021-11-07 08:08:32,370 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:08:32,371 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1062052628] [2021-11-07 08:08:32,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:08:32,371 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:08:32,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:08:32,401 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 08:08:32,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:08:32,426 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 08:08:32,427 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 08:08:32,428 INFO L85 PathProgramCache]: Analyzing trace with hash -875179227, now seen corresponding path program 1 times [2021-11-07 08:08:32,429 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 08:08:32,429 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1201306954] [2021-11-07 08:08:32,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:08:32,430 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 08:08:32,461 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 08:08:32,462 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1248706753] [2021-11-07 08:08:32,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 08:08:32,463 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 08:08:32,464 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 08:08:32,466 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 08:08:32,486 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_827f1c43-202e-4530-875a-8c1f814d36f2/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-11-07 08:08:34,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 08:08:34,749 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.