./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test8-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 47ea0209 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test8-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 7e63083161b3199c06a87ea66924e1f63d6865962e6a830baf344139b270d928 --- Real Ultimate output --- This is Ultimate 0.2.1-dev-47ea020 [2021-11-07 07:50:24,938 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-07 07:50:24,941 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-07 07:50:24,997 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-07 07:50:24,998 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-07 07:50:25,003 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-07 07:50:25,006 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-07 07:50:25,011 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-07 07:50:25,014 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-07 07:50:25,022 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-07 07:50:25,023 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-07 07:50:25,025 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-07 07:50:25,025 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-07 07:50:25,028 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-07 07:50:25,030 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-07 07:50:25,032 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-07 07:50:25,034 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-07 07:50:25,035 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-07 07:50:25,040 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-07 07:50:25,050 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-07 07:50:25,052 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-07 07:50:25,053 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-07 07:50:25,057 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-07 07:50:25,058 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-07 07:50:25,062 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-07 07:50:25,062 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-07 07:50:25,062 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-07 07:50:25,064 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-07 07:50:25,065 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-07 07:50:25,066 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-07 07:50:25,067 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-07 07:50:25,067 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-07 07:50:25,069 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-07 07:50:25,071 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-07 07:50:25,072 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-07 07:50:25,072 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-07 07:50:25,073 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-07 07:50:25,073 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-07 07:50:25,074 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-07 07:50:25,075 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-07 07:50:25,075 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-07 07:50:25,076 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-11-07 07:50:25,125 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-07 07:50:25,125 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-07 07:50:25,126 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-07 07:50:25,126 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-07 07:50:25,128 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-07 07:50:25,128 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-07 07:50:25,128 INFO L138 SettingsManager]: * Use SBE=true [2021-11-07 07:50:25,128 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-11-07 07:50:25,129 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-11-07 07:50:25,129 INFO L138 SettingsManager]: * Use old map elimination=false [2021-11-07 07:50:25,130 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-11-07 07:50:25,130 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-11-07 07:50:25,131 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-11-07 07:50:25,131 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-07 07:50:25,131 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-07 07:50:25,131 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-11-07 07:50:25,131 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-07 07:50:25,132 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-07 07:50:25,132 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-07 07:50:25,132 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-11-07 07:50:25,132 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-11-07 07:50:25,132 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-11-07 07:50:25,133 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-07 07:50:25,133 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-07 07:50:25,133 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-11-07 07:50:25,133 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-07 07:50:25,135 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-11-07 07:50:25,136 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-07 07:50:25,136 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-07 07:50:25,136 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-07 07:50:25,136 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-07 07:50:25,137 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-07 07:50:25,138 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-11-07 07:50:25,138 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 7e63083161b3199c06a87ea66924e1f63d6865962e6a830baf344139b270d928 [2021-11-07 07:50:25,446 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-07 07:50:25,472 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-07 07:50:25,475 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-07 07:50:25,476 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-07 07:50:25,477 INFO L275 PluginConnector]: CDTParser initialized [2021-11-07 07:50:25,478 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/../../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test8-1.i [2021-11-07 07:50:25,549 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/data/19729d220/6a2bac2aebfb4a4682dbc4633c59af4a/FLAG087bc408b [2021-11-07 07:50:26,144 INFO L306 CDTParser]: Found 1 translation units. [2021-11-07 07:50:26,149 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test8-1.i [2021-11-07 07:50:26,176 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/data/19729d220/6a2bac2aebfb4a4682dbc4633c59af4a/FLAG087bc408b [2021-11-07 07:50:26,549 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/data/19729d220/6a2bac2aebfb4a4682dbc4633c59af4a [2021-11-07 07:50:26,551 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-07 07:50:26,552 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-07 07:50:26,560 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-07 07:50:26,560 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-07 07:50:26,564 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-07 07:50:26,565 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.11 07:50:26" (1/1) ... [2021-11-07 07:50:26,567 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@67b4ff39 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:50:26, skipping insertion in model container [2021-11-07 07:50:26,567 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.11 07:50:26" (1/1) ... [2021-11-07 07:50:26,574 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-07 07:50:26,643 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-07 07:50:27,038 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test8-1.i[33021,33034] [2021-11-07 07:50:27,133 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test8-1.i[45234,45247] [2021-11-07 07:50:27,140 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-07 07:50:27,153 INFO L203 MainTranslator]: Completed pre-run [2021-11-07 07:50:27,207 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test8-1.i[33021,33034] [2021-11-07 07:50:27,316 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test8-1.i[45234,45247] [2021-11-07 07:50:27,321 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-07 07:50:27,393 INFO L208 MainTranslator]: Completed translation [2021-11-07 07:50:27,393 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:50:27 WrapperNode [2021-11-07 07:50:27,394 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-07 07:50:27,395 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-07 07:50:27,395 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-07 07:50:27,395 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-07 07:50:27,403 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:50:27" (1/1) ... [2021-11-07 07:50:27,461 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:50:27" (1/1) ... [2021-11-07 07:50:27,563 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-07 07:50:27,563 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-07 07:50:27,564 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-07 07:50:27,564 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-07 07:50:27,580 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:50:27" (1/1) ... [2021-11-07 07:50:27,580 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:50:27" (1/1) ... [2021-11-07 07:50:27,596 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:50:27" (1/1) ... [2021-11-07 07:50:27,596 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:50:27" (1/1) ... [2021-11-07 07:50:27,661 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:50:27" (1/1) ... [2021-11-07 07:50:27,677 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:50:27" (1/1) ... [2021-11-07 07:50:27,683 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:50:27" (1/1) ... [2021-11-07 07:50:27,693 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-07 07:50:27,694 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-07 07:50:27,695 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-07 07:50:27,695 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-07 07:50:27,696 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:50:27" (1/1) ... [2021-11-07 07:50:27,703 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-07 07:50:27,717 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 07:50:27,746 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-07 07:50:27,749 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-11-07 07:50:27,809 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-11-07 07:50:27,810 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-07 07:50:27,810 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2021-11-07 07:50:27,810 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2021-11-07 07:50:27,810 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-11-07 07:50:27,812 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-11-07 07:50:27,812 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-07 07:50:27,812 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2021-11-07 07:50:27,812 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-11-07 07:50:27,813 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-07 07:50:27,813 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-07 07:50:27,813 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-07 07:50:27,814 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-07 07:50:28,140 WARN L805 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-11-07 07:50:29,458 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-07 07:50:29,458 INFO L299 CfgBuilder]: Removed 130 assume(true) statements. [2021-11-07 07:50:29,460 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.11 07:50:29 BoogieIcfgContainer [2021-11-07 07:50:29,460 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-07 07:50:29,461 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-11-07 07:50:29,462 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-11-07 07:50:29,465 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-11-07 07:50:29,465 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 07:50:29,466 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 07.11 07:50:26" (1/3) ... [2021-11-07 07:50:29,467 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4486f64f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 07.11 07:50:29, skipping insertion in model container [2021-11-07 07:50:29,467 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 07:50:29,467 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.11 07:50:27" (2/3) ... [2021-11-07 07:50:29,467 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4486f64f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 07.11 07:50:29, skipping insertion in model container [2021-11-07 07:50:29,467 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-07 07:50:29,467 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.11 07:50:29" (3/3) ... [2021-11-07 07:50:29,469 INFO L389 chiAutomizerObserver]: Analyzing ICFG uthash_SFH_test8-1.i [2021-11-07 07:50:29,509 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-11-07 07:50:29,509 INFO L360 BuchiCegarLoop]: Hoare is false [2021-11-07 07:50:29,509 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-11-07 07:50:29,510 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-11-07 07:50:29,510 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-11-07 07:50:29,510 INFO L364 BuchiCegarLoop]: Difference is false [2021-11-07 07:50:29,510 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-11-07 07:50:29,510 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-11-07 07:50:29,532 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 245 states, 240 states have (on average 1.7541666666666667) internal successors, (421), 240 states have internal predecessors, (421), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 07:50:29,574 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 234 [2021-11-07 07:50:29,574 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 07:50:29,574 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 07:50:29,583 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 07:50:29,583 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 07:50:29,583 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-11-07 07:50:29,585 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 245 states, 240 states have (on average 1.7541666666666667) internal successors, (421), 240 states have internal predecessors, (421), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 07:50:29,598 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 234 [2021-11-07 07:50:29,598 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 07:50:29,598 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 07:50:29,599 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 07:50:29,599 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 07:50:29,606 INFO L791 eck$LassoCheckResult]: Stem: 239#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int~0 := 0; 165#L-1true havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem146.base, main_#t~mem146.offset, main_#t~mem147, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem151, main_#t~mem150, main_#t~mem152, main_#t~mem153, main_#t~mem155, main_#t~mem154, main_#t~mem156, main_#t~mem157, main_#t~mem159, main_#t~mem158, main_#t~mem160, main_#t~mem161, main_#t~switch162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_#t~mem172, main_#t~mem173, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181.base, main_#t~mem181.offset, main_#t~mem182.base, main_#t~mem182.offset, main_#t~mem183, main_#t~mem184, main_#t~mem185, main_#t~short186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~ret188, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190.base, main_#t~mem190.offset, main_#t~mem191.base, main_#t~mem191.offset, main_#t~mem192, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem193.base, main_#t~mem193.offset, main_#t~mem194.base, main_#t~mem194.offset, main_#t~short195, main_#t~mem196.base, main_#t~mem196.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~mem199.base, main_#t~mem199.offset, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202.base, main_#t~mem202.offset, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206.base, main_#t~mem206.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem218, main_#t~mem216.base, main_#t~mem216.offset, main_#t~mem217, main_#t~mem219.base, main_#t~mem219.offset, main_#t~mem220.base, main_#t~mem220.offset, main_#t~mem221, main_#t~post222, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225.base, main_#t~mem225.offset, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232, main_#t~post233, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem234.base, main_#t~mem234.offset, main_#t~mem235, main_#t~mem148, main_#t~mem149, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 74#L765-4true [2021-11-07 07:50:29,606 INFO L793 eck$LassoCheckResult]: Loop: 74#L765-4true call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 200#L765-1true assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 224#L767true assume main_~user~0.base == 0 && main_~user~0.offset == 0;assume false; 157#L767-2true call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 34#L772-124true assume !true; 131#L772-125true call main_#t~mem146.base, main_#t~mem146.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem147 := read~int(main_#t~mem146.base, 12 + main_#t~mem146.offset, 4);test_int_#in~a := (if main_#t~mem147 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem147 % 4294967296 % 4294967296 else main_#t~mem147 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post5, test_int_#t~switch6, test_int_~a;test_int_~a := test_int_#in~a;test_int_#t~post5 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post5;test_int_#t~switch6 := 0 == test_int_#t~post5; 111#L709true assume test_int_#t~switch6;__VERIFIER_assert_#in~cond := (if 1 == test_int_~a then 1 else 0);havoc __VERIFIER_assert_~cond;__VERIFIER_assert_~cond := __VERIFIER_assert_#in~cond; 156#L702true assume 0 == __VERIFIER_assert_~cond;assume false; 9#L708true havoc test_int_#t~post5;havoc test_int_#t~switch6; 199#L707true havoc main_#t~mem146.base, main_#t~mem146.offset;havoc main_#t~mem147; 176#L765-3true call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 74#L765-4true [2021-11-07 07:50:29,611 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 07:50:29,611 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2021-11-07 07:50:29,618 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 07:50:29,619 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [587929597] [2021-11-07 07:50:29,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:50:29,620 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 07:50:29,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 07:50:29,724 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 07:50:29,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 07:50:29,775 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 07:50:29,778 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 07:50:29,778 INFO L85 PathProgramCache]: Analyzing trace with hash -1589445803, now seen corresponding path program 1 times [2021-11-07 07:50:29,779 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 07:50:29,779 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2068666242] [2021-11-07 07:50:29,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:50:29,779 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 07:50:29,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 07:50:29,830 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 07:50:29,831 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 07:50:29,831 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2068666242] [2021-11-07 07:50:29,831 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2068666242] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 07:50:29,832 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 07:50:29,832 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-07 07:50:29,832 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1631185078] [2021-11-07 07:50:29,839 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 07:50:29,840 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 07:50:29,853 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-11-07 07:50:29,854 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-11-07 07:50:29,857 INFO L87 Difference]: Start difference. First operand has 245 states, 240 states have (on average 1.7541666666666667) internal successors, (421), 240 states have internal predecessors, (421), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 5.5) internal successors, (11), 2 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 07:50:29,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 07:50:29,901 INFO L93 Difference]: Finished difference Result 245 states and 330 transitions. [2021-11-07 07:50:29,901 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-11-07 07:50:29,903 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 245 states and 330 transitions. [2021-11-07 07:50:29,914 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 234 [2021-11-07 07:50:29,929 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 245 states to 241 states and 326 transitions. [2021-11-07 07:50:29,930 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 241 [2021-11-07 07:50:29,934 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 241 [2021-11-07 07:50:29,935 INFO L73 IsDeterministic]: Start isDeterministic. Operand 241 states and 326 transitions. [2021-11-07 07:50:29,939 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 07:50:29,939 INFO L681 BuchiCegarLoop]: Abstraction has 241 states and 326 transitions. [2021-11-07 07:50:29,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 241 states and 326 transitions. [2021-11-07 07:50:29,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 241 to 241. [2021-11-07 07:50:29,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 241 states, 237 states have (on average 1.350210970464135) internal successors, (320), 236 states have internal predecessors, (320), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 07:50:29,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 241 states to 241 states and 326 transitions. [2021-11-07 07:50:29,995 INFO L704 BuchiCegarLoop]: Abstraction has 241 states and 326 transitions. [2021-11-07 07:50:29,995 INFO L587 BuchiCegarLoop]: Abstraction has 241 states and 326 transitions. [2021-11-07 07:50:29,995 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-11-07 07:50:29,995 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 241 states and 326 transitions. [2021-11-07 07:50:30,002 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 234 [2021-11-07 07:50:30,002 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 07:50:30,003 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 07:50:30,005 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 07:50:30,005 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 07:50:30,006 INFO L791 eck$LassoCheckResult]: Stem: 738#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int~0 := 0; 711#L-1 havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem146.base, main_#t~mem146.offset, main_#t~mem147, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem151, main_#t~mem150, main_#t~mem152, main_#t~mem153, main_#t~mem155, main_#t~mem154, main_#t~mem156, main_#t~mem157, main_#t~mem159, main_#t~mem158, main_#t~mem160, main_#t~mem161, main_#t~switch162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_#t~mem172, main_#t~mem173, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181.base, main_#t~mem181.offset, main_#t~mem182.base, main_#t~mem182.offset, main_#t~mem183, main_#t~mem184, main_#t~mem185, main_#t~short186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~ret188, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190.base, main_#t~mem190.offset, main_#t~mem191.base, main_#t~mem191.offset, main_#t~mem192, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem193.base, main_#t~mem193.offset, main_#t~mem194.base, main_#t~mem194.offset, main_#t~short195, main_#t~mem196.base, main_#t~mem196.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~mem199.base, main_#t~mem199.offset, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202.base, main_#t~mem202.offset, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206.base, main_#t~mem206.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem218, main_#t~mem216.base, main_#t~mem216.offset, main_#t~mem217, main_#t~mem219.base, main_#t~mem219.offset, main_#t~mem220.base, main_#t~mem220.offset, main_#t~mem221, main_#t~post222, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225.base, main_#t~mem225.offset, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232, main_#t~post233, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem234.base, main_#t~mem234.offset, main_#t~mem235, main_#t~mem148, main_#t~mem149, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 620#L765-4 [2021-11-07 07:50:30,013 INFO L793 eck$LassoCheckResult]: Loop: 620#L765-4 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 621#L765-1 assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 729#L767 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 703#L767-2 call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 560#L772-124 havoc main_~_ha_hashv~0; 561#L772-49 goto; 655#L772-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 704#L772-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 508#L772-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch26 := 11 == main_~_hj_k~0; 509#L772-10 assume main_#t~switch26;call main_#t~mem27 := read~int(main_~_hj_key~0.base, 10 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 16777216 * (main_#t~mem27 % 256);havoc main_#t~mem27; 522#L772-12 main_#t~switch26 := main_#t~switch26 || 10 == main_~_hj_k~0; 586#L772-13 assume main_#t~switch26;call main_#t~mem28 := read~int(main_~_hj_key~0.base, 9 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 65536 * (main_#t~mem28 % 256);havoc main_#t~mem28; 582#L772-15 main_#t~switch26 := main_#t~switch26 || 9 == main_~_hj_k~0; 510#L772-16 assume main_#t~switch26;call main_#t~mem29 := read~int(main_~_hj_key~0.base, 8 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 256 * (main_#t~mem29 % 256);havoc main_#t~mem29; 511#L772-18 main_#t~switch26 := main_#t~switch26 || 8 == main_~_hj_k~0; 676#L772-19 assume main_#t~switch26;call main_#t~mem30 := read~int(main_~_hj_key~0.base, 7 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 16777216 * (main_#t~mem30 % 256);havoc main_#t~mem30; 683#L772-21 main_#t~switch26 := main_#t~switch26 || 7 == main_~_hj_k~0; 684#L772-22 assume !main_#t~switch26; 628#L772-24 main_#t~switch26 := main_#t~switch26 || 6 == main_~_hj_k~0; 629#L772-25 assume main_#t~switch26;call main_#t~mem32 := read~int(main_~_hj_key~0.base, 5 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 256 * (main_#t~mem32 % 256);havoc main_#t~mem32; 687#L772-27 main_#t~switch26 := main_#t~switch26 || 5 == main_~_hj_k~0; 688#L772-28 assume main_#t~switch26;call main_#t~mem33 := read~int(main_~_hj_key~0.base, 4 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + main_#t~mem33 % 256;havoc main_#t~mem33; 693#L772-30 main_#t~switch26 := main_#t~switch26 || 4 == main_~_hj_k~0; 694#L772-31 assume main_#t~switch26;call main_#t~mem34 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem34 % 256);havoc main_#t~mem34; 702#L772-33 main_#t~switch26 := main_#t~switch26 || 3 == main_~_hj_k~0; 682#L772-34 assume main_#t~switch26;call main_#t~mem35 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem35 % 256);havoc main_#t~mem35; 623#L772-36 main_#t~switch26 := main_#t~switch26 || 2 == main_~_hj_k~0; 567#L772-37 assume main_#t~switch26;call main_#t~mem36 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem36 % 256);havoc main_#t~mem36; 568#L772-39 main_#t~switch26 := main_#t~switch26 || 1 == main_~_hj_k~0; 656#L772-40 assume main_#t~switch26;call main_#t~mem37 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem37 % 256;havoc main_#t~mem37; 657#L772-42 havoc main_#t~switch26; 700#L772-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 671#L772-44 goto; 517#L772-46 goto; 518#L772-48 goto; 523#L772-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 524#L772-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset; 735#L772-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_#t~mem56.base, 16 + main_#t~mem56.offset, 4);call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 20 + main_#t~mem58.offset, 4);call write~$Pointer$(main_#t~mem57.base, main_#t~mem57.offset - main_#t~mem59, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57.base, main_#t~mem57.offset;havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem61.base, 8 + main_#t~mem61.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset;havoc main_#t~mem61.base, main_#t~mem61.offset;call main_#t~mem62.base, main_#t~mem62.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem62.base, 16 + main_#t~mem62.offset, 4);havoc main_#t~mem62.base, main_#t~mem62.offset; 691#L772-66 goto; 692#L772-120 havoc main_~_ha_bkt~0;call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64 := read~int(main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);main_#t~post65 := main_#t~mem64;call write~int(1 + main_#t~post65, main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64;havoc main_#t~post65; 730#L772-71 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67 := read~int(main_#t~mem66.base, 4 + main_#t~mem66.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem67 - 1);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67; 679#L772-70 goto; 680#L772-118 call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_#t~mem68.base, main_#t~mem68.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem69.base, main_#t~mem69.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68.base, main_#t~mem68.offset;havoc main_#t~mem69.base, main_#t~mem69.offset;call main_#t~mem70 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post71 := main_#t~mem70;call write~int(1 + main_#t~post71, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem70;havoc main_#t~post71;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem72.base, main_#t~mem72.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem73.base, main_#t~mem73.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 685#L772-73 assume main_#t~mem73.base != 0 || main_#t~mem73.offset != 0;havoc main_#t~mem73.base, main_#t~mem73.offset;call main_#t~mem74.base, main_#t~mem74.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem74.base, 12 + main_#t~mem74.offset, 4);havoc main_#t~mem74.base, main_#t~mem74.offset; 576#L772-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem76 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem75 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short79 := main_#t~mem76 % 4294967296 >= 10 * (1 + main_#t~mem75) % 4294967296; 577#L772-76 assume main_#t~short79;call main_#t~mem77.base, main_#t~mem77.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem78 := read~int(main_#t~mem77.base, 36 + main_#t~mem77.offset, 4);main_#t~short79 := 0 == main_#t~mem78 % 4294967296; 583#L772-78 assume !main_#t~short79;havoc main_#t~mem76;havoc main_#t~mem75;havoc main_#t~mem77.base, main_#t~mem77.offset;havoc main_#t~mem78;havoc main_#t~short79; 585#L772-117 goto; 612#L772-119 goto; 613#L772-121 goto; 520#L772-123 goto; 521#L772-125 call main_#t~mem146.base, main_#t~mem146.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem147 := read~int(main_#t~mem146.base, 12 + main_#t~mem146.offset, 4);test_int_#in~a := (if main_#t~mem147 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem147 % 4294967296 % 4294967296 else main_#t~mem147 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post5, test_int_#t~switch6, test_int_~a;test_int_~a := test_int_#in~a;test_int_#t~post5 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post5;test_int_#t~switch6 := 0 == test_int_#t~post5; 666#L709 assume test_int_#t~switch6;__VERIFIER_assert_#in~cond := (if 1 == test_int_~a then 1 else 0);havoc __VERIFIER_assert_~cond;__VERIFIER_assert_~cond := __VERIFIER_assert_#in~cond; 668#L702 assume !(0 == __VERIFIER_assert_~cond); 512#L708 havoc test_int_#t~post5;havoc test_int_#t~switch6; 513#L707 havoc main_#t~mem146.base, main_#t~mem146.offset;havoc main_#t~mem147; 716#L765-3 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 620#L765-4 [2021-11-07 07:50:30,015 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 07:50:30,016 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2021-11-07 07:50:30,016 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 07:50:30,017 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [97421682] [2021-11-07 07:50:30,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:50:30,017 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 07:50:30,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 07:50:30,058 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 07:50:30,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 07:50:30,111 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 07:50:30,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 07:50:30,113 INFO L85 PathProgramCache]: Analyzing trace with hash -1288858830, now seen corresponding path program 1 times [2021-11-07 07:50:30,114 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 07:50:30,114 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [422862544] [2021-11-07 07:50:30,115 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:50:30,115 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 07:50:30,138 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 07:50:30,144 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1366035400] [2021-11-07 07:50:30,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:50:30,145 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 07:50:30,146 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 07:50:30,148 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 07:50:30,149 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-11-07 07:50:30,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 07:50:30,369 INFO L263 TraceCheckSpWp]: Trace formula consists of 339 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-07 07:50:30,375 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 07:50:30,560 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 07:50:30,561 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 07:50:30,561 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [422862544] [2021-11-07 07:50:30,561 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-07 07:50:30,562 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1366035400] [2021-11-07 07:50:30,563 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1366035400] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 07:50:30,563 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 07:50:30,564 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-07 07:50:30,564 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1259079388] [2021-11-07 07:50:30,565 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 07:50:30,565 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 07:50:30,566 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-07 07:50:30,566 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-07 07:50:30,567 INFO L87 Difference]: Start difference. First operand 241 states and 326 transitions. cyclomatic complexity: 88 Second operand has 3 states, 3 states have (on average 19.0) internal successors, (57), 3 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 07:50:30,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 07:50:30,674 INFO L93 Difference]: Finished difference Result 262 states and 347 transitions. [2021-11-07 07:50:30,675 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-07 07:50:30,675 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 262 states and 347 transitions. [2021-11-07 07:50:30,678 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 255 [2021-11-07 07:50:30,684 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 262 states to 262 states and 347 transitions. [2021-11-07 07:50:30,684 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 262 [2021-11-07 07:50:30,686 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 262 [2021-11-07 07:50:30,686 INFO L73 IsDeterministic]: Start isDeterministic. Operand 262 states and 347 transitions. [2021-11-07 07:50:30,692 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 07:50:30,692 INFO L681 BuchiCegarLoop]: Abstraction has 262 states and 347 transitions. [2021-11-07 07:50:30,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262 states and 347 transitions. [2021-11-07 07:50:30,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262 to 261. [2021-11-07 07:50:30,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 261 states, 257 states have (on average 1.3229571984435797) internal successors, (340), 256 states have internal predecessors, (340), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 07:50:30,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 261 states to 261 states and 346 transitions. [2021-11-07 07:50:30,715 INFO L704 BuchiCegarLoop]: Abstraction has 261 states and 346 transitions. [2021-11-07 07:50:30,715 INFO L587 BuchiCegarLoop]: Abstraction has 261 states and 346 transitions. [2021-11-07 07:50:30,716 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-11-07 07:50:30,716 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 261 states and 346 transitions. [2021-11-07 07:50:30,718 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 254 [2021-11-07 07:50:30,718 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 07:50:30,718 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 07:50:30,721 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 07:50:30,721 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 07:50:30,722 INFO L791 eck$LassoCheckResult]: Stem: 1418#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int~0 := 0; 1389#L-1 havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem146.base, main_#t~mem146.offset, main_#t~mem147, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem151, main_#t~mem150, main_#t~mem152, main_#t~mem153, main_#t~mem155, main_#t~mem154, main_#t~mem156, main_#t~mem157, main_#t~mem159, main_#t~mem158, main_#t~mem160, main_#t~mem161, main_#t~switch162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_#t~mem172, main_#t~mem173, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181.base, main_#t~mem181.offset, main_#t~mem182.base, main_#t~mem182.offset, main_#t~mem183, main_#t~mem184, main_#t~mem185, main_#t~short186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~ret188, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190.base, main_#t~mem190.offset, main_#t~mem191.base, main_#t~mem191.offset, main_#t~mem192, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem193.base, main_#t~mem193.offset, main_#t~mem194.base, main_#t~mem194.offset, main_#t~short195, main_#t~mem196.base, main_#t~mem196.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~mem199.base, main_#t~mem199.offset, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202.base, main_#t~mem202.offset, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206.base, main_#t~mem206.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem218, main_#t~mem216.base, main_#t~mem216.offset, main_#t~mem217, main_#t~mem219.base, main_#t~mem219.offset, main_#t~mem220.base, main_#t~mem220.offset, main_#t~mem221, main_#t~post222, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225.base, main_#t~mem225.offset, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232, main_#t~post233, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem234.base, main_#t~mem234.offset, main_#t~mem235, main_#t~mem148, main_#t~mem149, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 1299#L765-4 [2021-11-07 07:50:30,722 INFO L793 eck$LassoCheckResult]: Loop: 1299#L765-4 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 1300#L765-1 assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 1407#L767 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 1381#L767-2 call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 1242#L772-124 havoc main_~_ha_hashv~0; 1243#L772-49 goto; 1333#L772-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 1382#L772-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 1185#L772-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch26 := 11 == main_~_hj_k~0; 1186#L772-10 assume !main_#t~switch26; 1200#L772-12 main_#t~switch26 := main_#t~switch26 || 10 == main_~_hj_k~0; 1419#L772-13 assume main_#t~switch26;call main_#t~mem28 := read~int(main_~_hj_key~0.base, 9 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 65536 * (main_#t~mem28 % 256);havoc main_#t~mem28; 1260#L772-15 main_#t~switch26 := main_#t~switch26 || 9 == main_~_hj_k~0; 1187#L772-16 assume main_#t~switch26;call main_#t~mem29 := read~int(main_~_hj_key~0.base, 8 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 256 * (main_#t~mem29 % 256);havoc main_#t~mem29; 1188#L772-18 main_#t~switch26 := main_#t~switch26 || 8 == main_~_hj_k~0; 1354#L772-19 assume main_#t~switch26;call main_#t~mem30 := read~int(main_~_hj_key~0.base, 7 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 16777216 * (main_#t~mem30 % 256);havoc main_#t~mem30; 1361#L772-21 main_#t~switch26 := main_#t~switch26 || 7 == main_~_hj_k~0; 1362#L772-22 assume main_#t~switch26;call main_#t~mem31 := read~int(main_~_hj_key~0.base, 6 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 65536 * (main_#t~mem31 % 256);havoc main_#t~mem31; 1306#L772-24 main_#t~switch26 := main_#t~switch26 || 6 == main_~_hj_k~0; 1307#L772-25 assume main_#t~switch26;call main_#t~mem32 := read~int(main_~_hj_key~0.base, 5 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 256 * (main_#t~mem32 % 256);havoc main_#t~mem32; 1365#L772-27 main_#t~switch26 := main_#t~switch26 || 5 == main_~_hj_k~0; 1366#L772-28 assume main_#t~switch26;call main_#t~mem33 := read~int(main_~_hj_key~0.base, 4 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + main_#t~mem33 % 256;havoc main_#t~mem33; 1371#L772-30 main_#t~switch26 := main_#t~switch26 || 4 == main_~_hj_k~0; 1372#L772-31 assume main_#t~switch26;call main_#t~mem34 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem34 % 256);havoc main_#t~mem34; 1380#L772-33 main_#t~switch26 := main_#t~switch26 || 3 == main_~_hj_k~0; 1360#L772-34 assume main_#t~switch26;call main_#t~mem35 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem35 % 256);havoc main_#t~mem35; 1301#L772-36 main_#t~switch26 := main_#t~switch26 || 2 == main_~_hj_k~0; 1245#L772-37 assume main_#t~switch26;call main_#t~mem36 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem36 % 256);havoc main_#t~mem36; 1246#L772-39 main_#t~switch26 := main_#t~switch26 || 1 == main_~_hj_k~0; 1334#L772-40 assume main_#t~switch26;call main_#t~mem37 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem37 % 256;havoc main_#t~mem37; 1335#L772-42 havoc main_#t~switch26; 1378#L772-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 1349#L772-44 goto; 1195#L772-46 goto; 1196#L772-48 goto; 1201#L772-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 1202#L772-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset; 1413#L772-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_#t~mem56.base, 16 + main_#t~mem56.offset, 4);call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 20 + main_#t~mem58.offset, 4);call write~$Pointer$(main_#t~mem57.base, main_#t~mem57.offset - main_#t~mem59, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57.base, main_#t~mem57.offset;havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem61.base, 8 + main_#t~mem61.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset;havoc main_#t~mem61.base, main_#t~mem61.offset;call main_#t~mem62.base, main_#t~mem62.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem62.base, 16 + main_#t~mem62.offset, 4);havoc main_#t~mem62.base, main_#t~mem62.offset; 1369#L772-66 goto; 1370#L772-120 havoc main_~_ha_bkt~0;call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64 := read~int(main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);main_#t~post65 := main_#t~mem64;call write~int(1 + main_#t~post65, main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64;havoc main_#t~post65; 1408#L772-71 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67 := read~int(main_#t~mem66.base, 4 + main_#t~mem66.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem67 - 1);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67; 1357#L772-70 goto; 1358#L772-118 call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_#t~mem68.base, main_#t~mem68.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem69.base, main_#t~mem69.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68.base, main_#t~mem68.offset;havoc main_#t~mem69.base, main_#t~mem69.offset;call main_#t~mem70 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post71 := main_#t~mem70;call write~int(1 + main_#t~post71, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem70;havoc main_#t~post71;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem72.base, main_#t~mem72.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem73.base, main_#t~mem73.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 1363#L772-73 assume main_#t~mem73.base != 0 || main_#t~mem73.offset != 0;havoc main_#t~mem73.base, main_#t~mem73.offset;call main_#t~mem74.base, main_#t~mem74.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem74.base, 12 + main_#t~mem74.offset, 4);havoc main_#t~mem74.base, main_#t~mem74.offset; 1254#L772-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem76 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem75 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short79 := main_#t~mem76 % 4294967296 >= 10 * (1 + main_#t~mem75) % 4294967296; 1255#L772-76 assume main_#t~short79;call main_#t~mem77.base, main_#t~mem77.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem78 := read~int(main_#t~mem77.base, 36 + main_#t~mem77.offset, 4);main_#t~short79 := 0 == main_#t~mem78 % 4294967296; 1261#L772-78 assume !main_#t~short79;havoc main_#t~mem76;havoc main_#t~mem75;havoc main_#t~mem77.base, main_#t~mem77.offset;havoc main_#t~mem78;havoc main_#t~short79; 1263#L772-117 goto; 1290#L772-119 goto; 1291#L772-121 goto; 1197#L772-123 goto; 1198#L772-125 call main_#t~mem146.base, main_#t~mem146.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem147 := read~int(main_#t~mem146.base, 12 + main_#t~mem146.offset, 4);test_int_#in~a := (if main_#t~mem147 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem147 % 4294967296 % 4294967296 else main_#t~mem147 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post5, test_int_#t~switch6, test_int_~a;test_int_~a := test_int_#in~a;test_int_#t~post5 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post5;test_int_#t~switch6 := 0 == test_int_#t~post5; 1342#L709 assume test_int_#t~switch6;__VERIFIER_assert_#in~cond := (if 1 == test_int_~a then 1 else 0);havoc __VERIFIER_assert_~cond;__VERIFIER_assert_~cond := __VERIFIER_assert_#in~cond; 1344#L702 assume !(0 == __VERIFIER_assert_~cond); 1189#L708 havoc test_int_#t~post5;havoc test_int_#t~switch6; 1190#L707 havoc main_#t~mem146.base, main_#t~mem146.offset;havoc main_#t~mem147; 1394#L765-3 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 1299#L765-4 [2021-11-07 07:50:30,723 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 07:50:30,723 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2021-11-07 07:50:30,723 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 07:50:30,724 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1130804793] [2021-11-07 07:50:30,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:50:30,724 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 07:50:30,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 07:50:30,759 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 07:50:30,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 07:50:30,812 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 07:50:30,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 07:50:30,813 INFO L85 PathProgramCache]: Analyzing trace with hash 2022110514, now seen corresponding path program 1 times [2021-11-07 07:50:30,815 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 07:50:30,815 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1473074047] [2021-11-07 07:50:30,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:50:30,815 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 07:50:30,827 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 07:50:30,832 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1608035534] [2021-11-07 07:50:30,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:50:30,833 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 07:50:30,833 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 07:50:30,840 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 07:50:30,857 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-11-07 07:50:31,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-07 07:50:31,015 INFO L263 TraceCheckSpWp]: Trace formula consists of 339 conjuncts, 4 conjunts are in the unsatisfiable core [2021-11-07 07:50:31,022 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-07 07:50:31,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-07 07:50:31,206 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-07 07:50:31,207 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1473074047] [2021-11-07 07:50:31,207 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-07 07:50:31,208 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1608035534] [2021-11-07 07:50:31,208 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1608035534] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-07 07:50:31,208 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-07 07:50:31,208 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-07 07:50:31,209 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [48230640] [2021-11-07 07:50:31,209 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-07 07:50:31,210 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-07 07:50:31,210 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-11-07 07:50:31,210 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-11-07 07:50:31,211 INFO L87 Difference]: Start difference. First operand 261 states and 346 transitions. cyclomatic complexity: 88 Second operand has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-07 07:50:31,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-07 07:50:31,327 INFO L93 Difference]: Finished difference Result 368 states and 489 transitions. [2021-11-07 07:50:31,328 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-07 07:50:31,328 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 368 states and 489 transitions. [2021-11-07 07:50:31,331 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 353 [2021-11-07 07:50:31,335 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 368 states to 368 states and 489 transitions. [2021-11-07 07:50:31,335 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 368 [2021-11-07 07:50:31,336 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 368 [2021-11-07 07:50:31,336 INFO L73 IsDeterministic]: Start isDeterministic. Operand 368 states and 489 transitions. [2021-11-07 07:50:31,337 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-07 07:50:31,337 INFO L681 BuchiCegarLoop]: Abstraction has 368 states and 489 transitions. [2021-11-07 07:50:31,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 368 states and 489 transitions. [2021-11-07 07:50:31,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 368 to 247. [2021-11-07 07:50:31,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 247 states, 243 states have (on average 1.3127572016460904) internal successors, (319), 242 states have internal predecessors, (319), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-07 07:50:31,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247 states to 247 states and 325 transitions. [2021-11-07 07:50:31,347 INFO L704 BuchiCegarLoop]: Abstraction has 247 states and 325 transitions. [2021-11-07 07:50:31,347 INFO L587 BuchiCegarLoop]: Abstraction has 247 states and 325 transitions. [2021-11-07 07:50:31,347 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-11-07 07:50:31,347 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 247 states and 325 transitions. [2021-11-07 07:50:31,349 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 240 [2021-11-07 07:50:31,349 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-07 07:50:31,349 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-07 07:50:31,350 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-07 07:50:31,350 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-07 07:50:31,350 INFO L791 eck$LassoCheckResult]: Stem: 2224#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int~0 := 0; 2194#L-1 havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem146.base, main_#t~mem146.offset, main_#t~mem147, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem151, main_#t~mem150, main_#t~mem152, main_#t~mem153, main_#t~mem155, main_#t~mem154, main_#t~mem156, main_#t~mem157, main_#t~mem159, main_#t~mem158, main_#t~mem160, main_#t~mem161, main_#t~switch162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_#t~mem172, main_#t~mem173, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181.base, main_#t~mem181.offset, main_#t~mem182.base, main_#t~mem182.offset, main_#t~mem183, main_#t~mem184, main_#t~mem185, main_#t~short186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~ret188, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190.base, main_#t~mem190.offset, main_#t~mem191.base, main_#t~mem191.offset, main_#t~mem192, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem193.base, main_#t~mem193.offset, main_#t~mem194.base, main_#t~mem194.offset, main_#t~short195, main_#t~mem196.base, main_#t~mem196.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~mem199.base, main_#t~mem199.offset, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202.base, main_#t~mem202.offset, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206.base, main_#t~mem206.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem218, main_#t~mem216.base, main_#t~mem216.offset, main_#t~mem217, main_#t~mem219.base, main_#t~mem219.offset, main_#t~mem220.base, main_#t~mem220.offset, main_#t~mem221, main_#t~post222, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225.base, main_#t~mem225.offset, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232, main_#t~post233, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem234.base, main_#t~mem234.offset, main_#t~mem235, main_#t~mem148, main_#t~mem149, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 2102#L765-4 [2021-11-07 07:50:31,350 INFO L793 eck$LassoCheckResult]: Loop: 2102#L765-4 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 2103#L765-1 assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 2213#L767 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 2186#L767-2 call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 2042#L772-124 havoc main_~_ha_hashv~0; 2043#L772-49 goto; 2137#L772-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 2187#L772-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 1990#L772-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch26 := 11 == main_~_hj_k~0; 1991#L772-10 assume !main_#t~switch26; 2004#L772-12 main_#t~switch26 := main_#t~switch26 || 10 == main_~_hj_k~0; 2068#L772-13 assume !main_#t~switch26; 2064#L772-15 main_#t~switch26 := main_#t~switch26 || 9 == main_~_hj_k~0; 1992#L772-16 assume !main_#t~switch26; 1993#L772-18 main_#t~switch26 := main_#t~switch26 || 8 == main_~_hj_k~0; 2158#L772-19 assume !main_#t~switch26; 2165#L772-21 main_#t~switch26 := main_#t~switch26 || 7 == main_~_hj_k~0; 2166#L772-22 assume !main_#t~switch26; 2110#L772-24 main_#t~switch26 := main_#t~switch26 || 6 == main_~_hj_k~0; 2111#L772-25 assume !main_#t~switch26; 2169#L772-27 main_#t~switch26 := main_#t~switch26 || 5 == main_~_hj_k~0; 2170#L772-28 assume !main_#t~switch26; 2175#L772-30 main_#t~switch26 := main_#t~switch26 || 4 == main_~_hj_k~0; 2176#L772-31 assume main_#t~switch26;call main_#t~mem34 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem34 % 256);havoc main_#t~mem34; 2197#L772-33 main_#t~switch26 := main_#t~switch26 || 3 == main_~_hj_k~0; 2164#L772-34 assume main_#t~switch26;call main_#t~mem35 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem35 % 256);havoc main_#t~mem35; 2105#L772-36 main_#t~switch26 := main_#t~switch26 || 2 == main_~_hj_k~0; 2049#L772-37 assume main_#t~switch26;call main_#t~mem36 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem36 % 256);havoc main_#t~mem36; 2050#L772-39 main_#t~switch26 := main_#t~switch26 || 1 == main_~_hj_k~0; 2138#L772-40 assume main_#t~switch26;call main_#t~mem37 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem37 % 256;havoc main_#t~mem37; 2139#L772-42 havoc main_#t~switch26; 2182#L772-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 2153#L772-44 goto; 1999#L772-46 goto; 2000#L772-48 goto; 2005#L772-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 2006#L772-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset; 2219#L772-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_#t~mem56.base, 16 + main_#t~mem56.offset, 4);call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 20 + main_#t~mem58.offset, 4);call write~$Pointer$(main_#t~mem57.base, main_#t~mem57.offset - main_#t~mem59, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57.base, main_#t~mem57.offset;havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem61.base, 8 + main_#t~mem61.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset;havoc main_#t~mem61.base, main_#t~mem61.offset;call main_#t~mem62.base, main_#t~mem62.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem62.base, 16 + main_#t~mem62.offset, 4);havoc main_#t~mem62.base, main_#t~mem62.offset; 2173#L772-66 goto; 2174#L772-120 havoc main_~_ha_bkt~0;call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64 := read~int(main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);main_#t~post65 := main_#t~mem64;call write~int(1 + main_#t~post65, main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64;havoc main_#t~post65; 2214#L772-71 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67 := read~int(main_#t~mem66.base, 4 + main_#t~mem66.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem67 - 1);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67; 2161#L772-70 goto; 2162#L772-118 call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_#t~mem68.base, main_#t~mem68.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem69.base, main_#t~mem69.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68.base, main_#t~mem68.offset;havoc main_#t~mem69.base, main_#t~mem69.offset;call main_#t~mem70 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post71 := main_#t~mem70;call write~int(1 + main_#t~post71, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem70;havoc main_#t~post71;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem72.base, main_#t~mem72.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem73.base, main_#t~mem73.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 2167#L772-73 assume main_#t~mem73.base != 0 || main_#t~mem73.offset != 0;havoc main_#t~mem73.base, main_#t~mem73.offset;call main_#t~mem74.base, main_#t~mem74.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem74.base, 12 + main_#t~mem74.offset, 4);havoc main_#t~mem74.base, main_#t~mem74.offset; 2058#L772-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem76 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem75 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short79 := main_#t~mem76 % 4294967296 >= 10 * (1 + main_#t~mem75) % 4294967296; 2059#L772-76 assume main_#t~short79;call main_#t~mem77.base, main_#t~mem77.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem78 := read~int(main_#t~mem77.base, 36 + main_#t~mem77.offset, 4);main_#t~short79 := 0 == main_#t~mem78 % 4294967296; 2065#L772-78 assume !main_#t~short79;havoc main_#t~mem76;havoc main_#t~mem75;havoc main_#t~mem77.base, main_#t~mem77.offset;havoc main_#t~mem78;havoc main_#t~short79; 2067#L772-117 goto; 2094#L772-119 goto; 2095#L772-121 goto; 2002#L772-123 goto; 2003#L772-125 call main_#t~mem146.base, main_#t~mem146.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem147 := read~int(main_#t~mem146.base, 12 + main_#t~mem146.offset, 4);test_int_#in~a := (if main_#t~mem147 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem147 % 4294967296 % 4294967296 else main_#t~mem147 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post5, test_int_#t~switch6, test_int_~a;test_int_~a := test_int_#in~a;test_int_#t~post5 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post5;test_int_#t~switch6 := 0 == test_int_#t~post5; 2148#L709 assume test_int_#t~switch6;__VERIFIER_assert_#in~cond := (if 1 == test_int_~a then 1 else 0);havoc __VERIFIER_assert_~cond;__VERIFIER_assert_~cond := __VERIFIER_assert_#in~cond; 2150#L702 assume !(0 == __VERIFIER_assert_~cond); 1994#L708 havoc test_int_#t~post5;havoc test_int_#t~switch6; 1995#L707 havoc main_#t~mem146.base, main_#t~mem146.offset;havoc main_#t~mem147; 2200#L765-3 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 2102#L765-4 [2021-11-07 07:50:31,351 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 07:50:31,351 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2021-11-07 07:50:31,351 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 07:50:31,352 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [655799331] [2021-11-07 07:50:31,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:50:31,352 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 07:50:31,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 07:50:31,365 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-07 07:50:31,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-07 07:50:31,382 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-07 07:50:31,383 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-07 07:50:31,383 INFO L85 PathProgramCache]: Analyzing trace with hash -646391514, now seen corresponding path program 1 times [2021-11-07 07:50:31,383 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-07 07:50:31,383 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1226105674] [2021-11-07 07:50:31,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:50:31,384 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-07 07:50:31,393 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-07 07:50:31,394 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1455199337] [2021-11-07 07:50:31,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-07 07:50:31,394 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-07 07:50:31,394 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/z3 [2021-11-07 07:50:31,427 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-07 07:50:31,432 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_9af33b63-f9b7-41b0-8042-6a4f013f3f78/bin/uautomizer-AkOaLMaTGY/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process