./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/systemc/bist_cell.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version f8e1c903 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/systemc/bist_cell.cil.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash de455e90ef2ae1a82fb7a87bbcdb07831c7ef68e47976e1b2868a3e9de47a0a2 --- Real Ultimate output --- This is Ultimate 0.2.1-dev-f8e1c90 [2021-11-09 10:45:32,390 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-09 10:45:32,393 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-09 10:45:32,447 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-09 10:45:32,448 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-09 10:45:32,453 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-09 10:45:32,455 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-09 10:45:32,460 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-09 10:45:32,464 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-09 10:45:32,473 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-09 10:45:32,474 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-09 10:45:32,476 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-09 10:45:32,477 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-09 10:45:32,481 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-09 10:45:32,484 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-09 10:45:32,493 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-09 10:45:32,496 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-09 10:45:32,498 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-09 10:45:32,501 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-09 10:45:32,509 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-09 10:45:32,512 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-09 10:45:32,514 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-09 10:45:32,519 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-09 10:45:32,520 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-09 10:45:32,534 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-09 10:45:32,536 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-09 10:45:32,537 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-09 10:45:32,538 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-09 10:45:32,541 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-09 10:45:32,543 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-09 10:45:32,544 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-09 10:45:32,545 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-09 10:45:32,548 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-09 10:45:32,550 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-09 10:45:32,552 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-09 10:45:32,553 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-09 10:45:32,554 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-09 10:45:32,554 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-09 10:45:32,555 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-09 10:45:32,556 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-09 10:45:32,557 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-09 10:45:32,558 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-11-09 10:45:32,614 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-09 10:45:32,614 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-09 10:45:32,615 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-09 10:45:32,615 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-09 10:45:32,616 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-09 10:45:32,616 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-09 10:45:32,617 INFO L138 SettingsManager]: * Use SBE=true [2021-11-09 10:45:32,617 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-11-09 10:45:32,617 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-11-09 10:45:32,617 INFO L138 SettingsManager]: * Use old map elimination=false [2021-11-09 10:45:32,617 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-11-09 10:45:32,618 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-11-09 10:45:32,618 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-11-09 10:45:32,618 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-09 10:45:32,618 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-09 10:45:32,619 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-11-09 10:45:32,619 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-09 10:45:32,619 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-09 10:45:32,619 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-09 10:45:32,619 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-11-09 10:45:32,620 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-11-09 10:45:32,620 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-11-09 10:45:32,620 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-09 10:45:32,620 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-09 10:45:32,621 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-11-09 10:45:32,621 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-09 10:45:32,621 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-11-09 10:45:32,621 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-09 10:45:32,622 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-09 10:45:32,622 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-09 10:45:32,622 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-09 10:45:32,622 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-09 10:45:32,623 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-11-09 10:45:32,624 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> de455e90ef2ae1a82fb7a87bbcdb07831c7ef68e47976e1b2868a3e9de47a0a2 [2021-11-09 10:45:32,964 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-09 10:45:32,990 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-09 10:45:32,993 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-09 10:45:32,995 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-09 10:45:32,996 INFO L275 PluginConnector]: CDTParser initialized [2021-11-09 10:45:32,997 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/../../sv-benchmarks/c/systemc/bist_cell.cil.c [2021-11-09 10:45:33,137 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/data/c67ae67c7/97b739c0d6194cb0ba43e062799bb7e2/FLAGfe0b87b04 [2021-11-09 10:45:33,707 INFO L306 CDTParser]: Found 1 translation units. [2021-11-09 10:45:33,708 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/sv-benchmarks/c/systemc/bist_cell.cil.c [2021-11-09 10:45:33,732 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/data/c67ae67c7/97b739c0d6194cb0ba43e062799bb7e2/FLAGfe0b87b04 [2021-11-09 10:45:34,005 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/data/c67ae67c7/97b739c0d6194cb0ba43e062799bb7e2 [2021-11-09 10:45:34,008 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-09 10:45:34,010 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-09 10:45:34,012 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-09 10:45:34,012 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-09 10:45:34,019 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-09 10:45:34,020 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.11 10:45:34" (1/1) ... [2021-11-09 10:45:34,021 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6c3c42ab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 10:45:34, skipping insertion in model container [2021-11-09 10:45:34,022 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.11 10:45:34" (1/1) ... [2021-11-09 10:45:34,033 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-09 10:45:34,077 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-09 10:45:34,234 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/sv-benchmarks/c/systemc/bist_cell.cil.c[639,652] [2021-11-09 10:45:34,310 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-09 10:45:34,322 INFO L203 MainTranslator]: Completed pre-run [2021-11-09 10:45:34,335 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/sv-benchmarks/c/systemc/bist_cell.cil.c[639,652] [2021-11-09 10:45:34,370 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-09 10:45:34,392 INFO L208 MainTranslator]: Completed translation [2021-11-09 10:45:34,393 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 10:45:34 WrapperNode [2021-11-09 10:45:34,393 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-09 10:45:34,395 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-09 10:45:34,395 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-09 10:45:34,396 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-09 10:45:34,406 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 10:45:34" (1/1) ... [2021-11-09 10:45:34,417 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 10:45:34" (1/1) ... [2021-11-09 10:45:34,453 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-09 10:45:34,454 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-09 10:45:34,454 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-09 10:45:34,455 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-09 10:45:34,465 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 10:45:34" (1/1) ... [2021-11-09 10:45:34,465 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 10:45:34" (1/1) ... [2021-11-09 10:45:34,469 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 10:45:34" (1/1) ... [2021-11-09 10:45:34,469 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 10:45:34" (1/1) ... [2021-11-09 10:45:34,478 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 10:45:34" (1/1) ... [2021-11-09 10:45:34,487 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 10:45:34" (1/1) ... [2021-11-09 10:45:34,490 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 10:45:34" (1/1) ... [2021-11-09 10:45:34,495 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-09 10:45:34,496 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-09 10:45:34,496 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-09 10:45:34,496 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-09 10:45:34,498 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 10:45:34" (1/1) ... [2021-11-09 10:45:34,507 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:34,522 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 10:45:34,537 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 10:45:34,564 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-11-09 10:45:34,608 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-09 10:45:34,608 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-09 10:45:34,609 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-09 10:45:34,610 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-09 10:45:35,243 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-09 10:45:35,243 INFO L299 CfgBuilder]: Removed 64 assume(true) statements. [2021-11-09 10:45:35,246 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.11 10:45:35 BoogieIcfgContainer [2021-11-09 10:45:35,246 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-09 10:45:35,247 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-11-09 10:45:35,247 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-11-09 10:45:35,264 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-11-09 10:45:35,265 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-09 10:45:35,265 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 09.11 10:45:34" (1/3) ... [2021-11-09 10:45:35,267 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@d3fcb2a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.11 10:45:35, skipping insertion in model container [2021-11-09 10:45:35,267 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-09 10:45:35,267 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 10:45:34" (2/3) ... [2021-11-09 10:45:35,268 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@d3fcb2a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.11 10:45:35, skipping insertion in model container [2021-11-09 10:45:35,268 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-09 10:45:35,268 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.11 10:45:35" (3/3) ... [2021-11-09 10:45:35,270 INFO L389 chiAutomizerObserver]: Analyzing ICFG bist_cell.cil.c [2021-11-09 10:45:35,322 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-11-09 10:45:35,322 INFO L360 BuchiCegarLoop]: Hoare is false [2021-11-09 10:45:35,322 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-11-09 10:45:35,322 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-11-09 10:45:35,322 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-11-09 10:45:35,323 INFO L364 BuchiCegarLoop]: Difference is false [2021-11-09 10:45:35,323 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-11-09 10:45:35,323 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-11-09 10:45:35,341 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 107 states, 106 states have (on average 1.6886792452830188) internal successors, (179), 106 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:35,366 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-11-09 10:45:35,366 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:35,366 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:35,375 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:35,376 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:35,376 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-11-09 10:45:35,377 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 107 states, 106 states have (on average 1.6886792452830188) internal successors, (179), 106 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:35,385 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-11-09 10:45:35,386 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:35,386 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:35,388 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:35,388 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:35,396 INFO L791 eck$LassoCheckResult]: Stem: 96#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 38#L-1true havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 15#L490true havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 66#L212true assume !(1 == ~b0_req_up~0); 81#L212-1true assume !(1 == ~b1_req_up~0); 106#L219true assume !(1 == ~d0_req_up~0); 12#L226true assume !(1 == ~d1_req_up~0); 57#L233true assume !(1 == ~z_req_up~0); 24#L240true assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 34#L255-1true assume !(0 == ~b0_ev~0); 77#L321-1true assume !(0 == ~b1_ev~0); 22#L326-1true assume !(0 == ~d0_ev~0); 26#L331-1true assume !(0 == ~d1_ev~0); 7#L336-1true assume !(0 == ~z_ev~0); 104#L341-1true havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 100#L107true assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 91#L129true is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 51#L130true activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 79#L390true assume !(0 != activate_threads_~tmp~1); 95#L390-2true assume !(1 == ~b0_ev~0); 39#L354-1true assume !(1 == ~b1_ev~0); 78#L359-1true assume !(1 == ~d0_ev~0); 37#L364-1true assume !(1 == ~d1_ev~0); 44#L369-1true assume !(1 == ~z_ev~0); 67#L432-1true [2021-11-09 10:45:35,398 INFO L793 eck$LassoCheckResult]: Loop: 67#L432-1true assume !false; 60#L433true start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 6#L295true assume false; 45#L311true start_simulation_~kernel_st~0 := 2; 107#L212-2true assume !(1 == ~b0_req_up~0); 74#L212-3true assume !(1 == ~b1_req_up~0); 73#L219-1true assume !(1 == ~d0_req_up~0); 40#L226-1true assume !(1 == ~d1_req_up~0); 58#L233-1true assume !(1 == ~z_req_up~0); 92#L240-1true start_simulation_~kernel_st~0 := 3; 72#L321-2true assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 14#L321-4true assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 80#L326-3true assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 47#L331-3true assume !(0 == ~d1_ev~0); 10#L336-3true assume 0 == ~z_ev~0;~z_ev~0 := 1; 16#L341-3true havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 98#L107-1true assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 41#L129-1true is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 103#L130-1true activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 8#L390-3true assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 21#L390-5true assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 31#L354-3true assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 85#L359-3true assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 71#L364-3true assume !(1 == ~d1_ev~0); 70#L369-3true assume 1 == ~z_ev~0;~z_ev~0 := 2; 46#L374-3true havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 62#L268-1true assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 101#L275-1true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 36#L276-1true stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 13#L407true assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 99#L414true stop_simulation_#res := stop_simulation_~__retres2~0; 89#L415true start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 63#L449true assume !(0 != start_simulation_~tmp~3); 67#L432-1true [2021-11-09 10:45:35,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:35,404 INFO L85 PathProgramCache]: Analyzing trace with hash 201072121, now seen corresponding path program 1 times [2021-11-09 10:45:35,419 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:35,420 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1471523178] [2021-11-09 10:45:35,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:35,423 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:35,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:35,592 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:35,593 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:35,593 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1471523178] [2021-11-09 10:45:35,594 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1471523178] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:35,594 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:35,595 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 10:45:35,596 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [61401004] [2021-11-09 10:45:35,601 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 10:45:35,602 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:35,602 INFO L85 PathProgramCache]: Analyzing trace with hash -503786151, now seen corresponding path program 1 times [2021-11-09 10:45:35,602 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:35,602 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1890039546] [2021-11-09 10:45:35,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:35,603 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:35,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:35,621 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:35,621 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:35,621 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1890039546] [2021-11-09 10:45:35,621 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1890039546] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:35,622 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:35,622 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-09 10:45:35,622 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [850396239] [2021-11-09 10:45:35,623 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:35,624 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:35,639 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 10:45:35,639 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 10:45:35,642 INFO L87 Difference]: Start difference. First operand has 107 states, 106 states have (on average 1.6886792452830188) internal successors, (179), 106 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:35,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:35,673 INFO L93 Difference]: Finished difference Result 107 states and 173 transitions. [2021-11-09 10:45:35,674 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 10:45:35,676 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 107 states and 173 transitions. [2021-11-09 10:45:35,681 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-11-09 10:45:35,688 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 107 states to 101 states and 167 transitions. [2021-11-09 10:45:35,689 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2021-11-09 10:45:35,694 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2021-11-09 10:45:35,696 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 167 transitions. [2021-11-09 10:45:35,697 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 10:45:35,697 INFO L681 BuchiCegarLoop]: Abstraction has 101 states and 167 transitions. [2021-11-09 10:45:35,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 167 transitions. [2021-11-09 10:45:35,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2021-11-09 10:45:35,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.6534653465346534) internal successors, (167), 100 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:35,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 167 transitions. [2021-11-09 10:45:35,729 INFO L704 BuchiCegarLoop]: Abstraction has 101 states and 167 transitions. [2021-11-09 10:45:35,729 INFO L587 BuchiCegarLoop]: Abstraction has 101 states and 167 transitions. [2021-11-09 10:45:35,730 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-11-09 10:45:35,730 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 167 transitions. [2021-11-09 10:45:35,733 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-11-09 10:45:35,733 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:35,733 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:35,735 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:35,735 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:35,736 INFO L791 eck$LassoCheckResult]: Stem: 322#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 277#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 244#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 245#L212 assume 1 == ~b0_req_up~0; 300#L137 assume !(~b0_val~0 != ~b0_val_t~0); 301#L137-2 ~b0_req_up~0 := 0; 317#L212-1 assume !(1 == ~b1_req_up~0); 315#L219 assume !(1 == ~d0_req_up~0); 237#L226 assume !(1 == ~d1_req_up~0); 239#L233 assume !(1 == ~z_req_up~0); 260#L240 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 261#L255-1 assume !(0 == ~b0_ev~0); 271#L321-1 assume !(0 == ~b1_ev~0); 256#L326-1 assume !(0 == ~d0_ev~0); 257#L331-1 assume !(0 == ~d1_ev~0); 227#L336-1 assume !(0 == ~z_ev~0); 228#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 323#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 250#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 292#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 293#L390 assume !(0 != activate_threads_~tmp~1); 316#L390-2 assume !(1 == ~b0_ev~0); 278#L354-1 assume !(1 == ~b1_ev~0); 279#L359-1 assume !(1 == ~d0_ev~0); 275#L364-1 assume !(1 == ~d1_ev~0); 276#L369-1 assume !(1 == ~z_ev~0); 282#L432-1 [2021-11-09 10:45:35,736 INFO L793 eck$LassoCheckResult]: Loop: 282#L432-1 assume !false; 304#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 225#L295 assume !false; 226#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 253#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 254#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 223#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 224#L290 assume !(0 != eval_~tmp___0~0); 283#L311 start_simulation_~kernel_st~0 := 2; 284#L212-2 assume !(1 == ~b0_req_up~0); 309#L212-3 assume !(1 == ~b1_req_up~0); 291#L219-1 assume !(1 == ~d0_req_up~0); 280#L226-1 assume !(1 == ~d1_req_up~0); 270#L233-1 assume !(1 == ~z_req_up~0); 303#L240-1 start_simulation_~kernel_st~0 := 3; 313#L321-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 242#L321-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 243#L326-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 287#L331-3 assume !(0 == ~d1_ev~0); 235#L336-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 236#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 246#L107-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 263#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 281#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 229#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 230#L390-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 255#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 267#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 312#L364-3 assume !(1 == ~d1_ev~0); 311#L369-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 285#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 286#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 305#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 274#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 240#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 241#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 319#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 306#L449 assume !(0 != start_simulation_~tmp~3); 282#L432-1 [2021-11-09 10:45:35,737 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:35,737 INFO L85 PathProgramCache]: Analyzing trace with hash 987671025, now seen corresponding path program 1 times [2021-11-09 10:45:35,737 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:35,737 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1314173862] [2021-11-09 10:45:35,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:35,738 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:35,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:35,802 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:35,802 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:35,803 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1314173862] [2021-11-09 10:45:35,803 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1314173862] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:35,803 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:35,803 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 10:45:35,804 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1121022820] [2021-11-09 10:45:35,804 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 10:45:35,805 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:35,805 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 1 times [2021-11-09 10:45:35,805 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:35,805 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1899549827] [2021-11-09 10:45:35,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:35,806 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:35,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:35,927 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:35,928 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:35,928 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1899549827] [2021-11-09 10:45:35,928 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1899549827] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:35,928 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:35,933 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 10:45:35,934 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1102033438] [2021-11-09 10:45:35,934 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:35,935 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:35,936 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 10:45:35,937 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 10:45:35,939 INFO L87 Difference]: Start difference. First operand 101 states and 167 transitions. cyclomatic complexity: 67 Second operand has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:35,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:35,982 INFO L93 Difference]: Finished difference Result 101 states and 166 transitions. [2021-11-09 10:45:35,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 10:45:35,983 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 166 transitions. [2021-11-09 10:45:35,986 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-11-09 10:45:35,993 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 166 transitions. [2021-11-09 10:45:35,993 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2021-11-09 10:45:35,994 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2021-11-09 10:45:35,994 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 166 transitions. [2021-11-09 10:45:35,995 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 10:45:35,995 INFO L681 BuchiCegarLoop]: Abstraction has 101 states and 166 transitions. [2021-11-09 10:45:35,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 166 transitions. [2021-11-09 10:45:36,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2021-11-09 10:45:36,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.6435643564356435) internal successors, (166), 100 states have internal predecessors, (166), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:36,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 166 transitions. [2021-11-09 10:45:36,013 INFO L704 BuchiCegarLoop]: Abstraction has 101 states and 166 transitions. [2021-11-09 10:45:36,013 INFO L587 BuchiCegarLoop]: Abstraction has 101 states and 166 transitions. [2021-11-09 10:45:36,014 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-11-09 10:45:36,014 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 166 transitions. [2021-11-09 10:45:36,017 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-11-09 10:45:36,023 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:36,023 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:36,024 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:36,025 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:36,025 INFO L791 eck$LassoCheckResult]: Stem: 533#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 488#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 455#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 456#L212 assume 1 == ~b0_req_up~0; 511#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 512#L137-2 ~b0_req_up~0 := 0; 528#L212-1 assume !(1 == ~b1_req_up~0); 526#L219 assume !(1 == ~d0_req_up~0); 448#L226 assume !(1 == ~d1_req_up~0); 450#L233 assume !(1 == ~z_req_up~0); 471#L240 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 472#L255-1 assume !(0 == ~b0_ev~0); 482#L321-1 assume !(0 == ~b1_ev~0); 467#L326-1 assume !(0 == ~d0_ev~0); 468#L331-1 assume !(0 == ~d1_ev~0); 438#L336-1 assume !(0 == ~z_ev~0); 439#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 534#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 461#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 503#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 504#L390 assume !(0 != activate_threads_~tmp~1); 527#L390-2 assume !(1 == ~b0_ev~0); 489#L354-1 assume !(1 == ~b1_ev~0); 490#L359-1 assume !(1 == ~d0_ev~0); 486#L364-1 assume !(1 == ~d1_ev~0); 487#L369-1 assume !(1 == ~z_ev~0); 493#L432-1 [2021-11-09 10:45:36,025 INFO L793 eck$LassoCheckResult]: Loop: 493#L432-1 assume !false; 515#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 436#L295 assume !false; 437#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 464#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 465#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 434#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 435#L290 assume !(0 != eval_~tmp___0~0); 494#L311 start_simulation_~kernel_st~0 := 2; 495#L212-2 assume !(1 == ~b0_req_up~0); 520#L212-3 assume !(1 == ~b1_req_up~0); 502#L219-1 assume !(1 == ~d0_req_up~0); 491#L226-1 assume !(1 == ~d1_req_up~0); 481#L233-1 assume !(1 == ~z_req_up~0); 514#L240-1 start_simulation_~kernel_st~0 := 3; 524#L321-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 453#L321-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 454#L326-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 498#L331-3 assume !(0 == ~d1_ev~0); 446#L336-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 447#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 457#L107-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 474#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 492#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 440#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 441#L390-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 466#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 478#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 523#L364-3 assume !(1 == ~d1_ev~0); 522#L369-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 496#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 497#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 516#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 485#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 451#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 452#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 530#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 517#L449 assume !(0 != start_simulation_~tmp~3); 493#L432-1 [2021-11-09 10:45:36,026 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:36,026 INFO L85 PathProgramCache]: Analyzing trace with hash 768816307, now seen corresponding path program 1 times [2021-11-09 10:45:36,026 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:36,026 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [770036754] [2021-11-09 10:45:36,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:36,027 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:36,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:36,120 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:36,121 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:36,121 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [770036754] [2021-11-09 10:45:36,121 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [770036754] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:36,121 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:36,122 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 10:45:36,122 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1331769428] [2021-11-09 10:45:36,122 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 10:45:36,123 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:36,123 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 2 times [2021-11-09 10:45:36,123 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:36,123 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1025585973] [2021-11-09 10:45:36,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:36,124 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:36,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:36,167 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:36,168 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:36,168 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1025585973] [2021-11-09 10:45:36,168 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1025585973] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:36,168 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:36,168 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 10:45:36,169 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [594247727] [2021-11-09 10:45:36,169 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:36,169 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:36,170 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 10:45:36,170 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 10:45:36,170 INFO L87 Difference]: Start difference. First operand 101 states and 166 transitions. cyclomatic complexity: 66 Second operand has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:36,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:36,213 INFO L93 Difference]: Finished difference Result 101 states and 165 transitions. [2021-11-09 10:45:36,213 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 10:45:36,213 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 165 transitions. [2021-11-09 10:45:36,215 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-11-09 10:45:36,217 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 165 transitions. [2021-11-09 10:45:36,217 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2021-11-09 10:45:36,217 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2021-11-09 10:45:36,218 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 165 transitions. [2021-11-09 10:45:36,219 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 10:45:36,219 INFO L681 BuchiCegarLoop]: Abstraction has 101 states and 165 transitions. [2021-11-09 10:45:36,219 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 165 transitions. [2021-11-09 10:45:36,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2021-11-09 10:45:36,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.6336633663366336) internal successors, (165), 100 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:36,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 165 transitions. [2021-11-09 10:45:36,233 INFO L704 BuchiCegarLoop]: Abstraction has 101 states and 165 transitions. [2021-11-09 10:45:36,233 INFO L587 BuchiCegarLoop]: Abstraction has 101 states and 165 transitions. [2021-11-09 10:45:36,233 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-11-09 10:45:36,233 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 165 transitions. [2021-11-09 10:45:36,234 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-11-09 10:45:36,234 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:36,235 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:36,236 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:36,238 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:36,239 INFO L791 eck$LassoCheckResult]: Stem: 744#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 699#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 666#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 667#L212 assume 1 == ~b0_req_up~0; 722#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 723#L137-2 ~b0_req_up~0 := 0; 739#L212-1 assume 1 == ~b1_req_up~0; 686#L152 assume !(~b1_val~0 != ~b1_val_t~0); 687#L152-2 ~b1_req_up~0 := 0; 737#L219 assume !(1 == ~d0_req_up~0); 659#L226 assume !(1 == ~d1_req_up~0); 661#L233 assume !(1 == ~z_req_up~0); 682#L240 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 683#L255-1 assume !(0 == ~b0_ev~0); 693#L321-1 assume !(0 == ~b1_ev~0); 678#L326-1 assume !(0 == ~d0_ev~0); 679#L331-1 assume !(0 == ~d1_ev~0); 649#L336-1 assume !(0 == ~z_ev~0); 650#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 745#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 672#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 714#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 715#L390 assume !(0 != activate_threads_~tmp~1); 738#L390-2 assume !(1 == ~b0_ev~0); 700#L354-1 assume !(1 == ~b1_ev~0); 701#L359-1 assume !(1 == ~d0_ev~0); 697#L364-1 assume !(1 == ~d1_ev~0); 698#L369-1 assume !(1 == ~z_ev~0); 704#L432-1 [2021-11-09 10:45:36,239 INFO L793 eck$LassoCheckResult]: Loop: 704#L432-1 assume !false; 726#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 647#L295 assume !false; 648#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 675#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 676#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 645#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 646#L290 assume !(0 != eval_~tmp___0~0); 705#L311 start_simulation_~kernel_st~0 := 2; 706#L212-2 assume !(1 == ~b0_req_up~0); 731#L212-3 assume !(1 == ~b1_req_up~0); 713#L219-1 assume !(1 == ~d0_req_up~0); 702#L226-1 assume !(1 == ~d1_req_up~0); 692#L233-1 assume !(1 == ~z_req_up~0); 725#L240-1 start_simulation_~kernel_st~0 := 3; 735#L321-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 664#L321-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 665#L326-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 709#L331-3 assume !(0 == ~d1_ev~0); 657#L336-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 658#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 668#L107-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 685#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 703#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 651#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 652#L390-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 677#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 689#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 734#L364-3 assume !(1 == ~d1_ev~0); 733#L369-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 707#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 708#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 727#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 696#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 662#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 663#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 741#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 728#L449 assume !(0 != start_simulation_~tmp~3); 704#L432-1 [2021-11-09 10:45:36,240 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:36,245 INFO L85 PathProgramCache]: Analyzing trace with hash -1003190981, now seen corresponding path program 1 times [2021-11-09 10:45:36,245 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:36,245 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1705262843] [2021-11-09 10:45:36,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:36,246 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:36,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:36,326 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:36,326 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:36,327 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1705262843] [2021-11-09 10:45:36,327 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1705262843] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:36,327 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:36,327 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-09 10:45:36,328 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [969441524] [2021-11-09 10:45:36,328 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 10:45:36,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:36,330 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 3 times [2021-11-09 10:45:36,330 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:36,331 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [78791160] [2021-11-09 10:45:36,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:36,332 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:36,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:36,401 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:36,402 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:36,402 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [78791160] [2021-11-09 10:45:36,402 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [78791160] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:36,402 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:36,402 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 10:45:36,403 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1800493903] [2021-11-09 10:45:36,403 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:36,403 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:36,404 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-09 10:45:36,404 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-09 10:45:36,404 INFO L87 Difference]: Start difference. First operand 101 states and 165 transitions. cyclomatic complexity: 65 Second operand has 4 states, 4 states have (on average 7.0) internal successors, (28), 4 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:36,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:36,442 INFO L93 Difference]: Finished difference Result 101 states and 164 transitions. [2021-11-09 10:45:36,442 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-11-09 10:45:36,443 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 164 transitions. [2021-11-09 10:45:36,444 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-11-09 10:45:36,446 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 164 transitions. [2021-11-09 10:45:36,446 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2021-11-09 10:45:36,446 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2021-11-09 10:45:36,447 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 164 transitions. [2021-11-09 10:45:36,447 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 10:45:36,448 INFO L681 BuchiCegarLoop]: Abstraction has 101 states and 164 transitions. [2021-11-09 10:45:36,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 164 transitions. [2021-11-09 10:45:36,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2021-11-09 10:45:36,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.6237623762376239) internal successors, (164), 100 states have internal predecessors, (164), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:36,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 164 transitions. [2021-11-09 10:45:36,455 INFO L704 BuchiCegarLoop]: Abstraction has 101 states and 164 transitions. [2021-11-09 10:45:36,455 INFO L587 BuchiCegarLoop]: Abstraction has 101 states and 164 transitions. [2021-11-09 10:45:36,455 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-11-09 10:45:36,455 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 164 transitions. [2021-11-09 10:45:36,456 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-11-09 10:45:36,456 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:36,456 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:36,457 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:36,458 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:36,458 INFO L791 eck$LassoCheckResult]: Stem: 958#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 913#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 880#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 881#L212 assume 1 == ~b0_req_up~0; 936#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 937#L137-2 ~b0_req_up~0 := 0; 953#L212-1 assume 1 == ~b1_req_up~0; 900#L152 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 901#L152-2 ~b1_req_up~0 := 0; 951#L219 assume !(1 == ~d0_req_up~0); 873#L226 assume !(1 == ~d1_req_up~0); 875#L233 assume !(1 == ~z_req_up~0); 896#L240 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 897#L255-1 assume !(0 == ~b0_ev~0); 907#L321-1 assume !(0 == ~b1_ev~0); 892#L326-1 assume !(0 == ~d0_ev~0); 893#L331-1 assume !(0 == ~d1_ev~0); 863#L336-1 assume !(0 == ~z_ev~0); 864#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 959#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 886#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 928#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 929#L390 assume !(0 != activate_threads_~tmp~1); 952#L390-2 assume !(1 == ~b0_ev~0); 914#L354-1 assume !(1 == ~b1_ev~0); 915#L359-1 assume !(1 == ~d0_ev~0); 911#L364-1 assume !(1 == ~d1_ev~0); 912#L369-1 assume !(1 == ~z_ev~0); 918#L432-1 [2021-11-09 10:45:36,458 INFO L793 eck$LassoCheckResult]: Loop: 918#L432-1 assume !false; 940#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 861#L295 assume !false; 862#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 889#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 890#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 859#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 860#L290 assume !(0 != eval_~tmp___0~0); 919#L311 start_simulation_~kernel_st~0 := 2; 920#L212-2 assume !(1 == ~b0_req_up~0); 945#L212-3 assume !(1 == ~b1_req_up~0); 927#L219-1 assume !(1 == ~d0_req_up~0); 916#L226-1 assume !(1 == ~d1_req_up~0); 906#L233-1 assume !(1 == ~z_req_up~0); 939#L240-1 start_simulation_~kernel_st~0 := 3; 949#L321-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 878#L321-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 879#L326-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 923#L331-3 assume !(0 == ~d1_ev~0); 871#L336-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 872#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 882#L107-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 899#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 917#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 865#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 866#L390-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 891#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 903#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 948#L364-3 assume !(1 == ~d1_ev~0); 947#L369-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 921#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 922#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 941#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 910#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 876#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 877#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 955#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 942#L449 assume !(0 != start_simulation_~tmp~3); 918#L432-1 [2021-11-09 10:45:36,458 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:36,459 INFO L85 PathProgramCache]: Analyzing trace with hash -1425892807, now seen corresponding path program 1 times [2021-11-09 10:45:36,459 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:36,459 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [861387187] [2021-11-09 10:45:36,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:36,459 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:36,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:36,508 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:36,512 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:36,512 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [861387187] [2021-11-09 10:45:36,512 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [861387187] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:36,512 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:36,513 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 10:45:36,513 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [212773815] [2021-11-09 10:45:36,513 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 10:45:36,514 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:36,514 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 4 times [2021-11-09 10:45:36,514 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:36,514 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [806518950] [2021-11-09 10:45:36,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:36,514 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:36,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:36,600 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:36,601 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:36,601 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [806518950] [2021-11-09 10:45:36,601 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [806518950] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:36,601 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:36,602 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 10:45:36,602 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1317420993] [2021-11-09 10:45:36,602 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:36,603 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:36,603 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 10:45:36,603 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 10:45:36,604 INFO L87 Difference]: Start difference. First operand 101 states and 164 transitions. cyclomatic complexity: 64 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:36,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:36,619 INFO L93 Difference]: Finished difference Result 101 states and 163 transitions. [2021-11-09 10:45:36,619 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 10:45:36,619 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 163 transitions. [2021-11-09 10:45:36,621 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-11-09 10:45:36,623 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 163 transitions. [2021-11-09 10:45:36,623 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2021-11-09 10:45:36,624 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2021-11-09 10:45:36,624 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 163 transitions. [2021-11-09 10:45:36,625 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 10:45:36,625 INFO L681 BuchiCegarLoop]: Abstraction has 101 states and 163 transitions. [2021-11-09 10:45:36,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 163 transitions. [2021-11-09 10:45:36,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2021-11-09 10:45:36,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.613861386138614) internal successors, (163), 100 states have internal predecessors, (163), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:36,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 163 transitions. [2021-11-09 10:45:36,649 INFO L704 BuchiCegarLoop]: Abstraction has 101 states and 163 transitions. [2021-11-09 10:45:36,649 INFO L587 BuchiCegarLoop]: Abstraction has 101 states and 163 transitions. [2021-11-09 10:45:36,649 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-11-09 10:45:36,650 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 163 transitions. [2021-11-09 10:45:36,651 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-11-09 10:45:36,651 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:36,651 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:36,652 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:36,653 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:36,653 INFO L791 eck$LassoCheckResult]: Stem: 1169#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 1124#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 1091#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 1092#L212 assume 1 == ~b0_req_up~0; 1147#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 1148#L137-2 ~b0_req_up~0 := 0; 1164#L212-1 assume 1 == ~b1_req_up~0; 1111#L152 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 1112#L152-2 ~b1_req_up~0 := 0; 1162#L219 assume 1 == ~d0_req_up~0; 1094#L167 assume !(~d0_val~0 != ~d0_val_t~0); 1095#L167-2 ~d0_req_up~0 := 0; 1084#L226 assume !(1 == ~d1_req_up~0); 1086#L233 assume !(1 == ~z_req_up~0); 1107#L240 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 1108#L255-1 assume !(0 == ~b0_ev~0); 1118#L321-1 assume !(0 == ~b1_ev~0); 1105#L326-1 assume !(0 == ~d0_ev~0); 1106#L331-1 assume !(0 == ~d1_ev~0); 1076#L336-1 assume !(0 == ~z_ev~0); 1077#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1170#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1097#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1141#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 1142#L390 assume !(0 != activate_threads_~tmp~1); 1163#L390-2 assume !(1 == ~b0_ev~0); 1125#L354-1 assume !(1 == ~b1_ev~0); 1126#L359-1 assume !(1 == ~d0_ev~0); 1122#L364-1 assume !(1 == ~d1_ev~0); 1123#L369-1 assume !(1 == ~z_ev~0); 1129#L432-1 [2021-11-09 10:45:36,653 INFO L793 eck$LassoCheckResult]: Loop: 1129#L432-1 assume !false; 1153#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 1072#L295 assume !false; 1073#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1100#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1101#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1070#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 1071#L290 assume !(0 != eval_~tmp___0~0); 1130#L311 start_simulation_~kernel_st~0 := 2; 1131#L212-2 assume !(1 == ~b0_req_up~0); 1156#L212-3 assume !(1 == ~b1_req_up~0); 1138#L219-1 assume !(1 == ~d0_req_up~0); 1127#L226-1 assume !(1 == ~d1_req_up~0); 1117#L233-1 assume !(1 == ~z_req_up~0); 1150#L240-1 start_simulation_~kernel_st~0 := 3; 1160#L321-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 1089#L321-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 1090#L326-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 1134#L331-3 assume !(0 == ~d1_ev~0); 1082#L336-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 1083#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1093#L107-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1110#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1128#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 1074#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 1075#L390-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 1102#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 1114#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 1159#L364-3 assume !(1 == ~d1_ev~0); 1158#L369-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 1132#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1133#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1151#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1121#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 1087#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1088#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 1166#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 1152#L449 assume !(0 != start_simulation_~tmp~3); 1129#L432-1 [2021-11-09 10:45:36,653 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:36,654 INFO L85 PathProgramCache]: Analyzing trace with hash -665750479, now seen corresponding path program 1 times [2021-11-09 10:45:36,654 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:36,654 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [805554686] [2021-11-09 10:45:36,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:36,654 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:36,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:36,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:36,699 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:36,699 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [805554686] [2021-11-09 10:45:36,700 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [805554686] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:36,700 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:36,700 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-09 10:45:36,700 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1738105164] [2021-11-09 10:45:36,700 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 10:45:36,701 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:36,701 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 5 times [2021-11-09 10:45:36,701 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:36,701 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2059634296] [2021-11-09 10:45:36,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:36,702 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:36,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:36,735 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:36,735 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:36,736 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2059634296] [2021-11-09 10:45:36,736 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2059634296] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:36,736 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:36,736 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 10:45:36,736 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2069971483] [2021-11-09 10:45:36,737 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:36,737 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:36,737 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-09 10:45:36,738 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-09 10:45:36,738 INFO L87 Difference]: Start difference. First operand 101 states and 163 transitions. cyclomatic complexity: 63 Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 4 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:36,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:36,768 INFO L93 Difference]: Finished difference Result 101 states and 162 transitions. [2021-11-09 10:45:36,777 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-11-09 10:45:36,777 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 162 transitions. [2021-11-09 10:45:36,778 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-11-09 10:45:36,780 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 162 transitions. [2021-11-09 10:45:36,780 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2021-11-09 10:45:36,780 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2021-11-09 10:45:36,780 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 162 transitions. [2021-11-09 10:45:36,781 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 10:45:36,781 INFO L681 BuchiCegarLoop]: Abstraction has 101 states and 162 transitions. [2021-11-09 10:45:36,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 162 transitions. [2021-11-09 10:45:36,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2021-11-09 10:45:36,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.603960396039604) internal successors, (162), 100 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:36,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 162 transitions. [2021-11-09 10:45:36,788 INFO L704 BuchiCegarLoop]: Abstraction has 101 states and 162 transitions. [2021-11-09 10:45:36,788 INFO L587 BuchiCegarLoop]: Abstraction has 101 states and 162 transitions. [2021-11-09 10:45:36,788 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-11-09 10:45:36,788 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 162 transitions. [2021-11-09 10:45:36,805 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-11-09 10:45:36,805 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:36,805 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:36,807 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:36,807 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:36,807 INFO L791 eck$LassoCheckResult]: Stem: 1383#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 1338#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 1305#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 1306#L212 assume 1 == ~b0_req_up~0; 1361#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 1362#L137-2 ~b0_req_up~0 := 0; 1378#L212-1 assume 1 == ~b1_req_up~0; 1325#L152 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 1326#L152-2 ~b1_req_up~0 := 0; 1376#L219 assume 1 == ~d0_req_up~0; 1308#L167 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 1309#L167-2 ~d0_req_up~0 := 0; 1298#L226 assume !(1 == ~d1_req_up~0); 1300#L233 assume !(1 == ~z_req_up~0); 1321#L240 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 1322#L255-1 assume !(0 == ~b0_ev~0); 1332#L321-1 assume !(0 == ~b1_ev~0); 1317#L326-1 assume !(0 == ~d0_ev~0); 1318#L331-1 assume !(0 == ~d1_ev~0); 1288#L336-1 assume !(0 == ~z_ev~0); 1289#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1384#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1311#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1353#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 1354#L390 assume !(0 != activate_threads_~tmp~1); 1377#L390-2 assume !(1 == ~b0_ev~0); 1339#L354-1 assume !(1 == ~b1_ev~0); 1340#L359-1 assume !(1 == ~d0_ev~0); 1336#L364-1 assume !(1 == ~d1_ev~0); 1337#L369-1 assume !(1 == ~z_ev~0); 1343#L432-1 [2021-11-09 10:45:36,807 INFO L793 eck$LassoCheckResult]: Loop: 1343#L432-1 assume !false; 1366#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 1286#L295 assume !false; 1287#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1314#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1315#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1284#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 1285#L290 assume !(0 != eval_~tmp___0~0); 1344#L311 start_simulation_~kernel_st~0 := 2; 1345#L212-2 assume !(1 == ~b0_req_up~0); 1370#L212-3 assume !(1 == ~b1_req_up~0); 1352#L219-1 assume !(1 == ~d0_req_up~0); 1341#L226-1 assume !(1 == ~d1_req_up~0); 1331#L233-1 assume !(1 == ~z_req_up~0); 1364#L240-1 start_simulation_~kernel_st~0 := 3; 1374#L321-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 1303#L321-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 1304#L326-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 1348#L331-3 assume !(0 == ~d1_ev~0); 1296#L336-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 1297#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1307#L107-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1324#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1342#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 1290#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 1291#L390-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 1316#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 1328#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 1373#L364-3 assume !(1 == ~d1_ev~0); 1372#L369-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 1346#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1347#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1367#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1335#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 1301#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1302#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 1380#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 1365#L449 assume !(0 != start_simulation_~tmp~3); 1343#L432-1 [2021-11-09 10:45:36,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:36,808 INFO L85 PathProgramCache]: Analyzing trace with hash 151897971, now seen corresponding path program 1 times [2021-11-09 10:45:36,808 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:36,808 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1532484468] [2021-11-09 10:45:36,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:36,809 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:36,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:36,872 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:36,872 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:36,872 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1532484468] [2021-11-09 10:45:36,873 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1532484468] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:36,873 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:36,873 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 10:45:36,873 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1609760472] [2021-11-09 10:45:36,873 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 10:45:36,874 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:36,874 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 6 times [2021-11-09 10:45:36,874 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:36,874 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [79658482] [2021-11-09 10:45:36,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:36,875 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:36,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:36,928 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:36,929 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:36,929 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [79658482] [2021-11-09 10:45:36,929 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [79658482] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:36,929 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:36,930 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 10:45:36,930 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [965058874] [2021-11-09 10:45:36,930 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:36,930 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:36,931 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 10:45:36,931 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 10:45:36,932 INFO L87 Difference]: Start difference. First operand 101 states and 162 transitions. cyclomatic complexity: 62 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:36,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:36,950 INFO L93 Difference]: Finished difference Result 101 states and 161 transitions. [2021-11-09 10:45:36,950 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 10:45:36,950 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 161 transitions. [2021-11-09 10:45:36,952 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-11-09 10:45:36,953 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 161 transitions. [2021-11-09 10:45:36,953 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2021-11-09 10:45:36,954 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2021-11-09 10:45:36,954 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 161 transitions. [2021-11-09 10:45:36,955 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 10:45:36,955 INFO L681 BuchiCegarLoop]: Abstraction has 101 states and 161 transitions. [2021-11-09 10:45:36,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 161 transitions. [2021-11-09 10:45:36,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2021-11-09 10:45:36,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.5940594059405941) internal successors, (161), 100 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:36,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 161 transitions. [2021-11-09 10:45:36,962 INFO L704 BuchiCegarLoop]: Abstraction has 101 states and 161 transitions. [2021-11-09 10:45:36,962 INFO L587 BuchiCegarLoop]: Abstraction has 101 states and 161 transitions. [2021-11-09 10:45:36,962 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-11-09 10:45:36,962 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 161 transitions. [2021-11-09 10:45:36,963 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-11-09 10:45:36,963 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:36,963 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:36,965 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:36,969 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:36,970 INFO L791 eck$LassoCheckResult]: Stem: 1594#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 1549#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 1515#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 1516#L212 assume 1 == ~b0_req_up~0; 1572#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 1573#L137-2 ~b0_req_up~0 := 0; 1589#L212-1 assume 1 == ~b1_req_up~0; 1536#L152 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 1537#L152-2 ~b1_req_up~0 := 0; 1587#L219 assume 1 == ~d0_req_up~0; 1518#L167 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 1519#L167-2 ~d0_req_up~0 := 0; 1509#L226 assume 1 == ~d1_req_up~0; 1510#L182 assume !(~d1_val~0 != ~d1_val_t~0); 1523#L182-2 ~d1_req_up~0 := 0; 1524#L233 assume !(1 == ~z_req_up~0); 1532#L240 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 1533#L255-1 assume !(0 == ~b0_ev~0); 1543#L321-1 assume !(0 == ~b1_ev~0); 1528#L326-1 assume !(0 == ~d0_ev~0); 1529#L331-1 assume !(0 == ~d1_ev~0); 1499#L336-1 assume !(0 == ~z_ev~0); 1500#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1595#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1521#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1564#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 1565#L390 assume !(0 != activate_threads_~tmp~1); 1588#L390-2 assume !(1 == ~b0_ev~0); 1550#L354-1 assume !(1 == ~b1_ev~0); 1551#L359-1 assume !(1 == ~d0_ev~0); 1547#L364-1 assume !(1 == ~d1_ev~0); 1548#L369-1 assume !(1 == ~z_ev~0); 1554#L432-1 [2021-11-09 10:45:36,988 INFO L793 eck$LassoCheckResult]: Loop: 1554#L432-1 assume !false; 1576#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 1497#L295 assume !false; 1498#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1525#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1526#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1495#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 1496#L290 assume !(0 != eval_~tmp___0~0); 1555#L311 start_simulation_~kernel_st~0 := 2; 1556#L212-2 assume !(1 == ~b0_req_up~0); 1581#L212-3 assume !(1 == ~b1_req_up~0); 1563#L219-1 assume !(1 == ~d0_req_up~0); 1552#L226-1 assume !(1 == ~d1_req_up~0); 1542#L233-1 assume !(1 == ~z_req_up~0); 1575#L240-1 start_simulation_~kernel_st~0 := 3; 1585#L321-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 1513#L321-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 1514#L326-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 1559#L331-3 assume !(0 == ~d1_ev~0); 1507#L336-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 1508#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1517#L107-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1535#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1553#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 1501#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 1502#L390-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 1527#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 1539#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 1584#L364-3 assume !(1 == ~d1_ev~0); 1583#L369-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 1557#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1558#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1577#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1546#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 1511#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1512#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 1591#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 1578#L449 assume !(0 != start_simulation_~tmp~3); 1554#L432-1 [2021-11-09 10:45:36,988 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:36,989 INFO L85 PathProgramCache]: Analyzing trace with hash -650688005, now seen corresponding path program 1 times [2021-11-09 10:45:36,989 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:36,989 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1850099114] [2021-11-09 10:45:36,989 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:36,989 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:37,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:37,035 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:37,035 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:37,035 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1850099114] [2021-11-09 10:45:37,035 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1850099114] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:37,036 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:37,036 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-09 10:45:37,036 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1467704164] [2021-11-09 10:45:37,036 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 10:45:37,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:37,037 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 7 times [2021-11-09 10:45:37,037 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:37,037 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [532715446] [2021-11-09 10:45:37,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:37,038 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:37,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:37,098 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:37,098 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:37,099 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [532715446] [2021-11-09 10:45:37,099 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [532715446] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:37,099 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:37,099 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 10:45:37,100 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1993999634] [2021-11-09 10:45:37,100 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:37,100 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:37,101 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-09 10:45:37,101 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-09 10:45:37,101 INFO L87 Difference]: Start difference. First operand 101 states and 161 transitions. cyclomatic complexity: 61 Second operand has 4 states, 4 states have (on average 8.0) internal successors, (32), 4 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:37,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:37,146 INFO L93 Difference]: Finished difference Result 101 states and 160 transitions. [2021-11-09 10:45:37,147 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-11-09 10:45:37,147 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 160 transitions. [2021-11-09 10:45:37,150 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-11-09 10:45:37,156 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 160 transitions. [2021-11-09 10:45:37,157 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2021-11-09 10:45:37,157 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2021-11-09 10:45:37,158 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 160 transitions. [2021-11-09 10:45:37,159 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 10:45:37,164 INFO L681 BuchiCegarLoop]: Abstraction has 101 states and 160 transitions. [2021-11-09 10:45:37,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 160 transitions. [2021-11-09 10:45:37,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2021-11-09 10:45:37,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.5841584158415842) internal successors, (160), 100 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:37,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 160 transitions. [2021-11-09 10:45:37,191 INFO L704 BuchiCegarLoop]: Abstraction has 101 states and 160 transitions. [2021-11-09 10:45:37,192 INFO L587 BuchiCegarLoop]: Abstraction has 101 states and 160 transitions. [2021-11-09 10:45:37,192 INFO L425 BuchiCegarLoop]: ======== Iteration 9============ [2021-11-09 10:45:37,192 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 160 transitions. [2021-11-09 10:45:37,193 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-11-09 10:45:37,193 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:37,193 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:37,195 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:37,200 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:37,201 INFO L791 eck$LassoCheckResult]: Stem: 1808#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 1763#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 1729#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 1730#L212 assume 1 == ~b0_req_up~0; 1786#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 1787#L137-2 ~b0_req_up~0 := 0; 1803#L212-1 assume 1 == ~b1_req_up~0; 1750#L152 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 1751#L152-2 ~b1_req_up~0 := 0; 1801#L219 assume 1 == ~d0_req_up~0; 1732#L167 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 1733#L167-2 ~d0_req_up~0 := 0; 1723#L226 assume 1 == ~d1_req_up~0; 1724#L182 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 1737#L182-2 ~d1_req_up~0 := 0; 1738#L233 assume !(1 == ~z_req_up~0); 1746#L240 assume 1 == ~comp_m1_i~0;~comp_m1_st~0 := 0; 1747#L255-1 assume !(0 == ~b0_ev~0); 1757#L321-1 assume !(0 == ~b1_ev~0); 1742#L326-1 assume !(0 == ~d0_ev~0); 1743#L331-1 assume !(0 == ~d1_ev~0); 1713#L336-1 assume !(0 == ~z_ev~0); 1714#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1809#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1735#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1778#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 1779#L390 assume !(0 != activate_threads_~tmp~1); 1802#L390-2 assume !(1 == ~b0_ev~0); 1764#L354-1 assume !(1 == ~b1_ev~0); 1765#L359-1 assume !(1 == ~d0_ev~0); 1761#L364-1 assume !(1 == ~d1_ev~0); 1762#L369-1 assume !(1 == ~z_ev~0); 1768#L432-1 [2021-11-09 10:45:37,201 INFO L793 eck$LassoCheckResult]: Loop: 1768#L432-1 assume !false; 1790#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 1711#L295 assume !false; 1712#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1739#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1740#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1709#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 1710#L290 assume !(0 != eval_~tmp___0~0); 1769#L311 start_simulation_~kernel_st~0 := 2; 1770#L212-2 assume !(1 == ~b0_req_up~0); 1795#L212-3 assume !(1 == ~b1_req_up~0); 1777#L219-1 assume !(1 == ~d0_req_up~0); 1766#L226-1 assume !(1 == ~d1_req_up~0); 1756#L233-1 assume !(1 == ~z_req_up~0); 1789#L240-1 start_simulation_~kernel_st~0 := 3; 1799#L321-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 1727#L321-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 1728#L326-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 1773#L331-3 assume !(0 == ~d1_ev~0); 1721#L336-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 1722#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1731#L107-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1749#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1767#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 1715#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 1716#L390-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 1741#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 1753#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 1798#L364-3 assume !(1 == ~d1_ev~0); 1797#L369-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 1771#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1772#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1791#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1760#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 1725#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1726#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 1805#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 1792#L449 assume !(0 != start_simulation_~tmp~3); 1768#L432-1 [2021-11-09 10:45:37,202 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:37,202 INFO L85 PathProgramCache]: Analyzing trace with hash 1038255737, now seen corresponding path program 1 times [2021-11-09 10:45:37,202 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:37,203 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1202767004] [2021-11-09 10:45:37,203 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:37,203 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:37,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:37,267 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:37,267 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:37,267 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1202767004] [2021-11-09 10:45:37,268 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1202767004] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:37,268 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:37,268 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-09 10:45:37,268 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1418017645] [2021-11-09 10:45:37,269 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 10:45:37,269 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:37,269 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 8 times [2021-11-09 10:45:37,269 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:37,270 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1149538779] [2021-11-09 10:45:37,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:37,270 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:37,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:37,304 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:37,304 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:37,304 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1149538779] [2021-11-09 10:45:37,304 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1149538779] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:37,304 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:37,305 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 10:45:37,305 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [804887437] [2021-11-09 10:45:37,305 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:37,305 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:37,306 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-09 10:45:37,306 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-09 10:45:37,306 INFO L87 Difference]: Start difference. First operand 101 states and 160 transitions. cyclomatic complexity: 60 Second operand has 4 states, 4 states have (on average 8.0) internal successors, (32), 4 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:37,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:37,328 INFO L93 Difference]: Finished difference Result 101 states and 159 transitions. [2021-11-09 10:45:37,328 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-09 10:45:37,329 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 159 transitions. [2021-11-09 10:45:37,330 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-11-09 10:45:37,331 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 159 transitions. [2021-11-09 10:45:37,331 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 101 [2021-11-09 10:45:37,332 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 101 [2021-11-09 10:45:37,332 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 159 transitions. [2021-11-09 10:45:37,332 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 10:45:37,332 INFO L681 BuchiCegarLoop]: Abstraction has 101 states and 159 transitions. [2021-11-09 10:45:37,333 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 159 transitions. [2021-11-09 10:45:37,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2021-11-09 10:45:37,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.5742574257425743) internal successors, (159), 100 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:37,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 159 transitions. [2021-11-09 10:45:37,338 INFO L704 BuchiCegarLoop]: Abstraction has 101 states and 159 transitions. [2021-11-09 10:45:37,338 INFO L587 BuchiCegarLoop]: Abstraction has 101 states and 159 transitions. [2021-11-09 10:45:37,338 INFO L425 BuchiCegarLoop]: ======== Iteration 10============ [2021-11-09 10:45:37,338 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 159 transitions. [2021-11-09 10:45:37,339 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 64 [2021-11-09 10:45:37,339 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:37,339 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:37,340 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:37,341 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:37,341 INFO L791 eck$LassoCheckResult]: Stem: 2022#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 1977#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 1943#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 1944#L212 assume 1 == ~b0_req_up~0; 2000#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 2001#L137-2 ~b0_req_up~0 := 0; 2017#L212-1 assume 1 == ~b1_req_up~0; 1964#L152 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 1965#L152-2 ~b1_req_up~0 := 0; 2015#L219 assume 1 == ~d0_req_up~0; 1946#L167 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 1947#L167-2 ~d0_req_up~0 := 0; 1937#L226 assume 1 == ~d1_req_up~0; 1938#L182 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 1951#L182-2 ~d1_req_up~0 := 0; 1952#L233 assume !(1 == ~z_req_up~0); 1960#L240 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 1961#L255-1 assume !(0 == ~b0_ev~0); 1971#L321-1 assume !(0 == ~b1_ev~0); 1956#L326-1 assume !(0 == ~d0_ev~0); 1957#L331-1 assume !(0 == ~d1_ev~0); 1927#L336-1 assume !(0 == ~z_ev~0); 1928#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2023#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1949#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1992#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 1993#L390 assume !(0 != activate_threads_~tmp~1); 2016#L390-2 assume !(1 == ~b0_ev~0); 1978#L354-1 assume !(1 == ~b1_ev~0); 1979#L359-1 assume !(1 == ~d0_ev~0); 1975#L364-1 assume !(1 == ~d1_ev~0); 1976#L369-1 assume !(1 == ~z_ev~0); 1982#L432-1 [2021-11-09 10:45:37,341 INFO L793 eck$LassoCheckResult]: Loop: 1982#L432-1 assume !false; 2004#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 1925#L295 assume !false; 1926#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1953#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 1954#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1923#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 1924#L290 assume !(0 != eval_~tmp___0~0); 1983#L311 start_simulation_~kernel_st~0 := 2; 1984#L212-2 assume !(1 == ~b0_req_up~0); 2009#L212-3 assume !(1 == ~b1_req_up~0); 1991#L219-1 assume !(1 == ~d0_req_up~0); 1980#L226-1 assume !(1 == ~d1_req_up~0); 1970#L233-1 assume !(1 == ~z_req_up~0); 2003#L240-1 start_simulation_~kernel_st~0 := 3; 2013#L321-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 1941#L321-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 1942#L326-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 1987#L331-3 assume !(0 == ~d1_ev~0); 1935#L336-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 1936#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 1945#L107-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 1963#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 1981#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 1929#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 1930#L390-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 1955#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 1967#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 2012#L364-3 assume !(1 == ~d1_ev~0); 2011#L369-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 1985#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 1986#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 2005#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 1974#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 1939#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1940#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 2019#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 2006#L449 assume !(0 != start_simulation_~tmp~3); 1982#L432-1 [2021-11-09 10:45:37,342 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:37,342 INFO L85 PathProgramCache]: Analyzing trace with hash 17187383, now seen corresponding path program 1 times [2021-11-09 10:45:37,342 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:37,342 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [885491147] [2021-11-09 10:45:37,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:37,342 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:37,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:37,377 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:37,377 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:37,378 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [885491147] [2021-11-09 10:45:37,378 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [885491147] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:37,378 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:37,378 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 10:45:37,378 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1268132813] [2021-11-09 10:45:37,379 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 10:45:37,379 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:37,381 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 9 times [2021-11-09 10:45:37,381 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:37,381 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [728952431] [2021-11-09 10:45:37,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:37,382 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:37,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:37,436 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:37,441 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:37,442 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [728952431] [2021-11-09 10:45:37,442 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [728952431] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:37,442 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:37,442 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 10:45:37,443 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1959923577] [2021-11-09 10:45:37,443 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:37,443 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:37,444 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 10:45:37,454 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 10:45:37,454 INFO L87 Difference]: Start difference. First operand 101 states and 159 transitions. cyclomatic complexity: 59 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:37,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:37,480 INFO L93 Difference]: Finished difference Result 116 states and 181 transitions. [2021-11-09 10:45:37,481 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 10:45:37,481 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 116 states and 181 transitions. [2021-11-09 10:45:37,482 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 79 [2021-11-09 10:45:37,484 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 116 states to 116 states and 181 transitions. [2021-11-09 10:45:37,484 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 116 [2021-11-09 10:45:37,484 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 116 [2021-11-09 10:45:37,485 INFO L73 IsDeterministic]: Start isDeterministic. Operand 116 states and 181 transitions. [2021-11-09 10:45:37,485 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 10:45:37,485 INFO L681 BuchiCegarLoop]: Abstraction has 116 states and 181 transitions. [2021-11-09 10:45:37,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states and 181 transitions. [2021-11-09 10:45:37,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2021-11-09 10:45:37,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 116 states have (on average 1.5603448275862069) internal successors, (181), 115 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:37,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 181 transitions. [2021-11-09 10:45:37,494 INFO L704 BuchiCegarLoop]: Abstraction has 116 states and 181 transitions. [2021-11-09 10:45:37,494 INFO L587 BuchiCegarLoop]: Abstraction has 116 states and 181 transitions. [2021-11-09 10:45:37,494 INFO L425 BuchiCegarLoop]: ======== Iteration 11============ [2021-11-09 10:45:37,495 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 116 states and 181 transitions. [2021-11-09 10:45:37,496 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 79 [2021-11-09 10:45:37,496 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:37,496 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:37,497 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:37,497 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:37,497 INFO L791 eck$LassoCheckResult]: Stem: 2249#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 2203#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 2169#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 2170#L212 assume 1 == ~b0_req_up~0; 2227#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 2228#L137-2 ~b0_req_up~0 := 0; 2244#L212-1 assume 1 == ~b1_req_up~0; 2190#L152 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 2191#L152-2 ~b1_req_up~0 := 0; 2242#L219 assume 1 == ~d0_req_up~0; 2172#L167 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 2173#L167-2 ~d0_req_up~0 := 0; 2163#L226 assume 1 == ~d1_req_up~0; 2164#L182 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 2179#L182-2 ~d1_req_up~0 := 0; 2180#L233 assume !(1 == ~z_req_up~0); 2186#L240 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 2187#L255-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 2197#L321-1 assume !(0 == ~b1_ev~0); 2182#L326-1 assume !(0 == ~d0_ev~0); 2183#L331-1 assume !(0 == ~d1_ev~0); 2153#L336-1 assume !(0 == ~z_ev~0); 2154#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2250#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2175#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2218#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 2219#L390 assume !(0 != activate_threads_~tmp~1); 2243#L390-2 assume !(1 == ~b0_ev~0); 2204#L354-1 assume !(1 == ~b1_ev~0); 2205#L359-1 assume !(1 == ~d0_ev~0); 2201#L364-1 assume !(1 == ~d1_ev~0); 2202#L369-1 assume !(1 == ~z_ev~0); 2208#L432-1 [2021-11-09 10:45:37,497 INFO L793 eck$LassoCheckResult]: Loop: 2208#L432-1 assume !false; 2231#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 2151#L295 assume !false; 2152#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2177#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 2178#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2149#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 2150#L290 assume !(0 != eval_~tmp___0~0); 2209#L311 start_simulation_~kernel_st~0 := 2; 2210#L212-2 assume !(1 == ~b0_req_up~0); 2251#L212-3 assume !(1 == ~b1_req_up~0); 2261#L219-1 assume !(1 == ~d0_req_up~0); 2258#L226-1 assume !(1 == ~d1_req_up~0); 2255#L233-1 assume !(1 == ~z_req_up~0); 2253#L240-1 start_simulation_~kernel_st~0 := 3; 2252#L321-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 2167#L321-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 2168#L326-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 2213#L331-3 assume !(0 == ~d1_ev~0); 2161#L336-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 2162#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2171#L107-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2189#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2207#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 2155#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 2156#L390-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 2181#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 2193#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 2239#L364-3 assume !(1 == ~d1_ev~0); 2238#L369-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 2211#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2212#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 2232#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2200#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 2165#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 2166#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 2246#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 2233#L449 assume !(0 != start_simulation_~tmp~3); 2208#L432-1 [2021-11-09 10:45:37,498 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:37,498 INFO L85 PathProgramCache]: Analyzing trace with hash 1297051061, now seen corresponding path program 1 times [2021-11-09 10:45:37,498 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:37,498 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2077541282] [2021-11-09 10:45:37,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:37,499 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:37,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:37,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:37,556 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:37,557 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2077541282] [2021-11-09 10:45:37,557 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2077541282] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:37,557 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:37,557 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 10:45:37,558 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [414091238] [2021-11-09 10:45:37,558 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 10:45:37,558 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:37,559 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 10 times [2021-11-09 10:45:37,559 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:37,559 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [719909886] [2021-11-09 10:45:37,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:37,559 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:37,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:37,595 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:37,596 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:37,596 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [719909886] [2021-11-09 10:45:37,596 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [719909886] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:37,596 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:37,597 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 10:45:37,597 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [469283711] [2021-11-09 10:45:37,597 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:37,597 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:37,598 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 10:45:37,598 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 10:45:37,599 INFO L87 Difference]: Start difference. First operand 116 states and 181 transitions. cyclomatic complexity: 66 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:37,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:37,625 INFO L93 Difference]: Finished difference Result 141 states and 218 transitions. [2021-11-09 10:45:37,626 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 10:45:37,626 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 141 states and 218 transitions. [2021-11-09 10:45:37,628 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 104 [2021-11-09 10:45:37,629 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 141 states to 141 states and 218 transitions. [2021-11-09 10:45:37,630 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 141 [2021-11-09 10:45:37,630 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 141 [2021-11-09 10:45:37,630 INFO L73 IsDeterministic]: Start isDeterministic. Operand 141 states and 218 transitions. [2021-11-09 10:45:37,631 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 10:45:37,631 INFO L681 BuchiCegarLoop]: Abstraction has 141 states and 218 transitions. [2021-11-09 10:45:37,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states and 218 transitions. [2021-11-09 10:45:37,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2021-11-09 10:45:37,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 141 states, 141 states have (on average 1.5460992907801419) internal successors, (218), 140 states have internal predecessors, (218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:37,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 218 transitions. [2021-11-09 10:45:37,636 INFO L704 BuchiCegarLoop]: Abstraction has 141 states and 218 transitions. [2021-11-09 10:45:37,636 INFO L587 BuchiCegarLoop]: Abstraction has 141 states and 218 transitions. [2021-11-09 10:45:37,636 INFO L425 BuchiCegarLoop]: ======== Iteration 12============ [2021-11-09 10:45:37,637 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 141 states and 218 transitions. [2021-11-09 10:45:37,638 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 104 [2021-11-09 10:45:37,638 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:37,638 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:37,642 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:37,642 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:37,643 INFO L791 eck$LassoCheckResult]: Stem: 2520#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 2470#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 2435#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 2436#L212 assume 1 == ~b0_req_up~0; 2495#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 2496#L137-2 ~b0_req_up~0 := 0; 2514#L212-1 assume 1 == ~b1_req_up~0; 2456#L152 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 2457#L152-2 ~b1_req_up~0 := 0; 2512#L219 assume 1 == ~d0_req_up~0; 2438#L167 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 2439#L167-2 ~d0_req_up~0 := 0; 2429#L226 assume 1 == ~d1_req_up~0; 2430#L182 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 2445#L182-2 ~d1_req_up~0 := 0; 2446#L233 assume !(1 == ~z_req_up~0); 2452#L240 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 2453#L255-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 2464#L321-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 2450#L326-1 assume !(0 == ~d0_ev~0); 2451#L331-1 assume !(0 == ~d1_ev~0); 2421#L336-1 assume !(0 == ~z_ev~0); 2422#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2521#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2441#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2488#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 2489#L390 assume !(0 != activate_threads_~tmp~1); 2513#L390-2 assume !(1 == ~b0_ev~0); 2471#L354-1 assume !(1 == ~b1_ev~0); 2472#L359-1 assume !(1 == ~d0_ev~0); 2468#L364-1 assume !(1 == ~d1_ev~0); 2469#L369-1 assume !(1 == ~z_ev~0); 2476#L432-1 [2021-11-09 10:45:37,646 INFO L793 eck$LassoCheckResult]: Loop: 2476#L432-1 assume !false; 2499#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 2417#L295 assume !false; 2418#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2443#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 2444#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2415#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 2416#L290 assume !(0 != eval_~tmp___0~0); 2477#L311 start_simulation_~kernel_st~0 := 2; 2478#L212-2 assume !(1 == ~b0_req_up~0); 2522#L212-3 assume !(1 == ~b1_req_up~0); 2535#L219-1 assume !(1 == ~d0_req_up~0); 2532#L226-1 assume !(1 == ~d1_req_up~0); 2529#L233-1 assume !(1 == ~z_req_up~0); 2527#L240-1 start_simulation_~kernel_st~0 := 3; 2526#L321-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 2524#L321-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 2434#L326-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 2481#L331-3 assume !(0 == ~d1_ev~0); 2427#L336-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 2428#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2437#L107-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2455#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2475#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 2419#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 2420#L390-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 2447#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 2459#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 2507#L364-3 assume !(1 == ~d1_ev~0); 2506#L369-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 2479#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2480#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 2500#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2467#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 2431#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 2432#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 2517#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 2501#L449 assume !(0 != start_simulation_~tmp~3); 2476#L432-1 [2021-11-09 10:45:37,646 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:37,648 INFO L85 PathProgramCache]: Analyzing trace with hash -1986798985, now seen corresponding path program 1 times [2021-11-09 10:45:37,648 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:37,648 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1998149767] [2021-11-09 10:45:37,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:37,648 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:37,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:37,710 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:37,710 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:37,711 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1998149767] [2021-11-09 10:45:37,711 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1998149767] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:37,711 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:37,711 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 10:45:37,711 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [490675404] [2021-11-09 10:45:37,712 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 10:45:37,712 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:37,712 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 11 times [2021-11-09 10:45:37,712 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:37,713 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1159932562] [2021-11-09 10:45:37,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:37,713 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:37,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:37,760 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:37,760 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:37,760 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1159932562] [2021-11-09 10:45:37,760 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1159932562] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:37,760 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:37,761 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 10:45:37,761 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1066839285] [2021-11-09 10:45:37,761 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:37,761 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:37,762 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 10:45:37,762 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 10:45:37,762 INFO L87 Difference]: Start difference. First operand 141 states and 218 transitions. cyclomatic complexity: 78 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:37,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:37,791 INFO L93 Difference]: Finished difference Result 180 states and 275 transitions. [2021-11-09 10:45:37,791 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 10:45:37,793 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 180 states and 275 transitions. [2021-11-09 10:45:37,795 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 143 [2021-11-09 10:45:37,797 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 180 states to 180 states and 275 transitions. [2021-11-09 10:45:37,797 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 180 [2021-11-09 10:45:37,797 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 180 [2021-11-09 10:45:37,798 INFO L73 IsDeterministic]: Start isDeterministic. Operand 180 states and 275 transitions. [2021-11-09 10:45:37,798 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 10:45:37,798 INFO L681 BuchiCegarLoop]: Abstraction has 180 states and 275 transitions. [2021-11-09 10:45:37,798 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states and 275 transitions. [2021-11-09 10:45:37,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 180. [2021-11-09 10:45:37,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 180 states, 180 states have (on average 1.5277777777777777) internal successors, (275), 179 states have internal predecessors, (275), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:37,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 275 transitions. [2021-11-09 10:45:37,803 INFO L704 BuchiCegarLoop]: Abstraction has 180 states and 275 transitions. [2021-11-09 10:45:37,803 INFO L587 BuchiCegarLoop]: Abstraction has 180 states and 275 transitions. [2021-11-09 10:45:37,804 INFO L425 BuchiCegarLoop]: ======== Iteration 13============ [2021-11-09 10:45:37,804 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 180 states and 275 transitions. [2021-11-09 10:45:37,805 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 143 [2021-11-09 10:45:37,805 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:37,805 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:37,809 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:37,809 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:37,809 INFO L791 eck$LassoCheckResult]: Stem: 2856#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 2800#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 2765#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 2766#L212 assume 1 == ~b0_req_up~0; 2826#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 2827#L137-2 ~b0_req_up~0 := 0; 2848#L212-1 assume 1 == ~b1_req_up~0; 2786#L152 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 2787#L152-2 ~b1_req_up~0 := 0; 2846#L219 assume 1 == ~d0_req_up~0; 2768#L167 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 2769#L167-2 ~d0_req_up~0 := 0; 2759#L226 assume 1 == ~d1_req_up~0; 2760#L182 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 2773#L182-2 ~d1_req_up~0 := 0; 2774#L233 assume !(1 == ~z_req_up~0); 2782#L240 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 2783#L255-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 2794#L321-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 2778#L326-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 2779#L331-1 assume !(0 == ~d1_ev~0); 2749#L336-1 assume !(0 == ~z_ev~0); 2750#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2857#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2771#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2816#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 2817#L390 assume !(0 != activate_threads_~tmp~1); 2847#L390-2 assume !(1 == ~b0_ev~0); 2801#L354-1 assume !(1 == ~b1_ev~0); 2802#L359-1 assume !(1 == ~d0_ev~0); 2798#L364-1 assume !(1 == ~d1_ev~0); 2799#L369-1 assume !(1 == ~z_ev~0); 2806#L432-1 [2021-11-09 10:45:37,810 INFO L793 eck$LassoCheckResult]: Loop: 2806#L432-1 assume !false; 2832#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 2747#L295 assume !false; 2748#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2775#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 2776#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2745#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 2746#L290 assume !(0 != eval_~tmp___0~0); 2807#L311 start_simulation_~kernel_st~0 := 2; 2808#L212-2 assume !(1 == ~b0_req_up~0); 2837#L212-3 assume !(1 == ~b1_req_up~0); 2845#L219-1 assume !(1 == ~d0_req_up~0); 2872#L226-1 assume !(1 == ~d1_req_up~0); 2866#L233-1 assume !(1 == ~z_req_up~0); 2863#L240-1 start_simulation_~kernel_st~0 := 3; 2862#L321-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 2860#L321-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 2858#L326-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 2811#L331-3 assume !(0 == ~d1_ev~0); 2757#L336-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 2758#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 2767#L107-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 2785#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 2805#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 2751#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 2752#L390-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 2777#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 2789#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 2841#L364-3 assume !(1 == ~d1_ev~0); 2840#L369-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 2809#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 2810#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 2833#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 2797#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 2761#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 2762#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 2852#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 2834#L449 assume !(0 != start_simulation_~tmp~3); 2806#L432-1 [2021-11-09 10:45:37,810 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:37,810 INFO L85 PathProgramCache]: Analyzing trace with hash -1399992971, now seen corresponding path program 1 times [2021-11-09 10:45:37,811 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:37,811 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [196883832] [2021-11-09 10:45:37,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:37,811 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:37,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:37,843 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:37,843 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:37,844 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [196883832] [2021-11-09 10:45:37,844 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [196883832] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:37,844 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:37,844 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 10:45:37,866 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [145984416] [2021-11-09 10:45:37,866 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 10:45:37,867 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:37,867 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 12 times [2021-11-09 10:45:37,867 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:37,867 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1469257506] [2021-11-09 10:45:37,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:37,868 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:37,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:37,917 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:37,917 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:37,917 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1469257506] [2021-11-09 10:45:37,917 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1469257506] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:37,917 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:37,918 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 10:45:37,918 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [86843539] [2021-11-09 10:45:37,918 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:37,919 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:37,919 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 10:45:37,919 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 10:45:37,919 INFO L87 Difference]: Start difference. First operand 180 states and 275 transitions. cyclomatic complexity: 96 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:37,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:37,944 INFO L93 Difference]: Finished difference Result 235 states and 352 transitions. [2021-11-09 10:45:37,945 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 10:45:37,945 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 235 states and 352 transitions. [2021-11-09 10:45:37,947 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 198 [2021-11-09 10:45:37,950 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 235 states to 235 states and 352 transitions. [2021-11-09 10:45:37,950 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 235 [2021-11-09 10:45:37,950 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 235 [2021-11-09 10:45:37,950 INFO L73 IsDeterministic]: Start isDeterministic. Operand 235 states and 352 transitions. [2021-11-09 10:45:37,951 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 10:45:37,951 INFO L681 BuchiCegarLoop]: Abstraction has 235 states and 352 transitions. [2021-11-09 10:45:37,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235 states and 352 transitions. [2021-11-09 10:45:37,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 235. [2021-11-09 10:45:37,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 235 states, 235 states have (on average 1.4978723404255319) internal successors, (352), 234 states have internal predecessors, (352), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:37,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 235 states to 235 states and 352 transitions. [2021-11-09 10:45:37,961 INFO L704 BuchiCegarLoop]: Abstraction has 235 states and 352 transitions. [2021-11-09 10:45:37,961 INFO L587 BuchiCegarLoop]: Abstraction has 235 states and 352 transitions. [2021-11-09 10:45:37,961 INFO L425 BuchiCegarLoop]: ======== Iteration 14============ [2021-11-09 10:45:37,961 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 235 states and 352 transitions. [2021-11-09 10:45:37,963 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 198 [2021-11-09 10:45:37,963 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:37,963 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:37,967 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:37,967 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:37,967 INFO L791 eck$LassoCheckResult]: Stem: 3279#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 3224#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 3190#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 3191#L212 assume 1 == ~b0_req_up~0; 3249#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 3250#L137-2 ~b0_req_up~0 := 0; 3271#L212-1 assume 1 == ~b1_req_up~0; 3211#L152 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 3212#L152-2 ~b1_req_up~0 := 0; 3267#L219 assume 1 == ~d0_req_up~0; 3193#L167 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 3194#L167-2 ~d0_req_up~0 := 0; 3184#L226 assume 1 == ~d1_req_up~0; 3185#L182 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 3198#L182-2 ~d1_req_up~0 := 0; 3199#L233 assume !(1 == ~z_req_up~0); 3207#L240 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 3208#L255-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 3218#L321-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 3203#L326-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 3204#L331-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 3175#L336-1 assume !(0 == ~z_ev~0); 3176#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 3280#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 3196#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 3239#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 3240#L390 assume !(0 != activate_threads_~tmp~1); 3268#L390-2 assume !(1 == ~b0_ev~0); 3225#L354-1 assume !(1 == ~b1_ev~0); 3226#L359-1 assume !(1 == ~d0_ev~0); 3222#L364-1 assume !(1 == ~d1_ev~0); 3223#L369-1 assume !(1 == ~z_ev~0); 3229#L432-1 [2021-11-09 10:45:37,968 INFO L793 eck$LassoCheckResult]: Loop: 3229#L432-1 assume !false; 3256#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 3171#L295 assume !false; 3172#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 3200#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 3201#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 3169#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 3170#L290 assume !(0 != eval_~tmp___0~0); 3230#L311 start_simulation_~kernel_st~0 := 2; 3231#L212-2 assume !(1 == ~b0_req_up~0); 3281#L212-3 assume !(1 == ~b1_req_up~0); 3325#L219-1 assume !(1 == ~d0_req_up~0); 3319#L226-1 assume !(1 == ~d1_req_up~0); 3314#L233-1 assume !(1 == ~z_req_up~0); 3309#L240-1 start_simulation_~kernel_st~0 := 3; 3307#L321-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 3288#L321-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 3284#L326-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 3270#L331-3 assume !(0 == ~d1_ev~0); 3180#L336-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 3181#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 3192#L107-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 3210#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 3228#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 3173#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 3174#L390-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 3202#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 3213#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 3262#L364-3 assume !(1 == ~d1_ev~0); 3261#L369-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 3232#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 3233#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 3254#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 3221#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 3186#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 3187#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 3274#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 3255#L449 assume !(0 != start_simulation_~tmp~3); 3229#L432-1 [2021-11-09 10:45:37,968 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:37,968 INFO L85 PathProgramCache]: Analyzing trace with hash -1658158409, now seen corresponding path program 1 times [2021-11-09 10:45:37,968 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:37,968 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1229455707] [2021-11-09 10:45:37,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:37,969 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:37,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:38,048 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:38,048 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:38,049 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1229455707] [2021-11-09 10:45:38,049 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1229455707] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:38,049 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:38,049 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2021-11-09 10:45:38,049 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1663739097] [2021-11-09 10:45:38,050 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 10:45:38,051 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:38,051 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 13 times [2021-11-09 10:45:38,052 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:38,052 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [75984519] [2021-11-09 10:45:38,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:38,053 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:38,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:38,113 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:38,113 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:38,114 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [75984519] [2021-11-09 10:45:38,114 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [75984519] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:38,114 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:38,114 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 10:45:38,114 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [543149061] [2021-11-09 10:45:38,115 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:38,115 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:38,115 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2021-11-09 10:45:38,115 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2021-11-09 10:45:38,116 INFO L87 Difference]: Start difference. First operand 235 states and 352 transitions. cyclomatic complexity: 118 Second operand has 6 states, 6 states have (on average 5.333333333333333) internal successors, (32), 6 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:38,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:38,192 INFO L93 Difference]: Finished difference Result 633 states and 958 transitions. [2021-11-09 10:45:38,193 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-11-09 10:45:38,193 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 633 states and 958 transitions. [2021-11-09 10:45:38,199 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 583 [2021-11-09 10:45:38,205 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 633 states to 633 states and 958 transitions. [2021-11-09 10:45:38,205 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 633 [2021-11-09 10:45:38,206 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 633 [2021-11-09 10:45:38,207 INFO L73 IsDeterministic]: Start isDeterministic. Operand 633 states and 958 transitions. [2021-11-09 10:45:38,208 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 10:45:38,208 INFO L681 BuchiCegarLoop]: Abstraction has 633 states and 958 transitions. [2021-11-09 10:45:38,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 633 states and 958 transitions. [2021-11-09 10:45:38,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 633 to 241. [2021-11-09 10:45:38,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 241 states, 241 states have (on average 1.4854771784232366) internal successors, (358), 240 states have internal predecessors, (358), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:38,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 241 states to 241 states and 358 transitions. [2021-11-09 10:45:38,217 INFO L704 BuchiCegarLoop]: Abstraction has 241 states and 358 transitions. [2021-11-09 10:45:38,217 INFO L587 BuchiCegarLoop]: Abstraction has 241 states and 358 transitions. [2021-11-09 10:45:38,217 INFO L425 BuchiCegarLoop]: ======== Iteration 15============ [2021-11-09 10:45:38,217 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 241 states and 358 transitions. [2021-11-09 10:45:38,219 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 201 [2021-11-09 10:45:38,219 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:38,219 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:38,220 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:38,220 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:38,220 INFO L791 eck$LassoCheckResult]: Stem: 4163#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 4110#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 4074#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 4075#L212 assume 1 == ~b0_req_up~0; 4136#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 4137#L137-2 ~b0_req_up~0 := 0; 4156#L212-1 assume 1 == ~b1_req_up~0; 4096#L152 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 4097#L152-2 ~b1_req_up~0 := 0; 4152#L219 assume 1 == ~d0_req_up~0; 4077#L167 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 4078#L167-2 ~d0_req_up~0 := 0; 4068#L226 assume 1 == ~d1_req_up~0; 4069#L182 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 4082#L182-2 ~d1_req_up~0 := 0; 4083#L233 assume !(1 == ~z_req_up~0); 4091#L240 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 4092#L255-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 4104#L321-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 4087#L326-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 4088#L331-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 4057#L336-1 assume !(0 == ~z_ev~0); 4058#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 4165#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 4080#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 4161#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 4153#L390 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 4154#L390-2 assume !(1 == ~b0_ev~0); 4111#L354-1 assume !(1 == ~b1_ev~0); 4112#L359-1 assume !(1 == ~d0_ev~0); 4108#L364-1 assume !(1 == ~d1_ev~0); 4109#L369-1 assume !(1 == ~z_ev~0); 4116#L432-1 [2021-11-09 10:45:38,221 INFO L793 eck$LassoCheckResult]: Loop: 4116#L432-1 assume !false; 4140#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 4055#L295 assume !false; 4056#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 4084#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 4085#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 4053#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 4054#L290 assume !(0 != eval_~tmp___0~0); 4117#L311 start_simulation_~kernel_st~0 := 2; 4118#L212-2 assume !(1 == ~b0_req_up~0); 4168#L212-3 assume !(1 == ~b1_req_up~0); 4199#L219-1 assume !(1 == ~d0_req_up~0); 4194#L226-1 assume !(1 == ~d1_req_up~0); 4195#L233-1 assume !(1 == ~z_req_up~0); 4269#L240-1 start_simulation_~kernel_st~0 := 3; 4266#L321-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 4264#L321-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 4262#L326-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 4155#L331-3 assume !(0 == ~d1_ev~0); 4066#L336-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 4067#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 4076#L107-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 4094#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 4115#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 4059#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 4060#L390-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 4086#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 4099#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 4148#L364-3 assume !(1 == ~d1_ev~0); 4147#L369-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 4119#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 4120#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 4141#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 4107#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 4070#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 4071#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 4159#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 4142#L449 assume !(0 != start_simulation_~tmp~3); 4116#L432-1 [2021-11-09 10:45:38,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:38,222 INFO L85 PathProgramCache]: Analyzing trace with hash -1715416711, now seen corresponding path program 1 times [2021-11-09 10:45:38,222 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:38,222 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1474650121] [2021-11-09 10:45:38,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:38,223 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:38,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:38,257 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:38,257 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:38,257 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1474650121] [2021-11-09 10:45:38,257 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1474650121] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:38,257 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:38,258 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 10:45:38,258 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [813706638] [2021-11-09 10:45:38,258 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 10:45:38,258 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:38,259 INFO L85 PathProgramCache]: Analyzing trace with hash -1726026488, now seen corresponding path program 14 times [2021-11-09 10:45:38,259 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:38,259 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [467835561] [2021-11-09 10:45:38,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:38,259 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:38,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:38,303 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:38,303 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:38,304 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [467835561] [2021-11-09 10:45:38,304 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [467835561] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:38,305 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:38,305 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 10:45:38,305 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1034016024] [2021-11-09 10:45:38,306 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:38,306 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:38,306 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 10:45:38,306 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 10:45:38,306 INFO L87 Difference]: Start difference. First operand 241 states and 358 transitions. cyclomatic complexity: 118 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:38,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:38,337 INFO L93 Difference]: Finished difference Result 256 states and 375 transitions. [2021-11-09 10:45:38,337 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 10:45:38,337 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 256 states and 375 transitions. [2021-11-09 10:45:38,340 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 222 [2021-11-09 10:45:38,342 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 256 states to 256 states and 375 transitions. [2021-11-09 10:45:38,343 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 256 [2021-11-09 10:45:38,343 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 256 [2021-11-09 10:45:38,343 INFO L73 IsDeterministic]: Start isDeterministic. Operand 256 states and 375 transitions. [2021-11-09 10:45:38,344 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 10:45:38,344 INFO L681 BuchiCegarLoop]: Abstraction has 256 states and 375 transitions. [2021-11-09 10:45:38,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256 states and 375 transitions. [2021-11-09 10:45:38,348 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256 to 256. [2021-11-09 10:45:38,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 256 states, 256 states have (on average 1.46484375) internal successors, (375), 255 states have internal predecessors, (375), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:38,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 256 states to 256 states and 375 transitions. [2021-11-09 10:45:38,350 INFO L704 BuchiCegarLoop]: Abstraction has 256 states and 375 transitions. [2021-11-09 10:45:38,350 INFO L587 BuchiCegarLoop]: Abstraction has 256 states and 375 transitions. [2021-11-09 10:45:38,350 INFO L425 BuchiCegarLoop]: ======== Iteration 16============ [2021-11-09 10:45:38,350 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 256 states and 375 transitions. [2021-11-09 10:45:38,352 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 222 [2021-11-09 10:45:38,352 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:38,352 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:38,353 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:38,353 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:38,354 INFO L791 eck$LassoCheckResult]: Stem: 4672#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 4614#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 4580#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 4581#L212 assume 1 == ~b0_req_up~0; 4640#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 4641#L137-2 ~b0_req_up~0 := 0; 4664#L212-1 assume 1 == ~b1_req_up~0; 4600#L152 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 4601#L152-2 ~b1_req_up~0 := 0; 4662#L219 assume 1 == ~d0_req_up~0; 4583#L167 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 4584#L167-2 ~d0_req_up~0 := 0; 4574#L226 assume 1 == ~d1_req_up~0; 4575#L182 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 4585#L182-2 ~d1_req_up~0 := 0; 4586#L233 assume !(1 == ~z_req_up~0); 4595#L240 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 4596#L255-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 4608#L321-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 4591#L326-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 4592#L331-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 4563#L336-1 assume !(0 == ~z_ev~0); 4564#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 4674#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 4669#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 4631#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 4632#L390 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 4663#L390-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 4615#L354-1 assume !(1 == ~b1_ev~0); 4616#L359-1 assume !(1 == ~d0_ev~0); 4612#L364-1 assume !(1 == ~d1_ev~0); 4613#L369-1 assume !(1 == ~z_ev~0); 4621#L432-1 [2021-11-09 10:45:38,354 INFO L793 eck$LassoCheckResult]: Loop: 4621#L432-1 assume !false; 4646#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 4561#L295 assume !false; 4562#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 4587#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 4588#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 4559#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 4560#L290 assume !(0 != eval_~tmp___0~0); 4622#L311 start_simulation_~kernel_st~0 := 2; 4623#L212-2 assume !(1 == ~b0_req_up~0); 4651#L212-3 assume !(1 == ~b1_req_up~0); 4705#L219-1 assume !(1 == ~d0_req_up~0); 4702#L226-1 assume !(1 == ~d1_req_up~0); 4699#L233-1 assume !(1 == ~z_req_up~0); 4694#L240-1 start_simulation_~kernel_st~0 := 3; 4691#L321-2 assume !(0 == ~b0_ev~0); 4688#L321-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 4684#L326-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 4679#L331-3 assume !(0 == ~d1_ev~0); 4678#L336-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 4677#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 4676#L107-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 4673#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 4804#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 4801#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 4589#L390-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 4590#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 4603#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 4655#L364-3 assume !(1 == ~d1_ev~0); 4654#L369-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 4624#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 4625#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 4647#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 4611#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 4576#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 4577#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 4667#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 4648#L449 assume !(0 != start_simulation_~tmp~3); 4621#L432-1 [2021-11-09 10:45:38,354 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:38,354 INFO L85 PathProgramCache]: Analyzing trace with hash -1717263753, now seen corresponding path program 1 times [2021-11-09 10:45:38,354 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:38,355 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [390538175] [2021-11-09 10:45:38,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:38,355 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:38,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:38,386 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:38,386 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:38,387 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [390538175] [2021-11-09 10:45:38,387 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [390538175] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:38,387 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:38,387 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 10:45:38,387 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [650987116] [2021-11-09 10:45:38,387 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 10:45:38,388 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:38,388 INFO L85 PathProgramCache]: Analyzing trace with hash 763502474, now seen corresponding path program 1 times [2021-11-09 10:45:38,388 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:38,388 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1484655068] [2021-11-09 10:45:38,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:38,388 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:38,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:38,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:38,422 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:38,423 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1484655068] [2021-11-09 10:45:38,424 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1484655068] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:38,424 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:38,424 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 10:45:38,424 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1633523316] [2021-11-09 10:45:38,424 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:38,425 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:38,425 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 10:45:38,425 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 10:45:38,425 INFO L87 Difference]: Start difference. First operand 256 states and 375 transitions. cyclomatic complexity: 120 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:38,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:38,453 INFO L93 Difference]: Finished difference Result 284 states and 412 transitions. [2021-11-09 10:45:38,453 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 10:45:38,454 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 284 states and 412 transitions. [2021-11-09 10:45:38,456 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 250 [2021-11-09 10:45:38,459 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 284 states to 284 states and 412 transitions. [2021-11-09 10:45:38,460 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 284 [2021-11-09 10:45:38,460 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 284 [2021-11-09 10:45:38,460 INFO L73 IsDeterministic]: Start isDeterministic. Operand 284 states and 412 transitions. [2021-11-09 10:45:38,461 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 10:45:38,461 INFO L681 BuchiCegarLoop]: Abstraction has 284 states and 412 transitions. [2021-11-09 10:45:38,461 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 284 states and 412 transitions. [2021-11-09 10:45:38,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 284 to 284. [2021-11-09 10:45:38,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 284 states, 284 states have (on average 1.4507042253521127) internal successors, (412), 283 states have internal predecessors, (412), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:38,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 284 states to 284 states and 412 transitions. [2021-11-09 10:45:38,468 INFO L704 BuchiCegarLoop]: Abstraction has 284 states and 412 transitions. [2021-11-09 10:45:38,468 INFO L587 BuchiCegarLoop]: Abstraction has 284 states and 412 transitions. [2021-11-09 10:45:38,468 INFO L425 BuchiCegarLoop]: ======== Iteration 17============ [2021-11-09 10:45:38,468 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 284 states and 412 transitions. [2021-11-09 10:45:38,471 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 250 [2021-11-09 10:45:38,471 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:38,471 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:38,478 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:38,478 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:38,478 INFO L791 eck$LassoCheckResult]: Stem: 5218#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 5163#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 5129#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 5130#L212 assume 1 == ~b0_req_up~0; 5188#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 5189#L137-2 ~b0_req_up~0 := 0; 5209#L212-1 assume 1 == ~b1_req_up~0; 5149#L152 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 5150#L152-2 ~b1_req_up~0 := 0; 5206#L219 assume 1 == ~d0_req_up~0; 5132#L167 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 5133#L167-2 ~d0_req_up~0 := 0; 5123#L226 assume 1 == ~d1_req_up~0; 5124#L182 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 5134#L182-2 ~d1_req_up~0 := 0; 5135#L233 assume !(1 == ~z_req_up~0); 5144#L240 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 5145#L255-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 5157#L321-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 5140#L326-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 5141#L331-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 5112#L336-1 assume !(0 == ~z_ev~0); 5113#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 5220#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 5215#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 5179#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 5180#L390 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 5207#L390-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 5164#L354-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 5165#L359-1 assume !(1 == ~d0_ev~0); 5161#L364-1 assume !(1 == ~d1_ev~0); 5162#L369-1 assume !(1 == ~z_ev~0); 5169#L432-1 [2021-11-09 10:45:38,478 INFO L793 eck$LassoCheckResult]: Loop: 5169#L432-1 assume !false; 5192#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 5110#L295 assume !false; 5111#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 5136#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 5137#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 5108#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 5109#L290 assume !(0 != eval_~tmp___0~0); 5170#L311 start_simulation_~kernel_st~0 := 2; 5171#L212-2 assume !(1 == ~b0_req_up~0); 5221#L212-3 assume !(1 == ~b1_req_up~0); 5279#L219-1 assume !(1 == ~d0_req_up~0); 5277#L226-1 assume !(1 == ~d1_req_up~0); 5275#L233-1 assume !(1 == ~z_req_up~0); 5271#L240-1 start_simulation_~kernel_st~0 := 3; 5268#L321-2 assume !(0 == ~b0_ev~0); 5263#L321-4 assume !(0 == ~b1_ev~0); 5248#L326-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 5238#L331-3 assume !(0 == ~d1_ev~0); 5233#L336-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 5231#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 5229#L107-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 5219#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 5240#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 5234#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 5223#L390-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 5222#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 5152#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 5200#L364-3 assume !(1 == ~d1_ev~0); 5199#L369-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 5172#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 5173#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 5193#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 5160#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 5125#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 5126#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 5212#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 5194#L449 assume !(0 != start_simulation_~tmp~3); 5169#L432-1 [2021-11-09 10:45:38,479 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:38,479 INFO L85 PathProgramCache]: Analyzing trace with hash -1717323335, now seen corresponding path program 1 times [2021-11-09 10:45:38,479 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:38,479 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1646192303] [2021-11-09 10:45:38,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:38,479 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:38,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:38,516 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:38,516 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:38,516 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1646192303] [2021-11-09 10:45:38,516 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1646192303] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:38,516 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:38,516 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 10:45:38,517 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1889892512] [2021-11-09 10:45:38,517 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 10:45:38,517 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:38,517 INFO L85 PathProgramCache]: Analyzing trace with hash 982357192, now seen corresponding path program 1 times [2021-11-09 10:45:38,517 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:38,518 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [772389963] [2021-11-09 10:45:38,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:38,518 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:38,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:38,550 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:38,550 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:38,550 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [772389963] [2021-11-09 10:45:38,551 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [772389963] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:38,551 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:38,551 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 10:45:38,551 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [623676500] [2021-11-09 10:45:38,551 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:38,551 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:38,552 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 10:45:38,552 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 10:45:38,552 INFO L87 Difference]: Start difference. First operand 284 states and 412 transitions. cyclomatic complexity: 129 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:38,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:38,574 INFO L93 Difference]: Finished difference Result 326 states and 467 transitions. [2021-11-09 10:45:38,574 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 10:45:38,574 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 326 states and 467 transitions. [2021-11-09 10:45:38,577 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 292 [2021-11-09 10:45:38,581 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 326 states to 326 states and 467 transitions. [2021-11-09 10:45:38,581 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 326 [2021-11-09 10:45:38,581 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 326 [2021-11-09 10:45:38,582 INFO L73 IsDeterministic]: Start isDeterministic. Operand 326 states and 467 transitions. [2021-11-09 10:45:38,582 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 10:45:38,582 INFO L681 BuchiCegarLoop]: Abstraction has 326 states and 467 transitions. [2021-11-09 10:45:38,583 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326 states and 467 transitions. [2021-11-09 10:45:38,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326 to 326. [2021-11-09 10:45:38,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 326 states, 326 states have (on average 1.4325153374233128) internal successors, (467), 325 states have internal predecessors, (467), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:38,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 326 states to 326 states and 467 transitions. [2021-11-09 10:45:38,611 INFO L704 BuchiCegarLoop]: Abstraction has 326 states and 467 transitions. [2021-11-09 10:45:38,611 INFO L587 BuchiCegarLoop]: Abstraction has 326 states and 467 transitions. [2021-11-09 10:45:38,611 INFO L425 BuchiCegarLoop]: ======== Iteration 18============ [2021-11-09 10:45:38,611 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 326 states and 467 transitions. [2021-11-09 10:45:38,613 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 292 [2021-11-09 10:45:38,614 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:38,614 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:38,615 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:38,615 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:38,615 INFO L791 eck$LassoCheckResult]: Stem: 5839#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 5780#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 5748#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 5749#L212 assume 1 == ~b0_req_up~0; 5808#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 5809#L137-2 ~b0_req_up~0 := 0; 5831#L212-1 assume 1 == ~b1_req_up~0; 5767#L152 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 5768#L152-2 ~b1_req_up~0 := 0; 5827#L219 assume 1 == ~d0_req_up~0; 5751#L167 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 5752#L167-2 ~d0_req_up~0 := 0; 5742#L226 assume 1 == ~d1_req_up~0; 5743#L182 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 5753#L182-2 ~d1_req_up~0 := 0; 5754#L233 assume !(1 == ~z_req_up~0); 5762#L240 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 5763#L255-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 5774#L321-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 5758#L326-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 5759#L331-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 5733#L336-1 assume !(0 == ~z_ev~0); 5734#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 5840#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 5837#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 5798#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 5799#L390 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 5828#L390-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 5781#L354-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 5782#L359-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 5778#L364-1 assume !(1 == ~d1_ev~0); 5779#L369-1 assume !(1 == ~z_ev~0); 5788#L432-1 [2021-11-09 10:45:38,615 INFO L793 eck$LassoCheckResult]: Loop: 5788#L432-1 assume !false; 5815#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 5729#L295 assume !false; 5730#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 5755#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 5756#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 5727#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 5728#L290 assume !(0 != eval_~tmp___0~0); 5789#L311 start_simulation_~kernel_st~0 := 2; 5790#L212-2 assume !(1 == ~b0_req_up~0); 5841#L212-3 assume !(1 == ~b1_req_up~0); 5895#L219-1 assume !(1 == ~d0_req_up~0); 5893#L226-1 assume !(1 == ~d1_req_up~0); 5889#L233-1 assume !(1 == ~z_req_up~0); 5886#L240-1 start_simulation_~kernel_st~0 := 3; 5881#L321-2 assume !(0 == ~b0_ev~0); 5878#L321-4 assume !(0 == ~b1_ev~0); 5874#L326-3 assume !(0 == ~d0_ev~0); 5867#L331-3 assume !(0 == ~d1_ev~0); 5865#L336-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 5863#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 5860#L107-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 5861#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 5902#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 5901#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 5846#L390-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 5845#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 5843#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 5822#L364-3 assume !(1 == ~d1_ev~0); 5821#L369-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 5791#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 5792#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 5813#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 5777#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 5744#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 5745#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 5834#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 5814#L449 assume !(0 != start_simulation_~tmp~3); 5788#L432-1 [2021-11-09 10:45:38,616 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:38,616 INFO L85 PathProgramCache]: Analyzing trace with hash -1717325257, now seen corresponding path program 1 times [2021-11-09 10:45:38,616 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:38,617 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1662254782] [2021-11-09 10:45:38,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:38,617 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:38,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:38,654 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:38,654 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:38,655 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1662254782] [2021-11-09 10:45:38,655 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1662254782] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:38,655 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:38,655 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 10:45:38,655 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [728402923] [2021-11-09 10:45:38,656 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 10:45:38,656 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:38,656 INFO L85 PathProgramCache]: Analyzing trace with hash 1405059018, now seen corresponding path program 1 times [2021-11-09 10:45:38,656 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:38,656 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2087052876] [2021-11-09 10:45:38,657 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:38,657 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:38,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:38,694 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:38,695 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:38,695 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2087052876] [2021-11-09 10:45:38,695 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2087052876] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:38,695 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:38,695 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 10:45:38,696 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1879193626] [2021-11-09 10:45:38,696 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:38,697 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:38,697 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 10:45:38,697 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 10:45:38,698 INFO L87 Difference]: Start difference. First operand 326 states and 467 transitions. cyclomatic complexity: 142 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:38,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:38,722 INFO L93 Difference]: Finished difference Result 393 states and 555 transitions. [2021-11-09 10:45:38,722 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 10:45:38,722 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 393 states and 555 transitions. [2021-11-09 10:45:38,727 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 359 [2021-11-09 10:45:38,731 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 393 states to 393 states and 555 transitions. [2021-11-09 10:45:38,731 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 393 [2021-11-09 10:45:38,732 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 393 [2021-11-09 10:45:38,732 INFO L73 IsDeterministic]: Start isDeterministic. Operand 393 states and 555 transitions. [2021-11-09 10:45:38,732 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 10:45:38,733 INFO L681 BuchiCegarLoop]: Abstraction has 393 states and 555 transitions. [2021-11-09 10:45:38,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states and 555 transitions. [2021-11-09 10:45:38,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2021-11-09 10:45:38,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 393 states have (on average 1.4122137404580153) internal successors, (555), 392 states have internal predecessors, (555), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:38,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 555 transitions. [2021-11-09 10:45:38,743 INFO L704 BuchiCegarLoop]: Abstraction has 393 states and 555 transitions. [2021-11-09 10:45:38,744 INFO L587 BuchiCegarLoop]: Abstraction has 393 states and 555 transitions. [2021-11-09 10:45:38,744 INFO L425 BuchiCegarLoop]: ======== Iteration 19============ [2021-11-09 10:45:38,744 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 393 states and 555 transitions. [2021-11-09 10:45:38,749 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 359 [2021-11-09 10:45:38,749 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:38,749 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:38,750 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:38,750 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:38,751 INFO L791 eck$LassoCheckResult]: Stem: 6568#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 6509#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 6476#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 6477#L212 assume 1 == ~b0_req_up~0; 6535#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 6536#L137-2 ~b0_req_up~0 := 0; 6559#L212-1 assume 1 == ~b1_req_up~0; 6495#L152 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 6496#L152-2 ~b1_req_up~0 := 0; 6556#L219 assume 1 == ~d0_req_up~0; 6480#L167 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 6481#L167-2 ~d0_req_up~0 := 0; 6470#L226 assume 1 == ~d1_req_up~0; 6471#L182 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 6482#L182-2 ~d1_req_up~0 := 0; 6483#L233 assume !(1 == ~z_req_up~0); 6491#L240 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 6492#L255-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 6503#L321-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 6489#L326-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 6490#L331-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 6461#L336-1 assume !(0 == ~z_ev~0); 6462#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 6570#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 6565#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 6528#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 6529#L390 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 6557#L390-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 6510#L354-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 6511#L359-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 6507#L364-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 6508#L369-1 assume !(1 == ~z_ev~0); 6515#L432-1 [2021-11-09 10:45:38,751 INFO L793 eck$LassoCheckResult]: Loop: 6515#L432-1 assume !false; 6542#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 6457#L295 assume !false; 6458#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 6484#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 6485#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 6455#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 6456#L290 assume !(0 != eval_~tmp___0~0); 6516#L311 start_simulation_~kernel_st~0 := 2; 6517#L212-2 assume !(1 == ~b0_req_up~0); 6545#L212-3 assume !(1 == ~b1_req_up~0); 6622#L219-1 assume !(1 == ~d0_req_up~0); 6618#L226-1 assume !(1 == ~d1_req_up~0); 6614#L233-1 assume !(1 == ~z_req_up~0); 6611#L240-1 start_simulation_~kernel_st~0 := 3; 6609#L321-2 assume !(0 == ~b0_ev~0); 6606#L321-4 assume !(0 == ~b1_ev~0); 6603#L326-3 assume !(0 == ~d0_ev~0); 6601#L331-3 assume !(0 == ~d1_ev~0); 6599#L336-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 6597#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 6594#L107-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 6595#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 6608#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 6605#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 6578#L390-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 6575#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 6573#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 6571#L364-3 assume !(1 == ~d1_ev~0); 6548#L369-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 6518#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 6519#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 6540#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 6506#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 6472#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 6473#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 6562#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 6541#L449 assume !(0 != start_simulation_~tmp~3); 6515#L432-1 [2021-11-09 10:45:38,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:38,751 INFO L85 PathProgramCache]: Analyzing trace with hash -1717325319, now seen corresponding path program 1 times [2021-11-09 10:45:38,752 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:38,752 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [995656843] [2021-11-09 10:45:38,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:38,752 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:38,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 10:45:38,765 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 10:45:38,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 10:45:38,805 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 10:45:38,805 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:38,806 INFO L85 PathProgramCache]: Analyzing trace with hash 1405059018, now seen corresponding path program 2 times [2021-11-09 10:45:38,806 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:38,806 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [5774582] [2021-11-09 10:45:38,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:38,806 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:38,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:38,836 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:38,837 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:38,837 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [5774582] [2021-11-09 10:45:38,837 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [5774582] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:38,837 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:38,837 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 10:45:38,838 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1589377039] [2021-11-09 10:45:38,838 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:38,838 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:38,839 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-11-09 10:45:38,839 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-11-09 10:45:38,839 INFO L87 Difference]: Start difference. First operand 393 states and 555 transitions. cyclomatic complexity: 163 Second operand has 5 states, 5 states have (on average 7.6) internal successors, (38), 5 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:38,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:38,904 INFO L93 Difference]: Finished difference Result 426 states and 602 transitions. [2021-11-09 10:45:38,905 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-11-09 10:45:38,905 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 426 states and 602 transitions. [2021-11-09 10:45:38,911 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 392 [2021-11-09 10:45:38,916 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 426 states to 426 states and 602 transitions. [2021-11-09 10:45:38,916 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 426 [2021-11-09 10:45:38,917 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 426 [2021-11-09 10:45:38,917 INFO L73 IsDeterministic]: Start isDeterministic. Operand 426 states and 602 transitions. [2021-11-09 10:45:38,918 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 10:45:38,918 INFO L681 BuchiCegarLoop]: Abstraction has 426 states and 602 transitions. [2021-11-09 10:45:38,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 426 states and 602 transitions. [2021-11-09 10:45:38,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 426 to 396. [2021-11-09 10:45:38,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 396 states, 396 states have (on average 1.4090909090909092) internal successors, (558), 395 states have internal predecessors, (558), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:38,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 396 states to 396 states and 558 transitions. [2021-11-09 10:45:38,930 INFO L704 BuchiCegarLoop]: Abstraction has 396 states and 558 transitions. [2021-11-09 10:45:38,930 INFO L587 BuchiCegarLoop]: Abstraction has 396 states and 558 transitions. [2021-11-09 10:45:38,930 INFO L425 BuchiCegarLoop]: ======== Iteration 20============ [2021-11-09 10:45:38,930 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 396 states and 558 transitions. [2021-11-09 10:45:38,933 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 362 [2021-11-09 10:45:38,933 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:38,934 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:38,935 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:38,935 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:38,935 INFO L791 eck$LassoCheckResult]: Stem: 7401#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 7343#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 7311#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 7312#L212 assume 1 == ~b0_req_up~0; 7370#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 7371#L137-2 ~b0_req_up~0 := 0; 7393#L212-1 assume 1 == ~b1_req_up~0; 7330#L152 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 7331#L152-2 ~b1_req_up~0 := 0; 7390#L219 assume 1 == ~d0_req_up~0; 7314#L167 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 7315#L167-2 ~d0_req_up~0 := 0; 7305#L226 assume 1 == ~d1_req_up~0; 7306#L182 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 7316#L182-2 ~d1_req_up~0 := 0; 7317#L233 assume !(1 == ~z_req_up~0); 7326#L240 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 7327#L255-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 7337#L321-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 7322#L326-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 7323#L331-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 7296#L336-1 assume !(0 == ~z_ev~0); 7297#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 7403#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 7399#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 7360#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 7361#L390 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 7391#L390-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 7344#L354-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 7345#L359-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 7341#L364-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 7342#L369-1 assume !(1 == ~z_ev~0); 7350#L432-1 [2021-11-09 10:45:38,936 INFO L793 eck$LassoCheckResult]: Loop: 7350#L432-1 assume !false; 7377#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 7292#L295 assume !false; 7293#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 7318#L268 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 7320#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 7405#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 7404#L290 assume !(0 != eval_~tmp___0~0); 7351#L311 start_simulation_~kernel_st~0 := 2; 7352#L212-2 assume !(1 == ~b0_req_up~0); 7380#L212-3 assume !(1 == ~b1_req_up~0); 7547#L219-1 assume !(1 == ~d0_req_up~0); 7522#L226-1 assume !(1 == ~d1_req_up~0); 7518#L233-1 assume !(1 == ~z_req_up~0); 7515#L240-1 start_simulation_~kernel_st~0 := 3; 7512#L321-2 assume !(0 == ~b0_ev~0); 7509#L321-4 assume !(0 == ~b1_ev~0); 7507#L326-3 assume !(0 == ~d0_ev~0); 7505#L331-3 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 7502#L336-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 7500#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 7499#L107-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 7488#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 7486#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 7481#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 7443#L390-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 7441#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 7429#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 7383#L364-3 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 7382#L369-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 7353#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 7354#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 7375#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 7340#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 7307#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 7308#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 7396#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 7376#L449 assume !(0 != start_simulation_~tmp~3); 7350#L432-1 [2021-11-09 10:45:38,936 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:38,936 INFO L85 PathProgramCache]: Analyzing trace with hash -1717325319, now seen corresponding path program 2 times [2021-11-09 10:45:38,936 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:38,937 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [279665055] [2021-11-09 10:45:38,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:38,937 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:38,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 10:45:38,950 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 10:45:38,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 10:45:38,984 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 10:45:38,987 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:38,987 INFO L85 PathProgramCache]: Analyzing trace with hash 371751180, now seen corresponding path program 1 times [2021-11-09 10:45:38,987 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:38,987 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1475837830] [2021-11-09 10:45:38,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:38,988 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:38,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 10:45:38,995 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 10:45:39,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 10:45:39,011 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 10:45:39,012 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:39,012 INFO L85 PathProgramCache]: Analyzing trace with hash -1049693948, now seen corresponding path program 1 times [2021-11-09 10:45:39,012 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:39,013 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [929349012] [2021-11-09 10:45:39,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:39,013 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:39,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:39,052 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:39,052 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:39,052 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [929349012] [2021-11-09 10:45:39,052 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [929349012] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:39,053 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:39,053 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 10:45:39,053 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [506425895] [2021-11-09 10:45:39,453 INFO L210 LassoAnalysis]: Preferences: [2021-11-09 10:45:39,453 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-11-09 10:45:39,453 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-11-09 10:45:39,454 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-11-09 10:45:39,454 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2021-11-09 10:45:39,454 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:39,454 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-11-09 10:45:39,454 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-11-09 10:45:39,454 INFO L133 ssoRankerPreferences]: Filename of dumped script: bist_cell.cil.c_Iteration20_Loop [2021-11-09 10:45:39,454 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-11-09 10:45:39,455 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-11-09 10:45:39,477 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,485 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,487 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,492 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,497 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,499 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,501 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,507 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,509 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,512 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,514 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,516 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,524 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,528 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,531 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,533 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,539 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,545 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,550 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,554 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,556 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,585 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,588 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:39,844 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-11-09 10:45:39,845 INFO L404 LassoAnalysis]: Checking for nontermination... [2021-11-09 10:45:39,847 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:39,848 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 10:45:39,853 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 10:45:39,864 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-11-09 10:45:39,864 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-11-09 10:45:39,873 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2021-11-09 10:45:39,897 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2021-11-09 10:45:39,898 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_stop_simulation_~__retres2~0=0} Honda state: {ULTIMATE.start_stop_simulation_~__retres2~0=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2021-11-09 10:45:39,937 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2021-11-09 10:45:39,937 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:39,937 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 10:45:39,938 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 10:45:39,940 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2021-11-09 10:45:39,941 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-11-09 10:45:39,941 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-11-09 10:45:39,962 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2021-11-09 10:45:39,962 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_stop_simulation_#t~ret10=0} Honda state: {ULTIMATE.start_stop_simulation_#t~ret10=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2021-11-09 10:45:39,984 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2021-11-09 10:45:39,984 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:39,984 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 10:45:39,985 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 10:45:39,987 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2021-11-09 10:45:39,988 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-11-09 10:45:39,988 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-11-09 10:45:40,045 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2021-11-09 10:45:40,045 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:40,046 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 10:45:40,047 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 10:45:40,053 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2021-11-09 10:45:40,053 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-11-09 10:45:40,061 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2021-11-09 10:45:40,089 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2021-11-09 10:45:40,122 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2021-11-09 10:45:40,123 INFO L210 LassoAnalysis]: Preferences: [2021-11-09 10:45:40,123 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-11-09 10:45:40,123 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-11-09 10:45:40,123 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-11-09 10:45:40,123 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-11-09 10:45:40,123 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:40,123 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-11-09 10:45:40,123 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-11-09 10:45:40,123 INFO L133 ssoRankerPreferences]: Filename of dumped script: bist_cell.cil.c_Iteration20_Loop [2021-11-09 10:45:40,123 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-11-09 10:45:40,123 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-11-09 10:45:40,126 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,140 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,142 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,145 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,162 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,167 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,172 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,175 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,179 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,182 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,187 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,198 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,201 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,204 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,206 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,209 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,214 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,220 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,223 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,229 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,234 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,237 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,239 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:40,510 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-11-09 10:45:40,514 INFO L490 LassoAnalysis]: Using template 'affine'. [2021-11-09 10:45:40,515 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:40,515 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 10:45:40,516 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 10:45:40,518 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2021-11-09 10:45:40,519 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-09 10:45:40,527 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-09 10:45:40,527 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-09 10:45:40,528 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-09 10:45:40,528 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-09 10:45:40,528 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-09 10:45:40,531 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-09 10:45:40,531 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-09 10:45:40,541 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-09 10:45:40,569 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2021-11-09 10:45:40,569 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:40,569 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 10:45:40,571 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 10:45:40,574 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2021-11-09 10:45:40,574 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-09 10:45:40,582 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-09 10:45:40,582 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-09 10:45:40,583 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-09 10:45:40,583 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-09 10:45:40,583 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-09 10:45:40,588 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-09 10:45:40,588 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-09 10:45:40,590 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-09 10:45:40,613 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2021-11-09 10:45:40,613 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:40,614 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 10:45:40,615 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 10:45:40,616 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2021-11-09 10:45:40,617 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-09 10:45:40,626 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-09 10:45:40,626 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-09 10:45:40,626 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-09 10:45:40,626 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-09 10:45:40,626 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-09 10:45:40,634 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-09 10:45:40,634 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-09 10:45:40,661 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-09 10:45:40,704 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2021-11-09 10:45:40,705 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:40,705 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 10:45:40,707 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 10:45:40,714 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-09 10:45:40,725 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-09 10:45:40,726 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-09 10:45:40,726 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-09 10:45:40,726 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-09 10:45:40,726 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-09 10:45:40,728 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-09 10:45:40,729 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-09 10:45:40,732 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2021-11-09 10:45:40,746 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-09 10:45:40,786 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2021-11-09 10:45:40,787 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:40,787 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 10:45:40,788 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 10:45:40,799 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-09 10:45:40,811 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-09 10:45:40,811 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-09 10:45:40,811 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-09 10:45:40,811 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-09 10:45:40,812 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-09 10:45:40,814 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-09 10:45:40,814 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-09 10:45:40,817 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2021-11-09 10:45:40,829 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2021-11-09 10:45:40,840 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2021-11-09 10:45:40,840 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2021-11-09 10:45:40,842 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:40,842 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 10:45:40,844 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 10:45:40,850 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2021-11-09 10:45:40,850 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2021-11-09 10:45:40,850 INFO L513 LassoAnalysis]: Proved termination. [2021-11-09 10:45:40,851 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(~b0_ev~0) = -2*~b0_ev~0 + 3 Supporting invariants [] [2021-11-09 10:45:40,867 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2021-11-09 10:45:40,895 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2021-11-09 10:45:40,897 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2021-11-09 10:45:40,922 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:40,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:40,968 INFO L263 TraceCheckSpWp]: Trace formula consists of 203 conjuncts, 2 conjunts are in the unsatisfiable core [2021-11-09 10:45:40,975 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-09 10:45:41,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:41,104 INFO L263 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 4 conjunts are in the unsatisfiable core [2021-11-09 10:45:41,106 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-09 10:45:41,448 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:41,454 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2021-11-09 10:45:41,455 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 396 states and 558 transitions. cyclomatic complexity: 163 Second operand has 5 states, 5 states have (on average 14.0) internal successors, (70), 5 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:41,610 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 396 states and 558 transitions. cyclomatic complexity: 163. Second operand has 5 states, 5 states have (on average 14.0) internal successors, (70), 5 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 1350 states and 1928 transitions. Complement of second has 7 states. [2021-11-09 10:45:41,611 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 2 non-accepting loop states 1 accepting loop states [2021-11-09 10:45:41,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 14.0) internal successors, (70), 5 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:41,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 256 transitions. [2021-11-09 10:45:41,615 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 256 transitions. Stem has 32 letters. Loop has 38 letters. [2021-11-09 10:45:41,618 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-11-09 10:45:41,619 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 256 transitions. Stem has 70 letters. Loop has 38 letters. [2021-11-09 10:45:41,623 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-11-09 10:45:41,624 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 256 transitions. Stem has 32 letters. Loop has 76 letters. [2021-11-09 10:45:41,626 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-11-09 10:45:41,627 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1350 states and 1928 transitions. [2021-11-09 10:45:41,644 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 937 [2021-11-09 10:45:41,657 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1350 states to 1278 states and 1828 transitions. [2021-11-09 10:45:41,658 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 972 [2021-11-09 10:45:41,685 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 977 [2021-11-09 10:45:41,685 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1278 states and 1828 transitions. [2021-11-09 10:45:41,686 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-09 10:45:41,686 INFO L681 BuchiCegarLoop]: Abstraction has 1278 states and 1828 transitions. [2021-11-09 10:45:41,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1278 states and 1828 transitions. [2021-11-09 10:45:41,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1278 to 911. [2021-11-09 10:45:41,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 911 states, 911 states have (on average 1.4281009879253568) internal successors, (1301), 910 states have internal predecessors, (1301), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:41,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 911 states to 911 states and 1301 transitions. [2021-11-09 10:45:41,760 INFO L704 BuchiCegarLoop]: Abstraction has 911 states and 1301 transitions. [2021-11-09 10:45:41,760 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:41,761 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 10:45:41,761 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 10:45:41,761 INFO L87 Difference]: Start difference. First operand 911 states and 1301 transitions. Second operand has 3 states, 3 states have (on average 23.333333333333332) internal successors, (70), 3 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:41,792 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Forceful destruction successful, exit code 0 [2021-11-09 10:45:41,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:41,808 INFO L93 Difference]: Finished difference Result 969 states and 1379 transitions. [2021-11-09 10:45:41,808 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 10:45:41,809 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 969 states and 1379 transitions. [2021-11-09 10:45:41,819 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 613 [2021-11-09 10:45:41,828 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 969 states to 969 states and 1379 transitions. [2021-11-09 10:45:41,829 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 648 [2021-11-09 10:45:41,830 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 648 [2021-11-09 10:45:41,830 INFO L73 IsDeterministic]: Start isDeterministic. Operand 969 states and 1379 transitions. [2021-11-09 10:45:41,832 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-09 10:45:41,832 INFO L681 BuchiCegarLoop]: Abstraction has 969 states and 1379 transitions. [2021-11-09 10:45:41,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 969 states and 1379 transitions. [2021-11-09 10:45:41,852 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 969 to 969. [2021-11-09 10:45:41,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 969 states, 969 states have (on average 1.4231166150670795) internal successors, (1379), 968 states have internal predecessors, (1379), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:41,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 969 states to 969 states and 1379 transitions. [2021-11-09 10:45:41,860 INFO L704 BuchiCegarLoop]: Abstraction has 969 states and 1379 transitions. [2021-11-09 10:45:41,860 INFO L587 BuchiCegarLoop]: Abstraction has 969 states and 1379 transitions. [2021-11-09 10:45:41,860 INFO L425 BuchiCegarLoop]: ======== Iteration 21============ [2021-11-09 10:45:41,861 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 969 states and 1379 transitions. [2021-11-09 10:45:41,868 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 613 [2021-11-09 10:45:41,868 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:41,868 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:41,870 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:41,870 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:41,870 INFO L791 eck$LassoCheckResult]: Stem: 11372#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 11244#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 11191#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 11192#L212 assume 1 == ~b0_req_up~0; 11295#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 11296#L137-2 ~b0_req_up~0 := 0; 11347#L212-1 assume 1 == ~b1_req_up~0; 11220#L152 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 11221#L152-2 ~b1_req_up~0 := 0; 11341#L219 assume 1 == ~d0_req_up~0; 11197#L167 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 11198#L167-2 ~d0_req_up~0 := 0; 11181#L226 assume 1 == ~d1_req_up~0; 11182#L182 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 11203#L182-2 ~d1_req_up~0 := 0; 11204#L233 assume !(1 == ~z_req_up~0); 11214#L240 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 11215#L255-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 11234#L321-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 11212#L326-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 11213#L331-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 11165#L336-1 assume !(0 == ~z_ev~0); 11166#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 11377#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 11366#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 11284#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 11285#L390 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 11342#L390-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 11245#L354-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 11246#L359-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 11242#L364-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 11243#L369-1 assume 1 == ~z_ev~0;~z_ev~0 := 2; 11260#L432-1 [2021-11-09 10:45:41,871 INFO L793 eck$LassoCheckResult]: Loop: 11260#L432-1 assume !false; 11797#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 11236#L295 assume !false; 11796#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 11795#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 11356#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 11357#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 11791#L290 assume 0 != eval_~tmp___0~0; 11790#L290-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet8;havoc eval_#t~nondet8; 11235#L299 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 11237#L52 assume !(0 != ~b0_val~0);method1_~s1~0 := 1; 11348#L52-1 assume !(0 != ~d0_val~0);method1_~s2~0 := 1; 11349#L61 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 11222#L73-2 assume !(0 != method1_~s2~0);method1_~s2~0 := 0; 11168#L79 assume 0 != method1_~s2~0;~z_val_t~0 := 0; 11209#L91-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 11780#L295 assume !false; 11779#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 11776#L268 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 11614#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 11615#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 11609#L290 assume !(0 != eval_~tmp___0~0); 11611#L311 start_simulation_~kernel_st~0 := 2; 11380#L212-2 assume !(1 == ~b0_req_up~0); 11320#L212-3 assume !(1 == ~b1_req_up~0); 11338#L219-1 assume !(1 == ~d0_req_up~0); 11941#L226-1 assume !(1 == ~d1_req_up~0); 11934#L233-1 assume !(1 == ~z_req_up~0); 11921#L240-1 start_simulation_~kernel_st~0 := 3; 11918#L321-2 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 11907#L321-4 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 11730#L326-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 11910#L331-3 assume !(0 == ~d1_ev~0); 11904#L336-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 11898#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 11875#L107-1 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 11873#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 11869#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 11864#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 11841#L390-5 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 11837#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 11830#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 11820#L364-3 assume !(1 == ~d1_ev~0); 11818#L369-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 11816#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 11814#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 11812#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 11810#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 11808#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 11805#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 11802#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 11800#L449 assume !(0 != start_simulation_~tmp~3); 11260#L432-1 [2021-11-09 10:45:41,871 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:41,871 INFO L85 PathProgramCache]: Analyzing trace with hash -1717325321, now seen corresponding path program 1 times [2021-11-09 10:45:41,872 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:41,872 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [728993284] [2021-11-09 10:45:41,872 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:41,872 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:41,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:41,903 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:41,903 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:41,903 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [728993284] [2021-11-09 10:45:41,904 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [728993284] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:41,904 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:41,904 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-09 10:45:41,904 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1493943491] [2021-11-09 10:45:41,904 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 10:45:41,905 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:41,905 INFO L85 PathProgramCache]: Analyzing trace with hash 466982362, now seen corresponding path program 1 times [2021-11-09 10:45:41,905 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:41,906 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [351087581] [2021-11-09 10:45:41,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:41,906 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:41,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:41,925 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:41,926 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:41,926 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [351087581] [2021-11-09 10:45:41,926 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [351087581] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:41,926 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:41,926 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 10:45:41,927 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [901025305] [2021-11-09 10:45:41,927 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:41,927 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:41,928 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 10:45:41,928 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 10:45:41,928 INFO L87 Difference]: Start difference. First operand 969 states and 1379 transitions. cyclomatic complexity: 413 Second operand has 3 states, 2 states have (on average 16.0) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:41,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:41,971 INFO L93 Difference]: Finished difference Result 1921 states and 2691 transitions. [2021-11-09 10:45:41,971 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 10:45:41,971 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1921 states and 2691 transitions. [2021-11-09 10:45:41,991 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 1226 [2021-11-09 10:45:42,010 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1921 states to 1921 states and 2691 transitions. [2021-11-09 10:45:42,011 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1279 [2021-11-09 10:45:42,013 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1279 [2021-11-09 10:45:42,013 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1921 states and 2691 transitions. [2021-11-09 10:45:42,015 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-09 10:45:42,016 INFO L681 BuchiCegarLoop]: Abstraction has 1921 states and 2691 transitions. [2021-11-09 10:45:42,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1921 states and 2691 transitions. [2021-11-09 10:45:42,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1921 to 1921. [2021-11-09 10:45:42,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1921 states, 1921 states have (on average 1.400832899531494) internal successors, (2691), 1920 states have internal predecessors, (2691), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:42,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1921 states to 1921 states and 2691 transitions. [2021-11-09 10:45:42,067 INFO L704 BuchiCegarLoop]: Abstraction has 1921 states and 2691 transitions. [2021-11-09 10:45:42,067 INFO L587 BuchiCegarLoop]: Abstraction has 1921 states and 2691 transitions. [2021-11-09 10:45:42,067 INFO L425 BuchiCegarLoop]: ======== Iteration 22============ [2021-11-09 10:45:42,067 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1921 states and 2691 transitions. [2021-11-09 10:45:42,082 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 1226 [2021-11-09 10:45:42,082 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:42,083 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:42,084 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:42,084 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:42,085 INFO L791 eck$LassoCheckResult]: Stem: 14270#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 14142#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 14088#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 14089#L212 assume 1 == ~b0_req_up~0; 14193#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 14194#L137-2 ~b0_req_up~0 := 0; 14246#L212-1 assume 1 == ~b1_req_up~0; 14117#L152 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 14118#L152-2 ~b1_req_up~0 := 0; 14244#L219 assume 1 == ~d0_req_up~0; 14093#L167 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 14094#L167-2 ~d0_req_up~0 := 0; 14078#L226 assume 1 == ~d1_req_up~0; 14079#L182 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 14099#L182-2 ~d1_req_up~0 := 0; 14100#L233 assume !(1 == ~z_req_up~0); 14195#L240 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 14283#L255-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 14282#L321-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 14281#L326-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 14112#L331-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 14062#L336-1 assume !(0 == ~z_ev~0); 14063#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 14825#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 14824#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 14182#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 14183#L390 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 14245#L390-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 14269#L354-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 14818#L359-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 14817#L364-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 14815#L369-1 assume !(1 == ~z_ev~0); 14806#L432-1 assume !false; 14807#L433 [2021-11-09 10:45:42,085 INFO L793 eck$LassoCheckResult]: Loop: 14807#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 15018#L295 assume !false; 15045#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 15044#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 14977#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 15034#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 15028#L290 assume 0 != eval_~tmp___0~0; 15023#L290-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet8;havoc eval_#t~nondet8; 14987#L299 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 15009#L52 assume !(0 != ~b0_val~0);method1_~s1~0 := 1; 15002#L52-1 assume !(0 != ~d0_val~0);method1_~s2~0 := 1; 14998#L61 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 14995#L73-2 assume !(0 != method1_~s2~0);method1_~s2~0 := 0; 14990#L79 assume 0 != method1_~s2~0;~z_val_t~0 := 0; 14985#L91-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 14983#L295 assume !false; 14980#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 14976#L268 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 14971#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 14967#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 14965#L290 assume !(0 != eval_~tmp___0~0); 14963#L311 start_simulation_~kernel_st~0 := 2; 14962#L212-2 assume !(1 == ~b0_req_up~0); 14960#L212-3 assume !(1 == ~b1_req_up~0); 14958#L219-1 assume !(1 == ~d0_req_up~0); 14954#L226-1 assume !(1 == ~d1_req_up~0); 14951#L233-1 assume !(1 == ~z_req_up~0); 14952#L240-1 start_simulation_~kernel_st~0 := 3; 15248#L321-2 assume !(0 == ~b0_ev~0); 15245#L321-4 assume !(0 == ~b1_ev~0); 15241#L326-3 assume !(0 == ~d0_ev~0); 15238#L331-3 assume !(0 == ~d1_ev~0); 15234#L336-3 assume !(0 == ~z_ev~0); 15230#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 15228#L107-1 assume !(1 == ~b0_ev~0); 15224#L111-1 assume 1 == ~b1_ev~0;is_method1_triggered_~__retres1~0 := 1; 15225#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 15755#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 15753#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 15752#L390-5 assume !(1 == ~b0_ev~0); 14855#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 14856#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 15088#L364-3 assume !(1 == ~d1_ev~0); 15082#L369-3 assume !(1 == ~z_ev~0); 15077#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 15075#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 15030#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 15068#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 15064#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 15060#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 15057#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 15054#L449 assume !(0 != start_simulation_~tmp~3); 15050#L432-1 assume !false; 14807#L433 [2021-11-09 10:45:42,086 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:42,086 INFO L85 PathProgramCache]: Analyzing trace with hash -1697477152, now seen corresponding path program 1 times [2021-11-09 10:45:42,086 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:42,086 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1140793266] [2021-11-09 10:45:42,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:42,087 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:42,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 10:45:42,098 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 10:45:42,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 10:45:42,123 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 10:45:42,124 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:42,124 INFO L85 PathProgramCache]: Analyzing trace with hash 100562712, now seen corresponding path program 1 times [2021-11-09 10:45:42,124 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:42,124 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1607839535] [2021-11-09 10:45:42,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:42,125 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:42,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:42,144 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:42,144 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:42,149 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1607839535] [2021-11-09 10:45:42,149 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1607839535] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:42,150 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:42,150 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 10:45:42,150 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1685172048] [2021-11-09 10:45:42,150 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:42,151 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:42,151 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 10:45:42,151 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 10:45:42,152 INFO L87 Difference]: Start difference. First operand 1921 states and 2691 transitions. cyclomatic complexity: 773 Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:42,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:42,199 INFO L93 Difference]: Finished difference Result 3753 states and 5233 transitions. [2021-11-09 10:45:42,199 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 10:45:42,200 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 3753 states and 5233 transitions. [2021-11-09 10:45:42,236 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 2428 [2021-11-09 10:45:42,272 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 3753 states to 3753 states and 5233 transitions. [2021-11-09 10:45:42,272 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2481 [2021-11-09 10:45:42,277 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2481 [2021-11-09 10:45:42,277 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3753 states and 5233 transitions. [2021-11-09 10:45:42,281 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-09 10:45:42,281 INFO L681 BuchiCegarLoop]: Abstraction has 3753 states and 5233 transitions. [2021-11-09 10:45:42,285 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3753 states and 5233 transitions. [2021-11-09 10:45:42,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3753 to 1939. [2021-11-09 10:45:42,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1939 states, 1939 states have (on average 1.3971119133574008) internal successors, (2709), 1938 states have internal predecessors, (2709), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:42,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1939 states to 1939 states and 2709 transitions. [2021-11-09 10:45:42,354 INFO L704 BuchiCegarLoop]: Abstraction has 1939 states and 2709 transitions. [2021-11-09 10:45:42,355 INFO L587 BuchiCegarLoop]: Abstraction has 1939 states and 2709 transitions. [2021-11-09 10:45:42,355 INFO L425 BuchiCegarLoop]: ======== Iteration 23============ [2021-11-09 10:45:42,356 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1939 states and 2709 transitions. [2021-11-09 10:45:42,401 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 1238 [2021-11-09 10:45:42,402 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:42,402 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:42,403 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:42,404 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:42,404 INFO L791 eck$LassoCheckResult]: Stem: 19960#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 19823#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 19770#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 19771#L212 assume 1 == ~b0_req_up~0; 19874#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 19875#L137-2 ~b0_req_up~0 := 0; 19932#L212-1 assume 1 == ~b1_req_up~0; 19798#L152 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 19799#L152-2 ~b1_req_up~0 := 0; 19923#L219 assume 1 == ~d0_req_up~0; 19775#L167 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 19776#L167-2 ~d0_req_up~0 := 0; 19760#L226 assume 1 == ~d1_req_up~0; 19761#L182 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 19781#L182-2 ~d1_req_up~0 := 0; 19782#L233 assume !(1 == ~z_req_up~0); 19876#L240 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 19982#L255-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 19981#L321-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 19980#L326-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 19793#L331-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 19742#L336-1 assume !(0 == ~z_ev~0); 19743#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 19962#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 19963#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 19864#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 19865#L390 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 19958#L390-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 19959#L354-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 19924#L359-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 19925#L364-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 19839#L369-1 assume !(1 == ~z_ev~0); 19840#L432-1 assume !false; 19889#L433 [2021-11-09 10:45:42,404 INFO L793 eck$LassoCheckResult]: Loop: 19889#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 19734#L295 assume !false; 19735#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 19777#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 19778#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 19730#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 19731#L290 assume 0 != eval_~tmp___0~0; 19956#L290-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet8;havoc eval_#t~nondet8; 19815#L299 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 19816#L52 assume !(0 != ~b0_val~0);method1_~s1~0 := 1; 19937#L52-1 assume 0 != ~d0_val~0; 19938#L62 assume 0 != ~b1_val~0;method1_~s2~0 := 0; 19989#L61 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 19934#L73-2 assume !(0 != method1_~s2~0);method1_~s2~0 := 0; 19990#L79 assume 0 != method1_~s2~0;~z_val_t~0 := 0; 19786#L91-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 19892#L295 assume !false; 20542#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 20543#L268 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 20615#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 20616#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 20609#L290 assume !(0 != eval_~tmp___0~0); 20610#L311 start_simulation_~kernel_st~0 := 2; 20755#L212-2 assume !(1 == ~b0_req_up~0); 20752#L212-3 assume !(1 == ~b1_req_up~0); 20749#L219-1 assume !(1 == ~d0_req_up~0); 20738#L226-1 assume !(1 == ~d1_req_up~0); 20735#L233-1 assume !(1 == ~z_req_up~0); 20736#L240-1 start_simulation_~kernel_st~0 := 3; 21559#L321-2 assume !(0 == ~b0_ev~0); 21557#L321-4 assume !(0 == ~b1_ev~0); 21556#L326-3 assume !(0 == ~d0_ev~0); 21552#L331-3 assume !(0 == ~d1_ev~0); 21551#L336-3 assume !(0 == ~z_ev~0); 21548#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 21547#L107-1 assume !(1 == ~b0_ev~0); 21546#L111-1 assume 1 == ~b1_ev~0;is_method1_triggered_~__retres1~0 := 1; 21531#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 21527#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 21520#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 21517#L390-5 assume !(1 == ~b0_ev~0); 21509#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 21507#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 21505#L364-3 assume !(1 == ~d1_ev~0); 19906#L369-3 assume !(1 == ~z_ev~0); 19841#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 19842#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 19882#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 19819#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 19762#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 19763#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 19946#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 19885#L449 assume !(0 != start_simulation_~tmp~3); 19886#L432-1 assume !false; 19889#L433 [2021-11-09 10:45:42,405 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:42,405 INFO L85 PathProgramCache]: Analyzing trace with hash -1697477152, now seen corresponding path program 2 times [2021-11-09 10:45:42,405 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:42,405 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [714913828] [2021-11-09 10:45:42,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:42,406 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:42,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 10:45:42,416 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 10:45:42,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 10:45:42,433 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 10:45:42,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:42,435 INFO L85 PathProgramCache]: Analyzing trace with hash -614486231, now seen corresponding path program 1 times [2021-11-09 10:45:42,435 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:42,435 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1068809946] [2021-11-09 10:45:42,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:42,435 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:42,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:42,452 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:42,452 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:42,452 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1068809946] [2021-11-09 10:45:42,453 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1068809946] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:42,453 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:42,453 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 10:45:42,453 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [462612265] [2021-11-09 10:45:42,453 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:42,454 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:42,454 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 10:45:42,454 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 10:45:42,456 INFO L87 Difference]: Start difference. First operand 1939 states and 2709 transitions. cyclomatic complexity: 773 Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:42,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:42,492 INFO L93 Difference]: Finished difference Result 3747 states and 5203 transitions. [2021-11-09 10:45:42,493 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 10:45:42,493 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 3747 states and 5203 transitions. [2021-11-09 10:45:42,519 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 2424 [2021-11-09 10:45:42,548 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 3747 states to 3747 states and 5203 transitions. [2021-11-09 10:45:42,549 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2477 [2021-11-09 10:45:42,552 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2477 [2021-11-09 10:45:42,552 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3747 states and 5203 transitions. [2021-11-09 10:45:42,553 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-09 10:45:42,553 INFO L681 BuchiCegarLoop]: Abstraction has 3747 states and 5203 transitions. [2021-11-09 10:45:42,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3747 states and 5203 transitions. [2021-11-09 10:45:42,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3747 to 1939. [2021-11-09 10:45:42,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1939 states, 1939 states have (on average 1.3878287777204745) internal successors, (2691), 1938 states have internal predecessors, (2691), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:42,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1939 states to 1939 states and 2691 transitions. [2021-11-09 10:45:42,610 INFO L704 BuchiCegarLoop]: Abstraction has 1939 states and 2691 transitions. [2021-11-09 10:45:42,610 INFO L587 BuchiCegarLoop]: Abstraction has 1939 states and 2691 transitions. [2021-11-09 10:45:42,610 INFO L425 BuchiCegarLoop]: ======== Iteration 24============ [2021-11-09 10:45:42,610 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1939 states and 2691 transitions. [2021-11-09 10:45:42,620 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 1238 [2021-11-09 10:45:42,620 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:42,620 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:42,621 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:42,621 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:42,622 INFO L791 eck$LassoCheckResult]: Stem: 25658#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 25519#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 25462#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 25463#L212 assume 1 == ~b0_req_up~0; 25570#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 25571#L137-2 ~b0_req_up~0 := 0; 25628#L212-1 assume 1 == ~b1_req_up~0; 25491#L152 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 25492#L152-2 ~b1_req_up~0 := 0; 25622#L219 assume 1 == ~d0_req_up~0; 25467#L167 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 25468#L167-2 ~d0_req_up~0 := 0; 25452#L226 assume 1 == ~d1_req_up~0; 25453#L182 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 25473#L182-2 ~d1_req_up~0 := 0; 25474#L233 assume !(1 == ~z_req_up~0); 25572#L240 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 25683#L255-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 25682#L321-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 25681#L326-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 25486#L331-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 25434#L336-1 assume !(0 == ~z_ev~0); 25435#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 25668#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 25651#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 25652#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 25625#L390 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 25626#L390-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 25520#L354-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 25521#L359-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 25517#L364-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 25518#L369-1 assume !(1 == ~z_ev~0); 25697#L432-1 assume !false; 25698#L433 [2021-11-09 10:45:42,622 INFO L793 eck$LassoCheckResult]: Loop: 25698#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 26424#L295 assume !false; 26430#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 26428#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 26384#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 26427#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 26426#L290 assume 0 != eval_~tmp___0~0; 26425#L290-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet8;havoc eval_#t~nondet8; 26390#L299 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 26423#L52 assume !(0 != ~b0_val~0);method1_~s1~0 := 1; 26420#L52-1 assume !(0 != ~d0_val~0);method1_~s2~0 := 1; 26418#L61 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 26416#L73-2 assume 0 != method1_~s2~0; 26414#L80 assume 0 != method1_~s1~0;method1_~s2~0 := 1; 26412#L79 assume 0 != method1_~s2~0;~z_val_t~0 := 0; 26388#L91-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 26387#L295 assume !false; 26385#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 26383#L268 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 26381#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 26380#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 26378#L290 assume !(0 != eval_~tmp___0~0); 26377#L311 start_simulation_~kernel_st~0 := 2; 26374#L212-2 assume !(1 == ~b0_req_up~0); 26371#L212-3 assume !(1 == ~b1_req_up~0); 26348#L219-1 assume !(1 == ~d0_req_up~0); 26342#L226-1 assume !(1 == ~d1_req_up~0); 26334#L233-1 assume !(1 == ~z_req_up~0); 26335#L240-1 start_simulation_~kernel_st~0 := 3; 26514#L321-2 assume !(0 == ~b0_ev~0); 26512#L321-4 assume !(0 == ~b1_ev~0); 26510#L326-3 assume !(0 == ~d0_ev~0); 26506#L331-3 assume !(0 == ~d1_ev~0); 26503#L336-3 assume !(0 == ~z_ev~0); 26500#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 26497#L107-1 assume !(1 == ~b0_ev~0); 26494#L111-1 assume 1 == ~b1_ev~0;is_method1_triggered_~__retres1~0 := 1; 26495#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 26642#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 26640#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 26639#L390-5 assume !(1 == ~b0_ev~0); 26634#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 26473#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 26460#L364-3 assume !(1 == ~d1_ev~0); 26455#L369-3 assume !(1 == ~z_ev~0); 26451#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 26449#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 26446#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 26445#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 26443#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 26440#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 26438#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 26436#L449 assume !(0 != start_simulation_~tmp~3); 26434#L432-1 assume !false; 25698#L433 [2021-11-09 10:45:42,623 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:42,623 INFO L85 PathProgramCache]: Analyzing trace with hash -1697477152, now seen corresponding path program 3 times [2021-11-09 10:45:42,623 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:42,623 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1687891690] [2021-11-09 10:45:42,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:42,624 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:42,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 10:45:42,632 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 10:45:42,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 10:45:42,653 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 10:45:42,655 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:42,656 INFO L85 PathProgramCache]: Analyzing trace with hash -1807200198, now seen corresponding path program 1 times [2021-11-09 10:45:42,656 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:42,656 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1763588974] [2021-11-09 10:45:42,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:42,657 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:42,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:42,677 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:42,677 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:42,678 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1763588974] [2021-11-09 10:45:42,678 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1763588974] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:42,678 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:42,678 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 10:45:42,678 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [240496010] [2021-11-09 10:45:42,679 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 10:45:42,679 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:42,679 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 10:45:42,680 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 10:45:42,680 INFO L87 Difference]: Start difference. First operand 1939 states and 2691 transitions. cyclomatic complexity: 755 Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:42,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:42,719 INFO L93 Difference]: Finished difference Result 2427 states and 3367 transitions. [2021-11-09 10:45:42,720 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 10:45:42,720 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2427 states and 3367 transitions. [2021-11-09 10:45:42,736 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 1588 [2021-11-09 10:45:42,758 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2427 states to 2427 states and 3367 transitions. [2021-11-09 10:45:42,758 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1641 [2021-11-09 10:45:42,760 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1641 [2021-11-09 10:45:42,761 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2427 states and 3367 transitions. [2021-11-09 10:45:42,761 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-09 10:45:42,761 INFO L681 BuchiCegarLoop]: Abstraction has 2427 states and 3367 transitions. [2021-11-09 10:45:42,764 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2427 states and 3367 transitions. [2021-11-09 10:45:42,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2427 to 2295. [2021-11-09 10:45:42,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2295 states, 2295 states have (on average 1.3886710239651416) internal successors, (3187), 2294 states have internal predecessors, (3187), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:42,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2295 states to 2295 states and 3187 transitions. [2021-11-09 10:45:42,827 INFO L704 BuchiCegarLoop]: Abstraction has 2295 states and 3187 transitions. [2021-11-09 10:45:42,827 INFO L587 BuchiCegarLoop]: Abstraction has 2295 states and 3187 transitions. [2021-11-09 10:45:42,828 INFO L425 BuchiCegarLoop]: ======== Iteration 25============ [2021-11-09 10:45:42,828 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2295 states and 3187 transitions. [2021-11-09 10:45:42,839 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 1500 [2021-11-09 10:45:42,839 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:42,839 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:42,841 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:42,841 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:42,842 INFO L791 eck$LassoCheckResult]: Stem: 30035#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 29890#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 29834#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 29835#L212 assume 1 == ~b0_req_up~0; 29941#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 29942#L137-2 ~b0_req_up~0 := 0; 30001#L212-1 assume 1 == ~b1_req_up~0; 29863#L152 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 29864#L152-2 ~b1_req_up~0 := 0; 29993#L219 assume 1 == ~d0_req_up~0; 29839#L167 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 29840#L167-2 ~d0_req_up~0 := 0; 29824#L226 assume 1 == ~d1_req_up~0; 29825#L182 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 29845#L182-2 ~d1_req_up~0 := 0; 29846#L233 assume !(1 == ~z_req_up~0); 29856#L240 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 29857#L255-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 30057#L321-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 30056#L326-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 29858#L331-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 29806#L336-1 assume !(0 == ~z_ev~0); 29807#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 30048#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 30025#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 30026#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 29996#L390 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 29997#L390-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 29891#L354-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 29892#L359-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 29888#L364-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 29889#L369-1 assume !(1 == ~z_ev~0); 30072#L432-1 assume !false; 30073#L433 [2021-11-09 10:45:42,842 INFO L793 eck$LassoCheckResult]: Loop: 30073#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 31707#L295 assume !false; 31790#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 29841#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 29842#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 29794#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 29795#L290 assume 0 != eval_~tmp___0~0; 30029#L290-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet8;havoc eval_#t~nondet8; 30030#L299 assume 0 != eval_~tmp~0;~comp_m1_st~0 := 1;havoc method1_~s1~0, method1_~s2~0, method1_~s3~0;havoc method1_~s1~0;havoc method1_~s2~0;havoc method1_~s3~0; 31706#L52 assume !(0 != ~b0_val~0);method1_~s1~0 := 1; 31700#L52-1 assume !(0 != ~d0_val~0);method1_~s2~0 := 1; 31696#L61 assume 0 != method1_~s2~0;method1_~s3~0 := 0; 31692#L73-2 assume 0 != method1_~s2~0; 29808#L80 assume 0 != method1_~s1~0;method1_~s2~0 := 1; 29809#L79 assume 0 != method1_~s2~0;~z_val_t~0 := 0; 29952#L91-2 ~z_req_up~0 := 1;~comp_m1_st~0 := 2; 29953#L295 assume !false; 31698#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 31699#L268 assume !(0 == ~comp_m1_st~0);exists_runnable_thread_~__retres1~1 := 0; 31690#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 31691#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 31685#L290 assume !(0 != eval_~tmp___0~0); 31687#L311 start_simulation_~kernel_st~0 := 2; 30049#L212-2 assume !(1 == ~b0_req_up~0); 30050#L212-3 assume !(1 == ~b1_req_up~0); 31159#L219-1 assume !(1 == ~d0_req_up~0); 31743#L226-1 assume !(1 == ~d1_req_up~0); 31637#L233-1 assume 1 == ~z_req_up~0; 31634#L197-3 assume ~z_val~0 != ~z_val_t~0;~z_val~0 := ~z_val_t~0;~z_ev~0 := 0; 31629#L197-5 ~z_req_up~0 := 0; 31626#L240-1 start_simulation_~kernel_st~0 := 3; 30814#L321-2 assume !(0 == ~b0_ev~0); 30815#L321-4 assume !(0 == ~b1_ev~0); 30802#L326-3 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 30803#L331-3 assume !(0 == ~d1_ev~0); 31238#L336-3 assume 0 == ~z_ev~0;~z_ev~0 := 1; 31234#L341-3 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 31235#L107-1 assume !(1 == ~b0_ev~0); 31475#L111-1 assume 1 == ~b1_ev~0;is_method1_triggered_~__retres1~0 := 1; 31226#L129-1 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 31224#L130-1 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 31222#L390-3 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 31219#L390-5 assume !(1 == ~b0_ev~0); 31220#L354-3 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 30704#L359-3 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 30705#L364-3 assume !(1 == ~d1_ev~0); 31439#L369-3 assume 1 == ~z_ev~0;~z_ev~0 := 2; 31440#L374-3 havoc stop_simulation_#res;havoc stop_simulation_#t~ret10, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 31811#L268-1 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 31717#L275-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 31810#L276-1 stop_simulation_#t~ret10 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret10;havoc stop_simulation_#t~ret10; 31809#L407 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 31808#L414 stop_simulation_#res := stop_simulation_~__retres2~0; 31807#L415 start_simulation_#t~ret11 := stop_simulation_#res;start_simulation_~tmp~3 := start_simulation_#t~ret11;havoc start_simulation_#t~ret11; 31806#L449 assume !(0 != start_simulation_~tmp~3); 31805#L432-1 assume !false; 30073#L433 [2021-11-09 10:45:42,843 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:42,843 INFO L85 PathProgramCache]: Analyzing trace with hash -1697477152, now seen corresponding path program 4 times [2021-11-09 10:45:42,843 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:42,843 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [486873427] [2021-11-09 10:45:42,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:42,844 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:42,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 10:45:42,853 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 10:45:42,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 10:45:42,869 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 10:45:42,869 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:42,870 INFO L85 PathProgramCache]: Analyzing trace with hash 722131442, now seen corresponding path program 1 times [2021-11-09 10:45:42,870 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:42,870 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [293298133] [2021-11-09 10:45:42,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:42,870 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:42,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 10:45:42,879 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 10:45:42,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 10:45:42,894 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 10:45:42,895 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:42,895 INFO L85 PathProgramCache]: Analyzing trace with hash 1824931537, now seen corresponding path program 1 times [2021-11-09 10:45:42,895 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:42,895 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [641201549] [2021-11-09 10:45:42,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:42,896 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:42,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:42,969 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 10:45:42,970 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 10:45:42,970 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [641201549] [2021-11-09 10:45:42,970 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [641201549] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 10:45:42,970 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 10:45:42,971 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-09 10:45:42,971 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1299256323] [2021-11-09 10:45:43,705 INFO L210 LassoAnalysis]: Preferences: [2021-11-09 10:45:43,705 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-11-09 10:45:43,705 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-11-09 10:45:43,705 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-11-09 10:45:43,705 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2021-11-09 10:45:43,705 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:43,705 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-11-09 10:45:43,705 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-11-09 10:45:43,705 INFO L133 ssoRankerPreferences]: Filename of dumped script: bist_cell.cil.c_Iteration25_Loop [2021-11-09 10:45:43,705 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-11-09 10:45:43,705 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-11-09 10:45:43,708 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,713 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,719 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,721 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,726 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,733 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,737 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,741 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,746 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,748 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,751 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,759 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,764 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,767 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,770 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,772 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,775 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,778 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,785 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,792 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,795 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,798 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,801 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,807 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,813 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,815 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,817 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:43,820 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,127 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-11-09 10:45:44,128 INFO L404 LassoAnalysis]: Checking for nontermination... [2021-11-09 10:45:44,128 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:44,128 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 10:45:44,132 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 10:45:44,141 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-11-09 10:45:44,141 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-11-09 10:45:44,153 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2021-11-09 10:45:44,178 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2021-11-09 10:45:44,178 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_start_simulation_#t~ret11=0} Honda state: {ULTIMATE.start_start_simulation_#t~ret11=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2021-11-09 10:45:44,208 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2021-11-09 10:45:44,209 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:44,209 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 10:45:44,210 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 10:45:44,218 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-11-09 10:45:44,218 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-11-09 10:45:44,232 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2021-11-09 10:45:44,237 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2021-11-09 10:45:44,238 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~b0_ev~0=-1} Honda state: {~b0_ev~0=-1} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2021-11-09 10:45:44,271 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2021-11-09 10:45:44,271 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:44,272 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 10:45:44,273 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 10:45:44,282 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-11-09 10:45:44,283 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-11-09 10:45:44,295 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2021-11-09 10:45:44,304 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2021-11-09 10:45:44,304 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_activate_threads_#t~ret9=0} Honda state: {ULTIMATE.start_activate_threads_#t~ret9=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2021-11-09 10:45:44,345 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Forceful destruction successful, exit code 0 [2021-11-09 10:45:44,346 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:44,346 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 10:45:44,347 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 10:45:44,355 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2021-11-09 10:45:44,355 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-11-09 10:45:44,367 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2021-11-09 10:45:44,419 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Forceful destruction successful, exit code 0 [2021-11-09 10:45:44,419 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:44,420 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 10:45:44,421 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 10:45:44,427 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2021-11-09 10:45:44,427 INFO L160 nArgumentSynthesizer]: Using integer mode. [2021-11-09 10:45:44,441 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2021-11-09 10:45:44,449 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2021-11-09 10:45:44,491 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Ended with exit code 0 [2021-11-09 10:45:44,491 INFO L210 LassoAnalysis]: Preferences: [2021-11-09 10:45:44,491 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2021-11-09 10:45:44,492 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2021-11-09 10:45:44,492 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2021-11-09 10:45:44,492 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2021-11-09 10:45:44,492 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:44,492 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2021-11-09 10:45:44,492 INFO L132 ssoRankerPreferences]: Path of dumped script: [2021-11-09 10:45:44,492 INFO L133 ssoRankerPreferences]: Filename of dumped script: bist_cell.cil.c_Iteration25_Loop [2021-11-09 10:45:44,492 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2021-11-09 10:45:44,492 INFO L276 LassoAnalysis]: Starting lasso preprocessing... [2021-11-09 10:45:44,495 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,500 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,502 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,507 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,513 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,516 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,519 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,527 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,533 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,536 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,540 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,547 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,556 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,559 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,562 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,565 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,568 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,572 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,575 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,578 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,581 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,584 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,588 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,590 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,596 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,599 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,606 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,614 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2021-11-09 10:45:44,968 INFO L294 LassoAnalysis]: Preprocessing complete. [2021-11-09 10:45:44,968 INFO L490 LassoAnalysis]: Using template 'affine'. [2021-11-09 10:45:44,968 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:44,968 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 10:45:44,975 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 10:45:44,981 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-09 10:45:44,991 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-09 10:45:44,991 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-09 10:45:44,991 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-09 10:45:44,991 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-09 10:45:44,991 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-09 10:45:44,993 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-09 10:45:44,993 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-09 10:45:44,994 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2021-11-09 10:45:45,001 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-09 10:45:45,045 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Forceful destruction successful, exit code 0 [2021-11-09 10:45:45,045 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:45,045 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 10:45:45,047 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 10:45:45,053 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-09 10:45:45,063 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-09 10:45:45,063 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-09 10:45:45,063 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-09 10:45:45,063 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-09 10:45:45,063 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-09 10:45:45,064 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-09 10:45:45,064 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-09 10:45:45,065 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2021-11-09 10:45:45,075 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-09 10:45:45,098 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2021-11-09 10:45:45,098 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:45,099 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 10:45:45,099 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 10:45:45,101 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2021-11-09 10:45:45,101 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-09 10:45:45,110 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-09 10:45:45,110 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-09 10:45:45,110 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-09 10:45:45,110 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2021-11-09 10:45:45,110 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-09 10:45:45,125 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2021-11-09 10:45:45,125 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-09 10:45:45,135 INFO L527 LassoAnalysis]: Proving termination failed for this template and these settings. [2021-11-09 10:45:45,162 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Forceful destruction successful, exit code 0 [2021-11-09 10:45:45,162 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:45,162 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 10:45:45,163 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 10:45:45,175 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2021-11-09 10:45:45,176 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2021-11-09 10:45:45,184 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2021-11-09 10:45:45,184 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2021-11-09 10:45:45,184 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2021-11-09 10:45:45,184 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2021-11-09 10:45:45,184 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2021-11-09 10:45:45,186 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2021-11-09 10:45:45,186 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2021-11-09 10:45:45,213 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2021-11-09 10:45:45,216 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2021-11-09 10:45:45,217 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2021-11-09 10:45:45,217 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 10:45:45,217 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 10:45:45,222 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 10:45:45,224 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2021-11-09 10:45:45,224 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2021-11-09 10:45:45,224 INFO L513 LassoAnalysis]: Proved termination. [2021-11-09 10:45:45,224 INFO L515 LassoAnalysis]: Termination argument consisting of: Ranking function f(~d0_ev~0) = -1*~d0_ev~0 + 1 Supporting invariants [] [2021-11-09 10:45:45,247 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2021-11-09 10:45:45,266 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Forceful destruction successful, exit code 0 [2021-11-09 10:45:45,266 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2021-11-09 10:45:45,281 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:45,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:45,321 INFO L263 TraceCheckSpWp]: Trace formula consists of 204 conjuncts, 2 conjunts are in the unsatisfiable core [2021-11-09 10:45:45,323 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-09 10:45:45,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 10:45:45,451 INFO L263 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 4 conjunts are in the unsatisfiable core [2021-11-09 10:45:45,453 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-09 10:45:45,847 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2021-11-09 10:45:45,849 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2021-11-09 10:45:45,849 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 2295 states and 3187 transitions. cyclomatic complexity: 895 Second operand has 5 states, 5 states have (on average 17.0) internal successors, (85), 5 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:45,910 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 2295 states and 3187 transitions. cyclomatic complexity: 895. Second operand has 5 states, 5 states have (on average 17.0) internal successors, (85), 5 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 5920 states and 8251 transitions. Complement of second has 5 states. [2021-11-09 10:45:45,911 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2021-11-09 10:45:45,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 17.0) internal successors, (85), 5 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:45,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 148 transitions. [2021-11-09 10:45:45,912 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 148 transitions. Stem has 33 letters. Loop has 56 letters. [2021-11-09 10:45:45,914 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-11-09 10:45:45,914 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 148 transitions. Stem has 89 letters. Loop has 56 letters. [2021-11-09 10:45:45,915 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-11-09 10:45:45,915 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 148 transitions. Stem has 33 letters. Loop has 112 letters. [2021-11-09 10:45:45,916 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2021-11-09 10:45:45,916 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 5920 states and 8251 transitions. [2021-11-09 10:45:45,953 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 2448 [2021-11-09 10:45:46,005 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 5920 states to 5560 states and 7739 transitions. [2021-11-09 10:45:46,006 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2515 [2021-11-09 10:45:46,009 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2526 [2021-11-09 10:45:46,010 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5560 states and 7739 transitions. [2021-11-09 10:45:46,013 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-09 10:45:46,013 INFO L681 BuchiCegarLoop]: Abstraction has 5560 states and 7739 transitions. [2021-11-09 10:45:46,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5560 states and 7739 transitions. [2021-11-09 10:45:46,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5560 to 5549. [2021-11-09 10:45:46,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5549 states, 5549 states have (on average 1.3919625157686069) internal successors, (7724), 5548 states have internal predecessors, (7724), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:46,202 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Forceful destruction successful, exit code 0 [2021-11-09 10:45:46,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5549 states to 5549 states and 7724 transitions. [2021-11-09 10:45:46,213 INFO L704 BuchiCegarLoop]: Abstraction has 5549 states and 7724 transitions. [2021-11-09 10:45:46,213 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 10:45:46,214 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-09 10:45:46,214 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-09 10:45:46,214 INFO L87 Difference]: Start difference. First operand 5549 states and 7724 transitions. Second operand has 4 states, 4 states have (on average 22.25) internal successors, (89), 4 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:46,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 10:45:46,274 INFO L93 Difference]: Finished difference Result 8369 states and 11531 transitions. [2021-11-09 10:45:46,274 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-09 10:45:46,275 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 8369 states and 11531 transitions. [2021-11-09 10:45:46,318 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 4320 [2021-11-09 10:45:46,374 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 8369 states to 8369 states and 11531 transitions. [2021-11-09 10:45:46,374 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4387 [2021-11-09 10:45:46,380 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4387 [2021-11-09 10:45:46,380 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8369 states and 11531 transitions. [2021-11-09 10:45:46,384 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2021-11-09 10:45:46,384 INFO L681 BuchiCegarLoop]: Abstraction has 8369 states and 11531 transitions. [2021-11-09 10:45:46,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8369 states and 11531 transitions. [2021-11-09 10:45:46,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8369 to 8369. [2021-11-09 10:45:46,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8369 states, 8369 states have (on average 1.3778229179113395) internal successors, (11531), 8368 states have internal predecessors, (11531), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 10:45:46,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8369 states to 8369 states and 11531 transitions. [2021-11-09 10:45:46,579 INFO L704 BuchiCegarLoop]: Abstraction has 8369 states and 11531 transitions. [2021-11-09 10:45:46,579 INFO L587 BuchiCegarLoop]: Abstraction has 8369 states and 11531 transitions. [2021-11-09 10:45:46,616 INFO L425 BuchiCegarLoop]: ======== Iteration 26============ [2021-11-09 10:45:46,616 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8369 states and 11531 transitions. [2021-11-09 10:45:46,641 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 4320 [2021-11-09 10:45:46,642 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 10:45:46,642 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 10:45:46,642 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:46,642 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 10:45:46,643 INFO L791 eck$LassoCheckResult]: Stem: 52440#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(16);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~b0_val~0 := 0;~b0_val_t~0 := 0;~b0_ev~0 := 0;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_val_t~0 := 0;~b1_ev~0 := 0;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_val_t~0 := 0;~d0_ev~0 := 0;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_val_t~0 := 0;~d1_ev~0 := 0;~d1_req_up~0 := 0;~z_val~0 := 0;~z_val_t~0 := 0;~z_ev~0 := 0;~z_req_up~0 := 0;~comp_m1_st~0 := 0;~comp_m1_i~0 := 0; 52309#L-1 havoc main_#res;havoc main_~__retres1~2;havoc main_~__retres1~2;~b0_val~0 := 0;~b0_ev~0 := 2;~b0_req_up~0 := 0;~b1_val~0 := 0;~b1_ev~0 := 2;~b1_req_up~0 := 0;~d0_val~0 := 0;~d0_ev~0 := 2;~d0_req_up~0 := 0;~d1_val~0 := 0;~d1_ev~0 := 2;~d1_req_up~0 := 0;~z_val~0 := 0;~z_ev~0 := 2;~z_req_up~0 := 0;~b0_val_t~0 := 1;~b0_req_up~0 := 1;~b1_val_t~0 := 1;~b1_req_up~0 := 1;~d0_val_t~0 := 1;~d0_req_up~0 := 1;~d1_val_t~0 := 1;~d1_req_up~0 := 1;~comp_m1_i~0 := 0; 52258#L490 havoc start_simulation_#t~ret11, start_simulation_~kernel_st~0, start_simulation_~tmp~3;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;start_simulation_~kernel_st~0 := 0; 52259#L212 assume 1 == ~b0_req_up~0; 52355#L137 assume ~b0_val~0 != ~b0_val_t~0;~b0_val~0 := ~b0_val_t~0;~b0_ev~0 := 0; 52356#L137-2 ~b0_req_up~0 := 0; 52410#L212-1 assume 1 == ~b1_req_up~0; 52285#L152 assume ~b1_val~0 != ~b1_val_t~0;~b1_val~0 := ~b1_val_t~0;~b1_ev~0 := 0; 52286#L152-2 ~b1_req_up~0 := 0; 52402#L219 assume 1 == ~d0_req_up~0; 52262#L167 assume ~d0_val~0 != ~d0_val_t~0;~d0_val~0 := ~d0_val_t~0;~d0_ev~0 := 0; 52263#L167-2 ~d0_req_up~0 := 0; 52248#L226 assume 1 == ~d1_req_up~0; 52249#L182 assume ~d1_val~0 != ~d1_val_t~0;~d1_val~0 := ~d1_val_t~0;~d1_ev~0 := 0; 52268#L182-2 ~d1_req_up~0 := 0; 52269#L233 assume !(1 == ~z_req_up~0); 52278#L240 assume !(1 == ~comp_m1_i~0);~comp_m1_st~0 := 2; 52279#L255-1 assume 0 == ~b0_ev~0;~b0_ev~0 := 1; 52458#L321-1 assume 0 == ~b1_ev~0;~b1_ev~0 := 1; 52457#L326-1 assume 0 == ~d0_ev~0;~d0_ev~0 := 1; 52280#L331-1 assume 0 == ~d1_ev~0;~d1_ev~0 := 1; 52230#L336-1 assume !(0 == ~z_ev~0); 52231#L341-1 havoc activate_threads_#t~ret9, activate_threads_~tmp~1;havoc activate_threads_~tmp~1;havoc is_method1_triggered_#res;havoc is_method1_triggered_~__retres1~0;havoc is_method1_triggered_~__retres1~0; 52443#L107 assume 1 == ~b0_ev~0;is_method1_triggered_~__retres1~0 := 1; 52444#L129 is_method1_triggered_#res := is_method1_triggered_~__retres1~0; 52345#L130 activate_threads_#t~ret9 := is_method1_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret9;havoc activate_threads_#t~ret9; 52346#L390 assume 0 != activate_threads_~tmp~1;~comp_m1_st~0 := 0; 52438#L390-2 assume 1 == ~b0_ev~0;~b0_ev~0 := 2; 52439#L354-1 assume 1 == ~b1_ev~0;~b1_ev~0 := 2; 52403#L359-1 assume 1 == ~d0_ev~0;~d0_ev~0 := 2; 52404#L364-1 assume 1 == ~d1_ev~0;~d1_ev~0 := 2; 52323#L369-1 assume !(1 == ~z_ev~0); 52324#L432-1 assume !false; 53478#L433 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret7, eval_#t~nondet8, eval_~tmp~0, eval_~tmp___0~0;havoc eval_~tmp~0;havoc eval_~tmp___0~0; 53088#L295 [2021-11-09 10:45:46,643 INFO L793 eck$LassoCheckResult]: Loop: 53088#L295 assume !false; 53101#L286 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~1;havoc exists_runnable_thread_~__retres1~1; 53099#L268 assume 0 == ~comp_m1_st~0;exists_runnable_thread_~__retres1~1 := 1; 52704#L275 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~1; 53097#L276 eval_#t~ret7 := exists_runnable_thread_#res;eval_~tmp___0~0 := eval_#t~ret7;havoc eval_#t~ret7; 53092#L290 assume 0 != eval_~tmp___0~0; 53090#L290-1 assume 0 == ~comp_m1_st~0;eval_~tmp~0 := eval_#t~nondet8;havoc eval_#t~nondet8; 52726#L299 assume !(0 != eval_~tmp~0); 53088#L295 [2021-11-09 10:45:46,643 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:46,643 INFO L85 PathProgramCache]: Analyzing trace with hash -1082183973, now seen corresponding path program 1 times [2021-11-09 10:45:46,644 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:46,644 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1547602141] [2021-11-09 10:45:46,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:46,644 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:46,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 10:45:46,655 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 10:45:46,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 10:45:46,669 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 10:45:46,669 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:46,669 INFO L85 PathProgramCache]: Analyzing trace with hash 1768213899, now seen corresponding path program 1 times [2021-11-09 10:45:46,669 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:46,670 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1761210118] [2021-11-09 10:45:46,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:46,670 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:46,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 10:45:46,676 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 10:45:46,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 10:45:46,680 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 10:45:46,680 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 10:45:46,680 INFO L85 PathProgramCache]: Analyzing trace with hash -937655707, now seen corresponding path program 1 times [2021-11-09 10:45:46,681 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 10:45:46,681 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1604232032] [2021-11-09 10:45:46,681 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 10:45:46,681 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 10:45:46,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 10:45:46,697 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 10:45:46,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 10:45:46,716 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 10:45:48,520 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 09.11 10:45:48 BoogieIcfgContainer [2021-11-09 10:45:48,520 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2021-11-09 10:45:48,521 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-11-09 10:45:48,521 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-11-09 10:45:48,522 INFO L275 PluginConnector]: Witness Printer initialized [2021-11-09 10:45:48,522 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.11 10:45:35" (3/4) ... [2021-11-09 10:45:48,526 INFO L134 WitnessPrinter]: Generating witness for non-termination counterexample [2021-11-09 10:45:48,615 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/witness.graphml [2021-11-09 10:45:48,615 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-11-09 10:45:48,617 INFO L168 Benchmark]: Toolchain (without parser) took 14605.70 ms. Allocated memory was 104.9 MB in the beginning and 249.6 MB in the end (delta: 144.7 MB). Free memory was 71.2 MB in the beginning and 137.3 MB in the end (delta: -66.1 MB). Peak memory consumption was 79.1 MB. Max. memory is 16.1 GB. [2021-11-09 10:45:48,617 INFO L168 Benchmark]: CDTParser took 0.40 ms. Allocated memory is still 104.9 MB. Free memory is still 58.7 MB. There was no memory consumed. Max. memory is 16.1 GB. [2021-11-09 10:45:48,619 INFO L168 Benchmark]: CACSL2BoogieTranslator took 381.87 ms. Allocated memory was 104.9 MB in the beginning and 142.6 MB in the end (delta: 37.7 MB). Free memory was 71.0 MB in the beginning and 115.6 MB in the end (delta: -44.6 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. [2021-11-09 10:45:48,619 INFO L168 Benchmark]: Boogie Procedure Inliner took 58.40 ms. Allocated memory is still 142.6 MB. Free memory was 115.6 MB in the beginning and 112.9 MB in the end (delta: 2.7 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-11-09 10:45:48,620 INFO L168 Benchmark]: Boogie Preprocessor took 40.82 ms. Allocated memory is still 142.6 MB. Free memory was 112.9 MB in the beginning and 111.4 MB in the end (delta: 1.5 MB). There was no memory consumed. Max. memory is 16.1 GB. [2021-11-09 10:45:48,620 INFO L168 Benchmark]: RCFGBuilder took 750.25 ms. Allocated memory is still 142.6 MB. Free memory was 111.4 MB in the beginning and 93.3 MB in the end (delta: 18.1 MB). Peak memory consumption was 18.9 MB. Max. memory is 16.1 GB. [2021-11-09 10:45:48,621 INFO L168 Benchmark]: BuchiAutomizer took 13273.70 ms. Allocated memory was 142.6 MB in the beginning and 249.6 MB in the end (delta: 107.0 MB). Free memory was 93.3 MB in the beginning and 141.4 MB in the end (delta: -48.2 MB). Peak memory consumption was 119.8 MB. Max. memory is 16.1 GB. [2021-11-09 10:45:48,622 INFO L168 Benchmark]: Witness Printer took 93.87 ms. Allocated memory is still 249.6 MB. Free memory was 141.4 MB in the beginning and 137.3 MB in the end (delta: 4.2 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-11-09 10:45:48,624 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.40 ms. Allocated memory is still 104.9 MB. Free memory is still 58.7 MB. There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 381.87 ms. Allocated memory was 104.9 MB in the beginning and 142.6 MB in the end (delta: 37.7 MB). Free memory was 71.0 MB in the beginning and 115.6 MB in the end (delta: -44.6 MB). Peak memory consumption was 8.4 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 58.40 ms. Allocated memory is still 142.6 MB. Free memory was 115.6 MB in the beginning and 112.9 MB in the end (delta: 2.7 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 40.82 ms. Allocated memory is still 142.6 MB. Free memory was 112.9 MB in the beginning and 111.4 MB in the end (delta: 1.5 MB). There was no memory consumed. Max. memory is 16.1 GB. * RCFGBuilder took 750.25 ms. Allocated memory is still 142.6 MB. Free memory was 111.4 MB in the beginning and 93.3 MB in the end (delta: 18.1 MB). Peak memory consumption was 18.9 MB. Max. memory is 16.1 GB. * BuchiAutomizer took 13273.70 ms. Allocated memory was 142.6 MB in the beginning and 249.6 MB in the end (delta: 107.0 MB). Free memory was 93.3 MB in the beginning and 141.4 MB in the end (delta: -48.2 MB). Peak memory consumption was 119.8 MB. Max. memory is 16.1 GB. * Witness Printer took 93.87 ms. Allocated memory is still 249.6 MB. Free memory was 141.4 MB in the beginning and 137.3 MB in the end (delta: 4.2 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 27 terminating modules (25 trivial, 2 deterministic, 0 nondeterministic) and one nonterminating remainder module.One deterministic module has affine ranking function 3 + -2 * b0_ev and consists of 4 locations. One deterministic module has affine ranking function -1 * d0_ev + 1 and consists of 3 locations. 25 modules have a trivial ranking function, the largest among these consists of 6 locations. The remainder module has 8369 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 13.1s and 26 iterations. TraceHistogramMax:2. Analysis of lassos took 8.7s. Construction of modules took 0.4s. Büchi inclusion checks took 1.9s. Highest rank in rank-based complementation 3. Minimization of det autom 19. Minimization of nondet autom 8. Automata minimization 0.9s AutomataMinimizationTime, 27 MinimizatonAttempts, 4554 StatesRemovedByMinimization, 7 NontrivialMinimizations. Non-live state removal took 0.5s Buchi closure took 0.0s. Biggest automaton had 8369 states and ocurred in iteration 25. Nontrivial modules had stage [2, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 6/6 HoareTripleCheckerStatistics: 4473 SDtfs, 1815 SDslu, 5080 SDs, 0 SdLazy, 378 SolverSat, 89 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.4s Time LassoAnalysisResults: nont1 unkn0 SFLI4 SFLT0 conc0 concLT2 SILN0 SILU0 SILI19 SILT0 lasso0 LassoPreprocessingBenchmarks: Lassos: inital106 mio100 ax100 hnf100 lsp10 ukn100 mio100 lsp100 div100 bol100 ite100 ukn100 eq204 hnf89 smp100 dnf146 smp97 tf106 neg93 sie113 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: unsat Degree: 0 Time: 36ms VariablesStem: 0 VariablesLoop: 1 DisjunctsStem: 1 DisjunctsLoop: 2 SupportingInvariants: 0 MotzkinApplications: 4 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 5 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 2 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.3s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 285]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {NULL=22283} State at position 1 is {org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@71ce287b=0, b1_val_t=1, NULL=22284, NULL=0, \result=0, d0_val=1, NULL=22283, __retres1=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@43df4740=0, z_val=0, tmp=0, b0_val_t=1, kernel_st=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@3658da21=0, d1_ev=2, comp_m1_i=0, b1_val=1, d1_req_up=0, tmp___0=1, NULL=22286, z_val_t=0, b1_req_up=0, __retres1=1, d0_ev=2, NULL=0, NULL=0, NULL=0, z_ev=2, tmp=0, b1_ev=2, NULL=22285, comp_m1_st=0, b0_req_up=0, z_req_up=0, \result=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@5340b1eb=0, d1_val=1, b0_ev=2, NULL=0, tmp=1, d0_val_t=1, d1_val_t=1, b0_val=1, __retres1=0, d0_req_up=0, \result=1} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 285]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L24] int b0_val ; [L25] int b0_val_t ; [L26] int b0_ev ; [L27] int b0_req_up ; [L28] int b1_val ; [L29] int b1_val_t ; [L30] int b1_ev ; [L31] int b1_req_up ; [L32] int d0_val ; [L33] int d0_val_t ; [L34] int d0_ev ; [L35] int d0_req_up ; [L36] int d1_val ; [L37] int d1_val_t ; [L38] int d1_ev ; [L39] int d1_req_up ; [L40] int z_val ; [L41] int z_val_t ; [L42] int z_ev ; [L43] int z_req_up ; [L44] int comp_m1_st ; [L45] int comp_m1_i ; [L494] int __retres1 ; [L465] b0_val = 0 [L466] b0_ev = 2 [L467] b0_req_up = 0 [L468] b1_val = 0 [L469] b1_ev = 2 [L470] b1_req_up = 0 [L471] d0_val = 0 [L472] d0_ev = 2 [L473] d0_req_up = 0 [L474] d1_val = 0 [L475] d1_ev = 2 [L476] d1_req_up = 0 [L477] z_val = 0 [L478] z_ev = 2 [L479] z_req_up = 0 [L480] b0_val_t = 1 [L481] b0_req_up = 1 [L482] b1_val_t = 1 [L483] b1_req_up = 1 [L484] d0_val_t = 1 [L485] d0_req_up = 1 [L486] d1_val_t = 1 [L487] d1_req_up = 1 [L488] comp_m1_i = 0 [L419] int kernel_st ; [L420] int tmp ; [L424] kernel_st = 0 [L212] COND TRUE (int )b0_req_up == 1 [L137] COND TRUE (int )b0_val != (int )b0_val_t [L138] b0_val = b0_val_t [L139] b0_ev = 0 [L143] b0_req_up = 0 [L219] COND TRUE (int )b1_req_up == 1 [L152] COND TRUE (int )b1_val != (int )b1_val_t [L153] b1_val = b1_val_t [L154] b1_ev = 0 [L158] b1_req_up = 0 [L226] COND TRUE (int )d0_req_up == 1 [L167] COND TRUE (int )d0_val != (int )d0_val_t [L168] d0_val = d0_val_t [L169] d0_ev = 0 [L173] d0_req_up = 0 [L233] COND TRUE (int )d1_req_up == 1 [L182] COND TRUE (int )d1_val != (int )d1_val_t [L183] d1_val = d1_val_t [L184] d1_ev = 0 [L188] d1_req_up = 0 [L240] COND FALSE !((int )z_req_up == 1) [L255] COND FALSE !((int )comp_m1_i == 1) [L258] comp_m1_st = 2 [L321] COND TRUE (int )b0_ev == 0 [L322] b0_ev = 1 [L326] COND TRUE (int )b1_ev == 0 [L327] b1_ev = 1 [L331] COND TRUE (int )d0_ev == 0 [L332] d0_ev = 1 [L336] COND TRUE (int )d1_ev == 0 [L337] d1_ev = 1 [L341] COND FALSE !((int )z_ev == 0) [L384] int tmp ; [L104] int __retres1 ; [L107] COND TRUE (int )b0_ev == 1 [L108] __retres1 = 1 [L130] return (__retres1); [L388] tmp = is_method1_triggered() [L390] COND TRUE \read(tmp) [L391] comp_m1_st = 0 [L354] COND TRUE (int )b0_ev == 1 [L355] b0_ev = 2 [L359] COND TRUE (int )b1_ev == 1 [L360] b1_ev = 2 [L364] COND TRUE (int )d0_ev == 1 [L365] d0_ev = 2 [L369] COND TRUE (int )d1_ev == 1 [L370] d1_ev = 2 [L374] COND FALSE !((int )z_ev == 1) [L432] COND TRUE 1 [L435] kernel_st = 1 [L280] int tmp ; [L281] int tmp___0 ; Loop: [L285] COND TRUE 1 [L265] int __retres1 ; [L268] COND TRUE (int )comp_m1_st == 0 [L269] __retres1 = 1 [L276] return (__retres1); [L288] tmp___0 = exists_runnable_thread() [L290] COND TRUE \read(tmp___0) [L295] COND TRUE (int )comp_m1_st == 0 [L297] tmp = __VERIFIER_nondet_int() [L299] COND FALSE !(\read(tmp)) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2021-11-09 10:45:48,709 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_759281f9-ae97-4c49-ab59-70c26e1922ba/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)