./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/systemc/token_ring.01.cil-2.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version f8e1c903 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc6b3006-0ef2-4d8d-82ac-fb41dee7de2f/bin/uautomizer-IVEQpCNsaX/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc6b3006-0ef2-4d8d-82ac-fb41dee7de2f/bin/uautomizer-IVEQpCNsaX/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc6b3006-0ef2-4d8d-82ac-fb41dee7de2f/bin/uautomizer-IVEQpCNsaX/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc6b3006-0ef2-4d8d-82ac-fb41dee7de2f/bin/uautomizer-IVEQpCNsaX/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/systemc/token_ring.01.cil-2.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc6b3006-0ef2-4d8d-82ac-fb41dee7de2f/bin/uautomizer-IVEQpCNsaX/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc6b3006-0ef2-4d8d-82ac-fb41dee7de2f/bin/uautomizer-IVEQpCNsaX --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 327bb4ad7f981d20a6e5212aac300a9249d1857b0280531d57d587d5a0195c5f --- Real Ultimate output --- This is Ultimate 0.2.1-dev-f8e1c90 [2021-11-09 09:46:59,947 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-09 09:46:59,949 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-09 09:47:00,003 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-09 09:47:00,004 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-09 09:47:00,006 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-09 09:47:00,012 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-09 09:47:00,018 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-09 09:47:00,021 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-09 09:47:00,032 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-09 09:47:00,033 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-09 09:47:00,036 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-09 09:47:00,036 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-09 09:47:00,040 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-09 09:47:00,045 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-09 09:47:00,051 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-09 09:47:00,053 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-09 09:47:00,055 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-09 09:47:00,058 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-09 09:47:00,068 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-09 09:47:00,071 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-09 09:47:00,076 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-09 09:47:00,078 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-09 09:47:00,080 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-09 09:47:00,084 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-09 09:47:00,085 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-09 09:47:00,085 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-09 09:47:00,087 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-09 09:47:00,088 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-09 09:47:00,089 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-09 09:47:00,090 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-09 09:47:00,091 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-09 09:47:00,092 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-09 09:47:00,094 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-09 09:47:00,095 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-09 09:47:00,096 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-09 09:47:00,097 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-09 09:47:00,097 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-09 09:47:00,097 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-09 09:47:00,099 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-09 09:47:00,100 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-09 09:47:00,101 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc6b3006-0ef2-4d8d-82ac-fb41dee7de2f/bin/uautomizer-IVEQpCNsaX/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-11-09 09:47:00,134 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-09 09:47:00,134 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-09 09:47:00,135 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-09 09:47:00,135 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-09 09:47:00,136 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-09 09:47:00,136 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-09 09:47:00,137 INFO L138 SettingsManager]: * Use SBE=true [2021-11-09 09:47:00,137 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-11-09 09:47:00,137 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-11-09 09:47:00,138 INFO L138 SettingsManager]: * Use old map elimination=false [2021-11-09 09:47:00,138 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-11-09 09:47:00,138 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-11-09 09:47:00,138 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-11-09 09:47:00,139 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-09 09:47:00,139 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-09 09:47:00,139 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-11-09 09:47:00,140 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-09 09:47:00,140 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-09 09:47:00,140 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-09 09:47:00,140 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-11-09 09:47:00,140 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-11-09 09:47:00,140 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-11-09 09:47:00,140 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-09 09:47:00,141 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-09 09:47:00,141 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-11-09 09:47:00,141 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-09 09:47:00,141 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-11-09 09:47:00,142 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-09 09:47:00,142 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-09 09:47:00,142 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-09 09:47:00,142 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-09 09:47:00,143 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-09 09:47:00,148 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-11-09 09:47:00,149 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc6b3006-0ef2-4d8d-82ac-fb41dee7de2f/bin/uautomizer-IVEQpCNsaX/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc6b3006-0ef2-4d8d-82ac-fb41dee7de2f/bin/uautomizer-IVEQpCNsaX Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 327bb4ad7f981d20a6e5212aac300a9249d1857b0280531d57d587d5a0195c5f [2021-11-09 09:47:00,498 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-09 09:47:00,537 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-09 09:47:00,540 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-09 09:47:00,542 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-09 09:47:00,543 INFO L275 PluginConnector]: CDTParser initialized [2021-11-09 09:47:00,545 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc6b3006-0ef2-4d8d-82ac-fb41dee7de2f/bin/uautomizer-IVEQpCNsaX/../../sv-benchmarks/c/systemc/token_ring.01.cil-2.c [2021-11-09 09:47:00,639 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc6b3006-0ef2-4d8d-82ac-fb41dee7de2f/bin/uautomizer-IVEQpCNsaX/data/756ae93b2/fa01fedf7d934481939d6546bad94685/FLAG9b52155a4 [2021-11-09 09:47:01,385 INFO L306 CDTParser]: Found 1 translation units. [2021-11-09 09:47:01,388 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc6b3006-0ef2-4d8d-82ac-fb41dee7de2f/sv-benchmarks/c/systemc/token_ring.01.cil-2.c [2021-11-09 09:47:01,398 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc6b3006-0ef2-4d8d-82ac-fb41dee7de2f/bin/uautomizer-IVEQpCNsaX/data/756ae93b2/fa01fedf7d934481939d6546bad94685/FLAG9b52155a4 [2021-11-09 09:47:01,677 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc6b3006-0ef2-4d8d-82ac-fb41dee7de2f/bin/uautomizer-IVEQpCNsaX/data/756ae93b2/fa01fedf7d934481939d6546bad94685 [2021-11-09 09:47:01,681 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-09 09:47:01,683 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-09 09:47:01,690 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-09 09:47:01,690 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-09 09:47:01,696 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-09 09:47:01,698 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.11 09:47:01" (1/1) ... [2021-11-09 09:47:01,699 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@19a76fb2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 09:47:01, skipping insertion in model container [2021-11-09 09:47:01,700 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.11 09:47:01" (1/1) ... [2021-11-09 09:47:01,715 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-09 09:47:01,755 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-09 09:47:01,990 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc6b3006-0ef2-4d8d-82ac-fb41dee7de2f/sv-benchmarks/c/systemc/token_ring.01.cil-2.c[671,684] [2021-11-09 09:47:02,061 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-09 09:47:02,074 INFO L203 MainTranslator]: Completed pre-run [2021-11-09 09:47:02,089 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc6b3006-0ef2-4d8d-82ac-fb41dee7de2f/sv-benchmarks/c/systemc/token_ring.01.cil-2.c[671,684] [2021-11-09 09:47:02,120 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-09 09:47:02,141 INFO L208 MainTranslator]: Completed translation [2021-11-09 09:47:02,141 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 09:47:02 WrapperNode [2021-11-09 09:47:02,142 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-09 09:47:02,143 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-09 09:47:02,144 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-09 09:47:02,144 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-09 09:47:02,154 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 09:47:02" (1/1) ... [2021-11-09 09:47:02,166 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 09:47:02" (1/1) ... [2021-11-09 09:47:02,212 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-09 09:47:02,213 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-09 09:47:02,213 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-09 09:47:02,214 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-09 09:47:02,224 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 09:47:02" (1/1) ... [2021-11-09 09:47:02,224 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 09:47:02" (1/1) ... [2021-11-09 09:47:02,230 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 09:47:02" (1/1) ... [2021-11-09 09:47:02,230 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 09:47:02" (1/1) ... [2021-11-09 09:47:02,241 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 09:47:02" (1/1) ... [2021-11-09 09:47:02,252 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 09:47:02" (1/1) ... [2021-11-09 09:47:02,256 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 09:47:02" (1/1) ... [2021-11-09 09:47:02,262 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-09 09:47:02,264 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-09 09:47:02,264 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-09 09:47:02,264 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-09 09:47:02,265 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 09:47:02" (1/1) ... [2021-11-09 09:47:02,275 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 09:47:02,295 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc6b3006-0ef2-4d8d-82ac-fb41dee7de2f/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 09:47:02,310 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc6b3006-0ef2-4d8d-82ac-fb41dee7de2f/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 09:47:02,367 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc6b3006-0ef2-4d8d-82ac-fb41dee7de2f/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-11-09 09:47:02,414 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-09 09:47:02,415 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-09 09:47:02,415 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-09 09:47:02,415 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-09 09:47:03,206 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-09 09:47:03,220 INFO L299 CfgBuilder]: Removed 82 assume(true) statements. [2021-11-09 09:47:03,223 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.11 09:47:03 BoogieIcfgContainer [2021-11-09 09:47:03,223 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-09 09:47:03,225 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-11-09 09:47:03,233 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-11-09 09:47:03,238 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-11-09 09:47:03,239 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-09 09:47:03,239 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 09.11 09:47:01" (1/3) ... [2021-11-09 09:47:03,241 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@309eb4a3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.11 09:47:03, skipping insertion in model container [2021-11-09 09:47:03,241 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-09 09:47:03,241 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 09:47:02" (2/3) ... [2021-11-09 09:47:03,242 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@309eb4a3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.11 09:47:03, skipping insertion in model container [2021-11-09 09:47:03,242 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-09 09:47:03,242 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.11 09:47:03" (3/3) ... [2021-11-09 09:47:03,243 INFO L389 chiAutomizerObserver]: Analyzing ICFG token_ring.01.cil-2.c [2021-11-09 09:47:03,298 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-11-09 09:47:03,298 INFO L360 BuchiCegarLoop]: Hoare is false [2021-11-09 09:47:03,298 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-11-09 09:47:03,298 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-11-09 09:47:03,299 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-11-09 09:47:03,299 INFO L364 BuchiCegarLoop]: Difference is false [2021-11-09 09:47:03,299 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-11-09 09:47:03,299 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-11-09 09:47:03,325 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 146 states, 145 states have (on average 1.5793103448275863) internal successors, (229), 145 states have internal predecessors, (229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 09:47:03,362 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 115 [2021-11-09 09:47:03,362 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 09:47:03,362 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 09:47:03,375 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:03,375 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:03,375 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-11-09 09:47:03,377 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 146 states, 145 states have (on average 1.5793103448275863) internal successors, (229), 145 states have internal predecessors, (229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 09:47:03,389 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 115 [2021-11-09 09:47:03,389 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 09:47:03,389 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 09:47:03,392 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:03,392 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:03,401 INFO L791 eck$LassoCheckResult]: Stem: 128#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 49#L-1true havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 55#L403true havoc start_simulation_#t~ret15, start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 4#L175true assume !(1 == ~m_i~0);~m_st~0 := 2; 146#L182-1true assume 1 == ~t1_i~0;~t1_st~0 := 0; 108#L187-1true assume !(0 == ~M_E~0); 29#L271-1true assume !(0 == ~T1_E~0); 48#L276-1true assume !(0 == ~E_M~0); 99#L281-1true assume !(0 == ~E_1~0); 34#L286-1true havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 16#L136true assume !(1 == ~m_pc~0); 40#L136-2true is_master_triggered_~__retres1~0 := 0; 125#L147true is_master_triggered_#res := is_master_triggered_~__retres1~0; 38#L148true activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 10#L331true assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 129#L331-2true havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 52#L155true assume 1 == ~t1_pc~0; 140#L156true assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 98#L166true is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 26#L167true activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 141#L339true assume !(0 != activate_threads_~tmp___0~0); 109#L339-2true assume !(1 == ~M_E~0); 41#L299-1true assume !(1 == ~T1_E~0); 104#L304-1true assume !(1 == ~E_M~0); 20#L309-1true assume 1 == ~E_1~0;~E_1~0 := 2; 31#L440-1true [2021-11-09 09:47:03,403 INFO L793 eck$LassoCheckResult]: Loop: 31#L440-1true assume !false; 28#L441true start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret9, eval_#t~nondet10, eval_~tmp_ndt_1~0, eval_#t~nondet11, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 70#L246true assume !true; 148#L261true start_simulation_~kernel_st~0 := 2; 130#L175-1true start_simulation_~kernel_st~0 := 3; 87#L271-2true assume 0 == ~M_E~0;~M_E~0 := 1; 94#L271-4true assume 0 == ~T1_E~0;~T1_E~0 := 1; 24#L276-3true assume 0 == ~E_M~0;~E_M~0 := 1; 32#L281-3true assume !(0 == ~E_1~0); 121#L286-3true havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 64#L136-9true assume 1 == ~m_pc~0; 65#L137-3true assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 89#L147-3true is_master_triggered_#res := is_master_triggered_~__retres1~0; 114#L148-3true activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 63#L331-9true assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 111#L331-11true havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 50#L155-9true assume 1 == ~t1_pc~0; 131#L156-3true assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 30#L166-3true is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 62#L167-3true activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 71#L339-9true assume !(0 != activate_threads_~tmp___0~0); 76#L339-11true assume 1 == ~M_E~0;~M_E~0 := 2; 100#L299-3true assume 1 == ~T1_E~0;~T1_E~0 := 2; 113#L304-3true assume 1 == ~E_M~0;~E_M~0 := 2; 85#L309-3true assume 1 == ~E_1~0;~E_1~0 := 2; 36#L314-3true havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 25#L200-1true assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 107#L212-1true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 127#L213-1true start_simulation_#t~ret15 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 7#L459true assume !(0 == start_simulation_~tmp~3); 118#L459-1true havoc stop_simulation_#res;havoc stop_simulation_#t~ret14, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 90#L200-2true assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 143#L212-2true exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 11#L213-2true stop_simulation_#t~ret14 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret14;havoc stop_simulation_#t~ret14; 132#L414true assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 37#L421true stop_simulation_#res := stop_simulation_~__retres2~0; 18#L422true start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 42#L472true assume !(0 != start_simulation_~tmp___0~1); 31#L440-1true [2021-11-09 09:47:03,410 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:03,410 INFO L85 PathProgramCache]: Analyzing trace with hash 22332154, now seen corresponding path program 1 times [2021-11-09 09:47:03,421 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:03,422 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [817103725] [2021-11-09 09:47:03,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:03,423 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:03,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 09:47:03,625 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 09:47:03,625 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 09:47:03,626 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [817103725] [2021-11-09 09:47:03,627 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [817103725] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 09:47:03,627 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 09:47:03,627 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 09:47:03,629 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1221821118] [2021-11-09 09:47:03,635 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 09:47:03,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:03,637 INFO L85 PathProgramCache]: Analyzing trace with hash -1713125771, now seen corresponding path program 1 times [2021-11-09 09:47:03,637 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:03,637 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [117119862] [2021-11-09 09:47:03,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:03,638 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:03,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 09:47:03,662 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 09:47:03,662 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 09:47:03,662 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [117119862] [2021-11-09 09:47:03,663 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [117119862] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 09:47:03,663 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 09:47:03,663 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-09 09:47:03,664 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [329235982] [2021-11-09 09:47:03,665 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 09:47:03,667 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 09:47:03,690 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 09:47:03,691 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 09:47:03,697 INFO L87 Difference]: Start difference. First operand has 146 states, 145 states have (on average 1.5793103448275863) internal successors, (229), 145 states have internal predecessors, (229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 8.333333333333334) internal successors, (25), 3 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 09:47:03,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 09:47:03,765 INFO L93 Difference]: Finished difference Result 146 states and 218 transitions. [2021-11-09 09:47:03,765 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 09:47:03,767 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 146 states and 218 transitions. [2021-11-09 09:47:03,774 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 113 [2021-11-09 09:47:03,799 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 146 states to 140 states and 212 transitions. [2021-11-09 09:47:03,800 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 140 [2021-11-09 09:47:03,802 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 140 [2021-11-09 09:47:03,802 INFO L73 IsDeterministic]: Start isDeterministic. Operand 140 states and 212 transitions. [2021-11-09 09:47:03,804 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 09:47:03,804 INFO L681 BuchiCegarLoop]: Abstraction has 140 states and 212 transitions. [2021-11-09 09:47:03,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states and 212 transitions. [2021-11-09 09:47:03,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2021-11-09 09:47:03,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 140 states, 140 states have (on average 1.5142857142857142) internal successors, (212), 139 states have internal predecessors, (212), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 09:47:03,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 212 transitions. [2021-11-09 09:47:03,854 INFO L704 BuchiCegarLoop]: Abstraction has 140 states and 212 transitions. [2021-11-09 09:47:03,854 INFO L587 BuchiCegarLoop]: Abstraction has 140 states and 212 transitions. [2021-11-09 09:47:03,854 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-11-09 09:47:03,855 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 140 states and 212 transitions. [2021-11-09 09:47:03,858 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 113 [2021-11-09 09:47:03,859 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 09:47:03,859 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 09:47:03,861 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:03,861 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:03,862 INFO L791 eck$LassoCheckResult]: Stem: 438#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 381#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 382#L403 havoc start_simulation_#t~ret15, start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 301#L175 assume 1 == ~m_i~0;~m_st~0 := 0; 302#L182-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 434#L187-1 assume !(0 == ~M_E~0); 354#L271-1 assume !(0 == ~T1_E~0); 355#L276-1 assume !(0 == ~E_M~0); 380#L281-1 assume !(0 == ~E_1~0); 359#L286-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 326#L136 assume !(1 == ~m_pc~0); 327#L136-2 is_master_triggered_~__retres1~0 := 0; 367#L147 is_master_triggered_#res := is_master_triggered_~__retres1~0; 364#L148 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 316#L331 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 317#L331-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 386#L155 assume 1 == ~t1_pc~0; 387#L156 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 428#L166 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 351#L167 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 352#L339 assume !(0 != activate_threads_~tmp___0~0); 435#L339-2 assume !(1 == ~M_E~0); 368#L299-1 assume !(1 == ~T1_E~0); 369#L304-1 assume !(1 == ~E_M~0); 337#L309-1 assume 1 == ~E_1~0;~E_1~0 := 2; 338#L440-1 [2021-11-09 09:47:03,862 INFO L793 eck$LassoCheckResult]: Loop: 338#L440-1 assume !false; 353#L441 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret9, eval_#t~nondet10, eval_~tmp_ndt_1~0, eval_#t~nondet11, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 305#L246 assume !false; 409#L223 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 410#L200 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 415#L212 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 416#L213 eval_#t~ret9 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret9;havoc eval_#t~ret9; 430#L227 assume !(0 != eval_~tmp~0); 431#L261 start_simulation_~kernel_st~0 := 2; 439#L175-1 start_simulation_~kernel_st~0 := 3; 419#L271-2 assume 0 == ~M_E~0;~M_E~0 := 1; 420#L271-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 347#L276-3 assume 0 == ~E_M~0;~E_M~0 := 1; 348#L281-3 assume !(0 == ~E_1~0); 358#L286-3 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 400#L136-9 assume 1 == ~m_pc~0; 401#L137-3 assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 313#L147-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 424#L148-3 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 398#L331-9 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 399#L331-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 383#L155-9 assume !(1 == ~t1_pc~0); 384#L155-11 is_transmit1_triggered_~__retres1~1 := 0; 356#L166-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 357#L167-3 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 397#L339-9 assume !(0 != activate_threads_~tmp___0~0); 408#L339-11 assume 1 == ~M_E~0;~M_E~0 := 2; 412#L299-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 429#L304-3 assume 1 == ~E_M~0;~E_M~0 := 2; 417#L309-3 assume 1 == ~E_1~0;~E_1~0 := 2; 362#L314-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 344#L200-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 346#L212-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 432#L213-1 start_simulation_#t~ret15 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 309#L459 assume !(0 == start_simulation_~tmp~3); 310#L459-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret14, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 421#L200-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 422#L212-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 318#L213-2 stop_simulation_#t~ret14 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret14;havoc stop_simulation_#t~ret14; 319#L414 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 363#L421 stop_simulation_#res := stop_simulation_~__retres2~0; 329#L422 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 330#L472 assume !(0 != start_simulation_~tmp___0~1); 338#L440-1 [2021-11-09 09:47:03,863 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:03,864 INFO L85 PathProgramCache]: Analyzing trace with hash -196522564, now seen corresponding path program 1 times [2021-11-09 09:47:03,864 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:03,864 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1832328567] [2021-11-09 09:47:03,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:03,865 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:03,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 09:47:04,018 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 09:47:04,019 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 09:47:04,019 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1832328567] [2021-11-09 09:47:04,019 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1832328567] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 09:47:04,020 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 09:47:04,020 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 09:47:04,021 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1492173617] [2021-11-09 09:47:04,025 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 09:47:04,030 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:04,031 INFO L85 PathProgramCache]: Analyzing trace with hash -747579981, now seen corresponding path program 1 times [2021-11-09 09:47:04,031 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:04,033 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [851676373] [2021-11-09 09:47:04,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:04,035 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:04,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 09:47:04,140 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 09:47:04,141 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 09:47:04,141 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [851676373] [2021-11-09 09:47:04,142 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [851676373] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 09:47:04,142 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 09:47:04,142 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 09:47:04,142 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2020775242] [2021-11-09 09:47:04,143 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 09:47:04,143 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 09:47:04,144 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-11-09 09:47:04,145 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-11-09 09:47:04,145 INFO L87 Difference]: Start difference. First operand 140 states and 212 transitions. cyclomatic complexity: 73 Second operand has 5 states, 5 states have (on average 5.0) internal successors, (25), 5 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 09:47:04,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 09:47:04,382 INFO L93 Difference]: Finished difference Result 355 states and 531 transitions. [2021-11-09 09:47:04,382 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2021-11-09 09:47:04,383 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 355 states and 531 transitions. [2021-11-09 09:47:04,390 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 303 [2021-11-09 09:47:04,397 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 355 states to 355 states and 531 transitions. [2021-11-09 09:47:04,397 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 355 [2021-11-09 09:47:04,399 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 355 [2021-11-09 09:47:04,399 INFO L73 IsDeterministic]: Start isDeterministic. Operand 355 states and 531 transitions. [2021-11-09 09:47:04,403 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 09:47:04,403 INFO L681 BuchiCegarLoop]: Abstraction has 355 states and 531 transitions. [2021-11-09 09:47:04,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 355 states and 531 transitions. [2021-11-09 09:47:04,419 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 355 to 155. [2021-11-09 09:47:04,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 155 states, 155 states have (on average 1.4645161290322581) internal successors, (227), 154 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 09:47:04,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 227 transitions. [2021-11-09 09:47:04,422 INFO L704 BuchiCegarLoop]: Abstraction has 155 states and 227 transitions. [2021-11-09 09:47:04,422 INFO L587 BuchiCegarLoop]: Abstraction has 155 states and 227 transitions. [2021-11-09 09:47:04,423 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-11-09 09:47:04,423 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 155 states and 227 transitions. [2021-11-09 09:47:04,425 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 125 [2021-11-09 09:47:04,425 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 09:47:04,425 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 09:47:04,429 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:04,429 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:04,429 INFO L791 eck$LassoCheckResult]: Stem: 960#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 892#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 893#L403 havoc start_simulation_#t~ret15, start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 811#L175 assume 1 == ~m_i~0;~m_st~0 := 0; 812#L182-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 950#L187-1 assume !(0 == ~M_E~0); 864#L271-1 assume !(0 == ~T1_E~0); 865#L276-1 assume !(0 == ~E_M~0); 891#L281-1 assume !(0 == ~E_1~0); 869#L286-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 836#L136 assume !(1 == ~m_pc~0); 837#L136-2 is_master_triggered_~__retres1~0 := 0; 878#L147 is_master_triggered_#res := is_master_triggered_~__retres1~0; 959#L148 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 826#L331 assume !(0 != activate_threads_~tmp~1); 827#L331-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 897#L155 assume 1 == ~t1_pc~0; 898#L156 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 944#L166 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 861#L167 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 862#L339 assume !(0 != activate_threads_~tmp___0~0); 951#L339-2 assume !(1 == ~M_E~0); 879#L299-1 assume !(1 == ~T1_E~0); 880#L304-1 assume !(1 == ~E_M~0); 847#L309-1 assume 1 == ~E_1~0;~E_1~0 := 2; 848#L440-1 [2021-11-09 09:47:04,430 INFO L793 eck$LassoCheckResult]: Loop: 848#L440-1 assume !false; 863#L441 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret9, eval_#t~nondet10, eval_~tmp_ndt_1~0, eval_#t~nondet11, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 815#L246 assume !false; 921#L223 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 923#L200 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 929#L212 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 930#L213 eval_#t~ret9 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret9;havoc eval_#t~ret9; 946#L227 assume !(0 != eval_~tmp~0); 947#L261 start_simulation_~kernel_st~0 := 2; 961#L175-1 start_simulation_~kernel_st~0 := 3; 934#L271-2 assume 0 == ~M_E~0;~M_E~0 := 1; 935#L271-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 854#L276-3 assume 0 == ~E_M~0;~E_M~0 := 1; 855#L281-3 assume !(0 == ~E_1~0); 868#L286-3 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 911#L136-9 assume 1 == ~m_pc~0; 912#L137-3 assume 1 == ~E_M~0;is_master_triggered_~__retres1~0 := 1; 913#L147-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 955#L148-3 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 956#L331-9 assume 0 != activate_threads_~tmp~1;~m_st~0 := 0; 910#L331-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 894#L155-9 assume 1 == ~t1_pc~0; 896#L156-3 assume 1 == ~E_1~0;is_transmit1_triggered_~__retres1~1 := 1; 866#L166-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 867#L167-3 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 908#L339-9 assume !(0 != activate_threads_~tmp___0~0); 922#L339-11 assume 1 == ~M_E~0;~M_E~0 := 2; 925#L299-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 945#L304-3 assume 1 == ~E_M~0;~E_M~0 := 2; 932#L309-3 assume 1 == ~E_1~0;~E_1~0 := 2; 872#L314-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 856#L200-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 858#L212-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 949#L213-1 start_simulation_#t~ret15 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 819#L459 assume !(0 == start_simulation_~tmp~3); 820#L459-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret14, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 937#L200-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 938#L212-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 828#L213-2 stop_simulation_#t~ret14 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret14;havoc stop_simulation_#t~ret14; 829#L414 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 873#L421 stop_simulation_#res := stop_simulation_~__retres2~0; 839#L422 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 840#L472 assume !(0 != start_simulation_~tmp___0~1); 848#L440-1 [2021-11-09 09:47:04,430 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:04,430 INFO L85 PathProgramCache]: Analyzing trace with hash 504542014, now seen corresponding path program 1 times [2021-11-09 09:47:04,431 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:04,431 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [295898222] [2021-11-09 09:47:04,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:04,431 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:04,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 09:47:04,533 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 09:47:04,533 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 09:47:04,533 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [295898222] [2021-11-09 09:47:04,534 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [295898222] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 09:47:04,534 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 09:47:04,534 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 09:47:04,534 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [198612247] [2021-11-09 09:47:04,535 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 09:47:04,535 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:04,536 INFO L85 PathProgramCache]: Analyzing trace with hash -634193324, now seen corresponding path program 1 times [2021-11-09 09:47:04,536 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:04,536 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [429095180] [2021-11-09 09:47:04,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:04,537 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:04,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 09:47:04,619 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 09:47:04,619 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 09:47:04,619 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [429095180] [2021-11-09 09:47:04,620 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [429095180] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 09:47:04,620 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 09:47:04,620 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 09:47:04,620 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [922930712] [2021-11-09 09:47:04,621 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 09:47:04,621 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 09:47:04,622 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-09 09:47:04,622 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-09 09:47:04,622 INFO L87 Difference]: Start difference. First operand 155 states and 227 transitions. cyclomatic complexity: 73 Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 09:47:04,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 09:47:04,746 INFO L93 Difference]: Finished difference Result 345 states and 487 transitions. [2021-11-09 09:47:04,746 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-09 09:47:04,746 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 345 states and 487 transitions. [2021-11-09 09:47:04,752 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 300 [2021-11-09 09:47:04,756 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 345 states to 345 states and 487 transitions. [2021-11-09 09:47:04,757 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 345 [2021-11-09 09:47:04,757 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 345 [2021-11-09 09:47:04,758 INFO L73 IsDeterministic]: Start isDeterministic. Operand 345 states and 487 transitions. [2021-11-09 09:47:04,760 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 09:47:04,760 INFO L681 BuchiCegarLoop]: Abstraction has 345 states and 487 transitions. [2021-11-09 09:47:04,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 345 states and 487 transitions. [2021-11-09 09:47:04,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 345 to 323. [2021-11-09 09:47:04,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 323 states, 323 states have (on average 1.4303405572755419) internal successors, (462), 322 states have internal predecessors, (462), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 09:47:04,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 323 states to 323 states and 462 transitions. [2021-11-09 09:47:04,783 INFO L704 BuchiCegarLoop]: Abstraction has 323 states and 462 transitions. [2021-11-09 09:47:04,783 INFO L587 BuchiCegarLoop]: Abstraction has 323 states and 462 transitions. [2021-11-09 09:47:04,783 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-11-09 09:47:04,783 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 323 states and 462 transitions. [2021-11-09 09:47:04,787 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 293 [2021-11-09 09:47:04,787 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 09:47:04,787 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 09:47:04,789 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:04,789 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:04,789 INFO L791 eck$LassoCheckResult]: Stem: 1474#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 1401#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 1402#L403 havoc start_simulation_#t~ret15, start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 1323#L175 assume 1 == ~m_i~0;~m_st~0 := 0; 1324#L182-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 1468#L187-1 assume !(0 == ~M_E~0); 1372#L271-1 assume !(0 == ~T1_E~0); 1373#L276-1 assume !(0 == ~E_M~0); 1400#L281-1 assume !(0 == ~E_1~0); 1377#L286-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 1347#L136 assume !(1 == ~m_pc~0); 1348#L136-2 is_master_triggered_~__retres1~0 := 0; 1386#L147 is_master_triggered_#res := is_master_triggered_~__retres1~0; 1383#L148 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 1338#L331 assume !(0 != activate_threads_~tmp~1); 1339#L331-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 1405#L155 assume !(1 == ~t1_pc~0); 1406#L155-2 is_transmit1_triggered_~__retres1~1 := 0; 1459#L166 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 1369#L167 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 1370#L339 assume !(0 != activate_threads_~tmp___0~0); 1469#L339-2 assume !(1 == ~M_E~0); 1387#L299-1 assume !(1 == ~T1_E~0); 1388#L304-1 assume !(1 == ~E_M~0); 1355#L309-1 assume 1 == ~E_1~0;~E_1~0 := 2; 1356#L440-1 [2021-11-09 09:47:04,790 INFO L793 eck$LassoCheckResult]: Loop: 1356#L440-1 assume !false; 1371#L441 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret9, eval_#t~nondet10, eval_~tmp_ndt_1~0, eval_#t~nondet11, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 1327#L246 assume !false; 1430#L223 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 1432#L200 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 1438#L212 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 1439#L213 eval_#t~ret9 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret9;havoc eval_#t~ret9; 1461#L227 assume !(0 != eval_~tmp~0); 1462#L261 start_simulation_~kernel_st~0 := 2; 1475#L175-1 start_simulation_~kernel_st~0 := 3; 1444#L271-2 assume 0 == ~M_E~0;~M_E~0 := 1; 1445#L271-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 1362#L276-3 assume 0 == ~E_M~0;~E_M~0 := 1; 1363#L281-3 assume !(0 == ~E_1~0); 1376#L286-3 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 1420#L136-9 assume !(1 == ~m_pc~0); 1334#L136-11 is_master_triggered_~__retres1~0 := 0; 1335#L147-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 1447#L148-3 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 1418#L331-9 assume !(0 != activate_threads_~tmp~1); 1419#L331-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 1403#L155-9 assume !(1 == ~t1_pc~0); 1404#L155-11 is_transmit1_triggered_~__retres1~1 := 0; 1374#L166-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 1375#L167-3 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 1417#L339-9 assume !(0 != activate_threads_~tmp___0~0); 1431#L339-11 assume 1 == ~M_E~0;~M_E~0 := 2; 1434#L299-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 1460#L304-3 assume 1 == ~E_M~0;~E_M~0 := 2; 1442#L309-3 assume 1 == ~E_1~0;~E_1~0 := 2; 1380#L314-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 1364#L200-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 1366#L212-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 1467#L213-1 start_simulation_#t~ret15 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 1331#L459 assume !(0 == start_simulation_~tmp~3); 1332#L459-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret14, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 1471#L200-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 1485#L212-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 1486#L213-2 stop_simulation_#t~ret14 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret14;havoc stop_simulation_#t~ret14; 1479#L414 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 1480#L421 stop_simulation_#res := stop_simulation_~__retres2~0; 1349#L422 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 1350#L472 assume !(0 != start_simulation_~tmp___0~1); 1356#L440-1 [2021-11-09 09:47:04,790 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:04,790 INFO L85 PathProgramCache]: Analyzing trace with hash -1690777217, now seen corresponding path program 1 times [2021-11-09 09:47:04,791 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:04,791 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1306144516] [2021-11-09 09:47:04,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:04,791 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:04,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 09:47:04,862 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 09:47:04,862 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 09:47:04,862 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1306144516] [2021-11-09 09:47:04,863 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1306144516] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 09:47:04,863 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 09:47:04,863 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-09 09:47:04,863 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [893412249] [2021-11-09 09:47:04,864 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 09:47:04,864 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:04,864 INFO L85 PathProgramCache]: Analyzing trace with hash -1190032496, now seen corresponding path program 1 times [2021-11-09 09:47:04,865 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:04,865 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [804398336] [2021-11-09 09:47:04,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:04,865 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:04,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 09:47:04,944 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 09:47:04,944 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 09:47:04,944 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [804398336] [2021-11-09 09:47:04,945 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [804398336] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 09:47:04,945 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 09:47:04,945 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 09:47:04,945 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1128622511] [2021-11-09 09:47:04,946 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 09:47:04,946 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 09:47:04,947 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-09 09:47:04,947 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-09 09:47:04,947 INFO L87 Difference]: Start difference. First operand 323 states and 462 transitions. cyclomatic complexity: 141 Second operand has 4 states, 3 states have (on average 8.333333333333334) internal successors, (25), 3 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 09:47:05,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 09:47:05,096 INFO L93 Difference]: Finished difference Result 651 states and 904 transitions. [2021-11-09 09:47:05,097 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-09 09:47:05,097 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 651 states and 904 transitions. [2021-11-09 09:47:05,106 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 563 [2021-11-09 09:47:05,115 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 651 states to 651 states and 904 transitions. [2021-11-09 09:47:05,115 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 651 [2021-11-09 09:47:05,116 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 651 [2021-11-09 09:47:05,116 INFO L73 IsDeterministic]: Start isDeterministic. Operand 651 states and 904 transitions. [2021-11-09 09:47:05,118 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 09:47:05,118 INFO L681 BuchiCegarLoop]: Abstraction has 651 states and 904 transitions. [2021-11-09 09:47:05,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 651 states and 904 transitions. [2021-11-09 09:47:05,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 651 to 622. [2021-11-09 09:47:05,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 622 states, 622 states have (on average 1.3842443729903537) internal successors, (861), 621 states have internal predecessors, (861), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 09:47:05,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 622 states to 622 states and 861 transitions. [2021-11-09 09:47:05,180 INFO L704 BuchiCegarLoop]: Abstraction has 622 states and 861 transitions. [2021-11-09 09:47:05,180 INFO L587 BuchiCegarLoop]: Abstraction has 622 states and 861 transitions. [2021-11-09 09:47:05,199 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-11-09 09:47:05,199 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 622 states and 861 transitions. [2021-11-09 09:47:05,206 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 559 [2021-11-09 09:47:05,206 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 09:47:05,206 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 09:47:05,207 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:05,208 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:05,208 INFO L791 eck$LassoCheckResult]: Stem: 2468#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 2389#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 2390#L403 havoc start_simulation_#t~ret15, start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 2309#L175 assume 1 == ~m_i~0;~m_st~0 := 0; 2310#L182-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 2457#L187-1 assume !(0 == ~M_E~0); 2359#L271-1 assume !(0 == ~T1_E~0); 2360#L276-1 assume 0 == ~E_M~0;~E_M~0 := 1; 2387#L281-1 assume 0 == ~E_1~0;~E_1~0 := 1; 2450#L286-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 2890#L136 assume !(1 == ~m_pc~0); 2889#L136-2 is_master_triggered_~__retres1~0 := 0; 2887#L147 is_master_triggered_#res := is_master_triggered_~__retres1~0; 2885#L148 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 2883#L331 assume !(0 != activate_threads_~tmp~1); 2881#L331-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 2879#L155 assume !(1 == ~t1_pc~0); 2877#L155-2 is_transmit1_triggered_~__retres1~1 := 0; 2875#L166 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 2873#L167 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 2871#L339 assume !(0 != activate_threads_~tmp___0~0); 2869#L339-2 assume !(1 == ~M_E~0); 2867#L299-1 assume !(1 == ~T1_E~0); 2865#L304-1 assume !(1 == ~E_M~0); 2779#L309-1 assume 1 == ~E_1~0;~E_1~0 := 2; 2773#L440-1 [2021-11-09 09:47:05,208 INFO L793 eck$LassoCheckResult]: Loop: 2773#L440-1 assume !false; 2357#L441 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret9, eval_#t~nondet10, eval_~tmp_ndt_1~0, eval_#t~nondet11, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 2358#L246 assume !false; 2419#L223 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 2460#L200 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 2430#L212 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 2431#L213 eval_#t~ret9 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret9;havoc eval_#t~ret9; 2761#L227 assume !(0 != eval_~tmp~0); 2762#L261 start_simulation_~kernel_st~0 := 2; 2857#L175-1 start_simulation_~kernel_st~0 := 3; 2855#L271-2 assume 0 == ~M_E~0;~M_E~0 := 1; 2853#L271-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 2851#L276-3 assume 0 == ~E_M~0;~E_M~0 := 1; 2849#L281-3 assume 0 == ~E_1~0;~E_1~0 := 1; 2846#L286-3 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 2844#L136-9 assume !(1 == ~m_pc~0); 2842#L136-11 is_master_triggered_~__retres1~0 := 0; 2840#L147-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 2838#L148-3 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 2836#L331-9 assume !(0 != activate_threads_~tmp~1); 2834#L331-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 2832#L155-9 assume !(1 == ~t1_pc~0); 2830#L155-11 is_transmit1_triggered_~__retres1~1 := 0; 2828#L166-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 2826#L167-3 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 2824#L339-9 assume !(0 != activate_threads_~tmp___0~0); 2822#L339-11 assume 1 == ~M_E~0;~M_E~0 := 2; 2820#L299-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 2818#L304-3 assume 1 == ~E_M~0;~E_M~0 := 2; 2816#L309-3 assume 1 == ~E_1~0;~E_1~0 := 2; 2815#L314-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 2814#L200-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 2812#L212-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 2811#L213-1 start_simulation_#t~ret15 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 2809#L459 assume !(0 == start_simulation_~tmp~3); 2810#L459-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret14, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 2440#L200-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 2441#L212-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 2326#L213-2 stop_simulation_#t~ret14 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret14;havoc stop_simulation_#t~ret14; 2327#L414 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 2469#L421 stop_simulation_#res := stop_simulation_~__retres2~0; 2781#L422 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 2778#L472 assume !(0 != start_simulation_~tmp___0~1); 2773#L440-1 [2021-11-09 09:47:05,209 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:05,209 INFO L85 PathProgramCache]: Analyzing trace with hash 1891715391, now seen corresponding path program 1 times [2021-11-09 09:47:05,209 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:05,210 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1212719373] [2021-11-09 09:47:05,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:05,210 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:05,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 09:47:05,285 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 09:47:05,285 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 09:47:05,286 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1212719373] [2021-11-09 09:47:05,286 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1212719373] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 09:47:05,286 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 09:47:05,303 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-09 09:47:05,303 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2147049116] [2021-11-09 09:47:05,304 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 09:47:05,304 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:05,304 INFO L85 PathProgramCache]: Analyzing trace with hash -1212664750, now seen corresponding path program 1 times [2021-11-09 09:47:05,305 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:05,305 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1611971197] [2021-11-09 09:47:05,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:05,306 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:05,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 09:47:05,361 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 09:47:05,361 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 09:47:05,361 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1611971197] [2021-11-09 09:47:05,362 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1611971197] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 09:47:05,362 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 09:47:05,362 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 09:47:05,363 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [6601367] [2021-11-09 09:47:05,363 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 09:47:05,363 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 09:47:05,364 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 09:47:05,364 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 09:47:05,365 INFO L87 Difference]: Start difference. First operand 622 states and 861 transitions. cyclomatic complexity: 243 Second operand has 3 states, 3 states have (on average 8.333333333333334) internal successors, (25), 2 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 09:47:05,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 09:47:05,399 INFO L93 Difference]: Finished difference Result 581 states and 782 transitions. [2021-11-09 09:47:05,400 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 09:47:05,400 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 581 states and 782 transitions. [2021-11-09 09:47:05,408 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 535 [2021-11-09 09:47:05,415 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 581 states to 581 states and 782 transitions. [2021-11-09 09:47:05,415 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 581 [2021-11-09 09:47:05,416 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 581 [2021-11-09 09:47:05,417 INFO L73 IsDeterministic]: Start isDeterministic. Operand 581 states and 782 transitions. [2021-11-09 09:47:05,418 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 09:47:05,418 INFO L681 BuchiCegarLoop]: Abstraction has 581 states and 782 transitions. [2021-11-09 09:47:05,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 581 states and 782 transitions. [2021-11-09 09:47:05,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 581 to 371. [2021-11-09 09:47:05,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 371 states, 371 states have (on average 1.3396226415094339) internal successors, (497), 370 states have internal predecessors, (497), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 09:47:05,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 371 states to 371 states and 497 transitions. [2021-11-09 09:47:05,431 INFO L704 BuchiCegarLoop]: Abstraction has 371 states and 497 transitions. [2021-11-09 09:47:05,432 INFO L587 BuchiCegarLoop]: Abstraction has 371 states and 497 transitions. [2021-11-09 09:47:05,432 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-11-09 09:47:05,432 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 371 states and 497 transitions. [2021-11-09 09:47:05,436 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 325 [2021-11-09 09:47:05,436 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 09:47:05,436 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 09:47:05,437 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:05,437 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:05,438 INFO L791 eck$LassoCheckResult]: Stem: 3682#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 3600#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 3601#L403 havoc start_simulation_#t~ret15, start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 3521#L175 assume 1 == ~m_i~0;~m_st~0 := 0; 3522#L182-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 3669#L187-1 assume !(0 == ~M_E~0); 3569#L271-1 assume !(0 == ~T1_E~0); 3570#L276-1 assume !(0 == ~E_M~0); 3599#L281-1 assume 0 == ~E_1~0;~E_1~0 := 1; 3576#L286-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 3577#L136 assume !(1 == ~m_pc~0); 3586#L136-2 is_master_triggered_~__retres1~0 := 0; 3587#L147 is_master_triggered_#res := is_master_triggered_~__retres1~0; 3681#L148 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 3535#L331 assume !(0 != activate_threads_~tmp~1); 3536#L331-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 3754#L155 assume !(1 == ~t1_pc~0); 3663#L155-2 is_transmit1_triggered_~__retres1~1 := 0; 3664#L166 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 3566#L167 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 3567#L339 assume !(0 != activate_threads_~tmp___0~0); 3670#L339-2 assume !(1 == ~M_E~0); 3671#L299-1 assume !(1 == ~T1_E~0); 3745#L304-1 assume !(1 == ~E_M~0); 3743#L309-1 assume 1 == ~E_1~0;~E_1~0 := 2; 3553#L440-1 [2021-11-09 09:47:05,438 INFO L793 eck$LassoCheckResult]: Loop: 3553#L440-1 assume !false; 3738#L441 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret9, eval_#t~nondet10, eval_~tmp_ndt_1~0, eval_#t~nondet11, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 3735#L246 assume !false; 3733#L223 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 3732#L200 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 3729#L212 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 3726#L213 eval_#t~ret9 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret9;havoc eval_#t~ret9; 3723#L227 assume !(0 != eval_~tmp~0); 3724#L261 start_simulation_~kernel_st~0 := 2; 3842#L175-1 start_simulation_~kernel_st~0 := 3; 3841#L271-2 assume 0 == ~M_E~0;~M_E~0 := 1; 3840#L271-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 3839#L276-3 assume !(0 == ~E_M~0); 3837#L281-3 assume 0 == ~E_1~0;~E_1~0 := 1; 3836#L286-3 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 3835#L136-9 assume !(1 == ~m_pc~0); 3834#L136-11 is_master_triggered_~__retres1~0 := 0; 3833#L147-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 3832#L148-3 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 3831#L331-9 assume !(0 != activate_threads_~tmp~1); 3830#L331-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 3829#L155-9 assume !(1 == ~t1_pc~0); 3828#L155-11 is_transmit1_triggered_~__retres1~1 := 0; 3827#L166-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 3826#L167-3 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 3825#L339-9 assume !(0 != activate_threads_~tmp___0~0); 3824#L339-11 assume 1 == ~M_E~0;~M_E~0 := 2; 3823#L299-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 3822#L304-3 assume !(1 == ~E_M~0); 3820#L309-3 assume 1 == ~E_1~0;~E_1~0 := 2; 3818#L314-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 3816#L200-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 3813#L212-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 3811#L213-1 start_simulation_#t~ret15 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 3809#L459 assume !(0 == start_simulation_~tmp~3); 3807#L459-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret14, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 3806#L200-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 3804#L212-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 3803#L213-2 stop_simulation_#t~ret14 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret14;havoc stop_simulation_#t~ret14; 3802#L414 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 3801#L421 stop_simulation_#res := stop_simulation_~__retres2~0; 3800#L422 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 3742#L472 assume !(0 != start_simulation_~tmp___0~1); 3553#L440-1 [2021-11-09 09:47:05,439 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:05,439 INFO L85 PathProgramCache]: Analyzing trace with hash -102429315, now seen corresponding path program 1 times [2021-11-09 09:47:05,439 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:05,440 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1665057857] [2021-11-09 09:47:05,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:05,440 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:05,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 09:47:05,473 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 09:47:05,474 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 09:47:05,474 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1665057857] [2021-11-09 09:47:05,474 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1665057857] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 09:47:05,475 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 09:47:05,475 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 09:47:05,475 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1799090636] [2021-11-09 09:47:05,476 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 09:47:05,476 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:05,476 INFO L85 PathProgramCache]: Analyzing trace with hash -1790928554, now seen corresponding path program 1 times [2021-11-09 09:47:05,477 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:05,477 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [880083945] [2021-11-09 09:47:05,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:05,478 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:05,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 09:47:05,519 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 09:47:05,520 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 09:47:05,520 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [880083945] [2021-11-09 09:47:05,520 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [880083945] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 09:47:05,521 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 09:47:05,521 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 09:47:05,521 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [707379210] [2021-11-09 09:47:05,522 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 09:47:05,522 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 09:47:05,523 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-09 09:47:05,523 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-09 09:47:05,523 INFO L87 Difference]: Start difference. First operand 371 states and 497 transitions. cyclomatic complexity: 128 Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 3 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 09:47:05,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 09:47:05,596 INFO L93 Difference]: Finished difference Result 470 states and 635 transitions. [2021-11-09 09:47:05,596 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-09 09:47:05,596 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 470 states and 635 transitions. [2021-11-09 09:47:05,602 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 419 [2021-11-09 09:47:05,608 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 470 states to 470 states and 635 transitions. [2021-11-09 09:47:05,608 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 470 [2021-11-09 09:47:05,609 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 470 [2021-11-09 09:47:05,609 INFO L73 IsDeterministic]: Start isDeterministic. Operand 470 states and 635 transitions. [2021-11-09 09:47:05,610 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 09:47:05,610 INFO L681 BuchiCegarLoop]: Abstraction has 470 states and 635 transitions. [2021-11-09 09:47:05,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 470 states and 635 transitions. [2021-11-09 09:47:05,618 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 470 to 305. [2021-11-09 09:47:05,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 305 states, 305 states have (on average 1.3344262295081968) internal successors, (407), 304 states have internal predecessors, (407), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 09:47:05,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 305 states to 305 states and 407 transitions. [2021-11-09 09:47:05,621 INFO L704 BuchiCegarLoop]: Abstraction has 305 states and 407 transitions. [2021-11-09 09:47:05,622 INFO L587 BuchiCegarLoop]: Abstraction has 305 states and 407 transitions. [2021-11-09 09:47:05,622 INFO L425 BuchiCegarLoop]: ======== Iteration 7============ [2021-11-09 09:47:05,622 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 305 states and 407 transitions. [2021-11-09 09:47:05,625 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 275 [2021-11-09 09:47:05,625 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 09:47:05,625 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 09:47:05,626 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:05,626 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:05,627 INFO L791 eck$LassoCheckResult]: Stem: 4523#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 4449#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 4450#L403 havoc start_simulation_#t~ret15, start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 4374#L175 assume 1 == ~m_i~0;~m_st~0 := 0; 4375#L182-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 4514#L187-1 assume !(0 == ~M_E~0); 4422#L271-1 assume !(0 == ~T1_E~0); 4423#L276-1 assume !(0 == ~E_M~0); 4448#L281-1 assume !(0 == ~E_1~0); 4428#L286-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 4397#L136 assume !(1 == ~m_pc~0); 4398#L136-2 is_master_triggered_~__retres1~0 := 0; 4436#L147 is_master_triggered_#res := is_master_triggered_~__retres1~0; 4433#L148 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 4388#L331 assume !(0 != activate_threads_~tmp~1); 4389#L331-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 4454#L155 assume !(1 == ~t1_pc~0); 4455#L155-2 is_transmit1_triggered_~__retres1~1 := 0; 4506#L166 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 4419#L167 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 4420#L339 assume !(0 != activate_threads_~tmp___0~0); 4515#L339-2 assume !(1 == ~M_E~0); 4437#L299-1 assume !(1 == ~T1_E~0); 4438#L304-1 assume !(1 == ~E_M~0); 4405#L309-1 assume !(1 == ~E_1~0); 4406#L440-1 [2021-11-09 09:47:05,627 INFO L793 eck$LassoCheckResult]: Loop: 4406#L440-1 assume !false; 4421#L441 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret9, eval_#t~nondet10, eval_~tmp_ndt_1~0, eval_#t~nondet11, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 4378#L246 assume !false; 4480#L223 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 4481#L200 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 4489#L212 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 4490#L213 eval_#t~ret9 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret9;havoc eval_#t~ret9; 4508#L227 assume !(0 != eval_~tmp~0); 4509#L261 start_simulation_~kernel_st~0 := 2; 4524#L175-1 start_simulation_~kernel_st~0 := 3; 4495#L271-2 assume 0 == ~M_E~0;~M_E~0 := 1; 4496#L271-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 4412#L276-3 assume !(0 == ~E_M~0); 4413#L281-3 assume !(0 == ~E_1~0); 4426#L286-3 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 4470#L136-9 assume !(1 == ~m_pc~0); 4384#L136-11 is_master_triggered_~__retres1~0 := 0; 4385#L147-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 4501#L148-3 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 4468#L331-9 assume !(0 != activate_threads_~tmp~1); 4469#L331-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 4451#L155-9 assume !(1 == ~t1_pc~0); 4452#L155-11 is_transmit1_triggered_~__retres1~1 := 0; 4424#L166-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 4425#L167-3 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 4467#L339-9 assume !(0 != activate_threads_~tmp___0~0); 4479#L339-11 assume 1 == ~M_E~0;~M_E~0 := 2; 4483#L299-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 4507#L304-3 assume !(1 == ~E_M~0); 4492#L309-3 assume !(1 == ~E_1~0); 4431#L314-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 4414#L200-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 4416#L212-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 4511#L213-1 start_simulation_#t~ret15 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 4381#L459 assume !(0 == start_simulation_~tmp~3); 4382#L459-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret14, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 4671#L200-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 4669#L212-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 4668#L213-2 stop_simulation_#t~ret14 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret14;havoc stop_simulation_#t~ret14; 4525#L414 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 4432#L421 stop_simulation_#res := stop_simulation_~__retres2~0; 4399#L422 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 4400#L472 assume !(0 != start_simulation_~tmp___0~1); 4406#L440-1 [2021-11-09 09:47:05,627 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:05,628 INFO L85 PathProgramCache]: Analyzing trace with hash -1690777215, now seen corresponding path program 1 times [2021-11-09 09:47:05,628 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:05,628 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [942855277] [2021-11-09 09:47:05,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:05,629 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:05,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 09:47:05,655 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 09:47:05,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 09:47:05,722 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 09:47:05,722 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:05,723 INFO L85 PathProgramCache]: Analyzing trace with hash 1515553746, now seen corresponding path program 1 times [2021-11-09 09:47:05,723 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:05,723 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1497392495] [2021-11-09 09:47:05,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:05,724 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:05,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 09:47:05,792 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 09:47:05,792 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 09:47:05,793 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1497392495] [2021-11-09 09:47:05,793 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1497392495] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 09:47:05,793 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 09:47:05,793 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 09:47:05,794 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [123508506] [2021-11-09 09:47:05,794 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 09:47:05,794 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 09:47:05,795 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-11-09 09:47:05,795 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2021-11-09 09:47:05,796 INFO L87 Difference]: Start difference. First operand 305 states and 407 transitions. cyclomatic complexity: 104 Second operand has 5 states, 5 states have (on average 8.6) internal successors, (43), 5 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 09:47:05,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 09:47:05,901 INFO L93 Difference]: Finished difference Result 519 states and 684 transitions. [2021-11-09 09:47:05,901 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2021-11-09 09:47:05,902 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 519 states and 684 transitions. [2021-11-09 09:47:05,908 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 484 [2021-11-09 09:47:05,914 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 519 states to 519 states and 684 transitions. [2021-11-09 09:47:05,914 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 519 [2021-11-09 09:47:05,915 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 519 [2021-11-09 09:47:05,915 INFO L73 IsDeterministic]: Start isDeterministic. Operand 519 states and 684 transitions. [2021-11-09 09:47:05,917 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 09:47:05,917 INFO L681 BuchiCegarLoop]: Abstraction has 519 states and 684 transitions. [2021-11-09 09:47:05,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states and 684 transitions. [2021-11-09 09:47:05,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 314. [2021-11-09 09:47:05,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 314 states, 314 states have (on average 1.3248407643312101) internal successors, (416), 313 states have internal predecessors, (416), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 09:47:05,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 314 states to 314 states and 416 transitions. [2021-11-09 09:47:05,929 INFO L704 BuchiCegarLoop]: Abstraction has 314 states and 416 transitions. [2021-11-09 09:47:05,929 INFO L587 BuchiCegarLoop]: Abstraction has 314 states and 416 transitions. [2021-11-09 09:47:05,929 INFO L425 BuchiCegarLoop]: ======== Iteration 8============ [2021-11-09 09:47:05,929 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 314 states and 416 transitions. [2021-11-09 09:47:05,932 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 284 [2021-11-09 09:47:05,932 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 09:47:05,933 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 09:47:05,933 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:05,934 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:05,934 INFO L791 eck$LassoCheckResult]: Stem: 5374#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 5289#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 5290#L403 havoc start_simulation_#t~ret15, start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 5214#L175 assume 1 == ~m_i~0;~m_st~0 := 0; 5215#L182-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 5361#L187-1 assume !(0 == ~M_E~0); 5262#L271-1 assume !(0 == ~T1_E~0); 5263#L276-1 assume !(0 == ~E_M~0); 5288#L281-1 assume !(0 == ~E_1~0); 5269#L286-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 5237#L136 assume !(1 == ~m_pc~0); 5238#L136-2 is_master_triggered_~__retres1~0 := 0; 5277#L147 is_master_triggered_#res := is_master_triggered_~__retres1~0; 5274#L148 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 5228#L331 assume !(0 != activate_threads_~tmp~1); 5229#L331-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 5294#L155 assume !(1 == ~t1_pc~0); 5295#L155-2 is_transmit1_triggered_~__retres1~1 := 0; 5352#L166 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 5259#L167 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 5260#L339 assume !(0 != activate_threads_~tmp___0~0); 5362#L339-2 assume !(1 == ~M_E~0); 5278#L299-1 assume !(1 == ~T1_E~0); 5279#L304-1 assume !(1 == ~E_M~0); 5245#L309-1 assume !(1 == ~E_1~0); 5246#L440-1 [2021-11-09 09:47:05,934 INFO L793 eck$LassoCheckResult]: Loop: 5246#L440-1 assume !false; 5261#L441 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret9, eval_#t~nondet10, eval_~tmp_ndt_1~0, eval_#t~nondet11, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 5218#L246 assume !false; 5431#L223 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 5429#L200 assume !(0 == ~m_st~0); 5426#L204 assume !(0 == ~t1_st~0);exists_runnable_thread_~__retres1~2 := 0; 5423#L212 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 5419#L213 eval_#t~ret9 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret9;havoc eval_#t~ret9; 5418#L227 assume !(0 != eval_~tmp~0); 5417#L261 start_simulation_~kernel_st~0 := 2; 5375#L175-1 start_simulation_~kernel_st~0 := 3; 5337#L271-2 assume 0 == ~M_E~0;~M_E~0 := 1; 5338#L271-4 assume 0 == ~T1_E~0;~T1_E~0 := 1; 5252#L276-3 assume !(0 == ~E_M~0); 5253#L281-3 assume !(0 == ~E_1~0); 5370#L286-3 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 5310#L136-9 assume !(1 == ~m_pc~0); 5311#L136-11 is_master_triggered_~__retres1~0 := 0; 5340#L147-3 is_master_triggered_#res := is_master_triggered_~__retres1~0; 5341#L148-3 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 5308#L331-9 assume !(0 != activate_threads_~tmp~1); 5309#L331-11 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 5482#L155-9 assume !(1 == ~t1_pc~0); 5481#L155-11 is_transmit1_triggered_~__retres1~1 := 0; 5480#L166-3 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 5479#L167-3 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 5478#L339-9 assume !(0 != activate_threads_~tmp___0~0); 5477#L339-11 assume 1 == ~M_E~0;~M_E~0 := 2; 5476#L299-3 assume 1 == ~T1_E~0;~T1_E~0 := 2; 5475#L304-3 assume !(1 == ~E_M~0); 5474#L309-3 assume !(1 == ~E_1~0); 5473#L314-3 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 5464#L200-1 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 5461#L212-1 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 5460#L213-1 start_simulation_#t~ret15 := exists_runnable_thread_#res;start_simulation_~tmp~3 := start_simulation_#t~ret15;havoc start_simulation_#t~ret15; 5459#L459 assume !(0 == start_simulation_~tmp~3); 5266#L459-1 havoc stop_simulation_#res;havoc stop_simulation_#t~ret14, stop_simulation_~tmp~2, stop_simulation_~__retres2~0;havoc stop_simulation_~tmp~2;havoc stop_simulation_~__retres2~0;havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 5369#L200-2 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 5515#L212-2 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 5230#L213-2 stop_simulation_#t~ret14 := exists_runnable_thread_#res;stop_simulation_~tmp~2 := stop_simulation_#t~ret14;havoc stop_simulation_#t~ret14; 5231#L414 assume 0 != stop_simulation_~tmp~2;stop_simulation_~__retres2~0 := 0; 5273#L421 stop_simulation_#res := stop_simulation_~__retres2~0; 5239#L422 start_simulation_#t~ret16 := stop_simulation_#res;start_simulation_~tmp___0~1 := start_simulation_#t~ret16;havoc start_simulation_#t~ret16; 5240#L472 assume !(0 != start_simulation_~tmp___0~1); 5246#L440-1 [2021-11-09 09:47:05,936 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:05,936 INFO L85 PathProgramCache]: Analyzing trace with hash -1690777215, now seen corresponding path program 2 times [2021-11-09 09:47:05,936 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:05,936 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1536378741] [2021-11-09 09:47:05,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:05,937 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:05,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 09:47:05,966 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 09:47:05,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 09:47:05,987 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 09:47:05,987 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:05,988 INFO L85 PathProgramCache]: Analyzing trace with hash -176459851, now seen corresponding path program 1 times [2021-11-09 09:47:05,988 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:05,988 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1331891947] [2021-11-09 09:47:05,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:05,989 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:06,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 09:47:06,053 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 09:47:06,053 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 09:47:06,053 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1331891947] [2021-11-09 09:47:06,054 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1331891947] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 09:47:06,054 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 09:47:06,054 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 09:47:06,054 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1720510108] [2021-11-09 09:47:06,055 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 09:47:06,055 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 09:47:06,056 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 09:47:06,056 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 09:47:06,056 INFO L87 Difference]: Start difference. First operand 314 states and 416 transitions. cyclomatic complexity: 104 Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 09:47:06,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 09:47:06,088 INFO L93 Difference]: Finished difference Result 345 states and 443 transitions. [2021-11-09 09:47:06,089 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 09:47:06,089 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 345 states and 443 transitions. [2021-11-09 09:47:06,093 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 305 [2021-11-09 09:47:06,110 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 345 states to 345 states and 443 transitions. [2021-11-09 09:47:06,111 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 345 [2021-11-09 09:47:06,111 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 345 [2021-11-09 09:47:06,112 INFO L73 IsDeterministic]: Start isDeterministic. Operand 345 states and 443 transitions. [2021-11-09 09:47:06,112 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 09:47:06,113 INFO L681 BuchiCegarLoop]: Abstraction has 345 states and 443 transitions. [2021-11-09 09:47:06,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 345 states and 443 transitions. [2021-11-09 09:47:06,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 345 to 345. [2021-11-09 09:47:06,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 345 states, 345 states have (on average 1.2840579710144928) internal successors, (443), 344 states have internal predecessors, (443), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 09:47:06,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 345 states to 345 states and 443 transitions. [2021-11-09 09:47:06,128 INFO L704 BuchiCegarLoop]: Abstraction has 345 states and 443 transitions. [2021-11-09 09:47:06,128 INFO L587 BuchiCegarLoop]: Abstraction has 345 states and 443 transitions. [2021-11-09 09:47:06,128 INFO L425 BuchiCegarLoop]: ======== Iteration 9============ [2021-11-09 09:47:06,129 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 345 states and 443 transitions. [2021-11-09 09:47:06,131 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 305 [2021-11-09 09:47:06,132 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 09:47:06,132 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 09:47:06,132 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:06,133 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:06,134 INFO L791 eck$LassoCheckResult]: Stem: 6029#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 5953#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 5954#L403 havoc start_simulation_#t~ret15, start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 5879#L175 assume 1 == ~m_i~0;~m_st~0 := 0; 5880#L182-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 6020#L187-1 assume !(0 == ~M_E~0); 5926#L271-1 assume !(0 == ~T1_E~0); 5927#L276-1 assume !(0 == ~E_M~0); 5952#L281-1 assume !(0 == ~E_1~0); 5933#L286-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 5903#L136 assume !(1 == ~m_pc~0); 5904#L136-2 is_master_triggered_~__retres1~0 := 0; 5941#L147 is_master_triggered_#res := is_master_triggered_~__retres1~0; 5938#L148 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 5893#L331 assume !(0 != activate_threads_~tmp~1); 5894#L331-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 5957#L155 assume !(1 == ~t1_pc~0); 5958#L155-2 is_transmit1_triggered_~__retres1~1 := 0; 6011#L166 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 5923#L167 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 5924#L339 assume !(0 != activate_threads_~tmp___0~0); 6021#L339-2 assume !(1 == ~M_E~0); 5942#L299-1 assume !(1 == ~T1_E~0); 5943#L304-1 assume !(1 == ~E_M~0); 5911#L309-1 assume !(1 == ~E_1~0); 5912#L440-1 assume !false; 6067#L441 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret9, eval_#t~nondet10, eval_~tmp_ndt_1~0, eval_#t~nondet11, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 6063#L246 [2021-11-09 09:47:06,135 INFO L793 eck$LassoCheckResult]: Loop: 6063#L246 assume !false; 6060#L223 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 6058#L200 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 6056#L212 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 6055#L213 eval_#t~ret9 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret9;havoc eval_#t~ret9; 6053#L227 assume 0 != eval_~tmp~0; 6051#L227-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet10;havoc eval_#t~nondet10; 6025#L235 assume !(0 != eval_~tmp_ndt_1~0); 6026#L232 assume !(0 == ~t1_st~0); 6063#L246 [2021-11-09 09:47:06,135 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:06,135 INFO L85 PathProgramCache]: Analyzing trace with hash -1339261757, now seen corresponding path program 1 times [2021-11-09 09:47:06,136 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:06,136 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1044101275] [2021-11-09 09:47:06,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:06,137 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:06,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 09:47:06,150 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 09:47:06,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 09:47:06,178 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 09:47:06,180 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:06,180 INFO L85 PathProgramCache]: Analyzing trace with hash -1331440565, now seen corresponding path program 1 times [2021-11-09 09:47:06,180 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:06,185 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [384317324] [2021-11-09 09:47:06,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:06,190 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:06,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 09:47:06,194 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 09:47:06,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 09:47:06,201 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 09:47:06,202 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:06,202 INFO L85 PathProgramCache]: Analyzing trace with hash 610963913, now seen corresponding path program 1 times [2021-11-09 09:47:06,202 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:06,203 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1585428124] [2021-11-09 09:47:06,203 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:06,203 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:06,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 09:47:06,246 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 09:47:06,246 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 09:47:06,249 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1585428124] [2021-11-09 09:47:06,249 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1585428124] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 09:47:06,250 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 09:47:06,250 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-09 09:47:06,250 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1019354026] [2021-11-09 09:47:06,369 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 09:47:06,369 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 09:47:06,370 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 09:47:06,370 INFO L87 Difference]: Start difference. First operand 345 states and 443 transitions. cyclomatic complexity: 101 Second operand has 3 states, 2 states have (on average 18.0) internal successors, (36), 3 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 09:47:06,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 09:47:06,417 INFO L93 Difference]: Finished difference Result 563 states and 708 transitions. [2021-11-09 09:47:06,417 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 09:47:06,417 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 563 states and 708 transitions. [2021-11-09 09:47:06,424 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 453 [2021-11-09 09:47:06,431 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 563 states to 563 states and 708 transitions. [2021-11-09 09:47:06,431 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 563 [2021-11-09 09:47:06,432 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 563 [2021-11-09 09:47:06,432 INFO L73 IsDeterministic]: Start isDeterministic. Operand 563 states and 708 transitions. [2021-11-09 09:47:06,433 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 09:47:06,434 INFO L681 BuchiCegarLoop]: Abstraction has 563 states and 708 transitions. [2021-11-09 09:47:06,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 563 states and 708 transitions. [2021-11-09 09:47:06,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 563 to 522. [2021-11-09 09:47:06,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 522 states, 522 states have (on average 1.2681992337164751) internal successors, (662), 521 states have internal predecessors, (662), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 09:47:06,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 522 states to 522 states and 662 transitions. [2021-11-09 09:47:06,450 INFO L704 BuchiCegarLoop]: Abstraction has 522 states and 662 transitions. [2021-11-09 09:47:06,450 INFO L587 BuchiCegarLoop]: Abstraction has 522 states and 662 transitions. [2021-11-09 09:47:06,450 INFO L425 BuchiCegarLoop]: ======== Iteration 10============ [2021-11-09 09:47:06,450 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 522 states and 662 transitions. [2021-11-09 09:47:06,456 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 437 [2021-11-09 09:47:06,456 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 09:47:06,457 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 09:47:06,461 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:06,461 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:06,461 INFO L791 eck$LassoCheckResult]: Stem: 6955#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 6868#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 6869#L403 havoc start_simulation_#t~ret15, start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 6795#L175 assume 1 == ~m_i~0;~m_st~0 := 0; 6796#L182-1 assume !(1 == ~t1_i~0);~t1_st~0 := 2; 6942#L187-1 assume !(0 == ~M_E~0); 6841#L271-1 assume !(0 == ~T1_E~0); 6842#L276-1 assume !(0 == ~E_M~0); 6867#L281-1 assume !(0 == ~E_1~0); 6847#L286-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 6818#L136 assume !(1 == ~m_pc~0); 6819#L136-2 is_master_triggered_~__retres1~0 := 0; 6856#L147 is_master_triggered_#res := is_master_triggered_~__retres1~0; 6853#L148 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 6809#L331 assume !(0 != activate_threads_~tmp~1); 6810#L331-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 6872#L155 assume !(1 == ~t1_pc~0); 6873#L155-2 is_transmit1_triggered_~__retres1~1 := 0; 6929#L166 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 6836#L167 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 6837#L339 assume 0 != activate_threads_~tmp___0~0;~t1_st~0 := 0; 6962#L339-2 assume !(1 == ~M_E~0); 7109#L299-1 assume !(1 == ~T1_E~0); 6934#L304-1 assume !(1 == ~E_M~0); 6935#L309-1 assume !(1 == ~E_1~0); 7096#L440-1 assume !false; 7090#L441 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret9, eval_#t~nondet10, eval_~tmp_ndt_1~0, eval_#t~nondet11, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 7087#L246 [2021-11-09 09:47:06,461 INFO L793 eck$LassoCheckResult]: Loop: 7087#L246 assume !false; 7085#L223 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 7082#L200 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 7081#L212 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 7080#L213 eval_#t~ret9 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret9;havoc eval_#t~ret9; 7078#L227 assume 0 != eval_~tmp~0; 7079#L227-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet10;havoc eval_#t~nondet10; 6949#L235 assume !(0 != eval_~tmp_ndt_1~0); 6950#L232 assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet11;havoc eval_#t~nondet11; 7091#L249 assume !(0 != eval_~tmp_ndt_2~0); 7087#L246 [2021-11-09 09:47:06,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:06,462 INFO L85 PathProgramCache]: Analyzing trace with hash -624740157, now seen corresponding path program 1 times [2021-11-09 09:47:06,462 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:06,463 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1534631879] [2021-11-09 09:47:06,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:06,463 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:06,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 09:47:06,497 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 09:47:06,497 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 09:47:06,497 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1534631879] [2021-11-09 09:47:06,498 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1534631879] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 09:47:06,498 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 09:47:06,498 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 09:47:06,498 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1041240387] [2021-11-09 09:47:06,499 INFO L796 eck$LassoCheckResult]: stem already infeasible [2021-11-09 09:47:06,499 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:06,499 INFO L85 PathProgramCache]: Analyzing trace with hash 1675013239, now seen corresponding path program 1 times [2021-11-09 09:47:06,500 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:06,500 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1623897608] [2021-11-09 09:47:06,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:06,500 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:06,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 09:47:06,507 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 09:47:06,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 09:47:06,512 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 09:47:06,634 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 09:47:06,634 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 09:47:06,634 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 09:47:06,635 INFO L87 Difference]: Start difference. First operand 522 states and 662 transitions. cyclomatic complexity: 144 Second operand has 3 states, 3 states have (on average 9.0) internal successors, (27), 3 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 09:47:06,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 09:47:06,645 INFO L93 Difference]: Finished difference Result 404 states and 515 transitions. [2021-11-09 09:47:06,653 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 09:47:06,654 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 404 states and 515 transitions. [2021-11-09 09:47:06,658 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 364 [2021-11-09 09:47:06,663 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 404 states to 404 states and 515 transitions. [2021-11-09 09:47:06,663 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 404 [2021-11-09 09:47:06,664 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 404 [2021-11-09 09:47:06,673 INFO L73 IsDeterministic]: Start isDeterministic. Operand 404 states and 515 transitions. [2021-11-09 09:47:06,674 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 09:47:06,674 INFO L681 BuchiCegarLoop]: Abstraction has 404 states and 515 transitions. [2021-11-09 09:47:06,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 404 states and 515 transitions. [2021-11-09 09:47:06,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 404 to 404. [2021-11-09 09:47:06,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 404 states, 404 states have (on average 1.2747524752475248) internal successors, (515), 403 states have internal predecessors, (515), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 09:47:06,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 404 states to 404 states and 515 transitions. [2021-11-09 09:47:06,686 INFO L704 BuchiCegarLoop]: Abstraction has 404 states and 515 transitions. [2021-11-09 09:47:06,686 INFO L587 BuchiCegarLoop]: Abstraction has 404 states and 515 transitions. [2021-11-09 09:47:06,686 INFO L425 BuchiCegarLoop]: ======== Iteration 11============ [2021-11-09 09:47:06,686 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 404 states and 515 transitions. [2021-11-09 09:47:06,690 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 364 [2021-11-09 09:47:06,690 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 09:47:06,690 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 09:47:06,691 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:06,691 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 09:47:06,691 INFO L791 eck$LassoCheckResult]: Stem: 7886#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string4.base, #t~string4.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string4.base, #t~string4.offset, 1);call write~init~int(0, #t~string4.base, 1 + #t~string4.offset, 1);call #t~string5.base, #t~string5.offset := #Ultimate.allocOnStack(22);call #t~string6.base, #t~string6.offset := #Ultimate.allocOnStack(12);~m_pc~0 := 0;~t1_pc~0 := 0;~m_st~0 := 0;~t1_st~0 := 0;~m_i~0 := 0;~t1_i~0 := 0;~M_E~0 := 2;~T1_E~0 := 2;~E_M~0 := 2;~E_1~0 := 2;~token~0 := 0;~local~0 := 0; 7800#L-1 havoc main_#res;havoc main_~__retres1~3;havoc main_~__retres1~3;~m_i~0 := 1;~t1_i~0 := 1; 7801#L403 havoc start_simulation_#t~ret15, start_simulation_#t~ret16, start_simulation_~kernel_st~0, start_simulation_~tmp~3, start_simulation_~tmp___0~1;havoc start_simulation_~kernel_st~0;havoc start_simulation_~tmp~3;havoc start_simulation_~tmp___0~1;start_simulation_~kernel_st~0 := 0; 7727#L175 assume 1 == ~m_i~0;~m_st~0 := 0; 7728#L182-1 assume 1 == ~t1_i~0;~t1_st~0 := 0; 7873#L187-1 assume !(0 == ~M_E~0); 7773#L271-1 assume !(0 == ~T1_E~0); 7774#L276-1 assume !(0 == ~E_M~0); 7799#L281-1 assume !(0 == ~E_1~0); 7780#L286-1 havoc activate_threads_#t~ret12, activate_threads_#t~ret13, activate_threads_~tmp~1, activate_threads_~tmp___0~0;havoc activate_threads_~tmp~1;havoc activate_threads_~tmp___0~0;havoc is_master_triggered_#res;havoc is_master_triggered_~__retres1~0;havoc is_master_triggered_~__retres1~0; 7750#L136 assume !(1 == ~m_pc~0); 7751#L136-2 is_master_triggered_~__retres1~0 := 0; 7788#L147 is_master_triggered_#res := is_master_triggered_~__retres1~0; 7785#L148 activate_threads_#t~ret12 := is_master_triggered_#res;activate_threads_~tmp~1 := activate_threads_#t~ret12;havoc activate_threads_#t~ret12; 7741#L331 assume !(0 != activate_threads_~tmp~1); 7742#L331-2 havoc is_transmit1_triggered_#res;havoc is_transmit1_triggered_~__retres1~1;havoc is_transmit1_triggered_~__retres1~1; 7804#L155 assume !(1 == ~t1_pc~0); 7805#L155-2 is_transmit1_triggered_~__retres1~1 := 0; 7862#L166 is_transmit1_triggered_#res := is_transmit1_triggered_~__retres1~1; 7768#L167 activate_threads_#t~ret13 := is_transmit1_triggered_#res;activate_threads_~tmp___0~0 := activate_threads_#t~ret13;havoc activate_threads_#t~ret13; 7769#L339 assume !(0 != activate_threads_~tmp___0~0); 7874#L339-2 assume !(1 == ~M_E~0); 7789#L299-1 assume !(1 == ~T1_E~0); 7790#L304-1 assume !(1 == ~E_M~0); 7756#L309-1 assume !(1 == ~E_1~0); 7757#L440-1 assume !false; 7937#L441 start_simulation_~kernel_st~0 := 1;havoc eval_#t~ret9, eval_#t~nondet10, eval_~tmp_ndt_1~0, eval_#t~nondet11, eval_~tmp_ndt_2~0, eval_~tmp~0;havoc eval_~tmp~0; 7936#L246 [2021-11-09 09:47:06,691 INFO L793 eck$LassoCheckResult]: Loop: 7936#L246 assume !false; 7935#L223 havoc exists_runnable_thread_#res;havoc exists_runnable_thread_~__retres1~2;havoc exists_runnable_thread_~__retres1~2; 7934#L200 assume 0 == ~m_st~0;exists_runnable_thread_~__retres1~2 := 1; 7933#L212 exists_runnable_thread_#res := exists_runnable_thread_~__retres1~2; 7931#L213 eval_#t~ret9 := exists_runnable_thread_#res;eval_~tmp~0 := eval_#t~ret9;havoc eval_#t~ret9; 7929#L227 assume 0 != eval_~tmp~0; 7927#L227-1 assume 0 == ~m_st~0;havoc eval_~tmp_ndt_1~0;eval_~tmp_ndt_1~0 := eval_#t~nondet10;havoc eval_#t~nondet10; 7880#L235 assume !(0 != eval_~tmp_ndt_1~0); 7881#L232 assume 0 == ~t1_st~0;havoc eval_~tmp_ndt_2~0;eval_~tmp_ndt_2~0 := eval_#t~nondet11;havoc eval_#t~nondet11; 7938#L249 assume !(0 != eval_~tmp_ndt_2~0); 7936#L246 [2021-11-09 09:47:06,692 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:06,692 INFO L85 PathProgramCache]: Analyzing trace with hash -1339261757, now seen corresponding path program 2 times [2021-11-09 09:47:06,692 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:06,692 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1489092422] [2021-11-09 09:47:06,693 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:06,693 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:06,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 09:47:06,701 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 09:47:06,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 09:47:06,715 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 09:47:06,715 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:06,715 INFO L85 PathProgramCache]: Analyzing trace with hash 1675013239, now seen corresponding path program 2 times [2021-11-09 09:47:06,716 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:06,716 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [850264913] [2021-11-09 09:47:06,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:06,716 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:06,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 09:47:06,720 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 09:47:06,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 09:47:06,725 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 09:47:06,726 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 09:47:06,726 INFO L85 PathProgramCache]: Analyzing trace with hash 1760009913, now seen corresponding path program 1 times [2021-11-09 09:47:06,727 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 09:47:06,727 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [708833876] [2021-11-09 09:47:06,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 09:47:06,727 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 09:47:06,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 09:47:06,736 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 09:47:06,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 09:47:06,751 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 09:47:07,970 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 09.11 09:47:07 BoogieIcfgContainer [2021-11-09 09:47:07,970 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2021-11-09 09:47:07,971 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2021-11-09 09:47:07,971 INFO L271 PluginConnector]: Initializing Witness Printer... [2021-11-09 09:47:07,971 INFO L275 PluginConnector]: Witness Printer initialized [2021-11-09 09:47:07,972 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.11 09:47:03" (3/4) ... [2021-11-09 09:47:07,977 INFO L134 WitnessPrinter]: Generating witness for non-termination counterexample [2021-11-09 09:47:08,031 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc6b3006-0ef2-4d8d-82ac-fb41dee7de2f/bin/uautomizer-IVEQpCNsaX/witness.graphml [2021-11-09 09:47:08,032 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2021-11-09 09:47:08,034 INFO L168 Benchmark]: Toolchain (without parser) took 6349.75 ms. Allocated memory was 104.9 MB in the beginning and 155.2 MB in the end (delta: 50.3 MB). Free memory was 64.9 MB in the beginning and 89.6 MB in the end (delta: -24.7 MB). Peak memory consumption was 26.5 MB. Max. memory is 16.1 GB. [2021-11-09 09:47:08,034 INFO L168 Benchmark]: CDTParser took 0.33 ms. Allocated memory is still 104.9 MB. Free memory was 81.7 MB in the beginning and 81.6 MB in the end (delta: 60.0 kB). There was no memory consumed. Max. memory is 16.1 GB. [2021-11-09 09:47:08,035 INFO L168 Benchmark]: CACSL2BoogieTranslator took 452.73 ms. Allocated memory is still 104.9 MB. Free memory was 64.7 MB in the beginning and 78.0 MB in the end (delta: -13.3 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. [2021-11-09 09:47:08,036 INFO L168 Benchmark]: Boogie Procedure Inliner took 68.81 ms. Allocated memory is still 104.9 MB. Free memory was 78.0 MB in the beginning and 75.6 MB in the end (delta: 2.4 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-11-09 09:47:08,036 INFO L168 Benchmark]: Boogie Preprocessor took 49.77 ms. Allocated memory is still 104.9 MB. Free memory was 75.6 MB in the beginning and 73.5 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. [2021-11-09 09:47:08,037 INFO L168 Benchmark]: RCFGBuilder took 960.05 ms. Allocated memory is still 104.9 MB. Free memory was 73.5 MB in the beginning and 54.3 MB in the end (delta: 19.2 MB). Peak memory consumption was 18.9 MB. Max. memory is 16.1 GB. [2021-11-09 09:47:08,037 INFO L168 Benchmark]: BuchiAutomizer took 4745.79 ms. Allocated memory was 104.9 MB in the beginning and 155.2 MB in the end (delta: 50.3 MB). Free memory was 54.3 MB in the beginning and 92.7 MB in the end (delta: -38.5 MB). Peak memory consumption was 48.0 MB. Max. memory is 16.1 GB. [2021-11-09 09:47:08,038 INFO L168 Benchmark]: Witness Printer took 60.83 ms. Allocated memory is still 155.2 MB. Free memory was 92.7 MB in the beginning and 89.6 MB in the end (delta: 3.1 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. [2021-11-09 09:47:08,041 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.33 ms. Allocated memory is still 104.9 MB. Free memory was 81.7 MB in the beginning and 81.6 MB in the end (delta: 60.0 kB). There was no memory consumed. Max. memory is 16.1 GB. * CACSL2BoogieTranslator took 452.73 ms. Allocated memory is still 104.9 MB. Free memory was 64.7 MB in the beginning and 78.0 MB in the end (delta: -13.3 MB). Peak memory consumption was 10.5 MB. Max. memory is 16.1 GB. * Boogie Procedure Inliner took 68.81 ms. Allocated memory is still 104.9 MB. Free memory was 78.0 MB in the beginning and 75.6 MB in the end (delta: 2.4 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * Boogie Preprocessor took 49.77 ms. Allocated memory is still 104.9 MB. Free memory was 75.6 MB in the beginning and 73.5 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 16.1 GB. * RCFGBuilder took 960.05 ms. Allocated memory is still 104.9 MB. Free memory was 73.5 MB in the beginning and 54.3 MB in the end (delta: 19.2 MB). Peak memory consumption was 18.9 MB. Max. memory is 16.1 GB. * BuchiAutomizer took 4745.79 ms. Allocated memory was 104.9 MB in the beginning and 155.2 MB in the end (delta: 50.3 MB). Free memory was 54.3 MB in the beginning and 92.7 MB in the end (delta: -38.5 MB). Peak memory consumption was 48.0 MB. Max. memory is 16.1 GB. * Witness Printer took 60.83 ms. Allocated memory is still 155.2 MB. Free memory was 92.7 MB in the beginning and 89.6 MB in the end (delta: 3.1 MB). Peak memory consumption was 4.2 MB. Max. memory is 16.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 10 terminating modules (10 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.10 modules have a trivial ranking function, the largest among these consists of 5 locations. The remainder module has 404 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 4.6s and 11 iterations. TraceHistogramMax:1. Analysis of lassos took 3.0s. Construction of modules took 0.4s. Büchi inclusion checks took 0.5s. Highest rank in rank-based complementation 0. Minimization of det autom 10. Minimization of nondet autom 0. Automata minimization 0.2s AutomataMinimizationTime, 10 MinimizatonAttempts, 872 StatesRemovedByMinimization, 7 NontrivialMinimizations. Non-live state removal took 0.1s Buchi closure took 0.0s. Biggest automaton had 622 states and ocurred in iteration 4. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 2228 SDtfs, 2786 SDslu, 2253 SDs, 0 SdLazy, 329 SolverSat, 102 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.4s Time LassoAnalysisResults: nont1 unkn0 SFLI2 SFLT0 conc1 concLT0 SILN1 SILU0 SILI6 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 222]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {NULL=2} State at position 1 is {NULL=5, NULL=0, \result=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@627b99ae=0, token=0, __retres1=0, NULL=2, tmp=1, \result=0, kernel_st=1, __retres1=0, tmp___0=0, t1_pc=0, __retres1=1, T1_E=2, NULL=4, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@5f29b52d=0, \result=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@6dfa9808=0, E_1=2, NULL=0, tmp_ndt_1=0, NULL=0, NULL=0, M_E=2, tmp_ndt_2=0, tmp=0, NULL=3, m_i=1, t1_st=0, local=0, m_st=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@4138eae5=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@54ad9871=0, E_M=2, NULL=0, tmp___0=0, tmp=0, __retres1=0, t1_i=1, m_pc=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@6607b674=0, \result=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@6a679ae2=0} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 222]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L24] int m_pc = 0; [L25] int t1_pc = 0; [L26] int m_st ; [L27] int t1_st ; [L28] int m_i ; [L29] int t1_i ; [L30] int M_E = 2; [L31] int T1_E = 2; [L32] int E_M = 2; [L33] int E_1 = 2; [L37] int token ; [L39] int local ; [L485] int __retres1 ; [L400] m_i = 1 [L401] t1_i = 1 [L426] int kernel_st ; [L427] int tmp ; [L428] int tmp___0 ; [L432] kernel_st = 0 [L182] COND TRUE m_i == 1 [L183] m_st = 0 [L187] COND TRUE t1_i == 1 [L188] t1_st = 0 [L271] COND FALSE !(M_E == 0) [L276] COND FALSE !(T1_E == 0) [L281] COND FALSE !(E_M == 0) [L286] COND FALSE !(E_1 == 0) [L324] int tmp ; [L325] int tmp___0 ; [L133] int __retres1 ; [L136] COND FALSE !(m_pc == 1) [L146] __retres1 = 0 [L148] return (__retres1); [L329] tmp = is_master_triggered() [L331] COND FALSE !(\read(tmp)) [L152] int __retres1 ; [L155] COND FALSE !(t1_pc == 1) [L165] __retres1 = 0 [L167] return (__retres1); [L337] tmp___0 = is_transmit1_triggered() [L339] COND FALSE !(\read(tmp___0)) [L299] COND FALSE !(M_E == 1) [L304] COND FALSE !(T1_E == 1) [L309] COND FALSE !(E_M == 1) [L314] COND FALSE !(E_1 == 1) [L440] COND TRUE 1 [L443] kernel_st = 1 [L218] int tmp ; Loop: [L222] COND TRUE 1 [L197] int __retres1 ; [L200] COND TRUE m_st == 0 [L201] __retres1 = 1 [L213] return (__retres1); [L225] tmp = exists_runnable_thread() [L227] COND TRUE \read(tmp) [L232] COND TRUE m_st == 0 [L233] int tmp_ndt_1; [L234] tmp_ndt_1 = __VERIFIER_nondet_int() [L235] COND FALSE !(\read(tmp_ndt_1)) [L246] COND TRUE t1_st == 0 [L247] int tmp_ndt_2; [L248] tmp_ndt_2 = __VERIFIER_nondet_int() [L249] COND FALSE !(\read(tmp_ndt_2)) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2021-11-09 09:47:08,115 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_fc6b3006-0ef2-4d8d-82ac-fb41dee7de2f/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)