./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test8-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version f8e1c903 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test8-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b8fb715e20e93734f29581bef128b7f826b4b5933b157899cd0cb0d668434a9d --- Real Ultimate output --- This is Ultimate 0.2.1-dev-f8e1c90 [2021-11-09 08:34:56,787 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-09 08:34:56,789 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-09 08:34:56,822 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-09 08:34:56,827 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-09 08:34:56,828 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-09 08:34:56,831 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-09 08:34:56,837 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-09 08:34:56,840 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-09 08:34:56,842 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-09 08:34:56,843 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-09 08:34:56,845 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-09 08:34:56,847 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-09 08:34:56,851 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-09 08:34:56,853 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-09 08:34:56,858 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-09 08:34:56,861 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-09 08:34:56,868 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-09 08:34:56,870 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-09 08:34:56,873 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-09 08:34:56,879 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-09 08:34:56,881 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-09 08:34:56,882 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-09 08:34:56,883 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-09 08:34:56,887 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-09 08:34:56,887 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-09 08:34:56,888 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-09 08:34:56,889 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-09 08:34:56,889 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-09 08:34:56,890 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-09 08:34:56,900 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-09 08:34:56,901 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-09 08:34:56,902 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-09 08:34:56,903 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-09 08:34:56,904 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-09 08:34:56,905 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-09 08:34:56,905 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-09 08:34:56,906 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-09 08:34:56,906 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-09 08:34:56,907 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-09 08:34:56,908 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-09 08:34:56,910 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-11-09 08:34:56,948 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-09 08:34:56,948 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-09 08:34:56,948 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-09 08:34:56,949 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-09 08:34:56,950 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-09 08:34:56,950 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-09 08:34:56,950 INFO L138 SettingsManager]: * Use SBE=true [2021-11-09 08:34:56,950 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-11-09 08:34:56,951 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-11-09 08:34:56,951 INFO L138 SettingsManager]: * Use old map elimination=false [2021-11-09 08:34:56,951 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-11-09 08:34:56,951 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-11-09 08:34:56,951 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-11-09 08:34:56,952 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-09 08:34:56,952 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-09 08:34:56,952 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-11-09 08:34:56,952 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-09 08:34:56,952 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-09 08:34:56,953 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-09 08:34:56,972 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-11-09 08:34:56,972 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-11-09 08:34:56,972 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-11-09 08:34:56,972 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-09 08:34:56,973 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-09 08:34:56,973 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-11-09 08:34:56,973 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-09 08:34:56,973 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-11-09 08:34:56,974 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-09 08:34:56,974 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-09 08:34:56,974 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-09 08:34:56,974 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-09 08:34:56,975 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-09 08:34:56,976 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-11-09 08:34:56,976 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b8fb715e20e93734f29581bef128b7f826b4b5933b157899cd0cb0d668434a9d [2021-11-09 08:34:57,211 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-09 08:34:57,235 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-09 08:34:57,238 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-09 08:34:57,239 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-09 08:34:57,240 INFO L275 PluginConnector]: CDTParser initialized [2021-11-09 08:34:57,241 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/../../sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test8-2.i [2021-11-09 08:34:57,299 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/data/5d77b48a7/33b4fbfdddc2443eb340275bf88066f2/FLAG943ed7a5a [2021-11-09 08:34:57,867 INFO L306 CDTParser]: Found 1 translation units. [2021-11-09 08:34:57,867 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test8-2.i [2021-11-09 08:34:57,884 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/data/5d77b48a7/33b4fbfdddc2443eb340275bf88066f2/FLAG943ed7a5a [2021-11-09 08:34:58,123 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/data/5d77b48a7/33b4fbfdddc2443eb340275bf88066f2 [2021-11-09 08:34:58,125 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-09 08:34:58,127 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-09 08:34:58,129 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-09 08:34:58,129 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-09 08:34:58,132 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-09 08:34:58,133 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.11 08:34:58" (1/1) ... [2021-11-09 08:34:58,134 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@48e15101 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:34:58, skipping insertion in model container [2021-11-09 08:34:58,135 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.11 08:34:58" (1/1) ... [2021-11-09 08:34:58,142 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-09 08:34:58,194 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-09 08:34:58,647 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test8-2.i[33021,33034] [2021-11-09 08:34:58,811 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test8-2.i[45234,45247] [2021-11-09 08:34:58,829 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-09 08:34:58,840 INFO L203 MainTranslator]: Completed pre-run [2021-11-09 08:34:58,888 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test8-2.i[33021,33034] [2021-11-09 08:34:58,993 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/sv-benchmarks/c/uthash-2.0.2/uthash_FNV_test8-2.i[45234,45247] [2021-11-09 08:34:59,002 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-09 08:34:59,051 INFO L208 MainTranslator]: Completed translation [2021-11-09 08:34:59,052 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:34:59 WrapperNode [2021-11-09 08:34:59,052 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-09 08:34:59,053 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-09 08:34:59,053 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-09 08:34:59,054 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-09 08:34:59,061 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:34:59" (1/1) ... [2021-11-09 08:34:59,097 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:34:59" (1/1) ... [2021-11-09 08:34:59,174 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-09 08:34:59,175 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-09 08:34:59,175 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-09 08:34:59,175 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-09 08:34:59,189 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:34:59" (1/1) ... [2021-11-09 08:34:59,189 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:34:59" (1/1) ... [2021-11-09 08:34:59,218 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:34:59" (1/1) ... [2021-11-09 08:34:59,219 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:34:59" (1/1) ... [2021-11-09 08:34:59,300 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:34:59" (1/1) ... [2021-11-09 08:34:59,314 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:34:59" (1/1) ... [2021-11-09 08:34:59,334 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:34:59" (1/1) ... [2021-11-09 08:34:59,352 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-09 08:34:59,360 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-09 08:34:59,361 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-09 08:34:59,361 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-09 08:34:59,363 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:34:59" (1/1) ... [2021-11-09 08:34:59,370 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 08:34:59,407 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 08:34:59,439 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 08:34:59,467 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-11-09 08:34:59,482 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-11-09 08:34:59,482 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-09 08:34:59,483 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2021-11-09 08:34:59,483 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2021-11-09 08:34:59,483 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-11-09 08:34:59,483 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-11-09 08:34:59,483 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-09 08:34:59,484 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2021-11-09 08:34:59,484 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-11-09 08:34:59,484 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-09 08:34:59,484 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-09 08:34:59,484 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-09 08:34:59,485 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-09 08:34:59,671 WARN L805 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-11-09 08:35:01,191 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-09 08:35:01,191 INFO L299 CfgBuilder]: Removed 139 assume(true) statements. [2021-11-09 08:35:01,193 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.11 08:35:01 BoogieIcfgContainer [2021-11-09 08:35:01,193 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-09 08:35:01,194 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-11-09 08:35:01,194 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-11-09 08:35:01,197 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-11-09 08:35:01,198 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-09 08:35:01,198 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 09.11 08:34:58" (1/3) ... [2021-11-09 08:35:01,199 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7808732e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.11 08:35:01, skipping insertion in model container [2021-11-09 08:35:01,200 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-09 08:35:01,200 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:34:59" (2/3) ... [2021-11-09 08:35:01,200 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7808732e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.11 08:35:01, skipping insertion in model container [2021-11-09 08:35:01,200 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-09 08:35:01,200 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.11 08:35:01" (3/3) ... [2021-11-09 08:35:01,202 INFO L389 chiAutomizerObserver]: Analyzing ICFG uthash_FNV_test8-2.i [2021-11-09 08:35:01,243 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-11-09 08:35:01,243 INFO L360 BuchiCegarLoop]: Hoare is false [2021-11-09 08:35:01,243 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-11-09 08:35:01,243 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-11-09 08:35:01,243 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-11-09 08:35:01,244 INFO L364 BuchiCegarLoop]: Difference is false [2021-11-09 08:35:01,244 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-11-09 08:35:01,244 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-11-09 08:35:01,266 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 274 states, 269 states have (on average 1.7472118959107807) internal successors, (470), 269 states have internal predecessors, (470), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-09 08:35:01,302 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 260 [2021-11-09 08:35:01,303 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 08:35:01,303 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 08:35:01,312 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-09 08:35:01,314 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 08:35:01,314 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-11-09 08:35:01,316 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 274 states, 269 states have (on average 1.7472118959107807) internal successors, (470), 269 states have internal predecessors, (470), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-09 08:35:01,329 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 260 [2021-11-09 08:35:01,334 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 08:35:01,334 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 08:35:01,335 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-09 08:35:01,335 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 08:35:01,342 INFO L791 eck$LassoCheckResult]: Stem: 267#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int~0 := 0; 183#L-1true havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem146.base, main_#t~mem146.offset, main_#t~mem147, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem151, main_#t~mem150, main_#t~mem152, main_#t~mem153, main_#t~mem155, main_#t~mem154, main_#t~mem156, main_#t~mem157, main_#t~mem159, main_#t~mem158, main_#t~mem160, main_#t~mem161, main_#t~switch162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_#t~mem172, main_#t~mem173, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181.base, main_#t~mem181.offset, main_#t~mem182.base, main_#t~mem182.offset, main_#t~mem183, main_#t~mem184, main_#t~mem185, main_#t~short186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~ret188, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190.base, main_#t~mem190.offset, main_#t~mem191.base, main_#t~mem191.offset, main_#t~mem192, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem193.base, main_#t~mem193.offset, main_#t~mem194.base, main_#t~mem194.offset, main_#t~short195, main_#t~mem196.base, main_#t~mem196.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~mem199.base, main_#t~mem199.offset, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202.base, main_#t~mem202.offset, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206.base, main_#t~mem206.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem218, main_#t~mem216.base, main_#t~mem216.offset, main_#t~mem217, main_#t~mem219.base, main_#t~mem219.offset, main_#t~mem220.base, main_#t~mem220.offset, main_#t~mem221, main_#t~post222, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225.base, main_#t~mem225.offset, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232, main_#t~post233, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem234.base, main_#t~mem234.offset, main_#t~mem235, main_#t~mem148, main_#t~mem149, main_#t~ite237.base, main_#t~ite237.offset, main_#t~mem236.base, main_#t~mem236.offset, main_#t~mem240.base, main_#t~mem240.offset, main_#t~mem241.base, main_#t~mem241.offset, main_#t~short242, main_#t~mem243.base, main_#t~mem243.offset, main_#t~mem244.base, main_#t~mem244.offset, main_#t~mem245.base, main_#t~mem245.offset, main_#t~mem246.base, main_#t~mem246.offset, main_#t~mem247.base, main_#t~mem247.offset, main_#t~mem248.base, main_#t~mem248.offset, main_#t~mem249.base, main_#t~mem249.offset, main_#t~mem250.base, main_#t~mem250.offset, main_#t~mem251, main_#t~mem252.base, main_#t~mem252.offset, main_#t~mem253.base, main_#t~mem253.offset, main_#t~mem254.base, main_#t~mem254.offset, main_#t~mem255, main_#t~mem256.base, main_#t~mem256.offset, main_#t~mem257.base, main_#t~mem257.offset, main_#t~mem258.base, main_#t~mem258.offset, main_#t~mem259.base, main_#t~mem259.offset, main_#t~mem260.base, main_#t~mem260.offset, main_#t~mem261, main_#t~mem262.base, main_#t~mem262.offset, main_#t~mem265, main_#t~mem263.base, main_#t~mem263.offset, main_#t~mem264, main_#t~mem266.base, main_#t~mem266.offset, main_#t~mem267.base, main_#t~mem267.offset, main_#t~mem268, main_#t~post269, main_#t~mem270.base, main_#t~mem270.offset, main_#t~mem271.base, main_#t~mem271.offset, main_#t~mem272.base, main_#t~mem272.offset, main_#t~mem273.base, main_#t~mem273.offset, main_#t~mem274.base, main_#t~mem274.offset, main_#t~mem275.base, main_#t~mem275.offset, main_#t~mem276.base, main_#t~mem276.offset, main_#t~mem277.base, main_#t~mem277.offset, main_~_hd_head~1.base, main_~_hd_head~1.offset, main_#t~mem278.base, main_#t~mem278.offset, main_#t~mem279, main_#t~post280, main_~_hd_bkt~1, main_~_hd_hh_del~1.base, main_~_hd_hh_del~1.offset, main_#t~ite239.base, main_#t~ite239.offset, main_#t~mem238.base, main_#t~mem238.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 83#L765-4true [2021-11-09 08:35:01,343 INFO L793 eck$LassoCheckResult]: Loop: 83#L765-4true call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 223#L765-1true assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 251#L767true assume main_~user~0.base == 0 && main_~user~0.offset == 0;assume false; 175#L767-2true call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 37#L772-124true assume !true; 146#L772-125true call main_#t~mem146.base, main_#t~mem146.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem147 := read~int(main_#t~mem146.base, 12 + main_#t~mem146.offset, 4);test_int_#in~a := (if main_#t~mem147 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem147 % 4294967296 % 4294967296 else main_#t~mem147 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post5, test_int_#t~switch6, test_int_~a;test_int_~a := test_int_#in~a;test_int_#t~post5 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post5;test_int_#t~switch6 := 0 == test_int_#t~post5; 123#L709true assume test_int_#t~switch6;__VERIFIER_assert_#in~cond := (if 1 == test_int_~a then 1 else 0);havoc __VERIFIER_assert_~cond;__VERIFIER_assert_~cond := __VERIFIER_assert_#in~cond; 174#L702true assume 0 == __VERIFIER_assert_~cond;assume false; 10#L708true havoc test_int_#t~post5;havoc test_int_#t~switch6; 222#L707true havoc main_#t~mem146.base, main_#t~mem146.offset;havoc main_#t~mem147; 196#L765-3true call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 83#L765-4true [2021-11-09 08:35:01,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 08:35:01,349 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2021-11-09 08:35:01,357 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 08:35:01,358 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1198816416] [2021-11-09 08:35:01,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:35:01,359 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 08:35:01,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 08:35:01,463 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 08:35:01,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 08:35:01,518 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 08:35:01,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 08:35:01,521 INFO L85 PathProgramCache]: Analyzing trace with hash -1589445803, now seen corresponding path program 1 times [2021-11-09 08:35:01,521 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 08:35:01,521 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1153614839] [2021-11-09 08:35:01,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:35:01,522 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 08:35:01,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 08:35:01,582 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 08:35:01,582 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 08:35:01,582 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1153614839] [2021-11-09 08:35:01,583 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1153614839] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 08:35:01,583 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 08:35:01,583 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-09 08:35:01,584 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1101096021] [2021-11-09 08:35:01,588 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 08:35:01,589 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 08:35:01,602 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-11-09 08:35:01,603 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-11-09 08:35:01,605 INFO L87 Difference]: Start difference. First operand has 274 states, 269 states have (on average 1.7472118959107807) internal successors, (470), 269 states have internal predecessors, (470), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 5.5) internal successors, (11), 2 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 08:35:01,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 08:35:01,628 INFO L93 Difference]: Finished difference Result 274 states and 370 transitions. [2021-11-09 08:35:01,628 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-11-09 08:35:01,629 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 274 states and 370 transitions. [2021-11-09 08:35:01,637 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 260 [2021-11-09 08:35:01,646 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 274 states to 270 states and 366 transitions. [2021-11-09 08:35:01,647 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 270 [2021-11-09 08:35:01,648 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 270 [2021-11-09 08:35:01,649 INFO L73 IsDeterministic]: Start isDeterministic. Operand 270 states and 366 transitions. [2021-11-09 08:35:01,652 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 08:35:01,652 INFO L681 BuchiCegarLoop]: Abstraction has 270 states and 366 transitions. [2021-11-09 08:35:01,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 270 states and 366 transitions. [2021-11-09 08:35:01,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 270 to 270. [2021-11-09 08:35:01,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 270 states, 266 states have (on average 1.3533834586466165) internal successors, (360), 265 states have internal predecessors, (360), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-09 08:35:01,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 270 states to 270 states and 366 transitions. [2021-11-09 08:35:01,694 INFO L704 BuchiCegarLoop]: Abstraction has 270 states and 366 transitions. [2021-11-09 08:35:01,694 INFO L587 BuchiCegarLoop]: Abstraction has 270 states and 366 transitions. [2021-11-09 08:35:01,694 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-11-09 08:35:01,694 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 270 states and 366 transitions. [2021-11-09 08:35:01,698 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 260 [2021-11-09 08:35:01,698 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 08:35:01,698 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 08:35:01,700 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-09 08:35:01,700 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 08:35:01,700 INFO L791 eck$LassoCheckResult]: Stem: 825#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int~0 := 0; 795#L-1 havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem146.base, main_#t~mem146.offset, main_#t~mem147, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem151, main_#t~mem150, main_#t~mem152, main_#t~mem153, main_#t~mem155, main_#t~mem154, main_#t~mem156, main_#t~mem157, main_#t~mem159, main_#t~mem158, main_#t~mem160, main_#t~mem161, main_#t~switch162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_#t~mem172, main_#t~mem173, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181.base, main_#t~mem181.offset, main_#t~mem182.base, main_#t~mem182.offset, main_#t~mem183, main_#t~mem184, main_#t~mem185, main_#t~short186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~ret188, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190.base, main_#t~mem190.offset, main_#t~mem191.base, main_#t~mem191.offset, main_#t~mem192, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem193.base, main_#t~mem193.offset, main_#t~mem194.base, main_#t~mem194.offset, main_#t~short195, main_#t~mem196.base, main_#t~mem196.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~mem199.base, main_#t~mem199.offset, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202.base, main_#t~mem202.offset, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206.base, main_#t~mem206.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem218, main_#t~mem216.base, main_#t~mem216.offset, main_#t~mem217, main_#t~mem219.base, main_#t~mem219.offset, main_#t~mem220.base, main_#t~mem220.offset, main_#t~mem221, main_#t~post222, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225.base, main_#t~mem225.offset, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232, main_#t~post233, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem234.base, main_#t~mem234.offset, main_#t~mem235, main_#t~mem148, main_#t~mem149, main_#t~ite237.base, main_#t~ite237.offset, main_#t~mem236.base, main_#t~mem236.offset, main_#t~mem240.base, main_#t~mem240.offset, main_#t~mem241.base, main_#t~mem241.offset, main_#t~short242, main_#t~mem243.base, main_#t~mem243.offset, main_#t~mem244.base, main_#t~mem244.offset, main_#t~mem245.base, main_#t~mem245.offset, main_#t~mem246.base, main_#t~mem246.offset, main_#t~mem247.base, main_#t~mem247.offset, main_#t~mem248.base, main_#t~mem248.offset, main_#t~mem249.base, main_#t~mem249.offset, main_#t~mem250.base, main_#t~mem250.offset, main_#t~mem251, main_#t~mem252.base, main_#t~mem252.offset, main_#t~mem253.base, main_#t~mem253.offset, main_#t~mem254.base, main_#t~mem254.offset, main_#t~mem255, main_#t~mem256.base, main_#t~mem256.offset, main_#t~mem257.base, main_#t~mem257.offset, main_#t~mem258.base, main_#t~mem258.offset, main_#t~mem259.base, main_#t~mem259.offset, main_#t~mem260.base, main_#t~mem260.offset, main_#t~mem261, main_#t~mem262.base, main_#t~mem262.offset, main_#t~mem265, main_#t~mem263.base, main_#t~mem263.offset, main_#t~mem264, main_#t~mem266.base, main_#t~mem266.offset, main_#t~mem267.base, main_#t~mem267.offset, main_#t~mem268, main_#t~post269, main_#t~mem270.base, main_#t~mem270.offset, main_#t~mem271.base, main_#t~mem271.offset, main_#t~mem272.base, main_#t~mem272.offset, main_#t~mem273.base, main_#t~mem273.offset, main_#t~mem274.base, main_#t~mem274.offset, main_#t~mem275.base, main_#t~mem275.offset, main_#t~mem276.base, main_#t~mem276.offset, main_#t~mem277.base, main_#t~mem277.offset, main_~_hd_head~1.base, main_~_hd_head~1.offset, main_#t~mem278.base, main_#t~mem278.offset, main_#t~mem279, main_#t~post280, main_~_hd_bkt~1, main_~_hd_hh_del~1.base, main_~_hd_hh_del~1.offset, main_#t~ite239.base, main_#t~ite239.offset, main_#t~mem238.base, main_#t~mem238.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 696#L765-4 [2021-11-09 08:35:01,702 INFO L793 eck$LassoCheckResult]: Loop: 696#L765-4 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 697#L765-1 assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 815#L767 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 787#L767-2 call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 624#L772-124 havoc main_~_ha_hashv~0; 625#L772-49 goto; 732#L772-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 788#L772-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 568#L772-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch26 := 11 == main_~_hj_k~0; 569#L772-10 assume main_#t~switch26;call main_#t~mem27 := read~int(main_~_hj_key~0.base, 10 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 16777216 * (main_#t~mem27 % 256);havoc main_#t~mem27; 582#L772-12 main_#t~switch26 := main_#t~switch26 || 10 == main_~_hj_k~0; 657#L772-13 assume main_#t~switch26;call main_#t~mem28 := read~int(main_~_hj_key~0.base, 9 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 65536 * (main_#t~mem28 % 256);havoc main_#t~mem28; 646#L772-15 main_#t~switch26 := main_#t~switch26 || 9 == main_~_hj_k~0; 570#L772-16 assume main_#t~switch26;call main_#t~mem29 := read~int(main_~_hj_key~0.base, 8 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 256 * (main_#t~mem29 % 256);havoc main_#t~mem29; 571#L772-18 main_#t~switch26 := main_#t~switch26 || 8 == main_~_hj_k~0; 754#L772-19 assume main_#t~switch26;call main_#t~mem30 := read~int(main_~_hj_key~0.base, 7 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 16777216 * (main_#t~mem30 % 256);havoc main_#t~mem30; 763#L772-21 main_#t~switch26 := main_#t~switch26 || 7 == main_~_hj_k~0; 764#L772-22 assume !main_#t~switch26; 704#L772-24 main_#t~switch26 := main_#t~switch26 || 6 == main_~_hj_k~0; 705#L772-25 assume main_#t~switch26;call main_#t~mem32 := read~int(main_~_hj_key~0.base, 5 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 256 * (main_#t~mem32 % 256);havoc main_#t~mem32; 767#L772-27 main_#t~switch26 := main_#t~switch26 || 5 == main_~_hj_k~0; 768#L772-28 assume main_#t~switch26;call main_#t~mem33 := read~int(main_~_hj_key~0.base, 4 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + main_#t~mem33 % 256;havoc main_#t~mem33; 775#L772-30 main_#t~switch26 := main_#t~switch26 || 4 == main_~_hj_k~0; 776#L772-31 assume main_#t~switch26;call main_#t~mem34 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem34 % 256);havoc main_#t~mem34; 785#L772-33 main_#t~switch26 := main_#t~switch26 || 3 == main_~_hj_k~0; 762#L772-34 assume main_#t~switch26;call main_#t~mem35 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem35 % 256);havoc main_#t~mem35; 699#L772-36 main_#t~switch26 := main_#t~switch26 || 2 == main_~_hj_k~0; 631#L772-37 assume main_#t~switch26;call main_#t~mem36 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem36 % 256);havoc main_#t~mem36; 632#L772-39 main_#t~switch26 := main_#t~switch26 || 1 == main_~_hj_k~0; 733#L772-40 assume main_#t~switch26;call main_#t~mem37 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem37 % 256;havoc main_#t~mem37; 734#L772-42 havoc main_#t~switch26; 782#L772-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 748#L772-44 goto; 578#L772-46 goto; 579#L772-48 goto; 583#L772-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 584#L772-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset; 821#L772-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_#t~mem56.base, 16 + main_#t~mem56.offset, 4);call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 20 + main_#t~mem58.offset, 4);call write~$Pointer$(main_#t~mem57.base, main_#t~mem57.offset - main_#t~mem59, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57.base, main_#t~mem57.offset;havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem61.base, 8 + main_#t~mem61.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset;havoc main_#t~mem61.base, main_#t~mem61.offset;call main_#t~mem62.base, main_#t~mem62.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem62.base, 16 + main_#t~mem62.offset, 4);havoc main_#t~mem62.base, main_#t~mem62.offset; 773#L772-66 goto; 774#L772-120 havoc main_~_ha_bkt~0;call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64 := read~int(main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);main_#t~post65 := main_#t~mem64;call write~int(1 + main_#t~post65, main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64;havoc main_#t~post65; 816#L772-71 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67 := read~int(main_#t~mem66.base, 4 + main_#t~mem66.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem67 - 1);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67; 757#L772-70 goto; 758#L772-118 call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_#t~mem68.base, main_#t~mem68.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem69.base, main_#t~mem69.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68.base, main_#t~mem68.offset;havoc main_#t~mem69.base, main_#t~mem69.offset;call main_#t~mem70 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post71 := main_#t~mem70;call write~int(1 + main_#t~post71, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem70;havoc main_#t~post71;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem72.base, main_#t~mem72.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem73.base, main_#t~mem73.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 766#L772-73 assume main_#t~mem73.base != 0 || main_#t~mem73.offset != 0;havoc main_#t~mem73.base, main_#t~mem73.offset;call main_#t~mem74.base, main_#t~mem74.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem74.base, 12 + main_#t~mem74.offset, 4);havoc main_#t~mem74.base, main_#t~mem74.offset; 640#L772-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem76 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem75 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short79 := main_#t~mem76 % 4294967296 >= 10 * (1 + main_#t~mem75) % 4294967296; 641#L772-76 assume main_#t~short79;call main_#t~mem77.base, main_#t~mem77.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem78 := read~int(main_#t~mem77.base, 36 + main_#t~mem77.offset, 4);main_#t~short79 := 0 == main_#t~mem78 % 4294967296; 652#L772-78 assume !main_#t~short79;havoc main_#t~mem76;havoc main_#t~mem75;havoc main_#t~mem77.base, main_#t~mem77.offset;havoc main_#t~mem78;havoc main_#t~short79; 654#L772-117 goto; 686#L772-119 goto; 687#L772-121 goto; 580#L772-123 goto; 581#L772-125 call main_#t~mem146.base, main_#t~mem146.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem147 := read~int(main_#t~mem146.base, 12 + main_#t~mem146.offset, 4);test_int_#in~a := (if main_#t~mem147 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem147 % 4294967296 % 4294967296 else main_#t~mem147 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post5, test_int_#t~switch6, test_int_~a;test_int_~a := test_int_#in~a;test_int_#t~post5 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post5;test_int_#t~switch6 := 0 == test_int_#t~post5; 743#L709 assume test_int_#t~switch6;__VERIFIER_assert_#in~cond := (if 1 == test_int_~a then 1 else 0);havoc __VERIFIER_assert_~cond;__VERIFIER_assert_~cond := __VERIFIER_assert_#in~cond; 745#L702 assume !(0 == __VERIFIER_assert_~cond); 572#L708 havoc test_int_#t~post5;havoc test_int_#t~switch6; 573#L707 havoc main_#t~mem146.base, main_#t~mem146.offset;havoc main_#t~mem147; 802#L765-3 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 696#L765-4 [2021-11-09 08:35:01,703 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 08:35:01,703 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2021-11-09 08:35:01,703 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 08:35:01,704 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1761897748] [2021-11-09 08:35:01,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:35:01,704 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 08:35:01,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 08:35:01,725 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 08:35:01,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 08:35:01,754 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 08:35:01,755 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 08:35:01,755 INFO L85 PathProgramCache]: Analyzing trace with hash -1288858830, now seen corresponding path program 1 times [2021-11-09 08:35:01,756 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 08:35:01,756 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1426187589] [2021-11-09 08:35:01,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:35:01,756 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 08:35:01,801 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-09 08:35:01,801 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1984471104] [2021-11-09 08:35:01,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:35:01,802 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-09 08:35:01,802 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 08:35:01,804 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-09 08:35:01,851 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-11-09 08:35:02,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 08:35:02,020 INFO L263 TraceCheckSpWp]: Trace formula consists of 339 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-09 08:35:02,024 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-09 08:35:02,172 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 08:35:02,172 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 08:35:02,173 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1426187589] [2021-11-09 08:35:02,173 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-09 08:35:02,173 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1984471104] [2021-11-09 08:35:02,173 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1984471104] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 08:35:02,173 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 08:35:02,174 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 08:35:02,174 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [656248753] [2021-11-09 08:35:02,174 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 08:35:02,175 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 08:35:02,175 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 08:35:02,175 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 08:35:02,176 INFO L87 Difference]: Start difference. First operand 270 states and 366 transitions. cyclomatic complexity: 100 Second operand has 3 states, 3 states have (on average 19.0) internal successors, (57), 3 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 08:35:02,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 08:35:02,264 INFO L93 Difference]: Finished difference Result 291 states and 387 transitions. [2021-11-09 08:35:02,264 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 08:35:02,265 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 291 states and 387 transitions. [2021-11-09 08:35:02,268 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 281 [2021-11-09 08:35:02,271 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 291 states to 291 states and 387 transitions. [2021-11-09 08:35:02,272 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 291 [2021-11-09 08:35:02,272 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 291 [2021-11-09 08:35:02,272 INFO L73 IsDeterministic]: Start isDeterministic. Operand 291 states and 387 transitions. [2021-11-09 08:35:02,274 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 08:35:02,274 INFO L681 BuchiCegarLoop]: Abstraction has 291 states and 387 transitions. [2021-11-09 08:35:02,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 291 states and 387 transitions. [2021-11-09 08:35:02,285 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 291 to 290. [2021-11-09 08:35:02,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 290 states, 286 states have (on average 1.3286713286713288) internal successors, (380), 285 states have internal predecessors, (380), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-09 08:35:02,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290 states to 290 states and 386 transitions. [2021-11-09 08:35:02,287 INFO L704 BuchiCegarLoop]: Abstraction has 290 states and 386 transitions. [2021-11-09 08:35:02,287 INFO L587 BuchiCegarLoop]: Abstraction has 290 states and 386 transitions. [2021-11-09 08:35:02,288 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-11-09 08:35:02,288 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 290 states and 386 transitions. [2021-11-09 08:35:02,289 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 280 [2021-11-09 08:35:02,289 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 08:35:02,290 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 08:35:02,291 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-09 08:35:02,291 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 08:35:02,291 INFO L791 eck$LassoCheckResult]: Stem: 1569#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int~0 := 0; 1533#L-1 havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem146.base, main_#t~mem146.offset, main_#t~mem147, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem151, main_#t~mem150, main_#t~mem152, main_#t~mem153, main_#t~mem155, main_#t~mem154, main_#t~mem156, main_#t~mem157, main_#t~mem159, main_#t~mem158, main_#t~mem160, main_#t~mem161, main_#t~switch162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_#t~mem172, main_#t~mem173, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181.base, main_#t~mem181.offset, main_#t~mem182.base, main_#t~mem182.offset, main_#t~mem183, main_#t~mem184, main_#t~mem185, main_#t~short186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~ret188, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190.base, main_#t~mem190.offset, main_#t~mem191.base, main_#t~mem191.offset, main_#t~mem192, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem193.base, main_#t~mem193.offset, main_#t~mem194.base, main_#t~mem194.offset, main_#t~short195, main_#t~mem196.base, main_#t~mem196.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~mem199.base, main_#t~mem199.offset, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202.base, main_#t~mem202.offset, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206.base, main_#t~mem206.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem218, main_#t~mem216.base, main_#t~mem216.offset, main_#t~mem217, main_#t~mem219.base, main_#t~mem219.offset, main_#t~mem220.base, main_#t~mem220.offset, main_#t~mem221, main_#t~post222, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225.base, main_#t~mem225.offset, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232, main_#t~post233, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem234.base, main_#t~mem234.offset, main_#t~mem235, main_#t~mem148, main_#t~mem149, main_#t~ite237.base, main_#t~ite237.offset, main_#t~mem236.base, main_#t~mem236.offset, main_#t~mem240.base, main_#t~mem240.offset, main_#t~mem241.base, main_#t~mem241.offset, main_#t~short242, main_#t~mem243.base, main_#t~mem243.offset, main_#t~mem244.base, main_#t~mem244.offset, main_#t~mem245.base, main_#t~mem245.offset, main_#t~mem246.base, main_#t~mem246.offset, main_#t~mem247.base, main_#t~mem247.offset, main_#t~mem248.base, main_#t~mem248.offset, main_#t~mem249.base, main_#t~mem249.offset, main_#t~mem250.base, main_#t~mem250.offset, main_#t~mem251, main_#t~mem252.base, main_#t~mem252.offset, main_#t~mem253.base, main_#t~mem253.offset, main_#t~mem254.base, main_#t~mem254.offset, main_#t~mem255, main_#t~mem256.base, main_#t~mem256.offset, main_#t~mem257.base, main_#t~mem257.offset, main_#t~mem258.base, main_#t~mem258.offset, main_#t~mem259.base, main_#t~mem259.offset, main_#t~mem260.base, main_#t~mem260.offset, main_#t~mem261, main_#t~mem262.base, main_#t~mem262.offset, main_#t~mem265, main_#t~mem263.base, main_#t~mem263.offset, main_#t~mem264, main_#t~mem266.base, main_#t~mem266.offset, main_#t~mem267.base, main_#t~mem267.offset, main_#t~mem268, main_#t~post269, main_#t~mem270.base, main_#t~mem270.offset, main_#t~mem271.base, main_#t~mem271.offset, main_#t~mem272.base, main_#t~mem272.offset, main_#t~mem273.base, main_#t~mem273.offset, main_#t~mem274.base, main_#t~mem274.offset, main_#t~mem275.base, main_#t~mem275.offset, main_#t~mem276.base, main_#t~mem276.offset, main_#t~mem277.base, main_#t~mem277.offset, main_~_hd_head~1.base, main_~_hd_head~1.offset, main_#t~mem278.base, main_#t~mem278.offset, main_#t~mem279, main_#t~post280, main_~_hd_bkt~1, main_~_hd_hh_del~1.base, main_~_hd_hh_del~1.offset, main_#t~ite239.base, main_#t~ite239.offset, main_#t~mem238.base, main_#t~mem238.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 1433#L765-4 [2021-11-09 08:35:02,292 INFO L793 eck$LassoCheckResult]: Loop: 1433#L765-4 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 1434#L765-1 assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 1555#L767 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 1525#L767-2 call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 1365#L772-124 havoc main_~_ha_hashv~0; 1366#L772-49 goto; 1470#L772-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 1526#L772-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 1303#L772-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch26 := 11 == main_~_hj_k~0; 1304#L772-10 assume main_#t~switch26;call main_#t~mem27 := read~int(main_~_hj_key~0.base, 10 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 16777216 * (main_#t~mem27 % 256);havoc main_#t~mem27; 1317#L772-12 main_#t~switch26 := main_#t~switch26 || 10 == main_~_hj_k~0; 1393#L772-13 assume main_#t~switch26;call main_#t~mem28 := read~int(main_~_hj_key~0.base, 9 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 65536 * (main_#t~mem28 % 256);havoc main_#t~mem28; 1382#L772-15 main_#t~switch26 := main_#t~switch26 || 9 == main_~_hj_k~0; 1305#L772-16 assume main_#t~switch26;call main_#t~mem29 := read~int(main_~_hj_key~0.base, 8 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 256 * (main_#t~mem29 % 256);havoc main_#t~mem29; 1306#L772-18 main_#t~switch26 := main_#t~switch26 || 8 == main_~_hj_k~0; 1567#L772-19 assume main_#t~switch26;call main_#t~mem30 := read~int(main_~_hj_key~0.base, 7 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 16777216 * (main_#t~mem30 % 256);havoc main_#t~mem30; 1568#L772-21 main_#t~switch26 := main_#t~switch26 || 7 == main_~_hj_k~0; 1549#L772-22 assume main_#t~switch26;call main_#t~mem31 := read~int(main_~_hj_key~0.base, 6 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 65536 * (main_#t~mem31 % 256);havoc main_#t~mem31; 1440#L772-24 main_#t~switch26 := main_#t~switch26 || 6 == main_~_hj_k~0; 1441#L772-25 assume main_#t~switch26;call main_#t~mem32 := read~int(main_~_hj_key~0.base, 5 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 256 * (main_#t~mem32 % 256);havoc main_#t~mem32; 1504#L772-27 main_#t~switch26 := main_#t~switch26 || 5 == main_~_hj_k~0; 1505#L772-28 assume main_#t~switch26;call main_#t~mem33 := read~int(main_~_hj_key~0.base, 4 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + main_#t~mem33 % 256;havoc main_#t~mem33; 1512#L772-30 main_#t~switch26 := main_#t~switch26 || 4 == main_~_hj_k~0; 1513#L772-31 assume main_#t~switch26;call main_#t~mem34 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem34 % 256);havoc main_#t~mem34; 1538#L772-33 main_#t~switch26 := main_#t~switch26 || 3 == main_~_hj_k~0; 1499#L772-34 assume main_#t~switch26;call main_#t~mem35 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem35 % 256);havoc main_#t~mem35; 1435#L772-36 main_#t~switch26 := main_#t~switch26 || 2 == main_~_hj_k~0; 1367#L772-37 assume main_#t~switch26;call main_#t~mem36 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem36 % 256);havoc main_#t~mem36; 1368#L772-39 main_#t~switch26 := main_#t~switch26 || 1 == main_~_hj_k~0; 1468#L772-40 assume main_#t~switch26;call main_#t~mem37 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem37 % 256;havoc main_#t~mem37; 1469#L772-42 havoc main_#t~switch26; 1519#L772-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 1484#L772-44 goto; 1312#L772-46 goto; 1313#L772-48 goto; 1319#L772-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 1320#L772-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset; 1561#L772-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_#t~mem56.base, 16 + main_#t~mem56.offset, 4);call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 20 + main_#t~mem58.offset, 4);call write~$Pointer$(main_#t~mem57.base, main_#t~mem57.offset - main_#t~mem59, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57.base, main_#t~mem57.offset;havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem61.base, 8 + main_#t~mem61.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset;havoc main_#t~mem61.base, main_#t~mem61.offset;call main_#t~mem62.base, main_#t~mem62.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem62.base, 16 + main_#t~mem62.offset, 4);havoc main_#t~mem62.base, main_#t~mem62.offset; 1510#L772-66 goto; 1511#L772-120 havoc main_~_ha_bkt~0;call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64 := read~int(main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);main_#t~post65 := main_#t~mem64;call write~int(1 + main_#t~post65, main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64;havoc main_#t~post65; 1556#L772-71 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67 := read~int(main_#t~mem66.base, 4 + main_#t~mem66.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem67 - 1);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67; 1494#L772-70 goto; 1495#L772-118 call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_#t~mem68.base, main_#t~mem68.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem69.base, main_#t~mem69.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68.base, main_#t~mem68.offset;havoc main_#t~mem69.base, main_#t~mem69.offset;call main_#t~mem70 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post71 := main_#t~mem70;call write~int(1 + main_#t~post71, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem70;havoc main_#t~post71;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem72.base, main_#t~mem72.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem73.base, main_#t~mem73.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 1502#L772-73 assume main_#t~mem73.base != 0 || main_#t~mem73.offset != 0;havoc main_#t~mem73.base, main_#t~mem73.offset;call main_#t~mem74.base, main_#t~mem74.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem74.base, 12 + main_#t~mem74.offset, 4);havoc main_#t~mem74.base, main_#t~mem74.offset; 1376#L772-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem76 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem75 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short79 := main_#t~mem76 % 4294967296 >= 10 * (1 + main_#t~mem75) % 4294967296; 1377#L772-76 assume main_#t~short79;call main_#t~mem77.base, main_#t~mem77.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem78 := read~int(main_#t~mem77.base, 36 + main_#t~mem77.offset, 4);main_#t~short79 := 0 == main_#t~mem78 % 4294967296; 1388#L772-78 assume !main_#t~short79;havoc main_#t~mem76;havoc main_#t~mem75;havoc main_#t~mem77.base, main_#t~mem77.offset;havoc main_#t~mem78;havoc main_#t~short79; 1390#L772-117 goto; 1422#L772-119 goto; 1423#L772-121 goto; 1315#L772-123 goto; 1316#L772-125 call main_#t~mem146.base, main_#t~mem146.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem147 := read~int(main_#t~mem146.base, 12 + main_#t~mem146.offset, 4);test_int_#in~a := (if main_#t~mem147 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem147 % 4294967296 % 4294967296 else main_#t~mem147 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post5, test_int_#t~switch6, test_int_~a;test_int_~a := test_int_#in~a;test_int_#t~post5 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post5;test_int_#t~switch6 := 0 == test_int_#t~post5; 1479#L709 assume test_int_#t~switch6;__VERIFIER_assert_#in~cond := (if 1 == test_int_~a then 1 else 0);havoc __VERIFIER_assert_~cond;__VERIFIER_assert_~cond := __VERIFIER_assert_#in~cond; 1481#L702 assume !(0 == __VERIFIER_assert_~cond); 1307#L708 havoc test_int_#t~post5;havoc test_int_#t~switch6; 1308#L707 havoc main_#t~mem146.base, main_#t~mem146.offset;havoc main_#t~mem147; 1541#L765-3 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 1433#L765-4 [2021-11-09 08:35:02,292 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 08:35:02,292 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2021-11-09 08:35:02,292 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 08:35:02,293 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1384400389] [2021-11-09 08:35:02,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:35:02,293 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 08:35:02,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 08:35:02,312 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 08:35:02,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 08:35:02,336 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 08:35:02,336 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 08:35:02,337 INFO L85 PathProgramCache]: Analyzing trace with hash 82948468, now seen corresponding path program 1 times [2021-11-09 08:35:02,337 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 08:35:02,337 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [536713004] [2021-11-09 08:35:02,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:35:02,337 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 08:35:02,350 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-09 08:35:02,351 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [721928405] [2021-11-09 08:35:02,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:35:02,351 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-09 08:35:02,351 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 08:35:02,353 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-09 08:35:02,377 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-11-09 08:35:02,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 08:35:02,544 INFO L263 TraceCheckSpWp]: Trace formula consists of 345 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-09 08:35:02,547 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-09 08:35:02,718 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 08:35:02,719 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 08:35:02,719 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [536713004] [2021-11-09 08:35:02,719 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-09 08:35:02,719 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [721928405] [2021-11-09 08:35:02,720 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [721928405] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 08:35:02,720 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 08:35:02,720 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-09 08:35:02,720 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1302481911] [2021-11-09 08:35:02,721 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 08:35:02,721 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 08:35:02,721 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-09 08:35:02,721 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-09 08:35:02,722 INFO L87 Difference]: Start difference. First operand 290 states and 386 transitions. cyclomatic complexity: 100 Second operand has 4 states, 4 states have (on average 14.25) internal successors, (57), 4 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 08:35:02,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 08:35:02,816 INFO L93 Difference]: Finished difference Result 426 states and 569 transitions. [2021-11-09 08:35:02,816 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-09 08:35:02,817 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 426 states and 569 transitions. [2021-11-09 08:35:02,821 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 405 [2021-11-09 08:35:02,825 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 426 states to 426 states and 569 transitions. [2021-11-09 08:35:02,825 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 426 [2021-11-09 08:35:02,826 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 426 [2021-11-09 08:35:02,826 INFO L73 IsDeterministic]: Start isDeterministic. Operand 426 states and 569 transitions. [2021-11-09 08:35:02,828 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 08:35:02,828 INFO L681 BuchiCegarLoop]: Abstraction has 426 states and 569 transitions. [2021-11-09 08:35:02,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 426 states and 569 transitions. [2021-11-09 08:35:02,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 426 to 276. [2021-11-09 08:35:02,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 276 states, 272 states have (on average 1.3198529411764706) internal successors, (359), 271 states have internal predecessors, (359), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-09 08:35:02,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 276 states to 276 states and 365 transitions. [2021-11-09 08:35:02,841 INFO L704 BuchiCegarLoop]: Abstraction has 276 states and 365 transitions. [2021-11-09 08:35:02,841 INFO L587 BuchiCegarLoop]: Abstraction has 276 states and 365 transitions. [2021-11-09 08:35:02,841 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-11-09 08:35:02,841 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 276 states and 365 transitions. [2021-11-09 08:35:02,843 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 266 [2021-11-09 08:35:02,843 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 08:35:02,843 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 08:35:02,844 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-09 08:35:02,844 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 08:35:02,844 INFO L791 eck$LassoCheckResult]: Stem: 2457#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int~0 := 0; 2426#L-1 havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem146.base, main_#t~mem146.offset, main_#t~mem147, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem151, main_#t~mem150, main_#t~mem152, main_#t~mem153, main_#t~mem155, main_#t~mem154, main_#t~mem156, main_#t~mem157, main_#t~mem159, main_#t~mem158, main_#t~mem160, main_#t~mem161, main_#t~switch162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_#t~mem172, main_#t~mem173, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181.base, main_#t~mem181.offset, main_#t~mem182.base, main_#t~mem182.offset, main_#t~mem183, main_#t~mem184, main_#t~mem185, main_#t~short186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~ret188, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190.base, main_#t~mem190.offset, main_#t~mem191.base, main_#t~mem191.offset, main_#t~mem192, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem193.base, main_#t~mem193.offset, main_#t~mem194.base, main_#t~mem194.offset, main_#t~short195, main_#t~mem196.base, main_#t~mem196.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~mem199.base, main_#t~mem199.offset, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202.base, main_#t~mem202.offset, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206.base, main_#t~mem206.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem218, main_#t~mem216.base, main_#t~mem216.offset, main_#t~mem217, main_#t~mem219.base, main_#t~mem219.offset, main_#t~mem220.base, main_#t~mem220.offset, main_#t~mem221, main_#t~post222, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225.base, main_#t~mem225.offset, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232, main_#t~post233, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem234.base, main_#t~mem234.offset, main_#t~mem235, main_#t~mem148, main_#t~mem149, main_#t~ite237.base, main_#t~ite237.offset, main_#t~mem236.base, main_#t~mem236.offset, main_#t~mem240.base, main_#t~mem240.offset, main_#t~mem241.base, main_#t~mem241.offset, main_#t~short242, main_#t~mem243.base, main_#t~mem243.offset, main_#t~mem244.base, main_#t~mem244.offset, main_#t~mem245.base, main_#t~mem245.offset, main_#t~mem246.base, main_#t~mem246.offset, main_#t~mem247.base, main_#t~mem247.offset, main_#t~mem248.base, main_#t~mem248.offset, main_#t~mem249.base, main_#t~mem249.offset, main_#t~mem250.base, main_#t~mem250.offset, main_#t~mem251, main_#t~mem252.base, main_#t~mem252.offset, main_#t~mem253.base, main_#t~mem253.offset, main_#t~mem254.base, main_#t~mem254.offset, main_#t~mem255, main_#t~mem256.base, main_#t~mem256.offset, main_#t~mem257.base, main_#t~mem257.offset, main_#t~mem258.base, main_#t~mem258.offset, main_#t~mem259.base, main_#t~mem259.offset, main_#t~mem260.base, main_#t~mem260.offset, main_#t~mem261, main_#t~mem262.base, main_#t~mem262.offset, main_#t~mem265, main_#t~mem263.base, main_#t~mem263.offset, main_#t~mem264, main_#t~mem266.base, main_#t~mem266.offset, main_#t~mem267.base, main_#t~mem267.offset, main_#t~mem268, main_#t~post269, main_#t~mem270.base, main_#t~mem270.offset, main_#t~mem271.base, main_#t~mem271.offset, main_#t~mem272.base, main_#t~mem272.offset, main_#t~mem273.base, main_#t~mem273.offset, main_#t~mem274.base, main_#t~mem274.offset, main_#t~mem275.base, main_#t~mem275.offset, main_#t~mem276.base, main_#t~mem276.offset, main_#t~mem277.base, main_#t~mem277.offset, main_~_hd_head~1.base, main_~_hd_head~1.offset, main_#t~mem278.base, main_#t~mem278.offset, main_#t~mem279, main_#t~post280, main_~_hd_bkt~1, main_~_hd_hh_del~1.base, main_~_hd_hh_del~1.offset, main_#t~ite239.base, main_#t~ite239.offset, main_#t~mem238.base, main_#t~mem238.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 2324#L765-4 [2021-11-09 08:35:02,845 INFO L793 eck$LassoCheckResult]: Loop: 2324#L765-4 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 2325#L765-1 assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 2447#L767 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 2418#L767-2 call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 2256#L772-124 havoc main_~_ha_hashv~0; 2257#L772-49 goto; 2361#L772-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 2419#L772-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 2196#L772-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch26 := 11 == main_~_hj_k~0; 2197#L772-10 assume !main_#t~switch26; 2210#L772-12 main_#t~switch26 := main_#t~switch26 || 10 == main_~_hj_k~0; 2286#L772-13 assume !main_#t~switch26; 2274#L772-15 main_#t~switch26 := main_#t~switch26 || 9 == main_~_hj_k~0; 2198#L772-16 assume !main_#t~switch26; 2199#L772-18 main_#t~switch26 := main_#t~switch26 || 8 == main_~_hj_k~0; 2383#L772-19 assume !main_#t~switch26; 2393#L772-21 main_#t~switch26 := main_#t~switch26 || 7 == main_~_hj_k~0; 2394#L772-22 assume !main_#t~switch26; 2333#L772-24 main_#t~switch26 := main_#t~switch26 || 6 == main_~_hj_k~0; 2334#L772-25 assume !main_#t~switch26; 2397#L772-27 main_#t~switch26 := main_#t~switch26 || 5 == main_~_hj_k~0; 2398#L772-28 assume !main_#t~switch26; 2405#L772-30 main_#t~switch26 := main_#t~switch26 || 4 == main_~_hj_k~0; 2406#L772-31 assume !main_#t~switch26; 2415#L772-33 main_#t~switch26 := main_#t~switch26 || 3 == main_~_hj_k~0; 2416#L772-34 assume !main_#t~switch26; 2327#L772-36 main_#t~switch26 := main_#t~switch26 || 2 == main_~_hj_k~0; 2328#L772-37 assume main_#t~switch26;call main_#t~mem36 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem36 % 256);havoc main_#t~mem36; 2260#L772-39 main_#t~switch26 := main_#t~switch26 || 1 == main_~_hj_k~0; 2362#L772-40 assume main_#t~switch26;call main_#t~mem37 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem37 % 256;havoc main_#t~mem37; 2363#L772-42 havoc main_#t~switch26; 2412#L772-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 2377#L772-44 goto; 2206#L772-46 goto; 2207#L772-48 goto; 2211#L772-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 2212#L772-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset; 2453#L772-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_#t~mem56.base, 16 + main_#t~mem56.offset, 4);call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 20 + main_#t~mem58.offset, 4);call write~$Pointer$(main_#t~mem57.base, main_#t~mem57.offset - main_#t~mem59, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57.base, main_#t~mem57.offset;havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem61.base, 8 + main_#t~mem61.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset;havoc main_#t~mem61.base, main_#t~mem61.offset;call main_#t~mem62.base, main_#t~mem62.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem62.base, 16 + main_#t~mem62.offset, 4);havoc main_#t~mem62.base, main_#t~mem62.offset; 2403#L772-66 goto; 2404#L772-120 havoc main_~_ha_bkt~0;call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64 := read~int(main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);main_#t~post65 := main_#t~mem64;call write~int(1 + main_#t~post65, main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64;havoc main_#t~post65; 2448#L772-71 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67 := read~int(main_#t~mem66.base, 4 + main_#t~mem66.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem67 - 1);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67; 2386#L772-70 goto; 2387#L772-118 call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_#t~mem68.base, main_#t~mem68.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem69.base, main_#t~mem69.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68.base, main_#t~mem68.offset;havoc main_#t~mem69.base, main_#t~mem69.offset;call main_#t~mem70 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post71 := main_#t~mem70;call write~int(1 + main_#t~post71, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem70;havoc main_#t~post71;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem72.base, main_#t~mem72.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem73.base, main_#t~mem73.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 2396#L772-73 assume main_#t~mem73.base != 0 || main_#t~mem73.offset != 0;havoc main_#t~mem73.base, main_#t~mem73.offset;call main_#t~mem74.base, main_#t~mem74.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem74.base, 12 + main_#t~mem74.offset, 4);havoc main_#t~mem74.base, main_#t~mem74.offset; 2268#L772-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem76 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem75 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short79 := main_#t~mem76 % 4294967296 >= 10 * (1 + main_#t~mem75) % 4294967296; 2269#L772-76 assume main_#t~short79;call main_#t~mem77.base, main_#t~mem77.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem78 := read~int(main_#t~mem77.base, 36 + main_#t~mem77.offset, 4);main_#t~short79 := 0 == main_#t~mem78 % 4294967296; 2280#L772-78 assume !main_#t~short79;havoc main_#t~mem76;havoc main_#t~mem75;havoc main_#t~mem77.base, main_#t~mem77.offset;havoc main_#t~mem78;havoc main_#t~short79; 2282#L772-117 goto; 2314#L772-119 goto; 2315#L772-121 goto; 2208#L772-123 goto; 2209#L772-125 call main_#t~mem146.base, main_#t~mem146.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem147 := read~int(main_#t~mem146.base, 12 + main_#t~mem146.offset, 4);test_int_#in~a := (if main_#t~mem147 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem147 % 4294967296 % 4294967296 else main_#t~mem147 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post5, test_int_#t~switch6, test_int_~a;test_int_~a := test_int_#in~a;test_int_#t~post5 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post5;test_int_#t~switch6 := 0 == test_int_#t~post5; 2374#L709 assume test_int_#t~switch6;__VERIFIER_assert_#in~cond := (if 1 == test_int_~a then 1 else 0);havoc __VERIFIER_assert_~cond;__VERIFIER_assert_~cond := __VERIFIER_assert_#in~cond; 2376#L702 assume !(0 == __VERIFIER_assert_~cond); 2200#L708 havoc test_int_#t~post5;havoc test_int_#t~switch6; 2201#L707 havoc main_#t~mem146.base, main_#t~mem146.offset;havoc main_#t~mem147; 2434#L765-3 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 2324#L765-4 [2021-11-09 08:35:02,845 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 08:35:02,845 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2021-11-09 08:35:02,846 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 08:35:02,846 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [206706963] [2021-11-09 08:35:02,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:35:02,846 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 08:35:02,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 08:35:02,862 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 08:35:02,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 08:35:02,884 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 08:35:02,884 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 08:35:02,884 INFO L85 PathProgramCache]: Analyzing trace with hash 1679352098, now seen corresponding path program 1 times [2021-11-09 08:35:02,884 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 08:35:02,885 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2051102709] [2021-11-09 08:35:02,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:35:02,885 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 08:35:02,896 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-09 08:35:02,896 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1985627615] [2021-11-09 08:35:02,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:35:02,897 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-09 08:35:02,897 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 08:35:02,928 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-09 08:35:02,930 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-11-09 08:35:03,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 08:35:03,111 INFO L263 TraceCheckSpWp]: Trace formula consists of 291 conjuncts, 4 conjunts are in the unsatisfiable core [2021-11-09 08:35:03,117 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-09 08:35:03,269 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 08:35:03,269 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 08:35:03,270 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2051102709] [2021-11-09 08:35:03,270 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-09 08:35:03,270 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1985627615] [2021-11-09 08:35:03,270 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1985627615] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 08:35:03,271 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 08:35:03,271 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 08:35:03,271 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [650712881] [2021-11-09 08:35:03,272 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 08:35:03,272 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 08:35:03,272 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-11-09 08:35:03,272 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-11-09 08:35:03,273 INFO L87 Difference]: Start difference. First operand 276 states and 365 transitions. cyclomatic complexity: 93 Second operand has 5 states, 5 states have (on average 11.4) internal successors, (57), 5 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 08:35:03,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 08:35:03,388 INFO L93 Difference]: Finished difference Result 547 states and 722 transitions. [2021-11-09 08:35:03,388 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-11-09 08:35:03,388 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 547 states and 722 transitions. [2021-11-09 08:35:03,396 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 533 [2021-11-09 08:35:03,402 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 547 states to 547 states and 722 transitions. [2021-11-09 08:35:03,402 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 547 [2021-11-09 08:35:03,403 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 547 [2021-11-09 08:35:03,420 INFO L73 IsDeterministic]: Start isDeterministic. Operand 547 states and 722 transitions. [2021-11-09 08:35:03,421 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 08:35:03,422 INFO L681 BuchiCegarLoop]: Abstraction has 547 states and 722 transitions. [2021-11-09 08:35:03,423 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 547 states and 722 transitions. [2021-11-09 08:35:03,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 547 to 299. [2021-11-09 08:35:03,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 299 states, 295 states have (on average 1.3016949152542372) internal successors, (384), 294 states have internal predecessors, (384), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-09 08:35:03,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 299 states to 299 states and 390 transitions. [2021-11-09 08:35:03,435 INFO L704 BuchiCegarLoop]: Abstraction has 299 states and 390 transitions. [2021-11-09 08:35:03,435 INFO L587 BuchiCegarLoop]: Abstraction has 299 states and 390 transitions. [2021-11-09 08:35:03,435 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-11-09 08:35:03,435 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 299 states and 390 transitions. [2021-11-09 08:35:03,437 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 289 [2021-11-09 08:35:03,437 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 08:35:03,437 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 08:35:03,439 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-09 08:35:03,439 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 08:35:03,439 INFO L791 eck$LassoCheckResult]: Stem: 3459#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int~0 := 0; 3424#L-1 havoc main_#res;havoc main_#t~malloc10.base, main_#t~malloc10.offset, main_#t~mem11, main_#t~mem12, main_#t~mem13, main_#t~mem15, main_#t~mem14, main_#t~mem16, main_#t~mem17, main_#t~mem19, main_#t~mem18, main_#t~mem20, main_#t~mem21, main_#t~mem23, main_#t~mem22, main_#t~mem24, main_#t~mem25, main_#t~switch26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_#t~mem33, main_#t~mem34, main_#t~mem35, main_#t~mem36, main_#t~mem37, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc38.base, main_#t~malloc38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~memset~res41.base, main_#t~memset~res41.offset, main_#t~mem42.base, main_#t~mem42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~malloc47.base, main_#t~malloc47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~mem49.base, main_#t~mem49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~memset~res54.base, main_#t~memset~res54.offset, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~mem60.base, main_#t~mem60.offset, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62.base, main_#t~mem62.offset, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64, main_#t~post65, main_#t~mem66.base, main_#t~mem66.offset, main_#t~mem67, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem70, main_#t~post71, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73.base, main_#t~mem73.offset, main_#t~mem74.base, main_#t~mem74.offset, main_#t~mem76, main_#t~mem75, main_#t~mem77.base, main_#t~mem77.offset, main_#t~mem78, main_#t~short79, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~malloc82.base, main_#t~malloc82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~memset~res87.base, main_#t~memset~res87.offset, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem92, main_#t~mem90.base, main_#t~mem90.offset, main_#t~mem91, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem96, main_#t~mem94.base, main_#t~mem94.offset, main_#t~mem95, main_#t~ite97, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem102.base, main_#t~mem102.offset, main_#t~mem103.base, main_#t~mem103.offset, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105.base, main_#t~mem105.offset, main_#t~mem108, main_#t~mem106.base, main_#t~mem106.offset, main_#t~mem107, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~pre111, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem113, main_#t~mem114.base, main_#t~mem114.offset, main_#t~mem115, main_#t~post116, main_#t~mem120, main_#t~mem118, main_#t~mem117.base, main_#t~mem117.offset, main_#t~mem119, main_#t~mem121, main_#t~post122, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124.base, main_#t~mem124.offset, main_#t~mem125.base, main_#t~mem125.offset, main_#t~post99, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem101, main_#t~mem126.base, main_#t~mem126.offset, main_#t~mem127.base, main_#t~mem127.offset, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131, main_#t~post132, main_#t~mem133.base, main_#t~mem133.offset, main_#t~mem134.base, main_#t~mem134.offset, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136.base, main_#t~mem136.offset, main_#t~mem139, main_#t~mem137.base, main_#t~mem137.offset, main_#t~mem138, main_#t~ite142, main_#t~mem140.base, main_#t~mem140.offset, main_#t~mem141, main_#t~mem143.base, main_#t~mem143.offset, main_#t~mem144, main_#t~mem145.base, main_#t~mem145.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~mem146.base, main_#t~mem146.offset, main_#t~mem147, main_#t~mem7, main_#t~post8, main_#t~mem9, main_#t~mem151, main_#t~mem150, main_#t~mem152, main_#t~mem153, main_#t~mem155, main_#t~mem154, main_#t~mem156, main_#t~mem157, main_#t~mem159, main_#t~mem158, main_#t~mem160, main_#t~mem161, main_#t~switch162, main_#t~mem163, main_#t~mem164, main_#t~mem165, main_#t~mem166, main_#t~mem167, main_#t~mem168, main_#t~mem169, main_#t~mem170, main_#t~mem171, main_#t~mem172, main_#t~mem173, main_~_hj_i~1, main_~_hj_j~1, main_~_hj_k~1, main_~_hj_key~1.base, main_~_hj_key~1.offset, main_#t~mem174.base, main_#t~mem174.offset, main_#t~mem175, main_#t~mem176.base, main_#t~mem176.offset, main_#t~mem177.base, main_#t~mem177.offset, main_#t~mem178.base, main_#t~mem178.offset, main_#t~mem179.base, main_#t~mem179.offset, main_#t~mem180.base, main_#t~mem180.offset, main_#t~mem181.base, main_#t~mem181.offset, main_#t~mem182.base, main_#t~mem182.offset, main_#t~mem183, main_#t~mem184, main_#t~mem185, main_#t~short186, main_#t~mem187.base, main_#t~mem187.offset, main_#t~ret188, main_#t~mem189.base, main_#t~mem189.offset, main_#t~mem190.base, main_#t~mem190.offset, main_#t~mem191.base, main_#t~mem191.offset, main_#t~mem192, main_~_hf_bkt~0, main_~_hf_hashv~0, main_#t~mem193.base, main_#t~mem193.offset, main_#t~mem194.base, main_#t~mem194.offset, main_#t~short195, main_#t~mem196.base, main_#t~mem196.offset, main_#t~mem197.base, main_#t~mem197.offset, main_#t~mem198.base, main_#t~mem198.offset, main_#t~mem199.base, main_#t~mem199.offset, main_#t~mem200.base, main_#t~mem200.offset, main_#t~mem201.base, main_#t~mem201.offset, main_#t~mem202.base, main_#t~mem202.offset, main_#t~mem203.base, main_#t~mem203.offset, main_#t~mem204, main_#t~mem205.base, main_#t~mem205.offset, main_#t~mem206.base, main_#t~mem206.offset, main_#t~mem207.base, main_#t~mem207.offset, main_#t~mem208, main_#t~mem209.base, main_#t~mem209.offset, main_#t~mem210.base, main_#t~mem210.offset, main_#t~mem211.base, main_#t~mem211.offset, main_#t~mem212.base, main_#t~mem212.offset, main_#t~mem213.base, main_#t~mem213.offset, main_#t~mem214, main_#t~mem215.base, main_#t~mem215.offset, main_#t~mem218, main_#t~mem216.base, main_#t~mem216.offset, main_#t~mem217, main_#t~mem219.base, main_#t~mem219.offset, main_#t~mem220.base, main_#t~mem220.offset, main_#t~mem221, main_#t~post222, main_#t~mem223.base, main_#t~mem223.offset, main_#t~mem224.base, main_#t~mem224.offset, main_#t~mem225.base, main_#t~mem225.offset, main_#t~mem226.base, main_#t~mem226.offset, main_#t~mem227.base, main_#t~mem227.offset, main_#t~mem228.base, main_#t~mem228.offset, main_#t~mem229.base, main_#t~mem229.offset, main_#t~mem230.base, main_#t~mem230.offset, main_~_hd_head~0.base, main_~_hd_head~0.offset, main_#t~mem231.base, main_#t~mem231.offset, main_#t~mem232, main_#t~post233, main_~_hd_bkt~0, main_~_hd_hh_del~0.base, main_~_hd_hh_del~0.offset, main_#t~mem234.base, main_#t~mem234.offset, main_#t~mem235, main_#t~mem148, main_#t~mem149, main_#t~ite237.base, main_#t~ite237.offset, main_#t~mem236.base, main_#t~mem236.offset, main_#t~mem240.base, main_#t~mem240.offset, main_#t~mem241.base, main_#t~mem241.offset, main_#t~short242, main_#t~mem243.base, main_#t~mem243.offset, main_#t~mem244.base, main_#t~mem244.offset, main_#t~mem245.base, main_#t~mem245.offset, main_#t~mem246.base, main_#t~mem246.offset, main_#t~mem247.base, main_#t~mem247.offset, main_#t~mem248.base, main_#t~mem248.offset, main_#t~mem249.base, main_#t~mem249.offset, main_#t~mem250.base, main_#t~mem250.offset, main_#t~mem251, main_#t~mem252.base, main_#t~mem252.offset, main_#t~mem253.base, main_#t~mem253.offset, main_#t~mem254.base, main_#t~mem254.offset, main_#t~mem255, main_#t~mem256.base, main_#t~mem256.offset, main_#t~mem257.base, main_#t~mem257.offset, main_#t~mem258.base, main_#t~mem258.offset, main_#t~mem259.base, main_#t~mem259.offset, main_#t~mem260.base, main_#t~mem260.offset, main_#t~mem261, main_#t~mem262.base, main_#t~mem262.offset, main_#t~mem265, main_#t~mem263.base, main_#t~mem263.offset, main_#t~mem264, main_#t~mem266.base, main_#t~mem266.offset, main_#t~mem267.base, main_#t~mem267.offset, main_#t~mem268, main_#t~post269, main_#t~mem270.base, main_#t~mem270.offset, main_#t~mem271.base, main_#t~mem271.offset, main_#t~mem272.base, main_#t~mem272.offset, main_#t~mem273.base, main_#t~mem273.offset, main_#t~mem274.base, main_#t~mem274.offset, main_#t~mem275.base, main_#t~mem275.offset, main_#t~mem276.base, main_#t~mem276.offset, main_#t~mem277.base, main_#t~mem277.offset, main_~_hd_head~1.base, main_~_hd_head~1.offset, main_#t~mem278.base, main_#t~mem278.offset, main_#t~mem279, main_#t~post280, main_~_hd_bkt~1, main_~_hd_hh_del~1.base, main_~_hd_hh_del~1.offset, main_#t~ite239.base, main_#t~ite239.offset, main_#t~mem238.base, main_#t~mem238.offset, main_~#i~0.base, main_~#i~0.offset, main_~user~0.base, main_~user~0.offset, main_~tmp~0.base, main_~tmp~0.offset, main_~users~0.base, main_~users~0.offset, main_~temp~0.base, main_~temp~0.offset;call main_~#i~0.base, main_~#i~0.offset := #Ultimate.allocOnStack(4);havoc main_~user~0.base, main_~user~0.offset;havoc main_~tmp~0.base, main_~tmp~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;call write~int(0, main_~#i~0.base, main_~#i~0.offset, 4); 3323#L765-4 [2021-11-09 08:35:03,439 INFO L793 eck$LassoCheckResult]: Loop: 3323#L765-4 call main_#t~mem9 := read~int(main_~#i~0.base, main_~#i~0.offset, 4); 3324#L765-1 assume !!(main_#t~mem9 < 10);havoc main_#t~mem9;call main_#t~malloc10.base, main_#t~malloc10.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc10.base, main_#t~malloc10.offset;havoc main_#t~malloc10.base, main_#t~malloc10.offset; 3447#L767 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 3416#L767-2 call main_#t~mem11 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem11, main_~user~0.base, main_~user~0.offset, 4);havoc main_#t~mem11;call main_#t~mem12 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call main_#t~mem13 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);call write~int(main_#t~mem12 * main_#t~mem13, main_~user~0.base, 4 + main_~user~0.offset, 4);havoc main_#t~mem12;havoc main_#t~mem13; 3253#L772-124 havoc main_~_ha_hashv~0; 3254#L772-49 goto; 3360#L772-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 3417#L772-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 3478#L772-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch26 := 11 == main_~_hj_k~0; 3477#L772-10 assume !main_#t~switch26; 3476#L772-12 main_#t~switch26 := main_#t~switch26 || 10 == main_~_hj_k~0; 3475#L772-13 assume !main_#t~switch26; 3474#L772-15 main_#t~switch26 := main_#t~switch26 || 9 == main_~_hj_k~0; 3473#L772-16 assume !main_#t~switch26; 3472#L772-18 main_#t~switch26 := main_#t~switch26 || 8 == main_~_hj_k~0; 3471#L772-19 assume !main_#t~switch26; 3470#L772-21 main_#t~switch26 := main_#t~switch26 || 7 == main_~_hj_k~0; 3469#L772-22 assume !main_#t~switch26; 3468#L772-24 main_#t~switch26 := main_#t~switch26 || 6 == main_~_hj_k~0; 3467#L772-25 assume !main_#t~switch26; 3466#L772-27 main_#t~switch26 := main_#t~switch26 || 5 == main_~_hj_k~0; 3465#L772-28 assume !main_#t~switch26; 3464#L772-30 main_#t~switch26 := main_#t~switch26 || 4 == main_~_hj_k~0; 3429#L772-31 assume main_#t~switch26;call main_#t~mem34 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem34 % 256);havoc main_#t~mem34; 3430#L772-33 main_#t~switch26 := main_#t~switch26 || 3 == main_~_hj_k~0; 3460#L772-34 assume main_#t~switch26;call main_#t~mem35 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem35 % 256);havoc main_#t~mem35; 3326#L772-36 main_#t~switch26 := main_#t~switch26 || 2 == main_~_hj_k~0; 3327#L772-37 assume main_#t~switch26;call main_#t~mem36 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem36 % 256);havoc main_#t~mem36; 3457#L772-39 main_#t~switch26 := main_#t~switch26 || 1 == main_~_hj_k~0; 3458#L772-40 assume main_#t~switch26;call main_#t~mem37 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem37 % 256;havoc main_#t~mem37; 3362#L772-42 havoc main_#t~switch26; 3411#L772-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 3376#L772-44 goto; 3205#L772-46 goto; 3206#L772-48 goto; 3210#L772-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 3211#L772-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem55.base, main_#t~mem55.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset; 3453#L772-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_#t~mem56.base, 16 + main_#t~mem56.offset, 4);call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 20 + main_#t~mem58.offset, 4);call write~$Pointer$(main_#t~mem57.base, main_#t~mem57.offset - main_#t~mem59, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem56.base, main_#t~mem56.offset;havoc main_#t~mem57.base, main_#t~mem57.offset;havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;call main_#t~mem60.base, main_#t~mem60.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_#t~mem60.base, 16 + main_#t~mem60.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem61.base, 8 + main_#t~mem61.offset, 4);havoc main_#t~mem60.base, main_#t~mem60.offset;havoc main_#t~mem61.base, main_#t~mem61.offset;call main_#t~mem62.base, main_#t~mem62.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem62.base, 16 + main_#t~mem62.offset, 4);havoc main_#t~mem62.base, main_#t~mem62.offset; 3402#L772-66 goto; 3403#L772-120 havoc main_~_ha_bkt~0;call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64 := read~int(main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);main_#t~post65 := main_#t~mem64;call write~int(1 + main_#t~post65, main_#t~mem63.base, 12 + main_#t~mem63.offset, 4);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64;havoc main_#t~post65; 3448#L772-71 call main_#t~mem66.base, main_#t~mem66.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem67 := read~int(main_#t~mem66.base, 4 + main_#t~mem66.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem67 - 1);havoc main_#t~mem66.base, main_#t~mem66.offset;havoc main_#t~mem67; 3385#L772-70 goto; 3386#L772-118 call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_#t~mem68.base, main_#t~mem68.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem69.base, main_#t~mem69.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68.base, main_#t~mem68.offset;havoc main_#t~mem69.base, main_#t~mem69.offset;call main_#t~mem70 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post71 := main_#t~mem70;call write~int(1 + main_#t~post71, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem70;havoc main_#t~post71;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem72.base, main_#t~mem72.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem72.base, main_#t~mem72.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem73.base, main_#t~mem73.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 3395#L772-73 assume main_#t~mem73.base != 0 || main_#t~mem73.offset != 0;havoc main_#t~mem73.base, main_#t~mem73.offset;call main_#t~mem74.base, main_#t~mem74.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem74.base, 12 + main_#t~mem74.offset, 4);havoc main_#t~mem74.base, main_#t~mem74.offset; 3267#L772-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem76 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem75 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short79 := main_#t~mem76 % 4294967296 >= 10 * (1 + main_#t~mem75) % 4294967296; 3268#L772-76 assume main_#t~short79;call main_#t~mem77.base, main_#t~mem77.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem78 := read~int(main_#t~mem77.base, 36 + main_#t~mem77.offset, 4);main_#t~short79 := 0 == main_#t~mem78 % 4294967296; 3279#L772-78 assume !main_#t~short79;havoc main_#t~mem76;havoc main_#t~mem75;havoc main_#t~mem77.base, main_#t~mem77.offset;havoc main_#t~mem78;havoc main_#t~short79; 3281#L772-117 goto; 3313#L772-119 goto; 3314#L772-121 goto; 3207#L772-123 goto; 3208#L772-125 call main_#t~mem146.base, main_#t~mem146.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem147 := read~int(main_#t~mem146.base, 12 + main_#t~mem146.offset, 4);test_int_#in~a := (if main_#t~mem147 % 4294967296 % 4294967296 <= 2147483647 then main_#t~mem147 % 4294967296 % 4294967296 else main_#t~mem147 % 4294967296 % 4294967296 - 4294967296);havoc test_int_#t~post5, test_int_#t~switch6, test_int_~a;test_int_~a := test_int_#in~a;test_int_#t~post5 := ~count_int~0;~count_int~0 := 1 + test_int_#t~post5;test_int_#t~switch6 := 0 == test_int_#t~post5; 3373#L709 assume test_int_#t~switch6;__VERIFIER_assert_#in~cond := (if 1 == test_int_~a then 1 else 0);havoc __VERIFIER_assert_~cond;__VERIFIER_assert_~cond := __VERIFIER_assert_#in~cond; 3375#L702 assume !(0 == __VERIFIER_assert_~cond); 3199#L708 havoc test_int_#t~post5;havoc test_int_#t~switch6; 3200#L707 havoc main_#t~mem146.base, main_#t~mem146.offset;havoc main_#t~mem147; 3433#L765-3 call main_#t~mem7 := read~int(main_~#i~0.base, main_~#i~0.offset, 4);main_#t~post8 := main_#t~mem7;call write~int(1 + main_#t~post8, main_~#i~0.base, main_~#i~0.offset, 4);havoc main_#t~mem7;havoc main_#t~post8; 3323#L765-4 [2021-11-09 08:35:03,440 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 08:35:03,440 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 5 times [2021-11-09 08:35:03,440 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 08:35:03,440 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1790027005] [2021-11-09 08:35:03,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:35:03,441 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 08:35:03,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 08:35:03,457 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 08:35:03,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 08:35:03,483 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 08:35:03,486 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 08:35:03,486 INFO L85 PathProgramCache]: Analyzing trace with hash -646391514, now seen corresponding path program 1 times [2021-11-09 08:35:03,487 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 08:35:03,487 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [968416385] [2021-11-09 08:35:03,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:35:03,487 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 08:35:03,512 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-09 08:35:03,515 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1527349955] [2021-11-09 08:35:03,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:35:03,515 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-09 08:35:03,515 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 08:35:03,519 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-09 08:35:03,539 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_dff68402-7650-4b1e-b717-dac0313a255a/bin/uautomizer-IVEQpCNsaX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process