./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test1-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version f8e1c903 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test1-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ec105877a5c5817dc7d6d5e780267dcadb379ad27281f7d8981115c8613ba085 --- Real Ultimate output --- This is Ultimate 0.2.1-dev-f8e1c90 [2021-11-09 08:45:02,118 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-09 08:45:02,120 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-09 08:45:02,175 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-09 08:45:02,175 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-09 08:45:02,180 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-09 08:45:02,183 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-09 08:45:02,187 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-09 08:45:02,190 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-09 08:45:02,197 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-09 08:45:02,198 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-09 08:45:02,199 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-09 08:45:02,199 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-09 08:45:02,200 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-09 08:45:02,202 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-09 08:45:02,203 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-09 08:45:02,204 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-09 08:45:02,205 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-09 08:45:02,211 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-09 08:45:02,221 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-09 08:45:02,223 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-09 08:45:02,225 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-09 08:45:02,229 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-09 08:45:02,230 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-09 08:45:02,237 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-09 08:45:02,237 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-09 08:45:02,238 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-09 08:45:02,240 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-09 08:45:02,241 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-09 08:45:02,242 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-09 08:45:02,242 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-09 08:45:02,243 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-09 08:45:02,245 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-09 08:45:02,246 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-09 08:45:02,249 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-09 08:45:02,249 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-09 08:45:02,250 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-09 08:45:02,250 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-09 08:45:02,250 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-09 08:45:02,251 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-09 08:45:02,252 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-09 08:45:02,253 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-11-09 08:45:02,308 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-09 08:45:02,308 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-09 08:45:02,308 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-09 08:45:02,309 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-09 08:45:02,310 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-09 08:45:02,310 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-09 08:45:02,310 INFO L138 SettingsManager]: * Use SBE=true [2021-11-09 08:45:02,311 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-11-09 08:45:02,311 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-11-09 08:45:02,311 INFO L138 SettingsManager]: * Use old map elimination=false [2021-11-09 08:45:02,312 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-11-09 08:45:02,312 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-11-09 08:45:02,313 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-11-09 08:45:02,313 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-09 08:45:02,313 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-09 08:45:02,313 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-11-09 08:45:02,313 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-09 08:45:02,314 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-09 08:45:02,314 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-09 08:45:02,314 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-11-09 08:45:02,314 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-11-09 08:45:02,314 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-11-09 08:45:02,315 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-09 08:45:02,315 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-09 08:45:02,315 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-11-09 08:45:02,315 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-09 08:45:02,315 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-11-09 08:45:02,316 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-09 08:45:02,316 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-09 08:45:02,316 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-09 08:45:02,316 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-09 08:45:02,317 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-09 08:45:02,317 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-11-09 08:45:02,318 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ec105877a5c5817dc7d6d5e780267dcadb379ad27281f7d8981115c8613ba085 [2021-11-09 08:45:02,573 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-09 08:45:02,599 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-09 08:45:02,602 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-09 08:45:02,603 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-09 08:45:02,605 INFO L275 PluginConnector]: CDTParser initialized [2021-11-09 08:45:02,605 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/../../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test1-1.i [2021-11-09 08:45:02,679 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/data/fc9980a64/938c848e85f04a1d9e15ae8968e78a83/FLAG7618b73d3 [2021-11-09 08:45:03,230 INFO L306 CDTParser]: Found 1 translation units. [2021-11-09 08:45:03,247 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test1-1.i [2021-11-09 08:45:03,276 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/data/fc9980a64/938c848e85f04a1d9e15ae8968e78a83/FLAG7618b73d3 [2021-11-09 08:45:03,487 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/data/fc9980a64/938c848e85f04a1d9e15ae8968e78a83 [2021-11-09 08:45:03,490 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-09 08:45:03,491 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-09 08:45:03,502 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-09 08:45:03,502 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-09 08:45:03,506 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-09 08:45:03,506 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.11 08:45:03" (1/1) ... [2021-11-09 08:45:03,508 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4e847d0d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:45:03, skipping insertion in model container [2021-11-09 08:45:03,508 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.11 08:45:03" (1/1) ... [2021-11-09 08:45:03,522 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-09 08:45:03,613 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-09 08:45:04,106 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test1-1.i[33021,33034] [2021-11-09 08:45:04,197 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-09 08:45:04,205 INFO L203 MainTranslator]: Completed pre-run [2021-11-09 08:45:04,241 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test1-1.i[33021,33034] [2021-11-09 08:45:04,290 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-09 08:45:04,335 INFO L208 MainTranslator]: Completed translation [2021-11-09 08:45:04,335 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:45:04 WrapperNode [2021-11-09 08:45:04,335 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-09 08:45:04,337 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-09 08:45:04,337 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-09 08:45:04,337 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-09 08:45:04,344 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:45:04" (1/1) ... [2021-11-09 08:45:04,368 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:45:04" (1/1) ... [2021-11-09 08:45:04,427 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-09 08:45:04,428 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-09 08:45:04,428 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-09 08:45:04,428 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-09 08:45:04,437 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:45:04" (1/1) ... [2021-11-09 08:45:04,437 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:45:04" (1/1) ... [2021-11-09 08:45:04,447 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:45:04" (1/1) ... [2021-11-09 08:45:04,447 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:45:04" (1/1) ... [2021-11-09 08:45:04,483 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:45:04" (1/1) ... [2021-11-09 08:45:04,493 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:45:04" (1/1) ... [2021-11-09 08:45:04,497 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:45:04" (1/1) ... [2021-11-09 08:45:04,505 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-09 08:45:04,506 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-09 08:45:04,506 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-09 08:45:04,506 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-09 08:45:04,507 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:45:04" (1/1) ... [2021-11-09 08:45:04,532 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-09 08:45:04,544 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 08:45:04,568 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-09 08:45:04,585 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-11-09 08:45:04,615 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-11-09 08:45:04,615 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-09 08:45:04,616 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2021-11-09 08:45:04,616 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2021-11-09 08:45:04,616 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-11-09 08:45:04,616 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-11-09 08:45:04,616 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-09 08:45:04,616 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-11-09 08:45:04,616 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-09 08:45:04,617 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-09 08:45:04,617 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-09 08:45:04,617 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-09 08:45:04,823 WARN L805 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-11-09 08:45:05,897 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-09 08:45:05,897 INFO L299 CfgBuilder]: Removed 57 assume(true) statements. [2021-11-09 08:45:05,899 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.11 08:45:05 BoogieIcfgContainer [2021-11-09 08:45:05,899 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-09 08:45:05,900 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-11-09 08:45:05,900 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-11-09 08:45:05,903 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-11-09 08:45:05,904 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-09 08:45:05,904 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 09.11 08:45:03" (1/3) ... [2021-11-09 08:45:05,906 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@23a40b9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.11 08:45:05, skipping insertion in model container [2021-11-09 08:45:05,906 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-09 08:45:05,906 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 08:45:04" (2/3) ... [2021-11-09 08:45:05,906 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@23a40b9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.11 08:45:05, skipping insertion in model container [2021-11-09 08:45:05,906 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-09 08:45:05,907 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.11 08:45:05" (3/3) ... [2021-11-09 08:45:05,908 INFO L389 chiAutomizerObserver]: Analyzing ICFG uthash_OAT_test1-1.i [2021-11-09 08:45:05,949 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-11-09 08:45:05,950 INFO L360 BuchiCegarLoop]: Hoare is false [2021-11-09 08:45:05,950 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-11-09 08:45:05,950 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-11-09 08:45:05,950 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-11-09 08:45:05,950 INFO L364 BuchiCegarLoop]: Difference is false [2021-11-09 08:45:05,950 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-11-09 08:45:05,950 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-11-09 08:45:05,968 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 123 states, 118 states have (on average 1.694915254237288) internal successors, (200), 118 states have internal predecessors, (200), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-09 08:45:05,997 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 112 [2021-11-09 08:45:05,998 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 08:45:05,998 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 08:45:06,005 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-09 08:45:06,005 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2021-11-09 08:45:06,005 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-11-09 08:45:06,006 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 123 states, 118 states have (on average 1.694915254237288) internal successors, (200), 118 states have internal predecessors, (200), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-09 08:45:06,014 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 112 [2021-11-09 08:45:06,014 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 08:45:06,014 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 08:45:06,015 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-09 08:45:06,015 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2021-11-09 08:45:06,022 INFO L791 eck$LassoCheckResult]: Stem: 109#ULTIMATE.startENTRYtrue #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 40#L-1true havoc main_#res;havoc main_#t~malloc8.base, main_#t~malloc8.offset, main_#t~mem10, main_#t~mem9, main_#t~mem11, main_#t~mem12, main_#t~mem14, main_#t~mem13, main_#t~mem15, main_#t~mem16, main_#t~mem18, main_#t~mem17, main_#t~mem19, main_#t~mem20, main_#t~switch21, main_#t~mem22, main_#t~mem23, main_#t~mem24, main_#t~mem25, main_#t~mem26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc33.base, main_#t~malloc33.offset, main_#t~mem34.base, main_#t~mem34.offset, main_#t~mem35.base, main_#t~mem35.offset, main_#t~memset~res36.base, main_#t~memset~res36.offset, main_#t~mem37.base, main_#t~mem37.offset, main_#t~mem38.base, main_#t~mem38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~mem41.base, main_#t~mem41.offset, main_#t~malloc42.base, main_#t~malloc42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~mem47.base, main_#t~mem47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~memset~res49.base, main_#t~memset~res49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~mem54, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~post60, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64.base, main_#t~mem64.offset, main_#t~mem65, main_#t~post66, main_#t~mem67.base, main_#t~mem67.offset, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem71, main_#t~mem70, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73, main_#t~short74, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76, main_#t~malloc77.base, main_#t~malloc77.offset, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79.base, main_#t~mem79.offset, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~memset~res82.base, main_#t~memset~res82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem87, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem91, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem90, main_#t~ite92, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem97.base, main_#t~mem97.offset, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem99.base, main_#t~mem99.offset, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem103, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105, main_#t~pre106, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem108, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~post111, main_#t~mem115, main_#t~mem113, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem114, main_#t~mem116, main_#t~post117, main_#t~mem118.base, main_#t~mem118.offset, main_#t~mem119.base, main_#t~mem119.offset, main_#t~mem120.base, main_#t~mem120.offset, main_#t~post94, main_#t~mem95.base, main_#t~mem95.offset, main_#t~mem96, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem126, main_#t~post127, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129.base, main_#t~mem129.offset, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131.base, main_#t~mem131.offset, main_#t~mem134, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133, main_#t~ite137, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem140.base, main_#t~mem140.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~post7, main_#t~mem142, main_#t~mem143, main_#t~mem141.base, main_#t~mem141.offset, main_~i~0, main_~user~0.base, main_~user~0.offset, main_~users~0.base, main_~users~0.offset;havoc main_~i~0;havoc main_~user~0.base, main_~user~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;main_~i~0 := 0; 99#L750-3true [2021-11-09 08:45:06,022 INFO L793 eck$LassoCheckResult]: Loop: 99#L750-3true assume !!(main_~i~0 < 10);call main_#t~malloc8.base, main_#t~malloc8.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc8.base, main_#t~malloc8.offset;havoc main_#t~malloc8.base, main_#t~malloc8.offset; 65#L752true assume main_~user~0.base == 0 && main_~user~0.offset == 0;assume false; 67#L752-2true call write~int(main_~i~0, main_~user~0.base, main_~user~0.offset, 4);call write~int(main_~i~0 * main_~i~0, main_~user~0.base, 4 + main_~user~0.offset, 4); 85#L757-124true assume !true; 46#L750-2true main_#t~post7 := main_~i~0;main_~i~0 := 1 + main_#t~post7;havoc main_#t~post7; 99#L750-3true [2021-11-09 08:45:06,027 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 08:45:06,028 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2021-11-09 08:45:06,036 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 08:45:06,037 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2123252116] [2021-11-09 08:45:06,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:45:06,038 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 08:45:06,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 08:45:06,135 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 08:45:06,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 08:45:06,177 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 08:45:06,179 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 08:45:06,180 INFO L85 PathProgramCache]: Analyzing trace with hash 46868472, now seen corresponding path program 1 times [2021-11-09 08:45:06,180 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 08:45:06,181 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [286680316] [2021-11-09 08:45:06,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:45:06,182 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 08:45:06,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 08:45:06,244 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 08:45:06,244 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 08:45:06,244 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [286680316] [2021-11-09 08:45:06,245 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [286680316] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 08:45:06,245 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 08:45:06,245 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-09 08:45:06,245 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [897822055] [2021-11-09 08:45:06,249 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 08:45:06,250 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 08:45:06,264 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-11-09 08:45:06,264 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-11-09 08:45:06,267 INFO L87 Difference]: Start difference. First operand has 123 states, 118 states have (on average 1.694915254237288) internal successors, (200), 118 states have internal predecessors, (200), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 2.5) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 08:45:06,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 08:45:06,282 INFO L93 Difference]: Finished difference Result 123 states and 161 transitions. [2021-11-09 08:45:06,282 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-11-09 08:45:06,284 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 123 states and 161 transitions. [2021-11-09 08:45:06,288 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 112 [2021-11-09 08:45:06,295 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 123 states to 119 states and 157 transitions. [2021-11-09 08:45:06,296 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 119 [2021-11-09 08:45:06,297 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 119 [2021-11-09 08:45:06,297 INFO L73 IsDeterministic]: Start isDeterministic. Operand 119 states and 157 transitions. [2021-11-09 08:45:06,299 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 08:45:06,299 INFO L681 BuchiCegarLoop]: Abstraction has 119 states and 157 transitions. [2021-11-09 08:45:06,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states and 157 transitions. [2021-11-09 08:45:06,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 119. [2021-11-09 08:45:06,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 119 states, 115 states have (on average 1.3130434782608695) internal successors, (151), 114 states have internal predecessors, (151), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-09 08:45:06,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 157 transitions. [2021-11-09 08:45:06,336 INFO L704 BuchiCegarLoop]: Abstraction has 119 states and 157 transitions. [2021-11-09 08:45:06,336 INFO L587 BuchiCegarLoop]: Abstraction has 119 states and 157 transitions. [2021-11-09 08:45:06,336 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-11-09 08:45:06,336 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 119 states and 157 transitions. [2021-11-09 08:45:06,338 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 112 [2021-11-09 08:45:06,338 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 08:45:06,339 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 08:45:06,340 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-09 08:45:06,340 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 08:45:06,340 INFO L791 eck$LassoCheckResult]: Stem: 370#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 318#L-1 havoc main_#res;havoc main_#t~malloc8.base, main_#t~malloc8.offset, main_#t~mem10, main_#t~mem9, main_#t~mem11, main_#t~mem12, main_#t~mem14, main_#t~mem13, main_#t~mem15, main_#t~mem16, main_#t~mem18, main_#t~mem17, main_#t~mem19, main_#t~mem20, main_#t~switch21, main_#t~mem22, main_#t~mem23, main_#t~mem24, main_#t~mem25, main_#t~mem26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc33.base, main_#t~malloc33.offset, main_#t~mem34.base, main_#t~mem34.offset, main_#t~mem35.base, main_#t~mem35.offset, main_#t~memset~res36.base, main_#t~memset~res36.offset, main_#t~mem37.base, main_#t~mem37.offset, main_#t~mem38.base, main_#t~mem38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~mem41.base, main_#t~mem41.offset, main_#t~malloc42.base, main_#t~malloc42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~mem47.base, main_#t~mem47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~memset~res49.base, main_#t~memset~res49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~mem54, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~post60, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64.base, main_#t~mem64.offset, main_#t~mem65, main_#t~post66, main_#t~mem67.base, main_#t~mem67.offset, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem71, main_#t~mem70, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73, main_#t~short74, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76, main_#t~malloc77.base, main_#t~malloc77.offset, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79.base, main_#t~mem79.offset, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~memset~res82.base, main_#t~memset~res82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem87, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem91, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem90, main_#t~ite92, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem97.base, main_#t~mem97.offset, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem99.base, main_#t~mem99.offset, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem103, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105, main_#t~pre106, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem108, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~post111, main_#t~mem115, main_#t~mem113, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem114, main_#t~mem116, main_#t~post117, main_#t~mem118.base, main_#t~mem118.offset, main_#t~mem119.base, main_#t~mem119.offset, main_#t~mem120.base, main_#t~mem120.offset, main_#t~post94, main_#t~mem95.base, main_#t~mem95.offset, main_#t~mem96, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem126, main_#t~post127, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129.base, main_#t~mem129.offset, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131.base, main_#t~mem131.offset, main_#t~mem134, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133, main_#t~ite137, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem140.base, main_#t~mem140.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~post7, main_#t~mem142, main_#t~mem143, main_#t~mem141.base, main_#t~mem141.offset, main_~i~0, main_~user~0.base, main_~user~0.offset, main_~users~0.base, main_~users~0.offset;havoc main_~i~0;havoc main_~user~0.base, main_~user~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;main_~i~0 := 0; 319#L750-3 [2021-11-09 08:45:06,342 INFO L793 eck$LassoCheckResult]: Loop: 319#L750-3 assume !!(main_~i~0 < 10);call main_#t~malloc8.base, main_#t~malloc8.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc8.base, main_#t~malloc8.offset;havoc main_#t~malloc8.base, main_#t~malloc8.offset; 345#L752 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 346#L752-2 call write~int(main_~i~0, main_~user~0.base, main_~user~0.offset, 4);call write~int(main_~i~0 * main_~i~0, main_~user~0.base, 4 + main_~user~0.offset, 4); 348#L757-124 havoc main_~_ha_hashv~0; 347#L757-49 goto; 334#L757-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 258#L757-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 259#L757-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch21 := 11 == main_~_hj_k~0; 305#L757-10 assume main_#t~switch21;call main_#t~mem22 := read~int(main_~_hj_key~0.base, 10 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 16777216 * (main_#t~mem22 % 256);havoc main_#t~mem22; 368#L757-12 main_#t~switch21 := main_#t~switch21 || 10 == main_~_hj_k~0; 294#L757-13 assume main_#t~switch21;call main_#t~mem23 := read~int(main_~_hj_key~0.base, 9 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 65536 * (main_#t~mem23 % 256);havoc main_#t~mem23; 256#L757-15 main_#t~switch21 := main_#t~switch21 || 9 == main_~_hj_k~0; 257#L757-16 assume main_#t~switch21;call main_#t~mem24 := read~int(main_~_hj_key~0.base, 8 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 256 * (main_#t~mem24 % 256);havoc main_#t~mem24; 359#L757-18 main_#t~switch21 := main_#t~switch21 || 8 == main_~_hj_k~0; 350#L757-19 assume main_#t~switch21;call main_#t~mem25 := read~int(main_~_hj_key~0.base, 7 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 16777216 * (main_#t~mem25 % 256);havoc main_#t~mem25; 284#L757-21 main_#t~switch21 := main_#t~switch21 || 7 == main_~_hj_k~0; 285#L757-22 assume !main_#t~switch21; 331#L757-24 main_#t~switch21 := main_#t~switch21 || 6 == main_~_hj_k~0; 309#L757-25 assume main_#t~switch21;call main_#t~mem27 := read~int(main_~_hj_key~0.base, 5 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 256 * (main_#t~mem27 % 256);havoc main_#t~mem27; 310#L757-27 main_#t~switch21 := main_#t~switch21 || 5 == main_~_hj_k~0; 367#L757-28 assume main_#t~switch21;call main_#t~mem28 := read~int(main_~_hj_key~0.base, 4 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + main_#t~mem28 % 256;havoc main_#t~mem28; 365#L757-30 main_#t~switch21 := main_#t~switch21 || 4 == main_~_hj_k~0; 364#L757-31 assume main_#t~switch21;call main_#t~mem29 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem29 % 256);havoc main_#t~mem29; 265#L757-33 main_#t~switch21 := main_#t~switch21 || 3 == main_~_hj_k~0; 266#L757-34 assume main_#t~switch21;call main_#t~mem30 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem30 % 256);havoc main_#t~mem30; 330#L757-36 main_#t~switch21 := main_#t~switch21 || 2 == main_~_hj_k~0; 320#L757-37 assume main_#t~switch21;call main_#t~mem31 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem31 % 256);havoc main_#t~mem31; 321#L757-39 main_#t~switch21 := main_#t~switch21 || 1 == main_~_hj_k~0; 286#L757-40 assume main_#t~switch21;call main_#t~mem32 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem32 % 256;havoc main_#t~mem32; 271#L757-42 havoc main_#t~switch21; 272#L757-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 313#L757-44 goto; 352#L757-46 goto; 353#L757-48 goto; 314#L757-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 315#L757-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem50.base, main_#t~mem50.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem50.base, main_#t~mem50.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem50.base, main_#t~mem50.offset; 356#L757-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem51.base, main_#t~mem51.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem52.base, main_#t~mem52.offset := read~$Pointer$(main_#t~mem51.base, 16 + main_#t~mem51.offset, 4);call main_#t~mem53.base, main_#t~mem53.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem54 := read~int(main_#t~mem53.base, 20 + main_#t~mem53.offset, 4);call write~$Pointer$(main_#t~mem52.base, main_#t~mem52.offset - main_#t~mem54, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem51.base, main_#t~mem51.offset;havoc main_#t~mem52.base, main_#t~mem52.offset;havoc main_#t~mem53.base, main_#t~mem53.offset;havoc main_#t~mem54;call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_#t~mem55.base, 16 + main_#t~mem55.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem56.base, 8 + main_#t~mem56.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset;havoc main_#t~mem56.base, main_#t~mem56.offset;call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem57.base, 16 + main_#t~mem57.offset, 4);havoc main_#t~mem57.base, main_#t~mem57.offset; 357#L757-66 goto; 288#L757-120 havoc main_~_ha_bkt~0;call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 12 + main_#t~mem58.offset, 4);main_#t~post60 := main_#t~mem59;call write~int(1 + main_#t~post60, main_#t~mem58.base, 12 + main_#t~mem58.offset, 4);havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;havoc main_#t~post60; 332#L757-71 call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem62 := read~int(main_#t~mem61.base, 4 + main_#t~mem61.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem62 - 1);havoc main_#t~mem61.base, main_#t~mem61.offset;havoc main_#t~mem62; 333#L757-70 goto; 344#L757-118 call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64.base, main_#t~mem64.offset := read~$Pointer$(main_#t~mem63.base, main_#t~mem63.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem64.base, main_#t~mem64.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64.base, main_#t~mem64.offset;call main_#t~mem65 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post66 := main_#t~mem65;call write~int(1 + main_#t~post66, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem65;havoc main_#t~post66;call main_#t~mem67.base, main_#t~mem67.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem67.base, main_#t~mem67.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem67.base, main_#t~mem67.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 349#L757-73 assume main_#t~mem68.base != 0 || main_#t~mem68.offset != 0;havoc main_#t~mem68.base, main_#t~mem68.offset;call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem69.base, 12 + main_#t~mem69.offset, 4);havoc main_#t~mem69.base, main_#t~mem69.offset; 301#L757-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem71 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem70 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short74 := main_#t~mem71 % 4294967296 >= 10 * (1 + main_#t~mem70) % 4294967296; 302#L757-76 assume main_#t~short74;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem73 := read~int(main_#t~mem72.base, 36 + main_#t~mem72.offset, 4);main_#t~short74 := 0 == main_#t~mem73 % 4294967296; 360#L757-78 assume !main_#t~short74;havoc main_#t~mem71;havoc main_#t~mem70;havoc main_#t~mem72.base, main_#t~mem72.offset;havoc main_#t~mem73;havoc main_#t~short74; 290#L757-117 goto; 291#L757-119 goto; 298#L757-121 goto; 299#L757-123 goto; 326#L750-2 main_#t~post7 := main_~i~0;main_~i~0 := 1 + main_#t~post7;havoc main_#t~post7; 319#L750-3 [2021-11-09 08:45:06,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 08:45:06,343 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2021-11-09 08:45:06,343 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 08:45:06,343 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [665598142] [2021-11-09 08:45:06,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:45:06,344 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 08:45:06,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 08:45:06,373 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 08:45:06,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 08:45:06,394 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 08:45:06,397 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 08:45:06,399 INFO L85 PathProgramCache]: Analyzing trace with hash 155189657, now seen corresponding path program 1 times [2021-11-09 08:45:06,399 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 08:45:06,400 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [249068300] [2021-11-09 08:45:06,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:45:06,400 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 08:45:06,414 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-09 08:45:06,414 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1876194355] [2021-11-09 08:45:06,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:45:06,415 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-09 08:45:06,415 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 08:45:06,417 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-09 08:45:06,435 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-11-09 08:45:06,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 08:45:06,572 INFO L263 TraceCheckSpWp]: Trace formula consists of 293 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-09 08:45:06,576 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-09 08:45:06,784 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 08:45:06,784 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 08:45:06,785 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [249068300] [2021-11-09 08:45:06,785 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-09 08:45:06,785 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1876194355] [2021-11-09 08:45:06,786 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1876194355] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 08:45:06,786 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 08:45:06,786 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-09 08:45:06,786 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [658007765] [2021-11-09 08:45:06,787 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 08:45:06,787 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 08:45:06,788 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-09 08:45:06,788 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-09 08:45:06,789 INFO L87 Difference]: Start difference. First operand 119 states and 157 transitions. cyclomatic complexity: 41 Second operand has 3 states, 3 states have (on average 17.0) internal successors, (51), 3 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 08:45:06,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 08:45:06,902 INFO L93 Difference]: Finished difference Result 140 states and 178 transitions. [2021-11-09 08:45:06,903 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-09 08:45:06,903 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 140 states and 178 transitions. [2021-11-09 08:45:06,906 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 133 [2021-11-09 08:45:06,909 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 140 states to 140 states and 178 transitions. [2021-11-09 08:45:06,909 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 140 [2021-11-09 08:45:06,909 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 140 [2021-11-09 08:45:06,910 INFO L73 IsDeterministic]: Start isDeterministic. Operand 140 states and 178 transitions. [2021-11-09 08:45:06,911 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 08:45:06,911 INFO L681 BuchiCegarLoop]: Abstraction has 140 states and 178 transitions. [2021-11-09 08:45:06,911 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states and 178 transitions. [2021-11-09 08:45:06,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 139. [2021-11-09 08:45:06,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 139 states, 135 states have (on average 1.2666666666666666) internal successors, (171), 134 states have internal predecessors, (171), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-09 08:45:06,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 177 transitions. [2021-11-09 08:45:06,921 INFO L704 BuchiCegarLoop]: Abstraction has 139 states and 177 transitions. [2021-11-09 08:45:06,921 INFO L587 BuchiCegarLoop]: Abstraction has 139 states and 177 transitions. [2021-11-09 08:45:06,921 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-11-09 08:45:06,922 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 139 states and 177 transitions. [2021-11-09 08:45:06,923 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 132 [2021-11-09 08:45:06,923 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 08:45:06,923 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 08:45:06,925 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-09 08:45:06,925 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 08:45:06,925 INFO L791 eck$LassoCheckResult]: Stem: 794#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 734#L-1 havoc main_#res;havoc main_#t~malloc8.base, main_#t~malloc8.offset, main_#t~mem10, main_#t~mem9, main_#t~mem11, main_#t~mem12, main_#t~mem14, main_#t~mem13, main_#t~mem15, main_#t~mem16, main_#t~mem18, main_#t~mem17, main_#t~mem19, main_#t~mem20, main_#t~switch21, main_#t~mem22, main_#t~mem23, main_#t~mem24, main_#t~mem25, main_#t~mem26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc33.base, main_#t~malloc33.offset, main_#t~mem34.base, main_#t~mem34.offset, main_#t~mem35.base, main_#t~mem35.offset, main_#t~memset~res36.base, main_#t~memset~res36.offset, main_#t~mem37.base, main_#t~mem37.offset, main_#t~mem38.base, main_#t~mem38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~mem41.base, main_#t~mem41.offset, main_#t~malloc42.base, main_#t~malloc42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~mem47.base, main_#t~mem47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~memset~res49.base, main_#t~memset~res49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~mem54, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~post60, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64.base, main_#t~mem64.offset, main_#t~mem65, main_#t~post66, main_#t~mem67.base, main_#t~mem67.offset, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem71, main_#t~mem70, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73, main_#t~short74, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76, main_#t~malloc77.base, main_#t~malloc77.offset, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79.base, main_#t~mem79.offset, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~memset~res82.base, main_#t~memset~res82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem87, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem91, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem90, main_#t~ite92, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem97.base, main_#t~mem97.offset, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem99.base, main_#t~mem99.offset, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem103, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105, main_#t~pre106, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem108, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~post111, main_#t~mem115, main_#t~mem113, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem114, main_#t~mem116, main_#t~post117, main_#t~mem118.base, main_#t~mem118.offset, main_#t~mem119.base, main_#t~mem119.offset, main_#t~mem120.base, main_#t~mem120.offset, main_#t~post94, main_#t~mem95.base, main_#t~mem95.offset, main_#t~mem96, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem126, main_#t~post127, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129.base, main_#t~mem129.offset, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131.base, main_#t~mem131.offset, main_#t~mem134, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133, main_#t~ite137, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem140.base, main_#t~mem140.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~post7, main_#t~mem142, main_#t~mem143, main_#t~mem141.base, main_#t~mem141.offset, main_~i~0, main_~user~0.base, main_~user~0.offset, main_~users~0.base, main_~users~0.offset;havoc main_~i~0;havoc main_~user~0.base, main_~user~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;main_~i~0 := 0; 735#L750-3 [2021-11-09 08:45:06,925 INFO L793 eck$LassoCheckResult]: Loop: 735#L750-3 assume !!(main_~i~0 < 10);call main_#t~malloc8.base, main_#t~malloc8.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc8.base, main_#t~malloc8.offset;havoc main_#t~malloc8.base, main_#t~malloc8.offset; 763#L752 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 764#L752-2 call write~int(main_~i~0, main_~user~0.base, main_~user~0.offset, 4);call write~int(main_~i~0 * main_~i~0, main_~user~0.base, 4 + main_~user~0.offset, 4); 766#L757-124 havoc main_~_ha_hashv~0; 765#L757-49 goto; 752#L757-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 673#L757-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 674#L757-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch21 := 11 == main_~_hj_k~0; 721#L757-10 assume main_#t~switch21;call main_#t~mem22 := read~int(main_~_hj_key~0.base, 10 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 16777216 * (main_#t~mem22 % 256);havoc main_#t~mem22; 788#L757-12 main_#t~switch21 := main_#t~switch21 || 10 == main_~_hj_k~0; 709#L757-13 assume main_#t~switch21;call main_#t~mem23 := read~int(main_~_hj_key~0.base, 9 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 65536 * (main_#t~mem23 % 256);havoc main_#t~mem23; 710#L757-15 main_#t~switch21 := main_#t~switch21 || 9 == main_~_hj_k~0; 777#L757-16 assume main_#t~switch21;call main_#t~mem24 := read~int(main_~_hj_key~0.base, 8 + main_~_hj_key~0.offset, 1);main_~_ha_hashv~0 := main_~_ha_hashv~0 + 256 * (main_#t~mem24 % 256);havoc main_#t~mem24; 778#L757-18 main_#t~switch21 := main_#t~switch21 || 8 == main_~_hj_k~0; 768#L757-19 assume main_#t~switch21;call main_#t~mem25 := read~int(main_~_hj_key~0.base, 7 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 16777216 * (main_#t~mem25 % 256);havoc main_#t~mem25; 699#L757-21 main_#t~switch21 := main_#t~switch21 || 7 == main_~_hj_k~0; 700#L757-22 assume main_#t~switch21;call main_#t~mem26 := read~int(main_~_hj_key~0.base, 6 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 65536 * (main_#t~mem26 % 256);havoc main_#t~mem26; 751#L757-24 main_#t~switch21 := main_#t~switch21 || 6 == main_~_hj_k~0; 725#L757-25 assume main_#t~switch21;call main_#t~mem27 := read~int(main_~_hj_key~0.base, 5 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + 256 * (main_#t~mem27 % 256);havoc main_#t~mem27; 726#L757-27 main_#t~switch21 := main_#t~switch21 || 5 == main_~_hj_k~0; 787#L757-28 assume main_#t~switch21;call main_#t~mem28 := read~int(main_~_hj_key~0.base, 4 + main_~_hj_key~0.offset, 1);main_~_hj_j~0 := main_~_hj_j~0 + main_#t~mem28 % 256;havoc main_#t~mem28; 793#L757-30 main_#t~switch21 := main_#t~switch21 || 4 == main_~_hj_k~0; 783#L757-31 assume main_#t~switch21;call main_#t~mem29 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem29 % 256);havoc main_#t~mem29; 680#L757-33 main_#t~switch21 := main_#t~switch21 || 3 == main_~_hj_k~0; 681#L757-34 assume main_#t~switch21;call main_#t~mem30 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem30 % 256);havoc main_#t~mem30; 746#L757-36 main_#t~switch21 := main_#t~switch21 || 2 == main_~_hj_k~0; 736#L757-37 assume main_#t~switch21;call main_#t~mem31 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem31 % 256);havoc main_#t~mem31; 737#L757-39 main_#t~switch21 := main_#t~switch21 || 1 == main_~_hj_k~0; 701#L757-40 assume main_#t~switch21;call main_#t~mem32 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem32 % 256;havoc main_#t~mem32; 686#L757-42 havoc main_#t~switch21; 687#L757-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 729#L757-44 goto; 770#L757-46 goto; 771#L757-48 goto; 730#L757-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 731#L757-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem50.base, main_#t~mem50.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem50.base, main_#t~mem50.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem50.base, main_#t~mem50.offset; 774#L757-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem51.base, main_#t~mem51.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem52.base, main_#t~mem52.offset := read~$Pointer$(main_#t~mem51.base, 16 + main_#t~mem51.offset, 4);call main_#t~mem53.base, main_#t~mem53.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem54 := read~int(main_#t~mem53.base, 20 + main_#t~mem53.offset, 4);call write~$Pointer$(main_#t~mem52.base, main_#t~mem52.offset - main_#t~mem54, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem51.base, main_#t~mem51.offset;havoc main_#t~mem52.base, main_#t~mem52.offset;havoc main_#t~mem53.base, main_#t~mem53.offset;havoc main_#t~mem54;call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_#t~mem55.base, 16 + main_#t~mem55.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem56.base, 8 + main_#t~mem56.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset;havoc main_#t~mem56.base, main_#t~mem56.offset;call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem57.base, 16 + main_#t~mem57.offset, 4);havoc main_#t~mem57.base, main_#t~mem57.offset; 775#L757-66 goto; 703#L757-120 havoc main_~_ha_bkt~0;call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 12 + main_#t~mem58.offset, 4);main_#t~post60 := main_#t~mem59;call write~int(1 + main_#t~post60, main_#t~mem58.base, 12 + main_#t~mem58.offset, 4);havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;havoc main_#t~post60; 749#L757-71 call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem62 := read~int(main_#t~mem61.base, 4 + main_#t~mem61.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem62 - 1);havoc main_#t~mem61.base, main_#t~mem61.offset;havoc main_#t~mem62; 750#L757-70 goto; 762#L757-118 call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64.base, main_#t~mem64.offset := read~$Pointer$(main_#t~mem63.base, main_#t~mem63.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem64.base, main_#t~mem64.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64.base, main_#t~mem64.offset;call main_#t~mem65 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post66 := main_#t~mem65;call write~int(1 + main_#t~post66, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem65;havoc main_#t~post66;call main_#t~mem67.base, main_#t~mem67.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem67.base, main_#t~mem67.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem67.base, main_#t~mem67.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 767#L757-73 assume main_#t~mem68.base != 0 || main_#t~mem68.offset != 0;havoc main_#t~mem68.base, main_#t~mem68.offset;call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem69.base, 12 + main_#t~mem69.offset, 4);havoc main_#t~mem69.base, main_#t~mem69.offset; 717#L757-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem71 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem70 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short74 := main_#t~mem71 % 4294967296 >= 10 * (1 + main_#t~mem70) % 4294967296; 718#L757-76 assume main_#t~short74;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem73 := read~int(main_#t~mem72.base, 36 + main_#t~mem72.offset, 4);main_#t~short74 := 0 == main_#t~mem73 % 4294967296; 779#L757-78 assume !main_#t~short74;havoc main_#t~mem71;havoc main_#t~mem70;havoc main_#t~mem72.base, main_#t~mem72.offset;havoc main_#t~mem73;havoc main_#t~short74; 705#L757-117 goto; 706#L757-119 goto; 714#L757-121 goto; 715#L757-123 goto; 742#L750-2 main_#t~post7 := main_~i~0;main_~i~0 := 1 + main_#t~post7;havoc main_#t~post7; 735#L750-3 [2021-11-09 08:45:06,926 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 08:45:06,926 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2021-11-09 08:45:06,926 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 08:45:06,927 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [416226684] [2021-11-09 08:45:06,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:45:06,927 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 08:45:06,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 08:45:06,940 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 08:45:06,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 08:45:06,958 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 08:45:06,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 08:45:06,958 INFO L85 PathProgramCache]: Analyzing trace with hash 999195159, now seen corresponding path program 1 times [2021-11-09 08:45:06,959 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 08:45:06,959 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [682126200] [2021-11-09 08:45:06,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:45:06,959 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 08:45:06,971 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-09 08:45:06,971 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1322187141] [2021-11-09 08:45:06,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:45:06,972 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-09 08:45:06,972 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 08:45:06,973 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-09 08:45:06,979 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-11-09 08:45:07,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 08:45:07,126 INFO L263 TraceCheckSpWp]: Trace formula consists of 299 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-09 08:45:07,128 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-09 08:45:07,297 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 08:45:07,298 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 08:45:07,298 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [682126200] [2021-11-09 08:45:07,298 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-09 08:45:07,298 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1322187141] [2021-11-09 08:45:07,299 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1322187141] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 08:45:07,299 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 08:45:07,299 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-09 08:45:07,299 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [34305865] [2021-11-09 08:45:07,300 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 08:45:07,300 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 08:45:07,300 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-09 08:45:07,300 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-09 08:45:07,301 INFO L87 Difference]: Start difference. First operand 139 states and 177 transitions. cyclomatic complexity: 41 Second operand has 4 states, 4 states have (on average 12.75) internal successors, (51), 4 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 08:45:07,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 08:45:07,394 INFO L93 Difference]: Finished difference Result 157 states and 199 transitions. [2021-11-09 08:45:07,395 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-09 08:45:07,395 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 157 states and 199 transitions. [2021-11-09 08:45:07,397 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 143 [2021-11-09 08:45:07,399 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 157 states to 157 states and 199 transitions. [2021-11-09 08:45:07,399 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 157 [2021-11-09 08:45:07,400 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 157 [2021-11-09 08:45:07,400 INFO L73 IsDeterministic]: Start isDeterministic. Operand 157 states and 199 transitions. [2021-11-09 08:45:07,401 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 08:45:07,402 INFO L681 BuchiCegarLoop]: Abstraction has 157 states and 199 transitions. [2021-11-09 08:45:07,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states and 199 transitions. [2021-11-09 08:45:07,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 125. [2021-11-09 08:45:07,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 125 states, 121 states have (on average 1.2396694214876034) internal successors, (150), 120 states have internal predecessors, (150), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-09 08:45:07,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 156 transitions. [2021-11-09 08:45:07,410 INFO L704 BuchiCegarLoop]: Abstraction has 125 states and 156 transitions. [2021-11-09 08:45:07,410 INFO L587 BuchiCegarLoop]: Abstraction has 125 states and 156 transitions. [2021-11-09 08:45:07,410 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-11-09 08:45:07,411 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 125 states and 156 transitions. [2021-11-09 08:45:07,412 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 118 [2021-11-09 08:45:07,412 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 08:45:07,412 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 08:45:07,413 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-09 08:45:07,413 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 08:45:07,413 INFO L791 eck$LassoCheckResult]: Stem: 1243#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 1188#L-1 havoc main_#res;havoc main_#t~malloc8.base, main_#t~malloc8.offset, main_#t~mem10, main_#t~mem9, main_#t~mem11, main_#t~mem12, main_#t~mem14, main_#t~mem13, main_#t~mem15, main_#t~mem16, main_#t~mem18, main_#t~mem17, main_#t~mem19, main_#t~mem20, main_#t~switch21, main_#t~mem22, main_#t~mem23, main_#t~mem24, main_#t~mem25, main_#t~mem26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc33.base, main_#t~malloc33.offset, main_#t~mem34.base, main_#t~mem34.offset, main_#t~mem35.base, main_#t~mem35.offset, main_#t~memset~res36.base, main_#t~memset~res36.offset, main_#t~mem37.base, main_#t~mem37.offset, main_#t~mem38.base, main_#t~mem38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~mem41.base, main_#t~mem41.offset, main_#t~malloc42.base, main_#t~malloc42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~mem47.base, main_#t~mem47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~memset~res49.base, main_#t~memset~res49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~mem54, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~post60, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64.base, main_#t~mem64.offset, main_#t~mem65, main_#t~post66, main_#t~mem67.base, main_#t~mem67.offset, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem71, main_#t~mem70, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73, main_#t~short74, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76, main_#t~malloc77.base, main_#t~malloc77.offset, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79.base, main_#t~mem79.offset, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~memset~res82.base, main_#t~memset~res82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem87, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem91, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem90, main_#t~ite92, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem97.base, main_#t~mem97.offset, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem99.base, main_#t~mem99.offset, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem103, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105, main_#t~pre106, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem108, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~post111, main_#t~mem115, main_#t~mem113, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem114, main_#t~mem116, main_#t~post117, main_#t~mem118.base, main_#t~mem118.offset, main_#t~mem119.base, main_#t~mem119.offset, main_#t~mem120.base, main_#t~mem120.offset, main_#t~post94, main_#t~mem95.base, main_#t~mem95.offset, main_#t~mem96, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem126, main_#t~post127, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129.base, main_#t~mem129.offset, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131.base, main_#t~mem131.offset, main_#t~mem134, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133, main_#t~ite137, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem140.base, main_#t~mem140.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~post7, main_#t~mem142, main_#t~mem143, main_#t~mem141.base, main_#t~mem141.offset, main_~i~0, main_~user~0.base, main_~user~0.offset, main_~users~0.base, main_~users~0.offset;havoc main_~i~0;havoc main_~user~0.base, main_~user~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;main_~i~0 := 0; 1189#L750-3 [2021-11-09 08:45:07,414 INFO L793 eck$LassoCheckResult]: Loop: 1189#L750-3 assume !!(main_~i~0 < 10);call main_#t~malloc8.base, main_#t~malloc8.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc8.base, main_#t~malloc8.offset;havoc main_#t~malloc8.base, main_#t~malloc8.offset; 1215#L752 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 1216#L752-2 call write~int(main_~i~0, main_~user~0.base, main_~user~0.offset, 4);call write~int(main_~i~0 * main_~i~0, main_~user~0.base, 4 + main_~user~0.offset, 4); 1218#L757-124 havoc main_~_ha_hashv~0; 1217#L757-49 goto; 1204#L757-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 1128#L757-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 1129#L757-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch21 := 11 == main_~_hj_k~0; 1175#L757-10 assume !main_#t~switch21; 1241#L757-12 main_#t~switch21 := main_#t~switch21 || 10 == main_~_hj_k~0; 1164#L757-13 assume !main_#t~switch21; 1126#L757-15 main_#t~switch21 := main_#t~switch21 || 9 == main_~_hj_k~0; 1127#L757-16 assume !main_#t~switch21; 1231#L757-18 main_#t~switch21 := main_#t~switch21 || 8 == main_~_hj_k~0; 1220#L757-19 assume !main_#t~switch21; 1154#L757-21 main_#t~switch21 := main_#t~switch21 || 7 == main_~_hj_k~0; 1155#L757-22 assume !main_#t~switch21; 1203#L757-24 main_#t~switch21 := main_#t~switch21 || 6 == main_~_hj_k~0; 1179#L757-25 assume !main_#t~switch21; 1180#L757-27 main_#t~switch21 := main_#t~switch21 || 5 == main_~_hj_k~0; 1238#L757-28 assume !main_#t~switch21; 1236#L757-30 main_#t~switch21 := main_#t~switch21 || 4 == main_~_hj_k~0; 1234#L757-31 assume !main_#t~switch21; 1235#L757-33 main_#t~switch21 := main_#t~switch21 || 3 == main_~_hj_k~0; 1248#L757-34 assume main_#t~switch21;call main_#t~mem30 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem30 % 256);havoc main_#t~mem30; 1200#L757-36 main_#t~switch21 := main_#t~switch21 || 2 == main_~_hj_k~0; 1190#L757-37 assume main_#t~switch21;call main_#t~mem31 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem31 % 256);havoc main_#t~mem31; 1191#L757-39 main_#t~switch21 := main_#t~switch21 || 1 == main_~_hj_k~0; 1156#L757-40 assume main_#t~switch21;call main_#t~mem32 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem32 % 256;havoc main_#t~mem32; 1141#L757-42 havoc main_#t~switch21; 1142#L757-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 1183#L757-44 goto; 1222#L757-46 goto; 1223#L757-48 goto; 1184#L757-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 1185#L757-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem50.base, main_#t~mem50.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem50.base, main_#t~mem50.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem50.base, main_#t~mem50.offset; 1226#L757-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem51.base, main_#t~mem51.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem52.base, main_#t~mem52.offset := read~$Pointer$(main_#t~mem51.base, 16 + main_#t~mem51.offset, 4);call main_#t~mem53.base, main_#t~mem53.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem54 := read~int(main_#t~mem53.base, 20 + main_#t~mem53.offset, 4);call write~$Pointer$(main_#t~mem52.base, main_#t~mem52.offset - main_#t~mem54, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem51.base, main_#t~mem51.offset;havoc main_#t~mem52.base, main_#t~mem52.offset;havoc main_#t~mem53.base, main_#t~mem53.offset;havoc main_#t~mem54;call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_#t~mem55.base, 16 + main_#t~mem55.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem56.base, 8 + main_#t~mem56.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset;havoc main_#t~mem56.base, main_#t~mem56.offset;call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem57.base, 16 + main_#t~mem57.offset, 4);havoc main_#t~mem57.base, main_#t~mem57.offset; 1227#L757-66 goto; 1158#L757-120 havoc main_~_ha_bkt~0;call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 12 + main_#t~mem58.offset, 4);main_#t~post60 := main_#t~mem59;call write~int(1 + main_#t~post60, main_#t~mem58.base, 12 + main_#t~mem58.offset, 4);havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;havoc main_#t~post60; 1201#L757-71 call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem62 := read~int(main_#t~mem61.base, 4 + main_#t~mem61.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem62 - 1);havoc main_#t~mem61.base, main_#t~mem61.offset;havoc main_#t~mem62; 1202#L757-70 goto; 1214#L757-118 call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64.base, main_#t~mem64.offset := read~$Pointer$(main_#t~mem63.base, main_#t~mem63.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem64.base, main_#t~mem64.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64.base, main_#t~mem64.offset;call main_#t~mem65 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post66 := main_#t~mem65;call write~int(1 + main_#t~post66, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem65;havoc main_#t~post66;call main_#t~mem67.base, main_#t~mem67.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem67.base, main_#t~mem67.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem67.base, main_#t~mem67.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 1219#L757-73 assume main_#t~mem68.base != 0 || main_#t~mem68.offset != 0;havoc main_#t~mem68.base, main_#t~mem68.offset;call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem69.base, 12 + main_#t~mem69.offset, 4);havoc main_#t~mem69.base, main_#t~mem69.offset; 1171#L757-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem71 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem70 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short74 := main_#t~mem71 % 4294967296 >= 10 * (1 + main_#t~mem70) % 4294967296; 1172#L757-76 assume main_#t~short74;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem73 := read~int(main_#t~mem72.base, 36 + main_#t~mem72.offset, 4);main_#t~short74 := 0 == main_#t~mem73 % 4294967296; 1229#L757-78 assume !main_#t~short74;havoc main_#t~mem71;havoc main_#t~mem70;havoc main_#t~mem72.base, main_#t~mem72.offset;havoc main_#t~mem73;havoc main_#t~short74; 1160#L757-117 goto; 1161#L757-119 goto; 1168#L757-121 goto; 1169#L757-123 goto; 1195#L750-2 main_#t~post7 := main_~i~0;main_~i~0 := 1 + main_#t~post7;havoc main_#t~post7; 1189#L750-3 [2021-11-09 08:45:07,414 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 08:45:07,415 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2021-11-09 08:45:07,415 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 08:45:07,415 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [654830922] [2021-11-09 08:45:07,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:45:07,415 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 08:45:07,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 08:45:07,427 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 08:45:07,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 08:45:07,444 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 08:45:07,445 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 08:45:07,445 INFO L85 PathProgramCache]: Analyzing trace with hash 511024167, now seen corresponding path program 1 times [2021-11-09 08:45:07,445 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 08:45:07,445 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [452663608] [2021-11-09 08:45:07,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:45:07,446 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 08:45:07,454 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-09 08:45:07,455 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1748800148] [2021-11-09 08:45:07,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:45:07,455 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-09 08:45:07,456 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 08:45:07,511 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-09 08:45:07,515 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-11-09 08:45:07,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 08:45:07,685 INFO L263 TraceCheckSpWp]: Trace formula consists of 251 conjuncts, 4 conjunts are in the unsatisfiable core [2021-11-09 08:45:07,687 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-09 08:45:07,853 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 08:45:07,854 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 08:45:07,854 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [452663608] [2021-11-09 08:45:07,854 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-09 08:45:07,858 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1748800148] [2021-11-09 08:45:07,859 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1748800148] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 08:45:07,859 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 08:45:07,859 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2021-11-09 08:45:07,859 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [24663304] [2021-11-09 08:45:07,861 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 08:45:07,861 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 08:45:07,862 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2021-11-09 08:45:07,862 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2021-11-09 08:45:07,862 INFO L87 Difference]: Start difference. First operand 125 states and 156 transitions. cyclomatic complexity: 34 Second operand has 5 states, 5 states have (on average 10.2) internal successors, (51), 5 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 08:45:07,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 08:45:07,977 INFO L93 Difference]: Finished difference Result 245 states and 304 transitions. [2021-11-09 08:45:07,978 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2021-11-09 08:45:07,978 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 245 states and 304 transitions. [2021-11-09 08:45:07,984 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 237 [2021-11-09 08:45:07,986 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 245 states to 245 states and 304 transitions. [2021-11-09 08:45:07,987 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 245 [2021-11-09 08:45:07,987 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 245 [2021-11-09 08:45:07,987 INFO L73 IsDeterministic]: Start isDeterministic. Operand 245 states and 304 transitions. [2021-11-09 08:45:07,988 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 08:45:07,989 INFO L681 BuchiCegarLoop]: Abstraction has 245 states and 304 transitions. [2021-11-09 08:45:07,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 245 states and 304 transitions. [2021-11-09 08:45:08,003 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 245 to 148. [2021-11-09 08:45:08,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 148 states, 144 states have (on average 1.2152777777777777) internal successors, (175), 143 states have internal predecessors, (175), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-09 08:45:08,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 181 transitions. [2021-11-09 08:45:08,005 INFO L704 BuchiCegarLoop]: Abstraction has 148 states and 181 transitions. [2021-11-09 08:45:08,005 INFO L587 BuchiCegarLoop]: Abstraction has 148 states and 181 transitions. [2021-11-09 08:45:08,005 INFO L425 BuchiCegarLoop]: ======== Iteration 5============ [2021-11-09 08:45:08,005 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 148 states and 181 transitions. [2021-11-09 08:45:08,006 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 141 [2021-11-09 08:45:08,006 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 08:45:08,006 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 08:45:08,013 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-09 08:45:08,013 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 08:45:08,013 INFO L791 eck$LassoCheckResult]: Stem: 1771#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 1716#L-1 havoc main_#res;havoc main_#t~malloc8.base, main_#t~malloc8.offset, main_#t~mem10, main_#t~mem9, main_#t~mem11, main_#t~mem12, main_#t~mem14, main_#t~mem13, main_#t~mem15, main_#t~mem16, main_#t~mem18, main_#t~mem17, main_#t~mem19, main_#t~mem20, main_#t~switch21, main_#t~mem22, main_#t~mem23, main_#t~mem24, main_#t~mem25, main_#t~mem26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc33.base, main_#t~malloc33.offset, main_#t~mem34.base, main_#t~mem34.offset, main_#t~mem35.base, main_#t~mem35.offset, main_#t~memset~res36.base, main_#t~memset~res36.offset, main_#t~mem37.base, main_#t~mem37.offset, main_#t~mem38.base, main_#t~mem38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~mem41.base, main_#t~mem41.offset, main_#t~malloc42.base, main_#t~malloc42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~mem47.base, main_#t~mem47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~memset~res49.base, main_#t~memset~res49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~mem54, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~post60, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64.base, main_#t~mem64.offset, main_#t~mem65, main_#t~post66, main_#t~mem67.base, main_#t~mem67.offset, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem71, main_#t~mem70, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73, main_#t~short74, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76, main_#t~malloc77.base, main_#t~malloc77.offset, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79.base, main_#t~mem79.offset, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~memset~res82.base, main_#t~memset~res82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem87, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem91, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem90, main_#t~ite92, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem97.base, main_#t~mem97.offset, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem99.base, main_#t~mem99.offset, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem103, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105, main_#t~pre106, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem108, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~post111, main_#t~mem115, main_#t~mem113, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem114, main_#t~mem116, main_#t~post117, main_#t~mem118.base, main_#t~mem118.offset, main_#t~mem119.base, main_#t~mem119.offset, main_#t~mem120.base, main_#t~mem120.offset, main_#t~post94, main_#t~mem95.base, main_#t~mem95.offset, main_#t~mem96, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem126, main_#t~post127, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129.base, main_#t~mem129.offset, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131.base, main_#t~mem131.offset, main_#t~mem134, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133, main_#t~ite137, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem140.base, main_#t~mem140.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~post7, main_#t~mem142, main_#t~mem143, main_#t~mem141.base, main_#t~mem141.offset, main_~i~0, main_~user~0.base, main_~user~0.offset, main_~users~0.base, main_~users~0.offset;havoc main_~i~0;havoc main_~user~0.base, main_~user~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;main_~i~0 := 0; 1717#L750-3 [2021-11-09 08:45:08,013 INFO L793 eck$LassoCheckResult]: Loop: 1717#L750-3 assume !!(main_~i~0 < 10);call main_#t~malloc8.base, main_#t~malloc8.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc8.base, main_#t~malloc8.offset;havoc main_#t~malloc8.base, main_#t~malloc8.offset; 1743#L752 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 1744#L752-2 call write~int(main_~i~0, main_~user~0.base, main_~user~0.offset, 4);call write~int(main_~i~0 * main_~i~0, main_~user~0.base, 4 + main_~user~0.offset, 4); 1746#L757-124 havoc main_~_ha_hashv~0; 1745#L757-49 goto; 1732#L757-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 1656#L757-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 1657#L757-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch21 := 11 == main_~_hj_k~0; 1703#L757-10 assume !main_#t~switch21; 1767#L757-12 main_#t~switch21 := main_#t~switch21 || 10 == main_~_hj_k~0; 1692#L757-13 assume !main_#t~switch21; 1654#L757-15 main_#t~switch21 := main_#t~switch21 || 9 == main_~_hj_k~0; 1655#L757-16 assume !main_#t~switch21; 1759#L757-18 main_#t~switch21 := main_#t~switch21 || 8 == main_~_hj_k~0; 1748#L757-19 assume !main_#t~switch21; 1682#L757-21 main_#t~switch21 := main_#t~switch21 || 7 == main_~_hj_k~0; 1683#L757-22 assume !main_#t~switch21; 1731#L757-24 main_#t~switch21 := main_#t~switch21 || 6 == main_~_hj_k~0; 1707#L757-25 assume !main_#t~switch21; 1708#L757-27 main_#t~switch21 := main_#t~switch21 || 5 == main_~_hj_k~0; 1766#L757-28 assume !main_#t~switch21; 1764#L757-30 main_#t~switch21 := main_#t~switch21 || 4 == main_~_hj_k~0; 1762#L757-31 assume !main_#t~switch21; 1763#L757-33 main_#t~switch21 := main_#t~switch21 || 3 == main_~_hj_k~0; 1781#L757-34 assume !main_#t~switch21; 1779#L757-36 main_#t~switch21 := main_#t~switch21 || 2 == main_~_hj_k~0; 1718#L757-37 assume !main_#t~switch21; 1719#L757-39 main_#t~switch21 := main_#t~switch21 || 1 == main_~_hj_k~0; 1684#L757-40 assume !main_#t~switch21; 1669#L757-42 havoc main_#t~switch21; 1670#L757-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 1713#L757-44 goto; 1750#L757-46 goto; 1751#L757-48 goto; 1714#L757-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 1715#L757-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem50.base, main_#t~mem50.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem50.base, main_#t~mem50.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem50.base, main_#t~mem50.offset; 1754#L757-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem51.base, main_#t~mem51.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem52.base, main_#t~mem52.offset := read~$Pointer$(main_#t~mem51.base, 16 + main_#t~mem51.offset, 4);call main_#t~mem53.base, main_#t~mem53.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem54 := read~int(main_#t~mem53.base, 20 + main_#t~mem53.offset, 4);call write~$Pointer$(main_#t~mem52.base, main_#t~mem52.offset - main_#t~mem54, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem51.base, main_#t~mem51.offset;havoc main_#t~mem52.base, main_#t~mem52.offset;havoc main_#t~mem53.base, main_#t~mem53.offset;havoc main_#t~mem54;call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_#t~mem55.base, 16 + main_#t~mem55.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem56.base, 8 + main_#t~mem56.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset;havoc main_#t~mem56.base, main_#t~mem56.offset;call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem57.base, 16 + main_#t~mem57.offset, 4);havoc main_#t~mem57.base, main_#t~mem57.offset; 1755#L757-66 goto; 1686#L757-120 havoc main_~_ha_bkt~0;call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 12 + main_#t~mem58.offset, 4);main_#t~post60 := main_#t~mem59;call write~int(1 + main_#t~post60, main_#t~mem58.base, 12 + main_#t~mem58.offset, 4);havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;havoc main_#t~post60; 1729#L757-71 call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem62 := read~int(main_#t~mem61.base, 4 + main_#t~mem61.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem62 - 1);havoc main_#t~mem61.base, main_#t~mem61.offset;havoc main_#t~mem62; 1730#L757-70 goto; 1742#L757-118 call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64.base, main_#t~mem64.offset := read~$Pointer$(main_#t~mem63.base, main_#t~mem63.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem64.base, main_#t~mem64.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64.base, main_#t~mem64.offset;call main_#t~mem65 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post66 := main_#t~mem65;call write~int(1 + main_#t~post66, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem65;havoc main_#t~post66;call main_#t~mem67.base, main_#t~mem67.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem67.base, main_#t~mem67.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem67.base, main_#t~mem67.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 1747#L757-73 assume main_#t~mem68.base != 0 || main_#t~mem68.offset != 0;havoc main_#t~mem68.base, main_#t~mem68.offset;call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem69.base, 12 + main_#t~mem69.offset, 4);havoc main_#t~mem69.base, main_#t~mem69.offset; 1699#L757-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem71 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem70 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short74 := main_#t~mem71 % 4294967296 >= 10 * (1 + main_#t~mem70) % 4294967296; 1700#L757-76 assume main_#t~short74;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem73 := read~int(main_#t~mem72.base, 36 + main_#t~mem72.offset, 4);main_#t~short74 := 0 == main_#t~mem73 % 4294967296; 1757#L757-78 assume !main_#t~short74;havoc main_#t~mem71;havoc main_#t~mem70;havoc main_#t~mem72.base, main_#t~mem72.offset;havoc main_#t~mem73;havoc main_#t~short74; 1688#L757-117 goto; 1689#L757-119 goto; 1694#L757-121 goto; 1695#L757-123 goto; 1723#L750-2 main_#t~post7 := main_~i~0;main_~i~0 := 1 + main_#t~post7;havoc main_#t~post7; 1717#L750-3 [2021-11-09 08:45:08,014 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 08:45:08,014 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 5 times [2021-11-09 08:45:08,014 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 08:45:08,014 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1013839186] [2021-11-09 08:45:08,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:45:08,015 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 08:45:08,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 08:45:08,040 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 08:45:08,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 08:45:08,062 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 08:45:08,063 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 08:45:08,064 INFO L85 PathProgramCache]: Analyzing trace with hash 769362477, now seen corresponding path program 1 times [2021-11-09 08:45:08,064 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 08:45:08,064 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [769226772] [2021-11-09 08:45:08,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:45:08,066 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 08:45:08,091 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-09 08:45:08,091 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1895368498] [2021-11-09 08:45:08,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:45:08,091 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-09 08:45:08,092 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 08:45:08,099 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-09 08:45:08,109 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2021-11-09 08:45:08,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-09 08:45:08,255 INFO L263 TraceCheckSpWp]: Trace formula consists of 233 conjuncts, 4 conjunts are in the unsatisfiable core [2021-11-09 08:45:08,257 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-09 08:45:08,402 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-09 08:45:08,403 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-09 08:45:08,403 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [769226772] [2021-11-09 08:45:08,403 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-09 08:45:08,403 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1895368498] [2021-11-09 08:45:08,403 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1895368498] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-09 08:45:08,404 INFO L186 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2021-11-09 08:45:08,404 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-09 08:45:08,404 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1361870369] [2021-11-09 08:45:08,404 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-09 08:45:08,405 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-09 08:45:08,405 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-09 08:45:08,405 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-09 08:45:08,406 INFO L87 Difference]: Start difference. First operand 148 states and 181 transitions. cyclomatic complexity: 36 Second operand has 4 states, 4 states have (on average 12.75) internal successors, (51), 4 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-09 08:45:08,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-09 08:45:08,457 INFO L93 Difference]: Finished difference Result 147 states and 184 transitions. [2021-11-09 08:45:08,457 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-09 08:45:08,458 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 147 states and 184 transitions. [2021-11-09 08:45:08,459 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 133 [2021-11-09 08:45:08,461 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 147 states to 147 states and 184 transitions. [2021-11-09 08:45:08,461 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 147 [2021-11-09 08:45:08,461 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 147 [2021-11-09 08:45:08,462 INFO L73 IsDeterministic]: Start isDeterministic. Operand 147 states and 184 transitions. [2021-11-09 08:45:08,462 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-09 08:45:08,462 INFO L681 BuchiCegarLoop]: Abstraction has 147 states and 184 transitions. [2021-11-09 08:45:08,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states and 184 transitions. [2021-11-09 08:45:08,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 116. [2021-11-09 08:45:08,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 112 states have (on average 1.2142857142857142) internal successors, (136), 111 states have internal predecessors, (136), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-09 08:45:08,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 142 transitions. [2021-11-09 08:45:08,480 INFO L704 BuchiCegarLoop]: Abstraction has 116 states and 142 transitions. [2021-11-09 08:45:08,480 INFO L587 BuchiCegarLoop]: Abstraction has 116 states and 142 transitions. [2021-11-09 08:45:08,480 INFO L425 BuchiCegarLoop]: ======== Iteration 6============ [2021-11-09 08:45:08,480 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 116 states and 142 transitions. [2021-11-09 08:45:08,481 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 109 [2021-11-09 08:45:08,481 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-09 08:45:08,481 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-09 08:45:08,482 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-09 08:45:08,482 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-09 08:45:08,482 INFO L791 eck$LassoCheckResult]: Stem: 2219#ULTIMATE.startENTRY #NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 2167#L-1 havoc main_#res;havoc main_#t~malloc8.base, main_#t~malloc8.offset, main_#t~mem10, main_#t~mem9, main_#t~mem11, main_#t~mem12, main_#t~mem14, main_#t~mem13, main_#t~mem15, main_#t~mem16, main_#t~mem18, main_#t~mem17, main_#t~mem19, main_#t~mem20, main_#t~switch21, main_#t~mem22, main_#t~mem23, main_#t~mem24, main_#t~mem25, main_#t~mem26, main_#t~mem27, main_#t~mem28, main_#t~mem29, main_#t~mem30, main_#t~mem31, main_#t~mem32, main_~_hj_i~0, main_~_hj_j~0, main_~_hj_k~0, main_~_hj_key~0.base, main_~_hj_key~0.offset, main_#t~malloc33.base, main_#t~malloc33.offset, main_#t~mem34.base, main_#t~mem34.offset, main_#t~mem35.base, main_#t~mem35.offset, main_#t~memset~res36.base, main_#t~memset~res36.offset, main_#t~mem37.base, main_#t~mem37.offset, main_#t~mem38.base, main_#t~mem38.offset, main_#t~mem39.base, main_#t~mem39.offset, main_#t~mem40.base, main_#t~mem40.offset, main_#t~mem41.base, main_#t~mem41.offset, main_#t~malloc42.base, main_#t~malloc42.offset, main_#t~mem43.base, main_#t~mem43.offset, main_#t~mem44.base, main_#t~mem44.offset, main_#t~mem45.base, main_#t~mem45.offset, main_#t~mem46.base, main_#t~mem46.offset, main_#t~mem47.base, main_#t~mem47.offset, main_#t~mem48.base, main_#t~mem48.offset, main_#t~memset~res49.base, main_#t~memset~res49.offset, main_#t~mem50.base, main_#t~mem50.offset, main_#t~mem51.base, main_#t~mem51.offset, main_#t~mem52.base, main_#t~mem52.offset, main_#t~mem53.base, main_#t~mem53.offset, main_#t~mem54, main_#t~mem55.base, main_#t~mem55.offset, main_#t~mem56.base, main_#t~mem56.offset, main_#t~mem57.base, main_#t~mem57.offset, main_#t~mem58.base, main_#t~mem58.offset, main_#t~mem59, main_#t~post60, main_#t~mem61.base, main_#t~mem61.offset, main_#t~mem62, main_#t~mem63.base, main_#t~mem63.offset, main_#t~mem64.base, main_#t~mem64.offset, main_#t~mem65, main_#t~post66, main_#t~mem67.base, main_#t~mem67.offset, main_#t~mem68.base, main_#t~mem68.offset, main_#t~mem69.base, main_#t~mem69.offset, main_#t~mem71, main_#t~mem70, main_#t~mem72.base, main_#t~mem72.offset, main_#t~mem73, main_#t~short74, main_#t~mem75.base, main_#t~mem75.offset, main_#t~mem76, main_#t~malloc77.base, main_#t~malloc77.offset, main_#t~mem78.base, main_#t~mem78.offset, main_#t~mem79.base, main_#t~mem79.offset, main_#t~mem80.base, main_#t~mem80.offset, main_#t~mem81, main_#t~memset~res82.base, main_#t~memset~res82.offset, main_#t~mem83.base, main_#t~mem83.offset, main_#t~mem84.base, main_#t~mem84.offset, main_#t~mem87, main_#t~mem85.base, main_#t~mem85.offset, main_#t~mem86, main_#t~mem88.base, main_#t~mem88.offset, main_#t~mem91, main_#t~mem89.base, main_#t~mem89.offset, main_#t~mem90, main_#t~ite92, main_#t~mem93.base, main_#t~mem93.offset, main_#t~mem97.base, main_#t~mem97.offset, main_#t~mem98.base, main_#t~mem98.offset, main_#t~mem99.base, main_#t~mem99.offset, main_#t~mem100.base, main_#t~mem100.offset, main_#t~mem103, main_#t~mem101.base, main_#t~mem101.offset, main_#t~mem102, main_#t~mem104.base, main_#t~mem104.offset, main_#t~mem105, main_#t~pre106, main_#t~mem107.base, main_#t~mem107.offset, main_#t~mem108, main_#t~mem109.base, main_#t~mem109.offset, main_#t~mem110, main_#t~post111, main_#t~mem115, main_#t~mem113, main_#t~mem112.base, main_#t~mem112.offset, main_#t~mem114, main_#t~mem116, main_#t~post117, main_#t~mem118.base, main_#t~mem118.offset, main_#t~mem119.base, main_#t~mem119.offset, main_#t~mem120.base, main_#t~mem120.offset, main_#t~post94, main_#t~mem95.base, main_#t~mem95.offset, main_#t~mem96, main_#t~mem121.base, main_#t~mem121.offset, main_#t~mem122.base, main_#t~mem122.offset, main_#t~mem123.base, main_#t~mem123.offset, main_#t~mem124, main_#t~mem125.base, main_#t~mem125.offset, main_#t~mem126, main_#t~post127, main_#t~mem128.base, main_#t~mem128.offset, main_#t~mem129.base, main_#t~mem129.offset, main_#t~mem130.base, main_#t~mem130.offset, main_#t~mem131.base, main_#t~mem131.offset, main_#t~mem134, main_#t~mem132.base, main_#t~mem132.offset, main_#t~mem133, main_#t~ite137, main_#t~mem135.base, main_#t~mem135.offset, main_#t~mem136, main_#t~mem138.base, main_#t~mem138.offset, main_#t~mem139, main_#t~mem140.base, main_#t~mem140.offset, main_~_he_bkt~0, main_~_he_bkt_i~0, main_~_he_thh~0.base, main_~_he_thh~0.offset, main_~_he_hh_nxt~0.base, main_~_he_hh_nxt~0.offset, main_~#_he_new_buckets~0.base, main_~#_he_new_buckets~0.offset, main_~_he_newbkt~0.base, main_~_he_newbkt~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, main_~_ha_bkt~0, main_~_ha_hashv~0, main_#t~post7, main_#t~mem142, main_#t~mem143, main_#t~mem141.base, main_#t~mem141.offset, main_~i~0, main_~user~0.base, main_~user~0.offset, main_~users~0.base, main_~users~0.offset;havoc main_~i~0;havoc main_~user~0.base, main_~user~0.offset;main_~users~0.base, main_~users~0.offset := 0, 0;main_~i~0 := 0; 2168#L750-3 [2021-11-09 08:45:08,482 INFO L793 eck$LassoCheckResult]: Loop: 2168#L750-3 assume !!(main_~i~0 < 10);call main_#t~malloc8.base, main_#t~malloc8.offset := #Ultimate.allocOnHeap(40);main_~user~0.base, main_~user~0.offset := main_#t~malloc8.base, main_#t~malloc8.offset;havoc main_#t~malloc8.base, main_#t~malloc8.offset; 2194#L752 assume !(main_~user~0.base == 0 && main_~user~0.offset == 0); 2195#L752-2 call write~int(main_~i~0, main_~user~0.base, main_~user~0.offset, 4);call write~int(main_~i~0 * main_~i~0, main_~user~0.base, 4 + main_~user~0.offset, 4); 2197#L757-124 havoc main_~_ha_hashv~0; 2196#L757-49 goto; 2183#L757-47 havoc main_~_hj_i~0;havoc main_~_hj_j~0;havoc main_~_hj_k~0;main_~_hj_key~0.base, main_~_hj_key~0.offset := main_~user~0.base, main_~user~0.offset;main_~_ha_hashv~0 := 4276993775;main_~_hj_j~0 := 2654435769;main_~_hj_i~0 := main_~_hj_j~0;main_~_hj_k~0 := 4; 2108#L757-8 assume !(main_~_hj_k~0 % 4294967296 >= 12); 2109#L757-9 main_~_ha_hashv~0 := 4 + main_~_ha_hashv~0;main_#t~switch21 := 11 == main_~_hj_k~0; 2154#L757-10 assume !main_#t~switch21; 2217#L757-12 main_#t~switch21 := main_#t~switch21 || 10 == main_~_hj_k~0; 2143#L757-13 assume !main_#t~switch21; 2106#L757-15 main_#t~switch21 := main_#t~switch21 || 9 == main_~_hj_k~0; 2107#L757-16 assume !main_#t~switch21; 2208#L757-18 main_#t~switch21 := main_#t~switch21 || 8 == main_~_hj_k~0; 2199#L757-19 assume !main_#t~switch21; 2133#L757-21 main_#t~switch21 := main_#t~switch21 || 7 == main_~_hj_k~0; 2134#L757-22 assume !main_#t~switch21; 2180#L757-24 main_#t~switch21 := main_#t~switch21 || 6 == main_~_hj_k~0; 2158#L757-25 assume !main_#t~switch21; 2159#L757-27 main_#t~switch21 := main_#t~switch21 || 5 == main_~_hj_k~0; 2216#L757-28 assume !main_#t~switch21; 2214#L757-30 main_#t~switch21 := main_#t~switch21 || 4 == main_~_hj_k~0; 2213#L757-31 assume main_#t~switch21;call main_#t~mem29 := read~int(main_~_hj_key~0.base, 3 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 16777216 * (main_#t~mem29 % 256);havoc main_#t~mem29; 2114#L757-33 main_#t~switch21 := main_#t~switch21 || 3 == main_~_hj_k~0; 2115#L757-34 assume main_#t~switch21;call main_#t~mem30 := read~int(main_~_hj_key~0.base, 2 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 65536 * (main_#t~mem30 % 256);havoc main_#t~mem30; 2179#L757-36 main_#t~switch21 := main_#t~switch21 || 2 == main_~_hj_k~0; 2169#L757-37 assume main_#t~switch21;call main_#t~mem31 := read~int(main_~_hj_key~0.base, 1 + main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + 256 * (main_#t~mem31 % 256);havoc main_#t~mem31; 2170#L757-39 main_#t~switch21 := main_#t~switch21 || 1 == main_~_hj_k~0; 2135#L757-40 assume main_#t~switch21;call main_#t~mem32 := read~int(main_~_hj_key~0.base, main_~_hj_key~0.offset, 1);main_~_hj_i~0 := main_~_hj_i~0 + main_#t~mem32 % 256;havoc main_#t~mem32; 2120#L757-42 havoc main_#t~switch21; 2121#L757-45 main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8192);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 256 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 8192);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 4096);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 65536 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32);main_~_hj_i~0 := main_~_hj_i~0 - main_~_hj_j~0;main_~_hj_i~0 := main_~_hj_i~0 - main_~_ha_hashv~0;main_~_hj_i~0 := ~bitwiseXor(main_~_hj_i~0, main_~_ha_hashv~0 / 8);main_~_hj_j~0 := main_~_hj_j~0 - main_~_ha_hashv~0;main_~_hj_j~0 := main_~_hj_j~0 - main_~_hj_i~0;main_~_hj_j~0 := ~bitwiseXor(main_~_hj_j~0, 1024 * main_~_hj_i~0);main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_i~0;main_~_ha_hashv~0 := main_~_ha_hashv~0 - main_~_hj_j~0;main_~_ha_hashv~0 := ~bitwiseXor(main_~_ha_hashv~0, main_~_hj_j~0 / 32768); 2164#L757-44 goto; 2201#L757-46 goto; 2202#L757-48 goto; 2165#L757-122 call write~int(main_~_ha_hashv~0, main_~user~0.base, 36 + main_~user~0.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_~user~0.base, 28 + main_~user~0.offset, 4);call write~int(4, main_~user~0.base, 32 + main_~user~0.offset, 4); 2166#L757-51 assume !(main_~users~0.base == 0 && main_~users~0.offset == 0);call main_#t~mem50.base, main_#t~mem50.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_#t~mem50.base, main_#t~mem50.offset, main_~user~0.base, 8 + main_~user~0.offset, 4);havoc main_#t~mem50.base, main_#t~mem50.offset; 2205#L757-67 call write~$Pointer$(0, 0, main_~user~0.base, 16 + main_~user~0.offset, 4);call main_#t~mem51.base, main_#t~mem51.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem52.base, main_#t~mem52.offset := read~$Pointer$(main_#t~mem51.base, 16 + main_#t~mem51.offset, 4);call main_#t~mem53.base, main_#t~mem53.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem54 := read~int(main_#t~mem53.base, 20 + main_#t~mem53.offset, 4);call write~$Pointer$(main_#t~mem52.base, main_#t~mem52.offset - main_#t~mem54, main_~user~0.base, 12 + main_~user~0.offset, 4);havoc main_#t~mem51.base, main_#t~mem51.offset;havoc main_#t~mem52.base, main_#t~mem52.offset;havoc main_#t~mem53.base, main_#t~mem53.offset;havoc main_#t~mem54;call main_#t~mem55.base, main_#t~mem55.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem56.base, main_#t~mem56.offset := read~$Pointer$(main_#t~mem55.base, 16 + main_#t~mem55.offset, 4);call write~$Pointer$(main_~user~0.base, main_~user~0.offset, main_#t~mem56.base, 8 + main_#t~mem56.offset, 4);havoc main_#t~mem55.base, main_#t~mem55.offset;havoc main_#t~mem56.base, main_#t~mem56.offset;call main_#t~mem57.base, main_#t~mem57.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem57.base, 16 + main_#t~mem57.offset, 4);havoc main_#t~mem57.base, main_#t~mem57.offset; 2206#L757-66 goto; 2137#L757-120 havoc main_~_ha_bkt~0;call main_#t~mem58.base, main_#t~mem58.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem59 := read~int(main_#t~mem58.base, 12 + main_#t~mem58.offset, 4);main_#t~post60 := main_#t~mem59;call write~int(1 + main_#t~post60, main_#t~mem58.base, 12 + main_#t~mem58.offset, 4);havoc main_#t~mem58.base, main_#t~mem58.offset;havoc main_#t~mem59;havoc main_#t~post60; 2181#L757-71 call main_#t~mem61.base, main_#t~mem61.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem62 := read~int(main_#t~mem61.base, 4 + main_#t~mem61.offset, 4);main_~_ha_bkt~0 := ~bitwiseAnd(main_~_ha_hashv~0, main_#t~mem62 - 1);havoc main_#t~mem61.base, main_#t~mem61.offset;havoc main_#t~mem62; 2182#L757-70 goto; 2193#L757-118 call main_#t~mem63.base, main_#t~mem63.offset := read~$Pointer$(main_~users~0.base, 8 + main_~users~0.offset, 4);call main_#t~mem64.base, main_#t~mem64.offset := read~$Pointer$(main_#t~mem63.base, main_#t~mem63.offset, 4);main_~_ha_head~0.base, main_~_ha_head~0.offset := main_#t~mem64.base, main_#t~mem64.offset + 12 * (if main_~_ha_bkt~0 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0 % 4294967296 % 4294967296 else main_~_ha_bkt~0 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem63.base, main_#t~mem63.offset;havoc main_#t~mem64.base, main_#t~mem64.offset;call main_#t~mem65 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);main_#t~post66 := main_#t~mem65;call write~int(1 + main_#t~post66, main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);havoc main_#t~mem65;havoc main_#t~post66;call main_#t~mem67.base, main_#t~mem67.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_#t~mem67.base, main_#t~mem67.offset, main_~user~0.base, 24 + main_~user~0.offset, 4);havoc main_#t~mem67.base, main_#t~mem67.offset;call write~$Pointer$(0, 0, main_~user~0.base, 20 + main_~user~0.offset, 4);call main_#t~mem68.base, main_#t~mem68.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4); 2198#L757-73 assume main_#t~mem68.base != 0 || main_#t~mem68.offset != 0;havoc main_#t~mem68.base, main_#t~mem68.offset;call main_#t~mem69.base, main_#t~mem69.offset := read~$Pointer$(main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_#t~mem69.base, 12 + main_#t~mem69.offset, 4);havoc main_#t~mem69.base, main_#t~mem69.offset; 2150#L757-75 call write~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, main_~_ha_head~0.base, main_~_ha_head~0.offset, 4);call main_#t~mem71 := read~int(main_~_ha_head~0.base, 4 + main_~_ha_head~0.offset, 4);call main_#t~mem70 := read~int(main_~_ha_head~0.base, 8 + main_~_ha_head~0.offset, 4);main_#t~short74 := main_#t~mem71 % 4294967296 >= 10 * (1 + main_#t~mem70) % 4294967296; 2151#L757-76 assume main_#t~short74;call main_#t~mem72.base, main_#t~mem72.offset := read~$Pointer$(main_~user~0.base, 8 + main_~user~0.offset, 4);call main_#t~mem73 := read~int(main_#t~mem72.base, 36 + main_#t~mem72.offset, 4);main_#t~short74 := 0 == main_#t~mem73 % 4294967296; 2209#L757-78 assume !main_#t~short74;havoc main_#t~mem71;havoc main_#t~mem70;havoc main_#t~mem72.base, main_#t~mem72.offset;havoc main_#t~mem73;havoc main_#t~short74; 2139#L757-117 goto; 2140#L757-119 goto; 2145#L757-121 goto; 2146#L757-123 goto; 2174#L750-2 main_#t~post7 := main_~i~0;main_~i~0 := 1 + main_#t~post7;havoc main_#t~post7; 2168#L750-3 [2021-11-09 08:45:08,483 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 08:45:08,483 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 6 times [2021-11-09 08:45:08,483 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 08:45:08,483 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [935378813] [2021-11-09 08:45:08,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:45:08,484 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 08:45:08,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 08:45:08,515 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-09 08:45:08,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-09 08:45:08,532 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-09 08:45:08,534 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-09 08:45:08,534 INFO L85 PathProgramCache]: Analyzing trace with hash -875179227, now seen corresponding path program 1 times [2021-11-09 08:45:08,534 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-09 08:45:08,539 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1579429807] [2021-11-09 08:45:08,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:45:08,540 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-09 08:45:08,548 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-09 08:45:08,548 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [577410865] [2021-11-09 08:45:08,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-09 08:45:08,549 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-09 08:45:08,549 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/z3 [2021-11-09 08:45:08,550 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-09 08:45:08,571 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_0fdc5ad7-a985-49d5-b6b6-2a1b9dd9a962/bin/uautomizer-IVEQpCNsaX/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process