./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 63182f13 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4a058bd9944921e52018f99044f11f694f824f3f09daf510330544b4558ba193 --- Real Ultimate output --- This is Ultimate 0.2.1-dev-63182f1 [2021-11-13 18:45:59,440 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-13 18:45:59,443 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-13 18:45:59,492 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-13 18:45:59,492 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-13 18:45:59,494 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-13 18:45:59,496 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-13 18:45:59,498 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-13 18:45:59,500 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-13 18:45:59,502 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-13 18:45:59,503 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-13 18:45:59,505 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-13 18:45:59,506 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-13 18:45:59,507 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-13 18:45:59,509 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-13 18:45:59,510 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-13 18:45:59,512 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-13 18:45:59,513 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-13 18:45:59,515 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-13 18:45:59,518 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-13 18:45:59,520 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-13 18:45:59,521 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-13 18:45:59,523 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-13 18:45:59,524 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-13 18:45:59,528 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-13 18:45:59,529 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-13 18:45:59,529 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-13 18:45:59,530 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-13 18:45:59,531 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-13 18:45:59,532 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-13 18:45:59,533 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-13 18:45:59,534 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-13 18:45:59,535 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-13 18:45:59,536 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-13 18:45:59,538 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-13 18:45:59,538 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-13 18:45:59,540 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-13 18:45:59,540 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-13 18:45:59,540 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-13 18:45:59,542 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-13 18:45:59,543 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-13 18:45:59,544 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-11-13 18:45:59,567 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-13 18:45:59,567 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-13 18:45:59,567 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-13 18:45:59,568 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-13 18:45:59,569 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-13 18:45:59,569 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-13 18:45:59,569 INFO L138 SettingsManager]: * Use SBE=true [2021-11-13 18:45:59,570 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-11-13 18:45:59,570 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-11-13 18:45:59,570 INFO L138 SettingsManager]: * Use old map elimination=false [2021-11-13 18:45:59,570 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-11-13 18:45:59,570 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-11-13 18:45:59,571 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-11-13 18:45:59,571 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-13 18:45:59,571 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-13 18:45:59,571 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-11-13 18:45:59,571 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-13 18:45:59,572 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-13 18:45:59,572 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-13 18:45:59,572 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-11-13 18:45:59,572 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-11-13 18:45:59,572 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-11-13 18:45:59,573 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-13 18:45:59,573 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-13 18:45:59,573 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-11-13 18:45:59,573 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-13 18:45:59,573 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-11-13 18:45:59,574 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-13 18:45:59,574 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-13 18:45:59,574 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-13 18:45:59,574 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-13 18:45:59,574 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-13 18:45:59,575 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-11-13 18:45:59,576 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4a058bd9944921e52018f99044f11f694f824f3f09daf510330544b4558ba193 [2021-11-13 18:45:59,873 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-13 18:45:59,917 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-13 18:45:59,920 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-13 18:45:59,921 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-13 18:45:59,923 INFO L275 PluginConnector]: CDTParser initialized [2021-11-13 18:45:59,924 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/../../sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i [2021-11-13 18:46:00,001 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/data/422e841c2/adef6c15cf794c39b012c06ce80ac7e9/FLAG4c12e0a84 [2021-11-13 18:46:00,687 INFO L306 CDTParser]: Found 1 translation units. [2021-11-13 18:46:00,687 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i [2021-11-13 18:46:00,718 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/data/422e841c2/adef6c15cf794c39b012c06ce80ac7e9/FLAG4c12e0a84 [2021-11-13 18:46:00,884 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/data/422e841c2/adef6c15cf794c39b012c06ce80ac7e9 [2021-11-13 18:46:00,887 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-13 18:46:00,889 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-13 18:46:00,891 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-13 18:46:00,891 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-13 18:46:00,901 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-13 18:46:00,902 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 06:46:00" (1/1) ... [2021-11-13 18:46:00,904 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@780bb01d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:46:00, skipping insertion in model container [2021-11-13 18:46:00,904 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 06:46:00" (1/1) ... [2021-11-13 18:46:00,915 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-13 18:46:01,022 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-13 18:46:01,713 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i[44118,44131] [2021-11-13 18:46:01,725 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i[44660,44673] [2021-11-13 18:46:01,833 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i[56247,56260] [2021-11-13 18:46:01,834 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i[56368,56381] [2021-11-13 18:46:01,854 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-13 18:46:01,865 INFO L203 MainTranslator]: Completed pre-run [2021-11-13 18:46:01,919 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i[44118,44131] [2021-11-13 18:46:01,923 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i[44660,44673] [2021-11-13 18:46:02,028 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i[56247,56260] [2021-11-13 18:46:02,029 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/sv-benchmarks/c/uthash-2.0.2/uthash_JEN_test6-2.i[56368,56381] [2021-11-13 18:46:02,040 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-13 18:46:02,107 INFO L208 MainTranslator]: Completed translation [2021-11-13 18:46:02,107 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:46:02 WrapperNode [2021-11-13 18:46:02,108 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-13 18:46:02,109 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-13 18:46:02,109 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-13 18:46:02,109 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-13 18:46:02,118 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:46:02" (1/1) ... [2021-11-13 18:46:02,156 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:46:02" (1/1) ... [2021-11-13 18:46:02,239 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-13 18:46:02,240 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-13 18:46:02,240 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-13 18:46:02,240 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-13 18:46:02,252 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:46:02" (1/1) ... [2021-11-13 18:46:02,261 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:46:02" (1/1) ... [2021-11-13 18:46:02,273 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:46:02" (1/1) ... [2021-11-13 18:46:02,281 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:46:02" (1/1) ... [2021-11-13 18:46:02,367 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:46:02" (1/1) ... [2021-11-13 18:46:02,382 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:46:02" (1/1) ... [2021-11-13 18:46:02,398 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:46:02" (1/1) ... [2021-11-13 18:46:02,420 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-13 18:46:02,421 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-13 18:46:02,422 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-13 18:46:02,422 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-13 18:46:02,424 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:46:02" (1/1) ... [2021-11-13 18:46:02,434 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-13 18:46:02,446 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/z3 [2021-11-13 18:46:02,465 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-13 18:46:02,482 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-11-13 18:46:02,513 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2021-11-13 18:46:02,513 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2021-11-13 18:46:02,514 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-13 18:46:02,514 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2021-11-13 18:46:02,514 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-11-13 18:46:02,514 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-13 18:46:02,514 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-11-13 18:46:02,514 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-13 18:46:02,514 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-11-13 18:46:02,515 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-11-13 18:46:02,515 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-13 18:46:02,515 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-13 18:46:02,515 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-13 18:46:02,916 WARN L813 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-11-13 18:46:04,362 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-13 18:46:04,362 INFO L299 CfgBuilder]: Removed 72 assume(true) statements. [2021-11-13 18:46:04,366 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 06:46:04 BoogieIcfgContainer [2021-11-13 18:46:04,366 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-13 18:46:04,370 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-11-13 18:46:04,370 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-11-13 18:46:04,375 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-11-13 18:46:04,376 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-13 18:46:04,376 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 13.11 06:46:00" (1/3) ... [2021-11-13 18:46:04,378 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@60855da5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.11 06:46:04, skipping insertion in model container [2021-11-13 18:46:04,378 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-13 18:46:04,378 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:46:02" (2/3) ... [2021-11-13 18:46:04,381 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@60855da5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.11 06:46:04, skipping insertion in model container [2021-11-13 18:46:04,381 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-13 18:46:04,382 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 06:46:04" (3/3) ... [2021-11-13 18:46:04,387 INFO L388 chiAutomizerObserver]: Analyzing ICFG uthash_JEN_test6-2.i [2021-11-13 18:46:04,456 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-11-13 18:46:04,456 INFO L360 BuchiCegarLoop]: Hoare is false [2021-11-13 18:46:04,456 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-11-13 18:46:04,457 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-11-13 18:46:04,457 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-11-13 18:46:04,457 INFO L364 BuchiCegarLoop]: Difference is false [2021-11-13 18:46:04,457 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-11-13 18:46:04,457 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-11-13 18:46:04,502 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 257 states, 252 states have (on average 1.626984126984127) internal successors, (410), 252 states have internal predecessors, (410), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-13 18:46:04,555 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 236 [2021-11-13 18:46:04,555 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-13 18:46:04,555 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-13 18:46:04,564 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-13 18:46:04,565 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2021-11-13 18:46:04,565 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-11-13 18:46:04,566 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 257 states, 252 states have (on average 1.626984126984127) internal successors, (410), 252 states have internal predecessors, (410), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-13 18:46:04,584 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 236 [2021-11-13 18:46:04,585 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-13 18:46:04,585 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-13 18:46:04,586 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-13 18:46:04,586 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2021-11-13 18:46:04,594 INFO L791 eck$LassoCheckResult]: Stem: 251#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string30.base, #t~string30.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string30.base, #t~string30.offset, 1);call write~init~int(0, #t~string30.base, 1 + #t~string30.offset, 1);call #t~string31.base, #t~string31.offset := #Ultimate.allocOnStack(21);call ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := #Ultimate.allocOnStack(40);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 161#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret45#1.base, main_#t~ret45#1.offset, main_#t~mem46#1, main_#t~mem47#1, main_#t~mem48#1, main_#t~mem50#1, main_#t~mem49#1, main_#t~mem51#1, main_#t~mem52#1, main_#t~mem54#1, main_#t~mem53#1, main_#t~mem55#1, main_#t~mem56#1, main_#t~mem58#1, main_#t~mem57#1, main_#t~mem59#1, main_#t~mem60#1, main_#t~switch61#1, main_#t~mem62#1, main_#t~mem63#1, main_#t~mem64#1, main_#t~mem65#1, main_#t~mem66#1, main_#t~mem67#1, main_#t~mem68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret73#1.base, main_#t~ret73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~ret81#1.base, main_#t~ret81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~post98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~post104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem109#1, main_#t~mem108#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~short112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~ret115#1.base, main_#t~ret115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem128#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~ite129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem140#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~pre143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~post148#1, main_#t~mem152#1, main_#t~mem150#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem151#1, main_#t~mem153#1, main_#t~post154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1, main_#t~post166#1, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem173#1, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~ite176#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem42#1, main_#t~post43#1, main_#t~mem44#1, main_#t~mem184#1, main_#t~mem183#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem188#1, main_#t~mem187#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem192#1, main_#t~mem191#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~switch195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem200#1, main_#t~mem201#1, main_#t~mem202#1, main_#t~mem203#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem206#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1, main_#t~mem217#1, main_#t~mem218#1, main_#t~short219#1, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~ret221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~short228#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1, main_#t~post257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1, main_#t~post268#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem180#1, main_#t~post181#1, main_#t~mem182#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~ite271#1.base, main_#t~ite271#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~short276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem301#1, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite273#1.base, main_#t~ite273#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 11#L989-4true [2021-11-13 18:46:04,596 INFO L793 eck$LassoCheckResult]: Loop: 11#L989-4true call main_#t~mem44#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5#L989-1true assume !!(main_#t~mem44#1 < 10);havoc main_#t~mem44#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc41#1.base, real_malloc_#t~malloc41#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc41#1.base, real_malloc_#t~malloc41#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc41#1.base, real_malloc_#t~malloc41#1.offset;havoc real_malloc_#t~malloc41#1.base, real_malloc_#t~malloc41#1.offset; 98#L979true main_#t~ret45#1.base, main_#t~ret45#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret45#1.base, main_#t~ret45#1.offset;havoc main_#t~ret45#1.base, main_#t~ret45#1.offset; 12#L991true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 91#L991-2true call main_#t~mem46#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem46#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem46#1;call main_#t~mem47#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem48#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem47#1 * main_#t~mem48#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem47#1;havoc main_#t~mem48#1; 239#L996-118true assume !true; 236#L989-3true call main_#t~mem42#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post43#1 := main_#t~mem42#1;call write~int(1 + main_#t~post43#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem42#1;havoc main_#t~post43#1; 11#L989-4true [2021-11-13 18:46:04,602 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:46:04,603 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2021-11-13 18:46:04,614 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:46:04,615 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [649367713] [2021-11-13 18:46:04,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:46:04,616 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:46:04,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:46:04,762 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-13 18:46:04,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:46:04,870 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-13 18:46:04,873 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:46:04,873 INFO L85 PathProgramCache]: Analyzing trace with hash -1530816074, now seen corresponding path program 1 times [2021-11-13 18:46:04,873 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:46:04,875 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1088352258] [2021-11-13 18:46:04,875 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:46:04,876 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:46:04,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-13 18:46:05,007 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-13 18:46:05,008 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-13 18:46:05,008 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1088352258] [2021-11-13 18:46:05,009 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1088352258] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-13 18:46:05,009 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-13 18:46:05,009 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-13 18:46:05,010 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2041860004] [2021-11-13 18:46:05,011 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-13 18:46:05,017 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-13 18:46:05,018 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-13 18:46:05,061 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-11-13 18:46:05,062 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-11-13 18:46:05,067 INFO L87 Difference]: Start difference. First operand has 257 states, 252 states have (on average 1.626984126984127) internal successors, (410), 252 states have internal predecessors, (410), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-13 18:46:05,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-13 18:46:05,114 INFO L93 Difference]: Finished difference Result 253 states and 322 transitions. [2021-11-13 18:46:05,115 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-11-13 18:46:05,120 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 253 states and 322 transitions. [2021-11-13 18:46:05,129 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 231 [2021-11-13 18:46:05,138 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 253 states to 249 states and 318 transitions. [2021-11-13 18:46:05,140 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 249 [2021-11-13 18:46:05,141 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 249 [2021-11-13 18:46:05,142 INFO L73 IsDeterministic]: Start isDeterministic. Operand 249 states and 318 transitions. [2021-11-13 18:46:05,145 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-13 18:46:05,146 INFO L681 BuchiCegarLoop]: Abstraction has 249 states and 318 transitions. [2021-11-13 18:46:05,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 249 states and 318 transitions. [2021-11-13 18:46:05,191 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 249 to 249. [2021-11-13 18:46:05,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 249 states, 245 states have (on average 1.273469387755102) internal successors, (312), 244 states have internal predecessors, (312), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-13 18:46:05,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 249 states to 249 states and 318 transitions. [2021-11-13 18:46:05,201 INFO L704 BuchiCegarLoop]: Abstraction has 249 states and 318 transitions. [2021-11-13 18:46:05,202 INFO L587 BuchiCegarLoop]: Abstraction has 249 states and 318 transitions. [2021-11-13 18:46:05,202 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-11-13 18:46:05,203 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 249 states and 318 transitions. [2021-11-13 18:46:05,208 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 231 [2021-11-13 18:46:05,209 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-13 18:46:05,209 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-13 18:46:05,213 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-13 18:46:05,214 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-13 18:46:05,214 INFO L791 eck$LassoCheckResult]: Stem: 766#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string30.base, #t~string30.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string30.base, #t~string30.offset, 1);call write~init~int(0, #t~string30.base, 1 + #t~string30.offset, 1);call #t~string31.base, #t~string31.offset := #Ultimate.allocOnStack(21);call ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := #Ultimate.allocOnStack(40);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 736#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret45#1.base, main_#t~ret45#1.offset, main_#t~mem46#1, main_#t~mem47#1, main_#t~mem48#1, main_#t~mem50#1, main_#t~mem49#1, main_#t~mem51#1, main_#t~mem52#1, main_#t~mem54#1, main_#t~mem53#1, main_#t~mem55#1, main_#t~mem56#1, main_#t~mem58#1, main_#t~mem57#1, main_#t~mem59#1, main_#t~mem60#1, main_#t~switch61#1, main_#t~mem62#1, main_#t~mem63#1, main_#t~mem64#1, main_#t~mem65#1, main_#t~mem66#1, main_#t~mem67#1, main_#t~mem68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret73#1.base, main_#t~ret73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~ret81#1.base, main_#t~ret81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~post98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~post104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem109#1, main_#t~mem108#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~short112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~ret115#1.base, main_#t~ret115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem128#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~ite129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem140#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~pre143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~post148#1, main_#t~mem152#1, main_#t~mem150#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem151#1, main_#t~mem153#1, main_#t~post154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1, main_#t~post166#1, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem173#1, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~ite176#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem42#1, main_#t~post43#1, main_#t~mem44#1, main_#t~mem184#1, main_#t~mem183#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem188#1, main_#t~mem187#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem192#1, main_#t~mem191#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~switch195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem200#1, main_#t~mem201#1, main_#t~mem202#1, main_#t~mem203#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem206#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1, main_#t~mem217#1, main_#t~mem218#1, main_#t~short219#1, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~ret221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~short228#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1, main_#t~post257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1, main_#t~post268#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem180#1, main_#t~post181#1, main_#t~mem182#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~ite271#1.base, main_#t~ite271#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~short276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem301#1, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite273#1.base, main_#t~ite273#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 533#L989-4 [2021-11-13 18:46:05,227 INFO L793 eck$LassoCheckResult]: Loop: 533#L989-4 call main_#t~mem44#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 522#L989-1 assume !!(main_#t~mem44#1 < 10);havoc main_#t~mem44#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc41#1.base, real_malloc_#t~malloc41#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc41#1.base, real_malloc_#t~malloc41#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc41#1.base, real_malloc_#t~malloc41#1.offset;havoc real_malloc_#t~malloc41#1.base, real_malloc_#t~malloc41#1.offset; 524#L979 main_#t~ret45#1.base, main_#t~ret45#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret45#1.base, main_#t~ret45#1.offset;havoc main_#t~ret45#1.base, main_#t~ret45#1.offset; 534#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 535#L991-2 call main_#t~mem46#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem46#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem46#1;call main_#t~mem47#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem48#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem47#1 * main_#t~mem48#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem47#1;havoc main_#t~mem48#1; 665#L996-118 havoc main_~_ha_hashv~0#1; 721#L996-49 goto; 722#L996-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 526#L996-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 558#L996-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch61#1 := 11 == main_~_hj_k~0#1; 757#L996-10 assume main_#t~switch61#1;call main_#t~mem62#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem62#1 % 256);havoc main_#t~mem62#1; 765#L996-12 main_#t~switch61#1 := main_#t~switch61#1 || 10 == main_~_hj_k~0#1; 635#L996-13 assume main_#t~switch61#1;call main_#t~mem63#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem63#1 % 256);havoc main_#t~mem63#1; 636#L996-15 main_#t~switch61#1 := main_#t~switch61#1 || 9 == main_~_hj_k~0#1; 760#L996-16 assume main_#t~switch61#1;call main_#t~mem64#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem64#1 % 256);havoc main_#t~mem64#1; 761#L996-18 main_#t~switch61#1 := main_#t~switch61#1 || 8 == main_~_hj_k~0#1; 748#L996-19 assume main_#t~switch61#1;call main_#t~mem65#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem65#1 % 256);havoc main_#t~mem65#1; 743#L996-21 main_#t~switch61#1 := main_#t~switch61#1 || 7 == main_~_hj_k~0#1; 718#L996-22 assume main_#t~switch61#1;call main_#t~mem66#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem66#1 % 256);havoc main_#t~mem66#1; 719#L996-24 main_#t~switch61#1 := main_#t~switch61#1 || 6 == main_~_hj_k~0#1; 739#L996-25 assume main_#t~switch61#1;call main_#t~mem67#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem67#1 % 256);havoc main_#t~mem67#1; 706#L996-27 main_#t~switch61#1 := main_#t~switch61#1 || 5 == main_~_hj_k~0#1; 527#L996-28 assume !main_#t~switch61#1; 528#L996-30 main_#t~switch61#1 := main_#t~switch61#1 || 4 == main_~_hj_k~0#1; 675#L996-31 assume main_#t~switch61#1;call main_#t~mem69#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem69#1 % 256);havoc main_#t~mem69#1; 696#L996-33 main_#t~switch61#1 := main_#t~switch61#1 || 3 == main_~_hj_k~0#1; 656#L996-34 assume main_#t~switch61#1;call main_#t~mem70#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem70#1 % 256);havoc main_#t~mem70#1; 657#L996-36 main_#t~switch61#1 := main_#t~switch61#1 || 2 == main_~_hj_k~0#1; 617#L996-37 assume main_#t~switch61#1;call main_#t~mem71#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem71#1 % 256);havoc main_#t~mem71#1; 618#L996-39 main_#t~switch61#1 := main_#t~switch61#1 || 1 == main_~_hj_k~0#1; 639#L996-40 assume main_#t~switch61#1;call main_#t~mem72#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem72#1 % 256;havoc main_#t~mem72#1; 676#L996-42 havoc main_#t~switch61#1; 586#L996-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768); 587#L996-44 goto; 691#L996-46 goto; 708#L996-48 goto; 746#L996-116 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 747#L996-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem88#1.base, main_#t~mem88#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 646#L996-63 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$(main_#t~mem89#1.base, 16 + main_#t~mem89#1.offset, 4);call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem92#1 := read~int(main_#t~mem91#1.base, 20 + main_#t~mem91#1.offset, 4);call write~$Pointer$(main_#t~mem90#1.base, main_#t~mem90#1.offset - main_#t~mem92#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1.base, main_#t~mem91#1.offset;havoc main_#t~mem92#1;call main_#t~mem93#1.base, main_#t~mem93#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$(main_#t~mem93#1.base, 16 + main_#t~mem93#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem94#1.base, 8 + main_#t~mem94#1.offset, 4);havoc main_#t~mem93#1.base, main_#t~mem93#1.offset;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;call main_#t~mem95#1.base, main_#t~mem95#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem95#1.base, 16 + main_#t~mem95#1.offset, 4);havoc main_#t~mem95#1.base, main_#t~mem95#1.offset; 647#L996-62 goto; 591#L996-114 havoc main_~_ha_bkt~0#1;call main_#t~mem96#1.base, main_#t~mem96#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem97#1 := read~int(main_#t~mem96#1.base, 12 + main_#t~mem96#1.offset, 4);main_#t~post98#1 := main_#t~mem97#1;call write~int(1 + main_#t~post98#1, main_#t~mem96#1.base, 12 + main_#t~mem96#1.offset, 4);havoc main_#t~mem96#1.base, main_#t~mem96#1.offset;havoc main_#t~mem97#1;havoc main_#t~post98#1; 634#L996-67 call main_#t~mem99#1.base, main_#t~mem99#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem100#1 := read~int(main_#t~mem99#1.base, 4 + main_#t~mem99#1.offset, 4);main_~_ha_bkt~0#1 := ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem100#1 - 1);havoc main_#t~mem99#1.base, main_#t~mem99#1.offset;havoc main_#t~mem100#1; 703#L996-66 goto; 753#L996-112 call main_#t~mem101#1.base, main_#t~mem101#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem102#1.base, main_#t~mem102#1.offset := read~$Pointer$(main_#t~mem101#1.base, main_#t~mem101#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem102#1.base, main_#t~mem102#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem101#1.base, main_#t~mem101#1.offset;havoc main_#t~mem102#1.base, main_#t~mem102#1.offset;call main_#t~mem103#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post104#1 := main_#t~mem103#1;call write~int(1 + main_#t~post104#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem103#1;havoc main_#t~post104#1;call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem105#1.base, main_#t~mem105#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 740#L996-69 assume main_#t~mem106#1.base != 0 || main_#t~mem106#1.offset != 0;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem107#1.base, 12 + main_#t~mem107#1.offset, 4);havoc main_#t~mem107#1.base, main_#t~mem107#1.offset; 559#L996-71 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem109#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem108#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short112#1 := main_#t~mem109#1 % 4294967296 >= 10 * (1 + main_#t~mem108#1) % 4294967296; 560#L996-72 assume main_#t~short112#1;call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem111#1 := read~int(main_#t~mem110#1.base, 36 + main_#t~mem110#1.offset, 4);main_#t~short112#1 := 0 == main_#t~mem111#1 % 4294967296; 622#L996-74 assume !main_#t~short112#1;havoc main_#t~mem109#1;havoc main_#t~mem108#1;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;havoc main_#t~mem111#1;havoc main_#t~short112#1; 577#L996-111 goto; 574#L996-113 goto; 575#L996-115 goto; 699#L996-117 goto; 700#L989-3 call main_#t~mem42#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post43#1 := main_#t~mem42#1;call write~int(1 + main_#t~post43#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem42#1;havoc main_#t~post43#1; 533#L989-4 [2021-11-13 18:46:05,228 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:46:05,228 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2021-11-13 18:46:05,229 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:46:05,232 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [829050034] [2021-11-13 18:46:05,233 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:46:05,234 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:46:05,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:46:05,290 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-13 18:46:05,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:46:05,324 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-13 18:46:05,325 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:46:05,326 INFO L85 PathProgramCache]: Analyzing trace with hash 1942584983, now seen corresponding path program 1 times [2021-11-13 18:46:05,326 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:46:05,326 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [419883369] [2021-11-13 18:46:05,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:46:05,327 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:46:05,349 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-13 18:46:05,350 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [934294137] [2021-11-13 18:46:05,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:46:05,352 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-13 18:46:05,352 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/z3 [2021-11-13 18:46:05,354 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-13 18:46:05,384 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-11-13 18:46:05,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-13 18:46:05,601 INFO L263 TraceCheckSpWp]: Trace formula consists of 316 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-13 18:46:05,605 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-13 18:46:05,823 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-13 18:46:05,824 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-11-13 18:46:05,824 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-13 18:46:05,824 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [419883369] [2021-11-13 18:46:05,825 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-13 18:46:05,825 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [934294137] [2021-11-13 18:46:05,825 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [934294137] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-13 18:46:05,825 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-13 18:46:05,826 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-13 18:46:05,826 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1171264292] [2021-11-13 18:46:05,826 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-13 18:46:05,828 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-13 18:46:05,829 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-13 18:46:05,829 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-13 18:46:05,830 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-13 18:46:05,830 INFO L87 Difference]: Start difference. First operand 249 states and 318 transitions. cyclomatic complexity: 73 Second operand has 3 states, 3 states have (on average 17.666666666666668) internal successors, (53), 3 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-13 18:46:05,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-13 18:46:05,979 INFO L93 Difference]: Finished difference Result 270 states and 339 transitions. [2021-11-13 18:46:05,979 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-13 18:46:05,980 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 270 states and 339 transitions. [2021-11-13 18:46:05,984 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 252 [2021-11-13 18:46:06,024 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 270 states to 270 states and 339 transitions. [2021-11-13 18:46:06,024 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 270 [2021-11-13 18:46:06,025 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 270 [2021-11-13 18:46:06,025 INFO L73 IsDeterministic]: Start isDeterministic. Operand 270 states and 339 transitions. [2021-11-13 18:46:06,027 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-13 18:46:06,027 INFO L681 BuchiCegarLoop]: Abstraction has 270 states and 339 transitions. [2021-11-13 18:46:06,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 270 states and 339 transitions. [2021-11-13 18:46:06,047 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 270 to 269. [2021-11-13 18:46:06,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 269 states, 265 states have (on average 1.2528301886792452) internal successors, (332), 264 states have internal predecessors, (332), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-13 18:46:06,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 269 states to 269 states and 338 transitions. [2021-11-13 18:46:06,050 INFO L704 BuchiCegarLoop]: Abstraction has 269 states and 338 transitions. [2021-11-13 18:46:06,050 INFO L587 BuchiCegarLoop]: Abstraction has 269 states and 338 transitions. [2021-11-13 18:46:06,050 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-11-13 18:46:06,051 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 269 states and 338 transitions. [2021-11-13 18:46:06,052 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 251 [2021-11-13 18:46:06,053 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-13 18:46:06,053 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-13 18:46:06,054 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-13 18:46:06,054 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-13 18:46:06,054 INFO L791 eck$LassoCheckResult]: Stem: 1450#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string30.base, #t~string30.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string30.base, #t~string30.offset, 1);call write~init~int(0, #t~string30.base, 1 + #t~string30.offset, 1);call #t~string31.base, #t~string31.offset := #Ultimate.allocOnStack(21);call ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := #Ultimate.allocOnStack(40);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 1417#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret45#1.base, main_#t~ret45#1.offset, main_#t~mem46#1, main_#t~mem47#1, main_#t~mem48#1, main_#t~mem50#1, main_#t~mem49#1, main_#t~mem51#1, main_#t~mem52#1, main_#t~mem54#1, main_#t~mem53#1, main_#t~mem55#1, main_#t~mem56#1, main_#t~mem58#1, main_#t~mem57#1, main_#t~mem59#1, main_#t~mem60#1, main_#t~switch61#1, main_#t~mem62#1, main_#t~mem63#1, main_#t~mem64#1, main_#t~mem65#1, main_#t~mem66#1, main_#t~mem67#1, main_#t~mem68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret73#1.base, main_#t~ret73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~ret81#1.base, main_#t~ret81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~post98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~post104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem109#1, main_#t~mem108#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~short112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~ret115#1.base, main_#t~ret115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem128#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~ite129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem140#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~pre143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~post148#1, main_#t~mem152#1, main_#t~mem150#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem151#1, main_#t~mem153#1, main_#t~post154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1, main_#t~post166#1, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem173#1, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~ite176#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem42#1, main_#t~post43#1, main_#t~mem44#1, main_#t~mem184#1, main_#t~mem183#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem188#1, main_#t~mem187#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem192#1, main_#t~mem191#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~switch195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem200#1, main_#t~mem201#1, main_#t~mem202#1, main_#t~mem203#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem206#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1, main_#t~mem217#1, main_#t~mem218#1, main_#t~short219#1, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~ret221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~short228#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1, main_#t~post257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1, main_#t~post268#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem180#1, main_#t~post181#1, main_#t~mem182#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~ite271#1.base, main_#t~ite271#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~short276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem301#1, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite273#1.base, main_#t~ite273#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1214#L989-4 [2021-11-13 18:46:06,055 INFO L793 eck$LassoCheckResult]: Loop: 1214#L989-4 call main_#t~mem44#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1203#L989-1 assume !!(main_#t~mem44#1 < 10);havoc main_#t~mem44#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc41#1.base, real_malloc_#t~malloc41#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc41#1.base, real_malloc_#t~malloc41#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc41#1.base, real_malloc_#t~malloc41#1.offset;havoc real_malloc_#t~malloc41#1.base, real_malloc_#t~malloc41#1.offset; 1205#L979 main_#t~ret45#1.base, main_#t~ret45#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret45#1.base, main_#t~ret45#1.offset;havoc main_#t~ret45#1.base, main_#t~ret45#1.offset; 1215#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1216#L991-2 call main_#t~mem46#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem46#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem46#1;call main_#t~mem47#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem48#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem47#1 * main_#t~mem48#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem47#1;havoc main_#t~mem48#1; 1346#L996-118 havoc main_~_ha_hashv~0#1; 1402#L996-49 goto; 1403#L996-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1207#L996-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1241#L996-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch61#1 := 11 == main_~_hj_k~0#1; 1440#L996-10 assume main_#t~switch61#1;call main_#t~mem62#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem62#1 % 256);havoc main_#t~mem62#1; 1448#L996-12 main_#t~switch61#1 := main_#t~switch61#1 || 10 == main_~_hj_k~0#1; 1316#L996-13 assume main_#t~switch61#1;call main_#t~mem63#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem63#1 % 256);havoc main_#t~mem63#1; 1317#L996-15 main_#t~switch61#1 := main_#t~switch61#1 || 9 == main_~_hj_k~0#1; 1443#L996-16 assume main_#t~switch61#1;call main_#t~mem64#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem64#1 % 256);havoc main_#t~mem64#1; 1444#L996-18 main_#t~switch61#1 := main_#t~switch61#1 || 8 == main_~_hj_k~0#1; 1430#L996-19 assume main_#t~switch61#1;call main_#t~mem65#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem65#1 % 256);havoc main_#t~mem65#1; 1431#L996-21 main_#t~switch61#1 := main_#t~switch61#1 || 7 == main_~_hj_k~0#1; 1399#L996-22 assume main_#t~switch61#1;call main_#t~mem66#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem66#1 % 256);havoc main_#t~mem66#1; 1400#L996-24 main_#t~switch61#1 := main_#t~switch61#1 || 6 == main_~_hj_k~0#1; 1420#L996-25 assume main_#t~switch61#1;call main_#t~mem67#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem67#1 % 256);havoc main_#t~mem67#1; 1389#L996-27 main_#t~switch61#1 := main_#t~switch61#1 || 5 == main_~_hj_k~0#1; 1208#L996-28 assume main_#t~switch61#1;call main_#t~mem68#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem68#1 % 256;havoc main_#t~mem68#1; 1209#L996-30 main_#t~switch61#1 := main_#t~switch61#1 || 4 == main_~_hj_k~0#1; 1357#L996-31 assume main_#t~switch61#1;call main_#t~mem69#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem69#1 % 256);havoc main_#t~mem69#1; 1376#L996-33 main_#t~switch61#1 := main_#t~switch61#1 || 3 == main_~_hj_k~0#1; 1337#L996-34 assume main_#t~switch61#1;call main_#t~mem70#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem70#1 % 256);havoc main_#t~mem70#1; 1338#L996-36 main_#t~switch61#1 := main_#t~switch61#1 || 2 == main_~_hj_k~0#1; 1298#L996-37 assume main_#t~switch61#1;call main_#t~mem71#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem71#1 % 256);havoc main_#t~mem71#1; 1299#L996-39 main_#t~switch61#1 := main_#t~switch61#1 || 1 == main_~_hj_k~0#1; 1320#L996-40 assume main_#t~switch61#1;call main_#t~mem72#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem72#1 % 256;havoc main_#t~mem72#1; 1356#L996-42 havoc main_#t~switch61#1; 1267#L996-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768); 1268#L996-44 goto; 1372#L996-46 goto; 1388#L996-48 goto; 1428#L996-116 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1429#L996-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem88#1.base, main_#t~mem88#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 1324#L996-63 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$(main_#t~mem89#1.base, 16 + main_#t~mem89#1.offset, 4);call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem92#1 := read~int(main_#t~mem91#1.base, 20 + main_#t~mem91#1.offset, 4);call write~$Pointer$(main_#t~mem90#1.base, main_#t~mem90#1.offset - main_#t~mem92#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1.base, main_#t~mem91#1.offset;havoc main_#t~mem92#1;call main_#t~mem93#1.base, main_#t~mem93#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$(main_#t~mem93#1.base, 16 + main_#t~mem93#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem94#1.base, 8 + main_#t~mem94#1.offset, 4);havoc main_#t~mem93#1.base, main_#t~mem93#1.offset;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;call main_#t~mem95#1.base, main_#t~mem95#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem95#1.base, 16 + main_#t~mem95#1.offset, 4);havoc main_#t~mem95#1.base, main_#t~mem95#1.offset; 1325#L996-62 goto; 1272#L996-114 havoc main_~_ha_bkt~0#1;call main_#t~mem96#1.base, main_#t~mem96#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem97#1 := read~int(main_#t~mem96#1.base, 12 + main_#t~mem96#1.offset, 4);main_#t~post98#1 := main_#t~mem97#1;call write~int(1 + main_#t~post98#1, main_#t~mem96#1.base, 12 + main_#t~mem96#1.offset, 4);havoc main_#t~mem96#1.base, main_#t~mem96#1.offset;havoc main_#t~mem97#1;havoc main_#t~post98#1; 1313#L996-67 call main_#t~mem99#1.base, main_#t~mem99#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem100#1 := read~int(main_#t~mem99#1.base, 4 + main_#t~mem99#1.offset, 4);main_~_ha_bkt~0#1 := ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem100#1 - 1);havoc main_#t~mem99#1.base, main_#t~mem99#1.offset;havoc main_#t~mem100#1; 1383#L996-66 goto; 1434#L996-112 call main_#t~mem101#1.base, main_#t~mem101#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem102#1.base, main_#t~mem102#1.offset := read~$Pointer$(main_#t~mem101#1.base, main_#t~mem101#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem102#1.base, main_#t~mem102#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem101#1.base, main_#t~mem101#1.offset;havoc main_#t~mem102#1.base, main_#t~mem102#1.offset;call main_#t~mem103#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post104#1 := main_#t~mem103#1;call write~int(1 + main_#t~post104#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem103#1;havoc main_#t~post104#1;call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem105#1.base, main_#t~mem105#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1421#L996-69 assume main_#t~mem106#1.base != 0 || main_#t~mem106#1.offset != 0;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem107#1.base, 12 + main_#t~mem107#1.offset, 4);havoc main_#t~mem107#1.base, main_#t~mem107#1.offset; 1238#L996-71 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem109#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem108#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short112#1 := main_#t~mem109#1 % 4294967296 >= 10 * (1 + main_#t~mem108#1) % 4294967296; 1239#L996-72 assume main_#t~short112#1;call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem111#1 := read~int(main_#t~mem110#1.base, 36 + main_#t~mem110#1.offset, 4);main_#t~short112#1 := 0 == main_#t~mem111#1 % 4294967296; 1303#L996-74 assume !main_#t~short112#1;havoc main_#t~mem109#1;havoc main_#t~mem108#1;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;havoc main_#t~mem111#1;havoc main_#t~short112#1; 1258#L996-111 goto; 1255#L996-113 goto; 1256#L996-115 goto; 1378#L996-117 goto; 1379#L989-3 call main_#t~mem42#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post43#1 := main_#t~mem42#1;call write~int(1 + main_#t~post43#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem42#1;havoc main_#t~post43#1; 1214#L989-4 [2021-11-13 18:46:06,055 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:46:06,056 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2021-11-13 18:46:06,056 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:46:06,056 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [277453634] [2021-11-13 18:46:06,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:46:06,057 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:46:06,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:46:06,076 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-13 18:46:06,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:46:06,104 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-13 18:46:06,105 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:46:06,105 INFO L85 PathProgramCache]: Analyzing trace with hash 1240985109, now seen corresponding path program 1 times [2021-11-13 18:46:06,106 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:46:06,106 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1340897349] [2021-11-13 18:46:06,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:46:06,106 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:46:06,119 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-13 18:46:06,119 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [552151659] [2021-11-13 18:46:06,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:46:06,120 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-13 18:46:06,120 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/z3 [2021-11-13 18:46:06,122 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-13 18:46:06,129 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-11-13 18:46:06,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-13 18:46:06,300 INFO L263 TraceCheckSpWp]: Trace formula consists of 322 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-13 18:46:06,303 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-13 18:46:06,459 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-13 18:46:06,459 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-11-13 18:46:06,459 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-13 18:46:06,460 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1340897349] [2021-11-13 18:46:06,460 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-13 18:46:06,460 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [552151659] [2021-11-13 18:46:06,460 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [552151659] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-13 18:46:06,461 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-13 18:46:06,461 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-13 18:46:06,461 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [227997987] [2021-11-13 18:46:06,461 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-13 18:46:06,462 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-13 18:46:06,462 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-13 18:46:06,462 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-13 18:46:06,462 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-13 18:46:06,463 INFO L87 Difference]: Start difference. First operand 269 states and 338 transitions. cyclomatic complexity: 73 Second operand has 4 states, 4 states have (on average 13.25) internal successors, (53), 4 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-13 18:46:06,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-13 18:46:06,571 INFO L93 Difference]: Finished difference Result 396 states and 497 transitions. [2021-11-13 18:46:06,572 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-13 18:46:06,573 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 396 states and 497 transitions. [2021-11-13 18:46:06,577 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 358 [2021-11-13 18:46:06,582 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 396 states to 396 states and 497 transitions. [2021-11-13 18:46:06,582 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 396 [2021-11-13 18:46:06,583 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 396 [2021-11-13 18:46:06,583 INFO L73 IsDeterministic]: Start isDeterministic. Operand 396 states and 497 transitions. [2021-11-13 18:46:06,585 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-13 18:46:06,586 INFO L681 BuchiCegarLoop]: Abstraction has 396 states and 497 transitions. [2021-11-13 18:46:06,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 396 states and 497 transitions. [2021-11-13 18:46:06,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 396 to 255. [2021-11-13 18:46:06,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 255 states, 251 states have (on average 1.2390438247011952) internal successors, (311), 250 states have internal predecessors, (311), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-13 18:46:06,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 255 states to 255 states and 317 transitions. [2021-11-13 18:46:06,598 INFO L704 BuchiCegarLoop]: Abstraction has 255 states and 317 transitions. [2021-11-13 18:46:06,598 INFO L587 BuchiCegarLoop]: Abstraction has 255 states and 317 transitions. [2021-11-13 18:46:06,599 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-11-13 18:46:06,599 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 255 states and 317 transitions. [2021-11-13 18:46:06,600 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 237 [2021-11-13 18:46:06,601 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-13 18:46:06,601 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-13 18:46:06,602 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-13 18:46:06,602 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-13 18:46:06,602 INFO L791 eck$LassoCheckResult]: Stem: 2280#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string30.base, #t~string30.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string30.base, #t~string30.offset, 1);call write~init~int(0, #t~string30.base, 1 + #t~string30.offset, 1);call #t~string31.base, #t~string31.offset := #Ultimate.allocOnStack(21);call ~#alt_malloc_sizes~0.base, ~#alt_malloc_sizes~0.offset := #Ultimate.allocOnStack(40);#memory_int := ~initToZeroAtPointerBaseAddress~int(#memory_int, ~#alt_malloc_sizes~0.base);~alt_malloc_balance~0 := 0;~alt_memcmp_count~0 := 0;~alt_bzero_count~0 := 0; 2248#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret45#1.base, main_#t~ret45#1.offset, main_#t~mem46#1, main_#t~mem47#1, main_#t~mem48#1, main_#t~mem50#1, main_#t~mem49#1, main_#t~mem51#1, main_#t~mem52#1, main_#t~mem54#1, main_#t~mem53#1, main_#t~mem55#1, main_#t~mem56#1, main_#t~mem58#1, main_#t~mem57#1, main_#t~mem59#1, main_#t~mem60#1, main_#t~switch61#1, main_#t~mem62#1, main_#t~mem63#1, main_#t~mem64#1, main_#t~mem65#1, main_#t~mem66#1, main_#t~mem67#1, main_#t~mem68#1, main_#t~mem69#1, main_#t~mem70#1, main_#t~mem71#1, main_#t~mem72#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~ret73#1.base, main_#t~ret73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1.base, main_#t~mem79#1.offset, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~ret81#1.base, main_#t~ret81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1.base, main_#t~mem91#1.offset, main_#t~mem92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~post98#1, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1, main_#t~post104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1.base, main_#t~mem107#1.offset, main_#t~mem109#1, main_#t~mem108#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~short112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1, main_#t~ret115#1.base, main_#t~ret115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1.base, main_#t~mem121#1.offset, main_#t~mem124#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem128#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~ite129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem140#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~pre143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1, main_#t~post148#1, main_#t~mem152#1, main_#t~mem150#1, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem151#1, main_#t~mem153#1, main_#t~post154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~post131#1, main_#t~mem132#1.base, main_#t~mem132#1.offset, main_#t~mem133#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem160#1.base, main_#t~mem160#1.offset, main_#t~mem161#1, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~mem163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1, main_#t~post166#1, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem173#1, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~ite176#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem42#1, main_#t~post43#1, main_#t~mem44#1, main_#t~mem184#1, main_#t~mem183#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem188#1, main_#t~mem187#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem192#1, main_#t~mem191#1, main_#t~mem193#1, main_#t~mem194#1, main_#t~switch195#1, main_#t~mem196#1, main_#t~mem197#1, main_#t~mem198#1, main_#t~mem199#1, main_#t~mem200#1, main_#t~mem201#1, main_#t~mem202#1, main_#t~mem203#1, main_#t~mem204#1, main_#t~mem205#1, main_#t~mem206#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1, main_#t~mem217#1, main_#t~mem218#1, main_#t~short219#1, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~ret221#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~short228#1, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1.base, main_#t~mem246#1.offset, main_#t~mem247#1.base, main_#t~mem247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem253#1, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1, main_#t~post257#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1.base, main_#t~mem264#1.offset, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1, main_#t~post268#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem180#1, main_#t~post181#1, main_#t~mem182#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~ite271#1.base, main_#t~ite271#1.offset, main_#t~mem270#1.base, main_#t~mem270#1.offset, main_#t~mem274#1.base, main_#t~mem274#1.offset, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~short276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1.base, main_#t~mem278#1.offset, main_#t~mem279#1.base, main_#t~mem279#1.offset, main_#t~mem280#1, main_#t~mem281#1.base, main_#t~mem281#1.offset, main_#t~mem282#1.base, main_#t~mem282#1.offset, main_#t~mem283#1.base, main_#t~mem283#1.offset, main_#t~mem284#1.base, main_#t~mem284#1.offset, main_#t~mem285#1.base, main_#t~mem285#1.offset, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~mem289#1.base, main_#t~mem289#1.offset, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1.base, main_#t~mem293#1.offset, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1.base, main_#t~mem295#1.offset, main_#t~mem296#1.base, main_#t~mem296#1.offset, main_#t~mem297#1, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem301#1, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem300#1, main_#t~mem302#1.base, main_#t~mem302#1.offset, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~post305#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1.base, main_#t~mem307#1.offset, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_#t~mem309#1.base, main_#t~mem309#1.offset, main_#t~mem310#1.base, main_#t~mem310#1.offset, main_#t~mem311#1.base, main_#t~mem311#1.offset, main_#t~mem312#1.base, main_#t~mem312#1.offset, main_#t~mem313#1.base, main_#t~mem313#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem314#1.base, main_#t~mem314#1.offset, main_#t~mem315#1, main_#t~post316#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_#t~ite273#1.base, main_#t~ite273#1.offset, main_#t~mem272#1.base, main_#t~mem272#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2044#L989-4 [2021-11-13 18:46:06,603 INFO L793 eck$LassoCheckResult]: Loop: 2044#L989-4 call main_#t~mem44#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2033#L989-1 assume !!(main_#t~mem44#1 < 10);havoc main_#t~mem44#1;assume { :begin_inline_real_malloc } true;real_malloc_#in~n#1 := 40;havoc real_malloc_#res#1.base, real_malloc_#res#1.offset;havoc real_malloc_#t~malloc41#1.base, real_malloc_#t~malloc41#1.offset, real_malloc_~n#1;real_malloc_~n#1 := real_malloc_#in~n#1;call real_malloc_#t~malloc41#1.base, real_malloc_#t~malloc41#1.offset := #Ultimate.allocOnHeap(real_malloc_~n#1);real_malloc_#res#1.base, real_malloc_#res#1.offset := real_malloc_#t~malloc41#1.base, real_malloc_#t~malloc41#1.offset;havoc real_malloc_#t~malloc41#1.base, real_malloc_#t~malloc41#1.offset; 2035#L979 main_#t~ret45#1.base, main_#t~ret45#1.offset := real_malloc_#res#1.base, real_malloc_#res#1.offset;assume { :end_inline_real_malloc } true;main_~user~0#1.base, main_~user~0#1.offset := main_#t~ret45#1.base, main_#t~ret45#1.offset;havoc main_#t~ret45#1.base, main_#t~ret45#1.offset; 2045#L991 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2046#L991-2 call main_#t~mem46#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem46#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem46#1;call main_#t~mem47#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem48#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem47#1 * main_#t~mem48#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem47#1;havoc main_#t~mem48#1; 2177#L996-118 havoc main_~_ha_hashv~0#1; 2233#L996-49 goto; 2234#L996-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2037#L996-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2069#L996-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch61#1 := 11 == main_~_hj_k~0#1; 2270#L996-10 assume !main_#t~switch61#1; 2279#L996-12 main_#t~switch61#1 := main_#t~switch61#1 || 10 == main_~_hj_k~0#1; 2146#L996-13 assume !main_#t~switch61#1; 2147#L996-15 main_#t~switch61#1 := main_#t~switch61#1 || 9 == main_~_hj_k~0#1; 2274#L996-16 assume !main_#t~switch61#1; 2275#L996-18 main_#t~switch61#1 := main_#t~switch61#1 || 8 == main_~_hj_k~0#1; 2260#L996-19 assume !main_#t~switch61#1; 2255#L996-21 main_#t~switch61#1 := main_#t~switch61#1 || 7 == main_~_hj_k~0#1; 2230#L996-22 assume !main_#t~switch61#1; 2231#L996-24 main_#t~switch61#1 := main_#t~switch61#1 || 6 == main_~_hj_k~0#1; 2251#L996-25 assume !main_#t~switch61#1; 2218#L996-27 main_#t~switch61#1 := main_#t~switch61#1 || 5 == main_~_hj_k~0#1; 2038#L996-28 assume !main_#t~switch61#1; 2039#L996-30 main_#t~switch61#1 := main_#t~switch61#1 || 4 == main_~_hj_k~0#1; 2187#L996-31 assume main_#t~switch61#1;call main_#t~mem69#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem69#1 % 256);havoc main_#t~mem69#1; 2208#L996-33 main_#t~switch61#1 := main_#t~switch61#1 || 3 == main_~_hj_k~0#1; 2168#L996-34 assume main_#t~switch61#1;call main_#t~mem70#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem70#1 % 256);havoc main_#t~mem70#1; 2169#L996-36 main_#t~switch61#1 := main_#t~switch61#1 || 2 == main_~_hj_k~0#1; 2128#L996-37 assume main_#t~switch61#1;call main_#t~mem71#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem71#1 % 256);havoc main_#t~mem71#1; 2129#L996-39 main_#t~switch61#1 := main_#t~switch61#1 || 1 == main_~_hj_k~0#1; 2261#L996-40 assume main_#t~switch61#1;call main_#t~mem72#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem72#1 % 256;havoc main_#t~mem72#1; 2188#L996-42 havoc main_#t~switch61#1; 2097#L996-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768); 2098#L996-44 goto; 2203#L996-46 goto; 2220#L996-48 goto; 2258#L996-116 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2259#L996-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem88#1.base, main_#t~mem88#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem88#1.base, main_#t~mem88#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem88#1.base, main_#t~mem88#1.offset; 2158#L996-63 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$(main_#t~mem89#1.base, 16 + main_#t~mem89#1.offset, 4);call main_#t~mem91#1.base, main_#t~mem91#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem92#1 := read~int(main_#t~mem91#1.base, 20 + main_#t~mem91#1.offset, 4);call write~$Pointer$(main_#t~mem90#1.base, main_#t~mem90#1.offset - main_#t~mem92#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1.base, main_#t~mem91#1.offset;havoc main_#t~mem92#1;call main_#t~mem93#1.base, main_#t~mem93#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem94#1.base, main_#t~mem94#1.offset := read~$Pointer$(main_#t~mem93#1.base, 16 + main_#t~mem93#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem94#1.base, 8 + main_#t~mem94#1.offset, 4);havoc main_#t~mem93#1.base, main_#t~mem93#1.offset;havoc main_#t~mem94#1.base, main_#t~mem94#1.offset;call main_#t~mem95#1.base, main_#t~mem95#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem95#1.base, 16 + main_#t~mem95#1.offset, 4);havoc main_#t~mem95#1.base, main_#t~mem95#1.offset; 2159#L996-62 goto; 2102#L996-114 havoc main_~_ha_bkt~0#1;call main_#t~mem96#1.base, main_#t~mem96#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem97#1 := read~int(main_#t~mem96#1.base, 12 + main_#t~mem96#1.offset, 4);main_#t~post98#1 := main_#t~mem97#1;call write~int(1 + main_#t~post98#1, main_#t~mem96#1.base, 12 + main_#t~mem96#1.offset, 4);havoc main_#t~mem96#1.base, main_#t~mem96#1.offset;havoc main_#t~mem97#1;havoc main_#t~post98#1; 2145#L996-67 call main_#t~mem99#1.base, main_#t~mem99#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem100#1 := read~int(main_#t~mem99#1.base, 4 + main_#t~mem99#1.offset, 4);main_~_ha_bkt~0#1 := ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem100#1 - 1);havoc main_#t~mem99#1.base, main_#t~mem99#1.offset;havoc main_#t~mem100#1; 2215#L996-66 goto; 2266#L996-112 call main_#t~mem101#1.base, main_#t~mem101#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem102#1.base, main_#t~mem102#1.offset := read~$Pointer$(main_#t~mem101#1.base, main_#t~mem101#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem102#1.base, main_#t~mem102#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem101#1.base, main_#t~mem101#1.offset;havoc main_#t~mem102#1.base, main_#t~mem102#1.offset;call main_#t~mem103#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post104#1 := main_#t~mem103#1;call write~int(1 + main_#t~post104#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem103#1;havoc main_#t~post104#1;call main_#t~mem105#1.base, main_#t~mem105#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem105#1.base, main_#t~mem105#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem105#1.base, main_#t~mem105#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem106#1.base, main_#t~mem106#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2252#L996-69 assume main_#t~mem106#1.base != 0 || main_#t~mem106#1.offset != 0;havoc main_#t~mem106#1.base, main_#t~mem106#1.offset;call main_#t~mem107#1.base, main_#t~mem107#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem107#1.base, 12 + main_#t~mem107#1.offset, 4);havoc main_#t~mem107#1.base, main_#t~mem107#1.offset; 2070#L996-71 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem109#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem108#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short112#1 := main_#t~mem109#1 % 4294967296 >= 10 * (1 + main_#t~mem108#1) % 4294967296; 2071#L996-72 assume main_#t~short112#1;call main_#t~mem110#1.base, main_#t~mem110#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem111#1 := read~int(main_#t~mem110#1.base, 36 + main_#t~mem110#1.offset, 4);main_#t~short112#1 := 0 == main_#t~mem111#1 % 4294967296; 2133#L996-74 assume !main_#t~short112#1;havoc main_#t~mem109#1;havoc main_#t~mem108#1;havoc main_#t~mem110#1.base, main_#t~mem110#1.offset;havoc main_#t~mem111#1;havoc main_#t~short112#1; 2090#L996-111 goto; 2085#L996-113 goto; 2086#L996-115 goto; 2211#L996-117 goto; 2212#L989-3 call main_#t~mem42#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post43#1 := main_#t~mem42#1;call write~int(1 + main_#t~post43#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem42#1;havoc main_#t~post43#1; 2044#L989-4 [2021-11-13 18:46:06,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:46:06,603 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2021-11-13 18:46:06,603 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:46:06,604 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1428527704] [2021-11-13 18:46:06,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:46:06,604 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:46:06,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:46:06,621 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-13 18:46:06,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:46:06,651 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-13 18:46:06,652 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:46:06,652 INFO L85 PathProgramCache]: Analyzing trace with hash -633389277, now seen corresponding path program 1 times [2021-11-13 18:46:06,652 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:46:06,652 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [679226637] [2021-11-13 18:46:06,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:46:06,653 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:46:06,675 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-13 18:46:06,676 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1882102032] [2021-11-13 18:46:06,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:46:06,676 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-13 18:46:06,677 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/z3 [2021-11-13 18:46:06,722 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-13 18:46:06,739 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_054781df-9c58-4461-a63a-04a216219a15/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2021-11-13 18:46:50,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:46:50,422 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.