./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test2-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 63182f13 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test2-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 5eb0e4c4138981b5d0263d433279609e9b809291f20fa6c19565d53ef342ae2b --- Real Ultimate output --- This is Ultimate 0.2.1-dev-63182f1 [2021-11-13 18:10:09,173 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-13 18:10:09,177 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-13 18:10:09,229 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-13 18:10:09,230 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-13 18:10:09,232 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-13 18:10:09,233 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-13 18:10:09,239 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-13 18:10:09,242 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-13 18:10:09,248 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-13 18:10:09,249 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-13 18:10:09,251 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-13 18:10:09,252 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-13 18:10:09,254 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-13 18:10:09,256 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-13 18:10:09,261 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-13 18:10:09,262 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-13 18:10:09,264 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-13 18:10:09,266 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-13 18:10:09,274 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-13 18:10:09,276 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-13 18:10:09,277 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-13 18:10:09,281 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-13 18:10:09,282 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-13 18:10:09,291 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-13 18:10:09,291 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-13 18:10:09,292 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-13 18:10:09,294 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-13 18:10:09,295 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-13 18:10:09,296 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-13 18:10:09,297 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-13 18:10:09,298 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-13 18:10:09,300 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-13 18:10:09,301 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-13 18:10:09,303 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-13 18:10:09,303 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-13 18:10:09,304 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-13 18:10:09,304 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-13 18:10:09,304 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-13 18:10:09,305 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-13 18:10:09,306 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-13 18:10:09,307 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-11-13 18:10:09,359 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-13 18:10:09,361 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-13 18:10:09,361 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-13 18:10:09,362 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-13 18:10:09,363 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-13 18:10:09,364 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-13 18:10:09,364 INFO L138 SettingsManager]: * Use SBE=true [2021-11-13 18:10:09,364 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-11-13 18:10:09,364 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-11-13 18:10:09,365 INFO L138 SettingsManager]: * Use old map elimination=false [2021-11-13 18:10:09,366 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-11-13 18:10:09,366 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-11-13 18:10:09,366 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-11-13 18:10:09,366 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-13 18:10:09,367 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-13 18:10:09,367 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-11-13 18:10:09,367 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-13 18:10:09,367 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-13 18:10:09,368 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-13 18:10:09,368 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-11-13 18:10:09,368 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-11-13 18:10:09,368 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-11-13 18:10:09,369 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-13 18:10:09,369 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-13 18:10:09,369 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-11-13 18:10:09,369 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-13 18:10:09,371 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-11-13 18:10:09,371 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-13 18:10:09,371 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-13 18:10:09,372 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-13 18:10:09,372 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-13 18:10:09,372 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-13 18:10:09,374 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-11-13 18:10:09,374 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5eb0e4c4138981b5d0263d433279609e9b809291f20fa6c19565d53ef342ae2b [2021-11-13 18:10:09,624 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-13 18:10:09,649 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-13 18:10:09,651 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-13 18:10:09,653 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-13 18:10:09,654 INFO L275 PluginConnector]: CDTParser initialized [2021-11-13 18:10:09,655 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/../../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test2-1.i [2021-11-13 18:10:09,746 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/data/9ae93e8bc/5332da0ca3184fbc830c3ff216b18979/FLAG4e9be1cfa [2021-11-13 18:10:10,428 INFO L306 CDTParser]: Found 1 translation units. [2021-11-13 18:10:10,428 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test2-1.i [2021-11-13 18:10:10,450 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/data/9ae93e8bc/5332da0ca3184fbc830c3ff216b18979/FLAG4e9be1cfa [2021-11-13 18:10:10,640 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/data/9ae93e8bc/5332da0ca3184fbc830c3ff216b18979 [2021-11-13 18:10:10,643 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-13 18:10:10,644 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-13 18:10:10,646 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-13 18:10:10,646 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-13 18:10:10,649 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-13 18:10:10,650 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 06:10:10" (1/1) ... [2021-11-13 18:10:10,651 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@32a6f872 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:10, skipping insertion in model container [2021-11-13 18:10:10,652 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 06:10:10" (1/1) ... [2021-11-13 18:10:10,666 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-13 18:10:10,736 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-13 18:10:11,333 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test2-1.i[37019,37032] [2021-11-13 18:10:11,491 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test2-1.i[47352,47365] [2021-11-13 18:10:11,505 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-13 18:10:11,518 INFO L203 MainTranslator]: Completed pre-run [2021-11-13 18:10:11,549 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test2-1.i[37019,37032] [2021-11-13 18:10:11,622 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_test2-1.i[47352,47365] [2021-11-13 18:10:11,632 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-13 18:10:11,698 INFO L208 MainTranslator]: Completed translation [2021-11-13 18:10:11,699 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:11 WrapperNode [2021-11-13 18:10:11,699 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-13 18:10:11,700 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-13 18:10:11,700 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-13 18:10:11,700 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-13 18:10:11,707 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:11" (1/1) ... [2021-11-13 18:10:11,768 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:11" (1/1) ... [2021-11-13 18:10:11,832 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-13 18:10:11,833 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-13 18:10:11,833 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-13 18:10:11,833 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-13 18:10:11,842 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:11" (1/1) ... [2021-11-13 18:10:11,842 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:11" (1/1) ... [2021-11-13 18:10:11,851 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:11" (1/1) ... [2021-11-13 18:10:11,852 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:11" (1/1) ... [2021-11-13 18:10:11,913 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:11" (1/1) ... [2021-11-13 18:10:11,925 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:11" (1/1) ... [2021-11-13 18:10:11,947 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:11" (1/1) ... [2021-11-13 18:10:11,959 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-13 18:10:11,961 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-13 18:10:11,965 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-13 18:10:11,965 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-13 18:10:11,967 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:11" (1/1) ... [2021-11-13 18:10:11,974 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-13 18:10:11,995 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/z3 [2021-11-13 18:10:12,015 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-13 18:10:12,046 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-11-13 18:10:12,064 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2021-11-13 18:10:12,064 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2021-11-13 18:10:12,064 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-13 18:10:12,064 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2021-11-13 18:10:12,065 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-11-13 18:10:12,065 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-13 18:10:12,065 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-11-13 18:10:12,066 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-13 18:10:12,066 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-11-13 18:10:12,067 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-11-13 18:10:12,067 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-13 18:10:12,067 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-13 18:10:12,067 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-13 18:10:12,310 WARN L813 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-11-13 18:10:13,571 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-13 18:10:13,571 INFO L299 CfgBuilder]: Removed 54 assume(true) statements. [2021-11-13 18:10:13,574 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 06:10:13 BoogieIcfgContainer [2021-11-13 18:10:13,574 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-13 18:10:13,575 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-11-13 18:10:13,575 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-11-13 18:10:13,580 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-11-13 18:10:13,580 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-13 18:10:13,581 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 13.11 06:10:10" (1/3) ... [2021-11-13 18:10:13,582 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@10579398 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.11 06:10:13, skipping insertion in model container [2021-11-13 18:10:13,582 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-13 18:10:13,583 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:10:11" (2/3) ... [2021-11-13 18:10:13,583 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@10579398 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.11 06:10:13, skipping insertion in model container [2021-11-13 18:10:13,583 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-13 18:10:13,583 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 06:10:13" (3/3) ... [2021-11-13 18:10:13,586 INFO L388 chiAutomizerObserver]: Analyzing ICFG uthash_OAT_test2-1.i [2021-11-13 18:10:13,643 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-11-13 18:10:13,643 INFO L360 BuchiCegarLoop]: Hoare is false [2021-11-13 18:10:13,644 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-11-13 18:10:13,645 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-11-13 18:10:13,645 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-11-13 18:10:13,645 INFO L364 BuchiCegarLoop]: Difference is false [2021-11-13 18:10:13,645 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-11-13 18:10:13,645 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-11-13 18:10:13,672 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 175 states, 170 states have (on average 1.6764705882352942) internal successors, (285), 170 states have internal predecessors, (285), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-13 18:10:13,726 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 164 [2021-11-13 18:10:13,727 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-13 18:10:13,727 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-13 18:10:13,734 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-13 18:10:13,734 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2021-11-13 18:10:13,735 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-11-13 18:10:13,736 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 175 states, 170 states have (on average 1.6764705882352942) internal successors, (285), 170 states have internal predecessors, (285), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-13 18:10:13,747 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 164 [2021-11-13 18:10:13,747 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-13 18:10:13,747 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-13 18:10:13,748 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-13 18:10:13,748 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2021-11-13 18:10:13,754 INFO L791 eck$LassoCheckResult]: Stem: 154#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 46#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem22#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~switch26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc38#1.base, main_#t~malloc38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~memset~res41#1.base, main_#t~memset~res41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~malloc47#1.base, main_#t~malloc47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~memset~res54#1.base, main_#t~memset~res54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1, main_#t~post65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~post71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem76#1, main_#t~mem75#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~short79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~malloc82#1.base, main_#t~malloc82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~memset~res87#1.base, main_#t~memset~res87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem92#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem96#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~ite97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~pre111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~post116#1, main_#t~mem120#1, main_#t~mem118#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem119#1, main_#t~mem121#1, main_#t~post122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~post99#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem139#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1, main_#t~ite142#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem149#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem151#1, main_#t~mem153#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem156#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~switch160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem171#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~short184#1, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~ret186#1, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem146#1, main_#t~mem147#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 135#L814-4true [2021-11-13 18:10:13,755 INFO L793 eck$LassoCheckResult]: Loop: 135#L814-4true call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 98#L814-1true assume !!(main_#t~mem9#1 < 10);havoc main_#t~mem9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset; 81#L816true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 82#L816-2true call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem11#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem12#1 * main_#t~mem13#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem12#1;havoc main_#t~mem13#1; 165#L821-124true assume !true; 58#L814-3true call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int(1 + main_#t~post8#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1; 135#L814-4true [2021-11-13 18:10:13,760 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:10:13,760 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2021-11-13 18:10:13,769 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:10:13,770 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1642100568] [2021-11-13 18:10:13,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:10:13,771 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:10:13,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:10:13,902 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-13 18:10:13,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:10:14,024 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-13 18:10:14,027 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:10:14,027 INFO L85 PathProgramCache]: Analyzing trace with hash 1336134572, now seen corresponding path program 1 times [2021-11-13 18:10:14,028 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:10:14,028 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [120659178] [2021-11-13 18:10:14,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:10:14,030 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:10:14,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-13 18:10:14,115 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-13 18:10:14,115 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-13 18:10:14,116 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [120659178] [2021-11-13 18:10:14,116 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [120659178] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-13 18:10:14,117 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-13 18:10:14,117 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-13 18:10:14,117 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1957395742] [2021-11-13 18:10:14,118 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-13 18:10:14,122 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-13 18:10:14,123 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-13 18:10:14,154 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-11-13 18:10:14,154 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-11-13 18:10:14,162 INFO L87 Difference]: Start difference. First operand has 175 states, 170 states have (on average 1.6764705882352942) internal successors, (285), 170 states have internal predecessors, (285), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-13 18:10:14,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-13 18:10:14,207 INFO L93 Difference]: Finished difference Result 175 states and 227 transitions. [2021-11-13 18:10:14,208 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-11-13 18:10:14,216 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 175 states and 227 transitions. [2021-11-13 18:10:14,231 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 164 [2021-11-13 18:10:14,242 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 175 states to 171 states and 223 transitions. [2021-11-13 18:10:14,244 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 171 [2021-11-13 18:10:14,247 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 171 [2021-11-13 18:10:14,248 INFO L73 IsDeterministic]: Start isDeterministic. Operand 171 states and 223 transitions. [2021-11-13 18:10:14,251 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-13 18:10:14,251 INFO L681 BuchiCegarLoop]: Abstraction has 171 states and 223 transitions. [2021-11-13 18:10:14,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states and 223 transitions. [2021-11-13 18:10:14,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 171. [2021-11-13 18:10:14,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 171 states, 167 states have (on average 1.2994011976047903) internal successors, (217), 166 states have internal predecessors, (217), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-13 18:10:14,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 223 transitions. [2021-11-13 18:10:14,304 INFO L704 BuchiCegarLoop]: Abstraction has 171 states and 223 transitions. [2021-11-13 18:10:14,304 INFO L587 BuchiCegarLoop]: Abstraction has 171 states and 223 transitions. [2021-11-13 18:10:14,304 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-11-13 18:10:14,305 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 171 states and 223 transitions. [2021-11-13 18:10:14,307 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 164 [2021-11-13 18:10:14,308 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-13 18:10:14,308 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-13 18:10:14,310 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-13 18:10:14,310 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-13 18:10:14,311 INFO L791 eck$LassoCheckResult]: Stem: 525#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 438#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem22#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~switch26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc38#1.base, main_#t~malloc38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~memset~res41#1.base, main_#t~memset~res41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~malloc47#1.base, main_#t~malloc47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~memset~res54#1.base, main_#t~memset~res54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1, main_#t~post65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~post71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem76#1, main_#t~mem75#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~short79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~malloc82#1.base, main_#t~malloc82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~memset~res87#1.base, main_#t~memset~res87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem92#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem96#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~ite97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~pre111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~post116#1, main_#t~mem120#1, main_#t~mem118#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem119#1, main_#t~mem121#1, main_#t~post122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~post99#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem139#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1, main_#t~ite142#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem149#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem151#1, main_#t~mem153#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem156#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~switch160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem171#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~short184#1, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~ret186#1, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem146#1, main_#t~mem147#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 439#L814-4 [2021-11-13 18:10:14,320 INFO L793 eck$LassoCheckResult]: Loop: 439#L814-4 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 496#L814-1 assume !!(main_#t~mem9#1 < 10);havoc main_#t~mem9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset; 481#L816 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 482#L816-2 call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem11#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem12#1 * main_#t~mem13#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem12#1;havoc main_#t~mem13#1; 485#L821-124 havoc main_~_ha_hashv~0#1; 444#L821-49 goto; 445#L821-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 410#L821-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 411#L821-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch26#1 := 11 == main_~_hj_k~0#1; 402#L821-10 assume main_#t~switch26#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 403#L821-12 main_#t~switch26#1 := main_#t~switch26#1 || 10 == main_~_hj_k~0#1; 436#L821-13 assume main_#t~switch26#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 437#L821-15 main_#t~switch26#1 := main_#t~switch26#1 || 9 == main_~_hj_k~0#1; 510#L821-16 assume main_#t~switch26#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 519#L821-18 main_#t~switch26#1 := main_#t~switch26#1 || 8 == main_~_hj_k~0#1; 360#L821-19 assume main_#t~switch26#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem30#1 % 256);havoc main_#t~mem30#1; 361#L821-21 main_#t~switch26#1 := main_#t~switch26#1 || 7 == main_~_hj_k~0#1; 450#L821-22 assume !main_#t~switch26#1; 451#L821-24 main_#t~switch26#1 := main_#t~switch26#1 || 6 == main_~_hj_k~0#1; 494#L821-25 assume main_#t~switch26#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; 495#L821-27 main_#t~switch26#1 := main_#t~switch26#1 || 5 == main_~_hj_k~0#1; 415#L821-28 assume main_#t~switch26#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem33#1 % 256;havoc main_#t~mem33#1; 416#L821-30 main_#t~switch26#1 := main_#t~switch26#1 || 4 == main_~_hj_k~0#1; 493#L821-31 assume main_#t~switch26#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; 470#L821-33 main_#t~switch26#1 := main_#t~switch26#1 || 3 == main_~_hj_k~0#1; 441#L821-34 assume main_#t~switch26#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem35#1 % 256);havoc main_#t~mem35#1; 390#L821-36 main_#t~switch26#1 := main_#t~switch26#1 || 2 == main_~_hj_k~0#1; 391#L821-37 assume main_#t~switch26#1;call main_#t~mem36#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem36#1 % 256);havoc main_#t~mem36#1; 477#L821-39 main_#t~switch26#1 := main_#t~switch26#1 || 1 == main_~_hj_k~0#1; 383#L821-40 assume main_#t~switch26#1;call main_#t~mem37#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem37#1 % 256;havoc main_#t~mem37#1; 384#L821-42 havoc main_#t~switch26#1; 417#L821-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768); 362#L821-44 goto; 363#L821-46 goto; 448#L821-48 goto; 449#L821-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 364#L821-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 365#L821-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1.base, main_#t~mem57#1.offset := read~$Pointer$(main_#t~mem56#1.base, 16 + main_#t~mem56#1.offset, 4);call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1 := read~int(main_#t~mem58#1.base, 20 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_#t~mem57#1.base, main_#t~mem57#1.offset - main_#t~mem59#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1.base, main_#t~mem57#1.offset;havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem61#1.base, 8 + main_#t~mem61#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset;havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem62#1.base, 16 + main_#t~mem62#1.offset, 4);havoc main_#t~mem62#1.base, main_#t~mem62#1.offset; 378#L821-66 goto; 489#L821-120 havoc main_~_ha_bkt~0#1;call main_#t~mem63#1.base, main_#t~mem63#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem64#1 := read~int(main_#t~mem63#1.base, 12 + main_#t~mem63#1.offset, 4);main_#t~post65#1 := main_#t~mem64#1;call write~int(1 + main_#t~post65#1, main_#t~mem63#1.base, 12 + main_#t~mem63#1.offset, 4);havoc main_#t~mem63#1.base, main_#t~mem63#1.offset;havoc main_#t~mem64#1;havoc main_#t~post65#1; 376#L821-71 call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1 := read~int(main_#t~mem66#1.base, 4 + main_#t~mem66#1.offset, 4);main_~_ha_bkt~0#1 := ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem67#1 - 1);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1; 377#L821-70 goto; 504#L821-118 call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_#t~mem68#1.base, main_#t~mem68#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem69#1.base, main_#t~mem69#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;call main_#t~mem70#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post71#1 := main_#t~mem70#1;call write~int(1 + main_#t~post71#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem70#1;havoc main_#t~post71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem72#1.base, main_#t~mem72#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 388#L821-73 assume main_#t~mem73#1.base != 0 || main_#t~mem73#1.offset != 0;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 389#L821-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem75#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short79#1 := main_#t~mem76#1 % 4294967296 >= 10 * (1 + main_#t~mem75#1) % 4294967296; 483#L821-76 assume main_#t~short79#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 36 + main_#t~mem77#1.offset, 4);main_#t~short79#1 := 0 == main_#t~mem78#1 % 4294967296; 484#L821-78 assume !main_#t~short79#1;havoc main_#t~mem76#1;havoc main_#t~mem75#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~short79#1; 379#L821-117 goto; 380#L821-119 goto; 433#L821-121 goto; 497#L821-123 goto; 455#L814-3 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int(1 + main_#t~post8#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1; 439#L814-4 [2021-11-13 18:10:14,321 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:10:14,321 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2021-11-13 18:10:14,321 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:10:14,322 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1263423771] [2021-11-13 18:10:14,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:10:14,323 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:10:14,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:10:14,357 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-13 18:10:14,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:10:14,409 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-13 18:10:14,412 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:10:14,412 INFO L85 PathProgramCache]: Analyzing trace with hash -1570577107, now seen corresponding path program 1 times [2021-11-13 18:10:14,414 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:10:14,414 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [214284823] [2021-11-13 18:10:14,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:10:14,415 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:10:14,434 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-13 18:10:14,435 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1041141911] [2021-11-13 18:10:14,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:10:14,435 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-13 18:10:14,436 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/z3 [2021-11-13 18:10:14,441 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-13 18:10:14,465 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-11-13 18:10:14,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-13 18:10:14,646 INFO L263 TraceCheckSpWp]: Trace formula consists of 308 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-13 18:10:14,651 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-13 18:10:14,827 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-13 18:10:14,828 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-11-13 18:10:14,828 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-13 18:10:14,829 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [214284823] [2021-11-13 18:10:14,830 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-13 18:10:14,830 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1041141911] [2021-11-13 18:10:14,830 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1041141911] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-13 18:10:14,831 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-13 18:10:14,831 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-13 18:10:14,831 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1247612641] [2021-11-13 18:10:14,831 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-13 18:10:14,833 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-13 18:10:14,833 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-13 18:10:14,834 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-13 18:10:14,834 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-13 18:10:14,835 INFO L87 Difference]: Start difference. First operand 171 states and 223 transitions. cyclomatic complexity: 55 Second operand has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-13 18:10:14,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-13 18:10:14,946 INFO L93 Difference]: Finished difference Result 192 states and 244 transitions. [2021-11-13 18:10:14,946 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-13 18:10:14,947 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 192 states and 244 transitions. [2021-11-13 18:10:14,949 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 185 [2021-11-13 18:10:14,955 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 192 states to 192 states and 244 transitions. [2021-11-13 18:10:14,955 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 192 [2021-11-13 18:10:14,956 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 192 [2021-11-13 18:10:14,957 INFO L73 IsDeterministic]: Start isDeterministic. Operand 192 states and 244 transitions. [2021-11-13 18:10:14,963 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-13 18:10:14,963 INFO L681 BuchiCegarLoop]: Abstraction has 192 states and 244 transitions. [2021-11-13 18:10:14,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states and 244 transitions. [2021-11-13 18:10:14,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 191. [2021-11-13 18:10:15,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 191 states, 187 states have (on average 1.267379679144385) internal successors, (237), 186 states have internal predecessors, (237), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-13 18:10:15,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 243 transitions. [2021-11-13 18:10:15,005 INFO L704 BuchiCegarLoop]: Abstraction has 191 states and 243 transitions. [2021-11-13 18:10:15,005 INFO L587 BuchiCegarLoop]: Abstraction has 191 states and 243 transitions. [2021-11-13 18:10:15,005 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-11-13 18:10:15,005 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 191 states and 243 transitions. [2021-11-13 18:10:15,006 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 184 [2021-11-13 18:10:15,007 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-13 18:10:15,007 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-13 18:10:15,010 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-13 18:10:15,010 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-13 18:10:15,010 INFO L791 eck$LassoCheckResult]: Stem: 1054#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 961#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem22#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~switch26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc38#1.base, main_#t~malloc38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~memset~res41#1.base, main_#t~memset~res41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~malloc47#1.base, main_#t~malloc47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~memset~res54#1.base, main_#t~memset~res54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1, main_#t~post65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~post71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem76#1, main_#t~mem75#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~short79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~malloc82#1.base, main_#t~malloc82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~memset~res87#1.base, main_#t~memset~res87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem92#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem96#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~ite97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~pre111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~post116#1, main_#t~mem120#1, main_#t~mem118#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem119#1, main_#t~mem121#1, main_#t~post122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~post99#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem139#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1, main_#t~ite142#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem149#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem151#1, main_#t~mem153#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem156#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~switch160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem171#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~short184#1, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~ret186#1, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem146#1, main_#t~mem147#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 962#L814-4 [2021-11-13 18:10:15,011 INFO L793 eck$LassoCheckResult]: Loop: 962#L814-4 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1023#L814-1 assume !!(main_#t~mem9#1 < 10);havoc main_#t~mem9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset; 1007#L816 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1008#L816-2 call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem11#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem12#1 * main_#t~mem13#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem12#1;havoc main_#t~mem13#1; 1011#L821-124 havoc main_~_ha_hashv~0#1; 968#L821-49 goto; 969#L821-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 933#L821-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 934#L821-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch26#1 := 11 == main_~_hj_k~0#1; 924#L821-10 assume main_#t~switch26#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 925#L821-12 main_#t~switch26#1 := main_#t~switch26#1 || 10 == main_~_hj_k~0#1; 959#L821-13 assume main_#t~switch26#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 960#L821-15 main_#t~switch26#1 := main_#t~switch26#1 || 9 == main_~_hj_k~0#1; 1037#L821-16 assume main_#t~switch26#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 1048#L821-18 main_#t~switch26#1 := main_#t~switch26#1 || 8 == main_~_hj_k~0#1; 882#L821-19 assume main_#t~switch26#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem30#1 % 256);havoc main_#t~mem30#1; 883#L821-21 main_#t~switch26#1 := main_#t~switch26#1 || 7 == main_~_hj_k~0#1; 974#L821-22 assume main_#t~switch26#1;call main_#t~mem31#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem31#1 % 256);havoc main_#t~mem31#1; 975#L821-24 main_#t~switch26#1 := main_#t~switch26#1 || 6 == main_~_hj_k~0#1; 1021#L821-25 assume main_#t~switch26#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; 1022#L821-27 main_#t~switch26#1 := main_#t~switch26#1 || 5 == main_~_hj_k~0#1; 938#L821-28 assume main_#t~switch26#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem33#1 % 256;havoc main_#t~mem33#1; 939#L821-30 main_#t~switch26#1 := main_#t~switch26#1 || 4 == main_~_hj_k~0#1; 1019#L821-31 assume main_#t~switch26#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; 1020#L821-33 main_#t~switch26#1 := main_#t~switch26#1 || 3 == main_~_hj_k~0#1; 964#L821-34 assume main_#t~switch26#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem35#1 % 256);havoc main_#t~mem35#1; 965#L821-36 main_#t~switch26#1 := main_#t~switch26#1 || 2 == main_~_hj_k~0#1; 1002#L821-37 assume main_#t~switch26#1;call main_#t~mem36#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem36#1 % 256);havoc main_#t~mem36#1; 1003#L821-39 main_#t~switch26#1 := main_#t~switch26#1 || 1 == main_~_hj_k~0#1; 905#L821-40 assume main_#t~switch26#1;call main_#t~mem37#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem37#1 % 256;havoc main_#t~mem37#1; 906#L821-42 havoc main_#t~switch26#1; 940#L821-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768); 884#L821-44 goto; 885#L821-46 goto; 972#L821-48 goto; 973#L821-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 886#L821-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 887#L821-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1.base, main_#t~mem57#1.offset := read~$Pointer$(main_#t~mem56#1.base, 16 + main_#t~mem56#1.offset, 4);call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1 := read~int(main_#t~mem58#1.base, 20 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_#t~mem57#1.base, main_#t~mem57#1.offset - main_#t~mem59#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1.base, main_#t~mem57#1.offset;havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem61#1.base, 8 + main_#t~mem61#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset;havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem62#1.base, 16 + main_#t~mem62#1.offset, 4);havoc main_#t~mem62#1.base, main_#t~mem62#1.offset; 900#L821-66 goto; 1015#L821-120 havoc main_~_ha_bkt~0#1;call main_#t~mem63#1.base, main_#t~mem63#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem64#1 := read~int(main_#t~mem63#1.base, 12 + main_#t~mem63#1.offset, 4);main_#t~post65#1 := main_#t~mem64#1;call write~int(1 + main_#t~post65#1, main_#t~mem63#1.base, 12 + main_#t~mem63#1.offset, 4);havoc main_#t~mem63#1.base, main_#t~mem63#1.offset;havoc main_#t~mem64#1;havoc main_#t~post65#1; 898#L821-71 call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1 := read~int(main_#t~mem66#1.base, 4 + main_#t~mem66#1.offset, 4);main_~_ha_bkt~0#1 := ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem67#1 - 1);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1; 899#L821-70 goto; 1031#L821-118 call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_#t~mem68#1.base, main_#t~mem68#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem69#1.base, main_#t~mem69#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;call main_#t~mem70#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post71#1 := main_#t~mem70#1;call write~int(1 + main_#t~post71#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem70#1;havoc main_#t~post71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem72#1.base, main_#t~mem72#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 910#L821-73 assume main_#t~mem73#1.base != 0 || main_#t~mem73#1.offset != 0;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 911#L821-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem75#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short79#1 := main_#t~mem76#1 % 4294967296 >= 10 * (1 + main_#t~mem75#1) % 4294967296; 1009#L821-76 assume main_#t~short79#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 36 + main_#t~mem77#1.offset, 4);main_#t~short79#1 := 0 == main_#t~mem78#1 % 4294967296; 1010#L821-78 assume !main_#t~short79#1;havoc main_#t~mem76#1;havoc main_#t~mem75#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~short79#1; 901#L821-117 goto; 902#L821-119 goto; 956#L821-121 goto; 1024#L821-123 goto; 979#L814-3 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int(1 + main_#t~post8#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1; 962#L814-4 [2021-11-13 18:10:15,012 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:10:15,012 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2021-11-13 18:10:15,013 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:10:15,013 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [138912346] [2021-11-13 18:10:15,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:10:15,014 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:10:15,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:10:15,044 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-13 18:10:15,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:10:15,070 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-13 18:10:15,070 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:10:15,071 INFO L85 PathProgramCache]: Analyzing trace with hash -726571605, now seen corresponding path program 1 times [2021-11-13 18:10:15,071 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:10:15,071 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1458042279] [2021-11-13 18:10:15,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:10:15,072 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:10:15,084 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-13 18:10:15,084 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1547523273] [2021-11-13 18:10:15,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:10:15,085 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-13 18:10:15,085 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/z3 [2021-11-13 18:10:15,087 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-13 18:10:15,105 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-11-13 18:10:15,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-13 18:10:15,242 INFO L263 TraceCheckSpWp]: Trace formula consists of 314 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-13 18:10:15,245 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-13 18:10:15,381 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-13 18:10:15,381 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-11-13 18:10:15,382 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-13 18:10:15,382 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1458042279] [2021-11-13 18:10:15,382 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-13 18:10:15,383 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1547523273] [2021-11-13 18:10:15,383 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1547523273] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-13 18:10:15,383 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-13 18:10:15,384 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-13 18:10:15,384 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [909584369] [2021-11-13 18:10:15,385 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-13 18:10:15,385 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-13 18:10:15,385 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-13 18:10:15,386 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-13 18:10:15,386 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-13 18:10:15,387 INFO L87 Difference]: Start difference. First operand 191 states and 243 transitions. cyclomatic complexity: 55 Second operand has 4 states, 4 states have (on average 13.0) internal successors, (52), 4 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-13 18:10:15,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-13 18:10:15,492 INFO L93 Difference]: Finished difference Result 261 states and 331 transitions. [2021-11-13 18:10:15,493 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-13 18:10:15,494 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 261 states and 331 transitions. [2021-11-13 18:10:15,497 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 246 [2021-11-13 18:10:15,500 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 261 states to 261 states and 331 transitions. [2021-11-13 18:10:15,500 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 261 [2021-11-13 18:10:15,501 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 261 [2021-11-13 18:10:15,501 INFO L73 IsDeterministic]: Start isDeterministic. Operand 261 states and 331 transitions. [2021-11-13 18:10:15,502 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-13 18:10:15,502 INFO L681 BuchiCegarLoop]: Abstraction has 261 states and 331 transitions. [2021-11-13 18:10:15,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 261 states and 331 transitions. [2021-11-13 18:10:15,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 261 to 177. [2021-11-13 18:10:15,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 177 states, 173 states have (on average 1.2485549132947977) internal successors, (216), 172 states have internal predecessors, (216), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-13 18:10:15,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 222 transitions. [2021-11-13 18:10:15,516 INFO L704 BuchiCegarLoop]: Abstraction has 177 states and 222 transitions. [2021-11-13 18:10:15,516 INFO L587 BuchiCegarLoop]: Abstraction has 177 states and 222 transitions. [2021-11-13 18:10:15,516 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-11-13 18:10:15,516 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 177 states and 222 transitions. [2021-11-13 18:10:15,517 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 170 [2021-11-13 18:10:15,517 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-13 18:10:15,517 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-13 18:10:15,519 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-13 18:10:15,519 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-13 18:10:15,519 INFO L791 eck$LassoCheckResult]: Stem: 1665#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 1574#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem22#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~switch26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc38#1.base, main_#t~malloc38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~memset~res41#1.base, main_#t~memset~res41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~malloc47#1.base, main_#t~malloc47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~memset~res54#1.base, main_#t~memset~res54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1, main_#t~post65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~post71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem76#1, main_#t~mem75#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~short79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~malloc82#1.base, main_#t~malloc82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~memset~res87#1.base, main_#t~memset~res87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem92#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem96#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~ite97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~pre111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~post116#1, main_#t~mem120#1, main_#t~mem118#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem119#1, main_#t~mem121#1, main_#t~post122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~post99#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem139#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1, main_#t~ite142#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem149#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem151#1, main_#t~mem153#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem156#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~switch160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem171#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~short184#1, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~ret186#1, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem146#1, main_#t~mem147#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1575#L814-4 [2021-11-13 18:10:15,519 INFO L793 eck$LassoCheckResult]: Loop: 1575#L814-4 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1636#L814-1 assume !!(main_#t~mem9#1 < 10);havoc main_#t~mem9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset; 1620#L816 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1621#L816-2 call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem11#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem12#1 * main_#t~mem13#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem12#1;havoc main_#t~mem13#1; 1622#L821-124 havoc main_~_ha_hashv~0#1; 1581#L821-49 goto; 1582#L821-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1546#L821-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1547#L821-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch26#1 := 11 == main_~_hj_k~0#1; 1538#L821-10 assume !main_#t~switch26#1; 1539#L821-12 main_#t~switch26#1 := main_#t~switch26#1 || 10 == main_~_hj_k~0#1; 1572#L821-13 assume !main_#t~switch26#1; 1573#L821-15 main_#t~switch26#1 := main_#t~switch26#1 || 9 == main_~_hj_k~0#1; 1650#L821-16 assume !main_#t~switch26#1; 1659#L821-18 main_#t~switch26#1 := main_#t~switch26#1 || 8 == main_~_hj_k~0#1; 1494#L821-19 assume !main_#t~switch26#1; 1495#L821-21 main_#t~switch26#1 := main_#t~switch26#1 || 7 == main_~_hj_k~0#1; 1587#L821-22 assume !main_#t~switch26#1; 1588#L821-24 main_#t~switch26#1 := main_#t~switch26#1 || 6 == main_~_hj_k~0#1; 1634#L821-25 assume !main_#t~switch26#1; 1635#L821-27 main_#t~switch26#1 := main_#t~switch26#1 || 5 == main_~_hj_k~0#1; 1551#L821-28 assume !main_#t~switch26#1; 1552#L821-30 main_#t~switch26#1 := main_#t~switch26#1 || 4 == main_~_hj_k~0#1; 1631#L821-31 assume main_#t~switch26#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; 1632#L821-33 main_#t~switch26#1 := main_#t~switch26#1 || 3 == main_~_hj_k~0#1; 1577#L821-34 assume main_#t~switch26#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem35#1 % 256);havoc main_#t~mem35#1; 1578#L821-36 main_#t~switch26#1 := main_#t~switch26#1 || 2 == main_~_hj_k~0#1; 1615#L821-37 assume main_#t~switch26#1;call main_#t~mem36#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem36#1 % 256);havoc main_#t~mem36#1; 1616#L821-39 main_#t~switch26#1 := main_#t~switch26#1 || 1 == main_~_hj_k~0#1; 1519#L821-40 assume main_#t~switch26#1;call main_#t~mem37#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem37#1 % 256;havoc main_#t~mem37#1; 1520#L821-42 havoc main_#t~switch26#1; 1553#L821-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768); 1498#L821-44 goto; 1499#L821-46 goto; 1585#L821-48 goto; 1586#L821-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1500#L821-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 1501#L821-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1.base, main_#t~mem57#1.offset := read~$Pointer$(main_#t~mem56#1.base, 16 + main_#t~mem56#1.offset, 4);call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1 := read~int(main_#t~mem58#1.base, 20 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_#t~mem57#1.base, main_#t~mem57#1.offset - main_#t~mem59#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1.base, main_#t~mem57#1.offset;havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem61#1.base, 8 + main_#t~mem61#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset;havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem62#1.base, 16 + main_#t~mem62#1.offset, 4);havoc main_#t~mem62#1.base, main_#t~mem62#1.offset; 1514#L821-66 goto; 1630#L821-120 havoc main_~_ha_bkt~0#1;call main_#t~mem63#1.base, main_#t~mem63#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem64#1 := read~int(main_#t~mem63#1.base, 12 + main_#t~mem63#1.offset, 4);main_#t~post65#1 := main_#t~mem64#1;call write~int(1 + main_#t~post65#1, main_#t~mem63#1.base, 12 + main_#t~mem63#1.offset, 4);havoc main_#t~mem63#1.base, main_#t~mem63#1.offset;havoc main_#t~mem64#1;havoc main_#t~post65#1; 1512#L821-71 call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1 := read~int(main_#t~mem66#1.base, 4 + main_#t~mem66#1.offset, 4);main_~_ha_bkt~0#1 := ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem67#1 - 1);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1; 1513#L821-70 goto; 1644#L821-118 call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_#t~mem68#1.base, main_#t~mem68#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem69#1.base, main_#t~mem69#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;call main_#t~mem70#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post71#1 := main_#t~mem70#1;call write~int(1 + main_#t~post71#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem70#1;havoc main_#t~post71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem72#1.base, main_#t~mem72#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1526#L821-73 assume main_#t~mem73#1.base != 0 || main_#t~mem73#1.offset != 0;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 1527#L821-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem75#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short79#1 := main_#t~mem76#1 % 4294967296 >= 10 * (1 + main_#t~mem75#1) % 4294967296; 1623#L821-76 assume main_#t~short79#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 36 + main_#t~mem77#1.offset, 4);main_#t~short79#1 := 0 == main_#t~mem78#1 % 4294967296; 1624#L821-78 assume !main_#t~short79#1;havoc main_#t~mem76#1;havoc main_#t~mem75#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~short79#1; 1517#L821-117 goto; 1518#L821-119 goto; 1571#L821-121 goto; 1639#L821-123 goto; 1593#L814-3 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int(1 + main_#t~post8#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1; 1575#L814-4 [2021-11-13 18:10:15,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:10:15,520 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2021-11-13 18:10:15,520 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:10:15,520 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1412314503] [2021-11-13 18:10:15,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:10:15,521 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:10:15,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:10:15,534 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-13 18:10:15,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:10:15,555 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-13 18:10:15,559 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:10:15,559 INFO L85 PathProgramCache]: Analyzing trace with hash 1694021305, now seen corresponding path program 1 times [2021-11-13 18:10:15,559 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:10:15,560 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1839695682] [2021-11-13 18:10:15,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:10:15,560 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:10:15,578 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-13 18:10:15,581 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1232817561] [2021-11-13 18:10:15,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:10:15,582 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-13 18:10:15,582 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/z3 [2021-11-13 18:10:15,605 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-13 18:10:15,625 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_b89e4211-59de-4914-93e1-802410b7d668/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process