./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test9-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 63182f13 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test9-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e2cb3c9a8570b7ee66b623ed5fd2a1832f018e766f6bb5120cee7430951770d6 --- Real Ultimate output --- This is Ultimate 0.2.1-dev-63182f1 [2021-11-13 18:21:00,392 INFO L177 SettingsManager]: Resetting all preferences to default values... [2021-11-13 18:21:00,394 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2021-11-13 18:21:00,458 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2021-11-13 18:21:00,459 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2021-11-13 18:21:00,465 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2021-11-13 18:21:00,468 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2021-11-13 18:21:00,474 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2021-11-13 18:21:00,477 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2021-11-13 18:21:00,485 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2021-11-13 18:21:00,487 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2021-11-13 18:21:00,490 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2021-11-13 18:21:00,491 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2021-11-13 18:21:00,495 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2021-11-13 18:21:00,499 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2021-11-13 18:21:00,506 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2021-11-13 18:21:00,509 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2021-11-13 18:21:00,510 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2021-11-13 18:21:00,514 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2021-11-13 18:21:00,525 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2021-11-13 18:21:00,529 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2021-11-13 18:21:00,531 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2021-11-13 18:21:00,535 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2021-11-13 18:21:00,537 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2021-11-13 18:21:00,549 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2021-11-13 18:21:00,549 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2021-11-13 18:21:00,550 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2021-11-13 18:21:00,553 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2021-11-13 18:21:00,554 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2021-11-13 18:21:00,556 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2021-11-13 18:21:00,557 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2021-11-13 18:21:00,559 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2021-11-13 18:21:00,561 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2021-11-13 18:21:00,563 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2021-11-13 18:21:00,566 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2021-11-13 18:21:00,566 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2021-11-13 18:21:00,567 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2021-11-13 18:21:00,568 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2021-11-13 18:21:00,568 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2021-11-13 18:21:00,570 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2021-11-13 18:21:00,571 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2021-11-13 18:21:00,572 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/config/svcomp-Termination-32bit-Automizer_Default.epf [2021-11-13 18:21:00,629 INFO L113 SettingsManager]: Loading preferences was successful [2021-11-13 18:21:00,629 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2021-11-13 18:21:00,630 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2021-11-13 18:21:00,630 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2021-11-13 18:21:00,632 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2021-11-13 18:21:00,633 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2021-11-13 18:21:00,633 INFO L138 SettingsManager]: * Use SBE=true [2021-11-13 18:21:00,633 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2021-11-13 18:21:00,634 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2021-11-13 18:21:00,634 INFO L138 SettingsManager]: * Use old map elimination=false [2021-11-13 18:21:00,634 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2021-11-13 18:21:00,635 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2021-11-13 18:21:00,635 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2021-11-13 18:21:00,636 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2021-11-13 18:21:00,636 INFO L138 SettingsManager]: * sizeof long=4 [2021-11-13 18:21:00,636 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2021-11-13 18:21:00,637 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2021-11-13 18:21:00,637 INFO L138 SettingsManager]: * sizeof POINTER=4 [2021-11-13 18:21:00,638 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2021-11-13 18:21:00,638 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2021-11-13 18:21:00,638 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2021-11-13 18:21:00,639 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2021-11-13 18:21:00,639 INFO L138 SettingsManager]: * sizeof long double=12 [2021-11-13 18:21:00,639 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2021-11-13 18:21:00,640 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2021-11-13 18:21:00,640 INFO L138 SettingsManager]: * Use constant arrays=true [2021-11-13 18:21:00,641 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2021-11-13 18:21:00,641 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2021-11-13 18:21:00,641 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2021-11-13 18:21:00,642 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2021-11-13 18:21:00,642 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2021-11-13 18:21:00,643 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2021-11-13 18:21:00,644 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2021-11-13 18:21:00,644 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e2cb3c9a8570b7ee66b623ed5fd2a1832f018e766f6bb5120cee7430951770d6 [2021-11-13 18:21:01,064 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2021-11-13 18:21:01,117 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2021-11-13 18:21:01,121 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2021-11-13 18:21:01,123 INFO L271 PluginConnector]: Initializing CDTParser... [2021-11-13 18:21:01,125 INFO L275 PluginConnector]: CDTParser initialized [2021-11-13 18:21:01,127 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/../../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test9-1.i [2021-11-13 18:21:01,231 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/data/c9c85de3f/eab28e2e419f4e77ad3658593b367dea/FLAGd4d765cec [2021-11-13 18:21:02,157 INFO L306 CDTParser]: Found 1 translation units. [2021-11-13 18:21:02,162 INFO L160 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test9-1.i [2021-11-13 18:21:02,220 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/data/c9c85de3f/eab28e2e419f4e77ad3658593b367dea/FLAGd4d765cec [2021-11-13 18:21:02,726 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/data/c9c85de3f/eab28e2e419f4e77ad3658593b367dea [2021-11-13 18:21:02,730 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2021-11-13 18:21:02,732 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2021-11-13 18:21:02,734 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2021-11-13 18:21:02,735 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2021-11-13 18:21:02,740 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2021-11-13 18:21:02,741 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 06:21:02" (1/1) ... [2021-11-13 18:21:02,743 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@626f47f5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:21:02, skipping insertion in model container [2021-11-13 18:21:02,743 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 06:21:02" (1/1) ... [2021-11-13 18:21:02,754 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2021-11-13 18:21:02,881 INFO L178 MainTranslator]: Built tables and reachable declarations [2021-11-13 18:21:03,668 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test9-1.i[33021,33034] [2021-11-13 18:21:04,130 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test9-1.i[84583,84596] [2021-11-13 18:21:04,140 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-13 18:21:04,158 INFO L203 MainTranslator]: Completed pre-run [2021-11-13 18:21:04,207 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test9-1.i[33021,33034] [2021-11-13 18:21:04,440 WARN L228 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test9-1.i[84583,84596] [2021-11-13 18:21:04,442 INFO L206 PostProcessor]: Analyzing one entry point: main [2021-11-13 18:21:04,508 INFO L208 MainTranslator]: Completed translation [2021-11-13 18:21:04,509 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:21:04 WrapperNode [2021-11-13 18:21:04,509 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2021-11-13 18:21:04,511 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2021-11-13 18:21:04,511 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2021-11-13 18:21:04,511 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2021-11-13 18:21:04,521 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:21:04" (1/1) ... [2021-11-13 18:21:04,619 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:21:04" (1/1) ... [2021-11-13 18:21:04,838 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2021-11-13 18:21:04,839 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2021-11-13 18:21:04,840 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2021-11-13 18:21:04,840 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2021-11-13 18:21:04,851 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:21:04" (1/1) ... [2021-11-13 18:21:04,851 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:21:04" (1/1) ... [2021-11-13 18:21:04,875 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:21:04" (1/1) ... [2021-11-13 18:21:04,898 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:21:04" (1/1) ... [2021-11-13 18:21:05,008 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:21:04" (1/1) ... [2021-11-13 18:21:05,074 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:21:04" (1/1) ... [2021-11-13 18:21:05,086 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:21:04" (1/1) ... [2021-11-13 18:21:05,121 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2021-11-13 18:21:05,127 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2021-11-13 18:21:05,128 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2021-11-13 18:21:05,128 INFO L275 PluginConnector]: RCFGBuilder initialized [2021-11-13 18:21:05,129 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:21:04" (1/1) ... [2021-11-13 18:21:05,140 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2021-11-13 18:21:05,155 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/z3 [2021-11-13 18:21:05,173 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2021-11-13 18:21:05,227 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2021-11-13 18:21:05,288 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2021-11-13 18:21:05,289 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2021-11-13 18:21:05,289 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2021-11-13 18:21:05,289 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2021-11-13 18:21:05,289 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2021-11-13 18:21:05,290 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2021-11-13 18:21:05,290 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2021-11-13 18:21:05,291 INFO L130 BoogieDeclarations]: Found specification of procedure memcmp [2021-11-13 18:21:05,291 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2021-11-13 18:21:05,291 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2021-11-13 18:21:05,292 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2021-11-13 18:21:05,292 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2021-11-13 18:21:05,292 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2021-11-13 18:21:05,659 WARN L813 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2021-11-13 18:21:09,638 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2021-11-13 18:21:09,638 INFO L299 CfgBuilder]: Removed 54 assume(true) statements. [2021-11-13 18:21:09,644 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 06:21:09 BoogieIcfgContainer [2021-11-13 18:21:09,645 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2021-11-13 18:21:09,650 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2021-11-13 18:21:09,650 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2021-11-13 18:21:09,655 INFO L275 PluginConnector]: BuchiAutomizer initialized [2021-11-13 18:21:09,656 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-13 18:21:09,656 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 13.11 06:21:02" (1/3) ... [2021-11-13 18:21:09,658 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@691e6d43 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.11 06:21:09, skipping insertion in model container [2021-11-13 18:21:09,658 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-13 18:21:09,659 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 06:21:04" (2/3) ... [2021-11-13 18:21:09,659 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@691e6d43 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.11 06:21:09, skipping insertion in model container [2021-11-13 18:21:09,660 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2021-11-13 18:21:09,660 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 06:21:09" (3/3) ... [2021-11-13 18:21:09,662 INFO L388 chiAutomizerObserver]: Analyzing ICFG uthash_SAX_test9-1.i [2021-11-13 18:21:09,741 INFO L359 BuchiCegarLoop]: Interprodecural is true [2021-11-13 18:21:09,741 INFO L360 BuchiCegarLoop]: Hoare is false [2021-11-13 18:21:09,743 INFO L361 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2021-11-13 18:21:09,743 INFO L362 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2021-11-13 18:21:09,743 INFO L363 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2021-11-13 18:21:09,743 INFO L364 BuchiCegarLoop]: Difference is false [2021-11-13 18:21:09,744 INFO L365 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2021-11-13 18:21:09,744 INFO L368 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2021-11-13 18:21:09,818 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 1660 states, 1655 states have (on average 1.6676737160120847) internal successors, (2760), 1655 states have internal predecessors, (2760), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-13 18:21:09,961 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 1649 [2021-11-13 18:21:09,962 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-13 18:21:09,962 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-13 18:21:09,972 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-13 18:21:09,972 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2021-11-13 18:21:09,972 INFO L425 BuchiCegarLoop]: ======== Iteration 1============ [2021-11-13 18:21:09,978 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 1660 states, 1655 states have (on average 1.6676737160120847) internal successors, (2760), 1655 states have internal predecessors, (2760), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-13 18:21:10,014 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 1649 [2021-11-13 18:21:10,015 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-13 18:21:10,015 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-13 18:21:10,016 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-13 18:21:10,016 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2021-11-13 18:21:10,025 INFO L791 eck$LassoCheckResult]: Stem: 415#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 1575#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem22#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~switch26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc38#1.base, main_#t~malloc38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~memset~res41#1.base, main_#t~memset~res41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~malloc47#1.base, main_#t~malloc47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~memset~res54#1.base, main_#t~memset~res54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1, main_#t~post65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~post71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem76#1, main_#t~mem75#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~short79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~malloc82#1.base, main_#t~malloc82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~memset~res87#1.base, main_#t~memset~res87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem92#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem96#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~ite97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~pre111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~post116#1, main_#t~mem120#1, main_#t~mem118#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem119#1, main_#t~mem121#1, main_#t~post122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~post99#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem139#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1, main_#t~ite142#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem149#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem151#1, main_#t~mem153#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem156#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~switch160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem171#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~short184#1, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~ret186#1, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem146#1, main_#t~mem147#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1595#L2220-4true [2021-11-13 18:21:10,026 INFO L793 eck$LassoCheckResult]: Loop: 1595#L2220-4true call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 919#L2220-1true assume !!(main_#t~mem9#1 < 1000);havoc main_#t~mem9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset; 612#L2222true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 358#L2222-2true call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem11#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem12#1 * main_#t~mem13#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem12#1;havoc main_#t~mem13#1; 444#L2227-124true assume !true; 1478#L2220-3true call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int(1 + main_#t~post8#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1; 1595#L2220-4true [2021-11-13 18:21:10,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:21:10,034 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 1 times [2021-11-13 18:21:10,047 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:21:10,048 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [882408924] [2021-11-13 18:21:10,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:21:10,050 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:21:10,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:21:10,220 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-13 18:21:10,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:21:10,333 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-13 18:21:10,338 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:21:10,338 INFO L85 PathProgramCache]: Analyzing trace with hash 1336134572, now seen corresponding path program 1 times [2021-11-13 18:21:10,339 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:21:10,341 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [950600363] [2021-11-13 18:21:10,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:21:10,342 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:21:10,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-13 18:21:10,455 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-13 18:21:10,456 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-13 18:21:10,457 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [950600363] [2021-11-13 18:21:10,459 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [950600363] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-13 18:21:10,460 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-13 18:21:10,461 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2021-11-13 18:21:10,461 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [924768937] [2021-11-13 18:21:10,463 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-13 18:21:10,470 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-13 18:21:10,471 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-13 18:21:10,518 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2021-11-13 18:21:10,519 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2021-11-13 18:21:10,527 INFO L87 Difference]: Start difference. First operand has 1660 states, 1655 states have (on average 1.6676737160120847) internal successors, (2760), 1655 states have internal predecessors, (2760), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-13 18:21:10,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-13 18:21:10,643 INFO L93 Difference]: Finished difference Result 1660 states and 2207 transitions. [2021-11-13 18:21:10,644 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2021-11-13 18:21:10,652 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1660 states and 2207 transitions. [2021-11-13 18:21:10,677 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 1649 [2021-11-13 18:21:10,719 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1660 states to 1656 states and 2203 transitions. [2021-11-13 18:21:10,721 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1656 [2021-11-13 18:21:10,726 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1656 [2021-11-13 18:21:10,727 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1656 states and 2203 transitions. [2021-11-13 18:21:10,745 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-13 18:21:10,745 INFO L681 BuchiCegarLoop]: Abstraction has 1656 states and 2203 transitions. [2021-11-13 18:21:10,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1656 states and 2203 transitions. [2021-11-13 18:21:10,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1656 to 1656. [2021-11-13 18:21:10,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1656 states, 1652 states have (on average 1.3299031476997578) internal successors, (2197), 1651 states have internal predecessors, (2197), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-13 18:21:10,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1656 states to 1656 states and 2203 transitions. [2021-11-13 18:21:10,946 INFO L704 BuchiCegarLoop]: Abstraction has 1656 states and 2203 transitions. [2021-11-13 18:21:10,946 INFO L587 BuchiCegarLoop]: Abstraction has 1656 states and 2203 transitions. [2021-11-13 18:21:10,946 INFO L425 BuchiCegarLoop]: ======== Iteration 2============ [2021-11-13 18:21:10,947 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1656 states and 2203 transitions. [2021-11-13 18:21:10,959 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 1649 [2021-11-13 18:21:10,960 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-13 18:21:10,960 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-13 18:21:10,963 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-13 18:21:10,963 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-13 18:21:10,963 INFO L791 eck$LassoCheckResult]: Stem: 4072#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 4073#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem22#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~switch26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc38#1.base, main_#t~malloc38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~memset~res41#1.base, main_#t~memset~res41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~malloc47#1.base, main_#t~malloc47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~memset~res54#1.base, main_#t~memset~res54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1, main_#t~post65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~post71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem76#1, main_#t~mem75#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~short79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~malloc82#1.base, main_#t~malloc82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~memset~res87#1.base, main_#t~memset~res87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem92#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem96#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~ite97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~pre111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~post116#1, main_#t~mem120#1, main_#t~mem118#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem119#1, main_#t~mem121#1, main_#t~post122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~post99#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem139#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1, main_#t~ite142#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem149#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem151#1, main_#t~mem153#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem156#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~switch160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem171#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~short184#1, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~ret186#1, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem146#1, main_#t~mem147#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4967#L2220-4 [2021-11-13 18:21:10,972 INFO L793 eck$LassoCheckResult]: Loop: 4967#L2220-4 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4673#L2220-1 assume !!(main_#t~mem9#1 < 1000);havoc main_#t~mem9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset; 4340#L2222 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3983#L2222-2 call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem11#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem12#1 * main_#t~mem13#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem12#1;havoc main_#t~mem13#1; 3984#L2227-124 havoc main_~_ha_hashv~0#1; 4118#L2227-49 goto; 4034#L2227-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 4035#L2227-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 3975#L2227-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch26#1 := 11 == main_~_hj_k~0#1; 3745#L2227-10 assume main_#t~switch26#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 3746#L2227-12 main_#t~switch26#1 := main_#t~switch26#1 || 10 == main_~_hj_k~0#1; 4028#L2227-13 assume main_#t~switch26#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 4065#L2227-15 main_#t~switch26#1 := main_#t~switch26#1 || 9 == main_~_hj_k~0#1; 3488#L2227-16 assume main_#t~switch26#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 3489#L2227-18 main_#t~switch26#1 := main_#t~switch26#1 || 8 == main_~_hj_k~0#1; 4962#L2227-19 assume main_#t~switch26#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem30#1 % 256);havoc main_#t~mem30#1; 4972#L2227-21 main_#t~switch26#1 := main_#t~switch26#1 || 7 == main_~_hj_k~0#1; 4400#L2227-22 assume !main_#t~switch26#1; 4401#L2227-24 main_#t~switch26#1 := main_#t~switch26#1 || 6 == main_~_hj_k~0#1; 4896#L2227-25 assume main_#t~switch26#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; 4061#L2227-27 main_#t~switch26#1 := main_#t~switch26#1 || 5 == main_~_hj_k~0#1; 4062#L2227-28 assume main_#t~switch26#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem33#1 % 256;havoc main_#t~mem33#1; 4266#L2227-30 main_#t~switch26#1 := main_#t~switch26#1 || 4 == main_~_hj_k~0#1; 3513#L2227-31 assume main_#t~switch26#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; 3514#L2227-33 main_#t~switch26#1 := main_#t~switch26#1 || 3 == main_~_hj_k~0#1; 3781#L2227-34 assume main_#t~switch26#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem35#1 % 256);havoc main_#t~mem35#1; 4044#L2227-36 main_#t~switch26#1 := main_#t~switch26#1 || 2 == main_~_hj_k~0#1; 4045#L2227-37 assume main_#t~switch26#1;call main_#t~mem36#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem36#1 % 256);havoc main_#t~mem36#1; 4140#L2227-39 main_#t~switch26#1 := main_#t~switch26#1 || 1 == main_~_hj_k~0#1; 3346#L2227-40 assume main_#t~switch26#1;call main_#t~mem37#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem37#1 % 256;havoc main_#t~mem37#1; 3347#L2227-42 havoc main_#t~switch26#1; 4722#L2227-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768); 4134#L2227-44 goto; 4135#L2227-46 goto; 3857#L2227-48 goto; 3858#L2227-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3485#L2227-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 3486#L2227-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1.base, main_#t~mem57#1.offset := read~$Pointer$(main_#t~mem56#1.base, 16 + main_#t~mem56#1.offset, 4);call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1 := read~int(main_#t~mem58#1.base, 20 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_#t~mem57#1.base, main_#t~mem57#1.offset - main_#t~mem59#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1.base, main_#t~mem57#1.offset;havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem61#1.base, 8 + main_#t~mem61#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset;havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem62#1.base, 16 + main_#t~mem62#1.offset, 4);havoc main_#t~mem62#1.base, main_#t~mem62#1.offset; 4076#L2227-66 goto; 4077#L2227-120 havoc main_~_ha_bkt~0#1;call main_#t~mem63#1.base, main_#t~mem63#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem64#1 := read~int(main_#t~mem63#1.base, 12 + main_#t~mem63#1.offset, 4);main_#t~post65#1 := main_#t~mem64#1;call write~int(1 + main_#t~post65#1, main_#t~mem63#1.base, 12 + main_#t~mem63#1.offset, 4);havoc main_#t~mem63#1.base, main_#t~mem63#1.offset;havoc main_#t~mem64#1;havoc main_#t~post65#1; 4128#L2227-71 call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1 := read~int(main_#t~mem66#1.base, 4 + main_#t~mem66#1.offset, 4);main_~_ha_bkt~0#1 := ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem67#1 - 1);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1; 4114#L2227-70 goto; 4115#L2227-118 call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_#t~mem68#1.base, main_#t~mem68#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem69#1.base, main_#t~mem69#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;call main_#t~mem70#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post71#1 := main_#t~mem70#1;call write~int(1 + main_#t~post71#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem70#1;havoc main_#t~post71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem72#1.base, main_#t~mem72#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 4104#L2227-73 assume main_#t~mem73#1.base != 0 || main_#t~mem73#1.offset != 0;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 4105#L2227-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem75#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short79#1 := main_#t~mem76#1 % 4294967296 >= 10 * (1 + main_#t~mem75#1) % 4294967296; 3703#L2227-76 assume main_#t~short79#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 36 + main_#t~mem77#1.offset, 4);main_#t~short79#1 := 0 == main_#t~mem78#1 % 4294967296; 3704#L2227-78 assume !main_#t~short79#1;havoc main_#t~mem76#1;havoc main_#t~mem75#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~short79#1; 3632#L2227-117 goto; 3633#L2227-119 goto; 4447#L2227-121 goto; 4448#L2227-123 goto; 4951#L2220-3 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int(1 + main_#t~post8#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1; 4967#L2220-4 [2021-11-13 18:21:10,973 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:21:10,973 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 2 times [2021-11-13 18:21:10,974 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:21:10,974 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1438367727] [2021-11-13 18:21:10,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:21:10,975 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:21:11,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:21:11,019 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-13 18:21:11,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:21:11,081 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-13 18:21:11,082 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:21:11,084 INFO L85 PathProgramCache]: Analyzing trace with hash -1570577107, now seen corresponding path program 1 times [2021-11-13 18:21:11,086 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:21:11,086 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2109550270] [2021-11-13 18:21:11,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:21:11,087 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:21:11,118 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-13 18:21:11,118 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [263561268] [2021-11-13 18:21:11,118 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:21:11,119 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-13 18:21:11,119 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/z3 [2021-11-13 18:21:11,120 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-13 18:21:11,122 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2021-11-13 18:21:11,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-13 18:21:11,373 INFO L263 TraceCheckSpWp]: Trace formula consists of 308 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-13 18:21:11,379 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-13 18:21:11,581 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-13 18:21:11,582 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-11-13 18:21:11,582 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-13 18:21:11,584 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2109550270] [2021-11-13 18:21:11,585 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-13 18:21:11,585 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [263561268] [2021-11-13 18:21:11,586 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [263561268] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-13 18:21:11,587 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-13 18:21:11,587 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2021-11-13 18:21:11,587 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [65608806] [2021-11-13 18:21:11,588 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-13 18:21:11,589 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-13 18:21:11,589 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-13 18:21:11,590 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2021-11-13 18:21:11,590 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2021-11-13 18:21:11,592 INFO L87 Difference]: Start difference. First operand 1656 states and 2203 transitions. cyclomatic complexity: 550 Second operand has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-13 18:21:11,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-13 18:21:11,782 INFO L93 Difference]: Finished difference Result 1677 states and 2224 transitions. [2021-11-13 18:21:11,782 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2021-11-13 18:21:11,784 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1677 states and 2224 transitions. [2021-11-13 18:21:11,804 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 1670 [2021-11-13 18:21:11,826 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1677 states to 1677 states and 2224 transitions. [2021-11-13 18:21:11,827 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1677 [2021-11-13 18:21:11,830 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1677 [2021-11-13 18:21:11,830 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1677 states and 2224 transitions. [2021-11-13 18:21:11,835 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-13 18:21:11,836 INFO L681 BuchiCegarLoop]: Abstraction has 1677 states and 2224 transitions. [2021-11-13 18:21:11,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1677 states and 2224 transitions. [2021-11-13 18:21:11,881 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1677 to 1676. [2021-11-13 18:21:11,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1676 states, 1672 states have (on average 1.325956937799043) internal successors, (2217), 1671 states have internal predecessors, (2217), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-13 18:21:11,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1676 states to 1676 states and 2223 transitions. [2021-11-13 18:21:11,899 INFO L704 BuchiCegarLoop]: Abstraction has 1676 states and 2223 transitions. [2021-11-13 18:21:11,899 INFO L587 BuchiCegarLoop]: Abstraction has 1676 states and 2223 transitions. [2021-11-13 18:21:11,899 INFO L425 BuchiCegarLoop]: ======== Iteration 3============ [2021-11-13 18:21:11,899 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1676 states and 2223 transitions. [2021-11-13 18:21:11,912 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 1669 [2021-11-13 18:21:11,912 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-13 18:21:11,912 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-13 18:21:11,916 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-13 18:21:11,917 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-13 18:21:11,917 INFO L791 eck$LassoCheckResult]: Stem: 7565#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 7566#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem22#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~switch26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc38#1.base, main_#t~malloc38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~memset~res41#1.base, main_#t~memset~res41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~malloc47#1.base, main_#t~malloc47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~memset~res54#1.base, main_#t~memset~res54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1, main_#t~post65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~post71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem76#1, main_#t~mem75#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~short79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~malloc82#1.base, main_#t~malloc82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~memset~res87#1.base, main_#t~memset~res87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem92#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem96#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~ite97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~pre111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~post116#1, main_#t~mem120#1, main_#t~mem118#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem119#1, main_#t~mem121#1, main_#t~post122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~post99#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem139#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1, main_#t~ite142#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem149#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem151#1, main_#t~mem153#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem156#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~switch160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem171#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~short184#1, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~ret186#1, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem146#1, main_#t~mem147#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8464#L2220-4 [2021-11-13 18:21:11,917 INFO L793 eck$LassoCheckResult]: Loop: 8464#L2220-4 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8167#L2220-1 assume !!(main_#t~mem9#1 < 1000);havoc main_#t~mem9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset; 7834#L2222 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 7476#L2222-2 call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem11#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem12#1 * main_#t~mem13#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem12#1;havoc main_#t~mem13#1; 7477#L2227-124 havoc main_~_ha_hashv~0#1; 7611#L2227-49 goto; 7527#L2227-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 7528#L2227-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 7468#L2227-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch26#1 := 11 == main_~_hj_k~0#1; 7237#L2227-10 assume main_#t~switch26#1;call main_#t~mem27#1 := read~int(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem27#1 % 256);havoc main_#t~mem27#1; 7238#L2227-12 main_#t~switch26#1 := main_#t~switch26#1 || 10 == main_~_hj_k~0#1; 7521#L2227-13 assume main_#t~switch26#1;call main_#t~mem28#1 := read~int(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem28#1 % 256);havoc main_#t~mem28#1; 7558#L2227-15 main_#t~switch26#1 := main_#t~switch26#1 || 9 == main_~_hj_k~0#1; 6980#L2227-16 assume main_#t~switch26#1;call main_#t~mem29#1 := read~int(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem29#1 % 256);havoc main_#t~mem29#1; 6981#L2227-18 main_#t~switch26#1 := main_#t~switch26#1 || 8 == main_~_hj_k~0#1; 8478#L2227-19 assume main_#t~switch26#1;call main_#t~mem30#1 := read~int(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem30#1 % 256);havoc main_#t~mem30#1; 8469#L2227-21 main_#t~switch26#1 := main_#t~switch26#1 || 7 == main_~_hj_k~0#1; 7894#L2227-22 assume main_#t~switch26#1;call main_#t~mem31#1 := read~int(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem31#1 % 256);havoc main_#t~mem31#1; 7895#L2227-24 main_#t~switch26#1 := main_#t~switch26#1 || 6 == main_~_hj_k~0#1; 8392#L2227-25 assume main_#t~switch26#1;call main_#t~mem32#1 := read~int(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem32#1 % 256);havoc main_#t~mem32#1; 7554#L2227-27 main_#t~switch26#1 := main_#t~switch26#1 || 5 == main_~_hj_k~0#1; 7555#L2227-28 assume main_#t~switch26#1;call main_#t~mem33#1 := read~int(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + main_#t~mem33#1 % 256;havoc main_#t~mem33#1; 7760#L2227-30 main_#t~switch26#1 := main_#t~switch26#1 || 4 == main_~_hj_k~0#1; 7005#L2227-31 assume main_#t~switch26#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; 7006#L2227-33 main_#t~switch26#1 := main_#t~switch26#1 || 3 == main_~_hj_k~0#1; 7274#L2227-34 assume main_#t~switch26#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem35#1 % 256);havoc main_#t~mem35#1; 8472#L2227-36 main_#t~switch26#1 := main_#t~switch26#1 || 2 == main_~_hj_k~0#1; 8272#L2227-37 assume main_#t~switch26#1;call main_#t~mem36#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem36#1 % 256);havoc main_#t~mem36#1; 8273#L2227-39 main_#t~switch26#1 := main_#t~switch26#1 || 1 == main_~_hj_k~0#1; 6838#L2227-40 assume main_#t~switch26#1;call main_#t~mem37#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem37#1 % 256;havoc main_#t~mem37#1; 6839#L2227-42 havoc main_#t~switch26#1; 8216#L2227-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768); 7627#L2227-44 goto; 7628#L2227-46 goto; 7350#L2227-48 goto; 7351#L2227-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 6977#L2227-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 6978#L2227-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1.base, main_#t~mem57#1.offset := read~$Pointer$(main_#t~mem56#1.base, 16 + main_#t~mem56#1.offset, 4);call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1 := read~int(main_#t~mem58#1.base, 20 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_#t~mem57#1.base, main_#t~mem57#1.offset - main_#t~mem59#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1.base, main_#t~mem57#1.offset;havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem61#1.base, 8 + main_#t~mem61#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset;havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem62#1.base, 16 + main_#t~mem62#1.offset, 4);havoc main_#t~mem62#1.base, main_#t~mem62#1.offset; 7569#L2227-66 goto; 7570#L2227-120 havoc main_~_ha_bkt~0#1;call main_#t~mem63#1.base, main_#t~mem63#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem64#1 := read~int(main_#t~mem63#1.base, 12 + main_#t~mem63#1.offset, 4);main_#t~post65#1 := main_#t~mem64#1;call write~int(1 + main_#t~post65#1, main_#t~mem63#1.base, 12 + main_#t~mem63#1.offset, 4);havoc main_#t~mem63#1.base, main_#t~mem63#1.offset;havoc main_#t~mem64#1;havoc main_#t~post65#1; 7621#L2227-71 call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1 := read~int(main_#t~mem66#1.base, 4 + main_#t~mem66#1.offset, 4);main_~_ha_bkt~0#1 := ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem67#1 - 1);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1; 7607#L2227-70 goto; 7608#L2227-118 call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_#t~mem68#1.base, main_#t~mem68#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem69#1.base, main_#t~mem69#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;call main_#t~mem70#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post71#1 := main_#t~mem70#1;call write~int(1 + main_#t~post71#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem70#1;havoc main_#t~post71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem72#1.base, main_#t~mem72#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 7597#L2227-73 assume main_#t~mem73#1.base != 0 || main_#t~mem73#1.offset != 0;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 7598#L2227-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem75#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short79#1 := main_#t~mem76#1 % 4294967296 >= 10 * (1 + main_#t~mem75#1) % 4294967296; 7195#L2227-76 assume main_#t~short79#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 36 + main_#t~mem77#1.offset, 4);main_#t~short79#1 := 0 == main_#t~mem78#1 % 4294967296; 7196#L2227-78 assume !main_#t~short79#1;havoc main_#t~mem76#1;havoc main_#t~mem75#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~short79#1; 7124#L2227-117 goto; 7125#L2227-119 goto; 7941#L2227-121 goto; 7942#L2227-123 goto; 8447#L2220-3 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int(1 + main_#t~post8#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1; 8464#L2220-4 [2021-11-13 18:21:11,918 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:21:11,919 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 3 times [2021-11-13 18:21:11,919 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:21:11,920 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [879434578] [2021-11-13 18:21:11,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:21:11,921 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:21:11,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:21:11,958 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-13 18:21:11,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:21:12,009 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-13 18:21:12,010 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:21:12,010 INFO L85 PathProgramCache]: Analyzing trace with hash -726571605, now seen corresponding path program 1 times [2021-11-13 18:21:12,013 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:21:12,014 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [762664838] [2021-11-13 18:21:12,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:21:12,015 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:21:12,047 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-13 18:21:12,047 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1301966666] [2021-11-13 18:21:12,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:21:12,048 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-13 18:21:12,048 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/z3 [2021-11-13 18:21:12,052 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-13 18:21:12,070 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2021-11-13 18:21:12,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2021-11-13 18:21:12,297 INFO L263 TraceCheckSpWp]: Trace formula consists of 314 conjuncts, 3 conjunts are in the unsatisfiable core [2021-11-13 18:21:12,300 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2021-11-13 18:21:12,472 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2021-11-13 18:21:12,472 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2021-11-13 18:21:12,473 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2021-11-13 18:21:12,473 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [762664838] [2021-11-13 18:21:12,473 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: Unknown [2021-11-13 18:21:12,474 INFO L332 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1301966666] [2021-11-13 18:21:12,475 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1301966666] provided 1 perfect and 0 imperfect interpolant sequences [2021-11-13 18:21:12,475 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2021-11-13 18:21:12,475 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2021-11-13 18:21:12,476 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1071538638] [2021-11-13 18:21:12,477 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2021-11-13 18:21:12,477 INFO L808 eck$LassoCheckResult]: loop already infeasible [2021-11-13 18:21:12,478 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2021-11-13 18:21:12,478 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2021-11-13 18:21:12,479 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2021-11-13 18:21:12,479 INFO L87 Difference]: Start difference. First operand 1676 states and 2223 transitions. cyclomatic complexity: 550 Second operand has 4 states, 4 states have (on average 13.0) internal successors, (52), 4 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2021-11-13 18:21:12,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2021-11-13 18:21:12,769 INFO L93 Difference]: Finished difference Result 3231 states and 4291 transitions. [2021-11-13 18:21:12,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2021-11-13 18:21:12,772 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 3231 states and 4291 transitions. [2021-11-13 18:21:12,815 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 3216 [2021-11-13 18:21:12,860 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 3231 states to 3231 states and 4291 transitions. [2021-11-13 18:21:12,861 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3231 [2021-11-13 18:21:12,867 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3231 [2021-11-13 18:21:12,867 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3231 states and 4291 transitions. [2021-11-13 18:21:12,876 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2021-11-13 18:21:12,877 INFO L681 BuchiCegarLoop]: Abstraction has 3231 states and 4291 transitions. [2021-11-13 18:21:12,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3231 states and 4291 transitions. [2021-11-13 18:21:12,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3231 to 1662. [2021-11-13 18:21:12,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1662 states, 1658 states have (on average 1.3244873341375152) internal successors, (2196), 1657 states have internal predecessors, (2196), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2021-11-13 18:21:12,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1662 states to 1662 states and 2202 transitions. [2021-11-13 18:21:12,956 INFO L704 BuchiCegarLoop]: Abstraction has 1662 states and 2202 transitions. [2021-11-13 18:21:12,956 INFO L587 BuchiCegarLoop]: Abstraction has 1662 states and 2202 transitions. [2021-11-13 18:21:12,956 INFO L425 BuchiCegarLoop]: ======== Iteration 4============ [2021-11-13 18:21:12,956 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1662 states and 2202 transitions. [2021-11-13 18:21:12,969 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 1655 [2021-11-13 18:21:12,970 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2021-11-13 18:21:12,970 INFO L119 BuchiIsEmpty]: Starting construction of run [2021-11-13 18:21:12,971 INFO L842 BuchiCegarLoop]: Counterexample stem histogram [1, 1] [2021-11-13 18:21:12,971 INFO L843 BuchiCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2021-11-13 18:21:12,972 INFO L791 eck$LassoCheckResult]: Stem: 12634#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;#NULL.base, #NULL.offset := 0, 0;#valid := #valid[0 := 0];assume 0 < #StackHeapBarrier;call #t~string2.base, #t~string2.offset := #Ultimate.allocOnStack(2);call write~init~int(48, #t~string2.base, #t~string2.offset, 1);call write~init~int(0, #t~string2.base, 1 + #t~string2.offset, 1);call #t~string3.base, #t~string3.offset := #Ultimate.allocOnStack(21);~count_int_int~0 := 0; 12635#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem15#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem17#1, main_#t~mem19#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem21#1, main_#t~mem23#1, main_#t~mem22#1, main_#t~mem24#1, main_#t~mem25#1, main_#t~switch26#1, main_#t~mem27#1, main_#t~mem28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc38#1.base, main_#t~malloc38#1.offset, main_#t~mem39#1.base, main_#t~mem39#1.offset, main_#t~mem40#1.base, main_#t~mem40#1.offset, main_#t~memset~res41#1.base, main_#t~memset~res41#1.offset, main_#t~mem42#1.base, main_#t~mem42#1.offset, main_#t~mem43#1.base, main_#t~mem43#1.offset, main_#t~mem44#1.base, main_#t~mem44#1.offset, main_#t~mem45#1.base, main_#t~mem45#1.offset, main_#t~mem46#1.base, main_#t~mem46#1.offset, main_#t~malloc47#1.base, main_#t~malloc47#1.offset, main_#t~mem48#1.base, main_#t~mem48#1.offset, main_#t~mem49#1.base, main_#t~mem49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~memset~res54#1.base, main_#t~memset~res54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1, main_#t~post65#1, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~post71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem76#1, main_#t~mem75#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~short79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1, main_#t~malloc82#1.base, main_#t~malloc82#1.offset, main_#t~mem83#1.base, main_#t~mem83#1.offset, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~memset~res87#1.base, main_#t~memset~res87#1.offset, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem92#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem96#1, main_#t~mem94#1.base, main_#t~mem94#1.offset, main_#t~mem95#1, main_#t~ite97#1, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~pre111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~post116#1, main_#t~mem120#1, main_#t~mem118#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem119#1, main_#t~mem121#1, main_#t~post122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~post99#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~mem130#1.base, main_#t~mem130#1.offset, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~mem139#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1, main_#t~ite142#1, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~#_he_new_buckets~0#1.base, main_~#_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem7#1, main_#t~post8#1, main_#t~mem9#1, main_#t~mem149#1, main_#t~mem148#1, main_#t~mem150#1, main_#t~mem151#1, main_#t~mem153#1, main_#t~mem152#1, main_#t~mem154#1, main_#t~mem155#1, main_#t~mem157#1, main_#t~mem156#1, main_#t~mem158#1, main_#t~mem159#1, main_#t~switch160#1, main_#t~mem161#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem164#1, main_#t~mem165#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem168#1, main_#t~mem169#1, main_#t~mem170#1, main_#t~mem171#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem172#1.base, main_#t~mem172#1.offset, main_#t~mem173#1, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1.base, main_#t~mem176#1.offset, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~short184#1, main_#t~mem185#1.base, main_#t~mem185#1.offset, main_#t~ret186#1, main_#t~mem187#1.base, main_#t~mem187#1.offset, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~mem146#1, main_#t~mem147#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 13530#L2220-4 [2021-11-13 18:21:12,972 INFO L793 eck$LassoCheckResult]: Loop: 13530#L2220-4 call main_#t~mem9#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 13235#L2220-1 assume !!(main_#t~mem9#1 < 1000);havoc main_#t~mem9#1;call main_#t~malloc10#1.base, main_#t~malloc10#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc10#1.base, main_#t~malloc10#1.offset;havoc main_#t~malloc10#1.base, main_#t~malloc10#1.offset; 12902#L2222 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 12545#L2222-2 call main_#t~mem11#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem11#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem11#1;call main_#t~mem12#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem13#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int(main_#t~mem12#1 * main_#t~mem13#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem12#1;havoc main_#t~mem13#1; 12546#L2227-124 havoc main_~_ha_hashv~0#1; 12680#L2227-49 goto; 12596#L2227-47 havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 12597#L2227-8 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 12537#L2227-9 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch26#1 := 11 == main_~_hj_k~0#1; 12307#L2227-10 assume !main_#t~switch26#1; 12308#L2227-12 main_#t~switch26#1 := main_#t~switch26#1 || 10 == main_~_hj_k~0#1; 12590#L2227-13 assume !main_#t~switch26#1; 12627#L2227-15 main_#t~switch26#1 := main_#t~switch26#1 || 9 == main_~_hj_k~0#1; 12049#L2227-16 assume !main_#t~switch26#1; 12050#L2227-18 main_#t~switch26#1 := main_#t~switch26#1 || 8 == main_~_hj_k~0#1; 13525#L2227-19 assume !main_#t~switch26#1; 13535#L2227-21 main_#t~switch26#1 := main_#t~switch26#1 || 7 == main_~_hj_k~0#1; 12962#L2227-22 assume !main_#t~switch26#1; 12963#L2227-24 main_#t~switch26#1 := main_#t~switch26#1 || 6 == main_~_hj_k~0#1; 13459#L2227-25 assume !main_#t~switch26#1; 12623#L2227-27 main_#t~switch26#1 := main_#t~switch26#1 || 5 == main_~_hj_k~0#1; 12624#L2227-28 assume !main_#t~switch26#1; 12828#L2227-30 main_#t~switch26#1 := main_#t~switch26#1 || 4 == main_~_hj_k~0#1; 12074#L2227-31 assume main_#t~switch26#1;call main_#t~mem34#1 := read~int(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem34#1 % 256);havoc main_#t~mem34#1; 12075#L2227-33 main_#t~switch26#1 := main_#t~switch26#1 || 3 == main_~_hj_k~0#1; 13538#L2227-34 assume main_#t~switch26#1;call main_#t~mem35#1 := read~int(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem35#1 % 256);havoc main_#t~mem35#1; 13539#L2227-36 main_#t~switch26#1 := main_#t~switch26#1 || 2 == main_~_hj_k~0#1; 13340#L2227-37 assume main_#t~switch26#1;call main_#t~mem36#1 := read~int(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem36#1 % 256);havoc main_#t~mem36#1; 12702#L2227-39 main_#t~switch26#1 := main_#t~switch26#1 || 1 == main_~_hj_k~0#1; 11907#L2227-40 assume main_#t~switch26#1;call main_#t~mem37#1 := read~int(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + main_#t~mem37#1 % 256;havoc main_#t~mem37#1; 11908#L2227-42 havoc main_#t~switch26#1; 13284#L2227-45 main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8192);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 256 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 8192);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 4096);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 65536 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32);main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;main_~_hj_i~0#1 := ~bitwiseXor(main_~_hj_i~0#1, main_~_ha_hashv~0#1 / 8);main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;main_~_hj_j~0#1 := ~bitwiseXor(main_~_hj_j~0#1, 1024 * main_~_hj_i~0#1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;main_~_ha_hashv~0#1 := ~bitwiseXor(main_~_ha_hashv~0#1, main_~_hj_j~0#1 / 32768); 12696#L2227-44 goto; 12697#L2227-46 goto; 12419#L2227-48 goto; 12420#L2227-122 call write~int(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 12046#L2227-51 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem55#1.base, main_#t~mem55#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_#t~mem55#1.base, main_#t~mem55#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem55#1.base, main_#t~mem55#1.offset; 12047#L2227-67 call write~$Pointer$(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem56#1.base, main_#t~mem56#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem57#1.base, main_#t~mem57#1.offset := read~$Pointer$(main_#t~mem56#1.base, 16 + main_#t~mem56#1.offset, 4);call main_#t~mem58#1.base, main_#t~mem58#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem59#1 := read~int(main_#t~mem58#1.base, 20 + main_#t~mem58#1.offset, 4);call write~$Pointer$(main_#t~mem57#1.base, main_#t~mem57#1.offset - main_#t~mem59#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem56#1.base, main_#t~mem56#1.offset;havoc main_#t~mem57#1.base, main_#t~mem57#1.offset;havoc main_#t~mem58#1.base, main_#t~mem58#1.offset;havoc main_#t~mem59#1;call main_#t~mem60#1.base, main_#t~mem60#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem61#1.base, main_#t~mem61#1.offset := read~$Pointer$(main_#t~mem60#1.base, 16 + main_#t~mem60#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem61#1.base, 8 + main_#t~mem61#1.offset, 4);havoc main_#t~mem60#1.base, main_#t~mem60#1.offset;havoc main_#t~mem61#1.base, main_#t~mem61#1.offset;call main_#t~mem62#1.base, main_#t~mem62#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem62#1.base, 16 + main_#t~mem62#1.offset, 4);havoc main_#t~mem62#1.base, main_#t~mem62#1.offset; 12638#L2227-66 goto; 12639#L2227-120 havoc main_~_ha_bkt~0#1;call main_#t~mem63#1.base, main_#t~mem63#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem64#1 := read~int(main_#t~mem63#1.base, 12 + main_#t~mem63#1.offset, 4);main_#t~post65#1 := main_#t~mem64#1;call write~int(1 + main_#t~post65#1, main_#t~mem63#1.base, 12 + main_#t~mem63#1.offset, 4);havoc main_#t~mem63#1.base, main_#t~mem63#1.offset;havoc main_#t~mem64#1;havoc main_#t~post65#1; 12690#L2227-71 call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem67#1 := read~int(main_#t~mem66#1.base, 4 + main_#t~mem66#1.offset, 4);main_~_ha_bkt~0#1 := ~bitwiseAnd(main_~_ha_hashv~0#1, main_#t~mem67#1 - 1);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;havoc main_#t~mem67#1; 12676#L2227-70 goto; 12677#L2227-118 call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$(main_#t~mem68#1.base, main_#t~mem68#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem69#1.base, main_#t~mem69#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;call main_#t~mem70#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post71#1 := main_#t~mem70#1;call write~int(1 + main_#t~post71#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem70#1;havoc main_#t~post71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_#t~mem72#1.base, main_#t~mem72#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call write~$Pointer$(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 12666#L2227-73 assume main_#t~mem73#1.base != 0 || main_#t~mem73#1.offset != 0;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 12667#L2227-75 call write~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem76#1 := read~int(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem75#1 := read~int(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short79#1 := main_#t~mem76#1 % 4294967296 >= 10 * (1 + main_#t~mem75#1) % 4294967296; 12265#L2227-76 assume main_#t~short79#1;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem78#1 := read~int(main_#t~mem77#1.base, 36 + main_#t~mem77#1.offset, 4);main_#t~short79#1 := 0 == main_#t~mem78#1 % 4294967296; 12266#L2227-78 assume !main_#t~short79#1;havoc main_#t~mem76#1;havoc main_#t~mem75#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~short79#1; 12194#L2227-117 goto; 12195#L2227-119 goto; 13009#L2227-121 goto; 13010#L2227-123 goto; 13514#L2220-3 call main_#t~mem7#1 := read~int(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post8#1 := main_#t~mem7#1;call write~int(1 + main_#t~post8#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem7#1;havoc main_#t~post8#1; 13530#L2220-4 [2021-11-13 18:21:12,973 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:21:12,974 INFO L85 PathProgramCache]: Analyzing trace with hash 1251, now seen corresponding path program 4 times [2021-11-13 18:21:12,974 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:21:12,974 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2000637769] [2021-11-13 18:21:12,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:21:12,975 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:21:12,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:21:12,992 INFO L355 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2021-11-13 18:21:13,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2021-11-13 18:21:13,015 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2021-11-13 18:21:13,016 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2021-11-13 18:21:13,016 INFO L85 PathProgramCache]: Analyzing trace with hash 1694021305, now seen corresponding path program 1 times [2021-11-13 18:21:13,017 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2021-11-13 18:21:13,017 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1189024096] [2021-11-13 18:21:13,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:21:13,018 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2021-11-13 18:21:13,030 ERROR L247 FreeRefinementEngine]: Caught known exception: Unsupported non-linear arithmetic [2021-11-13 18:21:13,030 INFO L332 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [911773661] [2021-11-13 18:21:13,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2021-11-13 18:21:13,031 INFO L168 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2021-11-13 18:21:13,031 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/z3 [2021-11-13 18:21:13,066 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2021-11-13 18:21:13,068 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_a8882736-6ba4-4fc1-a278-a5f1ae2fccaf/bin/uautomizer-YU5uOKAj3y/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process